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2013-11-28Add {vex3} and {vex2} prefixes by analogy with {evex}H. Peter Anvin1-0/+9
2013-11-27testcase: Remove escape characters - '\'Jin Kyu Song5-4401/+4401
2013-11-22bnd: Drop bnd prefix for relaxed short jmp instructionsJin Kyu Song2-2/+8
2013-11-20MPX: Adapt GAS's mib syntax with an index reg onlyJin Kyu Song1-4/+4
2013-11-20SHA: SHA test casesJin Kyu Song2-0/+61
2013-11-20MPX: Add test cases for MPXJin Kyu Song2-0/+202
2013-11-20parser: support split base,index effective addressH. Peter Anvin1-0/+11
2013-11-20AVX-512: Add perfomtest-compliant headers to test casesJin Kyu Song4-1/+5
2013-09-14AVX-512: Added AVX-512PF instructionsJin Kyu Song1-0/+87
2013-09-14AVX-512: Add AVX-512ER instructionsJin Kyu Song1-0/+143
2013-09-14AVX-512: Add AVX-512CD instructionsJin Kyu Song1-0/+105
2013-09-07AVX-512: Add Pseudo-ops for CMP instructionsJin Kyu Song2-5/+2381
2013-08-29AVX-512: Add test case for opmask instructionsJin Kyu Song2-4578/+24
2013-08-29AVX-512: Fix commentsJin Kyu Song1-1/+0
2013-08-28AVX-512: Add a feature to generate a raw bytecode fileJin Kyu Song1-0/+11
2013-08-28AVX-512: Add a test case for EVEX encoded instructionsJin Kyu Song2-0/+9271
2013-07-21test: Add br978756Cyrill Gorcunov1-0/+7
2013-07-21test: Add br3392259Cyrill Gorcunov1-0/+8
2013-07-19BR 3392260: Handle instructions only separated by vector SIB sizeH. Peter Anvin1-0/+11
2013-05-13test: Add br3392252 testCyrill Gorcunov1-0/+43
2012-07-22hle: opcode A2 forbidden with HLE prefixesH. Peter Anvin1-0/+4
2012-05-31test: ilog2() testH. Peter Anvin1-0/+271
2012-03-06test: Add br3385573 testcaseCyrill Gorcunov1-0/+11
2012-03-05Try again to fix our handling of MOVD/MOVQH. Peter Anvin1-0/+15
2012-02-25HLE: Change NOHLE to be an instruction flagH. Peter Anvin1-0/+15
2012-02-25Add support for UTF-16BE and UTF-32BEH. Peter Anvin1-0/+52
2012-02-25Clean up JMP/CALL patterns, especially for 64 bitsH. Peter Anvin1-0/+4
2011-08-31Add AVX2 test fileCyrill Gorcunov1-0/+1608
2011-06-26test: Add movd.asmCyrill Gorcunov1-0/+12
2011-06-22Implement the VGATHERP instructionH. Peter Anvin1-0/+76
2011-03-12Merge branch 'nasm-2.09.xx'Cyrill Gorcunov2-0/+16
2011-03-07test: Add br3189064Cyrill Gorcunov1-0/+7
2011-03-07test: Add br3200749Cyrill Gorcunov1-0/+9
2011-02-21Merge branch 'nasm-2.09.xx'Cyrill Gorcunov1-0/+7
2011-02-21test: Add test for BR 3187743Cyrill Gorcunov1-0/+7
2011-02-14Merge branch 'nasm-2.09.xx'Cyrill Gorcunov1-0/+9
2011-02-14test: Add test for BR3174983Cyrill Gorcunov1-0/+9
2010-12-29Move implicit operand size override logic to calc_sizeVictor van den Elzen2-1/+29
2010-11-21BR3058845: mostly fix bogus warning with implicit operand size overrideVictor van den Elzen1-0/+14
2010-11-16Merge branch 'nasm-2.09.xx'H. Peter Anvin1-0/+9
2010-11-16BR 3109604: Fix C4 vs C5 VEX form selection in calcsize()H. Peter Anvin1-0/+9
2010-11-07BR3058845: mostly fix bogus warning with implicit operand size overrideVictor van den Elzen1-0/+14
2010-11-06test: Add br3104312.asm testCyrill Gorcunov1-0/+11
2010-11-06test: Add br3092924.asmCyrill Gorcunov1-0/+25
2010-09-30More tests automationCyrill Gorcunov10-1/+25
2010-09-24test: Add br3074517.asmCyrill Gorcunov1-0/+12
2010-09-18Merge branch 'nasm-2.09.xx'Cyrill Gorcunov1-0/+68
2010-09-18Add test-case for BR3066383Cyrill Gorcunov1-0/+68
2010-08-24BR 3052618: handle segment register operations in 64-bit modeH. Peter Anvin1-0/+65
2010-08-24Optimize mov r64,immH. Peter Anvin1-0/+50
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