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2013-11-28Add {vex3} and {vex2} prefixes by analogy with {evex}H. Peter Anvin1-1/+5
2013-11-27iflags: Add IF_EVEX for checking {evex} availabilityJin Kyu Song1-3/+1
2013-11-27opflags: Separate vector registers into low-16 and high-16Jin Kyu Song1-0/+5
2013-11-24iflag: Fix dependencies, factor out static components of iflag.hH. Peter Anvin1-3/+7
2013-11-24insns: Restore back MMX,FPU flagsCyrill Gorcunov1-15/+0
2013-11-24iflag: Start using new instruction flags engineCyrill Gorcunov1-6/+19
2013-11-20MPX: Move BND prefix indication from bytecode to iflagsJin Kyu Song1-1/+0
2013-11-20MPX: Add BND prefix for branch instructionsJin Kyu Song1-0/+1
2013-11-20MPX: Add MPX instructionsJin Kyu Song1-0/+3
2013-10-07iflags: Eliminate perl smart match operatorJin Kyu Song1-1/+1
2013-08-28AVX-512: Change the data type for instruction flagsJin Kyu Song1-0/+15
2013-08-16AVX-512: Add EVEX encoding and new instructionsJin Kyu Song1-13/+127
2013-03-10Make F2 and F3 SSE prefixes override 66Ben Rudiak-Gould1-2/+2
2013-03-04Drop SAME_AS flag from instruction matcherBen Rudiak-Gould1-17/+13
2013-03-03insns: Remove pushseg/popseg internal bytecodesBen Rudiak-Gould1-12/+0
2013-03-02insns.pl: Various style polyshingCyrill Gorcunov1-75/+77
2013-03-01Remove +sBen Rudiak-Gould1-33/+5
2013-02-20Add np and similar prefixes to instructions that should have themBen Rudiak-Gould1-0/+2
2012-02-25HLE: Move byte codes back to \271-\273H. Peter Anvin1-3/+3
2012-02-25HLE: Change NOHLE to be an instruction flagH. Peter Anvin1-1/+0
2012-02-25Remove all remaining explicit bytecodes from insns.datH. Peter Anvin1-12/+31
2012-02-25Move HLE byte codes to \264..\267H. Peter Anvin1-4/+4
2012-02-25Add a "nohle" byte code to skip an instruction patternH. Peter Anvin1-3/+4
2012-02-24insns.pl: Bundle all "plain bytecodes" into a hashH. Peter Anvin1-40/+33
2012-02-24HLE: Implement the basic mechanism for XACQUIRE/XRELEASEH. Peter Anvin1-0/+6
2012-02-10insns: create a symbolic "wait" token for the \341 byte codeH. Peter Anvin1-0/+2
2012-02-09insns: replace open-coded \322 opcode with odf (operand default)H. Peter Anvin1-0/+2
2011-07-20Implement insns.dat in human readable formAnonymous1-74/+58
2011-07-07Use a normal quad-case for valueless /is4H. Peter Anvin1-3/+4
2011-07-07Remove support for DREX encodingH. Peter Anvin1-14/+0
2011-06-22Add support for VSIB instructionsH. Peter Anvin1-0/+5
2010-11-23insns.pl: Fix up merge conflict for sureCyrill Gorcunov1-1/+1
2010-11-23insns.pl: Clear tabs/space messCyrill Gorcunov1-520/+520
2010-08-19insns.pl: make insnsd.c a bit easier to readH. Peter Anvin1-11/+8
2010-08-19ndisasm: handle VEX.LIGH. Peter Anvin1-6/+6
2010-08-16assemble: handle vex.ligH. Peter Anvin1-2/+4
2010-08-16vex: change .wx to .wig to match the latest AVX specH. Peter Anvin1-1/+1
2009-08-08insns.pl: remove redundant empty line in enum opcodeCyrill Gorcunov1-1/+1
2009-07-26insns.pl: smarter handling of operand flagsH. Peter Anvin1-12/+31
2009-07-06NASM: relicense under the 2-clause BSD licenseH. Peter Anvin1-12/+0
2009-06-28Add copyright verbiage to Perl scripts; update LICENSEH. Peter Anvin1-5/+47
2009-06-25insns.pl: remove stray whitespaceH. Peter Anvin1-1/+1
2009-06-25insns.pl: add "nohi" code for REX_NHH. Peter Anvin1-0/+2
2009-06-25insns.pl: fix indentationH. Peter Anvin1-141/+141
2009-06-24insns.pl: allow relaxed forms to be created without duplicationH. Peter Anvin1-32/+77
2009-05-15insns.pl - add handling of pp VEX/XOP fieldsCyrill Gorcunov1-3/+5
2009-05-03Use lower case for VEX and XOP in instructions tableH. Peter Anvin1-3/+3
2009-05-03Infrastructure support for AMD's new XOP prefixH. Peter Anvin1-23/+38
2009-02-18insns.pl: handle the new VEX.DDS flag per AVX spec version 5H. Peter Anvin1-1/+1
2008-10-23Add extension bytecodes to support operands 4+H. Peter Anvin1-29/+55
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