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2007-09-24Support __float*__ for floating-point numbers in expressionsH. Peter Anvin1-7/+1
Add special operators to allow the use of floating-point constants in contexts other than DW/DD/DQ/DT/DO. As part of this checkin, make MAX_KEYWORD generated by tokhash.pl, since it knows what all the keywords are so it can tell which one is the longest.
2007-09-22Add the AMD SSE4a and LZCNT instructionsH. Peter Anvin1-2/+3
Add AMD SSE4a and LZCNT
2007-09-18Support generating NaNs and infinitiesH. Peter Anvin1-2/+2
Support generating NaNs and infinities as part of floating-point constants.
2007-09-18Speed up the disassembler by allowing prefixed instruction tablesH. Peter Anvin1-1/+10
Modify the disassembler so that we can have separate instruction tables for prefixed instructions. As it was, all instructions which started with 0F were linearly searched, and that is by now more than half the instruction set.
2007-09-18Implement "oword" (128 bits) as a first-class sizeH. Peter Anvin1-0/+1
Implement oword, reso, do, as well as the SO flag to instructions. No instructions are actually flagged with SO yet, but this allows us to specify 128-bit sizes in instruction patterns.
2007-09-17Actually generate SSE5 instructionsH. Peter Anvin1-1/+2
This checkin completes what is required to actually generate SSE5 instructions. No support in the disassembler yet. This checkin covers: - Support for actually generating DREX prefixes. - Support for matching operand "operand X must match Y"
2007-09-17Initial support for four arguments per instructionH. Peter Anvin1-8/+10
For SSE5, we will need to support four arguments per instruction.
2007-09-12Add (untested!) SSSE3, SSE4.1, SSE4.2 instructionsH. Peter Anvin1-0/+1
Add the SSSE3, SSE4.1 and SSE4.2 instruction sets. Change \332 to be a literal 0xF2 prefix, by analog with \333 for 0xF3 prefix (the previous \332 flag changed to \335). This is necessary to get the REX prefix in the right place for instructions that use it. We are going to have to go in and change existing instruction patterns which use these, as well.
2007-09-12Remove $Id$ tags (useless with git)H. Peter Anvin1-1/+0
Remove CVS $Id$ tags, since git doesn't use them.
2007-09-12Macros for SSSE3/SSE4 instruction setsH. Peter Anvin1-0/+3
Add instruction set flags for the SSSE3, SSE4.1 and SSE4.2 instruction subsets.
2007-09-11Make the big instruction arrays "const"H. Peter Anvin1-0/+4
Make the big instruction arrays "const", so they end up in readonly storage. While we're at it, move their prototypes into insns.h.
2007-09-10Use an actual enum for the opcodeH. Peter Anvin1-5/+5
Use an actual named enum for the opcode, that way it shows up in cleartext while debugging.
2007-04-17Handle "LOCK as REX.R" for MOV CRx; fix warning for invalid 64-bit regsH. Peter Anvin1-3/+5
- MOV gpr,CRx or MOV CRx,gpr can access high control registers with a LOCK prefix; handle that in both the assembler and disassembler. - Get a saner error message when trying to access high resources in non-64-bit mode.
2007-04-13Fixed distinction between char and int8_t data types.Keith Kanios1-1/+1
2007-04-12General push for x86-64 support, dubbed 0.99.00.Keith Kanios1-8/+11
2006-03-02Add VMX instructions.Eric Christopher1-2/+3
2005-01-15Apply Nindent to all .c and .h filesH. Peter Anvin1-43/+43
2003-02-24Add support for the new instructions in PrescottH. Peter Anvin1-0/+2
2002-09-12Clean up unnecessary dependencies.H. Peter Anvin1-0/+9
2002-05-28Add the JMPE instruction.H. Peter Anvin1-0/+1
2002-05-14Code cleanup fixes from Ed BerosetH. Peter Anvin1-1/+6
2002-04-30NASM 0.98.08H. Peter Anvin1-0/+2
2002-04-30NASM 0.98.03H. Peter Anvin1-0/+2
2002-04-30NASM 0.98p7H. Peter Anvin1-0/+5
2002-04-30NASM 0.98p3.5H. Peter Anvin1-19/+26
2002-04-30NASM 0.96H. Peter Anvin1-0/+1
2002-04-30NASM 0.94H. Peter Anvin1-16/+15
2002-04-30NASM 0.91H. Peter Anvin1-0/+66