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2007-09-18Merge commit 'origin/master' into sse5H. Peter Anvin1-0/+3
2007-09-18Add NOP with argument to the instruction listH. Peter Anvin1-0/+3
2007-09-18Implement "oword" (128 bits) as a first-class sizeH. Peter Anvin1-10/+16
2007-09-18SSE5 instruction tableH. Peter Anvin1-0/+148
2007-09-17insns.dat: All SSE5 instructions are AMDH. Peter Anvin1-16/+16
2007-09-17Actually generate SSE5 instructionsH. Peter Anvin1-0/+18
2007-09-17Merge commit 'origin/master' into sse5H. Peter Anvin1-1/+1
2007-09-17Initial support for four arguments per instructionH. Peter Anvin1-81/+81
2007-09-17CLFLUSH: Neither an x64 instruction nor AMDH. Peter Anvin1-1/+1
2007-09-12Fix literal F2 and F3 prefixesH. Peter Anvin1-64/+64
2007-09-12Add (untested!) SSSE3, SSE4.1, SSE4.2 instructionsH. Peter Anvin1-8/+80
2007-09-12Add support for Tejas New Instructions (SSSE3)H. Peter Anvin1-0/+33
2007-09-12Remove $Id$ tags (useless with git)H. Peter Anvin1-1/+0
2007-09-12Use rm32 operands for VMREAD/VMWRITEH. Peter Anvin1-4/+2
2007-09-11Handle instructions which can have both REX.W and OSPH. Peter Anvin1-2/+2
2007-09-02Fix some MMX/SSE irregularities which interact with the 64-bit supportH. Peter Anvin1-12/+12
2007-08-17Fixed issues with REX prefix effective address generation. Fixed XMM instruct...Keith Kanios1-227/+227
2007-05-30Machine-generated \321->\324 correctionsH. Peter Anvin1-148/+148
2007-05-30More \321 -> \324H. Peter Anvin1-2/+2
2007-05-30MOV reg64,reg64 takes \324 (64 bit with REX) not \321 (32 bit)H. Peter Anvin1-1/+1
2007-04-17Handle "LOCK as REX.R" for MOV CRx; fix warning for invalid 64-bit regsH. Peter Anvin1-2/+2
2007-04-16MEM_OFFSET Instructions Fixed.Keith Kanios1-4/+4
2007-04-16Fixed long mode MEM_OFFS issue.Keith Kanios1-4/+4
2007-04-16More \321 -> \324 for 64-bit instructionsH. Peter Anvin1-3/+3
2007-04-16More 64-bit ndisasm fixes.H. Peter Anvin1-2/+2
2007-04-16Fixes for 64-bit ndisasm.H. Peter Anvin1-1/+1
2007-04-15CR8 is not special in any way as far as the assembler is concerned.H. Peter Anvin1-14/+6
2007-04-12General push for x86-64 support, dubbed 0.99.00.Keith Kanios1-73/+312
2006-03-02Add VMX instructions.Eric Christopher1-0/+14
2003-09-02STR also has SMSW/SLDT-like semantics for operand sizeH. Peter Anvin1-1/+2
2003-08-27SMSW and SLDT are implicitly 16 bits when accessing memory, but can setH. Peter Anvin1-2/+4
2003-03-12Add Cyrix XSTOREH. Peter Anvin1-0/+1
2003-02-24Add support for the new instructions in PrescottH. Peter Anvin1-0/+28
2003-02-04bugfixes to insns.dat pmovhps, pmovlps, sysexitFrank Kotler1-3/+1
2002-11-08Fix bug 615409 (UNPCKHPD xmmreg,mem not vice versa)H. Peter Anvin1-1/+1
2002-06-07Removed unnecessary address size flags from register only versions of instruc...Debbie Wiles1-118/+118
2002-06-06This is the "megapatch":H. Peter Anvin1-19/+9
2002-05-28Add the JMPE instruction.H. Peter Anvin1-0/+5
2002-05-27Deal with another case of address/operand size confusion, BR 560873H. Peter Anvin1-6/+6
2002-05-10*** empty log message ***Debbie Wiles1-1/+1
2002-05-09*** empty log message ***Debbie Wiles1-3/+3
2002-05-09Processor level fixes from John CoffmanH. Peter Anvin1-17/+17
2002-04-30NASM 0.98.30H. Peter Anvin1-3/+3
2002-04-30NASM 0.98.25altH. Peter Anvin1-16/+16
2002-04-30NASM 0.98.25H. Peter Anvin1-22/+31
2002-04-30NASM 0.98.23H. Peter Anvin1-63/+63
2002-04-30NASM 0.98.21H. Peter Anvin1-18/+10
2002-04-30NASM 0.98.12H. Peter Anvin1-70/+70
2002-04-30NASM 0.98.11H. Peter Anvin1-59/+80
2002-04-30NASM 0.98.09H. Peter Anvin1-375/+419
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