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2011-06-29insns: Mark AVX2 instructions as FUTURECyrill Gorcunov1-7/+7
2011-06-26insns: A few more AVX2 instructionsCyrill Gorcunov1-2/+6
2011-06-26insns: Add VPERMD instructionCyrill Gorcunov1-0/+1
2011-06-26insns: Allow MOVD xmmreg,rm32 to be used in 32bit modeCyrill Gorcunov1-8/+4
2011-06-25insns: Mark VGATHERDPD as AVX2 instructionsCyrill Gorcunov1-4/+4
2011-06-22Implement the VGATHERP instructionH. Peter Anvin1-0/+5
2011-03-12Merge branch 'nasm-2.09.xx'Cyrill Gorcunov1-2/+2
2011-03-07BR3189064: Fixes for VEXTRACTF128, VMASKMOVPSCyrill Gorcunov1-2/+2
2011-02-23Merge branch 'nasm-2.09.xx'Cyrill Gorcunov1-0/+1
2011-02-23insns: VLDQQU is backCyrill Gorcunov1-0/+1
2011-02-21Merge branch 'nasm-2.09.xx'Cyrill Gorcunov1-1/+1
2011-02-21BR 3187743: insns.dat -- Rename VLDQQU to VLDDQUCyrill Gorcunov1-1/+1
2011-02-20Delete invalid form of VPEXTRWCyrill Gorcunov1-1/+0
2011-02-14insns.dat: Remove vpextrw merge rudimentCyrill Gorcunov1-1/+0
2011-02-14Merge branch 'nasm-2.09.xx'Cyrill Gorcunov1-2/+3
2011-02-14BR3174983: insns.dat -- Fix arguments encodong for VPEXTRWCyrill Gorcunov1-2/+2
2010-12-23BR 3143040: Remove invalid form of VPEXTRWH. Peter Anvin1-1/+0
2010-11-23Merge branch 'insns'Cyrill Gorcunov1-69/+63
2010-11-23insns: Fixup MOV[APS|UPS] for xmmrm casesCyrill Gorcunov1-2/+2
2010-11-23insns: Implement size bits on KATMAICyrill Gorcunov1-69/+63
2010-08-24BR 3052618: handle segment register operations in 64-bit modeH. Peter Anvin1-4/+10
2010-08-24Optimize mov r64,immH. Peter Anvin1-0/+2
2010-08-16insns.dat: permit contracted forms for VBLENDVPH. Peter Anvin1-4/+4
2010-08-16insns.dat: fix encoding of VCVTSD2SSH. Peter Anvin1-1/+1
2010-08-16insns.dat: SSE encoding of VBLEND with VEX prefix is forbiddenH. Peter Anvin1-4/+0
2010-08-16insns.dat: updates from AVX v7H. Peter Anvin1-184/+235
2010-08-02insns.dat: unbreak test/imm64.binH. Peter Anvin1-1/+1
2010-07-07insns: add FXSAVE64/FXRSTOR64, drop np prefixH. Peter Anvin1-7/+9
2010-07-07Merge branch 'master' of ssh://repo.or.cz/srv/git/nasmH. Peter Anvin1-14/+26
2010-07-07insns.dat: add XSAVE/XRSTOR64, XSAVEOPT, VCVTPH2PS/VCVTPS2PHH. Peter Anvin1-14/+26
2010-07-06insns.dat: remove VCVTPH2PS/VCVTPS2PH as AMD instructionsH. Peter Anvin1-10/+2
2010-07-06insns.dat: fix CPU flags for new instructionsH. Peter Anvin1-9/+9
2010-07-06Add RD*SBASE, WR*SBASE, RDRAND from AVX v7H. Peter Anvin1-0/+11
2010-06-25BR 3020760: insns.dat -- confirm push imm32 on x86-64 explicitlyCyrill Gorcunov1-0/+1
2010-06-18BR 3018233: handle LFS, LGS and LSS with a 64-bit registerH. Peter Anvin1-1/+4
2010-03-25BR2975768: Update AMD LWP instructions to match upcoming changesCyrill Gorcunov1-8/+9
2010-01-06insns.dat: in 64-bit mode, accept "monitor rax,ecx,edx".H. Peter Anvin1-0/+1
2010-01-03BR2924380: Add AMD LWP instructionsCyrill Gorcunov1-0/+20
2010-01-03BR2924383: fix XOP instructionsCyrill Gorcunov1-4/+10
2010-01-03BR2924583: fix FMA4 instructionsCyrill Gorcunov1-2/+2
2009-12-16insns.dat: Restore default size of memory operandsCyrill Gorcunov1-22/+22
2009-12-03insns.dat: AVX -- no need for IF_ARx in templateCyrill Gorcunov1-12/+12
2009-11-09insns.dat: remove non-DREX SSE5 instructionsH. Peter Anvin1-31/+0
2009-11-09SSE5: remove all DREX-based instructionsH. Peter Anvin1-275/+1
2009-11-06MOVD xmmreg: not valid with REX.WH. Peter Anvin1-4/+4
2009-11-03IMUL: sbyteX fix -- last oneCyrill Gorcunov1-3/+3
2009-11-03IMUL: fix an additional incorrect sbyte useH. Peter Anvin1-1/+1
2009-11-03BR 2887108: fix incorrect sbyte usage in IMULH. Peter Anvin1-2/+2
2009-08-07insns.dat -- convert FMA instructionsCyrill Gorcunov1-192/+192
2009-08-07insns.dat -- convert AVX instructions part2Cyrill Gorcunov1-347/+347