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2012-02-25Assume the undocumented CMPXCHG486 opcode was lockableH. Peter Anvin1-3/+3
2012-02-26insns.dat: Add IF_LOCK flag on appropriate instructionsCyrill Gorcunov1-154/+154
2012-02-25Clean up JMP/CALL patterns, especially for 64 bitsH. Peter Anvin1-8/+11
2012-02-26insns.dat: Add nohle for MOV in case of moffset destinationCyrill Gorcunov1-4/+4
2012-02-25insns.dat: Add hlexr flag for MOV instructionCyrill Gorcunov1-12/+12
2012-02-25insns.dat: Add hlenl flag for XCHG instructionCyrill Gorcunov1-8/+8
2012-02-25insns.dat: Add hle flag for XADD instructionCyrill Gorcunov1-4/+4
2012-02-25insns.dat: Add hle flag for XOR instructionCyrill Gorcunov1-14/+14
2012-02-25insns.dat: Add hle flag for SUB instructionCyrill Gorcunov1-14/+14
2012-02-25insns.dat: Add hle flag for SBB instructionCyrill Gorcunov1-14/+14
2012-02-25insns.dat: Add hle flag for OR instructionCyrill Gorcunov1-14/+14
2012-02-25insns.dat: Add hle flag for NOT instructionCyrill Gorcunov1-4/+4
2012-02-25insns.dat: Add hle flag for NEG instructionCyrill Gorcunov1-4/+4
2012-02-25insns.dat: Add hle flag for INC instructionCyrill Gorcunov1-4/+4
2012-02-25insns.dat: Add hle flag for DEC instructionCyrill Gorcunov1-4/+4
2012-02-25insns.dat: Add hle flag for CMPXCHG16B instructionCyrill Gorcunov1-1/+1
2012-02-25insns.dat: Add hle flag for CMPXCHG8B instructionCyrill Gorcunov1-1/+1
2012-02-25insns.dat: Add hle flag for CMPXCHG instructionCyrill Gorcunov1-4/+4
2012-02-25insns.dat: Add hle flag for BTS instructionCyrill Gorcunov1-6/+6
2012-02-25insns.dat: Add hle flag for BTR instructionCyrill Gorcunov1-6/+6
2012-02-25insns.dat: Add hle flag for BTC instructionCyrill Gorcunov1-6/+6
2012-02-25insns.dat: Add hle flag for AND instructionCyrill Gorcunov1-14/+14
2012-02-25insns.dat: Add hle flag for ADC instructionCyrill Gorcunov1-14/+14
2012-02-25insns.dat: Add hle flag for ADD instructionCyrill Gorcunov1-14/+14
2012-02-25Remove all remaining explicit bytecodes from insns.datH. Peter Anvin1-41/+41
2012-02-10insns: create a symbolic "wait" token for the \341 byte codeH. Peter Anvin1-10/+10
2012-02-10insns: fix IMUL patterns to get rid of open-coded \100 bytecodesH. Peter Anvin1-12/+12
2012-02-09insns: correct the TSX opcodesH. Peter Anvin1-6/+9
2012-02-09insns: Add AVX2 transactional synchronization extensionsCyrill Gorcunov1-0/+8
2012-02-09insns: replace open-coded \322 opcode with odf (operand default)H. Peter Anvin1-22/+22
2011-12-21BR 3463230: Add VMFUNC instructionH. Peter Anvin1-0/+1
2011-12-17insns: Fix up sizes for MOVSD and VMOVSS instructionsCyrill Gorcunov1-4/+4
2011-11-20BR3392199: Revert "insns: Add MOVD as aliases to MOVQ for compatibility with ...Cyrill Gorcunov1-11/+0
2011-11-15insns.dat: Fix VPCMPEQQ templateCyrill Gorcunov1-1/+1
2011-11-12BR3392195: insns: Drop MMX flag from MOVDCyrill Gorcunov1-2/+2
2011-11-11insns: Fix typos for vcmpeq aliasesCyrill Gorcunov1-6/+6
2011-10-02insns: Add MOVD as aliases to MOVQ for compatibility with AMDCyrill Gorcunov1-0/+11
2011-08-31insns.dat: Fixup VGATHERx instructionsCyrill Gorcunov1-8/+8
2011-08-23insns, avx2: A couple of upper-case to lower-case conversionCyrill Gorcunov1-3/+3
2011-08-23insns, avx2: A typo in VPERMPDCyrill Gorcunov1-1/+1
2011-08-22BR3385573: Some AVX2 instructions fixupsCyrill Gorcunov1-9/+9
2011-08-03insns: Change VPERMPQ to VPERMQCyrill Gorcunov1-1/+1
2011-07-20Implement insns.dat in human readable formAnonymous1-1998/+1998
2011-07-20insns: A final pile of AVX2 instructionsCyrill Gorcunov1-5/+45
2011-07-19insns: A few additional AVX2 templatesCyrill Gorcunov1-3/+34
2011-07-18insns: One more small snippet of AVX2Cyrill Gorcunov1-0/+12
2011-07-18insns: One more slab of AVX2 instructionsCyrill Gorcunov1-1/+22
2011-07-17insns: Add a slab of AVX2 instructionsCyrill Gorcunov1-2/+76
2011-07-17insns.dat: Move exsiting AVX2 insns to a separate sectionCyrill Gorcunov1-13/+17
2011-07-08A few more AVX2 spec instructionsH. Peter Anvin1-0/+8
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