summaryrefslogtreecommitdiff
path: root/disasm.c
AgeCommit message (Expand)AuthorFilesLines
2014-05-05ndisasm: Match vector length with EVEX.b setJin Kyu Song1-3/+11
2013-11-27disasm: Don't rely on iflag_cmp() returning +/-1H. Peter Anvin1-1/+2
2013-11-24iflag: Start using new instruction flags engineCyrill Gorcunov1-14/+14
2013-11-20disp8: Consolidate a logic to get compressed displacementJin Kyu Song1-70/+1
2013-11-20disasm: Add suport for bnd registersJin Kyu Song1-0/+7
2013-11-20disasm: Add EVEX decorator syntaxJin Kyu Song1-9/+92
2013-11-20disasm: Add ZMM vsibJin Kyu Song1-4/+12
2013-11-20disasm: Support EVEX compressed displacementJin Kyu Song1-11/+107
2013-11-20disasm: Add basic AVX512 supportJin Kyu Song1-4/+93
2013-11-20disasm: style cleanupJin Kyu Song1-682/+682
2013-11-20MPX: Move BND prefix indication from bytecode to iflagsJin Kyu Song1-6/+1
2013-11-20MPX: Add BND prefix for branch instructionsJin Kyu Song1-0/+5
2013-11-20disasm: add support for emitting split EA formatH. Peter Anvin1-2/+15
2013-08-28AVX-512: Change the data type for instruction flagsJin Kyu Song1-2/+2
2013-08-22AVX-512: Add ZWORD keywordJin Kyu Song1-0/+3
2013-08-16AVX-512: Add EVEX encoding and new instructionsJin Kyu Song1-0/+6
2013-03-10Make F2 and F3 SSE prefixes override 66Ben Rudiak-Gould1-12/+0
2013-03-04Drop SAME_AS flag from instruction matcherBen Rudiak-Gould1-8/+2
2013-03-03insns: Remove pushseg/popseg internal bytecodesBen Rudiak-Gould1-43/+32
2013-03-01Remove +sBen Rudiak-Gould1-40/+5
2013-02-20Fix jmp/call near offsets in long modeBen Rudiak-Gould1-15/+14
2013-02-20Add np and similar prefixes to instructions that should have themBen Rudiak-Gould1-0/+5
2012-02-25HLE: Move byte codes back to \271-\273H. Peter Anvin1-3/+3
2012-02-25HLE: Change NOHLE to be an instruction flagH. Peter Anvin1-3/+0
2012-02-25disasm: ignore opcodes 370 and 371H. Peter Anvin1-1/+5
2012-02-25Move HLE byte codes to \264..\267H. Peter Anvin1-24/+24
2012-02-25Add a "nohle" byte code to skip an instruction patternH. Peter Anvin1-21/+24
2012-02-24HLE: Implement the basic mechanism for XACQUIRE/XRELEASEH. Peter Anvin1-0/+21
2012-02-24HLE: Split the LOCK and REP prefix slotsH. Peter Anvin1-4/+4
2011-08-22disasm.c: ESP/RSP cannot be indicies, but XMM4/YMM4 can beH. Peter Anvin1-3/+3
2011-07-07Use a normal quad-case for valueless /is4H. Peter Anvin1-4/+3
2011-07-07Remove support for DREX encodingH. Peter Anvin1-42/+3
2011-06-22Add support for VSIB instructionsH. Peter Anvin1-5/+27
2010-09-12BR3064376: ndisasm crashCyrill Gorcunov1-1/+1
2010-08-19ndisasm: handle VEX.LIGH. Peter Anvin1-1/+1
2010-08-19ndisasm: unify VEX handlingH. Peter Anvin1-34/+6
2010-08-16ndisasm: fix handing of byte codes 250-253, 324H. Peter Anvin1-2/+12
2010-08-16assemble: handle vex.ligH. Peter Anvin1-5/+7
2009-10-18continue using is_class helperCyrill Gorcunov1-2/+2
2009-10-13opflags: more int32_t -> opflags_t conversionsH. Peter Anvin1-1/+1
2009-08-09disasm.c: eatbyte -- use snprintf to prevent potential buffer overflowCyrill Gorcunov1-1/+1
2009-07-06NASM: relicense under the 2-clause BSD licenseH. Peter Anvin1-12/+0
2009-06-28Add copyright headers to the *.c/*.h files in the main directoryH. Peter Anvin1-6/+45
2009-06-26ndisasm: fix disassembly of JRCXZH. Peter Anvin1-1/+1
2009-06-24Add support for instructions which always use low 8-bit registersH. Peter Anvin1-2/+6
2009-05-08Add symbolic constants for REX_V "classes" (VEX, XOP, ...)H. Peter Anvin1-4/+4
2009-05-03Use lower case for VEX and XOP in instructions tableH. Peter Anvin1-2/+2
2009-05-03Infrastructure support for AMD's new XOP prefixH. Peter Anvin1-1/+24
2009-03-19disasm: fix reversed REP vs REPNE in eatbyte()H. Peter Anvin1-2/+2
2009-03-18disasm: when no instruction is found, consider a naked prefixH. Peter Anvin1-2/+80