| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2011-08-22 | disasm.c: ESP/RSP cannot be indicies, but XMM4/YMM4 can be | H. Peter Anvin | 1 | -3/+3 |
| 2011-07-07 | Use a normal quad-case for valueless /is4 | H. Peter Anvin | 1 | -4/+3 |
| 2011-07-07 | Remove support for DREX encoding | H. Peter Anvin | 1 | -42/+3 |
| 2011-06-22 | Add support for VSIB instructions | H. Peter Anvin | 1 | -5/+27 |
| 2010-09-12 | BR3064376: ndisasm crash | Cyrill Gorcunov | 1 | -1/+1 |
| 2010-08-19 | ndisasm: handle VEX.LIG | H. Peter Anvin | 1 | -1/+1 |
| 2010-08-19 | ndisasm: unify VEX handling | H. Peter Anvin | 1 | -34/+6 |
| 2010-08-16 | ndisasm: fix handing of byte codes 250-253, 324 | H. Peter Anvin | 1 | -2/+12 |
| 2010-08-16 | assemble: handle vex.lig | H. Peter Anvin | 1 | -5/+7 |
| 2009-10-18 | continue using is_class helper | Cyrill Gorcunov | 1 | -2/+2 |
| 2009-10-13 | opflags: more int32_t -> opflags_t conversions | H. Peter Anvin | 1 | -1/+1 |
| 2009-08-09 | disasm.c: eatbyte -- use snprintf to prevent potential buffer overflow | Cyrill Gorcunov | 1 | -1/+1 |
| 2009-07-06 | NASM: relicense under the 2-clause BSD license | H. Peter Anvin | 1 | -12/+0 |
| 2009-06-28 | Add copyright headers to the *.c/*.h files in the main directory | H. Peter Anvin | 1 | -6/+45 |
| 2009-06-26 | ndisasm: fix disassembly of JRCXZ | H. Peter Anvin | 1 | -1/+1 |
| 2009-06-24 | Add support for instructions which always use low 8-bit registers | H. Peter Anvin | 1 | -2/+6 |
| 2009-05-08 | Add symbolic constants for REX_V "classes" (VEX, XOP, ...) | H. Peter Anvin | 1 | -4/+4 |
| 2009-05-03 | Use lower case for VEX and XOP in instructions table | H. Peter Anvin | 1 | -2/+2 |
| 2009-05-03 | Infrastructure support for AMD's new XOP prefix | H. Peter Anvin | 1 | -1/+24 |
| 2009-03-19 | disasm: fix reversed REP vs REPNE in eatbyte() | H. Peter Anvin | 1 | -2/+2 |
| 2009-03-18 | disasm: when no instruction is found, consider a naked prefix | H. Peter Anvin | 1 | -2/+80 |
| 2009-02-21 | BR 2592476: Treat WAIT as a prefix even though it's really an instruction | H. Peter Anvin | 1 | -35/+20 |
| 2008-10-25 | disasm: introduce opy | H. Peter Anvin | 1 | -3/+4 |
| 2008-10-23 | disasm: extension byte support in the disassembler | H. Peter Anvin | 1 | -12/+20 |
| 2008-10-23 | Add extension bytecodes to support operands 4+ | H. Peter Anvin | 1 | -0/+1 |
| 2008-10-09 | disasm: collapse all the segment register push/pop bytecodes | H. Peter Anvin | 1 | -59/+2 |
| 2008-10-08 | Reshuffle and move the bytecodes for segment register push/pop | H. Peter Anvin | 1 | -61/+61 |
| 2008-10-07 | New opcode for 32->64 bit sign-extended immediate with warning | H. Peter Anvin | 1 | -0/+1 |
| 2008-10-06 | New opcodes to deal with 8-bit immediate sign extended to opsize | H. Peter Anvin | 1 | -0/+1 |
| 2008-08-28 | BR 2029829: Accept VIA XCRYPT instructions with or without REP | H. Peter Anvin | 1 | -0/+4 |
| 2008-08-20 | BR 2062342: ndisasm: r12 *can* be an index register | H. Peter Anvin | 1 | -2/+2 |
| 2008-07-30 | BR 2028910: fix decoding of VEX prefixes in 16- and 32-bit mode | H. Peter Anvin | 1 | -16/+17 |
| 2008-05-26 | ndisasm: the high bit of is4 bytes is ignored in 32-bit mode | H. Peter Anvin | 1 | -3/+4 |
| 2008-05-22 | Add tokens vex.ww and vex.wx; vex.wx is the default | H. Peter Anvin | 1 | -2/+6 |
| 2008-05-21 | insnsn.c: cleaner to *not* separate out conditional instructions | H. Peter Anvin | 1 | -5/+4 |
| 2008-05-21 | Disassembler: select table based on VEX prefixes | H. Peter Anvin | 1 | -1/+14 |
| 2008-05-21 | Fix display for fixed xmm0/ymm0, SSE redundant prefixes | H. Peter Anvin | 1 | -0/+7 |
| 2008-05-20 | VEX prefixes apply to VEX instructions only... | H. Peter Anvin | 1 | -0/+6 |
| 2008-05-20 | Handle is4 bytes without meaningful information in the bottom bits | H. Peter Anvin | 1 | -0/+10 |
| 2008-05-20 | ndisasm: simple compare for conditional opcodes, no loop | H. Peter Anvin | 1 | -12/+9 |
| 2008-05-20 | Avoid #including .c files; instead compile as separate units | H. Peter Anvin | 1 | -46/+40 |
| 2008-05-20 | Add DY, YWORD, and the SY instruction flag | H. Peter Anvin | 1 | -0/+3 |
| 2008-05-20 | Same some space by introducing shorthand byte codes for SSE prefixes | H. Peter Anvin | 1 | -0/+20 |
| 2008-05-12 | Remove special hacks to avoid zero bytecodes | H. Peter Anvin | 1 | -5/+0 |
| 2008-05-06 | Add support for register-number immediates with fixed 4-bit values | H. Peter Anvin | 1 | -0/+13 |
| 2008-05-05 | Initial NDISASM support for AVX instructions/VEX prefixes | H. Peter Anvin | 1 | -9/+121 |
| 2008-05-04 | First cut at AVX machinery. | H. Peter Anvin | 1 | -0/+10 |
| 2008-01-02 | disasm: relative operands are signed, not unsigned | H. Peter Anvin | 1 | -4/+7 |
| 2007-12-29 | regularized spelling of license to match name of LICENSE file | Beroset | 1 | -1/+1 |
| 2007-12-26 | disasm: 32-bit index registers were displayed as 64 bits | H. Peter Anvin | 1 | -1/+1 |
