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2013-11-28Add {vex3} and {vex2} prefixes by analogy with {evex}H. Peter Anvin1-6/+34
2013-11-27iflags: Add IF_EVEX for checking {evex} availabilityJin Kyu Song1-3/+10
2013-11-27opflags: Separate vector registers into low-16 and high-16Jin Kyu Song1-4/+0
2013-11-24iflag: Start using new instruction flags engineCyrill Gorcunov1-28/+27
2013-11-22bnd: Drop bnd prefix for relaxed short jmp instructionsJin Kyu Song1-1/+12
2013-11-20disp8: Consolidate a logic to get compressed displacementJin Kyu Song1-83/+2
2013-11-20match: Check the number of elements in broadcasting operandsJin Kyu Song1-1/+20
2013-11-20match: Improve broadcast opsize matchingJin Kyu Song1-20/+35
2013-11-20AVX-512: Add {evex} instruction prefixJin Kyu Song1-0/+7
2013-11-20MPX: Move BND prefix indication from bytecode to iflagsJin Kyu Song1-3/+3
2013-11-20MPX: Adapt GAS's mib syntax with an index reg onlyJin Kyu Song1-0/+12
2013-11-20MPX: Add BND prefix for branch instructionsJin Kyu Song1-2/+11
2013-11-20MPX: Add MPX instructionsJin Kyu Song1-1/+22
2013-11-08Add (redundant) parentheses around bit tests mixed with &&H. Peter Anvin1-3/+3
2013-11-08REX: Set REX bits in accordance with 32-register environmentJin Kyu Song1-7/+7
2013-09-21AVX-512: Fix bugs related to uninitialized variablesJin Kyu Song1-1/+3
2013-09-14AVX-512: Add AVX-512ER instructionsJin Kyu Song1-1/+1
2013-09-07AVX-512: Fix rounding mode value in EVEX prefix with SAEJin Kyu Song1-6/+9
2013-08-29AVX-512: Fix bug in checking high-16 registersJin Kyu Song1-1/+1
2013-08-29AVX-512: Remember the position of operand with broadcast or embedded roundingJin Kyu Song1-16/+8
2013-08-28AVX-512: Fix match function to check the range of registersJin Kyu Song1-0/+8
2013-08-28AVX-512: Change the data type for instruction flagsJin Kyu Song1-3/+3
2013-08-28AVX-512: Fix a bug in calculating Disp8*N valueJin Kyu Song1-1/+1
2013-08-28AVX-512: Find the correct position of the last SIMD opJin Kyu Song1-0/+2
2013-08-22AVX-512: Add ZWORD keywordJin Kyu Song1-0/+2
2013-08-22AVX-512: Fix instruction match functionJin Kyu Song1-4/+31
2013-08-16AVX-512: Add EVEX encoding and new instructionsJin Kyu Song1-41/+285
2013-04-01Fixed several resource and memory leaksPhilipp Kloke1-0/+1
2013-03-10Make F2 and F3 SSE prefixes override 66Ben Rudiak-Gould1-10/+1
2013-03-04Drop SAME_AS flag from instruction matcherBen Rudiak-Gould1-17/+4
2013-03-03insns: Remove pushseg/popseg internal bytecodesBen Rudiak-Gould1-50/+0
2013-03-03Move conditional opcodes close to enum ccode definitionCyrill Gorcunov1-6/+1
2013-03-02assemble: Make emit_rex being a functionCyrill Gorcunov1-8/+14
2013-03-02assemble: Use case3/4 where appropriateCyrill Gorcunov1-16/+5
2013-03-02assemble: Add case3 helperCyrill Gorcunov1-1/+2
2013-03-02process_ea: Drop redundant variableCyrill Gorcunov1-5/+1
2013-03-01Remove +sBen Rudiak-Gould1-181/+29
2013-02-20Add np and similar prefixes to instructions that should have themBen Rudiak-Gould1-0/+8
2012-09-10opflags: Extend opflags_t to 64 bitsCyrill Gorcunov1-3/+4
2012-02-25HLE: One more byte code conversionH. Peter Anvin1-3/+3
2012-02-25HLE: Move byte codes back to \271-\273H. Peter Anvin1-10/+9
2012-02-25HLE: Change NOHLE to be an instruction flagH. Peter Anvin1-7/+12
2012-02-25Make the LOCK and HLE warnings suppressable.H. Peter Anvin1-3/+3
2012-02-25Remove all remaining explicit bytecodes from insns.datH. Peter Anvin1-6/+5
2012-02-25Add support for warning on invalid LOCK prefixesH. Peter Anvin1-13/+26
2012-02-25Move HLE byte codes to \264..\267H. Peter Anvin1-19/+19
2012-02-25Add a "nohle" byte code to skip an instruction patternH. Peter Anvin1-9/+19
2012-02-24HLE: Implement the basic mechanism for XACQUIRE/XRELEASEH. Peter Anvin1-1/+50
2012-02-24HLE: Split the LOCK and REP prefix slotsH. Peter Anvin1-5/+5
2011-11-12BR3392198: Fix compilation warning on prefixesCyrill Gorcunov1-1/+1
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