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Change-Id: I7c90daba4c08d44669cd4ce0e111dbf19563f1b4
Signed-off-by: Philippe Coval <philippe.coval@open.eurogiciel.org>
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Change-Id: I9a4efc6da08e2dadfb0615fd4e703da04a2922a9
Signed-off-by: Philippe Coval <philippe.coval@open.eurogiciel.org>
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Change-Id: I7298c87a555157f173f56cbd044f29809bfad6e2
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Change-Id: I9e8a1ba87239bca6505fe37e70ca2c3607a012a1
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Change-Id: I0f62fb2bd3f696e6b79ea1a58117fe81ed4e84d7
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Change-Id: Id5d0f3b9482dce77a640467ec475b5841dc23e41
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Document changes for 2.11.05.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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The fix for BR 3392278:
aa29b1d93f5a assemble.c: Don't drop rex prefix from instruction itself
... would cause multiple REX prefixes to be emitted for some
instructions. Create a new flag to indicate that REX has already been
emitted, which can be cleared for each instance of an instruction.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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It's been requested a long ago to handle '--v' option same was as
a regualar '-v'. From initial report
| NASM and yasm are in many respects compatible but yasm uses --v
| instead of -v for version. As often --v is used for version I
| end up using --v initially in NASM. This patch allows me to compile
| Mozilla apps which use yasm with NASM by merely renaming NASM to yasm
| so that the build environment does not have to be updated (Mozilla
| would not accept changes to allow use of NASM).
Reported-by: Andy Willis <abwillis1@gmail.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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- Removed an error checking code for setting evex flags
- Fixed vector length matching bug
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
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With broadcasting, EVEX.L'L should be matched even when EVEX.b is set.
Only in a case of embedded rounding, EVEX.L'L is ignored in matching
function since it becomes EVEX.RC.
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
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An offset-only memref can also have an opmask decorator.
e.g.) vmovdqu32 [0xabcd]{k1}, zmm0
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
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Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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emit_rex is supposed to write REX prefix into output stream
if needed, but we happen to drop it off on a first write
which breaks REX required instructions if TIMES directive
is used.
For example the code like
| times 4 movq xmm11, xmm11
compiles into
| 0000000000000000 <.text>:
| 0: f3 45 0f 7e db movq %xmm11,%xmm11
| 5: f3 0f 7e db movq %xmm3,%xmm3
| 9: f3 0f 7e db movq %xmm3,%xmm3
| d: f3 0f 7e db movq %xmm3,%xmm3
instead of proper
| 0000000000000000 <.text>:
| 0: f3 45 0f 7e db movq %xmm11,%xmm11
| 5: f3 45 0f 7e db movq %xmm11,%xmm11
| a: f3 45 0f 7e db movq %xmm11,%xmm11
| f: f3 45 0f 7e db movq %xmm11,%xmm11
http://bugzilla.nasm.us/show_bug.cgi?id=3392278
Reported-by: Javier <elpochodelagente@gmail.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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Add the CLFLUSHOPT instruction from the Intel Instruction Set
Architecture Extensions document version 319433-018 (Feb 2014).
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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Add the XSAVEC, XSAVES, and XRSTORS instructions from the Intel SDM
release 253665-050US (Feb 2014).
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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If someone specifies "section align" without =value, error out.
Reported-by: Ilya Albrekht <ilya.albrekht@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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BR 3392275 complains about xmm0 having to be explicitly included in
the assembly syntax when it is implicit in the encoding. In the
interest of "be liberal in what you accept", accept either form in the
input.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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Elf align section attribute requires syntax "align=value",
but in case if '=' is missed we pass nil pointer into
atoi function which cause libc to crash.
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
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Add DEFAULT BND/NOBND to the change history, and explain the use case.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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Document that [nosplit reg] as opposed to [nosplit reg*1] will no
longer force an index register.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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[nosplit eax] has been encoded as [eax*1+0] since 0.98.34.
But this seems like unexpected behavior.
So only when a register is multiplied, that will be treated
as an index. ([nosplit eax*1] -> [eax*1+0])
Document is updated accordingly.
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
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Cleaned up unneccessary size specifiers in the instruction data.
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
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[nosplit eax+eax] was encoded [eax*2] previously but
this seems against the user's intention.
So in this case, nosplit is ignored now and [eax+eax] will be
generated.
Document is also updated accordingly.
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
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Using RIP relative for mib operands causes #UD exception.
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
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Otherwise disassembler treat syscall, sysret incorrectly.
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
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In mib operands, users' intention should be preserved.
e.g.) [eax + eax*1] and [eax*2] must be distinguished and encoded differently.
So a new EA flag EAF_MIB for mib operands is added.
And a new EA hint EAH_SUMMED for the case of [eax+eax*4] being parsed
as [eax*5] is also added.
NOSPLIT specifier does not have an effect in mib, so [nosplit eax + eax*1]
will be encoded as [eax, eax] rather than [eax*2] as in a regular EA.
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
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asciidoc/xmlto are not tools we require every users to have, so each
tarball should contain them. That means the release script needs to
know about them.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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It's sad but not all compilers support c99 features, so drop
off IFLAG_INIT helper.
Reported-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
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Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
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Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
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Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
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Added bnd warning and nobnd prefix. DEFAULT directive section
has got more description about BND-related settings.
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
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bnd and nobnd prifixes can be used for each instruction line to
direct whether bnd registers should be preserved or not.
And those are also added as options for DEFAULT directive.
Once bnd is set with default, DEFAULT BND, all bnd-prefix
available instructions are prefixed with bnd. To override it,
nobnd prefix can be used.
In the other way, DEFAULT NOBND can disable DEFAULT BND and
have nasm encode in the normal way.
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
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When bnd prefix is dropped as jmp is encoded as jmp short,
nasm shows a warning message, which can be suppressed with a new
command line option, -w-bnd.
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
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In ndisasm, the priority follows the order of instructions in insns.dat.
Other iflags could affect this mechanism when a proper instruction form
had a higher iflag bit set.
The preferred mask bits are now limited to vendor flags (Cyrix and AMD)
and other flags do not affect disassembler any more.
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
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Clean up the text about what a mib is.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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- We don't need to list internal infrastructure improvements.
- We don't list rc releases separately.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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Allow specifying {vex3} or {vex2} (the latter is currently always
redundant, unless we end up with instructions at some point can be
specified with legacy prefixes or VEX) to select a specific encoding
of VEX-encoded instructions.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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The "high 16" register class macros were actually incorrect, as they
simply aliased the corresponding whole set class. In oder to keep
someone from getting confused and making mistakes, remove them.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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