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authorJin Kyu Song <jin.kyu.song@intel.com>2013-11-08 11:41:12 -0800
committerJin Kyu Song <jin.kyu.song@intel.com>2013-11-20 11:29:42 -0800
commit3b65323d800a04570e4364f9419d518a16bb9512 (patch)
treefe94825d5d2b610e8a6640b0832f3b850366d43f /test
parent47e7389fdfd446cf9ff6f8a7535346b93fd3e586 (diff)
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MPX: Adapt GAS's mib syntax with an index reg only
GAS uses *1 multiplier for explicitly marking an index register in mib operand. e.g.) [rdx * 1 + 3] is equivalent to [3, rdx] in NASM's split EA format So only for mib operands, this is encoded same as gas does. Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Diffstat (limited to 'test')
-rw-r--r--test/mpx-64.asm8
1 files changed, 4 insertions, 4 deletions
diff --git a/test/mpx-64.asm b/test/mpx-64.asm
index 50cc4da..bc5e7d4 100644
--- a/test/mpx-64.asm
+++ b/test/mpx-64.asm
@@ -81,16 +81,16 @@ BITS 64
bndstx [rax+0x3], bnd0, rbx ; ICC-1
bndstx [rax+0x3], rbx, bnd0 ; ICC-2
- ; GAS's confusing EA - rcx is base reg in NASM
- bndstx [rcx*1], bnd2
- ; next 4 lines should be parsed same
+ ; next 5 lines should be parsed same
bndstx [,rcx*1], bnd2 ; NASM
bndstx [0,rcx*1], bnd2 ; NASM
bndstx [0], bnd2, rcx ; ICC-1
bndstx [0], rcx, bnd2 ; ICC-2
+ bndstx [rcx*1], bnd2 ; GAS - rcx is encoded as index only when it is mib
- bndstx [1*r12+3], bnd2 ; GAS's confusing EA again
+ ; next 3 lines should be parsed same
bndstx [3,1*r12], bnd2 ; NASM
+ bndstx [1*r12+3], bnd2 ; GAS
bndstx [3], r12, bnd2 ; ICC
bndstx [r12+0x399], bnd3