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authorH. Peter Anvin <hpa@linux.intel.com>2013-07-19 17:06:08 -0700
committerH. Peter Anvin <hpa@linux.intel.com>2013-07-19 17:09:39 -0700
commite20ca02cfb728773c0344fc89bdc7ae4c01983c8 (patch)
treee88a637c2bc198d971d96b85f1dcdf5c57380530 /test
parent836492fbcf074a609434e8cf6ce7580fc6b319bc (diff)
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BR 3392260: Handle instructions only separated by vector SIB size
There are two instructions (VGATHERQPS, VPGATHERQD) where the only separation between two forms is the vector length given to the vector SIB. This means the *matcher* has to be able to distinguish instructions by vector SIB length and the matcher only operates on the operands and the instruction flags, not on the bytecode. Export the vector index-ness into the operand flags and add to the matcher. This resolves BR 3392260. Reported-by: Agner <agner@anger.org> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'test')
-rw-r--r--test/gather.asm11
1 files changed, 11 insertions, 0 deletions
diff --git a/test/gather.asm b/test/gather.asm
new file mode 100644
index 0000000..0303700
--- /dev/null
+++ b/test/gather.asm
@@ -0,0 +1,11 @@
+ bits 64
+
+ VGATHERQPS xmm1, [xmm0 + rsi], xmm2 ; OK
+ VGATHERQPS xmm1, [ymm0 + rsi], xmm2 ; fail: error: invalid effective address
+ VGATHERDPD ymm1, [xmm0 + rsi], ymm2 ; OK
+ VGATHERDPD xmm1, [xmm0 + rsi], xmm2 ; OK
+ VGATHERQPD xmm1, [xmm0 + rsi], xmm2 ; OK
+ VGATHERQPD ymm1, [ymm0 + rsi], ymm2 ; OK
+ VPGATHERQD xmm1, [xmm0 + rsi], xmm2 ; OK
+ VPGATHERQD xmm1, [ymm0 + rsi], xmm2 ; fail: error: invalid effective address
+ VPGATHERDQ ymm1, [xmm0 + rsi], ymm2 ; OK