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| author | H. Peter Anvin <hpa@linux.intel.com> | 2011-06-22 18:20:28 -0700 |
|---|---|---|
| committer | H. Peter Anvin <hpa@linux.intel.com> | 2011-06-22 18:20:28 -0700 |
| commit | 95adeabff5f9bf8faf9c4225002e2a8c949db330 (patch) | |
| tree | 6b0450ed99eb8c75b86c9138a61507988200551e /test/vgather.asm | |
| parent | 3089f7ef8a034ad57aac16489f76426fe3bcb8c4 (diff) | |
| download | nasm-95adeabff5f9bf8faf9c4225002e2a8c949db330.tar.gz nasm-95adeabff5f9bf8faf9c4225002e2a8c949db330.tar.bz2 nasm-95adeabff5f9bf8faf9c4225002e2a8c949db330.zip | |
Implement the VGATHERP instruction
As an initial test of the VSIB handling, implement the VGATHERP
instruction.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'test/vgather.asm')
| -rw-r--r-- | test/vgather.asm | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/test/vgather.asm b/test/vgather.asm new file mode 100644 index 0000000..4012bf2 --- /dev/null +++ b/test/vgather.asm @@ -0,0 +1,76 @@ + bits 64 + + vgatherdpd xmm0,[rcx+xmm2],xmm3 + vgatherqpd xmm0,[rcx+xmm2],xmm3 + vgatherdpd ymm0,[rcx+xmm2],ymm3 + vgatherqpd ymm0,[rcx+ymm2],ymm3 + + vgatherdpd xmm0,[rcx+xmm2*1],xmm3 + vgatherqpd xmm0,[rcx+xmm2*1],xmm3 + vgatherdpd ymm0,[rcx+xmm2*1],ymm3 + vgatherqpd ymm0,[rcx+ymm2*1],ymm3 + + vgatherdpd xmm0,[rcx+xmm2*2],xmm3 + vgatherqpd xmm0,[rcx+xmm2*2],xmm3 + vgatherdpd ymm0,[rcx+xmm2*2],ymm3 + vgatherqpd ymm0,[rcx+ymm2*2],ymm3 + + vgatherdpd xmm0,[rcx+xmm2*4],xmm3 + vgatherqpd xmm0,[rcx+xmm2*4],xmm3 + vgatherdpd ymm0,[rcx+xmm2*4],ymm3 + vgatherqpd ymm0,[rcx+ymm2*4],ymm3 + + vgatherdpd xmm0,[rcx+xmm2*8],xmm3 + vgatherqpd xmm0,[rcx+xmm2*8],xmm3 + vgatherdpd ymm0,[rcx+xmm2*8],ymm3 + vgatherqpd ymm0,[rcx+ymm2*8],ymm3 + + vgatherdpd xmm0,[xmm2],xmm3 + vgatherqpd xmm0,[xmm2],xmm3 + vgatherdpd ymm0,[xmm2],ymm3 + vgatherqpd ymm0,[ymm2],ymm3 + + vgatherdpd xmm0,[xmm2*1],xmm3 + vgatherqpd xmm0,[xmm2*1],xmm3 + vgatherdpd ymm0,[xmm2*1],ymm3 + vgatherqpd ymm0,[ymm2*1],ymm3 + + vgatherdpd xmm0,[xmm2*2],xmm3 + vgatherqpd xmm0,[xmm2*2],xmm3 + vgatherdpd ymm0,[xmm2*2],ymm3 + vgatherqpd ymm0,[ymm2*2],ymm3 + + vgatherdpd xmm0,[xmm2*4],xmm3 + vgatherqpd xmm0,[xmm2*4],xmm3 + vgatherdpd ymm0,[xmm2*4],ymm3 + vgatherqpd ymm0,[ymm2*4],ymm3 + + vgatherdpd xmm0,[xmm2*8],xmm3 + vgatherqpd xmm0,[xmm2*8],xmm3 + vgatherdpd ymm0,[xmm2*8],ymm3 + vgatherqpd ymm0,[ymm2*8],ymm3 + + vgatherdpd xmm0,[xmm2+rcx],xmm3 + vgatherqpd xmm0,[xmm2+rcx],xmm3 + vgatherdpd ymm0,[xmm2+rcx],ymm3 + vgatherqpd ymm0,[ymm2+rcx],ymm3 + + vgatherdpd xmm0,[xmm2*1+rcx],xmm3 + vgatherqpd xmm0,[xmm2*1+rcx],xmm3 + vgatherdpd ymm0,[xmm2*1+rcx],ymm3 + vgatherqpd ymm0,[ymm2*1+rcx],ymm3 + + vgatherdpd xmm0,[xmm2*2+rcx],xmm3 + vgatherqpd xmm0,[xmm2*2+rcx],xmm3 + vgatherdpd ymm0,[xmm2*2+rcx],ymm3 + vgatherqpd ymm0,[ymm2*2+rcx],ymm3 + + vgatherdpd xmm0,[xmm2*4+rcx],xmm3 + vgatherqpd xmm0,[xmm2*4+rcx],xmm3 + vgatherdpd ymm0,[xmm2*4+rcx],ymm3 + vgatherqpd ymm0,[ymm2*4+rcx],ymm3 + + vgatherdpd xmm0,[xmm2*8+rcx],xmm3 + vgatherqpd xmm0,[xmm2*8+rcx],xmm3 + vgatherdpd ymm0,[xmm2*8+rcx],ymm3 + vgatherqpd ymm0,[ymm2*8+rcx],ymm3 |