diff options
| author | H. Peter Anvin <hpa@linux.intel.com> | 2010-08-24 14:08:16 -0700 |
|---|---|---|
| committer | H. Peter Anvin <hpa@linux.intel.com> | 2010-08-24 14:08:16 -0700 |
| commit | 9df010725faff9c0bf4dccd3bc45f871293d5d64 (patch) | |
| tree | 755a351a77b629a5f397c1eddf627e2546e1e82b /test/imm64.asm | |
| parent | 47fb7bc088f4468053070795ac536d04c812b6df (diff) | |
| download | nasm-9df010725faff9c0bf4dccd3bc45f871293d5d64.tar.gz nasm-9df010725faff9c0bf4dccd3bc45f871293d5d64.tar.bz2 nasm-9df010725faff9c0bf4dccd3bc45f871293d5d64.zip | |
Optimize mov r64,imm
Handle immediate-size optimization for "mov r64,imm" -- reduce it to
"mov r32,imm32" or "mov r64,imm32" as appropriate.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'test/imm64.asm')
| -rw-r--r-- | test/imm64.asm | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/test/imm64.asm b/test/imm64.asm index d90a064..a114044 100644 --- a/test/imm64.asm +++ b/test/imm64.asm @@ -9,3 +9,53 @@ mov [rax],dword 11223344h ; 32-bit operation mov qword [rax],11223344h mov qword [rax],dword 11223344h + + mov rax,0_ffffffff_8899aabbh + mov rax,dword 0_ffffffff_8899aabbh + mov eax,0_ffffffff_8899aabbh + mov [rax],dword 0_ffffffff_8899aabbh ; 32-bit operation + mov qword [rax],0_ffffffff_8899aabbh + mov qword [rax],dword 0_ffffffff_8899aabbh + + mov rax,7fffffffh + mov rax,80000000h + mov rax,0_ffffffffh + mov rax,1_00000000h + mov rax,0_ffffffff_7fffffffh + mov rax,0_ffffffff_80000000h + + mov rax,0_11223344_8899aabbh + mov rax,dword 0_11223344_8899aabbh + mov eax,0_11223344_8899aabbh + mov [rax],dword 0_11223344_8899aabbh ; 32-bit operation + mov qword [rax],0_11223344_8899aabbh + mov qword [rax],dword 0_11223344_8899aabbh + + mov rax,strict 11223344h + mov rax,strict dword 11223344h + mov eax,strict 11223344h + mov [rax],strict dword 11223344h ; 32-bit operation + mov qword [rax],strict 11223344h + mov qword [rax],strict dword 11223344h + + mov rax,strict 0_ffffffff_8899aabbh + mov rax,strict dword 0_ffffffff_8899aabbh + mov eax,strict 0_ffffffff_8899aabbh + mov [rax],strict dword 0_ffffffff_8899aabbh ; 32-bit operation + mov qword [rax],strict 0_ffffffff_8899aabbh + mov qword [rax],strict dword 0_ffffffff_8899aabbh + + mov rax,strict 7fffffffh + mov rax,strict 80000000h + mov rax,strict 0_ffffffffh + mov rax,strict 1_00000000h + mov rax,strict 0_ffffffff_7fffffffh + mov rax,strict 0_ffffffff_80000000h + + mov rax,strict 0_11223344_8899aabbh + mov rax,strict dword 0_11223344_8899aabbh + mov eax,strict 0_11223344_8899aabbh + mov [rax],strict dword 0_11223344_8899aabbh ; 32-bit operation + mov qword [rax],strict 0_11223344_8899aabbh + mov qword [rax],strict dword 0_11223344_8899aabbh + |