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author | H. Peter Anvin <hpa@zytor.com> | 2007-08-29 15:19:19 +0000 |
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committer | H. Peter Anvin <hpa@zytor.com> | 2007-08-29 15:19:19 +0000 |
commit | 150e20db50a7d867e4af0f6147f6d517e5c83da8 (patch) | |
tree | 117bb3c09e2f6cff5c2ac105fe56b4ecc4633e46 /parser.c | |
parent | 99c4ecd18f2a58b969edf997da737ba6a76f1477 (diff) | |
download | nasm-150e20db50a7d867e4af0f6147f6d517e5c83da8.tar.gz nasm-150e20db50a7d867e4af0f6147f6d517e5c83da8.tar.bz2 nasm-150e20db50a7d867e4af0f6147f6d517e5c83da8.zip |
Suppress IP-relative only for fs: and gs: overrides
AMD has (undocumented) segment limits even in 64-bit mode, so people
may want to use cs/ds/es/ss overrides. Since there are no bases, however,
IP-relative still applies.
See:
http://www.amd.com.hk/us-en/assets/content_type/DownloadableAssets/dwamd_kernel_summit_08_RB.pdf
Diffstat (limited to 'parser.c')
-rw-r--r-- | parser.c | 5 |
1 files changed, 3 insertions, 2 deletions
@@ -515,7 +515,8 @@ insn *parse_line(int pass, char *buffer, insn * result, "instruction has more than %d prefixes", MAXPREFIX); else { result->prefixes[result->nprefix++] = value->type; - result->oprs[operand].eaflags |= EAF_SEGOVER; + if (REG_FSGS & ~reg_flags[value->type]) + result->oprs[operand].eaflags |= EAF_FSGS; } i = stdscan(NULL, &tokval); /* then skip the colon */ @@ -676,7 +677,7 @@ insn *parse_line(int pass, char *buffer, insn * result, int is_rel = globalbits == 64 && !(result->oprs[operand].eaflags & EAF_ABS) && ((globalrel && - !(result->oprs[operand].eaflags & EAF_SEGOVER)) || + !(result->oprs[operand].eaflags & EAF_FSGS)) || (result->oprs[operand].eaflags & EAF_REL)); result->oprs[operand].type |= is_rel ? IP_REL : MEM_OFFS; |