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author | H. Peter Anvin <hpa@zytor.com> | 2002-04-30 20:59:21 +0000 |
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committer | H. Peter Anvin <hpa@zytor.com> | 2002-04-30 20:59:21 +0000 |
commit | af535c16cf3f9f628384ec834e3aa325709cb37b (patch) | |
tree | c582b65fc34ae4e66aa559ebe901c76aefa05bd5 /insns.h | |
parent | 41bf8002b2fa402bd344a290fcc9f65de328859c (diff) | |
download | nasm-af535c16cf3f9f628384ec834e3aa325709cb37b.tar.gz nasm-af535c16cf3f9f628384ec834e3aa325709cb37b.tar.bz2 nasm-af535c16cf3f9f628384ec834e3aa325709cb37b.zip |
NASM 0.98.03
Diffstat (limited to 'insns.h')
-rw-r--r-- | insns.h | 2 |
1 files changed, 2 insertions, 0 deletions
@@ -63,6 +63,8 @@ struct itemplate { #define IF_3DNOW 0x00008000UL /* it's a 3DNow! instruction */ #define IF_SSE 0x00010000UL /* it's a SSE (KNI, MMX2) instruction */ #define IF_PMASK 0xFF000000UL /* the mask for processor types */ +#define IF_PLEVEL 0x0F000000UL /* the mask for processor instr. level */ + /* also the highest possible processor */ #define IF_PFMASK 0xF001FF00UL /* the mask for disassembly "prefer" */ #define IF_8086 0x00000000UL /* 8086 instruction */ #define IF_186 0x01000000UL /* 186+ instruction */ |