NASM 0.94

1 files changed, 15 insertions, 16 deletions

diff --git a/insns.h b/insns.h
index c42790d..7ae5df3 100644
--- a/insns.h
+++ b/insns.h
@@ -36,9 +36,8 @@ struct itemplate {
  *
  * IF_SB invokes Size Byte: operands with unspecified size in the
  * template are really bytes, and so no non-byte specification in
- * the input instruction will be tolerated.
- *
- * IF_SD similarly invokes Size Doubleword.
+ * the input instruction will be tolerated. IF_SW similarly invokes
+ * Size Word, and IF_SD invokes Size Doubleword.
  *
  * (The default state if neither IF_SM nor IF_SM2 is specified is
  * that any operand with unspecified size in the template is
@@ -48,19 +47,19 @@ struct itemplate {
 #define IF_SM     0x0001	       /* size match */
 #define IF_SM2    0x0002	       /* size match first two operands */
 #define IF_SB     0x0004	       /* unsized operands can't be non-byte */
-#define IF_SD     0x0008	       /* unsized operands can't be nondword */
+#define IF_SW     0x0008	       /* unsized operands can't be non-word */
+#define IF_SD     0x0010	       /* unsized operands can't be nondword */
 #define IF_8086   0x0000	       /* 8086 instruction */
-#define IF_186    0x0010	       /* 186+ instruction */
-#define IF_286    0x0020	       /* 286+ instruction */
-#define IF_386    0x0030	       /* 386+ instruction */
-#define IF_486    0x0040	       /* 486+ instruction */
-#define IF_PENT   0x0050	       /* Pentium instruction */
-#define IF_P6     0x0060	       /* P6 instruction */
-#define IF_PMASK  0x00F0	       /* the mask for processor types */
-#define IF_PRIV   0x0100	       /* it's a privileged instruction */
-#define IF_UNDOC  0x0200	       /* it's an undocumented instruction */
-#define IF_FPU    0x0400	       /* it's an FPU instruction */
-#define IF_MMX    0x0800	       /* it's an MMX instruction */
-#define IF_ND     0x1000	       /* ignore this in the disassembler */
+#define IF_186    0x0100	       /* 186+ instruction */
+#define IF_286    0x0200	       /* 286+ instruction */
+#define IF_386    0x0300	       /* 386+ instruction */
+#define IF_486    0x0400	       /* 486+ instruction */
+#define IF_PENT   0x0500	       /* Pentium instruction */
+#define IF_P6     0x0600	       /* P6 instruction */
+#define IF_PMASK  0x0F00	       /* the mask for processor types */
+#define IF_PRIV   0x1000	       /* it's a privileged instruction */
+#define IF_UNDOC  0x2000	       /* it's an undocumented instruction */
+#define IF_FPU    0x4000	       /* it's an FPU instruction */
+#define IF_MMX    0x8000	       /* it's an MMX instruction */
 
 #endif