diff options
| author | H. Peter Anvin <hpa@zytor.com> | 2002-04-30 21:00:33 +0000 |
|---|---|---|
| committer | H. Peter Anvin <hpa@zytor.com> | 2002-04-30 21:00:33 +0000 |
| commit | 1cd0e2d5bf50b2cc482cad7beb8f7dee6a81d57b (patch) | |
| tree | 53de3660be58d806d9de78394b44e95b9e80a55c /insns.h | |
| parent | af535c16cf3f9f628384ec834e3aa325709cb37b (diff) | |
| download | nasm-1cd0e2d5bf50b2cc482cad7beb8f7dee6a81d57b.tar.gz nasm-1cd0e2d5bf50b2cc482cad7beb8f7dee6a81d57b.tar.bz2 nasm-1cd0e2d5bf50b2cc482cad7beb8f7dee6a81d57b.zip | |
NASM 0.98.08
Diffstat (limited to 'insns.h')
| -rw-r--r-- | insns.h | 2 |
1 files changed, 2 insertions, 0 deletions
@@ -62,6 +62,7 @@ struct itemplate { #define IF_MMX 0x00004000UL /* it's an MMX instruction */ #define IF_3DNOW 0x00008000UL /* it's a 3DNow! instruction */ #define IF_SSE 0x00010000UL /* it's a SSE (KNI, MMX2) instruction */ +#define IF_SSE2 0x00020000UL /* it's a SSE2 instruction */ #define IF_PMASK 0xFF000000UL /* the mask for processor types */ #define IF_PLEVEL 0x0F000000UL /* the mask for processor instr. level */ /* also the highest possible processor */ @@ -74,6 +75,7 @@ struct itemplate { #define IF_PENT 0x05000000UL /* Pentium instruction */ #define IF_P6 0x06000000UL /* P6 instruction */ #define IF_KATMAI 0x07000000UL /* Katmai instructions */ +#define IF_WILLAMETTE 0x08000000UL /* Willamette instructions */ #define IF_CYRIX 0x10000000UL /* Cyrix-specific instruction */ #define IF_AMD 0x20000000UL /* AMD-specific instruction */ |