diff options
author | H. Peter Anvin <hpa@zytor.com> | 2008-04-04 13:34:53 -0700 |
---|---|---|
committer | H. Peter Anvin <hpa@zytor.com> | 2008-04-04 13:34:53 -0700 |
commit | 32cd4c2a62f34815dbc9c13e1e6640bb096d05b5 (patch) | |
tree | b102f98dbf7c28e18f114f944c006ab7499a2904 /insns.dat | |
parent | 5a7976c925e494bfd0db806c5f5724157236b4e3 (diff) | |
download | nasm-32cd4c2a62f34815dbc9c13e1e6640bb096d05b5.tar.gz nasm-32cd4c2a62f34815dbc9c13e1e6640bb096d05b5.tar.bz2 nasm-32cd4c2a62f34815dbc9c13e1e6640bb096d05b5.zip |
Correctly identify SBYTE in the optimizer
Correctly identify SBYTE in the optimizer, *HOWEVER*, this change will
cause nuisance warnings to be issued; that will have to be fixed.
Diffstat (limited to 'insns.dat')
-rw-r--r-- | insns.dat | 97 |
1 files changed, 48 insertions, 49 deletions
@@ -59,16 +59,16 @@ ADC rm16,imm8 \320\1\x83\202\15 8086 ADC rm32,imm8 \321\1\x83\202\15 386 ADC rm64,imm8 \324\1\x83\202\15 X64 ADC reg_al,imm \1\x14\21 8086,SM -ADC reg_ax,sbyte \320\1\x83\202\15 8086,SM,ND +ADC reg_ax,sbyte16 \320\1\x83\202\15 8086,SM,ND ADC reg_ax,imm \320\1\x15\31 8086,SM -ADC reg_eax,sbyte \321\1\x83\202\15 386,SM,ND +ADC reg_eax,sbyte32 \321\1\x83\202\15 386,SM,ND ADC reg_eax,imm \321\1\x15\41 386,SM -ADC reg_rax,sbyte \324\1\x83\202\15 X64,SM,ND +ADC reg_rax,sbyte64 \324\1\x83\202\15 X64,SM,ND ADC reg_rax,imm \324\1\x15\41 X64,SM ADC rm8,imm \1\x80\202\21 8086,SM ADC rm16,imm \320\145\x81\202\141 8086,SM ADC rm32,imm \321\155\x81\202\151 386,SM -ADC rm64,imm \324\155\x81\202\151 X64,SM +ADC rm64,imm \324\155\x81\202\251 X64,SM ADC mem,imm8 \1\x80\202\21 8086,SM ADC mem,imm16 \320\145\x81\202\141 8086,SM ADC mem,imm32 \321\155\x81\202\151 386,SM @@ -92,16 +92,16 @@ ADD rm16,imm8 \320\1\x83\200\15 8086 ADD rm32,imm8 \321\1\x83\200\15 386 ADD rm64,imm8 \324\1\x83\200\15 X64 ADD reg_al,imm \1\x04\21 8086,SM -ADD reg_ax,sbyte \320\1\x83\200\15 8086,SM,ND +ADD reg_ax,sbyte16 \320\1\x83\200\15 8086,SM,ND ADD reg_ax,imm \320\1\x05\31 8086,SM -ADD reg_eax,sbyte \321\1\x83\200\15 386,SM,ND +ADD reg_eax,sbyte32 \321\1\x83\200\15 386,SM,ND ADD reg_eax,imm \321\1\x05\41 386,SM -ADD reg_rax,sbyte \324\1\x83\200\15 X64,SM,ND +ADD reg_rax,sbyte64 \324\1\x83\200\15 X64,SM,ND ADD reg_rax,imm \324\1\x05\41 X64,SM ADD rm8,imm \1\x80\200\21 8086,SM ADD rm16,imm \320\145\x81\200\141 8086,SM ADD rm32,imm \321\155\x81\200\151 386,SM -ADD rm64,imm \324\155\x81\200\151 X64,SM +ADD rm64,imm \324\155\x81\200\251 X64,SM ADD mem,imm8 \1\x80\200\21 8086,SM ADD mem,imm16 \320\145\x81\200\141 8086,SM ADD mem,imm32 \321\155\x81\200\151 386,SM @@ -125,16 +125,16 @@ AND rm16,imm8 \320\1\x83\204\15 8086 AND rm32,imm8 \321\1\x83\204\15 386 AND rm64,imm8 \324\1\x83\204\15 X64 AND reg_al,imm \1\x24\21 8086,SM -AND reg_ax,sbyte \320\1\x83\204\15 8086,SM,ND +AND reg_ax,sbyte16 \320\1\x83\204\15 8086,SM,ND AND reg_ax,imm \320\1\x25\31 8086,SM -AND reg_eax,sbyte \321\1\x83\204\15 386,SM,ND +AND reg_eax,sbyte32 \321\1\x83\204\15 386,SM,ND AND reg_eax,imm \321\1\x25\41 386,SM -AND reg_rax,sbyte \324\1\x83\204\15 X64,SM,ND +AND reg_rax,sbyte64 \324\1\x83\204\15 X64,SM,ND AND reg_rax,imm \324\1\x25\41 X64,SM AND rm8,imm \1\x80\204\21 8086,SM AND rm16,imm \320\145\x81\204\141 8086,SM AND rm32,imm \321\155\x81\204\151 386,SM -AND rm64,imm \324\155\x81\204\151 X64,SM +AND rm64,imm \324\155\x81\204\251 X64,SM AND mem,imm8 \1\x80\204\21 8086,SM AND mem,imm16 \320\145\x81\204\141 8086,SM AND mem,imm32 \321\155\x81\204\151 386,SM @@ -251,16 +251,16 @@ CMP rm16,imm8 \320\1\x83\207\15 8086 CMP rm32,imm8 \321\1\x83\207\15 386 CMP rm64,imm8 \324\1\x83\207\15 X64 CMP reg_al,imm \1\x3C\21 8086,SM -CMP reg_ax,sbyte \320\1\x83\207\15 8086,SM,ND +CMP reg_ax,sbyte16 \320\1\x83\207\15 8086,SM,ND CMP reg_ax,imm \320\1\x3D\31 8086,SM -CMP reg_eax,sbyte \321\1\x83\207\15 386,SM,ND +CMP reg_eax,sbyte32 \321\1\x83\207\15 386,SM,ND CMP reg_eax,imm \321\1\x3D\41 386,SM -CMP reg_rax,sbyte \324\1\x83\207\15 X64,SM,ND +CMP reg_rax,sbyte64 \324\1\x83\207\15 X64,SM,ND CMP reg_rax,imm \324\1\x3D\41 X64,SM CMP rm8,imm \1\x80\207\21 8086,SM CMP rm16,imm \320\145\x81\207\141 8086,SM CMP rm32,imm \321\155\x81\207\151 386,SM -CMP rm64,imm \324\155\x81\207\151 X64,SM +CMP rm64,imm \324\155\x81\207\251 X64,SM CMP mem,imm8 \1\x80\207\21 8086,SM CMP mem,imm16 \320\145\x81\207\141 8086,SM CMP mem,imm32 \321\155\x81\207\151 386,SM @@ -546,40 +546,40 @@ IMUL reg32,reg32 \321\2\x0F\xAF\110 386 IMUL reg64,mem \324\2\x0F\xAF\110 X64,SM IMUL reg64,reg64 \324\2\x0F\xAF\110 X64 IMUL reg16,mem,imm8 \320\1\x6B\110\16 186,SM -IMUL reg16,mem,sbyte \320\1\x6B\110\16 186,SM,ND +IMUL reg16,mem,sbyte16 \320\1\x6B\110\16 186,SM,ND IMUL reg16,mem,imm16 \320\1\x69\110\32 186,SM IMUL reg16,mem,imm \320\146\x69\110\142 186,SM,ND IMUL reg16,reg16,imm8 \320\1\x6B\110\16 186 -IMUL reg16,reg16,sbyte \320\1\x6B\110\16 186,SM,ND +IMUL reg16,reg16,sbyte32 \320\1\x6B\110\16 186,SM,ND IMUL reg16,reg16,imm16 \320\1\x69\110\32 186 IMUL reg16,reg16,imm \320\146\x69\110\142 186,SM,ND IMUL reg32,mem,imm8 \321\1\x6B\110\16 386,SM -IMUL reg32,mem,sbyte \321\1\x6B\110\16 386,SM,ND +IMUL reg32,mem,sbyte64 \321\1\x6B\110\16 386,SM,ND IMUL reg32,mem,imm32 \321\1\x69\110\42 386,SM IMUL reg32,mem,imm \321\156\x69\110\152 386,SM,ND IMUL reg32,reg32,imm8 \321\1\x6B\110\16 386 -IMUL reg32,reg32,sbyte \321\1\x6B\110\16 386,SM,ND +IMUL reg32,reg32,sbyte16 \321\1\x6B\110\16 386,SM,ND IMUL reg32,reg32,imm32 \321\1\x69\110\42 386 IMUL reg32,reg32,imm \321\156\x69\110\152 386,SM,ND IMUL reg64,mem,imm8 \324\1\x6B\110\16 X64,SM -IMUL reg64,mem,sbyte \324\1\x6B\110\16 X64,SM,ND +IMUL reg64,mem,sbyte32 \324\1\x6B\110\16 X64,SM,ND IMUL reg64,mem,imm32 \324\1\x69\110\42 X64,SM -IMUL reg64,mem,imm \324\156\x69\110\152 X64,SM,ND +IMUL reg64,mem,imm \324\156\x69\110\252 X64,SM,ND IMUL reg64,reg64,imm8 \324\1\x6B\110\16 X64 -IMUL reg64,reg64,sbyte \324\1\x6B\110\16 X64,SM,ND +IMUL reg64,reg64,sbyte64 \324\1\x6B\110\16 X64,SM,ND IMUL reg64,reg64,imm32 \324\1\x69\110\42 X64 -IMUL reg64,reg64,imm \324\156\x69\110\152 X64,SM,ND +IMUL reg64,reg64,imm \324\156\x69\110\252 X64,SM,ND IMUL reg16,imm8 \320\1\x6B\100\15 186 -IMUL reg16,sbyte \320\1\x6B\100\15 186,SM,ND +IMUL reg16,sbyte16 \320\1\x6B\100\15 186,SM,ND IMUL reg16,imm16 \320\1\x69\100\31 186 IMUL reg16,imm \320\145\x69\100\141 186,SM,ND IMUL reg32,imm8 \321\1\x6B\100\15 386 -IMUL reg32,sbyte \321\1\x6B\100\15 386,SM,ND +IMUL reg32,sbyte32 \321\1\x6B\100\15 386,SM,ND IMUL reg32,imm32 \321\1\x69\100\41 386 IMUL reg32,imm \321\155\x69\100\151 386,SM,ND -IMUL reg64,sbyte \324\1\x6B\100\15 X64,SM,ND +IMUL reg64,sbyte64 \324\1\x6B\100\15 X64,SM,ND IMUL reg64,imm32 \324\1\x69\100\41 X64 -IMUL reg64,imm \324\155\x69\100\151 X64,SM,ND +IMUL reg64,imm \324\155\x69\100\251 X64,SM,ND IN reg_al,imm \1\xE4\25 8086,SB IN reg_ax,imm \320\1\xE5\25 8086,SB IN reg_eax,imm \321\1\xE5\25 386,SB @@ -849,16 +849,16 @@ OR rm16,imm8 \320\1\x83\201\15 8086 OR rm32,imm8 \321\1\x83\201\15 386 OR rm64,imm8 \324\1\x83\201\15 X64 OR reg_al,imm \1\x0C\21 8086,SM -OR reg_ax,sbyte \320\1\x83\201\15 8086,SM,ND +OR reg_ax,sbyte16 \320\1\x83\201\15 8086,SM,ND OR reg_ax,imm \320\1\x0D\31 8086,SM -OR reg_eax,sbyte \321\1\x83\201\15 386,SM,ND +OR reg_eax,sbyte32 \321\1\x83\201\15 386,SM,ND OR reg_eax,imm \321\1\x0D\41 386,SM -OR reg_rax,sbyte \324\1\x83\201\15 X64,SM,ND +OR reg_rax,sbyte64 \324\1\x83\201\15 X64,SM,ND OR reg_rax,imm \324\1\x0D\41 X64,SM OR rm8,imm \1\x80\201\21 8086,SM OR rm16,imm \320\145\x81\201\141 8086,SM OR rm32,imm \321\155\x81\201\151 386,SM -OR rm64,imm \324\155\x81\201\151 X64,SM +OR rm64,imm \324\155\x81\201\251 X64,SM OR mem,imm8 \1\x80\201\21 8086,SM OR mem,imm16 \320\145\x81\201\141 8086,SM OR mem,imm32 \321\155\x81\201\151 386,SM @@ -982,11 +982,10 @@ PUSH reg_cs \6 8086,NOLONG PUSH reg_dess \6 8086,NOLONG PUSH reg_fsgs \1\x0F\7 386 PUSH imm8 \1\x6A\14 186 -PUSH sbyte \1\x6A\14 186,ND -PUSH imm16 \320\144\x68\140 186 -PUSH imm32 \321\154\x68\150 386,NOLONG -PUSH imm64 \321\154\x68\150 X64 -PUSH imm \1\x68\34 186 +PUSH imm16 \320\144\x68\140 186,AR0,SZ +PUSH imm32 \321\154\x68\150 386,NOLONG,AR0,SZ +PUSH imm32 \321\154\x68\150 386,NOLONG,SD +PUSH imm64 \323\154\x68\250 X64,AR0,SZ PUSHA void \322\1\x60 186,NOLONG PUSHAD void \321\1\x60 386,NOLONG PUSHAW void \320\1\x60 186,NOLONG @@ -1105,16 +1104,16 @@ SBB rm16,imm8 \320\1\x83\203\15 8086 SBB rm32,imm8 \321\1\x83\203\15 386 SBB rm64,imm8 \324\1\x83\203\15 X64 SBB reg_al,imm \1\x1C\21 8086,SM -SBB reg_ax,sbyte \320\1\x83\203\15 8086,SM,ND +SBB reg_ax,sbyte16 \320\1\x83\203\15 8086,SM,ND SBB reg_ax,imm \320\1\x1D\31 8086,SM -SBB reg_eax,sbyte \321\1\x83\203\15 386,SM,ND +SBB reg_eax,sbyte32 \321\1\x83\203\15 386,SM,ND SBB reg_eax,imm \321\1\x1D\41 386,SM -SBB reg_rax,sbyte \324\1\x83\203\15 X64,SM,ND +SBB reg_rax,sbyte64 \324\1\x83\203\15 X64,SM,ND SBB reg_rax,imm \324\1\x1D\41 X64,SM SBB rm8,imm \1\x80\203\21 8086,SM SBB rm16,imm \320\145\x81\203\141 8086,SM SBB rm32,imm \321\155\x81\203\151 386,SM -SBB rm64,imm \324\155\x81\203\151 X64,SM +SBB rm64,imm \324\155\x81\203\251 X64,SM SBB mem,imm8 \1\x80\203\21 8086,SM SBB mem,imm16 \320\145\x81\203\141 8086,SM SBB mem,imm32 \321\155\x81\203\151 386,SM @@ -1219,16 +1218,16 @@ SUB rm16,imm8 \320\1\x83\205\15 8086 SUB rm32,imm8 \321\1\x83\205\15 386 SUB rm64,imm8 \324\1\x83\205\15 X64 SUB reg_al,imm \1\x2C\21 8086,SM -SUB reg_ax,sbyte \320\1\x83\205\15 8086,SM,ND +SUB reg_ax,sbyte16 \320\1\x83\205\15 8086,SM,ND SUB reg_ax,imm \320\1\x2D\31 8086,SM -SUB reg_eax,sbyte \321\1\x83\205\15 386,SM,ND +SUB reg_eax,sbyte32 \321\1\x83\205\15 386,SM,ND SUB reg_eax,imm \321\1\x2D\41 386,SM -SUB reg_rax,sbyte \324\1\x83\205\15 X64,SM,ND +SUB reg_rax,sbyte64 \324\1\x83\205\15 X64,SM,ND SUB reg_rax,imm \324\1\x2D\41 X64,SM SUB rm8,imm \1\x80\205\21 8086,SM SUB rm16,imm \320\145\x81\205\141 8086,SM SUB rm32,imm \321\155\x81\205\151 386,SM -SUB rm64,imm \324\155\x81\205\151 X64,SM +SUB rm64,imm \324\155\x81\205\251 X64,SM SUB mem,imm8 \1\x80\205\21 8086,SM SUB mem,imm16 \320\145\x81\205\141 8086,SM SUB mem,imm32 \321\155\x81\205\151 386,SM @@ -1348,16 +1347,16 @@ XOR rm16,imm8 \320\1\x83\206\15 8086 XOR rm32,imm8 \321\1\x83\206\15 386 XOR rm64,imm8 \324\1\x83\206\15 X64 XOR reg_al,imm \1\x34\21 8086,SM -XOR reg_ax,sbyte \320\1\x83\206\15 8086,SM,ND +XOR reg_ax,sbyte16 \320\1\x83\206\15 8086,SM,ND XOR reg_ax,imm \320\1\x35\31 8086,SM -XOR reg_eax,sbyte \321\1\x83\206\15 386,SM,ND +XOR reg_eax,sbyte32 \321\1\x83\206\15 386,SM,ND XOR reg_eax,imm \321\1\x35\41 386,SM -XOR reg_rax,sbyte \324\1\x83\206\15 X64,SM,ND +XOR reg_rax,sbyte64 \324\1\x83\206\15 X64,SM,ND XOR reg_rax,imm \324\1\x35\41 X64,SM XOR rm8,imm \1\x80\206\21 8086,SM XOR rm16,imm \320\145\x81\206\141 8086,SM XOR rm32,imm \321\155\x81\206\151 386,SM -XOR rm64,imm \324\155\x81\206\151 X64,SM +XOR rm64,imm \324\155\x81\206\251 X64,SM XOR mem,imm8 \1\x80\206\21 8086,SM XOR mem,imm16 \320\145\x81\206\141 8086,SM XOR mem,imm32 \321\155\x81\206\151 386,SM |