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| author | H. Peter Anvin <hpa@zytor.com> | 2002-04-30 21:02:01 +0000 |
|---|---|---|
| committer | H. Peter Anvin <hpa@zytor.com> | 2002-04-30 21:02:01 +0000 |
| commit | 788e6c10e175ab4b3e67feefbffe570619ae2330 (patch) | |
| tree | fdbac44f81f28b729e74ce8a8379b5211f2d6f95 /insns.dat | |
| parent | 4cf1748e6829f80be251b8d7d274738009f934cf (diff) | |
| download | nasm-788e6c10e175ab4b3e67feefbffe570619ae2330.tar.gz nasm-788e6c10e175ab4b3e67feefbffe570619ae2330.tar.bz2 nasm-788e6c10e175ab4b3e67feefbffe570619ae2330.zip | |
NASM 0.98.12
Diffstat (limited to 'insns.dat')
| -rw-r--r-- | insns.dat | 140 |
1 files changed, 70 insertions, 70 deletions
@@ -37,15 +37,15 @@ ADC rm16,imm8 \320\300\1\x83\202\15 8086 ADC rm32,imm8 \321\300\1\x83\202\15 386 ADC reg_al,imm \1\x14\21 8086,SM ADC reg_ax,imm \320\1\x15\31 8086,SM -ADC reg_eax,sbyte \321\1\x83\202\15 386,SM,ND -ADC reg_eax,sbig \321\1\x15\41 386,SM,ND +ADC reg_eax,sbyte \321\1\x83\202\15 386,SM,ND +ADC reg_eax,sbig \321\1\x15\41 386,SM,ND ADC reg_eax,imm32 \321\1\x15\41 386 ADC rm8,imm \300\1\x80\202\21 8086,SM -ADC rm16,imm \320\300\134\1\x81\202\131 8086,SM -ADC rm32,imm \321\300\144\1\x81\202\141 386,SM +ADC rm16,imm \320\300\134\1\x81\202\131 8086,SM +ADC rm32,imm \321\300\144\1\x81\202\141 386,SM ADC mem,imm8 \300\1\x80\202\21 8086,SM -ADC mem,imm16 \320\300\134\1\x81\202\131 8086,SM -ADC mem,imm32 \321\300\144\1\x81\202\141 386,SM +ADC mem,imm16 \320\300\134\1\x81\202\131 8086,SM +ADC mem,imm32 \321\300\144\1\x81\202\141 386,SM ADD mem,reg8 \300\17\101 8086,SM ADD reg8,reg8 \300\17\101 8086 ADD mem,reg16 \320\300\1\x01\101 8086,SM @@ -62,15 +62,15 @@ ADD rm16,imm8 \320\300\1\x83\200\15 8086 ADD rm32,imm8 \321\300\1\x83\200\15 386 ADD reg_al,imm \1\x04\21 8086,SM ADD reg_ax,imm \320\1\x05\31 8086,SM -ADD reg_eax,sbyte \321\1\x83\200\15 386,SM,ND -ADD reg_eax,sbig \321\1\x05\41 386,SM,ND +ADD reg_eax,sbyte \321\1\x83\200\15 386,SM,ND +ADD reg_eax,sbig \321\1\x05\41 386,SM,ND ADD reg_eax,imm32 \321\1\x05\41 386 ADD rm8,imm \300\1\x80\200\21 8086,SM -ADD rm16,imm \320\300\134\1\x81\200\131 8086,SM -ADD rm32,imm \321\300\144\1\x81\200\141 386,SM +ADD rm16,imm \320\300\134\1\x81\200\131 8086,SM +ADD rm32,imm \321\300\144\1\x81\200\141 386,SM ADD mem,imm8 \300\1\x80\200\21 8086,SM -ADD mem,imm16 \320\300\134\1\x81\200\131 8086,SM -ADD mem,imm32 \321\300\144\1\x81\200\141 386,SM +ADD mem,imm16 \320\300\134\1\x81\200\131 8086,SM +ADD mem,imm32 \321\300\144\1\x81\200\141 386,SM AND mem,reg8 \300\1\x20\101 8086,SM AND reg8,reg8 \300\1\x20\101 8086 AND mem,reg16 \320\300\1\x21\101 8086,SM @@ -87,15 +87,15 @@ AND rm16,imm8 \320\300\1\x83\204\15 8086 AND rm32,imm8 \321\300\1\x83\204\15 386 AND reg_al,imm \1\x24\21 8086,SM AND reg_ax,imm \320\1\x25\31 8086,SM -AND reg_eax,sbyte \321\1\x83\204\15 386,SM,ND -AND reg_eax,sbig \321\1\x25\41 386,SM,ND +AND reg_eax,sbyte \321\1\x83\204\15 386,SM,ND +AND reg_eax,sbig \321\1\x25\41 386,SM,ND AND reg_eax,imm32 \321\1\x25\41 386 AND rm8,imm \300\1\x80\204\21 8086,SM -AND rm16,imm \320\300\134\1\x81\204\131 8086,SM -AND rm32,imm \321\300\144\1\x81\204\141 386,SM +AND rm16,imm \320\300\134\1\x81\204\131 8086,SM +AND rm32,imm \321\300\144\1\x81\204\141 386,SM AND mem,imm8 \300\1\x80\204\21 8086,SM -AND mem,imm16 \320\300\134\1\x81\204\131 8086,SM -AND mem,imm32 \321\300\144\1\x81\204\141 386,SM +AND mem,imm16 \320\300\134\1\x81\204\131 8086,SM +AND mem,imm32 \321\300\144\1\x81\204\141 386,SM ARPL mem,reg16 \300\1\x63\101 286,PROT,SM ARPL reg16,reg16 \300\1\x63\101 286,PROT BOUND reg16,mem \320\301\1\x62\110 186 @@ -181,15 +181,15 @@ CMP rm16,imm8 \320\300\1\x83\207\15 8086 CMP rm32,imm8 \321\300\1\x83\207\15 386 CMP reg_al,imm \1\x3C\21 8086,SM CMP reg_ax,imm \320\1\x3D\31 8086,SM -CMP reg_eax,sbyte \321\1\x83\207\15 386,SM,ND -CMP reg_eax,sbig \321\1\x3D\41 386,SM,ND +CMP reg_eax,sbyte \321\1\x83\207\15 386,SM,ND +CMP reg_eax,sbig \321\1\x3D\41 386,SM,ND CMP reg_eax,imm32 \321\1\x3D\41 386 CMP rm8,imm \300\1\x80\207\21 8086,SM -CMP rm16,imm \320\300\134\1\x81\207\131 8086,SM -CMP rm32,imm \321\300\144\1\x81\207\141 386,SM +CMP rm16,imm \320\300\134\1\x81\207\131 8086,SM +CMP rm32,imm \321\300\144\1\x81\207\141 386,SM CMP mem,imm8 \300\1\x80\207\21 8086,SM -CMP mem,imm16 \320\300\134\1\x81\207\131 8086,SM -CMP mem,imm32 \321\300\144\1\x81\207\141 386,SM +CMP mem,imm16 \320\300\134\1\x81\207\131 8086,SM +CMP mem,imm32 \321\300\144\1\x81\207\141 386,SM CMPSB void \332\1\xA6 8086 CMPSD void \332\321\1\xA7 386 CMPSW void \332\320\1\xA7 8086 @@ -427,29 +427,29 @@ IMUL reg16,reg16 \320\2\x0F\xAF\110 386 IMUL reg32,mem \321\301\2\x0F\xAF\110 386,SM IMUL reg32,reg32 \321\2\x0F\xAF\110 386 IMUL reg16,mem,imm8 \320\301\1\x6B\110\16 186,SM -IMUL reg16,mem,sbyte \320\301\1\x6B\110\16 186,SM,ND -IMUL reg16,mem,imm16 \320\301\1\x69\110\32 186,SM -IMUL reg16,mem,imm \320\301\135\1\x69\110\132 186,SM,ND +IMUL reg16,mem,sbyte \320\301\1\x6B\110\16 186,SM,ND +IMUL reg16,mem,imm16 \320\301\1\x69\110\32 186,SM +IMUL reg16,mem,imm \320\301\135\1\x69\110\132 186,SM,ND IMUL reg16,reg16,imm8 \320\1\x6B\110\16 186 -IMUL reg16,reg16,sbyte \320\1\x6B\110\16 186,SM,ND -IMUL reg16,reg16,imm16 \320\1\x69\110\32 186 -IMUL reg16,reg16,imm \320\135\1\x69\110\132 186,SM,ND +IMUL reg16,reg16,sbyte \320\1\x6B\110\16 186,SM,ND +IMUL reg16,reg16,imm16 \320\1\x69\110\32 186 +IMUL reg16,reg16,imm \320\135\1\x69\110\132 186,SM,ND IMUL reg32,mem,imm8 \321\301\1\x6B\110\16 386,SM -IMUL reg32,mem,sbyte \321\301\1\x6B\110\16 386,SM,ND -IMUL reg32,mem,imm32 \321\301\1\x69\110\42 386,SM -IMUL reg32,mem,imm \321\301\145\1\x69\110\142 386,SM,ND +IMUL reg32,mem,sbyte \321\301\1\x6B\110\16 386,SM,ND +IMUL reg32,mem,imm32 \321\301\1\x69\110\42 386,SM +IMUL reg32,mem,imm \321\301\145\1\x69\110\142 386,SM,ND IMUL reg32,reg32,imm8 \321\1\x6B\110\16 386 -IMUL reg32,reg32,sbyte \321\1\x6B\110\16 386,SM,ND -IMUL reg32,reg32,imm32 \321\1\x69\110\42 386 -IMUL reg32,reg32,imm \321\145\1\x69\110\142 386,SM,ND +IMUL reg32,reg32,sbyte \321\1\x6B\110\16 386,SM,ND +IMUL reg32,reg32,imm32 \321\1\x69\110\42 386 +IMUL reg32,reg32,imm \321\145\1\x69\110\142 386,SM,ND IMUL reg16,imm8 \320\1\x6B\100\15 186 -IMUL reg16,sbyte \320\1\x6B\100\15 186,SM,ND -IMUL reg16,imm16 \320\1\x69\100\31 186 -IMUL reg16,imm \320\134\1\x69\100\131 186,SM,ND +IMUL reg16,sbyte \320\1\x6B\100\15 186,SM,ND +IMUL reg16,imm16 \320\1\x69\100\31 186 +IMUL reg16,imm \320\134\1\x69\100\131 186,SM,ND IMUL reg32,imm8 \321\1\x6B\100\15 386 -IMUL reg32,sbyte \321\1\x6B\100\15 386,SM,ND -IMUL reg32,imm32 \321\1\x69\100\41 386 -IMUL reg32,imm \321\144\1\x69\100\141 386,SM,ND +IMUL reg32,sbyte \321\1\x6B\100\15 386,SM,ND +IMUL reg32,imm32 \321\1\x69\100\41 386 +IMUL reg32,imm \321\144\1\x69\100\141 386,SM,ND IN reg_al,imm \1\xE4\25 8086,SB IN reg_ax,imm \320\1\xE5\25 8086,SB IN reg_eax,imm \321\1\xE5\25 386,SB @@ -479,7 +479,7 @@ IRETW void \320\1\xCF 8086 JCXZ imm \310\1\xE3\50 8086 JECXZ imm \311\1\xE3\50 386 JMP imm|short \1\xEB\50 8086 -JMP imm \370\1\xEB\50 8086,ND +JMP imm \371\1\xEB\50 8086,ND JMP imm \322\1\xE9\64 8086 JMP imm|near \322\1\xE9\64 8086,ND JMP imm|far \322\1\xEA\34\37 8086,ND @@ -558,9 +558,9 @@ LSS reg32,mem \321\301\2\x0F\xB2\110 386 LTR mem \300\1\x0F\17\203 286,PROT,PRIV LTR mem16 \300\1\x0F\17\203 286,PROT,PRIV LTR reg16 \300\1\x0F\17\203 286,PROT,PRIV -MOV mem,reg_cs \300\1\x8C\201 8086,SM -MOV mem,reg_dess \300\1\x8C\101 8086,SM -MOV mem,reg_fsgs \300\1\x8C\101 386,SM +MOV mem,reg_cs \300\1\x8C\201 8086,SM +MOV mem,reg_dess \300\1\x8C\101 8086,SM +MOV mem,reg_fsgs \300\1\x8C\101 386,SM MOV reg16,reg_cs \320\300\1\x8C\201 8086 MOV reg16,reg_dess \320\300\1\x8C\101 8086 MOV reg16,reg_fsgs \320\300\1\x8C\101 386 @@ -653,15 +653,15 @@ OR rm16,imm8 \320\300\1\x83\201\15 8086 OR rm32,imm8 \321\300\1\x83\201\15 386 OR reg_al,imm \1\x0C\21 8086,SM OR reg_ax,imm \320\1\x0D\31 8086,SM -OR reg_eax,sbyte \321\1\x83\201\15 386,SM,ND -OR reg_eax,sbig \321\1\x0D\41 386,SM,ND +OR reg_eax,sbyte \321\1\x83\201\15 386,SM,ND +OR reg_eax,sbig \321\1\x0D\41 386,SM,ND OR reg_eax,imm32 \321\1\x0D\41 386 OR rm8,imm \300\1\x80\201\21 8086,SM -OR rm16,imm \320\300\134\1\x81\201\131 8086,SM -OR rm32,imm \321\300\144\1\x81\201\141 386,SM +OR rm16,imm \320\300\134\1\x81\201\131 8086,SM +OR rm32,imm \321\300\144\1\x81\201\141 386,SM OR mem,imm8 \300\1\x80\201\21 8086,SM -OR mem,imm16 \320\300\134\1\x81\201\131 8086,SM -OR mem,imm32 \321\300\144\1\x81\201\141 386,SM +OR mem,imm16 \320\300\134\1\x81\201\131 8086,SM +OR mem,imm32 \321\300\144\1\x81\201\141 386,SM OUT imm,reg_al \1\xE6\24 8086,SB OUT imm,reg_ax \320\1\xE7\24 8086,SB OUT imm,reg_eax \321\1\xE7\24 386,SB @@ -946,15 +946,15 @@ SBB rm16,imm8 \320\300\1\x83\203\15 8086 SBB rm32,imm8 \321\300\1\x83\203\15 8086 SBB reg_al,imm \1\x1C\21 8086,SM SBB reg_ax,imm \320\1\x1D\31 8086,SM -SBB reg_eax,sbyte \321\1\x83\203\15 386,SM,ND -SBB reg_eax,sbig \321\1\x1D\41 386,SM,ND +SBB reg_eax,sbyte \321\1\x83\203\15 386,SM,ND +SBB reg_eax,sbig \321\1\x1D\41 386,SM,ND SBB reg_eax,imm32 \321\1\x1D\41 386 SBB rm8,imm \300\1\x80\203\21 8086,SM -SBB rm16,imm \320\300\134\1\x81\203\131 8086,SM -SBB rm32,imm \321\300\144\1\x81\203\141 386,SM +SBB rm16,imm \320\300\134\1\x81\203\131 8086,SM +SBB rm32,imm \321\300\144\1\x81\203\141 386,SM SBB mem,imm8 \300\1\x80\203\21 8086,SM -SBB mem,imm16 \320\300\134\1\x81\203\131 8086,SM -SBB mem,imm32 \321\300\144\1\x81\203\141 386,SM +SBB mem,imm16 \320\300\134\1\x81\203\131 8086,SM +SBB mem,imm32 \321\300\144\1\x81\203\141 386,SM SCASB void \332\1\xAE 8086 SCASD void \332\321\1\xAF 386 SCASW void \332\320\1\xAF 8086 @@ -1029,15 +1029,15 @@ SUB rm16,imm8 \320\300\1\x83\205\15 8086 SUB rm32,imm8 \321\300\1\x83\205\15 386 SUB reg_al,imm \1\x2C\21 8086,SM SUB reg_ax,imm \320\1\x2D\31 8086,SM -SUB reg_eax,sbyte \321\1\x83\205\15 386,SM,ND -SUB reg_eax,sbig \321\1\x2D\41 386,SM,ND +SUB reg_eax,sbyte \321\1\x83\205\15 386,SM,ND +SUB reg_eax,sbig \321\1\x2D\41 386,SM,ND SUB reg_eax,imm32 \321\1\x2D\41 386 SUB rm8,imm \300\1\x80\205\21 8086,SM -SUB rm16,imm \320\300\134\1\x81\205\131 8086,SM -SUB rm32,imm \321\300\144\1\x81\205\141 386,SM +SUB rm16,imm \320\300\134\1\x81\205\131 8086,SM +SUB rm32,imm \321\300\144\1\x81\205\141 386,SM SUB mem,imm8 \300\1\x80\205\21 8086,SM -SUB mem,imm16 \320\300\134\1\x81\205\131 8086,SM -SUB mem,imm32 \321\300\144\1\x81\205\141 386,SM +SUB mem,imm16 \320\300\134\1\x81\205\131 8086,SM +SUB mem,imm32 \321\300\144\1\x81\205\141 386,SM SVDC mem80,reg_sreg \300\2\x0F\x78\101 486,CYRIX,SMM SVLDT mem80 \300\2\x0F\x7A\200 486,CYRIX,SMM SVTS mem80 \300\2\x0F\x7C\200 486,CYRIX,SMM @@ -1132,15 +1132,15 @@ XOR rm16,imm8 \320\300\1\x83\206\15 8086 XOR rm32,imm8 \321\300\1\x83\206\15 386 XOR reg_al,imm \1\x34\21 8086,SM XOR reg_ax,imm \320\1\x35\31 8086,SM -XOR reg_eax,sbyte \321\1\x83\206\15 386,SM,ND -XOR reg_eax,sbig \321\1\x35\41 386,SM,ND +XOR reg_eax,sbyte \321\1\x83\206\15 386,SM,ND +XOR reg_eax,sbig \321\1\x35\41 386,SM,ND XOR reg_eax,imm32 \321\1\x35\41 386 XOR rm8,imm \300\1\x80\206\21 8086,SM -XOR rm16,imm \320\300\134\1\x81\206\131 8086,SM -XOR rm32,imm \321\300\144\1\x81\206\141 386,SM +XOR rm16,imm \320\300\134\1\x81\206\131 8086,SM +XOR rm32,imm \321\300\144\1\x81\206\141 386,SM XOR mem,imm8 \300\1\x80\206\21 8086,SM -XOR mem,imm16 \320\300\134\1\x81\206\131 8086,SM -XOR mem,imm32 \321\300\144\1\x81\206\141 386,SM +XOR mem,imm16 \320\300\134\1\x81\206\131 8086,SM +XOR mem,imm32 \321\300\144\1\x81\206\141 386,SM CMOVcc reg16,mem \320\301\1\x0F\330\x40\110 P6,SM CMOVcc reg16,reg16 \320\301\1\x0F\330\x40\110 P6 CMOVcc reg32,mem \321\301\1\x0F\330\x40\110 P6,SM |