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| author | H. Peter Anvin <hpa@zytor.com> | 2013-11-26 15:21:15 -0800 |
|---|---|---|
| committer | H. Peter Anvin <hpa@zytor.com> | 2013-11-26 15:21:15 -0800 |
| commit | 80d18b55551e43f0c3e390550ecd396b90265fd3 (patch) | |
| tree | 08cf085a5917431df2e01ccf1677699f6ababea6 /insns-iflags.pl | |
| parent | 4b47c77d89adac7abd81f6a99a04d85d853d84d9 (diff) | |
| download | nasm-80d18b55551e43f0c3e390550ecd396b90265fd3.tar.gz nasm-80d18b55551e43f0c3e390550ecd396b90265fd3.tar.bz2 nasm-80d18b55551e43f0c3e390550ecd396b90265fd3.zip | |
iflag: In iflag_cmp() scan from the most significant word down
In order for iflag_cmp() to return an ordering that makes sense, we
need to scan from the most significant word downward. That way the
bits with the higher index consistently are the more significant.
This fixes the disassembler vendor selection algorithm. While we are
doing that, make that dependency more explicit in the comments.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'insns-iflags.pl')
| -rw-r--r-- | insns-iflags.pl | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/insns-iflags.pl b/insns-iflags.pl index 8f8e009..da2fd9b 100644 --- a/insns-iflags.pl +++ b/insns-iflags.pl @@ -135,6 +135,9 @@ my %insns_flag_bit = ( # # dword bound, index 3 - cpu type flags # + # The CYRIX and AMD flags should have the highest bit values; the + # disassembler selection algorithm depends on it. + # "8086" => [ 96, "8086"], "186" => [ 97, "186+"], "286" => [ 98, "286+"], @@ -151,8 +154,8 @@ my %insns_flag_bit = ( "SANDYBRIDGE" => [109, "Sandy Bridge"], "FUTURE" => [110, "Future processor (not yet disclosed)"], "IA64" => [111, "IA64 (in x86 mode)"], - "CYRIX" => [112, "Cyrix-specific"], - "AMD" => [113, "AMD-specific"], + "CYRIX" => [126, "Cyrix-specific"], + "AMD" => [127, "AMD-specific"], ); my %insns_flag_hash = (); |