summaryrefslogtreecommitdiff
path: root/disasm.c
diff options
context:
space:
mode:
authorH. Peter Anvin <hpa@linux.intel.com>2010-08-16 14:56:33 -0700
committerH. Peter Anvin <hpa@linux.intel.com>2010-08-16 14:56:33 -0700
commit421059c6897ad5fae3bfcba8e3db0844cf80ae4e (patch)
treef5ca82d1c7521badeb78d8ef7b2f2cee5d253111 /disasm.c
parent978c2170fc22224bec916c692c627c88b53b829f (diff)
downloadnasm-421059c6897ad5fae3bfcba8e3db0844cf80ae4e.tar.gz
nasm-421059c6897ad5fae3bfcba8e3db0844cf80ae4e.tar.bz2
nasm-421059c6897ad5fae3bfcba8e3db0844cf80ae4e.zip
assemble: handle vex.lig
AVX version 7 introduces the concept of .lig, meaning VEX.L is ignored. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'disasm.c')
-rw-r--r--disasm.c12
1 files changed, 7 insertions, 5 deletions
diff --git a/disasm.c b/disasm.c
index 561851a..588c832 100644
--- a/disasm.c
+++ b/disasm.c
@@ -678,6 +678,7 @@ static int matches(const struct itemplate *t, uint8_t *data,
{
int vexm = *r++;
int vexwlp = *r++;
+
ins->rex |= REX_V;
if ((prefix->rex & (REX_V|REX_D|REX_P)) != REX_V)
return false;
@@ -685,24 +686,25 @@ static int matches(const struct itemplate *t, uint8_t *data,
if ((vexm & 0x1f) != prefix->vex_m)
return false;
- switch (vexwlp & 030) {
+ switch (vexwlp & 060) {
case 000:
if (prefix->rex & REX_W)
return false;
break;
- case 010:
+ case 020:
if (!(prefix->rex & REX_W))
return false;
ins->rex &= ~REX_W;
break;
- case 020: /* VEX.W is a don't care */
+ case 040: /* VEX.W is a don't care */
ins->rex &= ~REX_W;
break;
- case 030:
+ case 060:
break;
}
- if ((vexwlp & 007) != prefix->vex_lp)
+ /* The 010 bit of vexwlp is set if VEX.L is ignored */
+ if ((vexwlp ^ prefix->vex_lp) & ((vexwlp & 010) ? 03 : 07))
return false;
opx->segment |= SEG_RMREG;