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author | Jin Kyu Song <jin.kyu.song@intel.com> | 2013-08-15 19:01:25 -0700 |
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committer | Cyrill Gorcunov <gorcunov@gmail.com> | 2013-08-16 09:06:15 +0400 |
commit | cc1dc9de53137e864bde06573556723149239f29 (patch) | |
tree | ba84247ccd27964e56e29384b05a4ab1da169d9c /disasm.c | |
parent | 72018a2b4326d5a647b8879ba8124300b68ca212 (diff) | |
download | nasm-cc1dc9de53137e864bde06573556723149239f29.tar.gz nasm-cc1dc9de53137e864bde06573556723149239f29.tar.bz2 nasm-cc1dc9de53137e864bde06573556723149239f29.zip |
AVX-512: Add EVEX encoding and new instructions
EVEX encoding support includes 32 vector regs (XMM/YMM/ZMM),
opmask, broadcasting, embedded rounding mode,
suppress all exceptions, compressed displacement.
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Diffstat (limited to 'disasm.c')
-rw-r--r-- | disasm.c | 6 |
1 files changed, 6 insertions, 0 deletions
@@ -328,6 +328,8 @@ static uint8_t *do_ea(uint8_t *data, int modrm, int asize, op->indexreg = nasm_rd_xmmreg[index | ((rex & REX_X) ? 8 : 0)]; else if (type == EA_YMMVSIB) op->indexreg = nasm_rd_ymmreg[index | ((rex & REX_X) ? 8 : 0)]; + else if (type == EA_ZMMVSIB) + op->indexreg = nasm_rd_zmmreg[index | ((rex & REX_X) ? 8 : 0)]; else if (index == 4 && !(rex & REX_X)) op->indexreg = -1; /* ESP/RSP cannot be an index */ else if (a64) @@ -868,6 +870,10 @@ static int matches(const struct itemplate *t, uint8_t *data, eat = EA_YMMVSIB; break; + case 0376: + eat = EA_ZMMVSIB; + break; + default: return false; /* Unknown code */ } |