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| author | H. Peter Anvin <hpa@zytor.com> | 2012-02-25 10:19:56 -0800 |
|---|---|---|
| committer | H. Peter Anvin <hpa@zytor.com> | 2012-02-25 10:19:56 -0800 |
| commit | 7849dd07b94248a696009229f97f6412781b5337 (patch) | |
| tree | b804bf575c90d9cfdf430b94a3bade6612d00129 /assemble.c | |
| parent | b9bc63c75721a08e964b471a516c78a112c3b03a (diff) | |
| download | nasm-7849dd07b94248a696009229f97f6412781b5337.tar.gz nasm-7849dd07b94248a696009229f97f6412781b5337.tar.bz2 nasm-7849dd07b94248a696009229f97f6412781b5337.zip | |
Add a "nohle" byte code to skip an instruction pattern
The a2/a3 mem_offs MOV opcodes are invalid with XRELEASE; those
instructions instead have to use a modrm form. Therefore give a way
to annotate those instruction patters so the pattern matcher will move
on to the next pattern, rather than selecting them and then issue a
warning.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'assemble.c')
| -rw-r--r-- | assemble.c | 28 |
1 files changed, 19 insertions, 9 deletions
@@ -74,6 +74,10 @@ * an arbitrary value in bits 3..0 (assembled as zero.) * \2ab - a ModRM, calculated on EA in operand a, with the spare * field equal to digit b. + * \240 - skip this instruction pattern if HLE prefixes present + * \241 - instruction takes XRELEASE (F3) with or without lock + * \242 - instruction takes XACQUIRE/XRELEASE with or without lock + * \243 - instruction takes XACQUIRE/XRELEASE with lock only * \250..\253 - same as \150..\153, except warn if the 64-bit operand * is not equal to the truncated and sign-extended 32-bit * operand; used for 32-bit immediates in 64-bit mode. @@ -97,9 +101,6 @@ * * t = 0 for VEX (C4/C5), t = 1 for XOP (8F). * - * \271 - instruction takes XRELEASE (F3) with or without lock - * \272 - instruction takes XACQUIRE/XRELEASE with or without lock - * \273 - instruction takes XACQUIRE/XRELEASE with lock only * \274..\277 - a signed byte immediate operand, from operand 0..3, * which is to be extended to the operand size. * \310 - indicates fixed 16-bit address size, i.e. optional 0x67. @@ -958,6 +959,18 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits, length++; break; + case 0240: + if (has_prefix(ins, PPS_REP, P_XACQUIRE) || + has_prefix(ins, PPS_REP, P_XRELEASE)) + return -1; + break; + + case 0241: + case 0242: + case 0243: + hleok = c & 3; + break; + case4(0250): length += is_sbyte32(opx) ? 1 : 4; break; @@ -980,12 +993,6 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits, ins->vex_wlp = *codes++; break; - case 0271: - case 0272: - case 0273: - hleok = c & 3; - break; - case4(0274): length++; break; @@ -1559,6 +1566,9 @@ static void gencode(int32_t segment, int64_t offset, int bits, offset++; break; + case4(0240): + break; + case4(0250): data = opx->offset; if (opx->wrt == NO_SEG && opx->segment == NO_SEG && |