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author | Jin Kyu Song <jin.kyu.song@intel.com> | 2013-08-26 20:28:39 -0700 |
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committer | Cyrill Gorcunov <gorcunov@gmail.com> | 2013-08-28 09:35:54 +0400 |
commit | 4a6570616aa1fadf1544c0c099c4bf22683f367f (patch) | |
tree | 2997e6d0c60a6025b172068d63e9db5c2a1bd3f4 /assemble.c | |
parent | c62bc20a0b6f8441e75616bdbcc300a510eb12f8 (diff) | |
download | nasm-4a6570616aa1fadf1544c0c099c4bf22683f367f.tar.gz nasm-4a6570616aa1fadf1544c0c099c4bf22683f367f.tar.bz2 nasm-4a6570616aa1fadf1544c0c099c4bf22683f367f.zip |
AVX-512: Find the correct position of the last SIMD op
Since embedded rounding mode is following the last SIMD op,
GPR op should be skipped when finding the last SIMD op.
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
Diffstat (limited to 'assemble.c')
-rw-r--r-- | assemble.c | 2 |
1 files changed, 2 insertions, 0 deletions
@@ -1159,6 +1159,8 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits, rfield = nasm_regvals[opx->basereg]; /* find the last SIMD operand where ER decorator resides */ oplast = &ins->oprs[op1 > op2 ? op1 : op2]; + while (oplast && is_class(REG_CLASS_GPR, oplast->type)) + oplast--; } else { rflags = 0; rfield = c & 7; |