diff options
author | H. Peter Anvin <hpa@zytor.com> | 2008-12-29 20:52:28 -0800 |
---|---|---|
committer | H. Peter Anvin <hpa@zytor.com> | 2008-12-29 20:52:28 -0800 |
commit | 6cda414a0e766d07a19b8fb3693b14ef76553369 (patch) | |
tree | 15f3e1fa78dd3f2586cc4811b137fe251f8d8662 /assemble.c | |
parent | 9ed8594a28291015658ac57e179c999f6b53a7cc (diff) | |
download | nasm-6cda414a0e766d07a19b8fb3693b14ef76553369.tar.gz nasm-6cda414a0e766d07a19b8fb3693b14ef76553369.tar.bz2 nasm-6cda414a0e766d07a19b8fb3693b14ef76553369.zip |
BR 2432826: Fix enforcement of the LONG bit
Somewhere we lost the enforcement of the LONG bit, as opposed to
NOLONG. Fix this in the most obvious way.
Diffstat (limited to 'assemble.c')
-rw-r--r-- | assemble.c | 9 |
1 files changed, 5 insertions, 4 deletions
@@ -449,7 +449,7 @@ int64_t assemble(int32_t segment, int64_t offset, int bits, uint32_t cp, /* Check to see if we need an address-size prefix */ add_asp(instruction, bits); - size_prob = false; + size_prob = 0; for (temp = nasm_instructions[instruction->opcode]; temp->opcode != -1; temp++){ int m = matches(temp, instruction, bits); @@ -598,7 +598,8 @@ int64_t assemble(int32_t segment, int64_t offset, int bits, uint32_t cp, error(ERR_NONFATAL, "no instruction for this cpu level"); break; case 4: - error(ERR_NONFATAL, "instruction not supported in 64-bit mode"); + error(ERR_NONFATAL, "instruction not supported in %d-bit mode", + bits); break; default: error(ERR_NONFATAL, @@ -2071,9 +2072,9 @@ static int matches(const struct itemplate *itemp, insn * instruction, int bits) return 3; /* - * Check if instruction is available in long mode + * Verify the appropriate long mode flag. */ - if ((itemp->flags & IF_NOLONG) && (bits == 64)) + if ((itemp->flags & (bits == 64 ? IF_NOLONG : IF_LONG))) return 4; /* |