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| author | Jin Kyu Song <jin.kyu.song@intel.com> | 2013-10-25 19:29:53 -0700 |
|---|---|---|
| committer | Jin Kyu Song <jin.kyu.song@intel.com> | 2013-11-20 11:29:42 -0800 |
| commit | 945b1b8f36764a159e8890d27f80eef21bd29c14 (patch) | |
| tree | 521f7a0005187682738cbc920be690db3b718b64 /assemble.c | |
| parent | 267d0af79c7de8887ff1618e803cafa5a528a554 (diff) | |
| download | nasm-945b1b8f36764a159e8890d27f80eef21bd29c14.tar.gz nasm-945b1b8f36764a159e8890d27f80eef21bd29c14.tar.bz2 nasm-945b1b8f36764a159e8890d27f80eef21bd29c14.zip | |
AVX-512: Add {evex} instruction prefix
For instructions that can be encoded either in VEX or EVEX,
{evex} forces nasm to encode in EVEX.
Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Diffstat (limited to 'assemble.c')
| -rw-r--r-- | assemble.c | 7 |
1 files changed, 7 insertions, 0 deletions
@@ -632,6 +632,9 @@ int64_t assemble(int32_t segment, int64_t offset, int bits, iflags_t cp, case P_OSP: c = 0x66; break; + case P_EVEX: + /* EVEX */ + break; case P_none: break; default: @@ -786,6 +789,7 @@ int64_t insn_size(int32_t segment, int64_t offset, int bits, iflags_t cp, break; case P_A64: case P_O64: + case P_EVEX: case P_none: break; default: @@ -2186,6 +2190,9 @@ static enum match_result matches(const struct itemplate *itemp, nasm_regvals[instruction->oprs[i].basereg] >= 16 && !(itemp->flags & IF_AVX512)) { return MERR_ENCMISMATCH; + } else if (instruction->prefixes[PPS_EVEX] && + !(itemp->flags & IF_AVX512)) { + return MERR_ENCMISMATCH; } } |