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authorH. Peter Anvin <hpa@linux.intel.com>2011-07-07 17:21:24 -0700
committerH. Peter Anvin <hpa@linux.intel.com>2011-07-07 17:21:24 -0700
commitcffe61e776f044c2ce80e7ebe2108ce09c952715 (patch)
tree9dfa2a3f96ad3e4ceb311f90187f7ed917cd165b /assemble.c
parentfc561203fde370a5ab9db2d089053de51f8a5e04 (diff)
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Use a normal quad-case for valueless /is4
When we don't have an immediate for the i-field in /is4, then use a normal quad-bytecode encoding for it to save some small amount of space and re-use existing machinery. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'assemble.c')
-rw-r--r--assemble.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/assemble.c b/assemble.c
index 17def3a..fd78b21 100644
--- a/assemble.c
+++ b/assemble.c
@@ -70,7 +70,7 @@
* the 4-bit immediate from operand b in bits 3..0.
* \173\xab - the register number from operand a in bits 7..4, with
* the value b in bits 3..0.
- * \174\a - the register number from operand a in bits 7..4, and
+ * \174..\177 - the register number from operand 0..3 in bits 7..4, and
* an arbitrary value in bits 3..0 (assembled as zero.)
* \2ab - a ModRM, calculated on EA in operand a, with the spare
* field equal to digit b.
@@ -903,11 +903,14 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
case 0172:
case 0173:
- case 0174:
codes++;
length++;
break;
+ case4(0174):
+ length++;
+ break;
+
case4(0250):
length += is_sbyte32(opx) ? 1 : 4;
break;
@@ -1495,9 +1498,7 @@ static void gencode(int32_t segment, int64_t offset, int bits,
offset++;
break;
- case 0174:
- c = *codes++;
- opx = &ins->oprs[c];
+ case4(0174):
bytes[0] = nasm_regvals[opx->basereg] << 4;
out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, NO_SEG);
offset++;