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authorH. Peter Anvin <hpa@zytor.com>2013-11-24 11:52:32 -0800
committerH. Peter Anvin <hpa@zytor.com>2013-11-24 11:53:38 -0800
commit9a1db4589596fd9f7421ef44dbd0f73490373f41 (patch)
treea16862c558ad5281318766c7da0d0615abdd4727
parent8b0e5a34fcbc66e04cec3fc297c20a34e79c4dc0 (diff)
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iflag: Move instruction flag comment
Move the instruction flag comment to the Perl file where they are defined. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
-rw-r--r--iflag.h28
-rw-r--r--insns-iflags.pl34
-rw-r--r--insns.dat2
3 files changed, 29 insertions, 35 deletions
diff --git a/iflag.h b/iflag.h
index 72929ee..066149a 100644
--- a/iflag.h
+++ b/iflag.h
@@ -9,34 +9,6 @@
int ilog2_32(uint32_t v);
-/*
- * Instruction template flags. These specify which processor
- * targets the instruction is eligible for, whether it is
- * privileged or undocumented, and also specify extra error
- * checking on the matching of the instruction.
- *
- * IF_SM stands for Size Match: any operand whose size is not
- * explicitly specified by the template is `really' intended to be
- * the same size as the first size-specified operand.
- * Non-specification is tolerated in the input instruction, but
- * _wrong_ specification is not.
- *
- * IF_SM2 invokes Size Match on only the first _two_ operands, for
- * three-operand instructions such as SHLD: it implies that the
- * first two operands must match in size, but that the third is
- * required to be _unspecified_.
- *
- * IF_SB invokes Size Byte: operands with unspecified size in the
- * template are really bytes, and so no non-byte specification in
- * the input instruction will be tolerated. IF_SW similarly invokes
- * Size Word, and IF_SD invokes Size Doubleword.
- *
- * (The default state if neither IF_SM nor IF_SM2 is specified is
- * that any operand with unspecified size in the template is
- * required to have unspecified size in the instruction too...)
- *
- * iflag_t is defined to store these flags.
- */
#include "iflaggen.h"
#define IF_GENBIT(bit) (UINT32_C(1) << (bit))
diff --git a/insns-iflags.pl b/insns-iflags.pl
index 632bba3..b954c73 100644
--- a/insns-iflags.pl
+++ b/insns-iflags.pl
@@ -33,15 +33,37 @@
## --------------------------------------------------------------------------
#
-# Here we generate instrcution template flags. Note we assume that at moment
-# less than 128 bits are used for all flags. If needed it can be extended
-# arbitrary, but it'll be needed to extend arrays (they are 4 32 bit elements
-# by now).
-
+# Instruction template flags. These specify which processor
+# targets the instruction is eligible for, whether it is
+# privileged or undocumented, and also specify extra error
+# checking on the matching of the instruction.
+#
+# IF_SM stands for Size Match: any operand whose size is not
+# explicitly specified by the template is `really' intended to be
+# the same size as the first size-specified operand.
+# Non-specification is tolerated in the input instruction, but
+# _wrong_ specification is not.
+#
+# IF_SM2 invokes Size Match on only the first _two_ operands, for
+# three-operand instructions such as SHLD: it implies that the
+# first two operands must match in size, but that the third is
+# required to be _unspecified_.
+#
+# IF_SB invokes Size Byte: operands with unspecified size in the
+# template are really bytes, and so no non-byte specification in
+# the input instruction will be tolerated. IF_SW similarly invokes
+# Size Word, and IF_SD invokes Size Doubleword.
+#
+# (The default state if neither IF_SM nor IF_SM2 is specified is
+# that any operand with unspecified size in the template is
+# required to have unspecified size in the instruction too...)
+#
+# iflag_t is defined to store these flags.
#
# The order does matter here. We use some predefined masks to quick test
-# for a set of flags, so be carefull moving bits (and
+# for a set of flags, so be careful moving bits (and
# don't forget to update C code generation then).
+#
my %insns_flag_bit = (
#
# dword bound, index 0 - specific flags
diff --git a/insns.dat b/insns.dat
index 9e6c059..1d15997 100644
--- a/insns.dat
+++ b/insns.dat
@@ -41,7 +41,7 @@
;
; For a detailed description of the code string (third field), please
; see insns.pl and the comment at the top of assemble.c. For a detailed
-; description of the flags (fourth field), please see insns.h.
+; description of the flags (fourth field), please see insns-iflag.pl.
;
; Comments with a pound sign after the semicolon generate section
; subheaders in the NASM documentation.