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authorJin Kyu Song <jin.kyu.song@intel.com>2013-08-28 19:15:24 -0700
committerCyrill Gorcunov <gorcunov@gmail.com>2013-08-29 10:03:09 +0400
commit6d16d2836da3ad4aaad2b48b5879f24f2581876f (patch)
tree3bb12440fbf7e7ed43fa5f367b37d436b7fa10f1
parente3a06b9d0a12a7a9ac9143d631717223097849b7 (diff)
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AVX-512: Fix comments
Fixed or purged some old comments and added a comment for a previous patch. Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com> Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
-rw-r--r--nasm.h3
-rw-r--r--regs.dat2
-rwxr-xr-xtest/gas2nasm.py1
3 files changed, 3 insertions, 3 deletions
diff --git a/nasm.h b/nasm.h
index 8d61748..5ae9d54 100644
--- a/nasm.h
+++ b/nasm.h
@@ -689,12 +689,13 @@ typedef struct insn { /* an instruction itself */
uint8_t evex_p[3]; /* EVEX.P0: [RXB,R',00,mm], P1: [W,vvvv,1,pp] */
/* EVEX.P2: [z,L'L,b,V',aaa] */
enum ttypes evex_tuple; /* Tuple type for compressed Disp8*N */
- int evex_rm; /* static rounding mode for AVX3 (EVEX) */
+ int evex_rm; /* static rounding mode for AVX512 (EVEX) */
int8_t evex_brerop; /* BR/ER/SAE operand position */
} insn;
enum geninfo { GI_SWITCH };
+/* Instruction flags type: IF_* flags are defined in insns.h */
typedef uint64_t iflags_t;
/*
diff --git a/regs.dat b/regs.dat
index 1e083d0..fb112e6 100644
--- a/regs.dat
+++ b/regs.dat
@@ -123,7 +123,7 @@ xmm1-31 XMMREG xmmreg 1
ymm0 YMM0 ymmreg 0
ymm1-31 YMMREG ymmreg 1
-# AVX3 registers
+# AVX512 registers
zmm0 ZMM0 zmmreg 0
zmm1-31 ZMMREG zmmreg 1
diff --git a/test/gas2nasm.py b/test/gas2nasm.py
index a00af92..d0b8579 100755
--- a/test/gas2nasm.py
+++ b/test/gas2nasm.py
@@ -89,7 +89,6 @@ def write_rawbytes(data, options):
if __name__ == "__main__":
options = setup()
recs = read(options)
- print "AVX3.1 instructions"
write_rawbytes(recs, options)