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authorH. Peter Anvin <hpa@zytor.com>2012-02-25 10:24:24 -0800
committerH. Peter Anvin <hpa@zytor.com>2012-02-25 10:24:24 -0800
commit8ea220041503fb48876b0af35934740fe2613ec2 (patch)
tree7699facf807b21803eac9b42e0e46ae11b9f77ad
parent7849dd07b94248a696009229f97f6412781b5337 (diff)
downloadnasm-8ea220041503fb48876b0af35934740fe2613ec2.tar.gz
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Move HLE byte codes to \264..\267
Move the HLE byte codes to \264..\267 so as not to break up an unused group of 8 (\240..\247). Signed-off-by: H. Peter Anvin <hpa@zytor.com>
-rw-r--r--assemble.c38
-rw-r--r--disasm.c48
-rwxr-xr-xinsns.pl8
3 files changed, 47 insertions, 47 deletions
diff --git a/assemble.c b/assemble.c
index 2feb62a..1697ac7 100644
--- a/assemble.c
+++ b/assemble.c
@@ -74,16 +74,16 @@
* an arbitrary value in bits 3..0 (assembled as zero.)
* \2ab - a ModRM, calculated on EA in operand a, with the spare
* field equal to digit b.
- * \240 - skip this instruction pattern if HLE prefixes present
- * \241 - instruction takes XRELEASE (F3) with or without lock
- * \242 - instruction takes XACQUIRE/XRELEASE with or without lock
- * \243 - instruction takes XACQUIRE/XRELEASE with lock only
* \250..\253 - same as \150..\153, except warn if the 64-bit operand
* is not equal to the truncated and sign-extended 32-bit
* operand; used for 32-bit immediates in 64-bit mode.
* \254..\257 - a signed 32-bit operand to be extended to 64 bits.
* \260..\263 - this instruction uses VEX/XOP rather than REX, with the
* V field taken from operand 0..3.
+ * \264 - skip this instruction pattern if HLE prefixes present
+ * \265 - instruction takes XRELEASE (F3) with or without lock
+ * \266 - instruction takes XACQUIRE/XRELEASE with or without lock
+ * \267 - instruction takes XACQUIRE/XRELEASE with lock only
* \270 - this instruction uses VEX/XOP rather than REX, with the
* V field set to 1111b.
*
@@ -959,18 +959,6 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
length++;
break;
- case 0240:
- if (has_prefix(ins, PPS_REP, P_XACQUIRE) ||
- has_prefix(ins, PPS_REP, P_XRELEASE))
- return -1;
- break;
-
- case 0241:
- case 0242:
- case 0243:
- hleok = c & 3;
- break;
-
case4(0250):
length += is_sbyte32(opx) ? 1 : 4;
break;
@@ -986,6 +974,18 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
ins->vex_wlp = *codes++;
break;
+ case 0264:
+ if (has_prefix(ins, PPS_REP, P_XACQUIRE) ||
+ has_prefix(ins, PPS_REP, P_XRELEASE))
+ return -1;
+ break;
+
+ case 0265:
+ case 0266:
+ case 0267:
+ hleok = c & 3;
+ break;
+
case 0270:
ins->rex |= REX_V;
ins->vexreg = 0;
@@ -1566,9 +1566,6 @@ static void gencode(int32_t segment, int64_t offset, int bits,
offset++;
break;
- case4(0240):
- break;
-
case4(0250):
data = opx->offset;
if (opx->wrt == NO_SEG && opx->segment == NO_SEG &&
@@ -1619,6 +1616,9 @@ static void gencode(int32_t segment, int64_t offset, int bits,
}
break;
+ case4(0264):
+ break;
+
case4(0274):
{
uint64_t uv, um;
diff --git a/disasm.c b/disasm.c
index 6a61ad0..9090bdd 100644
--- a/disasm.c
+++ b/disasm.c
@@ -648,30 +648,6 @@ static int matches(const struct itemplate *t, uint8_t *data,
break;
}
- case 0240:
- break;
-
- case 0241:
- if (prefix->rep == 0xF3)
- drep = P_XRELEASE;
- break;
-
- case 0242:
- if (prefix->rep == 0xF2)
- drep = P_XACQUIRE;
- else if (prefix->rep == 0xF3)
- drep = P_XRELEASE;
- break;
-
- case 0243:
- if (prefix->lock == 0xF0) {
- if (prefix->rep == 0xF2)
- drep = P_XACQUIRE;
- else if (prefix->rep == 0xF3)
- drep = P_XRELEASE;
- }
- break;
-
case4(0250):
if (s_field_for == op1) {
opx->offset = gets8(data);
@@ -727,6 +703,30 @@ static int matches(const struct itemplate *t, uint8_t *data,
break;
}
+ case 0264:
+ break;
+
+ case 0265:
+ if (prefix->rep == 0xF3)
+ drep = P_XRELEASE;
+ break;
+
+ case 0266:
+ if (prefix->rep == 0xF2)
+ drep = P_XACQUIRE;
+ else if (prefix->rep == 0xF3)
+ drep = P_XRELEASE;
+ break;
+
+ case 0267:
+ if (prefix->lock == 0xF0) {
+ if (prefix->rep == 0xF2)
+ drep = P_XACQUIRE;
+ else if (prefix->rep == 0xF3)
+ drep = P_XRELEASE;
+ }
+ break;
+
case 0310:
if (asize != 16)
return false;
diff --git a/insns.pl b/insns.pl
index 694726c..5ae4594 100755
--- a/insns.pl
+++ b/insns.pl
@@ -707,10 +707,10 @@ sub byte_code_compile($$) {
'repe' => 0335,
'nohi' => 0325, # Use spl/bpl/sil/dil even without REX
'wait' => 0341, # Needs a wait prefix
- 'nohle' => 0240,
- 'hlexr' => 0241,
- 'hlenl' => 0242,
- 'hle' => 0243,
+ 'nohle' => 0264,
+ 'hlexr' => 0265,
+ 'hlenl' => 0266,
+ 'hle' => 0267,
# This instruction takes XMM VSIB
'vsibx' => 0374,
'vm32x' => 0374,