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| author | H. Peter Anvin <hpa@linux.intel.com> | 2014-02-19 14:55:54 -0800 |
|---|---|---|
| committer | H. Peter Anvin <hpa@linux.intel.com> | 2014-02-19 14:58:42 -0800 |
| commit | 0b7db57deb2240f4455bb24341636f352194ca44 (patch) | |
| tree | 1855216e8077237dbf66458551c6f39c15088539 | |
| parent | 31f23b05f42befcdbc7f2d9a8d65294d3ea6a5be (diff) | |
| download | nasm-0b7db57deb2240f4455bb24341636f352194ca44.tar.gz nasm-0b7db57deb2240f4455bb24341636f352194ca44.tar.bz2 nasm-0b7db57deb2240f4455bb24341636f352194ca44.zip | |
insns: add XSAVEC, XSAVES and XRSTORS instructions
Add the XSAVEC, XSAVES, and XRSTORS instructions from the Intel SDM
release 253665-050US (Feb 2014).
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
| -rw-r--r-- | doc/changes.src | 4 | ||||
| -rw-r--r-- | insns.dat | 6 |
2 files changed, 10 insertions, 0 deletions
diff --git a/doc/changes.src b/doc/changes.src index f4b2842..7e11f58 100644 --- a/doc/changes.src +++ b/doc/changes.src @@ -7,6 +7,10 @@ The NASM 2 series supports x86-64, and is the production version of NASM since 2007. +\S{cl-2.11.02} Version 2.11.02 + +\b Add the \c{XSAVEC}, \c{XSAVES} and \c{XRSTORS} family instructions. + \S{cl-2.11.01} Version 2.11.01 \b Allow instructions which implicitly uses \c{XMM0} (\c{VBLENDVPD}, @@ -1586,10 +1586,16 @@ XGETBV void [ 0f 01 d0] NEHALEM XSETBV void [ 0f 01 d1] NEHALEM,PRIV XSAVE mem [m: np 0f ae /4] NEHALEM XSAVE64 mem [m: o64 np 0f ae /4] LONG,NEHALEM +XSAVEC mem [m: np 0f c7 /4] FUTURE +XSAVEC64 mem [m: o64 np 0f c7 /4] LONG,FUTURE XSAVEOPT mem [m: np 0f ae /6] FUTURE XSAVEOPT64 mem [m: o64 np 0f ae /6] LONG,FUTURE +XSAVES mem [m: np 0f c7 /5] FUTURE +XSAVES64 mem [m: o64 np 0f c7 /5] LONG,FUTURE XRSTOR mem [m: np 0f ae /5] NEHALEM XRSTOR64 mem [m: o64 np 0f ae /5] LONG,NEHALEM +XRSTORS mem [m: np 0f c7 /3] FUTURE +XRSTORS64 mem [m: o64 np 0f c7 /3] LONG,FUTURE ; These instructions are not SSE-specific; they are ;# Generic memory operations |