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authorAnas Nashif <anas.nashif@intel.com>2013-04-14 01:07:52 -0700
committerAnas Nashif <anas.nashif@intel.com>2013-04-14 01:07:52 -0700
commit02a48f17aa3a8080563593ab849bd2458a0c3113 (patch)
treee683d520d73e96fcb7a6827026d23537c0817788
parent300d4816804c8ceb4a4601a49ec3ec479c1951b5 (diff)
downloadnasm-02a48f17aa3a8080563593ab849bd2458a0c3113.tar.gz
nasm-02a48f17aa3a8080563593ab849bd2458a0c3113.tar.bz2
nasm-02a48f17aa3a8080563593ab849bd2458a0c3113.zip
Imported Upstream version 2.10.07upstream/2.10.07upstream-2.10.07
-rw-r--r--Makefile.in41
-rw-r--r--Mkfiles/msvc.mak10
-rw-r--r--Mkfiles/netware.mak9
-rw-r--r--Mkfiles/openwcom.mak12
-rw-r--r--Mkfiles/owlinux.mak10
-rw-r--r--SubmittingPatches116
-rw-r--r--assemble.c514
-rwxr-xr-xconfigure566
-rw-r--r--configure.in9
-rwxr-xr-xdirectiv.pl2
-rw-r--r--disasm.c121
-rw-r--r--doc/Makefile2
-rw-r--r--doc/changes.src102
-rwxr-xr-xdoc/genps.pl9
-rw-r--r--doc/nasmdoc.src167
-rw-r--r--doc/nasmlogo.eps235
-rw-r--r--doc/psfonts.ph30
-rw-r--r--eval.c54
-rw-r--r--insns.dat4308
-rw-r--r--insns.h153
-rwxr-xr-xinsns.pl1042
-rw-r--r--insnsa.c8053
-rw-r--r--insnsb.c6280
-rw-r--r--insnsd.c15284
-rw-r--r--insnsi.h53
-rw-r--r--insnsn.c53
-rw-r--r--lcc/README52
-rw-r--r--lcc/bind.c23
-rw-r--r--lcc/lin-aout.c48
-rw-r--r--lcc/lin-elf.c49
-rw-r--r--lcc/x86nasm.md703
-rw-r--r--macros.c37
-rwxr-xr-xmacros.pl2
-rw-r--r--macros/ifunc.mac46
-rwxr-xr-xmisc/release17
-rwxr-xr-xmisc/tag-release8
-rw-r--r--nasm.14
-rw-r--r--nasm.c299
-rw-r--r--nasm.h486
-rw-r--r--nasm.nsi41
-rw-r--r--nasm.spec14
-rw-r--r--nasm.spec.in10
-rw-r--r--nasmlib.c41
-rw-r--r--nasmlib.h27
-rw-r--r--opflags.h331
-rw-r--r--output/outbin.c63
-rw-r--r--output/outcoff.c7
-rw-r--r--output/outelf.c4
-rw-r--r--output/outelf32.c47
-rw-r--r--output/outelf64.c81
-rw-r--r--output/outelfx32.c2194
-rw-r--r--output/outform.h13
-rw-r--r--output/outieee.c8
-rw-r--r--output/outmac64.c21
-rw-r--r--output/outobj.c8
-rw-r--r--parser.c153
-rw-r--r--perllib/phash.ph30
-rwxr-xr-xphash.pl28
-rwxr-xr-xpptok.pl2
-rw-r--r--preproc-nop.c184
-rw-r--r--preproc.c481
-rw-r--r--preproc.h6
-rw-r--r--quote.c2
-rw-r--r--rdoff/Makefile.in22
-rw-r--r--saa.c3
-rw-r--r--strfunc.c156
-rw-r--r--test/align13.asm3
-rw-r--r--test/align13s.asm4
-rw-r--r--test/alonesym-obj.asm3
-rw-r--r--test/avx2.asm1608
-rw-r--r--test/bcd.asm2
-rw-r--r--test/br2003451.asm2
-rw-r--r--test/br2030823.asm4
-rw-r--r--test/br3005117.asm2
-rw-r--r--test/br3026808.asm2
-rw-r--r--test/br3028880.asm2
-rw-r--r--test/br3058845.asm2
-rw-r--r--test/br3066383.asm2
-rw-r--r--test/br3074517.asm12
-rw-r--r--test/br3092924.asm25
-rw-r--r--test/br3104312.asm11
-rw-r--r--test/br3385573.asm11
-rw-r--r--test/hle.asm19
-rw-r--r--test/ilog2.asm271
-rw-r--r--test/imm64.asm50
-rw-r--r--test/jmp64.asm4
-rw-r--r--test/movd.asm12
-rw-r--r--test/movd64.asm15
-rw-r--r--test/prefix66.asm28
-rw-r--r--test/sreg.asm65
-rw-r--r--test/utf.asm52
-rw-r--r--test/vgather.asm76
-rw-r--r--tokens.dat14
-rw-r--r--tokhash.c3215
-rwxr-xr-xtokhash.pl2
-rw-r--r--version2
-rw-r--r--version.h8
-rw-r--r--version.mac8
-rw-r--r--version.mak6
-rw-r--r--version.nsh8
-rw-r--r--version.sed12
101 files changed, 28266 insertions, 20282 deletions
diff --git a/Makefile.in b/Makefile.in
index ed93b44..d7b4e22 100644
--- a/Makefile.in
+++ b/Makefile.in
@@ -36,15 +36,21 @@ MKDIR = mkdir
RM = rm
STRIP = strip
+FIND = find
# Binary suffixes
O = @OBJEXT@
X = @EXEEXT@
+# Debug stuff
+ifeq ($(TRACE),1)
+ CFLAGS += -DNASM_TRACE
+endif
+
.SUFFIXES: .c .i .s .$(O) .1 .man
-.PHONY: all doc rdf install clean distclean cleaner spotless install_rdf
-.PHONY: install_doc everything install_everything strip perlreq dist
+.PHONY: all doc rdf install clean distclean cleaner spotless install_rdf test
+.PHONY: install_doc everything install_everything strip perlreq dist tags TAGS
.c.$(O):
$(CC) -c $(ALL_CFLAGS) -o $@ $<
@@ -68,20 +74,21 @@ NASM = nasm.$(O) nasmlib.$(O) ver.$(O) \
output/nullout.$(O) \
output/outbin.$(O) output/outaout.$(O) output/outcoff.$(O) \
output/outelf.$(O) output/outelf32.$(O) output/outelf64.$(O) \
+ output/outelfx32.$(O) \
output/outobj.$(O) output/outas86.$(O) output/outrdf2.$(O) \
output/outdbg.$(O) output/outieee.$(O) output/outmac32.$(O) \
output/outmac64.$(O) preproc.$(O) quote.$(O) pptok.$(O) \
macros.$(O) listing.$(O) eval.$(O) exprlib.$(O) stdscan.$(O) \
strfunc.$(O) tokhash.$(O) regvals.$(O) regflags.$(O) \
ilog2.$(O) \
- lib/strlcpy.$(O)
+ lib/strlcpy.$(O) \
+ preproc-nop.$(O)
NDISASM = ndisasm.$(O) disasm.$(O) sync.$(O) nasmlib.$(O) ver.$(O) \
insnsd.$(O) insnsb.$(O) insnsn.$(O) regs.$(O) regdis.$(O)
#-- End File Lists --#
-all: nasm$(X) ndisasm$(X) nasm.man ndisasm.man
- cd rdoff && $(MAKE) all
+all: nasm$(X) ndisasm$(X) nasm.man ndisasm.man rdf
nasm$(X): $(NASM) $(XOBJS)
$(CC) $(LDFLAGS) -o nasm$(X) $(NASM) $(XOBJS) $(LIBS)
@@ -187,6 +194,7 @@ clean:
$(RM) -f lib/*.$(O) lib/*.s lib/*.i
$(RM) -f output/*.$(O) output/*.s output/*.i
$(RM) -f nasm$(X) ndisasm$(X)
+ $(RM) -f tags TAGS
cd rdoff && $(MAKE) clean
distclean: clean
@@ -207,8 +215,21 @@ spotless: distclean cleaner
strip:
$(STRIP) --strip-unneeded nasm$(X) ndisasm$(X)
-rdf:
- cd rdoff && $(MAKE)
+rdf: nasmlib.$(O)
+ cd rdoff && $(MAKE) all
+
+TAGS:
+ $(RM) -f TAGS
+ $(FIND) . -name '*.[hcS]' -print | xargs etags -a
+
+tags:
+ $(RM) -f tags
+ $(FIND) . -name '*.[hcS]' -print | xargs ctags -a
+
+cscope:
+ $(RM) -f cscope.out cscope.files
+ $(FIND) . -name '*.[hcS]' -print > cscope.files
+ cscope -b -f cscope.out
rdf_install install_rdf:
cd rdoff && $(MAKE) install
@@ -330,6 +351,10 @@ output/outelf64.$(O): output/outelf64.c compiler.h config.h directiv.h \
eval.h insnsi.h nasm.h nasmlib.h opflags.h output/dwarf.h output/elf.h \
output/outelf.h output/outform.h output/outlib.h output/stabs.h pptok.h \
preproc.h raa.h rbtree.h regs.h saa.h stdscan.h
+output/outelfx32.$(O): output/outelfx32.c compiler.h config.h directiv.h \
+ eval.h insnsi.h nasm.h nasmlib.h opflags.h output/dwarf.h output/elf.h \
+ output/outelf.h output/outform.h output/outlib.h output/stabs.h pptok.h \
+ preproc.h raa.h rbtree.h regs.h saa.h stdscan.h
output/outform.$(O): output/outform.c compiler.h config.h directiv.h \
insnsi.h nasm.h nasmlib.h opflags.h output/outform.h pptok.h preproc.h \
regs.h
@@ -355,6 +380,8 @@ parser.$(O): parser.c compiler.h config.h directiv.h eval.h float.h insns.h \
stdscan.h tables.h tokens.h
pptok.$(O): pptok.c compiler.h config.h hashtbl.h nasmlib.h pptok.h \
preproc.h
+preproc-nop.$(O): preproc-nop.c compiler.h config.h directiv.h insnsi.h \
+ nasm.h nasmlib.h opflags.h pptok.h preproc.h regs.h
preproc.$(O): preproc.c compiler.h config.h directiv.h eval.h hashtbl.h \
insnsi.h nasm.h nasmlib.h opflags.h pptok.h preproc.h quote.h regs.h \
stdscan.h tables.h tokens.h
diff --git a/Mkfiles/msvc.mak b/Mkfiles/msvc.mak
index f0aeaa9..65efd6c 100644
--- a/Mkfiles/msvc.mak
+++ b/Mkfiles/msvc.mak
@@ -43,13 +43,15 @@ NASM = nasm.$(O) nasmlib.$(O) ver.$(O) \
output/nullout.$(O) \
output/outbin.$(O) output/outaout.$(O) output/outcoff.$(O) \
output/outelf.$(O) output/outelf32.$(O) output/outelf64.$(O) \
+ output/outelfx32.$(O) \
output/outobj.$(O) output/outas86.$(O) output/outrdf2.$(O) \
output/outdbg.$(O) output/outieee.$(O) output/outmac32.$(O) \
output/outmac64.$(O) preproc.$(O) quote.$(O) pptok.$(O) \
macros.$(O) listing.$(O) eval.$(O) exprlib.$(O) stdscan.$(O) \
strfunc.$(O) tokhash.$(O) regvals.$(O) regflags.$(O) \
ilog2.$(O) \
- lib/strlcpy.$(O)
+ lib/strlcpy.$(O) \
+ preproc-nop.$(O)
NDISASM = ndisasm.$(O) disasm.$(O) sync.$(O) nasmlib.$(O) ver.$(O) \
insnsd.$(O) insnsb.$(O) insnsn.$(O) regs.$(O) regdis.$(O)
@@ -258,6 +260,10 @@ output/outelf64.$(O): output/outelf64.c compiler.h directiv.h eval.h \
insnsi.h nasm.h nasmlib.h opflags.h output/dwarf.h output/elf.h \
output/outelf.h output/outform.h output/outlib.h output/stabs.h pptok.h \
preproc.h raa.h rbtree.h regs.h saa.h stdscan.h
+output/outelfx32.$(O): output/outelfx32.c compiler.h directiv.h eval.h \
+ insnsi.h nasm.h nasmlib.h opflags.h output/dwarf.h output/elf.h \
+ output/outelf.h output/outform.h output/outlib.h output/stabs.h pptok.h \
+ preproc.h raa.h rbtree.h regs.h saa.h stdscan.h
output/outform.$(O): output/outform.c compiler.h directiv.h insnsi.h nasm.h \
nasmlib.h opflags.h output/outform.h pptok.h preproc.h regs.h
output/outieee.$(O): output/outieee.c compiler.h directiv.h insnsi.h nasm.h \
@@ -281,6 +287,8 @@ parser.$(O): parser.c compiler.h directiv.h eval.h float.h insns.h insnsi.h \
nasm.h nasmlib.h opflags.h parser.h pptok.h preproc.h regs.h stdscan.h \
tables.h tokens.h
pptok.$(O): pptok.c compiler.h hashtbl.h nasmlib.h pptok.h preproc.h
+preproc-nop.$(O): preproc-nop.c compiler.h directiv.h insnsi.h nasm.h \
+ nasmlib.h opflags.h pptok.h preproc.h regs.h
preproc.$(O): preproc.c compiler.h directiv.h eval.h hashtbl.h insnsi.h \
nasm.h nasmlib.h opflags.h pptok.h preproc.h quote.h regs.h stdscan.h \
tables.h tokens.h
diff --git a/Mkfiles/netware.mak b/Mkfiles/netware.mak
index bb8b715..aa9532e 100644
--- a/Mkfiles/netware.mak
+++ b/Mkfiles/netware.mak
@@ -39,13 +39,15 @@ NASM = nasm.o nasmlib.o ver.o \
nullout.o \
outbin.o outaout.o outcoff.o \
outelf.o outelf32.o outelf64.o \
+ outelfx32.o \
outobj.o outas86.o outrdf2.o \
outdbg.o outieee.o outmac32.o \
outmac64.o preproc.o quote.o pptok.o \
macros.o listing.o eval.o exprlib.o stdscan.o \
strfunc.o tokhash.o regvals.o regflags.o \
ilog2.o \
- strlcpy.o
+ strlcpy.o \
+ preproc-nop.o
NDISASM = ndisasm.o disasm.o sync.o nasmlib.o ver.o \
insnsd.o insnsb.o insnsn.o regs.o regdis.o
@@ -193,6 +195,9 @@ outelf32.o: outelf32.c compiler.h config.h directiv.h eval.h insnsi.h nasm.h \
outelf64.o: outelf64.c compiler.h config.h directiv.h eval.h insnsi.h nasm.h \
nasmlib.h opflags.h dwarf.h elf.h outelf.h outform.h outlib.h stabs.h \
pptok.h preproc.h raa.h rbtree.h regs.h saa.h stdscan.h
+outelfx32.o: outelfx32.c compiler.h config.h directiv.h eval.h insnsi.h \
+ nasm.h nasmlib.h opflags.h dwarf.h elf.h outelf.h outform.h outlib.h \
+ stabs.h pptok.h preproc.h raa.h rbtree.h regs.h saa.h stdscan.h
outform.o: outform.c compiler.h config.h directiv.h insnsi.h nasm.h \
nasmlib.h opflags.h outform.h pptok.h preproc.h regs.h
outieee.o: outieee.c compiler.h config.h directiv.h insnsi.h nasm.h \
@@ -212,6 +217,8 @@ parser.o: parser.c compiler.h config.h directiv.h eval.h float.h insns.h \
insnsi.h nasm.h nasmlib.h opflags.h parser.h pptok.h preproc.h regs.h \
stdscan.h tables.h tokens.h
pptok.o: pptok.c compiler.h config.h hashtbl.h nasmlib.h pptok.h preproc.h
+preproc-nop.o: preproc-nop.c compiler.h config.h directiv.h insnsi.h nasm.h \
+ nasmlib.h opflags.h pptok.h preproc.h regs.h
preproc.o: preproc.c compiler.h config.h directiv.h eval.h hashtbl.h \
insnsi.h nasm.h nasmlib.h opflags.h pptok.h preproc.h quote.h regs.h \
stdscan.h tables.h tokens.h
diff --git a/Mkfiles/openwcom.mak b/Mkfiles/openwcom.mak
index ea2b9cf..f70e59b 100644
--- a/Mkfiles/openwcom.mak
+++ b/Mkfiles/openwcom.mak
@@ -55,13 +55,15 @@ NASM = nasm.$(O) nasmlib.$(O) ver.$(O) &
output/nullout.$(O) &
output/outbin.$(O) output/outaout.$(O) output/outcoff.$(O) &
output/outelf.$(O) output/outelf32.$(O) output/outelf64.$(O) &
+ output/outelfx32.$(O) &
output/outobj.$(O) output/outas86.$(O) output/outrdf2.$(O) &
output/outdbg.$(O) output/outieee.$(O) output/outmac32.$(O) &
output/outmac64.$(O) preproc.$(O) quote.$(O) pptok.$(O) &
macros.$(O) listing.$(O) eval.$(O) exprlib.$(O) stdscan.$(O) &
strfunc.$(O) tokhash.$(O) regvals.$(O) regflags.$(O) &
ilog2.$(O) &
- lib/strlcpy.$(O)
+ lib/strlcpy.$(O) &
+ preproc-nop.$(O)
NDISASM = ndisasm.$(O) disasm.$(O) sync.$(O) nasmlib.$(O) ver.$(O) &
insnsd.$(O) insnsb.$(O) insnsn.$(O) regs.$(O) regdis.$(O)
@@ -81,7 +83,7 @@ win32: .SYMBOLIC
@%make all
os2: .SYMBOLIC
- @set TARGET_CFLAGS=-bt=NT -I"$(%WATCOM)/h" -I"$(%WATCOM)/h/os2"
+ @set TARGET_CFLAGS=-bt=OS2 -I"$(%WATCOM)/h" -I"$(%WATCOM)/h/os2"
@set TARGET_LFLAGS=sys os2v2
@%make all
@@ -332,6 +334,10 @@ output/outelf64.$(O): output/outelf64.c compiler.h config.h directiv.h &
eval.h insnsi.h nasm.h nasmlib.h opflags.h output/dwarf.h output/elf.h &
output/outelf.h output/outform.h output/outlib.h output/stabs.h pptok.h &
preproc.h raa.h rbtree.h regs.h saa.h stdscan.h
+output/outelfx32.$(O): output/outelfx32.c compiler.h config.h directiv.h &
+ eval.h insnsi.h nasm.h nasmlib.h opflags.h output/dwarf.h output/elf.h &
+ output/outelf.h output/outform.h output/outlib.h output/stabs.h pptok.h &
+ preproc.h raa.h rbtree.h regs.h saa.h stdscan.h
output/outform.$(O): output/outform.c compiler.h config.h directiv.h &
insnsi.h nasm.h nasmlib.h opflags.h output/outform.h pptok.h preproc.h &
regs.h
@@ -357,6 +363,8 @@ parser.$(O): parser.c compiler.h config.h directiv.h eval.h float.h insns.h &
stdscan.h tables.h tokens.h
pptok.$(O): pptok.c compiler.h config.h hashtbl.h nasmlib.h pptok.h &
preproc.h
+preproc-nop.$(O): preproc-nop.c compiler.h config.h directiv.h insnsi.h &
+ nasm.h nasmlib.h opflags.h pptok.h preproc.h regs.h
preproc.$(O): preproc.c compiler.h config.h directiv.h eval.h hashtbl.h &
insnsi.h nasm.h nasmlib.h opflags.h pptok.h preproc.h quote.h regs.h &
stdscan.h tables.h tokens.h
diff --git a/Mkfiles/owlinux.mak b/Mkfiles/owlinux.mak
index 6979876..b655f9c 100644
--- a/Mkfiles/owlinux.mak
+++ b/Mkfiles/owlinux.mak
@@ -66,13 +66,15 @@ NASM = nasm.$(O) nasmlib.$(O) ver.$(O) \
output/nullout.$(O) \
output/outbin.$(O) output/outaout.$(O) output/outcoff.$(O) \
output/outelf.$(O) output/outelf32.$(O) output/outelf64.$(O) \
+ output/outelfx32.$(O) \
output/outobj.$(O) output/outas86.$(O) output/outrdf2.$(O) \
output/outdbg.$(O) output/outieee.$(O) output/outmac32.$(O) \
output/outmac64.$(O) preproc.$(O) quote.$(O) pptok.$(O) \
macros.$(O) listing.$(O) eval.$(O) exprlib.$(O) stdscan.$(O) \
strfunc.$(O) tokhash.$(O) regvals.$(O) regflags.$(O) \
ilog2.$(O) \
- lib/strlcpy.$(O)
+ lib/strlcpy.$(O) \
+ preproc-nop.$(O)
NDISASM = ndisasm.$(O) disasm.$(O) sync.$(O) nasmlib.$(O) ver.$(O) \
insnsd.$(O) insnsb.$(O) insnsn.$(O) regs.$(O) regdis.$(O)
@@ -297,6 +299,10 @@ output/outelf64.$(O): output/outelf64.c compiler.h directiv.h eval.h \
insnsi.h nasm.h nasmlib.h opflags.h output/dwarf.h output/elf.h \
output/outelf.h output/outform.h output/outlib.h output/stabs.h pptok.h \
preproc.h raa.h rbtree.h regs.h saa.h stdscan.h
+output/outelfx32.$(O): output/outelfx32.c compiler.h directiv.h eval.h \
+ insnsi.h nasm.h nasmlib.h opflags.h output/dwarf.h output/elf.h \
+ output/outelf.h output/outform.h output/outlib.h output/stabs.h pptok.h \
+ preproc.h raa.h rbtree.h regs.h saa.h stdscan.h
output/outform.$(O): output/outform.c compiler.h directiv.h insnsi.h nasm.h \
nasmlib.h opflags.h output/outform.h pptok.h preproc.h regs.h
output/outieee.$(O): output/outieee.c compiler.h directiv.h insnsi.h nasm.h \
@@ -320,6 +326,8 @@ parser.$(O): parser.c compiler.h directiv.h eval.h float.h insns.h insnsi.h \
nasm.h nasmlib.h opflags.h parser.h pptok.h preproc.h regs.h stdscan.h \
tables.h tokens.h
pptok.$(O): pptok.c compiler.h hashtbl.h nasmlib.h pptok.h preproc.h
+preproc-nop.$(O): preproc-nop.c compiler.h directiv.h insnsi.h nasm.h \
+ nasmlib.h opflags.h pptok.h preproc.h regs.h
preproc.$(O): preproc.c compiler.h directiv.h eval.h hashtbl.h insnsi.h \
nasm.h nasmlib.h opflags.h pptok.h preproc.h quote.h regs.h stdscan.h \
tables.h tokens.h
diff --git a/SubmittingPatches b/SubmittingPatches
new file mode 100644
index 0000000..168ab64
--- /dev/null
+++ b/SubmittingPatches
@@ -0,0 +1,116 @@
+How to submit patches into the NASM
+===================================
+
+Actually the rules are pretty simple
+
+Obtaining the source code
+-------------------------
+
+The NASM sources are tracked by Git SCM at http://repo.or.cz/w/nasm.git
+repository. You either could download packed sources or use git tool itself
+
+ git clone git://repo.or.cz/nasm.git
+
+Changin the source code
+-----------------------
+
+When you change the NASM source code keep in mind -- we prefer tabs and
+indentations to be 4 characters width, space filled.
+
+Other "rules" could be learned from NASM sources -- just make your code
+to look similar.
+
+Producing patch
+---------------
+
+There are at least two ways to make it right.
+
+ 1) git format-patch
+
+ You might need to read documentation on Git SCM how to prepare patch
+ for mail submission. Take a look on http://book.git-scm.com/ and/or
+ http://git-scm.com/documentation for details. It should not be hard
+ at all.
+
+ 2) Use "diff -up"
+
+ Use "diff -up" or "diff -uprN" to create patches.
+
+Signing your work
+-----------------
+
+To improve tracking of who did what we've introduced a "sign-off" procedure
+on patches that are being emailed around.
+
+The sign-off is a simple line at the end of the explanation for the
+patch, which certifies that you wrote it or otherwise have the right to
+pass it on as a open-source patch. The rules are pretty simple: if you
+can certify the below:
+
+ Developer's Certificate of Origin 1.1
+
+ By making a contribution to this project, I certify that:
+
+ (a) The contribution was created in whole or in part by me and I
+ have the right to submit it under the open source license
+ indicated in the file; or
+
+ (b) The contribution is based upon previous work that, to the best
+ of my knowledge, is covered under an appropriate open source
+ license and I have the right under that license to submit that
+ work with modifications, whether created in whole or in part
+ by me, under the same open source license (unless I am
+ permitted to submit under a different license), as indicated
+ in the file; or
+
+ (c) The contribution was provided directly to me by some other
+ person who certified (a), (b) or (c) and I have not modified
+ it.
+
+ (d) I understand and agree that this project and the contribution
+ are public and that a record of the contribution (including all
+ personal information I submit with it, including my sign-off) is
+ maintained indefinitely and may be redistributed consistent with
+ this project or the open source license(s) involved.
+
+then you just add a line saying
+
+ Signed-off-by: Random J Developer <random@developer.example.org>
+
+using your real name (please, no pseudonyms or anonymous contributions if
+it possible)
+
+An example of patch message
+---------------------------
+
+From: Random J Developer <random@developer.example.org>
+Subject: [PATCH] Short patch description
+
+Long patch description (could be skipped if patch
+is trivial enough)
+
+Signed-off-by: Random J Developer <random@developer.example.org>
+---
+Patch body here
+
+Mailing patches
+---------------
+
+The patches should be sent to NASM development mailing list
+
+ nasm-devel@lists.sourceforge.net
+
+Please make sure the email client you're using doesn't screw
+your patch (line wrapping and so on).
+
+Wait for response
+-----------------
+
+Be patient. Most NASM developers are pretty busy people so if
+there is no immediate response on your patch -- don't
+be surprised, sometimes a patch may fly around a week(s) before
+gets reviewed. But definitely the patches will not go to /dev/null.
+
+ ---
+ With best regards,
+ NASM-team
diff --git a/assemble.c b/assemble.c
index 1ee7f7f..4f791ec 100644
--- a/assemble.c
+++ b/assemble.c
@@ -1,6 +1,6 @@
/* ----------------------------------------------------------------------- *
*
- * Copyright 1996-2010 The NASM Authors - All Rights Reserved
+ * Copyright 1996-2012 The NASM Authors - All Rights Reserved
* See the file AUTHORS included with the NASM distribution for
* the specific copyright holders.
*
@@ -66,18 +66,11 @@
* \150..\153 - an immediate dword or signed byte for operand 0..3
* \154..\157 - or 2 (s-field) into opcode byte if operand 0..3
* is a signed byte rather than a dword. Opcode byte follows.
- * \160..\163 - this instruction uses DREX rather than REX, with the
- * OC0 field set to 0, and the dest field taken from
- * operand 0..3.
- * \164..\167 - this instruction uses DREX rather than REX, with the
- * OC0 field set to 1, and the dest field taken from
- * operand 0..3.
- * \171 - placement of DREX suffix in the absence of an EA
* \172\ab - the register number from operand a in bits 7..4, with
* the 4-bit immediate from operand b in bits 3..0.
* \173\xab - the register number from operand a in bits 7..4, with
* the value b in bits 3..0.
- * \174\a - the register number from operand a in bits 7..4, and
+ * \174..\177 - the register number from operand 0..3 in bits 7..4, and
* an arbitrary value in bits 3..0 (assembled as zero.)
* \2ab - a ModRM, calculated on EA in operand a, with the spare
* field equal to digit b.
@@ -104,6 +97,9 @@
*
* t = 0 for VEX (C4/C5), t = 1 for XOP (8F).
*
+ * \271 - instruction takes XRELEASE (F3) with or without lock
+ * \272 - instruction takes XACQUIRE/XRELEASE with or without lock
+ * \273 - instruction takes XACQUIRE/XRELEASE with lock only
* \274..\277 - a signed byte immediate operand, from operand 0..3,
* which is to be extended to the operand size.
* \310 - indicates fixed 16-bit address size, i.e. optional 0x67.
@@ -130,8 +126,8 @@
* \333 - REP prefix (0xF3 byte) used as opcode extension.
* \334 - LOCK prefix used as REX.R (used in non-64-bit mode)
* \335 - disassemble a rep (0xF3 byte) prefix as repe not rep.
- * \336 - force a REP(E) prefix (0xF2) even if not specified.
- * \337 - force a REPNE prefix (0xF3) even if not specified.
+ * \336 - force a REP(E) prefix (0xF3) even if not specified.
+ * \337 - force a REPNE prefix (0xF2) even if not specified.
* \336-\337 are still listed as prefixes in the disassembler.
* \340 - reserve <operand 0> bytes of uninitialized storage.
* Operand 0 had better be a segmentless constant.
@@ -148,10 +144,12 @@
* \365 - address-size prefix (0x67) not permitted
* \366 - operand-size prefix (0x66) used as opcode extension
* \367 - address-size prefix (0x67) used as opcode extension
- * \370,\371,\372 - match only if operand 0 meets byte jump criteria.
+ * \370,\371 - match only if operand 0 meets byte jump criteria.
* 370 is used for Jcc, 371 is used for JMP.
* \373 - assemble 0x03 if bits==16, 0x05 if bits==32;
* used for conditional jump over longer jump
+ * \374 - this instruction takes an XMM VSIB memory EA
+ * \375 - this instruction takes an YMM VSIB memory EA
*/
#include "compiler.h"
@@ -176,6 +174,7 @@ enum match_result {
MERR_OPSIZEMISMATCH,
MERR_BADCPU,
MERR_BADMODE,
+ MERR_BADHLE,
/*
* Matching success; the conditional ones first
*/
@@ -184,18 +183,26 @@ enum match_result {
};
typedef struct {
- int sib_present; /* is a SIB byte necessary? */
- int bytes; /* # of bytes of offset needed */
- int size; /* lazy - this is sib+bytes+1 */
- uint8_t modrm, sib, rex, rip; /* the bytes themselves */
+ enum ea_type type; /* what kind of EA is this? */
+ int sib_present; /* is a SIB byte necessary? */
+ int bytes; /* # of bytes of offset needed */
+ int size; /* lazy - this is sib+bytes+1 */
+ uint8_t modrm, sib, rex, rip; /* the bytes themselves */
} ea;
+#define GEN_SIB(scale, index, base) \
+ (((scale) << 6) | ((index) << 3) | ((base)))
+
+#define GEN_MODRM(mod, reg, rm) \
+ (((mod) << 6) | (((reg) & 7) << 3) | ((rm) & 7))
+
static uint32_t cpu; /* cpu level received from nasm.c */
static efunc errfunc;
static struct ofmt *outfmt;
static ListGen *list;
-static int64_t calcsize(int32_t, int64_t, int, insn *, const uint8_t *);
+static int64_t calcsize(int32_t, int64_t, int, insn *,
+ const struct itemplate *);
static void gencode(int32_t segment, int64_t offset, int bits,
insn * ins, const struct itemplate *temp,
int64_t insn_end);
@@ -207,10 +214,11 @@ static opflags_t regflag(const operand *);
static int32_t regval(const operand *);
static int rexflags(int, opflags_t, int);
static int op_rexflags(const operand *, int);
-static ea *process_ea(operand *, ea *, int, int, int, opflags_t);
static void add_asp(insn *, int);
-static int has_prefix(insn * ins, enum prefix_pos pos, enum prefixes prefix)
+static enum ea_type process_ea(operand *, ea *, int, int, int, opflags_t);
+
+static int has_prefix(insn * ins, enum prefix_pos pos, int prefix)
{
return ins->prefixes[pos] == prefix;
}
@@ -312,19 +320,20 @@ static void out(int64_t offset, int32_t segto, const void *data,
}
static bool jmp_match(int32_t segment, int64_t offset, int bits,
- insn * ins, const uint8_t *code)
+ insn * ins, const struct itemplate *temp)
{
int64_t isize;
+ const uint8_t *code = temp->code;
uint8_t c = code[0];
- if ((c != 0370 && c != 0371) || (ins->oprs[0].type & STRICT))
+ if (((c & ~1) != 0370) || (ins->oprs[0].type & STRICT))
return false;
if (!optimizing)
return false;
if (optimizing < 0 && c == 0371)
return false;
- isize = calcsize(segment, offset, bits, ins, code);
+ isize = calcsize(segment, offset, bits, ins, temp);
if (ins->oprs[0].opflags & OPFLAG_UNKNOWN)
/* Be optimistic in pass 1 */
@@ -486,8 +495,7 @@ int64_t assemble(int32_t segment, int64_t offset, int bits, uint32_t cp,
if (m == MOK_GOOD) {
/* Matches! */
- int64_t insn_size = calcsize(segment, offset, bits,
- instruction, temp->code);
+ int64_t insn_size = calcsize(segment, offset, bits, instruction, temp);
itimes = instruction->times;
if (insn_size < 0) /* shouldn't be, on pass two */
error(ERR_PANIC, "errors made it through from pass one");
@@ -504,11 +512,13 @@ int64_t assemble(int32_t segment, int64_t offset, int bits, uint32_t cp,
break;
case P_REPNE:
case P_REPNZ:
+ case P_XACQUIRE:
c = 0xF2;
break;
case P_REPE:
case P_REPZ:
case P_REP:
+ case P_XRELEASE:
c = 0xF3;
break;
case R_CS:
@@ -715,10 +725,9 @@ int64_t insn_size(int32_t segment, int64_t offset, int bits, uint32_t cp,
if (m == MOK_GOOD) {
/* we've matched an instruction. */
int64_t isize;
- const uint8_t *codes = temp->code;
int j;
- isize = calcsize(segment, offset, bits, instruction, codes);
+ isize = calcsize(segment, offset, bits, instruction, temp);
if (isize < 0)
return -1;
for (j = 0; j < MAXPREFIX; j++) {
@@ -784,20 +793,64 @@ static bool is_sbyte32(operand *o)
return v >= -128 && v <= 127;
}
+static void bad_hle_warn(const insn * ins, uint8_t hleok)
+{
+ enum prefixes rep_pfx = ins->prefixes[PPS_REP];
+ enum whatwarn { w_none, w_lock, w_inval } ww;
+ static const enum whatwarn warn[2][4] =
+ {
+ { w_inval, w_inval, w_none, w_lock }, /* XACQUIRE */
+ { w_inval, w_none, w_none, w_lock }, /* XRELEASE */
+ };
+ unsigned int n;
+
+ n = (unsigned int)rep_pfx - P_XACQUIRE;
+ if (n > 1)
+ return; /* Not XACQUIRE/XRELEASE */
+
+ ww = warn[n][hleok];
+ if (!is_class(MEMORY, ins->oprs[0].type))
+ ww = w_inval; /* HLE requires operand 0 to be memory */
+
+ switch (ww) {
+ case w_none:
+ break;
+
+ case w_lock:
+ if (ins->prefixes[PPS_LOCK] != P_LOCK) {
+ errfunc(ERR_WARNING | ERR_WARN_HLE | ERR_PASS2,
+ "%s with this instruction requires lock",
+ prefix_name(rep_pfx));
+ }
+ break;
+
+ case w_inval:
+ errfunc(ERR_WARNING | ERR_WARN_HLE | ERR_PASS2,
+ "%s invalid with this instruction",
+ prefix_name(rep_pfx));
+ break;
+ }
+}
+
/* Common construct */
#define case4(x) case (x): case (x)+1: case (x)+2: case (x)+3
static int64_t calcsize(int32_t segment, int64_t offset, int bits,
- insn * ins, const uint8_t *codes)
+ insn * ins, const struct itemplate *temp)
{
+ const uint8_t *codes = temp->code;
int64_t length = 0;
uint8_t c;
int rex_mask = ~0;
int op1, op2;
struct operand *opx;
uint8_t opex = 0;
+ enum ea_type eat;
+ uint8_t hleok = 0;
+ bool lockcheck = true;
ins->rex = 0; /* Ensure REX is reset */
+ eat = EA_SCALAR; /* Expect a scalar EA */
if (ins->prefixes[PPS_OSIZE] == P_O64)
ins->rex |= REX_W;
@@ -902,28 +955,16 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
length++;
break;
- case4(0160):
- length++;
- ins->rex |= REX_D;
- ins->drexdst = regval(opx);
- break;
-
- case4(0164):
- length++;
- ins->rex |= REX_D|REX_OC;
- ins->drexdst = regval(opx);
- break;
-
- case 0171:
- break;
-
case 0172:
case 0173:
- case 0174:
codes++;
length++;
break;
+ case4(0174):
+ length++;
+ break;
+
case4(0250):
length += is_sbyte32(opx) ? 1 : 4;
break;
@@ -934,18 +975,24 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
case4(0260):
ins->rex |= REX_V;
- ins->drexdst = regval(opx);
+ ins->vexreg = regval(opx);
ins->vex_cm = *codes++;
ins->vex_wlp = *codes++;
break;
case 0270:
ins->rex |= REX_V;
- ins->drexdst = 0;
+ ins->vexreg = 0;
ins->vex_cm = *codes++;
ins->vex_wlp = *codes++;
break;
+ case 0271:
+ case 0272:
+ case 0273:
+ hleok = c & 3;
+ break;
+
case4(0274):
length++;
break;
@@ -976,12 +1023,28 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
break;
case 0320:
- length += (bits != 16);
+ {
+ enum prefixes pfx = ins->prefixes[PPS_OSIZE];
+ if (pfx == P_O16)
+ break;
+ if (pfx != P_none)
+ errfunc(ERR_WARNING | ERR_PASS2, "invalid operand size prefix");
+ else
+ ins->prefixes[PPS_OSIZE] = P_O16;
break;
+ }
case 0321:
- length += (bits == 16);
+ {
+ enum prefixes pfx = ins->prefixes[PPS_OSIZE];
+ if (pfx == P_O32)
+ break;
+ if (pfx != P_none)
+ errfunc(ERR_WARNING | ERR_PASS2, "invalid operand size prefix");
+ else
+ ins->prefixes[PPS_OSIZE] = P_O32;
break;
+ }
case 0322:
break;
@@ -1018,13 +1081,13 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
break;
case 0336:
- if (!ins->prefixes[PPS_LREP])
- ins->prefixes[PPS_LREP] = P_REP;
+ if (!ins->prefixes[PPS_REP])
+ ins->prefixes[PPS_REP] = P_REP;
break;
case 0337:
- if (!ins->prefixes[PPS_LREP])
- ins->prefixes[PPS_LREP] = P_REPNE;
+ if (!ins->prefixes[PPS_REP])
+ ins->prefixes[PPS_REP] = P_REPNE;
break;
case 0340:
@@ -1071,6 +1134,14 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
length++;
break;
+ case 0374:
+ eat = EA_XMMVSIB;
+ break;
+
+ case 0375:
+ eat = EA_YMMVSIB;
+ break;
+
case4(0100):
case4(0110):
case4(0120):
@@ -1099,8 +1170,8 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
rflags = 0;
rfield = c & 7;
}
- if (!process_ea(opy, &ea_data, bits,
- ins->addr_size, rfield, rflags)) {
+ if (process_ea(opy, &ea_data, bits,ins->addr_size,
+ rfield, rflags) != eat) {
errfunc(ERR_NONFATAL, "invalid effective address");
return -1;
} else {
@@ -1148,7 +1219,7 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
break;
}
- if (bits != 64 && ((ins->rex & bad32) || ins->drexdst > 7)) {
+ if (bits != 64 && ((ins->rex & bad32) || ins->vexreg > 7)) {
errfunc(ERR_NONFATAL, "invalid operands in non-64-bit mode");
return -1;
}
@@ -1156,17 +1227,6 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
length += 3;
else
length += 2;
- } else if (ins->rex & REX_D) {
- if (ins->rex & REX_H) {
- errfunc(ERR_NONFATAL, "cannot use high register in drex instruction");
- return -1;
- }
- if (bits != 64 && ((ins->rex & (REX_R|REX_W|REX_X|REX_B)) ||
- ins->drexdst > 7)) {
- errfunc(ERR_NONFATAL, "invalid operands in non-64-bit mode");
- return -1;
- }
- length++;
} else if (ins->rex & REX_REAL) {
if (ins->rex & REX_H) {
errfunc(ERR_NONFATAL, "cannot use high register in rex instruction");
@@ -1177,7 +1237,8 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
!(ins->rex & (REX_P|REX_W|REX_X|REX_B)) &&
cpu >= IF_X86_64) {
/* LOCK-as-REX.R */
- assert_no_prefix(ins, PPS_LREP);
+ assert_no_prefix(ins, PPS_LOCK);
+ lockcheck = false; /* Already errored, no need for warning */
length++;
} else {
errfunc(ERR_NONFATAL, "invalid operands in non-64-bit mode");
@@ -1185,11 +1246,19 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
}
}
+ if (has_prefix(ins, PPS_LOCK, P_LOCK) && lockcheck &&
+ (!(temp->flags & IF_LOCK) || !is_class(MEMORY, ins->oprs[0].type))) {
+ errfunc(ERR_WARNING | ERR_WARN_LOCK | ERR_PASS2 ,
+ "instruction is not lockable");
+ }
+
+ bad_hle_warn(ins, hleok);
+
return length;
}
#define EMIT_REX() \
- if (!(ins->rex & (REX_D|REX_V)) && (ins->rex & REX_REAL) && (bits == 64)) { \
+ if (!(ins->rex & REX_V) && (ins->rex & REX_REAL) && (bits == 64)) { \
ins->rex = (ins->rex & REX_REAL)|REX_P; \
out(offset, segment, &ins->rex, OUT_RAWDATA, 1, NO_SEG, NO_SEG); \
ins->rex = 0; \
@@ -1200,7 +1269,7 @@ static void gencode(int32_t segment, int64_t offset, int bits,
insn * ins, const struct itemplate *temp,
int64_t insn_end)
{
- static char condval[] = { /* conditional opcodes */
+ static const char condval[] = { /* conditional opcodes */
0x7, 0x3, 0x2, 0x6, 0x2, 0x4, 0xF, 0xD, 0xC, 0xE, 0x6, 0x2,
0x3, 0x7, 0x3, 0x5, 0xE, 0xC, 0xD, 0xF, 0x1, 0xB, 0x9, 0x5,
0x0, 0xA, 0xA, 0xB, 0x8, 0x4
@@ -1213,6 +1282,7 @@ static void gencode(int32_t segment, int64_t offset, int bits,
struct operand *opx;
const uint8_t *codes = temp->code;
uint8_t opex = 0;
+ enum ea_type eat = EA_SCALAR;
while (*codes) {
c = *codes++;
@@ -1468,20 +1538,6 @@ static void gencode(int32_t segment, int64_t offset, int bits,
offset++;
break;
- case4(0160):
- case4(0164):
- break;
-
- case 0171:
- bytes[0] =
- (ins->drexdst << 4) |
- (ins->rex & REX_OC ? 0x08 : 0) |
- (ins->rex & (REX_R|REX_X|REX_B));
- ins->rex = 0;
- out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, NO_SEG);
- offset++;
- break;
-
case 0172:
c = *codes++;
opx = &ins->oprs[c >> 3];
@@ -1511,9 +1567,7 @@ static void gencode(int32_t segment, int64_t offset, int bits,
offset++;
break;
- case 0174:
- c = *codes++;
- opx = &ins->oprs[c];
+ case4(0174):
bytes[0] = nasm_regvals[opx->basereg] << 4;
out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, NO_SEG);
offset++;
@@ -1557,18 +1611,23 @@ static void gencode(int32_t segment, int64_t offset, int bits,
bytes[0] = (ins->vex_cm >> 6) ? 0x8f : 0xc4;
bytes[1] = (ins->vex_cm & 31) | ((~ins->rex & 7) << 5);
bytes[2] = ((ins->rex & REX_W) << (7-3)) |
- ((~ins->drexdst & 15)<< 3) | (ins->vex_wlp & 07);
+ ((~ins->vexreg & 15)<< 3) | (ins->vex_wlp & 07);
out(offset, segment, &bytes, OUT_RAWDATA, 3, NO_SEG, NO_SEG);
offset += 3;
} else {
bytes[0] = 0xc5;
bytes[1] = ((~ins->rex & REX_R) << (7-2)) |
- ((~ins->drexdst & 15) << 3) | (ins->vex_wlp & 07);
+ ((~ins->vexreg & 15) << 3) | (ins->vex_wlp & 07);
out(offset, segment, &bytes, OUT_RAWDATA, 2, NO_SEG, NO_SEG);
offset += 2;
}
break;
+ case 0271:
+ case 0272:
+ case 0273:
+ break;
+
case4(0274):
{
uint64_t uv, um;
@@ -1636,32 +1695,8 @@ static void gencode(int32_t segment, int64_t offset, int bits,
break;
case 0320:
- {
- enum prefixes pfx = ins->prefixes[PPS_OSIZE];
- if (pfx != P_O16 && pfx != P_none)
- nasm_error(ERR_WARNING, "Invalid operand size prefix");
- if (pfx != P_O16 && bits != 16) {
- ins->prefixes[PPS_OSIZE] = P_O16;
- *bytes = 0x66;
- out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, NO_SEG);
- offset += 1;
- }
- break;
- }
-
case 0321:
- {
- enum prefixes pfx = ins->prefixes[PPS_OSIZE];
- if (pfx != P_O32 && pfx != P_none)
- nasm_error(ERR_WARNING, "Invalid operand size prefix");
- if (pfx != P_O32 && bits == 16) {
- ins->prefixes[PPS_OSIZE] = P_O32;
- *bytes = 0x66;
- out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, NO_SEG);
- offset += 1;
- }
break;
- }
case 0322:
case 0323:
@@ -1792,7 +1827,6 @@ static void gencode(int32_t segment, int64_t offset, int bits,
case 0370:
case 0371:
- case 0372:
break;
case 0373:
@@ -1801,6 +1835,14 @@ static void gencode(int32_t segment, int64_t offset, int bits,
offset += 1;
break;
+ case 0374:
+ eat = EA_XMMVSIB;
+ break;
+
+ case 0375:
+ eat = EA_YMMVSIB;
+ break;
+
case4(0100):
case4(0110):
case4(0120):
@@ -1819,7 +1861,6 @@ static void gencode(int32_t segment, int64_t offset, int bits,
opflags_t rflags;
uint8_t *p;
int32_t s;
- enum out_type type;
struct operand *opy = &ins->oprs[op2];
if (c <= 0177) {
@@ -1832,25 +1873,15 @@ static void gencode(int32_t segment, int64_t offset, int bits,
rfield = c & 7;
}
- if (!process_ea(opy, &ea_data, bits, ins->addr_size,
- rfield, rflags)) {
+ if (process_ea(opy, &ea_data, bits, ins->addr_size,
+ rfield, rflags) != eat)
errfunc(ERR_NONFATAL, "invalid effective address");
- }
-
p = bytes;
*p++ = ea_data.modrm;
if (ea_data.sib_present)
*p++ = ea_data.sib;
- /* DREX suffixes come between the SIB and the displacement */
- if (ins->rex & REX_D) {
- *p++ = (ins->drexdst << 4) |
- (ins->rex & REX_OC ? 0x08 : 0) |
- (ins->rex & (REX_R|REX_X|REX_B));
- ins->rex = 0;
- }
-
s = p - bytes;
out(offset, segment, bytes, OUT_RAWDATA, s, NO_SEG, NO_SEG);
@@ -1888,7 +1919,6 @@ static void gencode(int32_t segment, int64_t offset, int bits,
signed_bits(opy->offset, ea_data.bytes * 8))
warn_overflow(ERR_PASS2, ea_data.bytes);
- type = OUT_ADDRESS;
out(offset, segment, &data, OUT_ADDRESS,
ea_data.bytes, opy->segment, opy->wrt);
}
@@ -1975,7 +2005,7 @@ static enum match_result find_match(const struct itemplate **tempp,
temp->opcode != I_none; temp++) {
m = matches(temp, instruction, bits);
if (m == MOK_JUMP) {
- if (jmp_match(segment, offset, bits, instruction, temp->code))
+ if (jmp_match(segment, offset, bits, instruction, temp))
m = MOK_GOOD;
else
m = MERR_INVALOP;
@@ -2021,7 +2051,7 @@ static enum match_result find_match(const struct itemplate **tempp,
temp->opcode != I_none; temp++) {
m = matches(temp, instruction, bits);
if (m == MOK_JUMP) {
- if (jmp_match(segment, offset, bits, instruction, temp->code))
+ if (jmp_match(segment, offset, bits, instruction, temp))
m = MOK_GOOD;
else
m = MERR_INVALOP;
@@ -2040,8 +2070,9 @@ done:
static enum match_result matches(const struct itemplate *itemp,
insn *instruction, int bits)
{
- int i, size[MAX_OPERANDS], asize, oprs;
+ opflags_t size[MAX_OPERANDS], asize;
bool opsizemissing = false;
+ int i, oprs;
/*
* Check the opcode
@@ -2056,6 +2087,12 @@ static enum match_result matches(const struct itemplate *itemp,
return MERR_INVALOP;
/*
+ * Is it legal?
+ */
+ if (!(optimizing > 0) && (itemp->flags & IF_OPT))
+ return MERR_INVALOP;
+
+ /*
* Check that no spurious colons or TOs are present
*/
for (i = 0; i < itemp->operands; i++)
@@ -2207,46 +2244,60 @@ static enum match_result matches(const struct itemplate *itemp,
return MERR_BADMODE;
/*
+ * If we have a HLE prefix, look for the NOHLE flag
+ */
+ if ((itemp->flags & IF_NOHLE) &&
+ (has_prefix(instruction, PPS_REP, P_XACQUIRE) ||
+ has_prefix(instruction, PPS_REP, P_XRELEASE)))
+ return MERR_BADHLE;
+
+ /*
* Check if special handling needed for Jumps
*/
- if ((itemp->code[0] & 0374) == 0370)
+ if ((itemp->code[0] & ~1) == 0370)
return MOK_JUMP;
return MOK_GOOD;
}
-static ea *process_ea(operand * input, ea * output, int bits,
- int addrbits, int rfield, opflags_t rflags)
+static enum ea_type process_ea(operand *input, ea *output, int bits,
+ int addrbits, int rfield, opflags_t rflags)
{
bool forw_ref = !!(input->opflags & OPFLAG_UNKNOWN);
- output->rip = false;
+ output->type = EA_SCALAR;
+ output->rip = false;
/* REX flags for the rfield operand */
- output->rex |= rexflags(rfield, rflags, REX_R | REX_P | REX_W | REX_H);
+ output->rex |= rexflags(rfield, rflags, REX_R | REX_P | REX_W | REX_H);
- if (is_class(REGISTER, input->type)) { /* register direct */
- int i;
+ if (is_class(REGISTER, input->type)) {
+ /*
+ * It's a direct register.
+ */
opflags_t f;
if (!is_register(input->basereg))
- return NULL;
- f = regflag(input);
- i = nasm_regvals[input->basereg];
+ goto err;
- if (REG_EA & ~f)
- return NULL; /* Invalid EA register */
+ f = regflag(input);
- output->rex |= op_rexflags(input, REX_B | REX_P | REX_W | REX_H);
+ if (!is_class(REG_EA, f))
+ goto err;
+ output->rex |= op_rexflags(input, REX_B | REX_P | REX_W | REX_H);
output->sib_present = false; /* no SIB necessary */
- output->bytes = 0; /* no offset necessary either */
- output->modrm = 0xC0 | ((rfield & 7) << 3) | (i & 7);
- } else { /* it's a memory reference */
+ output->bytes = 0; /* no offset necessary either */
+ output->modrm = GEN_MODRM(3, rfield, nasm_regvals[input->basereg]);
+ } else {
+ /*
+ * It's a memory reference.
+ */
if (input->basereg == -1 &&
(input->indexreg == -1 || input->scale == 0)) {
- /* it's a pure offset */
-
+ /*
+ * It's a pure offset.
+ */
if (bits == 64 && ((input->type & IP_REL) == IP_REL) &&
input->segment == NO_SEG) {
nasm_error(ERR_WARNING | ERR_PASS1, "absolute address can not be RIP-relative");
@@ -2261,22 +2312,21 @@ static ea *process_ea(operand * input, ea * output, int bits,
}
if (bits == 64 && (~input->type & IP_REL)) {
- int scale, index, base;
output->sib_present = true;
- scale = 0;
- index = 4;
- base = 5;
- output->sib = (scale << 6) | (index << 3) | base;
- output->bytes = 4;
- output->modrm = 4 | ((rfield & 7) << 3);
- output->rip = false;
+ output->sib = GEN_SIB(0, 4, 5);
+ output->bytes = 4;
+ output->modrm = GEN_MODRM(0, rfield, 4);
+ output->rip = false;
} else {
output->sib_present = false;
- output->bytes = (addrbits != 16 ? 4 : 2);
- output->modrm = (addrbits != 16 ? 5 : 6) | ((rfield & 7) << 3);
- output->rip = bits == 64;
+ output->bytes = (addrbits != 16 ? 4 : 2);
+ output->modrm = GEN_MODRM(0, rfield, (addrbits != 16 ? 5 : 6));
+ output->rip = bits == 64;
}
- } else { /* it's an indirection */
+ } else {
+ /*
+ * It's an indirection.
+ */
int i = input->indexreg, b = input->basereg, s = input->scale;
int32_t seg = input->segment;
int hb = input->hintbase, ht = input->hinttype;
@@ -2302,26 +2352,114 @@ static ea *process_ea(operand * input, ea * output, int bits,
bx = 0;
}
- /* check for a 32/64-bit memory reference... */
- if ((ix|bx) & (BITS32|BITS64)) {
+ /* if either one are a vector register... */
+ if ((ix|bx) & (XMMREG|YMMREG) & ~REG_EA) {
+ opflags_t sok = BITS32 | BITS64;
+ int32_t o = input->offset;
+ int mod, scale, index, base;
+
+ /*
+ * For a vector SIB, one has to be a vector and the other,
+ * if present, a GPR. The vector must be the index operand.
+ */
+ if (it == -1 || (bx & (XMMREG|YMMREG) & ~REG_EA)) {
+ if (s == 0)
+ s = 1;
+ else if (s != 1)
+ goto err;
+
+ t = bt, bt = it, it = t;
+ x = bx, bx = ix, ix = x;
+ }
+
+ if (bt != -1) {
+ if (REG_GPR & ~bx)
+ goto err;
+ if (!(REG64 & ~bx) || !(REG32 & ~bx))
+ sok &= bx;
+ else
+ goto err;
+ }
+
+ /*
+ * While we're here, ensure the user didn't specify
+ * WORD or QWORD
+ */
+ if (input->disp_size == 16 || input->disp_size == 64)
+ goto err;
+
+ if (addrbits == 16 ||
+ (addrbits == 32 && !(sok & BITS32)) ||
+ (addrbits == 64 && !(sok & BITS64)))
+ goto err;
+
+ output->type = (ix & YMMREG & ~REG_EA)
+ ? EA_YMMVSIB : EA_XMMVSIB;
+
+ output->rex |= rexflags(it, ix, REX_X);
+ output->rex |= rexflags(bt, bx, REX_B);
+
+ index = it & 7; /* it is known to be != -1 */
+
+ switch (s) {
+ case 1:
+ scale = 0;
+ break;
+ case 2:
+ scale = 1;
+ break;
+ case 4:
+ scale = 2;
+ break;
+ case 8:
+ scale = 3;
+ break;
+ default: /* then what the smeg is it? */
+ goto err; /* panic */
+ }
+
+ if (bt == -1) {
+ base = 5;
+ mod = 0;
+ } else {
+ base = (bt & 7);
+ if (base != REG_NUM_EBP && o == 0 &&
+ seg == NO_SEG && !forw_ref &&
+ !(input->eaflags & (EAF_BYTEOFFS | EAF_WORDOFFS)))
+ mod = 0;
+ else if (input->eaflags & EAF_BYTEOFFS ||
+ (o >= -128 && o <= 127 &&
+ seg == NO_SEG && !forw_ref &&
+ !(input->eaflags & EAF_WORDOFFS)))
+ mod = 1;
+ else
+ mod = 2;
+ }
+
+ output->sib_present = true;
+ output->bytes = (bt == -1 || mod == 2 ? 4 : mod);
+ output->modrm = GEN_MODRM(mod, rfield, 4);
+ output->sib = GEN_SIB(scale, index, base);
+ } else if ((ix|bx) & (BITS32|BITS64)) {
/*
* it must be a 32/64-bit memory reference. Firstly we have
* to check that all registers involved are type E/Rxx.
*/
- int32_t sok = BITS32 | BITS64, o = input->offset;
+ opflags_t sok = BITS32 | BITS64;
+ int32_t o = input->offset;
if (it != -1) {
if (!(REG64 & ~ix) || !(REG32 & ~ix))
sok &= ix;
else
- return NULL;
+ goto err;
}
if (bt != -1) {
if (REG_GPR & ~bx)
- return NULL; /* Invalid register */
+ goto err; /* Invalid register */
if (~sok & bx & SIZE_MASK)
- return NULL; /* Invalid size */
+ goto err; /* Invalid size */
sok &= bx;
}
@@ -2330,12 +2468,12 @@ static ea *process_ea(operand * input, ea * output, int bits,
* WORD or QWORD
*/
if (input->disp_size == 16 || input->disp_size == 64)
- return NULL;
+ goto err;
if (addrbits == 16 ||
(addrbits == 32 && !(sok & BITS32)) ||
(addrbits == 64 && !(sok & BITS64)))
- return NULL;
+ goto err;
/* now reorganize base/index */
if (s == 1 && bt != it && bt != -1 && it != -1 &&
@@ -2365,7 +2503,7 @@ static ea *process_ea(operand * input, ea * output, int bits,
}
if (it == REG_NUM_ESP ||
(s != 1 && s != 2 && s != 4 && s != 8 && it != -1))
- return NULL; /* wrong, for various reasons */
+ goto err; /* wrong, for various reasons */
output->rex |= rexflags(it, ix, REX_X);
output->rex |= rexflags(bt, bx, REX_B);
@@ -2393,8 +2531,8 @@ static ea *process_ea(operand * input, ea * output, int bits,
}
output->sib_present = false;
- output->bytes = (bt == -1 || mod == 2 ? 4 : mod);
- output->modrm = (mod << 6) | ((rfield & 7) << 3) | rm;
+ output->bytes = (bt == -1 || mod == 2 ? 4 : mod);
+ output->modrm = GEN_MODRM(mod, rfield, rm);
} else {
/* we need a SIB */
int mod, scale, index, base;
@@ -2418,7 +2556,7 @@ static ea *process_ea(operand * input, ea * output, int bits,
scale = 3;
break;
default: /* then what the smeg is it? */
- return NULL; /* panic */
+ goto err; /* panic */
}
if (bt == -1) {
@@ -2440,9 +2578,9 @@ static ea *process_ea(operand * input, ea * output, int bits,
}
output->sib_present = true;
- output->bytes = (bt == -1 || mod == 2 ? 4 : mod);
- output->modrm = (mod << 6) | ((rfield & 7) << 3) | 4;
- output->sib = (scale << 6) | (index << 3) | base;
+ output->bytes = (bt == -1 || mod == 2 ? 4 : mod);
+ output->modrm = GEN_MODRM(mod, rfield, 4);
+ output->sib = GEN_SIB(scale, index, base);
}
} else { /* it's 16-bit */
int mod, rm;
@@ -2450,19 +2588,19 @@ static ea *process_ea(operand * input, ea * output, int bits,
/* check for 64-bit long mode */
if (addrbits == 64)
- return NULL;
+ goto err;
/* check all registers are BX, BP, SI or DI */
if ((b != -1 && b != R_BP && b != R_BX && b != R_SI && b != R_DI) ||
(i != -1 && i != R_BP && i != R_BX && i != R_SI && i != R_DI))
- return NULL;
+ goto err;
/* ensure the user didn't specify DWORD/QWORD */
if (input->disp_size == 32 || input->disp_size == 64)
- return NULL;
+ goto err;
if (s != 1 && i != -1)
- return NULL; /* no can do, in 16-bit EA */
+ goto err; /* no can do, in 16-bit EA */
if (b == -1 && i != -1) {
int tmp = b;
b = i;
@@ -2475,12 +2613,12 @@ static ea *process_ea(operand * input, ea * output, int bits,
}
/* have BX/BP as base, SI/DI index */
if (b == i)
- return NULL; /* shouldn't ever happen, in theory */
+ goto err; /* shouldn't ever happen, in theory */
if (i != -1 && b != -1 &&
(i == R_BP || i == R_BX || b == R_SI || b == R_DI))
- return NULL; /* invalid combinations */
+ goto err; /* invalid combinations */
if (b == -1) /* pure offset: handled above */
- return NULL; /* so if it gets to here, panic! */
+ goto err; /* so if it gets to here, panic! */
rm = -1;
if (i != -1)
@@ -2513,7 +2651,7 @@ static ea *process_ea(operand * input, ea * output, int bits,
break;
}
if (rm == -1) /* can't happen, in theory */
- return NULL; /* so panic if it does */
+ goto err; /* so panic if it does */
if (o == 0 && seg == NO_SEG && !forw_ref && rm != 6 &&
!(input->eaflags & (EAF_BYTEOFFS | EAF_WORDOFFS)))
@@ -2526,14 +2664,17 @@ static ea *process_ea(operand * input, ea * output, int bits,
mod = 2;
output->sib_present = false; /* no SIB - it's 16-bit */
- output->bytes = mod; /* bytes of offset needed */
- output->modrm = (mod << 6) | ((rfield & 7) << 3) | rm;
+ output->bytes = mod; /* bytes of offset needed */
+ output->modrm = GEN_MODRM(mod, rfield, rm);
}
}
}
output->size = 1 + output->sib_present + output->bytes;
- return output;
+ return output->type;
+
+err:
+ return output->type = EA_INVALID;
}
static void add_asp(insn *ins, int addrbits)
@@ -2606,8 +2747,7 @@ static void add_asp(insn *ins, int addrbits)
ins->addr_size = addrbits;
} else if (valid & ((addrbits == 32) ? 16 : 32)) {
/* Add an address size prefix */
- enum prefixes pref = (addrbits == 32) ? P_A16 : P_A32;
- ins->prefixes[PPS_ASIZE] = pref;
+ ins->prefixes[PPS_ASIZE] = (addrbits == 32) ? P_A16 : P_A32;;
ins->addr_size = (addrbits == 32) ? 16 : 32;
} else {
/* Impossible... */
diff --git a/configure b/configure
index aac45ec..23af12f 100755
--- a/configure
+++ b/configure
@@ -1,11 +1,11 @@
#! /bin/sh
# Guess values for system-dependent variables and create Makefiles.
-# Generated by GNU Autoconf 2.65.
+# Generated by GNU Autoconf 2.68.
#
#
# Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001,
-# 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation,
-# Inc.
+# 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software
+# Foundation, Inc.
#
#
# This configure script is free software; the Free Software Foundation
@@ -89,6 +89,7 @@ fi
IFS=" "" $as_nl"
# Find who we are. Look in the path if we contain no directory separator.
+as_myself=
case $0 in #((
*[\\/]* ) as_myself=$0 ;;
*) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
@@ -214,11 +215,18 @@ IFS=$as_save_IFS
# We cannot yet assume a decent shell, so we have to provide a
# neutralization value for shells without unset; and this also
# works around shells that cannot unset nonexistent variables.
+ # Preserve -v and -x to the replacement shell.
BASH_ENV=/dev/null
ENV=/dev/null
(unset BASH_ENV) >/dev/null 2>&1 && unset BASH_ENV ENV
export CONFIG_SHELL
- exec "$CONFIG_SHELL" "$as_myself" ${1+"$@"}
+ case $- in # ((((
+ *v*x* | *x*v* ) as_opts=-vx ;;
+ *v* ) as_opts=-v ;;
+ *x* ) as_opts=-x ;;
+ * ) as_opts= ;;
+ esac
+ exec "$CONFIG_SHELL" $as_opts "$as_myself" ${1+"$@"}
fi
if test x$as_have_required = xno; then :
@@ -316,7 +324,7 @@ $as_echo X"$as_dir" |
test -d "$as_dir" && break
done
test -z "$as_dirs" || eval "mkdir $as_dirs"
- } || test -d "$as_dir" || as_fn_error "cannot create directory $as_dir"
+ } || test -d "$as_dir" || as_fn_error $? "cannot create directory $as_dir"
} # as_fn_mkdir_p
@@ -356,19 +364,19 @@ else
fi # as_fn_arith
-# as_fn_error ERROR [LINENO LOG_FD]
-# ---------------------------------
+# as_fn_error STATUS ERROR [LINENO LOG_FD]
+# ----------------------------------------
# Output "`basename $0`: error: ERROR" to stderr. If LINENO and LOG_FD are
# provided, also output the error to LOG_FD, referencing LINENO. Then exit the
-# script with status $?, using 1 if that was 0.
+# script with STATUS, using 1 if that was 0.
as_fn_error ()
{
- as_status=$?; test $as_status -eq 0 && as_status=1
- if test "$3"; then
- as_lineno=${as_lineno-"$2"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
- $as_echo "$as_me:${as_lineno-$LINENO}: error: $1" >&$3
+ as_status=$1; test $as_status -eq 0 && as_status=1
+ if test "$4"; then
+ as_lineno=${as_lineno-"$3"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
+ $as_echo "$as_me:${as_lineno-$LINENO}: error: $2" >&$4
fi
- $as_echo "$as_me: error: $1" >&2
+ $as_echo "$as_me: error: $2" >&2
as_fn_exit $as_status
} # as_fn_error
@@ -530,7 +538,7 @@ test -n "$DJDIR" || exec 7<&0 </dev/null
exec 6>&1
# Name of the host.
-# hostname on some systems (SVR3.2, Linux) returns a bogus exit status,
+# hostname on some systems (SVR3.2, old GNU/Linux) returns a bogus exit status,
# so uname gets run too.
ac_hostname=`(hostname || uname -n) 2>/dev/null | sed 1q`
@@ -655,6 +663,7 @@ SHELL'
ac_subst_files=''
ac_user_opts='
enable_option_checking
+with_ccache
'
ac_precious_vars='build_alias
host_alias
@@ -727,8 +736,9 @@ do
fi
case $ac_option in
- *=*) ac_optarg=`expr "X$ac_option" : '[^=]*=\(.*\)'` ;;
- *) ac_optarg=yes ;;
+ *=?*) ac_optarg=`expr "X$ac_option" : '[^=]*=\(.*\)'` ;;
+ *=) ac_optarg= ;;
+ *) ac_optarg=yes ;;
esac
# Accept the important Cygnus configure options, so we can diagnose typos.
@@ -773,7 +783,7 @@ do
ac_useropt=`expr "x$ac_option" : 'x-*disable-\(.*\)'`
# Reject names that are not valid shell variable names.
expr "x$ac_useropt" : ".*[^-+._$as_cr_alnum]" >/dev/null &&
- as_fn_error "invalid feature name: $ac_useropt"
+ as_fn_error $? "invalid feature name: $ac_useropt"
ac_useropt_orig=$ac_useropt
ac_useropt=`$as_echo "$ac_useropt" | sed 's/[-+.]/_/g'`
case $ac_user_opts in
@@ -799,7 +809,7 @@ do
ac_useropt=`expr "x$ac_option" : 'x-*enable-\([^=]*\)'`
# Reject names that are not valid shell variable names.
expr "x$ac_useropt" : ".*[^-+._$as_cr_alnum]" >/dev/null &&
- as_fn_error "invalid feature name: $ac_useropt"
+ as_fn_error $? "invalid feature name: $ac_useropt"
ac_useropt_orig=$ac_useropt
ac_useropt=`$as_echo "$ac_useropt" | sed 's/[-+.]/_/g'`
case $ac_user_opts in
@@ -1003,7 +1013,7 @@ do
ac_useropt=`expr "x$ac_option" : 'x-*with-\([^=]*\)'`
# Reject names that are not valid shell variable names.
expr "x$ac_useropt" : ".*[^-+._$as_cr_alnum]" >/dev/null &&
- as_fn_error "invalid package name: $ac_useropt"
+ as_fn_error $? "invalid package name: $ac_useropt"
ac_useropt_orig=$ac_useropt
ac_useropt=`$as_echo "$ac_useropt" | sed 's/[-+.]/_/g'`
case $ac_user_opts in
@@ -1019,7 +1029,7 @@ do
ac_useropt=`expr "x$ac_option" : 'x-*without-\(.*\)'`
# Reject names that are not valid shell variable names.
expr "x$ac_useropt" : ".*[^-+._$as_cr_alnum]" >/dev/null &&
- as_fn_error "invalid package name: $ac_useropt"
+ as_fn_error $? "invalid package name: $ac_useropt"
ac_useropt_orig=$ac_useropt
ac_useropt=`$as_echo "$ac_useropt" | sed 's/[-+.]/_/g'`
case $ac_user_opts in
@@ -1049,8 +1059,8 @@ do
| --x-librar=* | --x-libra=* | --x-libr=* | --x-lib=* | --x-li=* | --x-l=*)
x_libraries=$ac_optarg ;;
- -*) as_fn_error "unrecognized option: \`$ac_option'
-Try \`$0 --help' for more information."
+ -*) as_fn_error $? "unrecognized option: \`$ac_option'
+Try \`$0 --help' for more information"
;;
*=*)
@@ -1058,7 +1068,7 @@ Try \`$0 --help' for more information."
# Reject names that are not valid shell variable names.
case $ac_envvar in #(
'' | [0-9]* | *[!_$as_cr_alnum]* )
- as_fn_error "invalid variable name: \`$ac_envvar'" ;;
+ as_fn_error $? "invalid variable name: \`$ac_envvar'" ;;
esac
eval $ac_envvar=\$ac_optarg
export $ac_envvar ;;
@@ -1068,7 +1078,7 @@ Try \`$0 --help' for more information."
$as_echo "$as_me: WARNING: you should use --build, --host, --target" >&2
expr "x$ac_option" : ".*[^-._$as_cr_alnum]" >/dev/null &&
$as_echo "$as_me: WARNING: invalid host type: $ac_option" >&2
- : ${build_alias=$ac_option} ${host_alias=$ac_option} ${target_alias=$ac_option}
+ : "${build_alias=$ac_option} ${host_alias=$ac_option} ${target_alias=$ac_option}"
;;
esac
@@ -1076,13 +1086,13 @@ done
if test -n "$ac_prev"; then
ac_option=--`echo $ac_prev | sed 's/_/-/g'`
- as_fn_error "missing argument to $ac_option"
+ as_fn_error $? "missing argument to $ac_option"
fi
if test -n "$ac_unrecognized_opts"; then
case $enable_option_checking in
no) ;;
- fatal) as_fn_error "unrecognized options: $ac_unrecognized_opts" ;;
+ fatal) as_fn_error $? "unrecognized options: $ac_unrecognized_opts" ;;
*) $as_echo "$as_me: WARNING: unrecognized options: $ac_unrecognized_opts" >&2 ;;
esac
fi
@@ -1105,7 +1115,7 @@ do
[\\/$]* | ?:[\\/]* ) continue;;
NONE | '' ) case $ac_var in *prefix ) continue;; esac;;
esac
- as_fn_error "expected an absolute directory name for --$ac_var: $ac_val"
+ as_fn_error $? "expected an absolute directory name for --$ac_var: $ac_val"
done
# There might be people who depend on the old broken behavior: `$host'
@@ -1119,8 +1129,8 @@ target=$target_alias
if test "x$host_alias" != x; then
if test "x$build_alias" = x; then
cross_compiling=maybe
- $as_echo "$as_me: WARNING: If you wanted to set the --build type, don't use --host.
- If a cross compiler is detected then cross compile mode will be used." >&2
+ $as_echo "$as_me: WARNING: if you wanted to set the --build type, don't use --host.
+ If a cross compiler is detected then cross compile mode will be used" >&2
elif test "x$build_alias" != "x$host_alias"; then
cross_compiling=yes
fi
@@ -1135,9 +1145,9 @@ test "$silent" = yes && exec 6>/dev/null
ac_pwd=`pwd` && test -n "$ac_pwd" &&
ac_ls_di=`ls -di .` &&
ac_pwd_ls_di=`cd "$ac_pwd" && ls -di .` ||
- as_fn_error "working directory cannot be determined"
+ as_fn_error $? "working directory cannot be determined"
test "X$ac_ls_di" = "X$ac_pwd_ls_di" ||
- as_fn_error "pwd does not report name of working directory"
+ as_fn_error $? "pwd does not report name of working directory"
# Find the source files, if location was not specified.
@@ -1176,11 +1186,11 @@ else
fi
if test ! -r "$srcdir/$ac_unique_file"; then
test "$ac_srcdir_defaulted" = yes && srcdir="$ac_confdir or .."
- as_fn_error "cannot find sources ($ac_unique_file) in $srcdir"
+ as_fn_error $? "cannot find sources ($ac_unique_file) in $srcdir"
fi
ac_msg="sources are in $srcdir, but \`cd $srcdir' does not work"
ac_abs_confdir=`(
- cd "$srcdir" && test -r "./$ac_unique_file" || as_fn_error "$ac_msg"
+ cd "$srcdir" && test -r "./$ac_unique_file" || as_fn_error $? "$ac_msg"
pwd)`
# When building in place, set srcdir=.
if test "$ac_abs_confdir" = "$ac_pwd"; then
@@ -1220,7 +1230,7 @@ Configuration:
--help=short display options specific to this package
--help=recursive display the short help of all the included packages
-V, --version display version information and exit
- -q, --quiet, --silent do not print \`checking...' messages
+ -q, --quiet, --silent do not print \`checking ...' messages
--cache-file=FILE cache test results in FILE [disabled]
-C, --config-cache alias for \`--cache-file=config.cache'
-n, --no-create do not create output files
@@ -1269,6 +1279,11 @@ if test -n "$ac_init_help"; then
cat <<\_ACEOF
+Optional Packages:
+ --with-PACKAGE[=ARG] use PACKAGE [ARG=yes]
+ --without-PACKAGE do not use PACKAGE (same as --with-PACKAGE=no)
+ --with-ccache Compile with ccache
+
Some influential environment variables:
CC C compiler command
CFLAGS C compiler flags
@@ -1346,9 +1361,9 @@ test -n "$ac_init_help" && exit $ac_status
if $ac_init_version; then
cat <<\_ACEOF
configure
-generated by GNU Autoconf 2.65
+generated by GNU Autoconf 2.68
-Copyright (C) 2009 Free Software Foundation, Inc.
+Copyright (C) 2010 Free Software Foundation, Inc.
This configure script is free software; the Free Software Foundation
gives unlimited permission to copy, distribute and modify it.
_ACEOF
@@ -1392,7 +1407,7 @@ sed 's/^/| /' conftest.$ac_ext >&5
ac_retval=1
fi
- eval $as_lineno_stack; test "x$as_lineno_stack" = x && { as_lineno=; unset as_lineno;}
+ eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno
as_fn_set_status $ac_retval
} # ac_fn_c_try_compile
@@ -1418,7 +1433,7 @@ $as_echo "$ac_try_echo"; } >&5
mv -f conftest.er1 conftest.err
fi
$as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
- test $ac_status = 0; } >/dev/null && {
+ test $ac_status = 0; } > conftest.i && {
test -z "$ac_c_preproc_warn_flag$ac_c_werror_flag" ||
test ! -s conftest.err
}; then :
@@ -1429,7 +1444,7 @@ sed 's/^/| /' conftest.$ac_ext >&5
ac_retval=1
fi
- eval $as_lineno_stack; test "x$as_lineno_stack" = x && { as_lineno=; unset as_lineno;}
+ eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno
as_fn_set_status $ac_retval
} # ac_fn_c_try_cpp
@@ -1442,10 +1457,10 @@ fi
ac_fn_c_check_header_mongrel ()
{
as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
- if { as_var=$3; eval "test \"\${$as_var+set}\" = set"; }; then :
+ if eval \${$3+:} false; then :
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $2" >&5
$as_echo_n "checking for $2... " >&6; }
-if { as_var=$3; eval "test \"\${$as_var+set}\" = set"; }; then :
+if eval \${$3+:} false; then :
$as_echo_n "(cached) " >&6
fi
eval ac_res=\$$3
@@ -1481,7 +1496,7 @@ if ac_fn_c_try_cpp "$LINENO"; then :
else
ac_header_preproc=no
fi
-rm -f conftest.err conftest.$ac_ext
+rm -f conftest.err conftest.i conftest.$ac_ext
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_header_preproc" >&5
$as_echo "$ac_header_preproc" >&6; }
@@ -1508,7 +1523,7 @@ $as_echo "$as_me: WARNING: $2: proceeding with the compiler's result" >&2;}
esac
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $2" >&5
$as_echo_n "checking for $2... " >&6; }
-if { as_var=$3; eval "test \"\${$as_var+set}\" = set"; }; then :
+if eval \${$3+:} false; then :
$as_echo_n "(cached) " >&6
else
eval "$3=\$ac_header_compiler"
@@ -1517,7 +1532,7 @@ eval ac_res=\$$3
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5
$as_echo "$ac_res" >&6; }
fi
- eval $as_lineno_stack; test "x$as_lineno_stack" = x && { as_lineno=; unset as_lineno;}
+ eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno
} # ac_fn_c_check_header_mongrel
@@ -1558,7 +1573,7 @@ sed 's/^/| /' conftest.$ac_ext >&5
ac_retval=$ac_status
fi
rm -rf conftest.dSYM conftest_ipa8_conftest.oo
- eval $as_lineno_stack; test "x$as_lineno_stack" = x && { as_lineno=; unset as_lineno;}
+ eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno
as_fn_set_status $ac_retval
} # ac_fn_c_try_run
@@ -1572,7 +1587,7 @@ ac_fn_c_check_header_compile ()
as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $2" >&5
$as_echo_n "checking for $2... " >&6; }
-if { as_var=$3; eval "test \"\${$as_var+set}\" = set"; }; then :
+if eval \${$3+:} false; then :
$as_echo_n "(cached) " >&6
else
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
@@ -1590,7 +1605,7 @@ fi
eval ac_res=\$$3
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5
$as_echo "$ac_res" >&6; }
- eval $as_lineno_stack; test "x$as_lineno_stack" = x && { as_lineno=; unset as_lineno;}
+ eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno
} # ac_fn_c_check_header_compile
@@ -1635,7 +1650,7 @@ fi
# interfere with the next link command; also delete a directory that is
# left behind by Apple's compiler. We do this before executing the actions.
rm -rf conftest.dSYM conftest_ipa8_conftest.oo
- eval $as_lineno_stack; test "x$as_lineno_stack" = x && { as_lineno=; unset as_lineno;}
+ eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno
as_fn_set_status $ac_retval
} # ac_fn_c_try_link
@@ -1649,7 +1664,7 @@ ac_fn_c_check_type ()
as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $2" >&5
$as_echo_n "checking for $2... " >&6; }
-if { as_var=$3; eval "test \"\${$as_var+set}\" = set"; }; then :
+if eval \${$3+:} false; then :
$as_echo_n "(cached) " >&6
else
eval "$3=no"
@@ -1690,7 +1705,7 @@ fi
eval ac_res=\$$3
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5
$as_echo "$ac_res" >&6; }
- eval $as_lineno_stack; test "x$as_lineno_stack" = x && { as_lineno=; unset as_lineno;}
+ eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno
} # ac_fn_c_check_type
@@ -1702,7 +1717,7 @@ ac_fn_c_check_func ()
as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $2" >&5
$as_echo_n "checking for $2... " >&6; }
-if { as_var=$3; eval "test \"\${$as_var+set}\" = set"; }; then :
+if eval \${$3+:} false; then :
$as_echo_n "(cached) " >&6
else
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
@@ -1757,19 +1772,22 @@ fi
eval ac_res=\$$3
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5
$as_echo "$ac_res" >&6; }
- eval $as_lineno_stack; test "x$as_lineno_stack" = x && { as_lineno=; unset as_lineno;}
+ eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno
} # ac_fn_c_check_func
-# ac_fn_c_check_decl LINENO SYMBOL VAR
-# ------------------------------------
-# Tests whether SYMBOL is declared, setting cache variable VAR accordingly.
+# ac_fn_c_check_decl LINENO SYMBOL VAR INCLUDES
+# ---------------------------------------------
+# Tests whether SYMBOL is declared in INCLUDES, setting cache variable VAR
+# accordingly.
ac_fn_c_check_decl ()
{
as_lineno=${as_lineno-"$1"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
- { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $2 is declared" >&5
-$as_echo_n "checking whether $2 is declared... " >&6; }
-if { as_var=$3; eval "test \"\${$as_var+set}\" = set"; }; then :
+ as_decl_name=`echo $2|sed 's/ *(.*//'`
+ as_decl_use=`echo $2|sed -e 's/(/((/' -e 's/)/) 0&/' -e 's/,/) 0& (/g'`
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $as_decl_name is declared" >&5
+$as_echo_n "checking whether $as_decl_name is declared... " >&6; }
+if eval \${$3+:} false; then :
$as_echo_n "(cached) " >&6
else
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
@@ -1778,8 +1796,12 @@ $4
int
main ()
{
-#ifndef $2
- (void) $2;
+#ifndef $as_decl_name
+#ifdef __cplusplus
+ (void) $as_decl_use;
+#else
+ (void) $as_decl_name;
+#endif
#endif
;
@@ -1796,7 +1818,7 @@ fi
eval ac_res=\$$3
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_res" >&5
$as_echo "$ac_res" >&6; }
- eval $as_lineno_stack; test "x$as_lineno_stack" = x && { as_lineno=; unset as_lineno;}
+ eval $as_lineno_stack; ${as_lineno_stack:+:} unset as_lineno
} # ac_fn_c_check_decl
cat >config.log <<_ACEOF
@@ -1804,7 +1826,7 @@ This file contains any messages produced by compilers while
running configure, to aid debugging if configure makes a mistake.
It was created by $as_me, which was
-generated by GNU Autoconf 2.65. Invocation command line was
+generated by GNU Autoconf 2.68. Invocation command line was
$ $0 $@
@@ -1914,11 +1936,9 @@ trap 'exit_status=$?
{
echo
- cat <<\_ASBOX
-## ---------------- ##
+ $as_echo "## ---------------- ##
## Cache variables. ##
-## ---------------- ##
-_ASBOX
+## ---------------- ##"
echo
# The following way of writing the cache mishandles newlines in values,
(
@@ -1952,11 +1972,9 @@ $as_echo "$as_me: WARNING: cache variable $ac_var contains a newline" >&2;} ;;
)
echo
- cat <<\_ASBOX
-## ----------------- ##
+ $as_echo "## ----------------- ##
## Output variables. ##
-## ----------------- ##
-_ASBOX
+## ----------------- ##"
echo
for ac_var in $ac_subst_vars
do
@@ -1969,11 +1987,9 @@ _ASBOX
echo
if test -n "$ac_subst_files"; then
- cat <<\_ASBOX
-## ------------------- ##
+ $as_echo "## ------------------- ##
## File substitutions. ##
-## ------------------- ##
-_ASBOX
+## ------------------- ##"
echo
for ac_var in $ac_subst_files
do
@@ -1987,11 +2003,9 @@ _ASBOX
fi
if test -s confdefs.h; then
- cat <<\_ASBOX
-## ----------- ##
+ $as_echo "## ----------- ##
## confdefs.h. ##
-## ----------- ##
-_ASBOX
+## ----------- ##"
echo
cat confdefs.h
echo
@@ -2046,7 +2060,12 @@ _ACEOF
ac_site_file1=NONE
ac_site_file2=NONE
if test -n "$CONFIG_SITE"; then
- ac_site_file1=$CONFIG_SITE
+ # We do not want a PATH search for config.site.
+ case $CONFIG_SITE in #((
+ -*) ac_site_file1=./$CONFIG_SITE;;
+ */*) ac_site_file1=$CONFIG_SITE;;
+ *) ac_site_file1=./$CONFIG_SITE;;
+ esac
elif test "x$prefix" != xNONE; then
ac_site_file1=$prefix/share/config.site
ac_site_file2=$prefix/etc/config.site
@@ -2061,7 +2080,11 @@ do
{ $as_echo "$as_me:${as_lineno-$LINENO}: loading site script $ac_site_file" >&5
$as_echo "$as_me: loading site script $ac_site_file" >&6;}
sed 's/^/| /' "$ac_site_file" >&5
- . "$ac_site_file"
+ . "$ac_site_file" \
+ || { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
+$as_echo "$as_me: error: in \`$ac_pwd':" >&2;}
+as_fn_error $? "failed to load site script $ac_site_file
+See \`config.log' for more details" "$LINENO" 5; }
fi
done
@@ -2137,7 +2160,7 @@ if $ac_cache_corrupted; then
$as_echo "$as_me: error: in \`$ac_pwd':" >&2;}
{ $as_echo "$as_me:${as_lineno-$LINENO}: error: changes in the environment can compromise the build" >&5
$as_echo "$as_me: error: changes in the environment can compromise the build" >&2;}
- as_fn_error "run \`make distclean' and/or \`rm $cache_file' and start over" "$LINENO" 5
+ as_fn_error $? "run \`make distclean' and/or \`rm $cache_file' and start over" "$LINENO" 5
fi
## -------------------- ##
## Main body of script. ##
@@ -2161,7 +2184,7 @@ if test "x$prefix" = xNONE; then
set dummy nasm; ac_word=$2
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
$as_echo_n "checking for $ac_word... " >&6; }
-if test "${ac_cv_path_ac_prefix_program+set}" = set; then :
+if ${ac_cv_path_ac_prefix_program+:} false; then :
$as_echo_n "(cached) " >&6
else
case $ac_prefix_program in
@@ -2258,7 +2281,7 @@ if test -n "$ac_tool_prefix"; then
set dummy ${ac_tool_prefix}gcc; ac_word=$2
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
$as_echo_n "checking for $ac_word... " >&6; }
-if test "${ac_cv_prog_CC+set}" = set; then :
+if ${ac_cv_prog_CC+:} false; then :
$as_echo_n "(cached) " >&6
else
if test -n "$CC"; then
@@ -2298,7 +2321,7 @@ if test -z "$ac_cv_prog_CC"; then
set dummy gcc; ac_word=$2
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
$as_echo_n "checking for $ac_word... " >&6; }
-if test "${ac_cv_prog_ac_ct_CC+set}" = set; then :
+if ${ac_cv_prog_ac_ct_CC+:} false; then :
$as_echo_n "(cached) " >&6
else
if test -n "$ac_ct_CC"; then
@@ -2351,7 +2374,7 @@ if test -z "$CC"; then
set dummy ${ac_tool_prefix}cc; ac_word=$2
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
$as_echo_n "checking for $ac_word... " >&6; }
-if test "${ac_cv_prog_CC+set}" = set; then :
+if ${ac_cv_prog_CC+:} false; then :
$as_echo_n "(cached) " >&6
else
if test -n "$CC"; then
@@ -2391,7 +2414,7 @@ if test -z "$CC"; then
set dummy cc; ac_word=$2
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
$as_echo_n "checking for $ac_word... " >&6; }
-if test "${ac_cv_prog_CC+set}" = set; then :
+if ${ac_cv_prog_CC+:} false; then :
$as_echo_n "(cached) " >&6
else
if test -n "$CC"; then
@@ -2450,7 +2473,7 @@ if test -z "$CC"; then
set dummy $ac_tool_prefix$ac_prog; ac_word=$2
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
$as_echo_n "checking for $ac_word... " >&6; }
-if test "${ac_cv_prog_CC+set}" = set; then :
+if ${ac_cv_prog_CC+:} false; then :
$as_echo_n "(cached) " >&6
else
if test -n "$CC"; then
@@ -2494,7 +2517,7 @@ do
set dummy $ac_prog; ac_word=$2
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
$as_echo_n "checking for $ac_word... " >&6; }
-if test "${ac_cv_prog_ac_ct_CC+set}" = set; then :
+if ${ac_cv_prog_ac_ct_CC+:} false; then :
$as_echo_n "(cached) " >&6
else
if test -n "$ac_ct_CC"; then
@@ -2548,8 +2571,8 @@ fi
test -z "$CC" && { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
$as_echo "$as_me: error: in \`$ac_pwd':" >&2;}
-as_fn_error "no acceptable C compiler found in \$PATH
-See \`config.log' for more details." "$LINENO" 5; }
+as_fn_error $? "no acceptable C compiler found in \$PATH
+See \`config.log' for more details" "$LINENO" 5; }
# Provide some information about the compiler.
$as_echo "$as_me:${as_lineno-$LINENO}: checking for C compiler version" >&5
@@ -2663,9 +2686,8 @@ sed 's/^/| /' conftest.$ac_ext >&5
{ { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
$as_echo "$as_me: error: in \`$ac_pwd':" >&2;}
-{ as_fn_set_status 77
-as_fn_error "C compiler cannot create executables
-See \`config.log' for more details." "$LINENO" 5; }; }
+as_fn_error 77 "C compiler cannot create executables
+See \`config.log' for more details" "$LINENO" 5; }
else
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5
$as_echo "yes" >&6; }
@@ -2707,8 +2729,8 @@ done
else
{ { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
$as_echo "$as_me: error: in \`$ac_pwd':" >&2;}
-as_fn_error "cannot compute suffix of executables: cannot compile and link
-See \`config.log' for more details." "$LINENO" 5; }
+as_fn_error $? "cannot compute suffix of executables: cannot compile and link
+See \`config.log' for more details" "$LINENO" 5; }
fi
rm -f conftest conftest$ac_cv_exeext
{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_exeext" >&5
@@ -2765,9 +2787,9 @@ $as_echo "$ac_try_echo"; } >&5
else
{ { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
$as_echo "$as_me: error: in \`$ac_pwd':" >&2;}
-as_fn_error "cannot run C compiled programs.
+as_fn_error $? "cannot run C compiled programs.
If you meant to cross compile, use \`--host'.
-See \`config.log' for more details." "$LINENO" 5; }
+See \`config.log' for more details" "$LINENO" 5; }
fi
fi
fi
@@ -2778,7 +2800,7 @@ rm -f conftest.$ac_ext conftest$ac_cv_exeext conftest.out
ac_clean_files=$ac_clean_files_save
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for suffix of object files" >&5
$as_echo_n "checking for suffix of object files... " >&6; }
-if test "${ac_cv_objext+set}" = set; then :
+if ${ac_cv_objext+:} false; then :
$as_echo_n "(cached) " >&6
else
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
@@ -2818,8 +2840,8 @@ sed 's/^/| /' conftest.$ac_ext >&5
{ { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
$as_echo "$as_me: error: in \`$ac_pwd':" >&2;}
-as_fn_error "cannot compute suffix of object files: cannot compile
-See \`config.log' for more details." "$LINENO" 5; }
+as_fn_error $? "cannot compute suffix of object files: cannot compile
+See \`config.log' for more details" "$LINENO" 5; }
fi
rm -f conftest.$ac_cv_objext conftest.$ac_ext
fi
@@ -2829,7 +2851,7 @@ OBJEXT=$ac_cv_objext
ac_objext=$OBJEXT
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether we are using the GNU C compiler" >&5
$as_echo_n "checking whether we are using the GNU C compiler... " >&6; }
-if test "${ac_cv_c_compiler_gnu+set}" = set; then :
+if ${ac_cv_c_compiler_gnu+:} false; then :
$as_echo_n "(cached) " >&6
else
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
@@ -2866,7 +2888,7 @@ ac_test_CFLAGS=${CFLAGS+set}
ac_save_CFLAGS=$CFLAGS
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $CC accepts -g" >&5
$as_echo_n "checking whether $CC accepts -g... " >&6; }
-if test "${ac_cv_prog_cc_g+set}" = set; then :
+if ${ac_cv_prog_cc_g+:} false; then :
$as_echo_n "(cached) " >&6
else
ac_save_c_werror_flag=$ac_c_werror_flag
@@ -2944,7 +2966,7 @@ else
fi
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $CC option to accept ISO C89" >&5
$as_echo_n "checking for $CC option to accept ISO C89... " >&6; }
-if test "${ac_cv_prog_cc_c89+set}" = set; then :
+if ${ac_cv_prog_cc_c89+:} false; then :
$as_echo_n "(cached) " >&6
else
ac_cv_prog_cc_c89=no
@@ -3052,7 +3074,7 @@ if test -n "$CPP" && test -d "$CPP"; then
CPP=
fi
if test -z "$CPP"; then
- if test "${ac_cv_prog_CPP+set}" = set; then :
+ if ${ac_cv_prog_CPP+:} false; then :
$as_echo_n "(cached) " >&6
else
# Double quotes because CPP needs to be expanded
@@ -3082,7 +3104,7 @@ else
# Broken: fails on valid input.
continue
fi
-rm -f conftest.err conftest.$ac_ext
+rm -f conftest.err conftest.i conftest.$ac_ext
# OK, works on sane cases. Now check whether nonexistent headers
# can be detected and how.
@@ -3098,11 +3120,11 @@ else
ac_preproc_ok=:
break
fi
-rm -f conftest.err conftest.$ac_ext
+rm -f conftest.err conftest.i conftest.$ac_ext
done
# Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped.
-rm -f conftest.err conftest.$ac_ext
+rm -f conftest.i conftest.err conftest.$ac_ext
if $ac_preproc_ok; then :
break
fi
@@ -3141,7 +3163,7 @@ else
# Broken: fails on valid input.
continue
fi
-rm -f conftest.err conftest.$ac_ext
+rm -f conftest.err conftest.i conftest.$ac_ext
# OK, works on sane cases. Now check whether nonexistent headers
# can be detected and how.
@@ -3157,18 +3179,18 @@ else
ac_preproc_ok=:
break
fi
-rm -f conftest.err conftest.$ac_ext
+rm -f conftest.err conftest.i conftest.$ac_ext
done
# Because of `break', _AC_PREPROC_IFELSE's cleaning code was skipped.
-rm -f conftest.err conftest.$ac_ext
+rm -f conftest.i conftest.err conftest.$ac_ext
if $ac_preproc_ok; then :
else
{ { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
$as_echo "$as_me: error: in \`$ac_pwd':" >&2;}
-as_fn_error "C preprocessor \"$CPP\" fails sanity check
-See \`config.log' for more details." "$LINENO" 5; }
+as_fn_error $? "C preprocessor \"$CPP\" fails sanity check
+See \`config.log' for more details" "$LINENO" 5; }
fi
ac_ext=c
@@ -3180,7 +3202,7 @@ ac_compiler_gnu=$ac_cv_c_compiler_gnu
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for grep that handles long lines and -e" >&5
$as_echo_n "checking for grep that handles long lines and -e... " >&6; }
-if test "${ac_cv_path_GREP+set}" = set; then :
+if ${ac_cv_path_GREP+:} false; then :
$as_echo_n "(cached) " >&6
else
if test -z "$GREP"; then
@@ -3229,7 +3251,7 @@ esac
done
IFS=$as_save_IFS
if test -z "$ac_cv_path_GREP"; then
- as_fn_error "no acceptable grep could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" "$LINENO" 5
+ as_fn_error $? "no acceptable grep could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" "$LINENO" 5
fi
else
ac_cv_path_GREP=$GREP
@@ -3243,7 +3265,7 @@ $as_echo "$ac_cv_path_GREP" >&6; }
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for egrep" >&5
$as_echo_n "checking for egrep... " >&6; }
-if test "${ac_cv_path_EGREP+set}" = set; then :
+if ${ac_cv_path_EGREP+:} false; then :
$as_echo_n "(cached) " >&6
else
if echo a | $GREP -E '(a|b)' >/dev/null 2>&1
@@ -3295,7 +3317,7 @@ esac
done
IFS=$as_save_IFS
if test -z "$ac_cv_path_EGREP"; then
- as_fn_error "no acceptable egrep could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" "$LINENO" 5
+ as_fn_error $? "no acceptable egrep could be found in $PATH$PATH_SEPARATOR/usr/xpg4/bin" "$LINENO" 5
fi
else
ac_cv_path_EGREP=$EGREP
@@ -3310,7 +3332,7 @@ $as_echo "$ac_cv_path_EGREP" >&6; }
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for ANSI C header files" >&5
$as_echo_n "checking for ANSI C header files... " >&6; }
-if test "${ac_cv_header_stdc+set}" = set; then :
+if ${ac_cv_header_stdc+:} false; then :
$as_echo_n "(cached) " >&6
else
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
@@ -3427,8 +3449,7 @@ do :
as_ac_Header=`$as_echo "ac_cv_header_$ac_header" | $as_tr_sh`
ac_fn_c_check_header_compile "$LINENO" "$ac_header" "$as_ac_Header" "$ac_includes_default
"
-eval as_val=\$$as_ac_Header
- if test "x$as_val" = x""yes; then :
+if eval test \"x\$"$as_ac_Header"\" = x"yes"; then :
cat >>confdefs.h <<_ACEOF
#define `$as_echo "HAVE_$ac_header" | $as_tr_cpp` 1
_ACEOF
@@ -3440,7 +3461,7 @@ done
ac_fn_c_check_header_mongrel "$LINENO" "minix/config.h" "ac_cv_header_minix_config_h" "$ac_includes_default"
-if test "x$ac_cv_header_minix_config_h" = x""yes; then :
+if test "x$ac_cv_header_minix_config_h" = xyes; then :
MINIX=yes
else
MINIX=
@@ -3462,7 +3483,7 @@ $as_echo "#define _MINIX 1" >>confdefs.h
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether it is safe to define __EXTENSIONS__" >&5
$as_echo_n "checking whether it is safe to define __EXTENSIONS__... " >&6; }
-if test "${ac_cv_safe_to_define___extensions__+set}" = set; then :
+if ${ac_cv_safe_to_define___extensions__+:} false; then :
$as_echo_n "(cached) " >&6
else
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
@@ -3509,7 +3530,7 @@ if test -n "$ac_tool_prefix"; then
set dummy ${ac_tool_prefix}gcc; ac_word=$2
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
$as_echo_n "checking for $ac_word... " >&6; }
-if test "${ac_cv_prog_CC+set}" = set; then :
+if ${ac_cv_prog_CC+:} false; then :
$as_echo_n "(cached) " >&6
else
if test -n "$CC"; then
@@ -3549,7 +3570,7 @@ if test -z "$ac_cv_prog_CC"; then
set dummy gcc; ac_word=$2
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
$as_echo_n "checking for $ac_word... " >&6; }
-if test "${ac_cv_prog_ac_ct_CC+set}" = set; then :
+if ${ac_cv_prog_ac_ct_CC+:} false; then :
$as_echo_n "(cached) " >&6
else
if test -n "$ac_ct_CC"; then
@@ -3602,7 +3623,7 @@ if test -z "$CC"; then
set dummy ${ac_tool_prefix}cc; ac_word=$2
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
$as_echo_n "checking for $ac_word... " >&6; }
-if test "${ac_cv_prog_CC+set}" = set; then :
+if ${ac_cv_prog_CC+:} false; then :
$as_echo_n "(cached) " >&6
else
if test -n "$CC"; then
@@ -3642,7 +3663,7 @@ if test -z "$CC"; then
set dummy cc; ac_word=$2
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
$as_echo_n "checking for $ac_word... " >&6; }
-if test "${ac_cv_prog_CC+set}" = set; then :
+if ${ac_cv_prog_CC+:} false; then :
$as_echo_n "(cached) " >&6
else
if test -n "$CC"; then
@@ -3701,7 +3722,7 @@ if test -z "$CC"; then
set dummy $ac_tool_prefix$ac_prog; ac_word=$2
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
$as_echo_n "checking for $ac_word... " >&6; }
-if test "${ac_cv_prog_CC+set}" = set; then :
+if ${ac_cv_prog_CC+:} false; then :
$as_echo_n "(cached) " >&6
else
if test -n "$CC"; then
@@ -3745,7 +3766,7 @@ do
set dummy $ac_prog; ac_word=$2
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
$as_echo_n "checking for $ac_word... " >&6; }
-if test "${ac_cv_prog_ac_ct_CC+set}" = set; then :
+if ${ac_cv_prog_ac_ct_CC+:} false; then :
$as_echo_n "(cached) " >&6
else
if test -n "$ac_ct_CC"; then
@@ -3799,8 +3820,8 @@ fi
test -z "$CC" && { { $as_echo "$as_me:${as_lineno-$LINENO}: error: in \`$ac_pwd':" >&5
$as_echo "$as_me: error: in \`$ac_pwd':" >&2;}
-as_fn_error "no acceptable C compiler found in \$PATH
-See \`config.log' for more details." "$LINENO" 5; }
+as_fn_error $? "no acceptable C compiler found in \$PATH
+See \`config.log' for more details" "$LINENO" 5; }
# Provide some information about the compiler.
$as_echo "$as_me:${as_lineno-$LINENO}: checking for C compiler version" >&5
@@ -3829,7 +3850,7 @@ done
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether we are using the GNU C compiler" >&5
$as_echo_n "checking whether we are using the GNU C compiler... " >&6; }
-if test "${ac_cv_c_compiler_gnu+set}" = set; then :
+if ${ac_cv_c_compiler_gnu+:} false; then :
$as_echo_n "(cached) " >&6
else
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
@@ -3866,7 +3887,7 @@ ac_test_CFLAGS=${CFLAGS+set}
ac_save_CFLAGS=$CFLAGS
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether $CC accepts -g" >&5
$as_echo_n "checking whether $CC accepts -g... " >&6; }
-if test "${ac_cv_prog_cc_g+set}" = set; then :
+if ${ac_cv_prog_cc_g+:} false; then :
$as_echo_n "(cached) " >&6
else
ac_save_c_werror_flag=$ac_c_werror_flag
@@ -3944,7 +3965,7 @@ else
fi
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $CC option to accept ISO C89" >&5
$as_echo_n "checking for $CC option to accept ISO C89... " >&6; }
-if test "${ac_cv_prog_cc_c89+set}" = set; then :
+if ${ac_cv_prog_cc_c89+:} false; then :
$as_echo_n "(cached) " >&6
else
ac_cv_prog_cc_c89=no
@@ -4054,7 +4075,7 @@ fi
$as_echo_n "checking whether ${MAKE-make} sets \$(MAKE)... " >&6; }
set x ${MAKE-make}
ac_make=`$as_echo "$2" | sed 's/+/p/g; s/[^a-zA-Z0-9_]/_/g'`
-if { as_var=ac_cv_prog_make_${ac_make}_set; eval "test \"\${$as_var+set}\" = set"; }; then :
+if eval \${ac_cv_prog_make_${ac_make}_set+:} false; then :
$as_echo_n "(cached) " >&6
else
cat >conftest.make <<\_ACEOF
@@ -4062,7 +4083,7 @@ SHELL = /bin/sh
all:
@echo '@@@%%%=$(MAKE)=@@@%%%'
_ACEOF
-# GNU make sometimes prints "make[1]: Entering...", which would confuse us.
+# GNU make sometimes prints "make[1]: Entering ...", which would confuse us.
case `${MAKE-make} -f conftest.make 2>/dev/null` in
*@@@%%%=?*=@@@%%%*)
eval ac_cv_prog_make_${ac_make}_set=yes;;
@@ -4088,7 +4109,7 @@ else
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether ${MAKE-make} has sane VPATH handling" >&5
$as_echo_n "checking whether ${MAKE-make} has sane VPATH handling... " >&6; }
set dummy ${MAKE-make}; ac_make=`echo "$2" | sed 'y%./+-%__p_%'`
-if test "${ac_cv_prog_make_vpathok+set}" = set; then :
+if ${ac_cv_prog_make_vpathok+:} false; then :
$as_echo_n "(cached) " >&6
else
mkdir conftestdir
@@ -4129,16 +4150,22 @@ fi
fi
ac_aux_dir=
for ac_dir in "$srcdir" "$srcdir/.." "$srcdir/../.."; do
- for ac_t in install-sh install.sh shtool; do
- if test -f "$ac_dir/$ac_t"; then
- ac_aux_dir=$ac_dir
- ac_install_sh="$ac_aux_dir/$ac_t -c"
- break 2
- fi
- done
+ if test -f "$ac_dir/install-sh"; then
+ ac_aux_dir=$ac_dir
+ ac_install_sh="$ac_aux_dir/install-sh -c"
+ break
+ elif test -f "$ac_dir/install.sh"; then
+ ac_aux_dir=$ac_dir
+ ac_install_sh="$ac_aux_dir/install.sh -c"
+ break
+ elif test -f "$ac_dir/shtool"; then
+ ac_aux_dir=$ac_dir
+ ac_install_sh="$ac_aux_dir/shtool install -c"
+ break
+ fi
done
if test -z "$ac_aux_dir"; then
- as_fn_error "cannot find install-sh, install.sh, or shtool in \"$srcdir\" \"$srcdir/..\" \"$srcdir/../..\"" "$LINENO" 5
+ as_fn_error $? "cannot find install-sh, install.sh, or shtool in \"$srcdir\" \"$srcdir/..\" \"$srcdir/../..\"" "$LINENO" 5
fi
# These three variables are undocumented and unsupported,
@@ -4167,7 +4194,7 @@ ac_configure="$SHELL $ac_aux_dir/configure" # Please don't use this var.
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for a BSD-compatible install" >&5
$as_echo_n "checking for a BSD-compatible install... " >&6; }
if test -z "$INSTALL"; then
-if test "${ac_cv_path_install+set}" = set; then :
+if ${ac_cv_path_install+:} false; then :
$as_echo_n "(cached) " >&6
else
as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
@@ -4351,7 +4378,7 @@ do
set dummy $ac_prog; ac_word=$2
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
$as_echo_n "checking for $ac_word... " >&6; }
-if test "${ac_cv_prog_NROFF+set}" = set; then :
+if ${ac_cv_prog_NROFF+:} false; then :
$as_echo_n "(cached) " >&6
else
if test -n "$NROFF"; then
@@ -4394,7 +4421,7 @@ do
set dummy $ac_prog; ac_word=$2
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
$as_echo_n "checking for $ac_word... " >&6; }
-if test "${ac_cv_prog_ACRODIST+set}" = set; then :
+if ${ac_cv_prog_ACRODIST+:} false; then :
$as_echo_n "(cached) " >&6
else
if test -n "$ACRODIST"; then
@@ -4437,7 +4464,7 @@ do
set dummy $ac_prog; ac_word=$2
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
$as_echo_n "checking for $ac_word... " >&6; }
-if test "${ac_cv_prog_PS2PDF+set}" = set; then :
+if ${ac_cv_prog_PS2PDF+:} false; then :
$as_echo_n "(cached) " >&6
else
if test -n "$PS2PDF"; then
@@ -4480,7 +4507,7 @@ do
set dummy $ac_prog; ac_word=$2
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
$as_echo_n "checking for $ac_word... " >&6; }
-if test "${ac_cv_prog_PSTOPDF+set}" = set; then :
+if ${ac_cv_prog_PSTOPDF+:} false; then :
$as_echo_n "(cached) " >&6
else
if test -n "$PSTOPDF"; then
@@ -4520,7 +4547,7 @@ test -n "$PSTOPDF" || PSTOPDF="false"
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for ANSI C header files" >&5
$as_echo_n "checking for ANSI C header files... " >&6; }
-if test "${ac_cv_header_stdc+set}" = set; then :
+if ${ac_cv_header_stdc+:} false; then :
$as_echo_n "(cached) " >&6
else
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
@@ -4631,13 +4658,13 @@ $as_echo "#define STDC_HEADERS 1" >>confdefs.h
fi
if test $ac_cv_header_stdc = no; then
- as_fn_error "NASM requires ANSI C header files to compile" "$LINENO" 5
+ as_fn_error $? "NASM requires ANSI C header files to compile" "$LINENO" 5
fi
for ac_header in limits.h
do :
ac_fn_c_check_header_mongrel "$LINENO" "limits.h" "ac_cv_header_limits_h" "$ac_includes_default"
-if test "x$ac_cv_header_limits_h" = x""yes; then :
+if test "x$ac_cv_header_limits_h" = xyes; then :
cat >>confdefs.h <<_ACEOF
#define HAVE_LIMITS_H 1
_ACEOF
@@ -4647,13 +4674,13 @@ fi
done
if test $ac_cv_header_limits_h = no; then
- as_fn_error "NASM requires '<limits.h>' to compile" "$LINENO" 5
+ as_fn_error $? "NASM requires '<limits.h>' to compile" "$LINENO" 5
fi
for ac_header in inttypes.h
do :
ac_fn_c_check_header_mongrel "$LINENO" "inttypes.h" "ac_cv_header_inttypes_h" "$ac_includes_default"
-if test "x$ac_cv_header_inttypes_h" = x""yes; then :
+if test "x$ac_cv_header_inttypes_h" = xyes; then :
cat >>confdefs.h <<_ACEOF
#define HAVE_INTTYPES_H 1
_ACEOF
@@ -4668,7 +4695,7 @@ done
for ac_header in strings.h
do :
ac_fn_c_check_header_mongrel "$LINENO" "strings.h" "ac_cv_header_strings_h" "$ac_includes_default"
-if test "x$ac_cv_header_strings_h" = x""yes; then :
+if test "x$ac_cv_header_strings_h" = xyes; then :
cat >>confdefs.h <<_ACEOF
#define HAVE_STRINGS_H 1
_ACEOF
@@ -4681,7 +4708,7 @@ done
for ac_header in stdbool.h
do :
ac_fn_c_check_header_mongrel "$LINENO" "stdbool.h" "ac_cv_header_stdbool_h" "$ac_includes_default"
-if test "x$ac_cv_header_stdbool_h" = x""yes; then :
+if test "x$ac_cv_header_stdbool_h" = xyes; then :
cat >>confdefs.h <<_ACEOF
#define HAVE_STDBOOL_H 1
_ACEOF
@@ -4693,7 +4720,7 @@ done
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for an ANSI C-conforming const" >&5
$as_echo_n "checking for an ANSI C-conforming const... " >&6; }
-if test "${ac_cv_c_const+set}" = set; then :
+if ${ac_cv_c_const+:} false; then :
$as_echo_n "(cached) " >&6
else
cat confdefs.h - <<_ACEOF >conftest.$ac_ext
@@ -4773,7 +4800,7 @@ fi
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for inline" >&5
$as_echo_n "checking for inline... " >&6; }
-if test "${ac_cv_c_inline+set}" = set; then :
+if ${ac_cv_c_inline+:} false; then :
$as_echo_n "(cached) " >&6
else
ac_cv_c_inline=no
@@ -4815,7 +4842,7 @@ esac
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for C/C++ restrict keyword" >&5
$as_echo_n "checking for C/C++ restrict keyword... " >&6; }
-if test "${ac_cv_c_restrict+set}" = set; then :
+if ${ac_cv_c_restrict+:} false; then :
$as_echo_n "(cached) " >&6
else
ac_cv_c_restrict=no
@@ -4860,7 +4887,7 @@ _ACEOF
esac
ac_fn_c_check_type "$LINENO" "size_t" "ac_cv_type_size_t" "$ac_includes_default"
-if test "x$ac_cv_type_size_t" = x""yes; then :
+if test "x$ac_cv_type_size_t" = xyes; then :
else
@@ -4898,7 +4925,7 @@ rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether byte ordering is bigendian" >&5
$as_echo_n "checking whether byte ordering is bigendian... " >&6; }
-if test "${ac_cv_c_bigendian+set}" = set; then :
+if ${ac_cv_c_bigendian+:} false; then :
$as_echo_n "(cached) " >&6
else
ac_cv_c_bigendian=unknown
@@ -5117,7 +5144,7 @@ $as_echo "#define AC_APPLE_UNIVERSAL_BUILD 1" >>confdefs.h
;; #(
*)
- as_fn_error "unknown endianness
+ as_fn_error $? "unknown endianness
presetting ac_cv_c_bigendian=no (or yes) will help" "$LINENO" 5 ;;
esac
@@ -5129,13 +5156,13 @@ $as_echo "#define AC_APPLE_UNIVERSAL_BUILD 1" >>confdefs.h
for ac_func in strcspn
do :
ac_fn_c_check_func "$LINENO" "strcspn" "ac_cv_func_strcspn"
-if test "x$ac_cv_func_strcspn" = x""yes; then :
+if test "x$ac_cv_func_strcspn" = xyes; then :
cat >>confdefs.h <<_ACEOF
#define HAVE_STRCSPN 1
_ACEOF
else
- as_fn_error "NASM requires ANSI C (specifically, \"strcspn\")" "$LINENO" 5
+ as_fn_error $? "NASM requires ANSI C (specifically, \"strcspn\")" "$LINENO" 5
fi
done
@@ -5143,13 +5170,13 @@ done
for ac_func in strspn
do :
ac_fn_c_check_func "$LINENO" "strspn" "ac_cv_func_strspn"
-if test "x$ac_cv_func_strspn" = x""yes; then :
+if test "x$ac_cv_func_strspn" = xyes; then :
cat >>confdefs.h <<_ACEOF
#define HAVE_STRSPN 1
_ACEOF
else
- as_fn_error "NASM requires ANSI C (specifically, \"strspn\")" "$LINENO" 5
+ as_fn_error $? "NASM requires ANSI C (specifically, \"strspn\")" "$LINENO" 5
fi
done
@@ -5159,8 +5186,7 @@ for ac_func in vsnprintf _vsnprintf
do :
as_ac_var=`$as_echo "ac_cv_func_$ac_func" | $as_tr_sh`
ac_fn_c_check_func "$LINENO" "$ac_func" "$as_ac_var"
-eval as_val=\$$as_ac_var
- if test "x$as_val" = x""yes; then :
+if eval test \"x\$"$as_ac_var"\" = x"yes"; then :
cat >>confdefs.h <<_ACEOF
#define `$as_echo "HAVE_$ac_func" | $as_tr_cpp` 1
_ACEOF
@@ -5177,8 +5203,7 @@ for ac_func in snprintf _snprintf
do :
as_ac_var=`$as_echo "ac_cv_func_$ac_func" | $as_tr_sh`
ac_fn_c_check_func "$LINENO" "$ac_func" "$as_ac_var"
-eval as_val=\$$as_ac_var
- if test "x$as_val" = x""yes; then :
+if eval test \"x\$"$as_ac_var"\" = x"yes"; then :
cat >>confdefs.h <<_ACEOF
#define `$as_echo "HAVE_$ac_func" | $as_tr_cpp` 1
_ACEOF
@@ -5194,8 +5219,7 @@ for ac_func in strcasecmp stricmp
do :
as_ac_var=`$as_echo "ac_cv_func_$ac_func" | $as_tr_sh`
ac_fn_c_check_func "$LINENO" "$ac_func" "$as_ac_var"
-eval as_val=\$$as_ac_var
- if test "x$as_val" = x""yes; then :
+if eval test \"x\$"$as_ac_var"\" = x"yes"; then :
cat >>confdefs.h <<_ACEOF
#define `$as_echo "HAVE_$ac_func" | $as_tr_cpp` 1
_ACEOF
@@ -5207,8 +5231,7 @@ for ac_func in strncasecmp strnicmp
do :
as_ac_var=`$as_echo "ac_cv_func_$ac_func" | $as_tr_sh`
ac_fn_c_check_func "$LINENO" "$ac_func" "$as_ac_var"
-eval as_val=\$$as_ac_var
- if test "x$as_val" = x""yes; then :
+if eval test \"x\$"$as_ac_var"\" = x"yes"; then :
cat >>confdefs.h <<_ACEOF
#define `$as_echo "HAVE_$ac_func" | $as_tr_cpp` 1
_ACEOF
@@ -5219,7 +5242,7 @@ done
for ac_func in strsep
do :
ac_fn_c_check_func "$LINENO" "strsep" "ac_cv_func_strsep"
-if test "x$ac_cv_func_strsep" = x""yes; then :
+if test "x$ac_cv_func_strsep" = xyes; then :
cat >>confdefs.h <<_ACEOF
#define HAVE_STRSEP 1
_ACEOF
@@ -5230,7 +5253,7 @@ done
for ac_func in strlcpy
do :
ac_fn_c_check_func "$LINENO" "strlcpy" "ac_cv_func_strlcpy"
-if test "x$ac_cv_func_strlcpy" = x""yes; then :
+if test "x$ac_cv_func_strlcpy" = xyes; then :
cat >>confdefs.h <<_ACEOF
#define HAVE_STRLCPY 1
_ACEOF
@@ -5242,7 +5265,7 @@ done
for ac_func in getuid
do :
ac_fn_c_check_func "$LINENO" "getuid" "ac_cv_func_getuid"
-if test "x$ac_cv_func_getuid" = x""yes; then :
+if test "x$ac_cv_func_getuid" = xyes; then :
cat >>confdefs.h <<_ACEOF
#define HAVE_GETUID 1
_ACEOF
@@ -5253,7 +5276,7 @@ done
for ac_func in getgid
do :
ac_fn_c_check_func "$LINENO" "getgid" "ac_cv_func_getgid"
-if test "x$ac_cv_func_getgid" = x""yes; then :
+if test "x$ac_cv_func_getgid" = xyes; then :
cat >>confdefs.h <<_ACEOF
#define HAVE_GETGID 1
_ACEOF
@@ -5263,7 +5286,7 @@ done
ac_fn_c_check_decl "$LINENO" "strcasecmp" "ac_cv_have_decl_strcasecmp" "$ac_includes_default"
-if test "x$ac_cv_have_decl_strcasecmp" = x""yes; then :
+if test "x$ac_cv_have_decl_strcasecmp" = xyes; then :
ac_have_decl=1
else
ac_have_decl=0
@@ -5274,7 +5297,7 @@ cat >>confdefs.h <<_ACEOF
_ACEOF
ac_fn_c_check_decl "$LINENO" "stricmp" "ac_cv_have_decl_stricmp" "$ac_includes_default"
-if test "x$ac_cv_have_decl_stricmp" = x""yes; then :
+if test "x$ac_cv_have_decl_stricmp" = xyes; then :
ac_have_decl=1
else
ac_have_decl=0
@@ -5285,7 +5308,7 @@ cat >>confdefs.h <<_ACEOF
_ACEOF
ac_fn_c_check_decl "$LINENO" "strncasecmp" "ac_cv_have_decl_strncasecmp" "$ac_includes_default"
-if test "x$ac_cv_have_decl_strncasecmp" = x""yes; then :
+if test "x$ac_cv_have_decl_strncasecmp" = xyes; then :
ac_have_decl=1
else
ac_have_decl=0
@@ -5296,7 +5319,7 @@ cat >>confdefs.h <<_ACEOF
_ACEOF
ac_fn_c_check_decl "$LINENO" "strnicmp" "ac_cv_have_decl_strnicmp" "$ac_includes_default"
-if test "x$ac_cv_have_decl_strnicmp" = x""yes; then :
+if test "x$ac_cv_have_decl_strnicmp" = xyes; then :
ac_have_decl=1
else
ac_have_decl=0
@@ -5307,7 +5330,7 @@ cat >>confdefs.h <<_ACEOF
_ACEOF
ac_fn_c_check_decl "$LINENO" "strsep" "ac_cv_have_decl_strsep" "$ac_includes_default"
-if test "x$ac_cv_have_decl_strsep" = x""yes; then :
+if test "x$ac_cv_have_decl_strsep" = xyes; then :
ac_have_decl=1
else
ac_have_decl=0
@@ -5318,7 +5341,7 @@ cat >>confdefs.h <<_ACEOF
_ACEOF
ac_fn_c_check_decl "$LINENO" "strlcpy" "ac_cv_have_decl_strlcpy" "$ac_includes_default"
-if test "x$ac_cv_have_decl_strlcpy" = x""yes; then :
+if test "x$ac_cv_have_decl_strlcpy" = xyes; then :
ac_have_decl=1
else
ac_have_decl=0
@@ -5336,6 +5359,13 @@ if test $ac_cv_prog_make_vpathok = no; then
done
fi
+
+# Check whether --with-ccache was given.
+if test "${with_ccache+set}" = set; then :
+ withval=$with_ccache; CC="ccache $CC"
+fi
+
+
ac_config_commands="$ac_config_commands default-1"
ac_config_files="$ac_config_files Makefile rdoff/Makefile doc/Makefile"
@@ -5404,10 +5434,21 @@ $as_echo "$as_me: WARNING: cache variable $ac_var contains a newline" >&2;} ;;
:end' >>confcache
if diff "$cache_file" confcache >/dev/null 2>&1; then :; else
if test -w "$cache_file"; then
- test "x$cache_file" != "x/dev/null" &&
+ if test "x$cache_file" != "x/dev/null"; then
{ $as_echo "$as_me:${as_lineno-$LINENO}: updating cache $cache_file" >&5
$as_echo "$as_me: updating cache $cache_file" >&6;}
- cat confcache >$cache_file
+ if test ! -f "$cache_file" || test -h "$cache_file"; then
+ cat confcache >"$cache_file"
+ else
+ case $cache_file in #(
+ */* | ?:*)
+ mv -f confcache "$cache_file"$$ &&
+ mv -f "$cache_file"$$ "$cache_file" ;; #(
+ *)
+ mv -f confcache "$cache_file" ;;
+ esac
+ fi
+ fi
else
{ $as_echo "$as_me:${as_lineno-$LINENO}: not updating unwritable cache $cache_file" >&5
$as_echo "$as_me: not updating unwritable cache $cache_file" >&6;}
@@ -5423,6 +5464,7 @@ DEFS=-DHAVE_CONFIG_H
ac_libobjs=
ac_ltlibobjs=
+U=
for ac_i in : $LIBOBJS; do test "x$ac_i" = x: && continue
# 1. Remove the extension, and $U if already installed.
ac_script='s/\$U\././;s/\.o$//;s/\.obj$//'
@@ -5439,7 +5481,7 @@ LTLIBOBJS=$ac_ltlibobjs
-: ${CONFIG_STATUS=./config.status}
+: "${CONFIG_STATUS=./config.status}"
ac_write_fail=0
ac_clean_files_save=$ac_clean_files
ac_clean_files="$ac_clean_files $CONFIG_STATUS"
@@ -5540,6 +5582,7 @@ fi
IFS=" "" $as_nl"
# Find who we are. Look in the path if we contain no directory separator.
+as_myself=
case $0 in #((
*[\\/]* ) as_myself=$0 ;;
*) as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
@@ -5585,19 +5628,19 @@ export LANGUAGE
(unset CDPATH) >/dev/null 2>&1 && unset CDPATH
-# as_fn_error ERROR [LINENO LOG_FD]
-# ---------------------------------
+# as_fn_error STATUS ERROR [LINENO LOG_FD]
+# ----------------------------------------
# Output "`basename $0`: error: ERROR" to stderr. If LINENO and LOG_FD are
# provided, also output the error to LOG_FD, referencing LINENO. Then exit the
-# script with status $?, using 1 if that was 0.
+# script with STATUS, using 1 if that was 0.
as_fn_error ()
{
- as_status=$?; test $as_status -eq 0 && as_status=1
- if test "$3"; then
- as_lineno=${as_lineno-"$2"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
- $as_echo "$as_me:${as_lineno-$LINENO}: error: $1" >&$3
+ as_status=$1; test $as_status -eq 0 && as_status=1
+ if test "$4"; then
+ as_lineno=${as_lineno-"$3"} as_lineno_stack=as_lineno_stack=$as_lineno_stack
+ $as_echo "$as_me:${as_lineno-$LINENO}: error: $2" >&$4
fi
- $as_echo "$as_me: error: $1" >&2
+ $as_echo "$as_me: error: $2" >&2
as_fn_exit $as_status
} # as_fn_error
@@ -5793,7 +5836,7 @@ $as_echo X"$as_dir" |
test -d "$as_dir" && break
done
test -z "$as_dirs" || eval "mkdir $as_dirs"
- } || test -d "$as_dir" || as_fn_error "cannot create directory $as_dir"
+ } || test -d "$as_dir" || as_fn_error $? "cannot create directory $as_dir"
} # as_fn_mkdir_p
@@ -5847,7 +5890,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
# values after options handling.
ac_log="
This file was extended by $as_me, which was
-generated by GNU Autoconf 2.65. Invocation command line was
+generated by GNU Autoconf 2.68. Invocation command line was
CONFIG_FILES = $CONFIG_FILES
CONFIG_HEADERS = $CONFIG_HEADERS
@@ -5913,10 +5956,10 @@ cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
ac_cs_config="`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`"
ac_cs_version="\\
config.status
-configured by $0, generated by GNU Autoconf 2.65,
+configured by $0, generated by GNU Autoconf 2.68,
with options \\"\$ac_cs_config\\"
-Copyright (C) 2009 Free Software Foundation, Inc.
+Copyright (C) 2010 Free Software Foundation, Inc.
This config.status script is free software; the Free Software Foundation
gives unlimited permission to copy, distribute and modify it."
@@ -5932,11 +5975,16 @@ ac_need_defaults=:
while test $# != 0
do
case $1 in
- --*=*)
+ --*=?*)
ac_option=`expr "X$1" : 'X\([^=]*\)='`
ac_optarg=`expr "X$1" : 'X[^=]*=\(.*\)'`
ac_shift=:
;;
+ --*=)
+ ac_option=`expr "X$1" : 'X\([^=]*\)='`
+ ac_optarg=
+ ac_shift=:
+ ;;
*)
ac_option=$1
ac_optarg=$2
@@ -5958,6 +6006,7 @@ do
$ac_shift
case $ac_optarg in
*\'*) ac_optarg=`$as_echo "$ac_optarg" | sed "s/'/'\\\\\\\\''/g"` ;;
+ '') as_fn_error $? "missing file argument" ;;
esac
as_fn_append CONFIG_FILES " '$ac_optarg'"
ac_need_defaults=false;;
@@ -5970,7 +6019,7 @@ do
ac_need_defaults=false;;
--he | --h)
# Conflict between --help and --header
- as_fn_error "ambiguous option: \`$1'
+ as_fn_error $? "ambiguous option: \`$1'
Try \`$0 --help' for more information.";;
--help | --hel | -h )
$as_echo "$ac_cs_usage"; exit ;;
@@ -5979,7 +6028,7 @@ Try \`$0 --help' for more information.";;
ac_cs_silent=: ;;
# This is an error.
- -*) as_fn_error "unrecognized option: \`$1'
+ -*) as_fn_error $? "unrecognized option: \`$1'
Try \`$0 --help' for more information." ;;
*) as_fn_append ac_config_targets " $1"
@@ -6039,7 +6088,7 @@ do
"rdoff/Makefile") CONFIG_FILES="$CONFIG_FILES rdoff/Makefile" ;;
"doc/Makefile") CONFIG_FILES="$CONFIG_FILES doc/Makefile" ;;
- *) as_fn_error "invalid argument: \`$ac_config_target'" "$LINENO" 5;;
+ *) as_fn_error $? "invalid argument: \`$ac_config_target'" "$LINENO" 5;;
esac
done
@@ -6062,9 +6111,10 @@ fi
# after its creation but before its name has been assigned to `$tmp'.
$debug ||
{
- tmp=
+ tmp= ac_tmp=
trap 'exit_status=$?
- { test -z "$tmp" || test ! -d "$tmp" || rm -fr "$tmp"; } && exit $exit_status
+ : "${ac_tmp:=$tmp}"
+ { test ! -d "$ac_tmp" || rm -fr "$ac_tmp"; } && exit $exit_status
' 0
trap 'as_fn_exit 1' 1 2 13 15
}
@@ -6072,12 +6122,13 @@ $debug ||
{
tmp=`(umask 077 && mktemp -d "./confXXXXXX") 2>/dev/null` &&
- test -n "$tmp" && test -d "$tmp"
+ test -d "$tmp"
} ||
{
tmp=./conf$$-$RANDOM
(umask 077 && mkdir "$tmp")
-} || as_fn_error "cannot create a temporary directory in ." "$LINENO" 5
+} || as_fn_error $? "cannot create a temporary directory in ." "$LINENO" 5
+ac_tmp=$tmp
# Set up the scripts for CONFIG_FILES section.
# No need to generate them if there are no CONFIG_FILES.
@@ -6094,12 +6145,12 @@ if test "x$ac_cr" = x; then
fi
ac_cs_awk_cr=`$AWK 'BEGIN { print "a\rb" }' </dev/null 2>/dev/null`
if test "$ac_cs_awk_cr" = "a${ac_cr}b"; then
- ac_cs_awk_cr='\r'
+ ac_cs_awk_cr='\\r'
else
ac_cs_awk_cr=$ac_cr
fi
-echo 'BEGIN {' >"$tmp/subs1.awk" &&
+echo 'BEGIN {' >"$ac_tmp/subs1.awk" &&
_ACEOF
@@ -6108,18 +6159,18 @@ _ACEOF
echo "$ac_subst_vars" | sed 's/.*/&!$&$ac_delim/' &&
echo "_ACEOF"
} >conf$$subs.sh ||
- as_fn_error "could not make $CONFIG_STATUS" "$LINENO" 5
-ac_delim_num=`echo "$ac_subst_vars" | grep -c '$'`
+ as_fn_error $? "could not make $CONFIG_STATUS" "$LINENO" 5
+ac_delim_num=`echo "$ac_subst_vars" | grep -c '^'`
ac_delim='%!_!# '
for ac_last_try in false false false false false :; do
. ./conf$$subs.sh ||
- as_fn_error "could not make $CONFIG_STATUS" "$LINENO" 5
+ as_fn_error $? "could not make $CONFIG_STATUS" "$LINENO" 5
ac_delim_n=`sed -n "s/.*$ac_delim\$/X/p" conf$$subs.awk | grep -c X`
if test $ac_delim_n = $ac_delim_num; then
break
elif $ac_last_try; then
- as_fn_error "could not make $CONFIG_STATUS" "$LINENO" 5
+ as_fn_error $? "could not make $CONFIG_STATUS" "$LINENO" 5
else
ac_delim="$ac_delim!$ac_delim _$ac_delim!! "
fi
@@ -6127,7 +6178,7 @@ done
rm -f conf$$subs.sh
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
-cat >>"\$tmp/subs1.awk" <<\\_ACAWK &&
+cat >>"\$ac_tmp/subs1.awk" <<\\_ACAWK &&
_ACEOF
sed -n '
h
@@ -6175,7 +6226,7 @@ t delim
rm -f conf$$subs.awk
cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
_ACAWK
-cat >>"\$tmp/subs1.awk" <<_ACAWK &&
+cat >>"\$ac_tmp/subs1.awk" <<_ACAWK &&
for (key in S) S_is_set[key] = 1
FS = ""
@@ -6207,21 +6258,29 @@ if sed "s/$ac_cr//" < /dev/null > /dev/null 2>&1; then
sed "s/$ac_cr\$//; s/$ac_cr/$ac_cs_awk_cr/g"
else
cat
-fi < "$tmp/subs1.awk" > "$tmp/subs.awk" \
- || as_fn_error "could not setup config files machinery" "$LINENO" 5
+fi < "$ac_tmp/subs1.awk" > "$ac_tmp/subs.awk" \
+ || as_fn_error $? "could not setup config files machinery" "$LINENO" 5
_ACEOF
-# VPATH may cause trouble with some makes, so we remove $(srcdir),
-# ${srcdir} and @srcdir@ from VPATH if srcdir is ".", strip leading and
+# VPATH may cause trouble with some makes, so we remove sole $(srcdir),
+# ${srcdir} and @srcdir@ entries from VPATH if srcdir is ".", strip leading and
# trailing colons and then remove the whole line if VPATH becomes empty
# (actually we leave an empty line to preserve line numbers).
if test "x$srcdir" = x.; then
- ac_vpsub='/^[ ]*VPATH[ ]*=/{
-s/:*\$(srcdir):*/:/
-s/:*\${srcdir}:*/:/
-s/:*@srcdir@:*/:/
-s/^\([^=]*=[ ]*\):*/\1/
+ ac_vpsub='/^[ ]*VPATH[ ]*=[ ]*/{
+h
+s///
+s/^/:/
+s/[ ]*$/:/
+s/:\$(srcdir):/:/g
+s/:\${srcdir}:/:/g
+s/:@srcdir@:/:/g
+s/^:*//
s/:*$//
+x
+s/\(=[ ]*\).*/\1/
+G
+s/\n//
s/^[^=]*=[ ]*$//
}'
fi
@@ -6233,7 +6292,7 @@ fi # test -n "$CONFIG_FILES"
# No need to generate them if there are no CONFIG_HEADERS.
# This happens for instance with `./config.status Makefile'.
if test -n "$CONFIG_HEADERS"; then
-cat >"$tmp/defines.awk" <<\_ACAWK ||
+cat >"$ac_tmp/defines.awk" <<\_ACAWK ||
BEGIN {
_ACEOF
@@ -6245,11 +6304,11 @@ _ACEOF
# handling of long lines.
ac_delim='%!_!# '
for ac_last_try in false false :; do
- ac_t=`sed -n "/$ac_delim/p" confdefs.h`
- if test -z "$ac_t"; then
+ ac_tt=`sed -n "/$ac_delim/p" confdefs.h`
+ if test -z "$ac_tt"; then
break
elif $ac_last_try; then
- as_fn_error "could not make $CONFIG_HEADERS" "$LINENO" 5
+ as_fn_error $? "could not make $CONFIG_HEADERS" "$LINENO" 5
else
ac_delim="$ac_delim!$ac_delim _$ac_delim!! "
fi
@@ -6334,7 +6393,7 @@ cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1
_ACAWK
_ACEOF
cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1
- as_fn_error "could not setup config headers machinery" "$LINENO" 5
+ as_fn_error $? "could not setup config headers machinery" "$LINENO" 5
fi # test -n "$CONFIG_HEADERS"
@@ -6347,7 +6406,7 @@ do
esac
case $ac_mode$ac_tag in
:[FHL]*:*);;
- :L* | :C*:*) as_fn_error "invalid tag \`$ac_tag'" "$LINENO" 5;;
+ :L* | :C*:*) as_fn_error $? "invalid tag \`$ac_tag'" "$LINENO" 5;;
:[FH]-) ac_tag=-:-;;
:[FH]*) ac_tag=$ac_tag:$ac_tag.in;;
esac
@@ -6366,7 +6425,7 @@ do
for ac_f
do
case $ac_f in
- -) ac_f="$tmp/stdin";;
+ -) ac_f="$ac_tmp/stdin";;
*) # Look for the file first in the build tree, then in the source tree
# (if the path is not absolute). The absolute path cannot be DOS-style,
# because $ac_f cannot contain `:'.
@@ -6375,7 +6434,7 @@ do
[\\/$]*) false;;
*) test -f "$srcdir/$ac_f" && ac_f="$srcdir/$ac_f";;
esac ||
- as_fn_error "cannot find input file: \`$ac_f'" "$LINENO" 5;;
+ as_fn_error 1 "cannot find input file: \`$ac_f'" "$LINENO" 5;;
esac
case $ac_f in *\'*) ac_f=`$as_echo "$ac_f" | sed "s/'/'\\\\\\\\''/g"`;; esac
as_fn_append ac_file_inputs " '$ac_f'"
@@ -6401,8 +6460,8 @@ $as_echo "$as_me: creating $ac_file" >&6;}
esac
case $ac_tag in
- *:-:* | *:-) cat >"$tmp/stdin" \
- || as_fn_error "could not create $ac_file" "$LINENO" 5 ;;
+ *:-:* | *:-) cat >"$ac_tmp/stdin" \
+ || as_fn_error $? "could not create $ac_file" "$LINENO" 5 ;;
esac
;;
esac
@@ -6532,23 +6591,24 @@ s&@abs_top_builddir@&$ac_abs_top_builddir&;t t
s&@INSTALL@&$ac_INSTALL&;t t
$ac_datarootdir_hack
"
-eval sed \"\$ac_sed_extra\" "$ac_file_inputs" | $AWK -f "$tmp/subs.awk" >$tmp/out \
- || as_fn_error "could not create $ac_file" "$LINENO" 5
+eval sed \"\$ac_sed_extra\" "$ac_file_inputs" | $AWK -f "$ac_tmp/subs.awk" \
+ >$ac_tmp/out || as_fn_error $? "could not create $ac_file" "$LINENO" 5
test -z "$ac_datarootdir_hack$ac_datarootdir_seen" &&
- { ac_out=`sed -n '/\${datarootdir}/p' "$tmp/out"`; test -n "$ac_out"; } &&
- { ac_out=`sed -n '/^[ ]*datarootdir[ ]*:*=/p' "$tmp/out"`; test -z "$ac_out"; } &&
+ { ac_out=`sed -n '/\${datarootdir}/p' "$ac_tmp/out"`; test -n "$ac_out"; } &&
+ { ac_out=`sed -n '/^[ ]*datarootdir[ ]*:*=/p' \
+ "$ac_tmp/out"`; test -z "$ac_out"; } &&
{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: $ac_file contains a reference to the variable \`datarootdir'
-which seems to be undefined. Please make sure it is defined." >&5
+which seems to be undefined. Please make sure it is defined" >&5
$as_echo "$as_me: WARNING: $ac_file contains a reference to the variable \`datarootdir'
-which seems to be undefined. Please make sure it is defined." >&2;}
+which seems to be undefined. Please make sure it is defined" >&2;}
- rm -f "$tmp/stdin"
+ rm -f "$ac_tmp/stdin"
case $ac_file in
- -) cat "$tmp/out" && rm -f "$tmp/out";;
- *) rm -f "$ac_file" && mv "$tmp/out" "$ac_file";;
+ -) cat "$ac_tmp/out" && rm -f "$ac_tmp/out";;
+ *) rm -f "$ac_file" && mv "$ac_tmp/out" "$ac_file";;
esac \
- || as_fn_error "could not create $ac_file" "$LINENO" 5
+ || as_fn_error $? "could not create $ac_file" "$LINENO" 5
;;
:H)
#
@@ -6557,21 +6617,21 @@ which seems to be undefined. Please make sure it is defined." >&2;}
if test x"$ac_file" != x-; then
{
$as_echo "/* $configure_input */" \
- && eval '$AWK -f "$tmp/defines.awk"' "$ac_file_inputs"
- } >"$tmp/config.h" \
- || as_fn_error "could not create $ac_file" "$LINENO" 5
- if diff "$ac_file" "$tmp/config.h" >/dev/null 2>&1; then
+ && eval '$AWK -f "$ac_tmp/defines.awk"' "$ac_file_inputs"
+ } >"$ac_tmp/config.h" \
+ || as_fn_error $? "could not create $ac_file" "$LINENO" 5
+ if diff "$ac_file" "$ac_tmp/config.h" >/dev/null 2>&1; then
{ $as_echo "$as_me:${as_lineno-$LINENO}: $ac_file is unchanged" >&5
$as_echo "$as_me: $ac_file is unchanged" >&6;}
else
rm -f "$ac_file"
- mv "$tmp/config.h" "$ac_file" \
- || as_fn_error "could not create $ac_file" "$LINENO" 5
+ mv "$ac_tmp/config.h" "$ac_file" \
+ || as_fn_error $? "could not create $ac_file" "$LINENO" 5
fi
else
$as_echo "/* $configure_input */" \
- && eval '$AWK -f "$tmp/defines.awk"' "$ac_file_inputs" \
- || as_fn_error "could not create -" "$LINENO" 5
+ && eval '$AWK -f "$ac_tmp/defines.awk"' "$ac_file_inputs" \
+ || as_fn_error $? "could not create -" "$LINENO" 5
fi
;;
@@ -6593,7 +6653,7 @@ _ACEOF
ac_clean_files=$ac_clean_files_save
test $ac_write_fail = 0 ||
- as_fn_error "write failure creating $CONFIG_STATUS" "$LINENO" 5
+ as_fn_error $? "write failure creating $CONFIG_STATUS" "$LINENO" 5
# configure is writing to config.log, and then calls config.status.
@@ -6614,7 +6674,7 @@ if test "$no_create" != yes; then
exec 5>>config.log
# Use ||, not &&, to avoid exiting from the if with $? = 1, which
# would make configure fail if this is the last instruction.
- $ac_cs_success || as_fn_exit $?
+ $ac_cs_success || as_fn_exit 1
fi
if test -n "$ac_unrecognized_opts" && test "$enable_option_checking" != no; then
{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: unrecognized options: $ac_unrecognized_opts" >&5
diff --git a/configure.in b/configure.in
index c23bac1..8c6a429 100644
--- a/configure.in
+++ b/configure.in
@@ -152,5 +152,14 @@ if test $ac_cv_prog_make_vpathok = no; then
done
fi
+dnl
+dnl support cchace
+dnl
+AC_ARG_WITH([ccache],
+ [AC_HELP_STRING([--with-ccache],
+ [Compile with ccache])],
+ [CC="ccache $CC"],
+ [])
+
AC_OUTPUT_COMMANDS([mkdir -p output])
AC_OUTPUT(Makefile rdoff/Makefile doc/Makefile)
diff --git a/directiv.pl b/directiv.pl
index 684f542..0417f56 100755
--- a/directiv.pl
+++ b/directiv.pl
@@ -95,7 +95,7 @@ if ($output eq 'h') {
}
@hashinfo = gen_perfect_hash(\%directive);
- if (!defined(@hashinfo)) {
+ if (!@hashinfo) {
die "$0: no hash found\n";
}
diff --git a/disasm.c b/disasm.c
index 6320852..46cec8a 100644
--- a/disasm.c
+++ b/disasm.c
@@ -1,6 +1,6 @@
/* ----------------------------------------------------------------------- *
*
- * Copyright 1996-2010 The NASM Authors - All Rights Reserved
+ * Copyright 1996-2012 The NASM Authors - All Rights Reserved
* See the file AUTHORS included with the NASM distribution for
* the specific copyright holders.
*
@@ -197,28 +197,11 @@ static enum reg_enum whichreg(opflags_t regflags, int regval, int rex)
}
/*
- * Process a DREX suffix
- */
-static uint8_t *do_drex(uint8_t *data, insn *ins)
-{
- uint8_t drex = *data++;
- operand *dst = &ins->oprs[ins->drexdst];
-
- if ((drex & 8) != ((ins->rex & REX_OC) ? 8 : 0))
- return NULL; /* OC0 mismatch */
- ins->rex = (ins->rex & ~7) | (drex & 7);
-
- dst->segment = SEG_RMREG;
- dst->basereg = drex >> 4;
- return data;
-}
-
-
-/*
* Process an effective address (ModRM) specification.
*/
static uint8_t *do_ea(uint8_t *data, int modrm, int asize,
- int segsize, operand * op, insn *ins)
+ int segsize, enum ea_type type,
+ operand *op, insn *ins)
{
int mod, rm, scale, index, base;
int rex;
@@ -227,14 +210,9 @@ static uint8_t *do_ea(uint8_t *data, int modrm, int asize,
mod = (modrm >> 6) & 03;
rm = modrm & 07;
- if (mod != 3 && rm == 4 && asize != 16)
+ if (mod != 3 && asize != 16 && rm == 4)
sib = *data++;
- if (ins->rex & REX_D) {
- data = do_drex(data, ins);
- if (!data)
- return NULL;
- }
rex = ins->rex;
if (mod == 3) { /* pure register version */
@@ -253,6 +231,10 @@ static uint8_t *do_ea(uint8_t *data, int modrm, int asize,
* Exception: mod=0,rm=6 does not specify [BP] as one might
* expect, but instead specifies [disp16].
*/
+
+ if (type != EA_SCALAR)
+ return NULL;
+
op->indexreg = op->basereg = -1;
op->scale = 1; /* always, in 16 bits */
switch (rm) {
@@ -341,6 +323,7 @@ static uint8_t *do_ea(uint8_t *data, int modrm, int asize,
mod = 2; /* fake disp32 */
}
+
if (rm == 4) { /* process SIB */
scale = (sib >> 6) & 03;
index = (sib >> 3) & 07;
@@ -348,9 +331,13 @@ static uint8_t *do_ea(uint8_t *data, int modrm, int asize,
op->scale = 1 << scale;
- if (index == 4 && !(rex & REX_X))
+ if (type == EA_XMMVSIB)
+ op->indexreg = nasm_rd_xmmreg[index | ((rex & REX_X) ? 8 : 0)];
+ else if (type == EA_YMMVSIB)
+ op->indexreg = nasm_rd_ymmreg[index | ((rex & REX_X) ? 8 : 0)];
+ else if (index == 4 && !(rex & REX_X))
op->indexreg = -1; /* ESP/RSP cannot be an index */
- else if (a64)
+ else if (a64)
op->indexreg = nasm_rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
else
op->indexreg = nasm_rd_reg32[index | ((rex & REX_X) ? 8 : 0)];
@@ -365,6 +352,9 @@ static uint8_t *do_ea(uint8_t *data, int modrm, int asize,
if (segsize == 16)
op->disp_size = 32;
+ } else if (type != EA_SCALAR) {
+ /* Can't have VSIB without SIB */
+ return NULL;
}
switch (mod) {
@@ -410,6 +400,7 @@ static int matches(const struct itemplate *t, uint8_t *data,
int s_field_for = -1; /* No 144/154 series code encountered */
bool vex_ok = false;
int regmask = (segsize == 64) ? 15 : 7;
+ enum ea_type eat = EA_SCALAR;
for (i = 0; i < MAX_OPERANDS; i++) {
ins->oprs[i].segment = ins->oprs[i].disp_size =
@@ -573,7 +564,7 @@ static int matches(const struct itemplate *t, uint8_t *data,
{
int modrm = *data++;
opx->segment |= SEG_RMREG;
- data = do_ea(data, modrm, asize, segsize, opy, ins);
+ data = do_ea(data, modrm, asize, segsize, eat, opy, ins);
if (!data)
return false;
opx->basereg = ((modrm >> 3) & 7) + (ins->rex & REX_R ? 8 : 0);
@@ -607,22 +598,6 @@ static int matches(const struct itemplate *t, uint8_t *data,
}
break;
- case4(0160):
- ins->rex |= REX_D;
- ins->drexdst = op1;
- break;
-
- case4(0164):
- ins->rex |= REX_D|REX_OC;
- ins->drexdst = op1;
- break;
-
- case 0171:
- data = do_drex(data, ins);
- if (!data)
- return false;
- break;
-
case 0172:
{
uint8_t ximm = *data++;
@@ -646,13 +621,12 @@ static int matches(const struct itemplate *t, uint8_t *data,
}
break;
- case 0174:
+ case4(0174):
{
uint8_t ximm = *data++;
- c = *r++;
- ins->oprs[c].basereg = (ximm >> 4) & regmask;
- ins->oprs[c].segment |= SEG_RMREG;
+ opx->basereg = (ximm >> 4) & regmask;
+ opx->segment |= SEG_RMREG;
}
break;
@@ -668,7 +642,7 @@ static int matches(const struct itemplate *t, uint8_t *data,
int modrm = *data++;
if (((modrm >> 3) & 07) != (c & 07))
return false; /* spare field doesn't match up */
- data = do_ea(data, modrm, asize, segsize, opy, ins);
+ data = do_ea(data, modrm, asize, segsize, eat, opy, ins);
if (!data)
return false;
break;
@@ -691,7 +665,7 @@ static int matches(const struct itemplate *t, uint8_t *data,
int vexwlp = *r++;
ins->rex |= REX_V;
- if ((prefix->rex & (REX_V|REX_D|REX_P)) != REX_V)
+ if ((prefix->rex & (REX_V|REX_P)) != REX_V)
return false;
if ((vexm & 0x1f) != prefix->vex_m)
@@ -729,6 +703,27 @@ static int matches(const struct itemplate *t, uint8_t *data,
break;
}
+ case 0271:
+ if (prefix->rep == 0xF3)
+ drep = P_XRELEASE;
+ break;
+
+ case 0272:
+ if (prefix->rep == 0xF2)
+ drep = P_XACQUIRE;
+ else if (prefix->rep == 0xF3)
+ drep = P_XRELEASE;
+ break;
+
+ case 0273:
+ if (prefix->lock == 0xF0) {
+ if (prefix->rep == 0xF2)
+ drep = P_XACQUIRE;
+ else if (prefix->rep == 0xF3)
+ drep = P_XRELEASE;
+ }
+ break;
+
case 0310:
if (asize != 16)
return false;
@@ -915,6 +910,18 @@ static int matches(const struct itemplate *t, uint8_t *data,
a_used = true;
break;
+ case 0370:
+ case 0371:
+ break;
+
+ case 0374:
+ eat = EA_XMMVSIB;
+ break;
+
+ case 0375:
+ eat = EA_YMMVSIB;
+ break;
+
default:
return false; /* Unknown code */
}
@@ -923,8 +930,8 @@ static int matches(const struct itemplate *t, uint8_t *data,
if (!vex_ok && (ins->rex & REX_V))
return false;
- /* REX cannot be combined with DREX or VEX */
- if ((ins->rex & (REX_D|REX_V)) && (prefix->rex & REX_P))
+ /* REX cannot be combined with VEX */
+ if ((ins->rex & REX_V) && (prefix->rex & REX_P))
return false;
/*
@@ -936,14 +943,14 @@ static int matches(const struct itemplate *t, uint8_t *data,
}
if (lock) {
- if (ins->prefixes[PPS_LREP])
+ if (ins->prefixes[PPS_LOCK])
return false;
- ins->prefixes[PPS_LREP] = P_LOCK;
+ ins->prefixes[PPS_LOCK] = P_LOCK;
}
if (drep) {
- if (ins->prefixes[PPS_LREP])
+ if (ins->prefixes[PPS_REP])
return false;
- ins->prefixes[PPS_LREP] = drep;
+ ins->prefixes[PPS_REP] = drep;
}
ins->prefixes[PPS_WAIT] = dwait;
if (!o_used) {
diff --git a/doc/Makefile b/doc/Makefile
index a4a10ca..7223adc 100644
--- a/doc/Makefile
+++ b/doc/Makefile
@@ -12,7 +12,7 @@ docdir = $(prefix)/doc/nasm
infodir = ${datarootdir}/info
datarootdir = ${prefix}/share
-INSTALL = /usr/bin/install -c
+INSTALL = /bin/install -c
INSTALL_PROGRAM = ${INSTALL}
INSTALL_DATA = ${INSTALL} -m 644
diff --git a/doc/changes.src b/doc/changes.src
index 7195377..9823dd7 100644
--- a/doc/changes.src
+++ b/doc/changes.src
@@ -4,9 +4,103 @@
\H{cl-2.xx} NASM 2 Series
-The NASM 2 series support x86-64, and is the production version of NASM
+The NASM 2 series supports x86-64, and is the production version of NASM
since 2007.
+\S{cl-2.10.07} Version 2.10.07
+
+\b Fix line continuation parsing being broken in previous version.
+
+
+\S{cl-2.10.06} Version 2.10.06
+
+\b Always quote the dependency source names when using the automatic
+dependency generation options.
+
+\b If no dependency target name is specified via the \c{-MT} or
+\c{-MQ} options, quote the default output name.
+
+\b Fix assembly of shift operations in \c{CPU 8086} mode.
+
+\b Fix incorrect generation of explicit immediate byte for shift by 1
+under certain circumstances.
+
+\b Fix assembly of the \c{VPCMPGTQ} instruction.
+
+\b Fix RIP-relative relocations in the \c{macho64} backend.
+
+\S{cl-2.10.05} Version 2.10.05
+
+\b Add the \c{CLAC} and \c{STAC} instructions.
+
+\S{cl-2.10.04} Version 2.10.04
+
+\b Add back the inadvertently deleted 256-bit version of the \c{VORPD}
+instruction.
+
+\b Correct disassembly of instructions starting with byte \c{82} hex.
+
+\b Fix corner cases in token pasting, for example:
+
+\c %define N 1e%++%+ 5
+\c dd N, 1e+5
+
+\S{cl-2.10.03} Version 2.10.03
+
+\b Correct the assembly of the instruction:
+
+\c XRELEASE MOV [absolute],AL
+
+Previous versions would incorrectly generate \c{F3 A2} for this
+instruction and issue a warning; correct behavior is to emit \c{F3 88
+05}.
+
+\S{cl-2.10.02} Version 2.10.02
+
+\b Add the \c{ifunc} macro package with integer functions, currently
+only integer logarithms. See \k{pkg_ifunc}.
+
+\b Add the \c{RDSEED}, \c{ADCX} and \c{ADOX} instructions.
+
+\S{cl-2.10.01} Version 2.10.01
+
+\b Add missing VPMOVMSKB instruction with reg32, ymmreg operands.
+
+\S{cl-2.10} Version 2.10
+
+\b When optimization is enabled, \c{mov r64,imm} now optimizes to the
+ shortest form possible between:
+
+\c mov r32,imm32 ; 5 bytes
+\c mov r64,imm32 ; 7 bytes
+\c mov r64,imm64 ; 10 bytes
+
+To force a specific form, use the \c{STRICT} keyword, see \k{strict}.
+
+\b Add support for the Intel AVX2 instruction set.
+
+\b Add support for Bit Manipulation Instructions 1 and 2.
+
+\b Add support for Intel Transactional Synchronization Extensions (TSX).
+
+\b Add support for x32 ELF (32-bit ELF with the CPU in 64-bit mode.)
+ See \k{elffmt}.
+
+\b Add support for bigendian UTF-16 and UTF-32. See \k{unicode}.
+
+\S{cl-2.09.10} Version 2.09.10
+
+\b Fix up NSIS script to protect uninstaller against registry keys
+ absence or corruption. It brings in a few additional questions
+ to a user during deinstallation procedure but still it is better
+ than unpredictable file removal.
+
+\S{cl-2.09.09} Version 2.09.09
+
+\b Fix initialization of section attributes of \c{bin} output format.
+
+\b Fix \c{mach64} output format bug that crashes NASM due to NULL symbols.
+
\S{cl-2.09.08} Version 2.09.08
@@ -168,12 +262,6 @@ since 2007.
\b A number of enhancements/fixes in macros area.
-\#\b Support for arbitrarily terminating macro expansions \c{%exitmacro}.
-\# See \k{exitmacro}.
-
-\#\b Support for recursive macro expansion \c{%rmacro}/\c{%irmacro}.
-\# See \k{mlrmacro}.
-
\b Support for converting strings to tokens. See \k{deftok}.
\b Fuzzy operand size logic introduced.
diff --git a/doc/genps.pl b/doc/genps.pl
index c7c23cf..67e0f36 100755
--- a/doc/genps.pl
+++ b/doc/genps.pl
@@ -1,7 +1,7 @@
#!/usr/bin/perl
## --------------------------------------------------------------------------
##
-## Copyright 1996-2009 The NASM Authors - All Rights Reserved
+## Copyright 1996-2012 The NASM Authors - All Rights Reserved
## See the file AUTHORS included with the NASM distribution for
## the specific copyright holders.
##
@@ -1148,6 +1148,13 @@ if ( defined($metadata{epslogo}) &&
$x = ($psconf{pagewidth}-$width*$scale)/2;
$y = ($psconf{pageheight}-$height*$scale)/2;
+ if ( defined($metadata{logoxadj}) ) {
+ $x += $metadata{logoxadj};
+ }
+ if ( defined($metadata{logoyadj}) ) {
+ $y += $metadata{logoyadj};
+ }
+
print "BeginEPSF\n";
print $x, ' ', $y, " translate\n";
print $scale, " dup scale\n" unless ( $scale == 1 );
diff --git a/doc/nasmdoc.src b/doc/nasmdoc.src
index 82cbf51..55dbfc0 100644
--- a/doc/nasmdoc.src
+++ b/doc/nasmdoc.src
@@ -1,6 +1,6 @@
\# --------------------------------------------------------------------------
\#
-\# Copyright 1996-2011 The NASM Authors - All Rights Reserved
+\# Copyright 1996-2012 The NASM Authors - All Rights Reserved
\# See the file AUTHORS included with the NASM distribution for
\# the specific copyright holders.
\#
@@ -35,7 +35,7 @@
\#
\M{category}{Programming}
\M{title}{NASM - The Netwide Assembler}
-\M{year}{1996-2011}
+\M{year}{1996-2012}
\M{author}{The NASM Development Team}
\M{copyright_tail}{-- All Rights Reserved}
\M{license}{This document is redistributable under the license given in the file "LICENSE" distributed in the NASM archive.}
@@ -44,6 +44,7 @@
\M{infofile}{nasm}
\M{infotitle}{The Netwide Assembler for x86}
\M{epslogo}{nasmlogo.eps}
+\M{logoyadj}{-72}
\IR{-D} \c{-D} option
\IR{-E} \c{-E} option
\IR{-F} \c{-F} option
@@ -160,6 +161,7 @@ in \c{elf}
\IR{elf shared libraries} ELF, shared libraries
\IR{elf32} \c{elf32}
\IR{elf64} \c{elf64}
+\IR{elfx32} \c{elfx32}
\IR{executable and linkable format} Executable and Linkable Format
\IR{extern, obj extensions to} \c{EXTERN}, \c{obj} extensions to
\IR{extern, rdf extensions to} \c{EXTERN}, \c{rdf} extensions to
@@ -520,11 +522,11 @@ For Microsoft object file formats (\c{obj}, \c{win32} and \c{win64}),
it will remove the \c{.asm} \i{extension} (or whatever extension you
like to use - NASM doesn't care) from your source file name and
substitute \c{.obj}. For Unix object file formats (\c{aout}, \c{as86},
-\c{coff}, \c{elf32}, \c{elf64}, \c{ieee}, \c{macho32} and \c{macho64})
-it will substitute \c{.o}. For \c{dbg}, \c{rdf}, \c{ith} and \c{srec},
-it will use \c{.dbg}, \c{.rdf}, \c{.ith} and \c{.srec}, respectively,
-and for the \c{bin} format it will simply remove the extension, so
-that \c{myfile.asm} produces the output file \c{myfile}.
+\c{coff}, \c{elf32}, \c{elf64}, \c{elfx32}, \c{ieee}, \c{macho32} and
+\c{macho64}) it will substitute \c{.o}. For \c{dbg}, \c{rdf}, \c{ith}
+and \c{srec}, it will use \c{.dbg}, \c{.rdf}, \c{.ith} and \c{.srec},
+respectively, and for the \c{bin} format it will simply remove the
+extension, so that \c{myfile.asm} produces the output file \c{myfile}.
If the output file already exists, NASM will overwrite it, unless it
has the same name as the input file, in which case it will give a
@@ -624,7 +626,8 @@ specified by the \c{-o} option.
The \c{-MQ} option acts as the \c{-MT} option, except it tries to
quote characters that have special meaning in Makefile syntax. This
is not foolproof, as not all characters with special meaning are
-quotable in Make.
+quotable in Make. The default output (if no \c{-MT} or \c{-MQ} option
+is specified) is automatically quoted.
\S{opt-MP} The \i\c{-MP} Option: Emit phony targets
@@ -946,6 +949,13 @@ Enabled by default.
\b \i\c{user} controls \c{%warning} directives (see \k{pperror}).
Enabled by default.
+\b \i\c{lock} warns about \c{LOCK} prefixes on unlockable instructions.
+Enabled by default.
+
+\b \i\c{hle} warns about invalid use of the HLE \c{XACQUIRE} or \c{XRELEASE}
+prefixes.
+Enabled by default.
+
\b \i\c{error} causes warnings to be treated as errors. Disabled by
default.
@@ -1587,9 +1597,12 @@ operands to \c{DW}, and so forth.
\S{unicode} \I{UTF-16}\I{UTF-32}\i{Unicode} Strings
-The special operators \i\c{__utf16__} and \i\c{__utf32__} allows
-definition of Unicode strings. They take a string in UTF-8 format and
-converts it to (littleendian) UTF-16 or UTF-32, respectively.
+The special operators \i\c{__utf16__}, \i\c{__utf16le__},
+\i\c{__utf16be__}, \i\c{__utf32__}, \i\c{__utf32le__} and
+\i\c{__utf32be__} allows definition of Unicode strings. They take a
+string in UTF-8 format and converts it to UTF-16 or UTF-32,
+respectively. Unless the \c{be} forms are specified, the output is
+littleendian.
For example:
@@ -1599,9 +1612,9 @@ For example:
\c dw u('C:\WINDOWS'), 0 ; Pathname in UTF-16
\c dd w(`A + B = \u206a`), 0 ; String in UTF-32
-\c{__utf16__} and \c{__utf32__} can be applied either to strings
-passed to the \c{DB} family instructions, or to character constants in
-an expression context.
+The UTF operators can be applied either to strings passed to the
+\c{DB} family instructions, or to character constants in an expression
+context.
\S{fltconst} \I{floating-point, constants}Floating-Point Constants
@@ -1775,16 +1788,24 @@ Since the \c{%} character is used extensively by the macro
modulo operators are followed by white space wherever they appear.
-\S{expmul} \i{Unary Operators}: \I{+ opunary}\c{+}, \I{- opunary}\c{-},
-\i\c{~}, \I{! opunary}\c{!} and \i\c{SEG}
+\S{expmul} \i{Unary Operators}
-The highest-priority operators in NASM's expression grammar are
-those which only apply to one argument. \c{-} negates its operand,
-\c{+} does nothing (it's provided for symmetry with \c{-}), \c{~}
-computes the \i{one's complement} of its operand, \c{!} is the
-\i{logical negation} operator, and \c{SEG} provides the \i{segment address}
+The highest-priority operators in NASM's expression grammar are those
+which only apply to one argument. These are \I{+ opunary}\c{+}, \I{-
+opunary}\c{-}, \i\c{~}, \I{! opunary}\c{!}, \i\c{SEG}, and the
+\i{integer functions} operators.
+
+\c{-} negates its operand, \c{+} does nothing (it's provided for
+symmetry with \c{-}), \c{~} computes the \i{one's complement} of its
+operand, \c{!} is the \i{logical negation} operator.
+
+\c{SEG} provides the \i{segment address}
of its operand (explained in more detail in \k{segwrt}).
+A set of additional operators with leading and trailing double
+underscores are used to implement the integer functions of the
+\c{ifunc} macro package, see \k{pkg_ifunc}.
+
\H{segwrt} \i\c{SEG} and \i\c{WRT}
@@ -2415,21 +2436,6 @@ things like
\c silly {13,10}, crlf ; crlf: db 13,10
-\#\S{mlrmacro} \i{Recursive Multi-Line Macros}: \I\c{%irmacro}\i\c{%rmacro}
-\#
-\#A multi-line macro cannot be referenced within itself, in order to
-\#prevent accidental infinite recursion.
-\#
-\#Recursive multi-line macros allow for self-referencing, with the
-\#caveat that the user is aware of the existence, use and purpose of
-\#recursive multi-line macros. There is also a generous, but sane, upper
-\#limit to the number of recursions, in order to prevent run-away memory
-\#consumption in case of accidental infinite recursion.
-\#
-\#As with non-recursive multi-line macros, recursive multi-line macros are
-\#\i{case-sensitive}, unless you define them using the alternative
-\#directive \c{%irmacro}.
-
\S{mlmacover} Overloading Multi-Line Macros\I{overloading, multi-line macros}
As with single-line macros, multi-line macros can be overloaded by
@@ -2887,21 +2893,6 @@ does \e{not} remove the macro \c{bar}, since the argument
specification does not match exactly.
-\#\S{exitmacro} Exiting Multi-Line Macros: \i\c{%exitmacro}
-\#
-\#Multi-line macro expansions can be arbitrarily terminated with
-\#the \c{%exitmacro} directive.
-\#
-\#For example:
-\#
-\#\c %macro foo 1-3
-\#\c ; Do something
-\#\c %if<condition>
-\#\c %exitmacro
-\#\c %endif
-\#\c ; Do something
-\#\c %endmacro
-
\H{condasm} \i{Conditional Assembly}\I\c{%if}
Similarly to the C preprocessor, NASM allows sections of a source
@@ -3793,6 +3784,17 @@ variable, for example:
\c %defstr C_colon %!'C:'
+\H{comment} Comment Blocks: \i\c{%comment}
+
+The \c{%comment} and \c{%endcomment} directives are used to specify
+a block of commented (i.e. unprocessed) code/text. Everything between
+\c{%comment} and \c{%endcomment} will be ignored by the preprocessor.
+
+\c %comment
+\c ; some code, text or data to be ignored
+\c %endcomment
+
+
\H{stdmac} \i{Standard Macros}
NASM defines a set of standard macros, which are already defined
@@ -4283,6 +4285,34 @@ This packages contains the following floating-point convenience macros:
\c %define float128h(x) __float128h__(x)
+\H{pkg_ifunc} \i\c{ifunc}: \i{Integer functions}
+
+This package contains a set of macros which implement integer
+functions. These are actually implemented as special operators, but
+are most conveniently accessed via this macro package.
+
+The macros provided are:
+
+\S{ilog2} \i{Integer logarithms}
+
+These functions calculate the integer logarithm base 2 of their
+argument, considered as an unsigned integer. The only differences
+between the functions is their behavior if the argument provided is
+not a power of two.
+
+The function \i\c{ilog2e()} (alias \i\c{ilog2()}) generate an error if
+the argument is not a power of two.
+
+The function \i\c{ilog2w()} generate a warning if the argument is not
+a power of two.
+
+The function \i\c{ilog2f()} rounds the argument down to the nearest
+power of two; if the argument is zero it returns zero.
+
+The function \i\c{ilog2c()} rounds the argument up to the nearest
+power of two.
+
+
\C{directive} \i{Assembler Directives}
NASM, though it attempts to avoid the bureaucracy of assemblers like
@@ -5357,20 +5387,21 @@ While \c{REL} takes good care of RIP-relative addressing, there is one
aspect that is easy to overlook for a Win64 programmer: indirect
references. Consider a switch dispatch table:
-\c jmp QWORD[dsptch+rax*8]
+\c jmp qword [dsptch+rax*8]
\c ...
\c dsptch: dq case0
\c dq case1
\c ...
-Even novice Win64 assembler programmer will soon realize that the code
+Even a novice Win64 assembler programmer will soon realize that the code
is not 64-bit savvy. Most notably linker will refuse to link it with
-"\c{'ADDR32' relocation to '.text' invalid without
-/LARGEADDRESSAWARE:NO}". So [s]he will have to split jmp instruction as
-following:
+
+\c 'ADDR32' relocation to '.text' invalid without /LARGEADDRESSAWARE:NO
+
+So [s]he will have to split jmp instruction as following:
\c lea rbx,[rel dsptch]
-\c jmp QWORD[rbx+rax*8]
+\c jmp qword [rbx+rax*8]
What happens behind the scene is that effective address in \c{lea} is
encoded relative to instruction pointer, or in perfectly
@@ -5383,7 +5414,7 @@ to current process, which kind of undermines the idea of sharing .dll.
But no worry, it's trivial to fix:
\c lea rbx,[rel dsptch]
-\c add rbx,QWORD[rbx+rax*8]
+\c add rbx,[rbx+rax*8]
\c jmp rbx
\c ...
\c dsptch: dq case0-dsptch
@@ -5398,7 +5429,7 @@ acquainted with PE-COFF format base address denotes start of
these image-relative references:
\c lea rbx,[rel dsptch]
-\c mov eax,DWORD[rbx+rax*4]
+\c mov eax,[rbx+rax*4]
\c sub rbx,dsptch wrt ..imagebase
\c add rbx,rax
\c jmp rbx
@@ -5614,13 +5645,17 @@ object files suitable for linking with the \i{MacOS X} linker.
\c{macho} provides a default output file-name extension of \c{.o}.
-\H{elffmt} \i\c{elf32} and \i\c{elf64}: \I{ELF}\I{linux, elf}\i{Executable and Linkable
+\H{elffmt} \i\c{elf32}, \i\c{elf64}, \i\c{elfx32}: \I{ELF}\I{linux, elf}\i{Executable and Linkable
Format} Object Files
-The \c{elf32} and \c{elf64} output formats generate \c{ELF32 and ELF64} (Executable and Linkable Format) object files, as used by Linux as well as \i{Unix System V},
-including \i{Solaris x86}, \i{UnixWare} and \i{SCO Unix}. \c{elf}
-provides a default output file-name extension of \c{.o}.
-\c{elf} is a synonym for \c{elf32}.
+The \c{elf32}, \c{elf64} and \c{elfx32} output formats generate
+\c{ELF32 and ELF64} (Executable and Linkable Format) object files, as
+used by Linux as well as \i{Unix System V}, including \i{Solaris x86},
+\i{UnixWare} and \i{SCO Unix}. \c{elf} provides a default output
+file-name extension of \c{.o}. \c{elf} is a synonym for \c{elf32}.
+
+The \c{elfx32} format is used for the \i{x32} ABI, which is a 32-bit
+ABI with the CPU in 64-bit mode.
\S{abisect} ELF specific directive \i\c{osabi}
@@ -5758,7 +5793,7 @@ of the symbol with code such as:
\c mov [gs:eax],ebx
-\b In ELF64 mode, referring to an external or global symbol using
+\b In ELF64 or ELFx32 mode, referring to an external or global symbol using
\c{wrt ..gottpoff} \I\c{..gottpoff}
causes the linker to build an entry \e{in} the GOT containing the
offset of the symbol within the TLS block, so you can access the value
@@ -5844,7 +5879,7 @@ these relocations is generated.
\S{elfdbg} Debug formats and ELF
\I{ELF, Debug formats and}
-\c{ELF32} and \c{ELF64} provide debug information in \c{STABS} and \c{DWARF} formats.
+ELF provides debug information in \c{STABS} and \c{DWARF} formats.
Line number information is generated for all executable sections, but please
note that only the ".text" section is executable by default.
diff --git a/doc/nasmlogo.eps b/doc/nasmlogo.eps
index deb5a2c..9ec2919 100644
--- a/doc/nasmlogo.eps
+++ b/doc/nasmlogo.eps
@@ -1,35 +1,212 @@
%!PS-Adobe-3.0 EPSF-3.0
-%%BoundingBox: 99 45 385 111
+%%Creator: cairo 1.10.2 (http://cairographics.org)
+%%CreationDate: Sun Feb 26 02:08:42 2012
+%%Pages: 1
+%%BoundingBox: 44 42 306 306
%%DocumentData: Clean7Bit
-%%DocumentFonts: Courier-Bold
-%%DocumentNeededFonts: Courier-Bold
-%%Title: (NASM logo)
+%%LanguageLevel: 2
%%EndComments
-%%Page 1 1
+%%BeginProlog
+/cairo_eps_state save def
+/dict_count countdictstack def
+/op_count count 1 sub def
+userdict begin
+/q { gsave } bind def
+/Q { grestore } bind def
+/cm { 6 array astore concat } bind def
+/w { setlinewidth } bind def
+/J { setlinecap } bind def
+/j { setlinejoin } bind def
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+/m { moveto } bind def
+/l { lineto } bind def
+/c { curveto } bind def
+/h { closepath } bind def
+/re { exch dup neg 3 1 roll 5 3 roll moveto 0 rlineto
+ 0 exch rlineto 0 rlineto closepath } bind def
+/S { stroke } bind def
+/f { fill } bind def
+/f* { eofill } bind def
+/n { newpath } bind def
+/W { clip } bind def
+/W* { eoclip } bind def
+/BT { } bind def
+/ET { } bind def
+/pdfmark where { pop globaldict /?pdfmark /exec load put }
+ { globaldict begin /?pdfmark /pop load def /pdfmark
+ /cleartomark load def end } ifelse
+/BDC { mark 3 1 roll /BDC pdfmark } bind def
+/EMC { mark /EMC pdfmark } bind def
+/cairo_store_point { /cairo_point_y exch def /cairo_point_x exch def } def
+/Tj { show currentpoint cairo_store_point } bind def
+/TJ {
+ {
+ dup
+ type /stringtype eq
+ { show } { -0.001 mul 0 cairo_font_matrix dtransform rmoveto } ifelse
+ } forall
+ currentpoint cairo_store_point
+} bind def
+/cairo_selectfont { cairo_font_matrix aload pop pop pop 0 0 6 array astore
+ cairo_font exch selectfont cairo_point_x cairo_point_y moveto } bind def
+/Tf { pop /cairo_font exch def /cairo_font_matrix where
+ { pop cairo_selectfont } if } bind def
+/Td { matrix translate cairo_font_matrix matrix concatmatrix dup
+ /cairo_font_matrix exch def dup 4 get exch 5 get cairo_store_point
+ /cairo_font where { pop cairo_selectfont } if } bind def
+/Tm { 2 copy 8 2 roll 6 array astore /cairo_font_matrix exch def
+ cairo_store_point /cairo_font where { pop cairo_selectfont } if } bind def
+/g { setgray } bind def
+/rg { setrgbcolor } bind def
+/d1 { setcachedevice } bind def
+%%EndProlog
+%%Page: 1 1
%%BeginPageSetup
-save
-newpath
+%%PageBoundingBox: 44 42 306 306
%%EndPageSetup
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-gsave 1 dict begin
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-( H7 I# T7 I# "*:. H7 I# I# )
-( U: :8 *#+ , :8 T, 79 U: :8 :8 )
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diff --git a/doc/psfonts.ph b/doc/psfonts.ph
index 8d2f4e6..5203a80 100644
--- a/doc/psfonts.ph
+++ b/doc/psfonts.ph
@@ -22,27 +22,27 @@ if ( 1 ) {
# Times family fonts
%TitlFont = (name => 'tfont',
- leading => 22,
+ leading => 24,
fonts => [[20,\%PS_Times_Bold],
[20,\%PS_Times_BoldItalic],
[20,\%PS_Courier_Bold]]);
%ChapFont = (name => 'cfont',
- leading => 19.2,
+ leading => 21.6,
fonts => [[18,\%PS_Times_Bold],
[18,\%PS_Times_BoldItalic],
[18,\%PS_Courier_Bold]]);
%HeadFont = (name => 'hfont',
- leading => 15.4,
+ leading => 16.8,
fonts => [[14,\%PS_Times_Bold],
[14,\%PS_Times_BoldItalic],
[14,\%PS_Courier_Bold]]);
%SubhFont = (name => 'sfont',
- leading => 13.2,
+ leading => 14.4,
fonts => [[12,\%PS_Times_Bold],
[12,\%PS_Times_BoldItalic],
[12,\%PS_Courier_Bold]]);
%BodyFont = (name => 'bfont',
- leading => 11,
+ leading => 12,
fonts => [[10,\%PS_Times_Roman],
[10,\%PS_Times_Italic],
[10,\%PS_Courier]]);
@@ -50,54 +50,54 @@ if ( 1 ) {
# Helvetica family fonts
%TitlFont = (name => 'tfont',
- leading => 22,
+ leading => 24,
fonts => [[20,\%PS_Helvetica_Bold],
[20,\%PS_Helvetica_BoldOblique],
[20,\%PS_Courier_Bold]]);
%ChapFont = (name => 'cfont',
- leading => 19.2,
+ leading => 21.6,
fonts => [[18,\%PS_Helvetica_Bold],
[18,\%PS_Helvetica_BoldOblique],
[18,\%PS_Courier_Bold]]);
%HeadFont = (name => 'hfont',
- leading => 15.4,
+ leading => 16.8,
fonts => [[14,\%PS_Helvetica_Bold],
[14,\%PS_Helvetica_BoldOblique],
[14,\%PS_Courier_Bold]]);
%SubhFont = (name => 'sfont',
- leading => 13.2,
+ leading => 14.4,
fonts => [[12,\%PS_Helvetica_Bold],
[12,\%PS_Helvetica_BoldOblique],
[12,\%PS_Courier_Bold]]);
%BodyFont = (name => 'bfont',
- leading => 11,
+ leading => 12,
fonts => [[10,\%PS_Helvetica],
[10,\%PS_Helvetica_Oblique],
[10,\%PS_Courier]]);
} else {
# Body text Times; headings Helvetica
%TitlFont = (name => 'tfont',
- leading => 22,
+ leading => 24,
fonts => [[20,\%PS_Helvetica_Bold],
[20,\%PS_Helvetica_BoldOblique],
[20,\%PS_Courier_Bold]]);
%ChapFont = (name => 'cfont',
- leading => 19.2,
+ leading => 21.6,
fonts => [[18,\%PS_Helvetica_Bold],
[18,\%PS_Helvetica_BoldOblique],
[18,\%PS_Courier_Bold]]);
%HeadFont = (name => 'hfont',
- leading => 15.4,
+ leading => 16.8,
fonts => [[14,\%PS_Helvetica_Bold],
[14,\%PS_Helvetica_BoldOblique],
[14,\%PS_Courier_Bold]]);
%SubhFont = (name => 'sfont',
- leading => 13.2,
+ leading => 14.4,
fonts => [[12,\%PS_Helvetica_Bold],
[12,\%PS_Helvetica_BoldOblique],
[12,\%PS_Courier_Bold]]);
%BodyFont = (name => 'bfont',
- leading => 11,
+ leading => 12,
fonts => [[10,\%PS_Times_Roman],
[10,\%PS_Times_Italic],
[10,\%PS_Courier]]);
diff --git a/eval.c b/eval.c
index bfbf281..d7cf844 100644
--- a/eval.c
+++ b/eval.c
@@ -1,6 +1,6 @@
/* ----------------------------------------------------------------------- *
*
- * Copyright 1996-2009 The NASM Authors - All Rights Reserved
+ * Copyright 1996-2012 The NASM Authors - All Rights Reserved
* See the file AUTHORS included with the NASM distribution for
* the specific copyright holders.
*
@@ -274,7 +274,7 @@ static expr *segment_part(expr * e)
* expr3 : expr4 [ {<<,>>} expr4...]
* expr4 : expr5 [ {+,-} expr5...]
* expr5 : expr6 [ {*,/,%,//,%%} expr6...]
- * expr6 : { ~,+,-,SEG } expr6
+ * expr6 : { ~,+,-,IFUNC,SEG } expr6
* | (bexpr)
* | symbol
* | $
@@ -732,6 +732,37 @@ static expr *eval_strfunc(enum strfunc type)
return finishtemp();
}
+static int64_t eval_ifunc(int64_t val, enum ifunc func)
+{
+ int errtype;
+ uint64_t uval = (uint64_t)val;
+ int64_t rv;
+
+ switch (func) {
+ case IFUNC_ILOG2E:
+ case IFUNC_ILOG2W:
+ errtype = (func == IFUNC_ILOG2E) ? ERR_NONFATAL : ERR_WARNING;
+
+ if ((!uval) | (uval & (uval-1)))
+ error(errtype, "ilog2 argument is not a power of two");
+ /* fall through */
+ case IFUNC_ILOG2F:
+ rv = ilog2_64(uval);
+ break;
+
+ case IFUNC_ILOG2C:
+ rv = (uval < 2) ? 0 : ilog2_64(uval-1) + 1;
+ break;
+
+ default:
+ error(ERR_PANIC, "invalid IFUNC token %d", func);
+ rv = 0;
+ break;
+ }
+
+ return rv;
+}
+
static expr *expr6(int critical)
{
int32_t type;
@@ -782,6 +813,23 @@ static expr *expr6(int critical)
}
return scalarvect(!reloc_value(e));
+ case TOKEN_IFUNC:
+ {
+ enum ifunc func = tokval->t_integer;
+ i = scan(scpriv, tokval);
+ e = expr6(critical);
+ if (!e)
+ return NULL;
+ if (is_just_unknown(e))
+ return unknown_expr();
+ else if (!is_simple(e)) {
+ error(ERR_NONFATAL, "function may only be applied to"
+ " scalar values");
+ return NULL;
+ }
+ return scalarvect(eval_ifunc(reloc_value(e), func));
+ }
+
case TOKEN_SEG:
i = scan(scpriv, tokval);
e = expr6(critical);
@@ -877,7 +925,7 @@ static expr *expr6(int critical)
return NULL;
} else {
if (opflags)
- *opflags |= 1;
+ *opflags |= OPFLAG_FORWARD;
type = EXPR_UNKNOWN;
label_seg = NO_SEG;
label_ofs = 1;
diff --git a/insns.dat b/insns.dat
index 7574dc3..a039106 100644
--- a/insns.dat
+++ b/insns.dat
@@ -1,6 +1,6 @@
;; --------------------------------------------------------------------------
;;
-;; Copyright 1996-2010 The NASM Authors - All Rights Reserved
+;; Copyright 1996-2012 The NASM Authors - All Rights Reserved
;; See the file AUTHORS included with the NASM distribution for
;; the specific copyright holders.
;;
@@ -40,8 +40,8 @@
; taken except to register the opcode as being present.
;
; For a detailed description of the code string (third field), please
-; see the comment at the top of assemble.c. For a detailed description
-; of the flags (fourth field), please see insns.h.
+; see insns.pl and the comment at the top of assemble.c. For a detailed
+; description of the flags (fourth field), please see insns.h.
;
; Comments with a pound sign after the semicolon generate section
; subheaders in the NASM documentation.
@@ -55,7 +55,7 @@ DQ ignore ignore ignore
DT ignore ignore ignore
DO ignore ignore ignore
DY ignore ignore ignore
-RESB imm \340 8086
+RESB imm [ resb] 8086
RESW ignore ignore ignore
RESD ignore ignore ignore
RESQ ignore ignore ignore
@@ -64,1450 +64,1460 @@ RESO ignore ignore ignore
RESY ignore ignore ignore
;# Conventional instructions
-AAA void \1\x37 8086,NOLONG
-AAD void \2\xD5\x0A 8086,NOLONG
-AAD imm \1\xD5\24 8086,SB,NOLONG
-AAM void \2\xD4\x0A 8086,NOLONG
-AAM imm \1\xD4\24 8086,SB,NOLONG
-AAS void \1\x3F 8086,NOLONG
-ADC mem,reg8 \1\x10\101 8086,SM
-ADC reg8,reg8 \1\x10\101 8086
-ADC mem,reg16 \320\1\x11\101 8086,SM
-ADC reg16,reg16 \320\1\x11\101 8086
-ADC mem,reg32 \321\1\x11\101 386,SM
-ADC reg32,reg32 \321\1\x11\101 386
-ADC mem,reg64 \324\1\x11\101 X64,SM
-ADC reg64,reg64 \324\1\x11\101 X64
-ADC reg8,mem \1\x12\110 8086,SM
-ADC reg8,reg8 \1\x12\110 8086
-ADC reg16,mem \320\1\x13\110 8086,SM
-ADC reg16,reg16 \320\1\x13\110 8086
-ADC reg32,mem \321\1\x13\110 386,SM
-ADC reg32,reg32 \321\1\x13\110 386
-ADC reg64,mem \324\1\x13\110 X64,SM
-ADC reg64,reg64 \324\1\x13\110 X64
-ADC rm16,imm8 \320\1\x83\202\275 8086
-ADC rm32,imm8 \321\1\x83\202\275 386
-ADC rm64,imm8 \324\1\x83\202\275 X64
-ADC reg_al,imm \1\x14\21 8086,SM
-ADC reg_ax,sbyte16 \320\1\x83\202\275 8086,SM
-ADC reg_ax,imm \320\1\x15\31 8086,SM
-ADC reg_eax,sbyte32 \321\1\x83\202\275 386,SM
-ADC reg_eax,imm \321\1\x15\41 386,SM
-ADC reg_rax,sbyte64 \324\1\x83\202\275 X64,SM
-ADC reg_rax,imm \324\1\x15\255 X64,SM
-ADC rm8,imm \1\x80\202\21 8086,SM
-ADC rm16,imm \320\145\x81\202\141 8086,SM
-ADC rm32,imm \321\155\x81\202\151 386,SM
-ADC rm64,imm \324\155\x81\202\251 X64,SM
-ADC mem,imm8 \1\x80\202\21 8086,SM
-ADC mem,imm16 \320\145\x81\202\141 8086,SM
-ADC mem,imm32 \321\155\x81\202\151 386,SM
-ADD mem,reg8 \1\x00\101 8086,SM
-ADD reg8,reg8 \1\x00\101 8086
-ADD mem,reg16 \320\1\x01\101 8086,SM
-ADD reg16,reg16 \320\1\x01\101 8086
-ADD mem,reg32 \321\1\x01\101 386,SM
-ADD reg32,reg32 \321\1\x01\101 386
-ADD mem,reg64 \324\1\x01\101 X64,SM
-ADD reg64,reg64 \324\1\x01\101 X64
-ADD reg8,mem \1\x02\110 8086,SM
-ADD reg8,reg8 \1\x02\110 8086
-ADD reg16,mem \320\1\x03\110 8086,SM
-ADD reg16,reg16 \320\1\x03\110 8086
-ADD reg32,mem \321\1\x03\110 386,SM
-ADD reg32,reg32 \321\1\x03\110 386
-ADD reg64,mem \324\1\x03\110 X64,SM
-ADD reg64,reg64 \324\1\x03\110 X64
-ADD rm16,imm8 \320\1\x83\200\275 8086
-ADD rm32,imm8 \321\1\x83\200\275 386
-ADD rm64,imm8 \324\1\x83\200\275 X64
-ADD reg_al,imm \1\x04\21 8086,SM
-ADD reg_ax,sbyte16 \320\1\x83\200\275 8086,SM
-ADD reg_ax,imm \320\1\x05\31 8086,SM
-ADD reg_eax,sbyte32 \321\1\x83\200\275 386,SM
-ADD reg_eax,imm \321\1\x05\41 386,SM
-ADD reg_rax,sbyte64 \324\1\x83\200\275 X64,SM
-ADD reg_rax,imm \324\1\x05\255 X64,SM
-ADD rm8,imm \1\x80\200\21 8086,SM
-ADD rm16,imm \320\145\x81\200\141 8086,SM
-ADD rm32,imm \321\155\x81\200\151 386,SM
-ADD rm64,imm \324\155\x81\200\251 X64,SM
-ADD mem,imm8 \1\x80\200\21 8086,SM
-ADD mem,imm16 \320\145\x81\200\141 8086,SM
-ADD mem,imm32 \321\155\x81\200\151 386,SM
-AND mem,reg8 \1\x20\101 8086,SM
-AND reg8,reg8 \1\x20\101 8086
-AND mem,reg16 \320\1\x21\101 8086,SM
-AND reg16,reg16 \320\1\x21\101 8086
-AND mem,reg32 \321\1\x21\101 386,SM
-AND reg32,reg32 \321\1\x21\101 386
-AND mem,reg64 \324\1\x21\101 X64,SM
-AND reg64,reg64 \324\1\x21\101 X64
-AND reg8,mem \1\x22\110 8086,SM
-AND reg8,reg8 \1\x22\110 8086
-AND reg16,mem \320\1\x23\110 8086,SM
-AND reg16,reg16 \320\1\x23\110 8086
-AND reg32,mem \321\1\x23\110 386,SM
-AND reg32,reg32 \321\1\x23\110 386
-AND reg64,mem \324\1\x23\110 X64,SM
-AND reg64,reg64 \324\1\x23\110 X64
-AND rm16,imm8 \320\1\x83\204\275 8086
-AND rm32,imm8 \321\1\x83\204\275 386
-AND rm64,imm8 \324\1\x83\204\275 X64
-AND reg_al,imm \1\x24\21 8086,SM
-AND reg_ax,sbyte16 \320\1\x83\204\275 8086,SM
-AND reg_ax,imm \320\1\x25\31 8086,SM
-AND reg_eax,sbyte32 \321\1\x83\204\275 386,SM
-AND reg_eax,imm \321\1\x25\41 386,SM
-AND reg_rax,sbyte64 \324\1\x83\204\275 X64,SM
-AND reg_rax,imm \324\1\x25\255 X64,SM
-AND rm8,imm \1\x80\204\21 8086,SM
-AND rm16,imm \320\145\x81\204\141 8086,SM
-AND rm32,imm \321\155\x81\204\151 386,SM
-AND rm64,imm \324\155\x81\204\251 X64,SM
-AND mem,imm8 \1\x80\204\21 8086,SM
-AND mem,imm16 \320\145\x81\204\141 8086,SM
-AND mem,imm32 \321\155\x81\204\151 386,SM
-ARPL mem,reg16 \1\x63\101 286,PROT,SM,NOLONG
-ARPL reg16,reg16 \1\x63\101 286,PROT,NOLONG
-BB0_RESET void \2\x0F\x3A PENT,CYRIX,ND
-BB1_RESET void \2\x0F\x3B PENT,CYRIX,ND
-BOUND reg16,mem \320\1\x62\110 186,NOLONG
-BOUND reg32,mem \321\1\x62\110 386,NOLONG
-BSF reg16,mem \320\2\x0F\xBC\110 386,SM
-BSF reg16,reg16 \320\2\x0F\xBC\110 386
-BSF reg32,mem \321\2\x0F\xBC\110 386,SM
-BSF reg32,reg32 \321\2\x0F\xBC\110 386
-BSF reg64,mem \324\2\x0F\xBC\110 X64,SM
-BSF reg64,reg64 \324\2\x0F\xBC\110 X64
-BSR reg16,mem \320\2\x0F\xBD\110 386,SM
-BSR reg16,reg16 \320\2\x0F\xBD\110 386
-BSR reg32,mem \321\2\x0F\xBD\110 386,SM
-BSR reg32,reg32 \321\2\x0F\xBD\110 386
-BSR reg64,mem \324\2\x0F\xBD\110 X64,SM
-BSR reg64,reg64 \324\2\x0F\xBD\110 X64
-BSWAP reg32 \321\1\x0F\10\xC8 486
-BSWAP reg64 \324\1\x0F\10\xC8 X64
-BT mem,reg16 \320\2\x0F\xA3\101 386,SM
-BT reg16,reg16 \320\2\x0F\xA3\101 386
-BT mem,reg32 \321\2\x0F\xA3\101 386,SM
-BT reg32,reg32 \321\2\x0F\xA3\101 386
-BT mem,reg64 \324\2\x0F\xA3\101 X64,SM
-BT reg64,reg64 \324\2\x0F\xA3\101 X64
-BT rm16,imm \320\2\x0F\xBA\204\25 386,SB
-BT rm32,imm \321\2\x0F\xBA\204\25 386,SB
-BT rm64,imm \324\2\x0F\xBA\204\25 X64,SB
-BTC mem,reg16 \320\2\x0F\xBB\101 386,SM
-BTC reg16,reg16 \320\2\x0F\xBB\101 386
-BTC mem,reg32 \321\2\x0F\xBB\101 386,SM
-BTC reg32,reg32 \321\2\x0F\xBB\101 386
-BTC mem,reg64 \324\2\x0F\xBB\101 X64,SM
-BTC reg64,reg64 \324\2\x0F\xBB\101 X64
-BTC rm16,imm \320\2\x0F\xBA\207\25 386,SB
-BTC rm32,imm \321\2\x0F\xBA\207\25 386,SB
-BTC rm64,imm \324\2\x0F\xBA\207\25 X64,SB
-BTR mem,reg16 \320\2\x0F\xB3\101 386,SM
-BTR reg16,reg16 \320\2\x0F\xB3\101 386
-BTR mem,reg32 \321\2\x0F\xB3\101 386,SM
-BTR reg32,reg32 \321\2\x0F\xB3\101 386
-BTR mem,reg64 \324\2\x0F\xB3\101 X64,SM
-BTR reg64,reg64 \324\2\x0F\xB3\101 X64
-BTR rm16,imm \320\2\x0F\xBA\206\25 386,SB
-BTR rm32,imm \321\2\x0F\xBA\206\25 386,SB
-BTR rm64,imm \324\2\x0F\xBA\206\25 X64,SB
-BTS mem,reg16 \320\2\x0F\xAB\101 386,SM
-BTS reg16,reg16 \320\2\x0F\xAB\101 386
-BTS mem,reg32 \321\2\x0F\xAB\101 386,SM
-BTS reg32,reg32 \321\2\x0F\xAB\101 386
-BTS mem,reg64 \324\2\x0F\xAB\101 X64,SM
-BTS reg64,reg64 \324\2\x0F\xAB\101 X64
-BTS rm16,imm \320\2\x0F\xBA\205\25 386,SB
-BTS rm32,imm \321\2\x0F\xBA\205\25 386,SB
-BTS rm64,imm \324\2\x0F\xBA\205\25 X64,SB
-CALL imm \322\1\xE8\64 8086
-CALL imm|near \322\1\xE8\64 8086
-CALL imm|far \322\1\x9A\34\74 8086,ND,NOLONG
-CALL imm16 \320\1\xE8\64 8086
-CALL imm16|near \320\1\xE8\64 8086
-CALL imm16|far \320\1\x9A\34\74 8086,ND,NOLONG
-CALL imm32 \321\1\xE8\64 386
-CALL imm32|near \321\1\xE8\64 386
-CALL imm32|far \321\1\x9A\34\74 386,ND,NOLONG
-CALL imm:imm \322\1\x9A\35\30 8086,NOLONG
-CALL imm16:imm \320\1\x9A\31\30 8086,NOLONG
-CALL imm:imm16 \320\1\x9A\31\30 8086,NOLONG
-CALL imm32:imm \321\1\x9A\41\30 386,NOLONG
-CALL imm:imm32 \321\1\x9A\41\30 386,NOLONG
-CALL mem|far \322\1\xFF\203 8086,NOLONG
-CALL mem|far \324\1\xFF\203 X64
-CALL mem16|far \320\1\xFF\203 8086
-CALL mem32|far \321\1\xFF\203 386
-CALL mem64|far \324\1\xFF\203 X64
-CALL mem|near \322\1\xFF\202 8086
-CALL mem16|near \320\1\xFF\202 8086
-CALL mem32|near \321\1\xFF\202 386,NOLONG
-CALL mem64|near \324\1\xFF\202 X64
-CALL reg16 \320\1\xFF\202 8086
-CALL reg32 \321\1\xFF\202 386,NOLONG
-CALL reg64 \323\1\xFF\202 X64
-CALL mem \322\1\xFF\202 8086
-CALL mem16 \320\1\xFF\202 8086
-CALL mem32 \321\1\xFF\202 386,NOLONG
-CALL mem64 \323\1\xFF\202 X64
-CBW void \320\1\x98 8086
-CDQ void \321\1\x99 386
-CDQE void \324\1\x98 X64
-CLC void \1\xF8 8086
-CLD void \1\xFC 8086
-CLGI void \3\x0F\x01\xDD X64,AMD
-CLI void \1\xFA 8086
-CLTS void \2\x0F\x06 286,PRIV
-CMC void \1\xF5 8086
-CMP mem,reg8 \1\x38\101 8086,SM
-CMP reg8,reg8 \1\x38\101 8086
-CMP mem,reg16 \320\1\x39\101 8086,SM
-CMP reg16,reg16 \320\1\x39\101 8086
-CMP mem,reg32 \321\1\x39\101 386,SM
-CMP reg32,reg32 \321\1\x39\101 386
-CMP mem,reg64 \324\1\x39\101 X64,SM
-CMP reg64,reg64 \324\1\x39\101 X64
-CMP reg8,mem \1\x3A\110 8086,SM
-CMP reg8,reg8 \1\x3A\110 8086
-CMP reg16,mem \320\1\x3B\110 8086,SM
-CMP reg16,reg16 \320\1\x3B\110 8086
-CMP reg32,mem \321\1\x3B\110 386,SM
-CMP reg32,reg32 \321\1\x3B\110 386
-CMP reg64,mem \324\1\x3B\110 X64,SM
-CMP reg64,reg64 \324\1\x3B\110 X64
-CMP rm16,imm8 \320\1\x83\207\275 8086
-CMP rm32,imm8 \321\1\x83\207\275 386
-CMP rm64,imm8 \324\1\x83\207\275 X64
-CMP reg_al,imm \1\x3C\21 8086,SM
-CMP reg_ax,sbyte16 \320\1\x83\207\275 8086,SM
-CMP reg_ax,imm \320\1\x3D\31 8086,SM
-CMP reg_eax,sbyte32 \321\1\x83\207\275 386,SM
-CMP reg_eax,imm \321\1\x3D\41 386,SM
-CMP reg_rax,sbyte64 \324\1\x83\207\275 X64,SM
-CMP reg_rax,imm \324\1\x3D\255 X64,SM
-CMP rm8,imm \1\x80\207\21 8086,SM
-CMP rm16,imm \320\145\x81\207\141 8086,SM
-CMP rm32,imm \321\155\x81\207\151 386,SM
-CMP rm64,imm \324\155\x81\207\251 X64,SM
-CMP mem,imm8 \1\x80\207\21 8086,SM
-CMP mem,imm16 \320\145\x81\207\141 8086,SM
-CMP mem,imm32 \321\155\x81\207\151 386,SM
-CMPSB void \335\1\xA6 8086
-CMPSD void \335\321\1\xA7 386
-CMPSQ void \335\324\1\xA7 X64
-CMPSW void \335\320\1\xA7 8086
-CMPXCHG mem,reg8 \2\x0F\xB0\101 PENT,SM
-CMPXCHG reg8,reg8 \2\x0F\xB0\101 PENT
-CMPXCHG mem,reg16 \320\2\x0F\xB1\101 PENT,SM
-CMPXCHG reg16,reg16 \320\2\x0F\xB1\101 PENT
-CMPXCHG mem,reg32 \321\2\x0F\xB1\101 PENT,SM
-CMPXCHG reg32,reg32 \321\2\x0F\xB1\101 PENT
-CMPXCHG mem,reg64 \324\2\x0F\xB1\101 X64,SM
-CMPXCHG reg64,reg64 \324\2\x0F\xB1\101 X64
-CMPXCHG486 mem,reg8 \2\x0F\xA6\101 486,SM,UNDOC,ND
-CMPXCHG486 reg8,reg8 \2\x0F\xA6\101 486,UNDOC,ND
-CMPXCHG486 mem,reg16 \320\2\x0F\xA7\101 486,SM,UNDOC,ND
-CMPXCHG486 reg16,reg16 \320\2\x0F\xA7\101 486,UNDOC,ND
-CMPXCHG486 mem,reg32 \321\2\x0F\xA7\101 486,SM,UNDOC,ND
-CMPXCHG486 reg32,reg32 \321\2\x0F\xA7\101 486,UNDOC,ND
-CMPXCHG8B mem \2\x0F\xC7\201 PENT
-CMPXCHG16B mem \324\2\x0F\xC7\201 X64
-CPUID void \2\x0F\xA2 PENT
-CPU_READ void \2\x0F\x3D PENT,CYRIX
-CPU_WRITE void \2\x0F\x3C PENT,CYRIX
-CQO void \324\1\x99 X64
-CWD void \320\1\x99 8086
-CWDE void \321\1\x98 386
-DAA void \1\x27 8086,NOLONG
-DAS void \1\x2F 8086,NOLONG
-DEC reg16 \320\10\x48 8086,NOLONG
-DEC reg32 \321\10\x48 386,NOLONG
-DEC rm8 \1\xFE\201 8086
-DEC rm16 \320\1\xFF\201 8086
-DEC rm32 \321\1\xFF\201 386
-DEC rm64 \324\1\xFF\201 X64
-DIV rm8 \1\xF6\206 8086
-DIV rm16 \320\1\xF7\206 8086
-DIV rm32 \321\1\xF7\206 386
-DIV rm64 \324\1\xF7\206 X64
-DMINT void \2\x0F\x39 P6,CYRIX
-EMMS void \2\x0F\x77 PENT,MMX
-ENTER imm,imm \1\xC8\30\25 186
-EQU imm \0 8086
-EQU imm:imm \0 8086
-F2XM1 void \2\xD9\xF0 8086,FPU
-FABS void \2\xD9\xE1 8086,FPU
-FADD mem32 \1\xD8\200 8086,FPU
-FADD mem64 \1\xDC\200 8086,FPU
-FADD fpureg|to \1\xDC\10\xC0 8086,FPU
-FADD fpureg \1\xD8\10\xC0 8086,FPU
-FADD fpureg,fpu0 \1\xDC\10\xC0 8086,FPU
-FADD fpu0,fpureg \1\xD8\11\xC0 8086,FPU
-FADD void \2\xDE\xC1 8086,FPU,ND
-FADDP fpureg \1\xDE\10\xC0 8086,FPU
-FADDP fpureg,fpu0 \1\xDE\10\xC0 8086,FPU
-FADDP void \2\xDE\xC1 8086,FPU,ND
-FBLD mem80 \1\xDF\204 8086,FPU
-FBLD mem \1\xDF\204 8086,FPU
-FBSTP mem80 \1\xDF\206 8086,FPU
-FBSTP mem \1\xDF\206 8086,FPU
-FCHS void \2\xD9\xE0 8086,FPU
-FCLEX void \341\2\xDB\xE2 8086,FPU
-FCMOVB fpureg \1\xDA\10\xC0 P6,FPU
-FCMOVB fpu0,fpureg \1\xDA\11\xC0 P6,FPU
-FCMOVB void \2\xDA\xC1 P6,FPU,ND
-FCMOVBE fpureg \1\xDA\10\xD0 P6,FPU
-FCMOVBE fpu0,fpureg \1\xDA\11\xD0 P6,FPU
-FCMOVBE void \2\xDA\xD1 P6,FPU,ND
-FCMOVE fpureg \1\xDA\10\xC8 P6,FPU
-FCMOVE fpu0,fpureg \1\xDA\11\xC8 P6,FPU
-FCMOVE void \2\xDA\xC9 P6,FPU,ND
-FCMOVNB fpureg \1\xDB\10\xC0 P6,FPU
-FCMOVNB fpu0,fpureg \1\xDB\11\xC0 P6,FPU
-FCMOVNB void \2\xDB\xC1 P6,FPU,ND
-FCMOVNBE fpureg \1\xDB\10\xD0 P6,FPU
-FCMOVNBE fpu0,fpureg \1\xDB\11\xD0 P6,FPU
-FCMOVNBE void \2\xDB\xD1 P6,FPU,ND
-FCMOVNE fpureg \1\xDB\10\xC8 P6,FPU
-FCMOVNE fpu0,fpureg \1\xDB\11\xC8 P6,FPU
-FCMOVNE void \2\xDB\xC9 P6,FPU,ND
-FCMOVNU fpureg \1\xDB\10\xD8 P6,FPU
-FCMOVNU fpu0,fpureg \1\xDB\11\xD8 P6,FPU
-FCMOVNU void \2\xDB\xD9 P6,FPU,ND
-FCMOVU fpureg \1\xDA\10\xD8 P6,FPU
-FCMOVU fpu0,fpureg \1\xDA\11\xD8 P6,FPU
-FCMOVU void \2\xDA\xD9 P6,FPU,ND
-FCOM mem32 \1\xD8\202 8086,FPU
-FCOM mem64 \1\xDC\202 8086,FPU
-FCOM fpureg \1\xD8\10\xD0 8086,FPU
-FCOM fpu0,fpureg \1\xD8\11\xD0 8086,FPU
-FCOM void \2\xD8\xD1 8086,FPU,ND
-FCOMI fpureg \1\xDB\10\xF0 P6,FPU
-FCOMI fpu0,fpureg \1\xDB\11\xF0 P6,FPU
-FCOMI void \2\xDB\xF1 P6,FPU,ND
-FCOMIP fpureg \1\xDF\10\xF0 P6,FPU
-FCOMIP fpu0,fpureg \1\xDF\11\xF0 P6,FPU
-FCOMIP void \2\xDF\xF1 P6,FPU,ND
-FCOMP mem32 \1\xD8\203 8086,FPU
-FCOMP mem64 \1\xDC\203 8086,FPU
-FCOMP fpureg \1\xD8\10\xD8 8086,FPU
-FCOMP fpu0,fpureg \1\xD8\11\xD8 8086,FPU
-FCOMP void \2\xD8\xD9 8086,FPU,ND
-FCOMPP void \2\xDE\xD9 8086,FPU
-FCOS void \2\xD9\xFF 386,FPU
-FDECSTP void \2\xD9\xF6 8086,FPU
-FDISI void \341\2\xDB\xE1 8086,FPU
-FDIV mem32 \1\xD8\206 8086,FPU
-FDIV mem64 \1\xDC\206 8086,FPU
-FDIV fpureg|to \1\xDC\10\xF8 8086,FPU
-FDIV fpureg \1\xD8\10\xF0 8086,FPU
-FDIV fpureg,fpu0 \1\xDC\10\xF8 8086,FPU
-FDIV fpu0,fpureg \1\xD8\11\xF0 8086,FPU
-FDIV void \2\xDE\xF9 8086,FPU,ND
-FDIVP fpureg \1\xDE\10\xF8 8086,FPU
-FDIVP fpureg,fpu0 \1\xDE\10\xF8 8086,FPU
-FDIVP void \2\xDE\xF9 8086,FPU,ND
-FDIVR mem32 \1\xD8\207 8086,FPU
-FDIVR mem64 \1\xDC\207 8086,FPU
-FDIVR fpureg|to \1\xDC\10\xF0 8086,FPU
-FDIVR fpureg,fpu0 \1\xDC\10\xF0 8086,FPU
-FDIVR fpureg \1\xD8\10\xF8 8086,FPU
-FDIVR fpu0,fpureg \1\xD8\11\xF8 8086,FPU
-FDIVR void \2\xDE\xF1 8086,FPU,ND
-FDIVRP fpureg \1\xDE\10\xF0 8086,FPU
-FDIVRP fpureg,fpu0 \1\xDE\10\xF0 8086,FPU
-FDIVRP void \2\xDE\xF1 8086,FPU,ND
-FEMMS void \2\x0F\x0E PENT,3DNOW
-FENI void \341\2\xDB\xE0 8086,FPU
-FFREE fpureg \1\xDD\10\xC0 8086,FPU
-FFREE void \2\xDD\xC1 8086,FPU
-FFREEP fpureg \1\xDF\10\xC0 286,FPU,UNDOC
-FFREEP void \2\xDF\xC1 286,FPU,UNDOC
-FIADD mem32 \1\xDA\200 8086,FPU
-FIADD mem16 \1\xDE\200 8086,FPU
-FICOM mem32 \1\xDA\202 8086,FPU
-FICOM mem16 \1\xDE\202 8086,FPU
-FICOMP mem32 \1\xDA\203 8086,FPU
-FICOMP mem16 \1\xDE\203 8086,FPU
-FIDIV mem32 \1\xDA\206 8086,FPU
-FIDIV mem16 \1\xDE\206 8086,FPU
-FIDIVR mem32 \1\xDA\207 8086,FPU
-FIDIVR mem16 \1\xDE\207 8086,FPU
-FILD mem32 \1\xDB\200 8086,FPU
-FILD mem16 \1\xDF\200 8086,FPU
-FILD mem64 \1\xDF\205 8086,FPU
-FIMUL mem32 \1\xDA\201 8086,FPU
-FIMUL mem16 \1\xDE\201 8086,FPU
-FINCSTP void \2\xD9\xF7 8086,FPU
-FINIT void \341\2\xDB\xE3 8086,FPU
-FIST mem32 \1\xDB\202 8086,FPU
-FIST mem16 \1\xDF\202 8086,FPU
-FISTP mem32 \1\xDB\203 8086,FPU
-FISTP mem16 \1\xDF\203 8086,FPU
-FISTP mem64 \1\xDF\207 8086,FPU
-FISTTP mem16 \1\xDF\201 PRESCOTT,FPU
-FISTTP mem32 \1\xDB\201 PRESCOTT,FPU
-FISTTP mem64 \1\xDD\201 PRESCOTT,FPU
-FISUB mem32 \1\xDA\204 8086,FPU
-FISUB mem16 \1\xDE\204 8086,FPU
-FISUBR mem32 \1\xDA\205 8086,FPU
-FISUBR mem16 \1\xDE\205 8086,FPU
-FLD mem32 \1\xD9\200 8086,FPU
-FLD mem64 \1\xDD\200 8086,FPU
-FLD mem80 \1\xDB\205 8086,FPU
-FLD fpureg \1\xD9\10\xC0 8086,FPU
-FLD void \2\xD9\xC1 8086,FPU,ND
-FLD1 void \2\xD9\xE8 8086,FPU
-FLDCW mem \1\xD9\205 8086,FPU,SW
-FLDENV mem \1\xD9\204 8086,FPU
-FLDL2E void \2\xD9\xEA 8086,FPU
-FLDL2T void \2\xD9\xE9 8086,FPU
-FLDLG2 void \2\xD9\xEC 8086,FPU
-FLDLN2 void \2\xD9\xED 8086,FPU
-FLDPI void \2\xD9\xEB 8086,FPU
-FLDZ void \2\xD9\xEE 8086,FPU
-FMUL mem32 \1\xD8\201 8086,FPU
-FMUL mem64 \1\xDC\201 8086,FPU
-FMUL fpureg|to \1\xDC\10\xC8 8086,FPU
-FMUL fpureg,fpu0 \1\xDC\10\xC8 8086,FPU
-FMUL fpureg \1\xD8\10\xC8 8086,FPU
-FMUL fpu0,fpureg \1\xD8\11\xC8 8086,FPU
-FMUL void \2\xDE\xC9 8086,FPU,ND
-FMULP fpureg \1\xDE\10\xC8 8086,FPU
-FMULP fpureg,fpu0 \1\xDE\10\xC8 8086,FPU
-FMULP void \2\xDE\xC9 8086,FPU,ND
-FNCLEX void \2\xDB\xE2 8086,FPU
-FNDISI void \2\xDB\xE1 8086,FPU
-FNENI void \2\xDB\xE0 8086,FPU
-FNINIT void \2\xDB\xE3 8086,FPU
-FNOP void \2\xD9\xD0 8086,FPU
-FNSAVE mem \1\xDD\206 8086,FPU
-FNSTCW mem \1\xD9\207 8086,FPU,SW
-FNSTENV mem \1\xD9\206 8086,FPU
-FNSTSW mem \1\xDD\207 8086,FPU,SW
-FNSTSW reg_ax \2\xDF\xE0 286,FPU
-FPATAN void \2\xD9\xF3 8086,FPU
-FPREM void \2\xD9\xF8 8086,FPU
-FPREM1 void \2\xD9\xF5 386,FPU
-FPTAN void \2\xD9\xF2 8086,FPU
-FRNDINT void \2\xD9\xFC 8086,FPU
-FRSTOR mem \1\xDD\204 8086,FPU
-FSAVE mem \341\1\xDD\206 8086,FPU
-FSCALE void \2\xD9\xFD 8086,FPU
-FSETPM void \2\xDB\xE4 286,FPU
-FSIN void \2\xD9\xFE 386,FPU
-FSINCOS void \2\xD9\xFB 386,FPU
-FSQRT void \2\xD9\xFA 8086,FPU
-FST mem32 \1\xD9\202 8086,FPU
-FST mem64 \1\xDD\202 8086,FPU
-FST fpureg \1\xDD\10\xD0 8086,FPU
-FST void \2\xDD\xD1 8086,FPU,ND
-FSTCW mem \341\1\xD9\207 8086,FPU,SW
-FSTENV mem \341\1\xD9\206 8086,FPU
-FSTP mem32 \1\xD9\203 8086,FPU
-FSTP mem64 \1\xDD\203 8086,FPU
-FSTP mem80 \1\xDB\207 8086,FPU
-FSTP fpureg \1\xDD\10\xD8 8086,FPU
-FSTP void \2\xDD\xD9 8086,FPU,ND
-FSTSW mem \341\1\xDD\207 8086,FPU,SW
-FSTSW reg_ax \341\2\xDF\xE0 286,FPU
-FSUB mem32 \1\xD8\204 8086,FPU
-FSUB mem64 \1\xDC\204 8086,FPU
-FSUB fpureg|to \1\xDC\10\xE8 8086,FPU
-FSUB fpureg,fpu0 \1\xDC\10\xE8 8086,FPU
-FSUB fpureg \1\xD8\10\xE0 8086,FPU
-FSUB fpu0,fpureg \1\xD8\11\xE0 8086,FPU
-FSUB void \2\xDE\xE9 8086,FPU,ND
-FSUBP fpureg \1\xDE\10\xE8 8086,FPU
-FSUBP fpureg,fpu0 \1\xDE\10\xE8 8086,FPU
-FSUBP void \2\xDE\xE9 8086,FPU,ND
-FSUBR mem32 \1\xD8\205 8086,FPU
-FSUBR mem64 \1\xDC\205 8086,FPU
-FSUBR fpureg|to \1\xDC\10\xE0 8086,FPU
-FSUBR fpureg,fpu0 \1\xDC\10\xE0 8086,FPU
-FSUBR fpureg \1\xD8\10\xE8 8086,FPU
-FSUBR fpu0,fpureg \1\xD8\11\xE8 8086,FPU
-FSUBR void \2\xDE\xE1 8086,FPU,ND
-FSUBRP fpureg \1\xDE\10\xE0 8086,FPU
-FSUBRP fpureg,fpu0 \1\xDE\10\xE0 8086,FPU
-FSUBRP void \2\xDE\xE1 8086,FPU,ND
-FTST void \2\xD9\xE4 8086,FPU
-FUCOM fpureg \1\xDD\10\xE0 386,FPU
-FUCOM fpu0,fpureg \1\xDD\11\xE0 386,FPU
-FUCOM void \2\xDD\xE1 386,FPU,ND
-FUCOMI fpureg \1\xDB\10\xE8 P6,FPU
-FUCOMI fpu0,fpureg \1\xDB\11\xE8 P6,FPU
-FUCOMI void \2\xDB\xE9 P6,FPU,ND
-FUCOMIP fpureg \1\xDF\10\xE8 P6,FPU
-FUCOMIP fpu0,fpureg \1\xDF\11\xE8 P6,FPU
-FUCOMIP void \2\xDF\xE9 P6,FPU,ND
-FUCOMP fpureg \1\xDD\10\xE8 386,FPU
-FUCOMP fpu0,fpureg \1\xDD\11\xE8 386,FPU
-FUCOMP void \2\xDD\xE9 386,FPU,ND
-FUCOMPP void \2\xDA\xE9 386,FPU
-FXAM void \2\xD9\xE5 8086,FPU
-FXCH fpureg \1\xD9\10\xC8 8086,FPU
-FXCH fpureg,fpu0 \1\xD9\10\xC8 8086,FPU
-FXCH fpu0,fpureg \1\xD9\11\xC8 8086,FPU
-FXCH void \2\xD9\xC9 8086,FPU,ND
-FXTRACT void \2\xD9\xF4 8086,FPU
-FYL2X void \2\xD9\xF1 8086,FPU
-FYL2XP1 void \2\xD9\xF9 8086,FPU
-HLT void \1\xF4 8086,PRIV
-IBTS mem,reg16 \320\2\x0F\xA7\101 386,SW,UNDOC,ND
-IBTS reg16,reg16 \320\2\x0F\xA7\101 386,UNDOC,ND
-IBTS mem,reg32 \321\2\x0F\xA7\101 386,SD,UNDOC,ND
-IBTS reg32,reg32 \321\2\x0F\xA7\101 386,UNDOC,ND
-ICEBP void \1\xF1 386,ND
-IDIV rm8 \1\xF6\207 8086
-IDIV rm16 \320\1\xF7\207 8086
-IDIV rm32 \321\1\xF7\207 386
-IDIV rm64 \324\1\xF7\207 X64
-IMUL rm8 \1\xF6\205 8086
-IMUL rm16 \320\1\xF7\205 8086
-IMUL rm32 \321\1\xF7\205 386
-IMUL rm64 \324\1\xF7\205 X64
-IMUL reg16,mem \320\2\x0F\xAF\110 386,SM
-IMUL reg16,reg16 \320\2\x0F\xAF\110 386
-IMUL reg32,mem \321\2\x0F\xAF\110 386,SM
-IMUL reg32,reg32 \321\2\x0F\xAF\110 386
-IMUL reg64,mem \324\2\x0F\xAF\110 X64,SM
-IMUL reg64,reg64 \324\2\x0F\xAF\110 X64
-IMUL reg16,mem,imm8 \320\1\x6B\110\16 186,SM
-IMUL reg16,mem,sbyte16 \320\1\x6B\110\16 186,SM,ND
-IMUL reg16,mem,imm16 \320\1\x69\110\32 186,SM
-IMUL reg16,mem,imm \320\146\x69\110\142 186,SM,ND
-IMUL reg16,reg16,imm8 \320\1\x6B\110\16 186
-IMUL reg16,reg16,sbyte16 \320\1\x6B\110\16 186,SM,ND
-IMUL reg16,reg16,imm16 \320\1\x69\110\32 186
-IMUL reg16,reg16,imm \320\146\x69\110\142 186,SM,ND
-IMUL reg32,mem,imm8 \321\1\x6B\110\16 386,SM
-IMUL reg32,mem,sbyte32 \321\1\x6B\110\16 386,SM,ND
-IMUL reg32,mem,imm32 \321\1\x69\110\42 386,SM
-IMUL reg32,mem,imm \321\156\x69\110\152 386,SM,ND
-IMUL reg32,reg32,imm8 \321\1\x6B\110\16 386
-IMUL reg32,reg32,sbyte32 \321\1\x6B\110\16 386,SM,ND
-IMUL reg32,reg32,imm32 \321\1\x69\110\42 386
-IMUL reg32,reg32,imm \321\156\x69\110\152 386,SM,ND
-IMUL reg64,mem,imm8 \324\1\x6B\110\16 X64,SM
-IMUL reg64,mem,sbyte64 \324\1\x6B\110\16 X64,SM,ND
-IMUL reg64,mem,imm32 \324\1\x69\110\42 X64,SM
-IMUL reg64,mem,imm \324\156\x69\110\252 X64,SM,ND
-IMUL reg64,reg64,imm8 \324\1\x6B\110\16 X64
-IMUL reg64,reg64,sbyte64 \324\1\x6B\110\16 X64,SM,ND
-IMUL reg64,reg64,imm32 \324\1\x69\110\42 X64
-IMUL reg64,reg64,imm \324\156\x69\110\252 X64,SM,ND
-IMUL reg16,imm8 \320\1\x6B\100\15 186
-IMUL reg16,sbyte16 \320\1\x6B\100\15 186,SM,ND
-IMUL reg16,imm16 \320\1\x69\100\31 186
-IMUL reg16,imm \320\145\x69\100\141 186,SM,ND
-IMUL reg32,imm8 \321\1\x6B\100\15 386
-IMUL reg32,sbyte32 \321\1\x6B\100\15 386,SM,ND
-IMUL reg32,imm32 \321\1\x69\100\41 386
-IMUL reg32,imm \321\155\x69\100\151 386,SM,ND
-IMUL reg64,imm8 \324\1\x6B\100\15 X64
-IMUL reg64,sbyte64 \324\1\x6B\100\15 X64,SM,ND
-IMUL reg64,imm32 \324\1\x69\100\255 X64
-IMUL reg64,imm \324\155\x69\100\251 X64,SM,ND
-IN reg_al,imm \1\xE4\25 8086,SB
-IN reg_ax,imm \320\1\xE5\25 8086,SB
-IN reg_eax,imm \321\1\xE5\25 386,SB
-IN reg_al,reg_dx \1\xEC 8086
-IN reg_ax,reg_dx \320\1\xED 8086
-IN reg_eax,reg_dx \321\1\xED 386
-INC reg16 \320\10\x40 8086,NOLONG
-INC reg32 \321\10\x40 386,NOLONG
-INC rm8 \1\xFE\200 8086
-INC rm16 \320\1\xFF\200 8086
-INC rm32 \321\1\xFF\200 386
-INC rm64 \324\1\xFF\200 X64
+AAA void [ 37] 8086,NOLONG
+AAD void [ d5 0a] 8086,NOLONG
+AAD imm [i: d5 ib,u] 8086,SB,NOLONG
+AAM void [ d4 0a] 8086,NOLONG
+AAM imm [i: d4 ib,u] 8086,SB,NOLONG
+AAS void [ 3f] 8086,NOLONG
+ADC mem,reg8 [mr: hle 10 /r] 8086,SM,LOCK
+ADC reg8,reg8 [mr: 10 /r] 8086
+ADC mem,reg16 [mr: hle o16 11 /r] 8086,SM,LOCK
+ADC reg16,reg16 [mr: o16 11 /r] 8086
+ADC mem,reg32 [mr: hle o32 11 /r] 386,SM,LOCK
+ADC reg32,reg32 [mr: o32 11 /r] 386
+ADC mem,reg64 [mr: hle o64 11 /r] X64,SM,LOCK
+ADC reg64,reg64 [mr: o64 11 /r] X64
+ADC reg8,mem [rm: 12 /r] 8086,SM
+ADC reg8,reg8 [rm: 12 /r] 8086
+ADC reg16,mem [rm: o16 13 /r] 8086,SM
+ADC reg16,reg16 [rm: o16 13 /r] 8086
+ADC reg32,mem [rm: o32 13 /r] 386,SM
+ADC reg32,reg32 [rm: o32 13 /r] 386
+ADC reg64,mem [rm: o64 13 /r] X64,SM
+ADC reg64,reg64 [rm: o64 13 /r] X64
+ADC rm16,imm8 [mi: hle o16 83 /2 ibx] 8086,LOCK
+ADC rm32,imm8 [mi: hle o32 83 /2 ibx] 386,LOCK
+ADC rm64,imm8 [mi: hle o64 83 /2 ibx] X64,LOCK
+ADC reg_al,imm [-i: 14 ib] 8086,SM
+ADC reg_ax,sbyte16 [mi: o16 83 /2 ibx] 8086,SM
+ADC reg_ax,imm [-i: o16 15 iw] 8086,SM
+ADC reg_eax,sbyte32 [mi: o32 83 /2 ibx] 386,SM
+ADC reg_eax,imm [-i: o32 15 id] 386,SM
+ADC reg_rax,sbyte64 [mi: o64 83 /2 ibx] X64,SM
+ADC reg_rax,imm [-i: o64 15 idx] X64,SM
+ADC rm8,imm [mi: hle 80 /2 ib] 8086,SM,LOCK
+ADC rm16,imm [mi: hle o16 81+s /2 ibw] 8086,SM,LOCK
+ADC rm32,imm [mi: hle o32 81+s /2 ibd] 386,SM,LOCK
+ADC rm64,imm [mi: hle o64 81+s /2 ibd,s] X64,SM,LOCK
+ADC mem,imm8 [mi: hle 80 /2 ib] 8086,SM,LOCK
+ADC mem,imm16 [mi: hle o16 81+s /2 ibw] 8086,SM,LOCK
+ADC mem,imm32 [mi: hle o32 81+s /2 ibd] 386,SM,LOCK
+ADC rm8,imm [mi: hle 82 /2 ib] 8086,SM,LOCK,ND,NOLONG
+ADD mem,reg8 [mr: hle 00 /r] 8086,SM,LOCK
+ADD reg8,reg8 [mr: 00 /r] 8086
+ADD mem,reg16 [mr: hle o16 01 /r] 8086,SM,LOCK
+ADD reg16,reg16 [mr: o16 01 /r] 8086
+ADD mem,reg32 [mr: hle o32 01 /r] 386,SM,LOCK
+ADD reg32,reg32 [mr: o32 01 /r] 386
+ADD mem,reg64 [mr: hle o64 01 /r] X64,SM,LOCK
+ADD reg64,reg64 [mr: o64 01 /r] X64
+ADD reg8,mem [rm: 02 /r] 8086,SM
+ADD reg8,reg8 [rm: 02 /r] 8086
+ADD reg16,mem [rm: o16 03 /r] 8086,SM
+ADD reg16,reg16 [rm: o16 03 /r] 8086
+ADD reg32,mem [rm: o32 03 /r] 386,SM
+ADD reg32,reg32 [rm: o32 03 /r] 386
+ADD reg64,mem [rm: o64 03 /r] X64,SM
+ADD reg64,reg64 [rm: o64 03 /r] X64
+ADD rm16,imm8 [mi: hle o16 83 /0 ibx] 8086,LOCK
+ADD rm32,imm8 [mi: hle o32 83 /0 ibx] 386,LOCK
+ADD rm64,imm8 [mi: hle o64 83 /0 ibx] X64,LOCK
+ADD reg_al,imm [-i: 04 ib] 8086,SM
+ADD reg_ax,sbyte16 [mi: o16 83 /0 ibx] 8086,SM
+ADD reg_ax,imm [-i: o16 05 iw] 8086,SM
+ADD reg_eax,sbyte32 [mi: o32 83 /0 ibx] 386,SM
+ADD reg_eax,imm [-i: o32 05 id] 386,SM
+ADD reg_rax,sbyte64 [mi: o64 83 /0 ibx] X64,SM
+ADD reg_rax,imm [-i: o64 05 idx] X64,SM
+ADD rm8,imm [mi: hle 80 /0 ib] 8086,SM,LOCK
+ADD rm16,imm [mi: hle o16 81+s /0 ibw] 8086,SM,LOCK
+ADD rm32,imm [mi: hle o32 81+s /0 ibd] 386,SM,LOCK
+ADD rm64,imm [mi: hle o64 81+s /0 ibd,s] X64,SM,LOCK
+ADD mem,imm8 [mi: hle 80 /0 ib] 8086,SM,LOCK
+ADD mem,imm16 [mi: hle o16 81+s /0 ibw] 8086,SM,LOCK
+ADD mem,imm32 [mi: hle o32 81+s /0 ibd] 386,SM,LOCK
+ADD rm8,imm [mi: hle 82 /0 ib] 8086,SM,LOCK,ND,NOLONG
+AND mem,reg8 [mr: hle 20 /r] 8086,SM,LOCK
+AND reg8,reg8 [mr: 20 /r] 8086
+AND mem,reg16 [mr: hle o16 21 /r] 8086,SM,LOCK
+AND reg16,reg16 [mr: o16 21 /r] 8086
+AND mem,reg32 [mr: hle o32 21 /r] 386,SM,LOCK
+AND reg32,reg32 [mr: o32 21 /r] 386
+AND mem,reg64 [mr: hle o64 21 /r] X64,SM,LOCK
+AND reg64,reg64 [mr: o64 21 /r] X64
+AND reg8,mem [rm: 22 /r] 8086,SM
+AND reg8,reg8 [rm: 22 /r] 8086
+AND reg16,mem [rm: o16 23 /r] 8086,SM
+AND reg16,reg16 [rm: o16 23 /r] 8086
+AND reg32,mem [rm: o32 23 /r] 386,SM
+AND reg32,reg32 [rm: o32 23 /r] 386
+AND reg64,mem [rm: o64 23 /r] X64,SM
+AND reg64,reg64 [rm: o64 23 /r] X64
+AND rm16,imm8 [mi: hle o16 83 /4 ibx] 8086,LOCK
+AND rm32,imm8 [mi: hle o32 83 /4 ibx] 386,LOCK
+AND rm64,imm8 [mi: hle o64 83 /4 ibx] X64,LOCK
+AND reg_al,imm [-i: 24 ib] 8086,SM
+AND reg_ax,sbyte16 [mi: o16 83 /4 ibx] 8086,SM
+AND reg_ax,imm [-i: o16 25 iw] 8086,SM
+AND reg_eax,sbyte32 [mi: o32 83 /4 ibx] 386,SM
+AND reg_eax,imm [-i: o32 25 id] 386,SM
+AND reg_rax,sbyte64 [mi: o64 83 /4 ibx] X64,SM
+AND reg_rax,imm [-i: o64 25 idx] X64,SM
+AND rm8,imm [mi: hle 80 /4 ib] 8086,SM,LOCK
+AND rm16,imm [mi: hle o16 81+s /4 ibw] 8086,SM,LOCK
+AND rm32,imm [mi: hle o32 81+s /4 ibd] 386,SM,LOCK
+AND rm64,imm [mi: hle o64 81+s /4 ibd,s] X64,SM,LOCK
+AND mem,imm8 [mi: hle 80 /4 ib] 8086,SM,LOCK
+AND mem,imm16 [mi: hle o16 81+s /4 ibw] 8086,SM,LOCK
+AND mem,imm32 [mi: hle o32 81+s /4 ibd] 386,SM,LOCK
+AND rm8,imm [mi: hle 82 /4 ib] 8086,SM,LOCK,ND,NOLONG
+ARPL mem,reg16 [mr: 63 /r] 286,PROT,SM,NOLONG
+ARPL reg16,reg16 [mr: 63 /r] 286,PROT,NOLONG
+BB0_RESET void [ 0f 3a] PENT,CYRIX,ND
+BB1_RESET void [ 0f 3b] PENT,CYRIX,ND
+BOUND reg16,mem [rm: o16 62 /r] 186,NOLONG
+BOUND reg32,mem [rm: o32 62 /r] 386,NOLONG
+BSF reg16,mem [rm: o16 0f bc /r] 386,SM
+BSF reg16,reg16 [rm: o16 0f bc /r] 386
+BSF reg32,mem [rm: o32 0f bc /r] 386,SM
+BSF reg32,reg32 [rm: o32 0f bc /r] 386
+BSF reg64,mem [rm: o64 0f bc /r] X64,SM
+BSF reg64,reg64 [rm: o64 0f bc /r] X64
+BSR reg16,mem [rm: o16 0f bd /r] 386,SM
+BSR reg16,reg16 [rm: o16 0f bd /r] 386
+BSR reg32,mem [rm: o32 0f bd /r] 386,SM
+BSR reg32,reg32 [rm: o32 0f bd /r] 386
+BSR reg64,mem [rm: o64 0f bd /r] X64,SM
+BSR reg64,reg64 [rm: o64 0f bd /r] X64
+BSWAP reg32 [r: o32 0f c8+r] 486
+BSWAP reg64 [r: o64 0f c8+r] X64
+BT mem,reg16 [mr: o16 0f a3 /r] 386,SM
+BT reg16,reg16 [mr: o16 0f a3 /r] 386
+BT mem,reg32 [mr: o32 0f a3 /r] 386,SM
+BT reg32,reg32 [mr: o32 0f a3 /r] 386
+BT mem,reg64 [mr: o64 0f a3 /r] X64,SM
+BT reg64,reg64 [mr: o64 0f a3 /r] X64
+BT rm16,imm [mi: o16 0f ba /4 ib,u] 386,SB
+BT rm32,imm [mi: o32 0f ba /4 ib,u] 386,SB
+BT rm64,imm [mi: o64 0f ba /4 ib,u] X64,SB
+BTC mem,reg16 [mr: hle o16 0f bb /r] 386,SM,LOCK
+BTC reg16,reg16 [mr: o16 0f bb /r] 386
+BTC mem,reg32 [mr: hle o32 0f bb /r] 386,SM,LOCK
+BTC reg32,reg32 [mr: o32 0f bb /r] 386
+BTC mem,reg64 [mr: hle o64 0f bb /r] X64,SM,LOCK
+BTC reg64,reg64 [mr: o64 0f bb /r] X64
+BTC rm16,imm [mi: hle o16 0f ba /7 ib,u] 386,SB,LOCK
+BTC rm32,imm [mi: hle o32 0f ba /7 ib,u] 386,SB,LOCK
+BTC rm64,imm [mi: hle o64 0f ba /7 ib,u] X64,SB,LOCK
+BTR mem,reg16 [mr: hle o16 0f b3 /r] 386,SM,LOCK
+BTR reg16,reg16 [mr: o16 0f b3 /r] 386
+BTR mem,reg32 [mr: hle o32 0f b3 /r] 386,SM,LOCK
+BTR reg32,reg32 [mr: o32 0f b3 /r] 386
+BTR mem,reg64 [mr: hle o64 0f b3 /r] X64,SM,LOCK
+BTR reg64,reg64 [mr: o64 0f b3 /r] X64
+BTR rm16,imm [mi: hle o16 0f ba /6 ib,u] 386,SB,LOCK
+BTR rm32,imm [mi: hle o32 0f ba /6 ib,u] 386,SB,LOCK
+BTR rm64,imm [mi: hle o64 0f ba /6 ib,u] X64,SB,LOCK
+BTS mem,reg16 [mr: hle o16 0f ab /r] 386,SM,LOCK
+BTS reg16,reg16 [mr: o16 0f ab /r] 386
+BTS mem,reg32 [mr: hle o32 0f ab /r] 386,SM,LOCK
+BTS reg32,reg32 [mr: o32 0f ab /r] 386
+BTS mem,reg64 [mr: hle o64 0f ab /r] X64,SM,LOCK
+BTS reg64,reg64 [mr: o64 0f ab /r] X64
+BTS rm16,imm [mi: hle o16 0f ba /5 ib,u] 386,SB,LOCK
+BTS rm32,imm [mi: hle o32 0f ba /5 ib,u] 386,SB,LOCK
+BTS rm64,imm [mi: hle o64 0f ba /5 ib,u] X64,SB,LOCK
+CALL imm [i: odf e8 rel] 8086
+CALL imm|near [i: odf e8 rel] 8086
+CALL imm|far [i: odf 9a iwd seg] 8086,ND,NOLONG
+CALL imm16 [i: o16 e8 rel] 8086
+CALL imm16|near [i: o16 e8 rel] 8086
+CALL imm16|far [i: o16 9a iwd seg] 8086,ND,NOLONG
+CALL imm32 [i: o32 e8 rel] 386
+CALL imm32|near [i: o32 e8 rel] 386
+CALL imm32|far [i: o32 9a iwd seg] 386,ND,NOLONG
+CALL imm:imm [ji: odf 9a iwd iw] 8086,NOLONG
+CALL imm16:imm [ji: o16 9a iw iw] 8086,NOLONG
+CALL imm:imm16 [ji: o16 9a iw iw] 8086,NOLONG
+CALL imm32:imm [ji: o32 9a id iw] 386,NOLONG
+CALL imm:imm32 [ji: o32 9a id iw] 386,NOLONG
+CALL mem|far [m: odf ff /3] 8086,NOLONG
+CALL mem|far [m: o64 ff /3] X64
+CALL mem16|far [m: o16 ff /3] 8086
+CALL mem32|far [m: o32 ff /3] 386
+CALL mem64|far [m: o64 ff /3] X64
+CALL mem|near [m: odf ff /2] 8086,ND
+CALL mem16|near [m: o16 ff /2] 8086,ND
+CALL mem32|near [m: o32 ff /2] 386,NOLONG,ND
+CALL mem64|near [m: o64nw ff /2] X64,ND
+CALL reg16 [m: o16 ff /2] 8086
+CALL reg32 [m: o32 ff /2] 386,NOLONG
+CALL reg64 [m: o64nw ff /2] X64
+CALL mem [m: odf ff /2] 8086
+CALL mem16 [m: o16 ff /2] 8086
+CALL mem32 [m: o32 ff /2] 386,NOLONG
+CALL mem [m: o64nw ff /2] X64
+CALL mem64 [m: o64nw ff /2] X64
+CBW void [ o16 98] 8086
+CDQ void [ o32 99] 386
+CDQE void [ o64 98] X64
+CLC void [ f8] 8086
+CLD void [ fc] 8086
+CLGI void [ 0f 01 dd] X64,AMD
+CLI void [ fa] 8086
+CLTS void [ 0f 06] 286,PRIV
+CMC void [ f5] 8086
+CMP mem,reg8 [mr: 38 /r] 8086,SM
+CMP reg8,reg8 [mr: 38 /r] 8086
+CMP mem,reg16 [mr: o16 39 /r] 8086,SM
+CMP reg16,reg16 [mr: o16 39 /r] 8086
+CMP mem,reg32 [mr: o32 39 /r] 386,SM
+CMP reg32,reg32 [mr: o32 39 /r] 386
+CMP mem,reg64 [mr: o64 39 /r] X64,SM
+CMP reg64,reg64 [mr: o64 39 /r] X64
+CMP reg8,mem [rm: 3a /r] 8086,SM
+CMP reg8,reg8 [rm: 3a /r] 8086
+CMP reg16,mem [rm: o16 3b /r] 8086,SM
+CMP reg16,reg16 [rm: o16 3b /r] 8086
+CMP reg32,mem [rm: o32 3b /r] 386,SM
+CMP reg32,reg32 [rm: o32 3b /r] 386
+CMP reg64,mem [rm: o64 3b /r] X64,SM
+CMP reg64,reg64 [rm: o64 3b /r] X64
+CMP rm16,imm8 [mi: o16 83 /7 ibx] 8086
+CMP rm32,imm8 [mi: o32 83 /7 ibx] 386
+CMP rm64,imm8 [mi: o64 83 /7 ibx] X64
+CMP reg_al,imm [-i: 3c ib] 8086,SM
+CMP reg_ax,sbyte16 [mi: o16 83 /7 ibx] 8086,SM
+CMP reg_ax,imm [-i: o16 3d iw] 8086,SM
+CMP reg_eax,sbyte32 [mi: o32 83 /7 ibx] 386,SM
+CMP reg_eax,imm [-i: o32 3d id] 386,SM
+CMP reg_rax,sbyte64 [mi: o64 83 /7 ibx] X64,SM
+CMP reg_rax,imm [-i: o64 3d idx] X64,SM
+CMP rm8,imm [mi: 80 /7 ib] 8086,SM
+CMP rm16,imm [mi: o16 81+s /7 ibw] 8086,SM
+CMP rm32,imm [mi: o32 81+s /7 ibd] 386,SM
+CMP rm64,imm [mi: o64 81+s /7 ibd,s] X64,SM
+CMP mem,imm8 [mi: 80 /7 ib] 8086,SM
+CMP mem,imm16 [mi: o16 81+s /7 ibw] 8086,SM
+CMP mem,imm32 [mi: o32 81+s /7 ibd] 386,SM
+CMP rm8,imm [mi: 82 /7 ib] 8086,SM,ND,NOLONG
+CMPSB void [ repe a6] 8086
+CMPSD void [ repe o32 a7] 386
+CMPSQ void [ repe o64 a7] X64
+CMPSW void [ repe o16 a7] 8086
+CMPXCHG mem,reg8 [mr: hle 0f b0 /r] PENT,SM,LOCK
+CMPXCHG reg8,reg8 [mr: 0f b0 /r] PENT
+CMPXCHG mem,reg16 [mr: hle o16 0f b1 /r] PENT,SM,LOCK
+CMPXCHG reg16,reg16 [mr: o16 0f b1 /r] PENT
+CMPXCHG mem,reg32 [mr: hle o32 0f b1 /r] PENT,SM,LOCK
+CMPXCHG reg32,reg32 [mr: o32 0f b1 /r] PENT
+CMPXCHG mem,reg64 [mr: hle o64 0f b1 /r] X64,SM,LOCK
+CMPXCHG reg64,reg64 [mr: o64 0f b1 /r] X64
+CMPXCHG486 mem,reg8 [mr: 0f a6 /r] 486,SM,UNDOC,ND,LOCK
+CMPXCHG486 reg8,reg8 [mr: 0f a6 /r] 486,UNDOC,ND
+CMPXCHG486 mem,reg16 [mr: o16 0f a7 /r] 486,SM,UNDOC,ND,LOCK
+CMPXCHG486 reg16,reg16 [mr: o16 0f a7 /r] 486,UNDOC,ND
+CMPXCHG486 mem,reg32 [mr: o32 0f a7 /r] 486,SM,UNDOC,ND,LOCK
+CMPXCHG486 reg32,reg32 [mr: o32 0f a7 /r] 486,UNDOC,ND
+CMPXCHG8B mem [m: hle 0f c7 /1] PENT,LOCK
+CMPXCHG16B mem [m: o64 0f c7 /1] X64,LOCK
+CPUID void [ 0f a2] PENT
+CPU_READ void [ 0f 3d] PENT,CYRIX
+CPU_WRITE void [ 0f 3c] PENT,CYRIX
+CQO void [ o64 99] X64
+CWD void [ o16 99] 8086
+CWDE void [ o32 98] 386
+DAA void [ 27] 8086,NOLONG
+DAS void [ 2f] 8086,NOLONG
+DEC reg16 [r: o16 48+r] 8086,NOLONG
+DEC reg32 [r: o32 48+r] 386,NOLONG
+DEC rm8 [m: hle fe /1] 8086,LOCK
+DEC rm16 [m: hle o16 ff /1] 8086,LOCK
+DEC rm32 [m: hle o32 ff /1] 386,LOCK
+DEC rm64 [m: hle o64 ff /1] X64,LOCK
+DIV rm8 [m: f6 /6] 8086
+DIV rm16 [m: o16 f7 /6] 8086
+DIV rm32 [m: o32 f7 /6] 386
+DIV rm64 [m: o64 f7 /6] X64
+DMINT void [ 0f 39] P6,CYRIX
+EMMS void [ 0f 77] PENT,MMX
+ENTER imm,imm [ij: c8 iw ib,u] 186
+EQU imm ignore 8086
+EQU imm:imm ignore 8086
+F2XM1 void [ d9 f0] 8086,FPU
+FABS void [ d9 e1] 8086,FPU
+FADD mem32 [m: d8 /0] 8086,FPU
+FADD mem64 [m: dc /0] 8086,FPU
+FADD fpureg|to [r: dc c0+r] 8086,FPU
+FADD fpureg [r: d8 c0+r] 8086,FPU
+FADD fpureg,fpu0 [r-: dc c0+r] 8086,FPU
+FADD fpu0,fpureg [-r: d8 c0+r] 8086,FPU
+FADD void [ de c1] 8086,FPU,ND
+FADDP fpureg [r: de c0+r] 8086,FPU
+FADDP fpureg,fpu0 [r-: de c0+r] 8086,FPU
+FADDP void [ de c1] 8086,FPU,ND
+FBLD mem80 [m: df /4] 8086,FPU
+FBLD mem [m: df /4] 8086,FPU
+FBSTP mem80 [m: df /6] 8086,FPU
+FBSTP mem [m: df /6] 8086,FPU
+FCHS void [ d9 e0] 8086,FPU
+FCLEX void [ wait db e2] 8086,FPU
+FCMOVB fpureg [r: da c0+r] P6,FPU
+FCMOVB fpu0,fpureg [-r: da c0+r] P6,FPU
+FCMOVB void [ da c1] P6,FPU,ND
+FCMOVBE fpureg [r: da d0+r] P6,FPU
+FCMOVBE fpu0,fpureg [-r: da d0+r] P6,FPU
+FCMOVBE void [ da d1] P6,FPU,ND
+FCMOVE fpureg [r: da c8+r] P6,FPU
+FCMOVE fpu0,fpureg [-r: da c8+r] P6,FPU
+FCMOVE void [ da c9] P6,FPU,ND
+FCMOVNB fpureg [r: db c0+r] P6,FPU
+FCMOVNB fpu0,fpureg [-r: db c0+r] P6,FPU
+FCMOVNB void [ db c1] P6,FPU,ND
+FCMOVNBE fpureg [r: db d0+r] P6,FPU
+FCMOVNBE fpu0,fpureg [-r: db d0+r] P6,FPU
+FCMOVNBE void [ db d1] P6,FPU,ND
+FCMOVNE fpureg [r: db c8+r] P6,FPU
+FCMOVNE fpu0,fpureg [-r: db c8+r] P6,FPU
+FCMOVNE void [ db c9] P6,FPU,ND
+FCMOVNU fpureg [r: db d8+r] P6,FPU
+FCMOVNU fpu0,fpureg [-r: db d8+r] P6,FPU
+FCMOVNU void [ db d9] P6,FPU,ND
+FCMOVU fpureg [r: da d8+r] P6,FPU
+FCMOVU fpu0,fpureg [-r: da d8+r] P6,FPU
+FCMOVU void [ da d9] P6,FPU,ND
+FCOM mem32 [m: d8 /2] 8086,FPU
+FCOM mem64 [m: dc /2] 8086,FPU
+FCOM fpureg [r: d8 d0+r] 8086,FPU
+FCOM fpu0,fpureg [-r: d8 d0+r] 8086,FPU
+FCOM void [ d8 d1] 8086,FPU,ND
+FCOMI fpureg [r: db f0+r] P6,FPU
+FCOMI fpu0,fpureg [-r: db f0+r] P6,FPU
+FCOMI void [ db f1] P6,FPU,ND
+FCOMIP fpureg [r: df f0+r] P6,FPU
+FCOMIP fpu0,fpureg [-r: df f0+r] P6,FPU
+FCOMIP void [ df f1] P6,FPU,ND
+FCOMP mem32 [m: d8 /3] 8086,FPU
+FCOMP mem64 [m: dc /3] 8086,FPU
+FCOMP fpureg [r: d8 d8+r] 8086,FPU
+FCOMP fpu0,fpureg [-r: d8 d8+r] 8086,FPU
+FCOMP void [ d8 d9] 8086,FPU,ND
+FCOMPP void [ de d9] 8086,FPU
+FCOS void [ d9 ff] 386,FPU
+FDECSTP void [ d9 f6] 8086,FPU
+FDISI void [ wait db e1] 8086,FPU
+FDIV mem32 [m: d8 /6] 8086,FPU
+FDIV mem64 [m: dc /6] 8086,FPU
+FDIV fpureg|to [r: dc f8+r] 8086,FPU
+FDIV fpureg [r: d8 f0+r] 8086,FPU
+FDIV fpureg,fpu0 [r-: dc f8+r] 8086,FPU
+FDIV fpu0,fpureg [-r: d8 f0+r] 8086,FPU
+FDIV void [ de f9] 8086,FPU,ND
+FDIVP fpureg [r: de f8+r] 8086,FPU
+FDIVP fpureg,fpu0 [r-: de f8+r] 8086,FPU
+FDIVP void [ de f9] 8086,FPU,ND
+FDIVR mem32 [m: d8 /7] 8086,FPU
+FDIVR mem64 [m: dc /7] 8086,FPU
+FDIVR fpureg|to [r: dc f0+r] 8086,FPU
+FDIVR fpureg,fpu0 [r-: dc f0+r] 8086,FPU
+FDIVR fpureg [r: d8 f8+r] 8086,FPU
+FDIVR fpu0,fpureg [-r: d8 f8+r] 8086,FPU
+FDIVR void [ de f1] 8086,FPU,ND
+FDIVRP fpureg [r: de f0+r] 8086,FPU
+FDIVRP fpureg,fpu0 [r-: de f0+r] 8086,FPU
+FDIVRP void [ de f1] 8086,FPU,ND
+FEMMS void [ 0f 0e] PENT,3DNOW
+FENI void [ wait db e0] 8086,FPU
+FFREE fpureg [r: dd c0+r] 8086,FPU
+FFREE void [ dd c1] 8086,FPU
+FFREEP fpureg [r: df c0+r] 286,FPU,UNDOC
+FFREEP void [ df c1] 286,FPU,UNDOC
+FIADD mem32 [m: da /0] 8086,FPU
+FIADD mem16 [m: de /0] 8086,FPU
+FICOM mem32 [m: da /2] 8086,FPU
+FICOM mem16 [m: de /2] 8086,FPU
+FICOMP mem32 [m: da /3] 8086,FPU
+FICOMP mem16 [m: de /3] 8086,FPU
+FIDIV mem32 [m: da /6] 8086,FPU
+FIDIV mem16 [m: de /6] 8086,FPU
+FIDIVR mem32 [m: da /7] 8086,FPU
+FIDIVR mem16 [m: de /7] 8086,FPU
+FILD mem32 [m: db /0] 8086,FPU
+FILD mem16 [m: df /0] 8086,FPU
+FILD mem64 [m: df /5] 8086,FPU
+FIMUL mem32 [m: da /1] 8086,FPU
+FIMUL mem16 [m: de /1] 8086,FPU
+FINCSTP void [ d9 f7] 8086,FPU
+FINIT void [ wait db e3] 8086,FPU
+FIST mem32 [m: db /2] 8086,FPU
+FIST mem16 [m: df /2] 8086,FPU
+FISTP mem32 [m: db /3] 8086,FPU
+FISTP mem16 [m: df /3] 8086,FPU
+FISTP mem64 [m: df /7] 8086,FPU
+FISTTP mem16 [m: df /1] PRESCOTT,FPU
+FISTTP mem32 [m: db /1] PRESCOTT,FPU
+FISTTP mem64 [m: dd /1] PRESCOTT,FPU
+FISUB mem32 [m: da /4] 8086,FPU
+FISUB mem16 [m: de /4] 8086,FPU
+FISUBR mem32 [m: da /5] 8086,FPU
+FISUBR mem16 [m: de /5] 8086,FPU
+FLD mem32 [m: d9 /0] 8086,FPU
+FLD mem64 [m: dd /0] 8086,FPU
+FLD mem80 [m: db /5] 8086,FPU
+FLD fpureg [r: d9 c0+r] 8086,FPU
+FLD void [ d9 c1] 8086,FPU,ND
+FLD1 void [ d9 e8] 8086,FPU
+FLDCW mem [m: d9 /5] 8086,FPU,SW
+FLDENV mem [m: d9 /4] 8086,FPU
+FLDL2E void [ d9 ea] 8086,FPU
+FLDL2T void [ d9 e9] 8086,FPU
+FLDLG2 void [ d9 ec] 8086,FPU
+FLDLN2 void [ d9 ed] 8086,FPU
+FLDPI void [ d9 eb] 8086,FPU
+FLDZ void [ d9 ee] 8086,FPU
+FMUL mem32 [m: d8 /1] 8086,FPU
+FMUL mem64 [m: dc /1] 8086,FPU
+FMUL fpureg|to [r: dc c8+r] 8086,FPU
+FMUL fpureg,fpu0 [r-: dc c8+r] 8086,FPU
+FMUL fpureg [r: d8 c8+r] 8086,FPU
+FMUL fpu0,fpureg [-r: d8 c8+r] 8086,FPU
+FMUL void [ de c9] 8086,FPU,ND
+FMULP fpureg [r: de c8+r] 8086,FPU
+FMULP fpureg,fpu0 [r-: de c8+r] 8086,FPU
+FMULP void [ de c9] 8086,FPU,ND
+FNCLEX void [ db e2] 8086,FPU
+FNDISI void [ db e1] 8086,FPU
+FNENI void [ db e0] 8086,FPU
+FNINIT void [ db e3] 8086,FPU
+FNOP void [ d9 d0] 8086,FPU
+FNSAVE mem [m: dd /6] 8086,FPU
+FNSTCW mem [m: d9 /7] 8086,FPU,SW
+FNSTENV mem [m: d9 /6] 8086,FPU
+FNSTSW mem [m: dd /7] 8086,FPU,SW
+FNSTSW reg_ax [-: df e0] 286,FPU
+FPATAN void [ d9 f3] 8086,FPU
+FPREM void [ d9 f8] 8086,FPU
+FPREM1 void [ d9 f5] 386,FPU
+FPTAN void [ d9 f2] 8086,FPU
+FRNDINT void [ d9 fc] 8086,FPU
+FRSTOR mem [m: dd /4] 8086,FPU
+FSAVE mem [m: wait dd /6] 8086,FPU
+FSCALE void [ d9 fd] 8086,FPU
+FSETPM void [ db e4] 286,FPU
+FSIN void [ d9 fe] 386,FPU
+FSINCOS void [ d9 fb] 386,FPU
+FSQRT void [ d9 fa] 8086,FPU
+FST mem32 [m: d9 /2] 8086,FPU
+FST mem64 [m: dd /2] 8086,FPU
+FST fpureg [r: dd d0+r] 8086,FPU
+FST void [ dd d1] 8086,FPU,ND
+FSTCW mem [m: wait d9 /7] 8086,FPU,SW
+FSTENV mem [m: wait d9 /6] 8086,FPU
+FSTP mem32 [m: d9 /3] 8086,FPU
+FSTP mem64 [m: dd /3] 8086,FPU
+FSTP mem80 [m: db /7] 8086,FPU
+FSTP fpureg [r: dd d8+r] 8086,FPU
+FSTP void [ dd d9] 8086,FPU,ND
+FSTSW mem [m: wait dd /7] 8086,FPU,SW
+FSTSW reg_ax [-: wait df e0] 286,FPU
+FSUB mem32 [m: d8 /4] 8086,FPU
+FSUB mem64 [m: dc /4] 8086,FPU
+FSUB fpureg|to [r: dc e8+r] 8086,FPU
+FSUB fpureg,fpu0 [r-: dc e8+r] 8086,FPU
+FSUB fpureg [r: d8 e0+r] 8086,FPU
+FSUB fpu0,fpureg [-r: d8 e0+r] 8086,FPU
+FSUB void [ de e9] 8086,FPU,ND
+FSUBP fpureg [r: de e8+r] 8086,FPU
+FSUBP fpureg,fpu0 [r-: de e8+r] 8086,FPU
+FSUBP void [ de e9] 8086,FPU,ND
+FSUBR mem32 [m: d8 /5] 8086,FPU
+FSUBR mem64 [m: dc /5] 8086,FPU
+FSUBR fpureg|to [r: dc e0+r] 8086,FPU
+FSUBR fpureg,fpu0 [r-: dc e0+r] 8086,FPU
+FSUBR fpureg [r: d8 e8+r] 8086,FPU
+FSUBR fpu0,fpureg [-r: d8 e8+r] 8086,FPU
+FSUBR void [ de e1] 8086,FPU,ND
+FSUBRP fpureg [r: de e0+r] 8086,FPU
+FSUBRP fpureg,fpu0 [r-: de e0+r] 8086,FPU
+FSUBRP void [ de e1] 8086,FPU,ND
+FTST void [ d9 e4] 8086,FPU
+FUCOM fpureg [r: dd e0+r] 386,FPU
+FUCOM fpu0,fpureg [-r: dd e0+r] 386,FPU
+FUCOM void [ dd e1] 386,FPU,ND
+FUCOMI fpureg [r: db e8+r] P6,FPU
+FUCOMI fpu0,fpureg [-r: db e8+r] P6,FPU
+FUCOMI void [ db e9] P6,FPU,ND
+FUCOMIP fpureg [r: df e8+r] P6,FPU
+FUCOMIP fpu0,fpureg [-r: df e8+r] P6,FPU
+FUCOMIP void [ df e9] P6,FPU,ND
+FUCOMP fpureg [r: dd e8+r] 386,FPU
+FUCOMP fpu0,fpureg [-r: dd e8+r] 386,FPU
+FUCOMP void [ dd e9] 386,FPU,ND
+FUCOMPP void [ da e9] 386,FPU
+FXAM void [ d9 e5] 8086,FPU
+FXCH fpureg [r: d9 c8+r] 8086,FPU
+FXCH fpureg,fpu0 [r-: d9 c8+r] 8086,FPU
+FXCH fpu0,fpureg [-r: d9 c8+r] 8086,FPU
+FXCH void [ d9 c9] 8086,FPU,ND
+FXTRACT void [ d9 f4] 8086,FPU
+FYL2X void [ d9 f1] 8086,FPU
+FYL2XP1 void [ d9 f9] 8086,FPU
+HLT void [ f4] 8086,PRIV
+IBTS mem,reg16 [mr: o16 0f a7 /r] 386,SW,UNDOC,ND
+IBTS reg16,reg16 [mr: o16 0f a7 /r] 386,UNDOC,ND
+IBTS mem,reg32 [mr: o32 0f a7 /r] 386,SD,UNDOC,ND
+IBTS reg32,reg32 [mr: o32 0f a7 /r] 386,UNDOC,ND
+ICEBP void [ f1] 386,ND
+IDIV rm8 [m: f6 /7] 8086
+IDIV rm16 [m: o16 f7 /7] 8086
+IDIV rm32 [m: o32 f7 /7] 386
+IDIV rm64 [m: o64 f7 /7] X64
+IMUL rm8 [m: f6 /5] 8086
+IMUL rm16 [m: o16 f7 /5] 8086
+IMUL rm32 [m: o32 f7 /5] 386
+IMUL rm64 [m: o64 f7 /5] X64
+IMUL reg16,mem [rm: o16 0f af /r] 386,SM
+IMUL reg16,reg16 [rm: o16 0f af /r] 386
+IMUL reg32,mem [rm: o32 0f af /r] 386,SM
+IMUL reg32,reg32 [rm: o32 0f af /r] 386
+IMUL reg64,mem [rm: o64 0f af /r] X64,SM
+IMUL reg64,reg64 [rm: o64 0f af /r] X64
+IMUL reg16,mem,imm8 [rmi: o16 6b /r ib,s] 186,SM
+IMUL reg16,mem,sbyte16 [rmi: o16 6b /r ib,s] 186,SM,ND
+IMUL reg16,mem,imm16 [rmi: o16 69 /r iw] 186,SM
+IMUL reg16,mem,imm [rmi: o16 69+s /r ibw] 186,SM,ND
+IMUL reg16,reg16,imm8 [rmi: o16 6b /r ib,s] 186
+IMUL reg16,reg16,sbyte16 [rmi: o16 6b /r ib,s] 186,SM,ND
+IMUL reg16,reg16,imm16 [rmi: o16 69 /r iw] 186
+IMUL reg16,reg16,imm [rmi: o16 69+s /r ibw] 186,SM,ND
+IMUL reg32,mem,imm8 [rmi: o32 6b /r ib,s] 386,SM
+IMUL reg32,mem,sbyte32 [rmi: o32 6b /r ib,s] 386,SM,ND
+IMUL reg32,mem,imm32 [rmi: o32 69 /r id] 386,SM
+IMUL reg32,mem,imm [rmi: o32 69+s /r ibd] 386,SM,ND
+IMUL reg32,reg32,imm8 [rmi: o32 6b /r ib,s] 386
+IMUL reg32,reg32,sbyte32 [rmi: o32 6b /r ib,s] 386,SM,ND
+IMUL reg32,reg32,imm32 [rmi: o32 69 /r id] 386
+IMUL reg32,reg32,imm [rmi: o32 69+s /r ibd] 386,SM,ND
+IMUL reg64,mem,imm8 [rmi: o64 6b /r ib,s] X64,SM
+IMUL reg64,mem,sbyte64 [rmi: o64 6b /r ib,s] X64,SM,ND
+IMUL reg64,mem,imm32 [rmi: o64 69 /r id] X64,SM
+IMUL reg64,mem,imm [rmi: o64 69+s /r ibd,s] X64,SM,ND
+IMUL reg64,reg64,imm8 [rmi: o64 6b /r ib,s] X64
+IMUL reg64,reg64,sbyte64 [rmi: o64 6b /r ib,s] X64,SM,ND
+IMUL reg64,reg64,imm32 [rmi: o64 69 /r id] X64
+IMUL reg64,reg64,imm [rmi: o64 69+s /r ibd,s] X64,SM,ND
+IMUL reg16,imm8 [r+mi: o16 6b /r ib,s] 186
+IMUL reg16,sbyte16 [r+mi: o16 6b /r ib,s] 186,SM,ND
+IMUL reg16,imm16 [r+mi: o16 69 /r iw] 186
+IMUL reg16,imm [r+mi: o16 69+s /r ibw] 186,SM,ND
+IMUL reg32,imm8 [r+mi: o32 6b /r ib,s] 386
+IMUL reg32,sbyte32 [r+mi: o32 6b /r ib,s] 386,SM,ND
+IMUL reg32,imm32 [r+mi: o32 69 /r id] 386
+IMUL reg32,imm [r+mi: o32 69+s /r ibd] 386,SM,ND
+IMUL reg64,imm8 [r+mi: o64 6b /r ib,s] X64
+IMUL reg64,sbyte64 [r+mi: o64 6b /r ib,s] X64,SM,ND
+IMUL reg64,imm32 [r+mi: o64 69 /r idx] X64
+IMUL reg64,imm [r+mi: o64 69+s /r ibd,s] X64,SM,ND
+IN reg_al,imm [-i: e4 ib,u] 8086,SB
+IN reg_ax,imm [-i: o16 e5 ib,u] 8086,SB
+IN reg_eax,imm [-i: o32 e5 ib,u] 386,SB
+IN reg_al,reg_dx [--: ec] 8086
+IN reg_ax,reg_dx [--: o16 ed] 8086
+IN reg_eax,reg_dx [--: o32 ed] 386
+INC reg16 [r: o16 40+r] 8086,NOLONG
+INC reg32 [r: o32 40+r] 386,NOLONG
+INC rm8 [m: hle fe /0] 8086,LOCK
+INC rm16 [m: hle o16 ff /0] 8086,LOCK
+INC rm32 [m: hle o32 ff /0] 386,LOCK
+INC rm64 [m: hle o64 ff /0] X64,LOCK
INCBIN ignore ignore ignore
-INSB void \1\x6C 186
-INSD void \321\1\x6D 386
-INSW void \320\1\x6D 186
-INT imm \1\xCD\24 8086,SB
-INT01 void \1\xF1 386,ND
-INT1 void \1\xF1 386
-INT03 void \1\xCC 8086,ND
-INT3 void \1\xCC 8086
-INTO void \1\xCE 8086,NOLONG
-INVD void \2\x0F\x08 486,PRIV
-INVLPG mem \2\x0F\x01\207 486,PRIV
-INVLPGA reg_ax,reg_ecx \310\3\x0F\x01\xDF X86_64,AMD,NOLONG
-INVLPGA reg_eax,reg_ecx \311\3\x0F\x01\xDF X86_64,AMD
-INVLPGA reg_rax,reg_ecx \323\313\3\x0F\x01\xDF X64,AMD
-INVLPGA void \3\x0F\x01\xDF X86_64,AMD
-IRET void \322\1\xCF 8086
-IRETD void \321\1\xCF 386
-IRETQ void \324\1\xCF X64
-IRETW void \320\1\xCF 8086
-JCXZ imm \310\1\xE3\50 8086,NOLONG
-JECXZ imm \311\1\xE3\50 386
-JRCXZ imm \313\1\xE3\50 X64
-JMP imm|short \1\xEB\50 8086
-JMP imm \371\1\xEB\50 8086,ND
-JMP imm \322\1\xE9\64 8086
-JMP imm|near \322\1\xE9\64 8086,ND
-JMP imm|far \322\1\xEA\34\74 8086,ND,NOLONG
-JMP imm16 \320\1\xE9\64 8086
-JMP imm16|near \320\1\xE9\64 8086,ND
-JMP imm16|far \320\1\xEA\34\74 8086,ND,NOLONG
-JMP imm32 \321\1\xE9\64 386
-JMP imm32|near \321\1\xE9\64 386,ND
-JMP imm32|far \321\1\xEA\34\74 386,ND,NOLONG
-JMP imm:imm \322\1\xEA\35\30 8086,NOLONG
-JMP imm16:imm \320\1\xEA\31\30 8086,NOLONG
-JMP imm:imm16 \320\1\xEA\31\30 8086,NOLONG
-JMP imm32:imm \321\1\xEA\41\30 386,NOLONG
-JMP imm:imm32 \321\1\xEA\41\30 386,NOLONG
-JMP mem|far \322\1\xFF\205 8086,NOLONG
-JMP mem|far \324\1\xFF\205 X64
-JMP mem16|far \320\1\xFF\205 8086
-JMP mem32|far \321\1\xFF\205 386
-JMP mem64|far \324\1\xFF\205 X64
-JMP mem|near \322\1\xFF\204 8086
-JMP mem16|near \320\1\xFF\204 8086
-JMP mem32|near \321\1\xFF\204 386,NOLONG
-JMP mem64|near \323\1\xFF\204 X64
-JMP reg16 \320\1\xFF\204 8086
-JMP reg32 \321\1\xFF\204 386,NOLONG
-JMP reg64 \323\1\xFF\204 X64
-JMP mem \322\1\xFF\204 8086
-JMP mem16 \320\1\xFF\204 8086
-JMP mem32 \321\1\xFF\204 386,NOLONG
-JMP mem64 \323\1\xFF\204 X64
-JMPE imm \322\2\x0F\xB8\64 IA64
-JMPE imm16 \320\2\x0F\xB8\64 IA64
-JMPE imm32 \321\2\x0F\xB8\64 IA64
-JMPE rm16 \320\2\x0F\x00\206 IA64
-JMPE rm32 \321\2\x0F\x00\206 IA64
-LAHF void \1\x9F 8086
-LAR reg16,mem \320\2\x0F\x02\110 286,PROT,SW
-LAR reg16,reg16 \320\2\x0F\x02\110 286,PROT
-LAR reg16,reg32 \320\2\x0F\x02\110 386,PROT
-LAR reg16,reg64 \320\323\2\x0F\x02\110 X64,PROT,ND
-LAR reg32,mem \321\2\x0F\x02\110 386,PROT,SW
-LAR reg32,reg16 \321\2\x0F\x02\110 386,PROT
-LAR reg32,reg32 \321\2\x0F\x02\110 386,PROT
-LAR reg32,reg64 \321\323\2\x0F\x02\110 X64,PROT,ND
-LAR reg64,mem \324\2\x0F\x02\110 X64,PROT,SW
-LAR reg64,reg16 \324\2\x0F\x02\110 X64,PROT
-LAR reg64,reg32 \324\2\x0F\x02\110 X64,PROT
-LAR reg64,reg64 \324\2\x0F\x02\110 X64,PROT
-LDS reg16,mem \320\1\xC5\110 8086,NOLONG
-LDS reg32,mem \321\1\xC5\110 386,NOLONG
-LEA reg16,mem \320\1\x8D\110 8086
-LEA reg32,mem \321\1\x8D\110 386
-LEA reg64,mem \324\1\x8D\110 X64
-LEAVE void \1\xC9 186
-LES reg16,mem \320\1\xC4\110 8086,NOLONG
-LES reg32,mem \321\1\xC4\110 386,NOLONG
-LFENCE void \3\x0F\xAE\xE8 X64,AMD
-LFS reg16,mem \320\2\x0F\xB4\110 386
-LFS reg32,mem \321\2\x0F\xB4\110 386
-LFS reg64,mem \324\2\x0F\xB4\110 X64
-LGDT mem \2\x0F\x01\202 286,PRIV
-LGS reg16,mem \320\2\x0F\xB5\110 386
-LGS reg32,mem \321\2\x0F\xB5\110 386
-LGS reg64,mem \324\2\x0F\xB5\110 X64
-LIDT mem \2\x0F\x01\203 286,PRIV
-LLDT mem \2\x0F\x00\202 286,PROT,PRIV
-LLDT mem16 \2\x0F\x00\202 286,PROT,PRIV
-LLDT reg16 \2\x0F\x00\202 286,PROT,PRIV
-LMSW mem \2\x0F\x01\206 286,PRIV
-LMSW mem16 \2\x0F\x01\206 286,PRIV
-LMSW reg16 \2\x0F\x01\206 286,PRIV
-LOADALL void \2\x0F\x07 386,UNDOC
-LOADALL286 void \2\x0F\x05 286,UNDOC
-LODSB void \1\xAC 8086
-LODSD void \321\1\xAD 386
-LODSQ void \324\1\xAD X64
-LODSW void \320\1\xAD 8086
-LOOP imm \312\1\xE2\50 8086
-LOOP imm,reg_cx \310\1\xE2\50 8086,NOLONG
-LOOP imm,reg_ecx \311\1\xE2\50 386
-LOOP imm,reg_rcx \313\1\xE2\50 X64
-LOOPE imm \312\1\xE1\50 8086
-LOOPE imm,reg_cx \310\1\xE1\50 8086,NOLONG
-LOOPE imm,reg_ecx \311\1\xE1\50 386
-LOOPE imm,reg_rcx \313\1\xE1\50 X64
-LOOPNE imm \312\1\xE0\50 8086
-LOOPNE imm,reg_cx \310\1\xE0\50 8086,NOLONG
-LOOPNE imm,reg_ecx \311\1\xE0\50 386
-LOOPNE imm,reg_rcx \313\1\xE0\50 X64
-LOOPNZ imm \312\1\xE0\50 8086
-LOOPNZ imm,reg_cx \310\1\xE0\50 8086,NOLONG
-LOOPNZ imm,reg_ecx \311\1\xE0\50 386
-LOOPNZ imm,reg_rcx \313\1\xE0\50 X64
-LOOPZ imm \312\1\xE1\50 8086
-LOOPZ imm,reg_cx \310\1\xE1\50 8086,NOLONG
-LOOPZ imm,reg_ecx \311\1\xE1\50 386
-LOOPZ imm,reg_rcx \313\1\xE1\50 X64
-LSL reg16,mem \320\2\x0F\x03\110 286,PROT,SW
-LSL reg16,reg16 \320\2\x0F\x03\110 286,PROT
-LSL reg16,reg32 \320\2\x0F\x03\110 386,PROT
-LSL reg16,reg64 \320\323\2\x0F\x03\110 X64,PROT,ND
-LSL reg32,mem \321\2\x0F\x03\110 386,PROT,SW
-LSL reg32,reg16 \321\2\x0F\x03\110 386,PROT
-LSL reg32,reg32 \321\2\x0F\x03\110 386,PROT
-LSL reg32,reg64 \321\323\2\x0F\x03\110 X64,PROT,ND
-LSL reg64,mem \324\2\x0F\x03\110 X64,PROT,SW
-LSL reg64,reg16 \324\2\x0F\x03\110 X64,PROT
-LSL reg64,reg32 \324\2\x0F\x03\110 X64,PROT
-LSL reg64,reg64 \324\2\x0F\x03\110 X64,PROT
-LSS reg16,mem \320\2\x0F\xB2\110 386
-LSS reg32,mem \321\2\x0F\xB2\110 386
-LSS reg64,mem \324\2\x0F\xB2\110 X64
-LTR mem \2\x0F\x00\203 286,PROT,PRIV
-LTR mem16 \2\x0F\x00\203 286,PROT,PRIV
-LTR reg16 \2\x0F\x00\203 286,PROT,PRIV
-MFENCE void \3\x0F\xAE\xF0 X64,AMD
-MONITOR void \3\x0F\x01\xC8 PRESCOTT
-MONITOR reg_eax,reg_ecx,reg_edx \3\x0F\x01\xC8 PRESCOTT,ND
-MONITOR reg_rax,reg_ecx,reg_edx \3\x0F\x01\xC8 X64,ND
-MOV mem,reg_sreg \1\x8C\101 8086,SM
-MOV reg16,reg_sreg \320\1\x8C\101 8086
-MOV reg32,reg_sreg \321\1\x8C\101 386
-MOV reg_sreg,mem \1\x8E\110 8086,SM
-MOV reg_sreg,reg16 \1\x8E\110 8086
-MOV reg_sreg,reg32 \1\x8E\110 386
-MOV reg_al,mem_offs \1\xA0\45 8086,SM
-MOV reg_ax,mem_offs \320\1\xA1\45 8086,SM
-MOV reg_eax,mem_offs \321\1\xA1\45 386,SM
-MOV reg_rax,mem_offs \324\1\xA1\45 X64,SM
-MOV mem_offs,reg_al \1\xA2\44 8086,SM
-MOV mem_offs,reg_ax \320\1\xA3\44 8086,SM
-MOV mem_offs,reg_eax \321\1\xA3\44 386,SM
-MOV mem_offs,reg_rax \324\1\xA3\44 X64,SM
-MOV reg32,reg_creg \334\2\x0F\x20\101 386,PRIV,NOLONG
-MOV reg64,reg_creg \323\2\x0F\x20\101 X64,PRIV
-MOV reg_creg,reg32 \334\2\x0F\x22\110 386,PRIV,NOLONG
-MOV reg_creg,reg64 \323\2\x0F\x22\110 X64,PRIV
-MOV reg32,reg_dreg \2\x0F\x21\101 386,PRIV,NOLONG
-MOV reg64,reg_dreg \323\2\x0F\x21\101 X64,PRIV
-MOV reg_dreg,reg32 \2\x0F\x23\110 386,PRIV,NOLONG
-MOV reg_dreg,reg64 \323\2\x0F\x23\110 X64,PRIV
-MOV reg32,reg_treg \2\x0F\x24\101 386,NOLONG,ND
-MOV reg_treg,reg32 \2\x0F\x26\110 386,NOLONG,ND
-MOV mem,reg8 \1\x88\101 8086,SM
-MOV reg8,reg8 \1\x88\101 8086
-MOV mem,reg16 \320\1\x89\101 8086,SM
-MOV reg16,reg16 \320\1\x89\101 8086
-MOV mem,reg32 \321\1\x89\101 386,SM
-MOV reg32,reg32 \321\1\x89\101 386
-MOV mem,reg64 \324\1\x89\101 X64,SM
-MOV reg64,reg64 \324\1\x89\101 X64
-MOV reg8,mem \1\x8A\110 8086,SM
-MOV reg8,reg8 \1\x8A\110 8086
-MOV reg16,mem \320\1\x8B\110 8086,SM
-MOV reg16,reg16 \320\1\x8B\110 8086
-MOV reg32,mem \321\1\x8B\110 386,SM
-MOV reg32,reg32 \321\1\x8B\110 386
-MOV reg64,mem \324\1\x8B\110 X64,SM
-MOV reg64,reg64 \324\1\x8B\110 X64
-MOV reg8,imm \10\xB0\21 8086,SM
-MOV reg16,imm \320\10\xB8\31 8086,SM
-MOV reg32,imm \321\10\xB8\41 386,SM
-MOV reg64,imm \324\10\xB8\55 X64,SM
-MOV rm8,imm \1\xC6\200\21 8086,SM
-MOV rm16,imm \320\1\xC7\200\31 8086,SM
-MOV rm32,imm \321\1\xC7\200\41 386,SM
-MOV rm64,imm \324\1\xC7\200\255 X64,SM
-MOV rm64,imm32 \324\1\xC7\200\255 X64
-MOV mem,imm8 \1\xC6\200\21 8086,SM
-MOV mem,imm16 \320\1\xC7\200\31 8086,SM
-MOV mem,imm32 \321\1\xC7\200\41 386,SM
-MOVD mmxreg,mem \360\2\x0F\x6E\110 PENT,MMX,SD
-MOVD mmxreg,reg32 \360\2\x0F\x6E\110 PENT,MMX
-MOVD mem,mmxreg \360\2\x0F\x7E\101 PENT,MMX,SD
-MOVD reg32,mmxreg \360\2\x0F\x7E\101 PENT,MMX
-MOVD xmmreg,mem \360\320\2\x0F\x6E\110 X64,SD
-MOVD xmmreg,reg32 \360\320\2\x0F\x6E\110 X64
-MOVD mem,xmmreg \360\320\2\x0F\x7E\101 X64,SD
-MOVD reg32,xmmreg \360\320\2\x0F\x7E\101 X64,SSE
-MOVQ mmxreg,mmxrm \360\323\2\x0F\x6F\110 PENT,MMX,SQ
-MOVQ mmxrm,mmxreg \360\323\2\x0F\x7F\101 PENT,MMX,SQ
-MOVQ mmxreg,rm64 \360\2\x0F\x6E\110 X64,MMX
-MOVQ rm64,mmxreg \360\2\x0F\x7E\101 X64,MMX
-MOVSB void \1\xA4 8086
-MOVSD void \321\1\xA5 386
-MOVSQ void \324\1\xA5 X64
-MOVSW void \320\1\xA5 8086
-MOVSX reg16,mem \320\2\x0F\xBE\110 386,SB
-MOVSX reg16,reg8 \320\2\x0F\xBE\110 386
-MOVSX reg32,rm8 \321\2\x0F\xBE\110 386
-MOVSX reg32,rm16 \321\2\x0F\xBF\110 386
-MOVSX reg64,rm8 \324\2\x0F\xBE\110 X64
-MOVSX reg64,rm16 \324\2\x0F\xBF\110 X64
-MOVSXD reg64,rm32 \324\1\x63\110 X64
-MOVSX reg64,rm32 \324\1\x63\110 X64,ND
-MOVZX reg16,mem \320\2\x0F\xB6\110 386,SB
-MOVZX reg16,reg8 \320\2\x0F\xB6\110 386
-MOVZX reg32,rm8 \321\2\x0F\xB6\110 386
-MOVZX reg32,rm16 \321\2\x0F\xB7\110 386
-MOVZX reg64,rm8 \324\2\x0F\xB6\110 X64
-MOVZX reg64,rm16 \324\2\x0F\xB7\110 X64
-MUL rm8 \1\xF6\204 8086
-MUL rm16 \320\1\xF7\204 8086
-MUL rm32 \321\1\xF7\204 386
-MUL rm64 \324\1\xF7\204 X64
-MWAIT void \3\x0F\x01\xC9 PRESCOTT
-MWAIT reg_eax,reg_ecx \3\x0F\x01\xC9 PRESCOTT,ND
-NEG rm8 \1\xF6\203 8086
-NEG rm16 \320\1\xF7\203 8086
-NEG rm32 \321\1\xF7\203 386
-NEG rm64 \324\1\xF7\203 X64
-NOP void \314\1\x90 8086
-NOP rm16 \320\2\x0F\x1F\200 P6
-NOP rm32 \321\2\x0F\x1F\200 P6
-NOP rm64 \324\2\x0F\x1F\200 X64
-NOT rm8 \1\xF6\202 8086
-NOT rm16 \320\1\xF7\202 8086
-NOT rm32 \321\1\xF7\202 386
-NOT rm64 \324\1\xF7\202 X64
-OR mem,reg8 \1\x08\101 8086,SM
-OR reg8,reg8 \1\x08\101 8086
-OR mem,reg16 \320\1\x09\101 8086,SM
-OR reg16,reg16 \320\1\x09\101 8086
-OR mem,reg32 \321\1\x09\101 386,SM
-OR reg32,reg32 \321\1\x09\101 386
-OR mem,reg64 \324\1\x09\101 X64,SM
-OR reg64,reg64 \324\1\x09\101 X64
-OR reg8,mem \1\x0A\110 8086,SM
-OR reg8,reg8 \1\x0A\110 8086
-OR reg16,mem \320\1\x0B\110 8086,SM
-OR reg16,reg16 \320\1\x0B\110 8086
-OR reg32,mem \321\1\x0B\110 386,SM
-OR reg32,reg32 \321\1\x0B\110 386
-OR reg64,mem \324\1\x0B\110 X64,SM
-OR reg64,reg64 \324\1\x0B\110 X64
-OR rm16,imm8 \320\1\x83\201\275 8086
-OR rm32,imm8 \321\1\x83\201\275 386
-OR rm64,imm8 \324\1\x83\201\275 X64
-OR reg_al,imm \1\x0C\21 8086,SM
-OR reg_ax,sbyte16 \320\1\x83\201\275 8086,SM
-OR reg_ax,imm \320\1\x0D\31 8086,SM
-OR reg_eax,sbyte32 \321\1\x83\201\275 386,SM
-OR reg_eax,imm \321\1\x0D\41 386,SM
-OR reg_rax,sbyte64 \324\1\x83\201\275 X64,SM
-OR reg_rax,imm \324\1\x0D\255 X64,SM
-OR rm8,imm \1\x80\201\21 8086,SM
-OR rm16,imm \320\145\x81\201\141 8086,SM
-OR rm32,imm \321\155\x81\201\151 386,SM
-OR rm64,imm \324\155\x81\201\251 X64,SM
-OR mem,imm8 \1\x80\201\21 8086,SM
-OR mem,imm16 \320\145\x81\201\141 8086,SM
-OR mem,imm32 \321\155\x81\201\151 386,SM
-OUT imm,reg_al \1\xE6\24 8086,SB
-OUT imm,reg_ax \320\1\xE7\24 8086,SB
-OUT imm,reg_eax \321\1\xE7\24 386,SB
-OUT reg_dx,reg_al \1\xEE 8086
-OUT reg_dx,reg_ax \320\1\xEF 8086
-OUT reg_dx,reg_eax \321\1\xEF 386
-OUTSB void \1\x6E 186
-OUTSD void \321\1\x6F 386
-OUTSW void \320\1\x6F 186
-PACKSSDW mmxreg,mmxrm \360\323\2\x0F\x6B\110 PENT,MMX,SQ
-PACKSSWB mmxreg,mmxrm \360\323\2\x0F\x63\110 PENT,MMX,SQ
-PACKUSWB mmxreg,mmxrm \360\323\2\x0F\x67\110 PENT,MMX,SQ
-PADDB mmxreg,mmxrm \360\323\2\x0F\xFC\110 PENT,MMX,SQ
-PADDD mmxreg,mmxrm \360\323\2\x0F\xFE\110 PENT,MMX,SQ
-PADDSB mmxreg,mmxrm \360\323\2\x0F\xEC\110 PENT,MMX,SQ
-PADDSIW mmxreg,mmxrm \323\2\x0F\x51\110 PENT,MMX,SQ,CYRIX
-PADDSW mmxreg,mmxrm \360\323\2\x0F\xED\110 PENT,MMX,SQ
-PADDUSB mmxreg,mmxrm \360\323\2\x0F\xDC\110 PENT,MMX,SQ
-PADDUSW mmxreg,mmxrm \360\323\2\x0F\xDD\110 PENT,MMX,SQ
-PADDW mmxreg,mmxrm \360\323\2\x0F\xFD\110 PENT,MMX,SQ
-PAND mmxreg,mmxrm \360\323\2\x0F\xDB\110 PENT,MMX,SQ
-PANDN mmxreg,mmxrm \360\323\2\x0F\xDF\110 PENT,MMX,SQ
-PAUSE void \314\333\1\x90 8086
-PAVEB mmxreg,mmxrm \323\2\x0F\x50\110 PENT,MMX,SQ,CYRIX
-PAVGUSB mmxreg,mmxrm \323\2\x0F\x0F\110\01\xBF PENT,3DNOW,SQ
-PCMPEQB mmxreg,mmxrm \360\323\2\x0F\x74\110 PENT,MMX,SQ
-PCMPEQD mmxreg,mmxrm \360\323\2\x0F\x76\110 PENT,MMX,SQ
-PCMPEQW mmxreg,mmxrm \360\323\2\x0F\x75\110 PENT,MMX,SQ
-PCMPGTB mmxreg,mmxrm \360\323\2\x0F\x64\110 PENT,MMX,SQ
-PCMPGTD mmxreg,mmxrm \360\323\2\x0F\x66\110 PENT,MMX,SQ
-PCMPGTW mmxreg,mmxrm \360\323\2\x0F\x65\110 PENT,MMX,SQ
-PDISTIB mmxreg,mem \2\x0F\x54\110 PENT,MMX,SM,CYRIX
-PF2ID mmxreg,mmxrm \323\2\x0F\x0F\110\01\x1D PENT,3DNOW,SQ
-PFACC mmxreg,mmxrm \323\2\x0F\x0F\110\01\xAE PENT,3DNOW,SQ
-PFADD mmxreg,mmxrm \323\2\x0F\x0F\110\01\x9E PENT,3DNOW,SQ
-PFCMPEQ mmxreg,mmxrm \323\2\x0F\x0F\110\01\xB0 PENT,3DNOW,SQ
-PFCMPGE mmxreg,mmxrm \323\2\x0F\x0F\110\01\x90 PENT,3DNOW,SQ
-PFCMPGT mmxreg,mmxrm \323\2\x0F\x0F\110\01\xA0 PENT,3DNOW,SQ
-PFMAX mmxreg,mmxrm \323\2\x0F\x0F\110\01\xA4 PENT,3DNOW,SQ
-PFMIN mmxreg,mmxrm \323\2\x0F\x0F\110\01\x94 PENT,3DNOW,SQ
-PFMUL mmxreg,mmxrm \323\2\x0F\x0F\110\01\xB4 PENT,3DNOW,SQ
-PFRCP mmxreg,mmxrm \323\2\x0F\x0F\110\01\x96 PENT,3DNOW,SQ
-PFRCPIT1 mmxreg,mmxrm \323\2\x0F\x0F\110\01\xA6 PENT,3DNOW,SQ
-PFRCPIT2 mmxreg,mmxrm \323\2\x0F\x0F\110\01\xB6 PENT,3DNOW,SQ
-PFRSQIT1 mmxreg,mmxrm \323\2\x0F\x0F\110\01\xA7 PENT,3DNOW,SQ
-PFRSQRT mmxreg,mmxrm \323\2\x0F\x0F\110\01\x97 PENT,3DNOW,SQ
-PFSUB mmxreg,mmxrm \323\2\x0F\x0F\110\01\x9A PENT,3DNOW,SQ
-PFSUBR mmxreg,mmxrm \323\2\x0F\x0F\110\01\xAA PENT,3DNOW,SQ
-PI2FD mmxreg,mmxrm \323\2\x0F\x0F\110\01\x0D PENT,3DNOW,SQ
-PMACHRIW mmxreg,mem \2\x0F\x5E\110 PENT,MMX,SM,CYRIX
-PMADDWD mmxreg,mmxrm \360\323\2\x0F\xF5\110 PENT,MMX,SQ
-PMAGW mmxreg,mmxrm \323\2\x0F\x52\110 PENT,MMX,SQ,CYRIX
-PMULHRIW mmxreg,mmxrm \323\2\x0F\x5D\110 PENT,MMX,SQ,CYRIX
-PMULHRWA mmxreg,mmxrm \323\2\x0F\x0F\110\1\xB7 PENT,3DNOW,SQ
-PMULHRWC mmxreg,mmxrm \323\2\x0F\x59\110 PENT,MMX,SQ,CYRIX
-PMULHW mmxreg,mmxrm \360\323\2\x0F\xE5\110 PENT,MMX,SQ
-PMULLW mmxreg,mmxrm \360\323\2\x0F\xD5\110 PENT,MMX,SQ
-PMVGEZB mmxreg,mem \2\x0F\x5C\110 PENT,MMX,SQ,CYRIX
-PMVLZB mmxreg,mem \2\x0F\x5B\110 PENT,MMX,SQ,CYRIX
-PMVNZB mmxreg,mem \2\x0F\x5A\110 PENT,MMX,SQ,CYRIX
-PMVZB mmxreg,mem \2\x0F\x58\110 PENT,MMX,SQ,CYRIX
-POP reg16 \320\10\x58 8086
-POP reg32 \321\10\x58 386,NOLONG
-POP reg64 \323\10\x58 X64
-POP rm16 \320\1\x8F\200 8086
-POP rm32 \321\1\x8F\200 386,NOLONG
-POP rm64 \323\1\x8F\200 X64
-POP reg_cs \1\x0F 8086,UNDOC,ND
-POP reg_dess \345 8086,NOLONG
-POP reg_fsgs \1\x0F\347 386
-POPA void \322\1\x61 186,NOLONG
-POPAD void \321\1\x61 386,NOLONG
-POPAW void \320\1\x61 186,NOLONG
-POPF void \322\1\x9D 8086
-POPFD void \321\1\x9D 386,NOLONG
-POPFQ void \321\1\x9D X64
-POPFW void \320\1\x9D 8086
-POR mmxreg,mmxrm \360\323\2\x0F\xEB\110 PENT,MMX,SQ
-PREFETCH mem \2\x0F\x0D\200 PENT,3DNOW,SQ
-PREFETCHW mem \2\x0F\x0D\201 PENT,3DNOW,SQ
-PSLLD mmxreg,mmxrm \360\323\2\x0F\xF2\110 PENT,MMX,SQ
-PSLLD mmxreg,imm \360\2\x0F\x72\206\25 PENT,MMX
-PSLLQ mmxreg,mmxrm \360\323\2\x0F\xF3\110 PENT,MMX,SQ
-PSLLQ mmxreg,imm \360\2\x0F\x73\206\25 PENT,MMX
-PSLLW mmxreg,mmxrm \360\323\2\x0F\xF1\110 PENT,MMX,SQ
-PSLLW mmxreg,imm \360\2\x0F\x71\206\25 PENT,MMX
-PSRAD mmxreg,mmxrm \360\323\2\x0F\xE2\110 PENT,MMX,SQ
-PSRAD mmxreg,imm \360\2\x0F\x72\204\25 PENT,MMX
-PSRAW mmxreg,mmxrm \360\323\2\x0F\xE1\110 PENT,MMX,SQ
-PSRAW mmxreg,imm \360\2\x0F\x71\204\25 PENT,MMX
-PSRLD mmxreg,mmxrm \360\323\2\x0F\xD2\110 PENT,MMX,SQ
-PSRLD mmxreg,imm \360\2\x0F\x72\202\25 PENT,MMX
-PSRLQ mmxreg,mmxrm \360\323\2\x0F\xD3\110 PENT,MMX,SQ
-PSRLQ mmxreg,imm \360\2\x0F\x73\202\25 PENT,MMX
-PSRLW mmxreg,mmxrm \360\323\2\x0F\xD1\110 PENT,MMX,SQ
-PSRLW mmxreg,imm \360\2\x0F\x71\202\25 PENT,MMX
-PSUBB mmxreg,mmxrm \360\323\2\x0F\xF8\110 PENT,MMX,SQ
-PSUBD mmxreg,mmxrm \360\323\2\x0F\xFA\110 PENT,MMX,SQ
-PSUBSB mmxreg,mmxrm \360\323\2\x0F\xE8\110 PENT,MMX,SQ
-PSUBSIW mmxreg,mmxrm \323\2\x0F\x55\110 PENT,MMX,SQ,CYRIX
-PSUBSW mmxreg,mmxrm \360\323\2\x0F\xE9\110 PENT,MMX,SQ
-PSUBUSB mmxreg,mmxrm \360\323\2\x0F\xD8\110 PENT,MMX,SQ
-PSUBUSW mmxreg,mmxrm \360\323\2\x0F\xD9\110 PENT,MMX,SQ
-PSUBW mmxreg,mmxrm \360\323\2\x0F\xF9\110 PENT,MMX,SQ
-PUNPCKHBW mmxreg,mmxrm \360\323\2\x0F\x68\110 PENT,MMX,SQ
-PUNPCKHDQ mmxreg,mmxrm \360\323\2\x0F\x6A\110 PENT,MMX,SQ
-PUNPCKHWD mmxreg,mmxrm \360\323\2\x0F\x69\110 PENT,MMX,SQ
-PUNPCKLBW mmxreg,mmxrm \360\323\2\x0F\x60\110 PENT,MMX,SQ
-PUNPCKLDQ mmxreg,mmxrm \360\323\2\x0F\x62\110 PENT,MMX,SQ
-PUNPCKLWD mmxreg,mmxrm \360\323\2\x0F\x61\110 PENT,MMX,SQ
-PUSH reg16 \320\10\x50 8086
-PUSH reg32 \321\10\x50 386,NOLONG
-PUSH reg64 \323\10\x50 X64
-PUSH rm16 \320\1\xFF\206 8086
-PUSH rm32 \321\1\xFF\206 386,NOLONG
-PUSH rm64 \323\1\xFF\206 X64
-PUSH reg_cs \344 8086,NOLONG
-PUSH reg_dess \344 8086,NOLONG
-PUSH reg_fsgs \1\x0F\346 386
-PUSH imm8 \1\x6A\274 186
-PUSH imm16 \320\144\x68\140 186,AR0,SZ
-PUSH imm32 \321\154\x68\150 386,NOLONG,AR0,SZ
-PUSH imm32 \321\154\x68\150 386,NOLONG,SD
-PUSH imm32 \323\154\x68\250 X64,AR0,SZ
-PUSH imm64 \323\154\x68\250 X64,AR0,SZ
-PUSHA void \322\1\x60 186,NOLONG
-PUSHAD void \321\1\x60 386,NOLONG
-PUSHAW void \320\1\x60 186,NOLONG
-PUSHF void \322\1\x9C 8086
-PUSHFD void \321\1\x9C 386,NOLONG
-PUSHFQ void \321\1\x9C X64
-PUSHFW void \320\1\x9C 8086
-PXOR mmxreg,mmxrm \360\323\2\x0F\xEF\110 PENT,MMX,SQ
-RCL rm8,unity \1\xD0\202 8086
-RCL rm8,reg_cl \1\xD2\202 8086
-RCL rm8,imm \1\xC0\202\25 186,SB
-RCL rm16,unity \320\1\xD1\202 8086
-RCL rm16,reg_cl \320\1\xD3\202 8086
-RCL rm16,imm \320\1\xC1\202\25 186,SB
-RCL rm32,unity \321\1\xD1\202 386
-RCL rm32,reg_cl \321\1\xD3\202 386
-RCL rm32,imm \321\1\xC1\202\25 386,SB
-RCL rm64,unity \324\1\xD1\202 X64
-RCL rm64,reg_cl \324\1\xD3\202 X64
-RCL rm64,imm \324\1\xC1\202\25 X64,SB
-RCR rm8,unity \1\xD0\203 8086
-RCR rm8,reg_cl \1\xD2\203 8086
-RCR rm8,imm \1\xC0\203\25 186,SB
-RCR rm16,unity \320\1\xD1\203 8086
-RCR rm16,reg_cl \320\1\xD3\203 8086
-RCR rm16,imm \320\1\xC1\203\25 186,SB
-RCR rm32,unity \321\1\xD1\203 386
-RCR rm32,reg_cl \321\1\xD3\203 386
-RCR rm32,imm \321\1\xC1\203\25 386,SB
-RCR rm64,unity \324\1\xD1\203 X64
-RCR rm64,reg_cl \324\1\xD3\203 X64
-RCR rm64,imm \324\1\xC1\203\25 X64,SB
-RDSHR rm32 \321\2\x0F\x36\200 P6,CYRIX,SMM
-RDMSR void \2\x0F\x32 PENT,PRIV
-RDPMC void \2\x0F\x33 P6
-RDTSC void \2\x0F\x31 PENT
-RDTSCP void \3\x0F\x01\xF9 X86_64
-RET void \1\xC3 8086
-RET imm \1\xC2\30 8086,SW
-RETF void \1\xCB 8086
-RETF imm \1\xCA\30 8086,SW
-RETN void \1\xC3 8086
-RETN imm \1\xC2\30 8086,SW
-ROL rm8,unity \1\xD0\200 8086
-ROL rm8,reg_cl \1\xD2\200 8086
-ROL rm8,imm \1\xC0\200\25 186,SB
-ROL rm16,unity \320\1\xD1\200 8086
-ROL rm16,reg_cl \320\1\xD3\200 8086
-ROL rm16,imm \320\1\xC1\200\25 186,SB
-ROL rm32,unity \321\1\xD1\200 386
-ROL rm32,reg_cl \321\1\xD3\200 386
-ROL rm32,imm \321\1\xC1\200\25 386,SB
-ROL rm64,unity \324\1\xD1\200 X64
-ROL rm64,reg_cl \324\1\xD3\200 X64
-ROL rm64,imm \324\1\xC1\200\25 X64,SB
-ROR rm8,unity \1\xD0\201 8086
-ROR rm8,reg_cl \1\xD2\201 8086
-ROR rm8,imm \1\xC0\201\25 186,SB
-ROR rm16,unity \320\1\xD1\201 8086
-ROR rm16,reg_cl \320\1\xD3\201 8086
-ROR rm16,imm \320\1\xC1\201\25 186,SB
-ROR rm32,unity \321\1\xD1\201 386
-ROR rm32,reg_cl \321\1\xD3\201 386
-ROR rm32,imm \321\1\xC1\201\25 386,SB
-ROR rm64,unity \324\1\xD1\201 X64
-ROR rm64,reg_cl \324\1\xD3\201 X64
-ROR rm64,imm \324\1\xC1\201\25 X64,SB
-RDM void \2\x0F\x3A P6,CYRIX,ND
-RSDC reg_sreg,mem80 \2\x0F\x79\110 486,CYRIX,SMM
-RSLDT mem80 \2\x0F\x7B\200 486,CYRIX,SMM
-RSM void \2\x0F\xAA PENT,SMM
-RSTS mem80 \2\x0F\x7D\200 486,CYRIX,SMM
-SAHF void \1\x9E 8086
-SAL rm8,unity \1\xD0\204 8086,ND
-SAL rm8,reg_cl \1\xD2\204 8086,ND
-SAL rm8,imm \1\xC0\204\25 186,ND,SB
-SAL rm16,unity \320\1\xD1\204 8086,ND
-SAL rm16,reg_cl \320\1\xD3\204 8086,ND
-SAL rm16,imm \320\1\xC1\204\25 186,ND,SB
-SAL rm32,unity \321\1\xD1\204 386,ND
-SAL rm32,reg_cl \321\1\xD3\204 386,ND
-SAL rm32,imm \321\1\xC1\204\25 386,ND,SB
-SAL rm64,unity \324\1\xD1\204 X64,ND
-SAL rm64,reg_cl \324\1\xD3\204 X64,ND
-SAL rm64,imm \324\1\xC1\204\25 X64,ND,SB
-SALC void \1\xD6 8086,UNDOC
-SAR rm8,unity \1\xD0\207 8086
-SAR rm8,reg_cl \1\xD2\207 8086
-SAR rm8,imm \1\xC0\207\25 186,SB
-SAR rm16,unity \320\1\xD1\207 8086
-SAR rm16,reg_cl \320\1\xD3\207 8086
-SAR rm16,imm \320\1\xC1\207\25 186,SB
-SAR rm32,unity \321\1\xD1\207 386
-SAR rm32,reg_cl \321\1\xD3\207 386
-SAR rm32,imm \321\1\xC1\207\25 386,SB
-SAR rm64,unity \324\1\xD1\207 X64
-SAR rm64,reg_cl \324\1\xD3\207 X64
-SAR rm64,imm \324\1\xC1\207\25 X64,SB
-SBB mem,reg8 \1\x18\101 8086,SM
-SBB reg8,reg8 \1\x18\101 8086
-SBB mem,reg16 \320\1\x19\101 8086,SM
-SBB reg16,reg16 \320\1\x19\101 8086
-SBB mem,reg32 \321\1\x19\101 386,SM
-SBB reg32,reg32 \321\1\x19\101 386
-SBB mem,reg64 \324\1\x19\101 X64,SM
-SBB reg64,reg64 \324\1\x19\101 X64
-SBB reg8,mem \1\x1A\110 8086,SM
-SBB reg8,reg8 \1\x1A\110 8086
-SBB reg16,mem \320\1\x1B\110 8086,SM
-SBB reg16,reg16 \320\1\x1B\110 8086
-SBB reg32,mem \321\1\x1B\110 386,SM
-SBB reg32,reg32 \321\1\x1B\110 386
-SBB reg64,mem \324\1\x1B\110 X64,SM
-SBB reg64,reg64 \324\1\x1B\110 X64
-SBB rm16,imm8 \320\1\x83\203\275 8086
-SBB rm32,imm8 \321\1\x83\203\275 386
-SBB rm64,imm8 \324\1\x83\203\275 X64
-SBB reg_al,imm \1\x1C\21 8086,SM
-SBB reg_ax,sbyte16 \320\1\x83\203\275 8086,SM
-SBB reg_ax,imm \320\1\x1D\31 8086,SM
-SBB reg_eax,sbyte32 \321\1\x83\203\275 386,SM
-SBB reg_eax,imm \321\1\x1D\41 386,SM
-SBB reg_rax,sbyte64 \324\1\x83\203\275 X64,SM
-SBB reg_rax,imm \324\1\x1D\255 X64,SM
-SBB rm8,imm \1\x80\203\21 8086,SM
-SBB rm16,imm \320\145\x81\203\141 8086,SM
-SBB rm32,imm \321\155\x81\203\151 386,SM
-SBB rm64,imm \324\155\x81\203\251 X64,SM
-SBB mem,imm8 \1\x80\203\21 8086,SM
-SBB mem,imm16 \320\145\x81\203\141 8086,SM
-SBB mem,imm32 \321\155\x81\203\151 386,SM
-SCASB void \335\1\xAE 8086
-SCASD void \335\321\1\xAF 386
-SCASQ void \335\324\1\xAF X64
-SCASW void \335\320\1\xAF 8086
-SFENCE void \3\x0F\xAE\xF8 X64,AMD
-SGDT mem \2\x0F\x01\200 286
-SHL rm8,unity \1\xD0\204 8086
-SHL rm8,reg_cl \1\xD2\204 8086
-SHL rm8,imm \1\xC0\204\25 186,SB
-SHL rm16,unity \320\1\xD1\204 8086
-SHL rm16,reg_cl \320\1\xD3\204 8086
-SHL rm16,imm \320\1\xC1\204\25 186,SB
-SHL rm32,unity \321\1\xD1\204 386
-SHL rm32,reg_cl \321\1\xD3\204 386
-SHL rm32,imm \321\1\xC1\204\25 386,SB
-SHL rm64,unity \324\1\xD1\204 X64
-SHL rm64,reg_cl \324\1\xD3\204 X64
-SHL rm64,imm \324\1\xC1\204\25 X64,SB
-SHLD mem,reg16,imm \320\2\x0F\xA4\101\26 386,SM2,SB,AR2
-SHLD reg16,reg16,imm \320\2\x0F\xA4\101\26 386,SM2,SB,AR2
-SHLD mem,reg32,imm \321\2\x0F\xA4\101\26 386,SM2,SB,AR2
-SHLD reg32,reg32,imm \321\2\x0F\xA4\101\26 386,SM2,SB,AR2
-SHLD mem,reg64,imm \324\2\x0F\xA4\101\26 X64,SM2,SB,AR2
-SHLD reg64,reg64,imm \324\2\x0F\xA4\101\26 X64,SM2,SB,AR2
-SHLD mem,reg16,reg_cl \320\2\x0F\xA5\101 386,SM
-SHLD reg16,reg16,reg_cl \320\2\x0F\xA5\101 386
-SHLD mem,reg32,reg_cl \321\2\x0F\xA5\101 386,SM
-SHLD reg32,reg32,reg_cl \321\2\x0F\xA5\101 386
-SHLD mem,reg64,reg_cl \324\2\x0F\xA5\101 X64,SM
-SHLD reg64,reg64,reg_cl \324\2\x0F\xA5\101 X64
-SHR rm8,unity \1\xD0\205 8086
-SHR rm8,reg_cl \1\xD2\205 8086
-SHR rm8,imm \1\xC0\205\25 186,SB
-SHR rm16,unity \320\1\xD1\205 8086
-SHR rm16,reg_cl \320\1\xD3\205 8086
-SHR rm16,imm \320\1\xC1\205\25 186,SB
-SHR rm32,unity \321\1\xD1\205 386
-SHR rm32,reg_cl \321\1\xD3\205 386
-SHR rm32,imm \321\1\xC1\205\25 386,SB
-SHR rm64,unity \324\1\xD1\205 X64
-SHR rm64,reg_cl \324\1\xD3\205 X64
-SHR rm64,imm \324\1\xC1\205\25 X64,SB
-SHRD mem,reg16,imm \320\2\x0F\xAC\101\26 386,SM2,SB,AR2
-SHRD reg16,reg16,imm \320\2\x0F\xAC\101\26 386,SM2,SB,AR2
-SHRD mem,reg32,imm \321\2\x0F\xAC\101\26 386,SM2,SB,AR2
-SHRD reg32,reg32,imm \321\2\x0F\xAC\101\26 386,SM2,SB,AR2
-SHRD mem,reg64,imm \324\2\x0F\xAC\101\26 X64,SM2,SB,AR2
-SHRD reg64,reg64,imm \324\2\x0F\xAC\101\26 X64,SM2,SB,AR2
-SHRD mem,reg16,reg_cl \320\2\x0F\xAD\101 386,SM
-SHRD reg16,reg16,reg_cl \320\2\x0F\xAD\101 386
-SHRD mem,reg32,reg_cl \321\2\x0F\xAD\101 386,SM
-SHRD reg32,reg32,reg_cl \321\2\x0F\xAD\101 386
-SHRD mem,reg64,reg_cl \324\2\x0F\xAD\101 X64,SM
-SHRD reg64,reg64,reg_cl \324\2\x0F\xAD\101 X64
-SIDT mem \2\x0F\x01\201 286
-SLDT mem \2\x0F\x00\200 286
-SLDT mem16 \2\x0F\x00\200 286
-SLDT reg16 \320\2\x0F\x00\200 286
-SLDT reg32 \321\2\x0F\x00\200 386
-SLDT reg64 \323\2\x0F\x00\200 X64,ND
-SLDT reg64 \324\2\x0F\x00\200 X64
-SKINIT void \3\x0F\x01\xDE X64
-SMI void \1\xF1 386,UNDOC
-SMINT void \2\x0F\x38 P6,CYRIX,ND
+INSB void [ 6c] 186
+INSD void [ o32 6d] 386
+INSW void [ o16 6d] 186
+INT imm [i: cd ib,u] 8086,SB
+INT01 void [ f1] 386,ND
+INT1 void [ f1] 386
+INT03 void [ cc] 8086,ND
+INT3 void [ cc] 8086
+INTO void [ ce] 8086,NOLONG
+INVD void [ 0f 08] 486,PRIV
+INVPCID reg32,mem128 [rm: 66 0f 38 82 /r] FUTURE,INVPCID,PRIV,NOLONG
+INVPCID reg64,mem128 [rm: 66 0f 38 82 /r] FUTURE,INVPCID,PRIV,LONG
+INVLPG mem [m: 0f 01 /7] 486,PRIV
+INVLPGA reg_ax,reg_ecx [--: a16 0f 01 df] X86_64,AMD,NOLONG
+INVLPGA reg_eax,reg_ecx [--: a32 0f 01 df] X86_64,AMD
+INVLPGA reg_rax,reg_ecx [--: o64nw a64 0f 01 df] X64,AMD
+INVLPGA void [ 0f 01 df] X86_64,AMD
+IRET void [ odf cf] 8086
+IRETD void [ o32 cf] 386
+IRETQ void [ o64 cf] X64
+IRETW void [ o16 cf] 8086
+JCXZ imm [i: a16 e3 rel8] 8086,NOLONG
+JECXZ imm [i: a32 e3 rel8] 386
+JRCXZ imm [i: a64 e3 rel8] X64
+JMP imm|short [i: eb rel8] 8086
+JMP imm [i: jmp8 eb rel8] 8086,ND
+JMP imm [i: odf e9 rel] 8086
+JMP imm|near [i: odf e9 rel] 8086,ND
+JMP imm|far [i: odf ea iwd seg] 8086,ND,NOLONG
+JMP imm16 [i: o16 e9 rel] 8086
+JMP imm16|near [i: o16 e9 rel] 8086,ND
+JMP imm16|far [i: o16 ea iwd seg] 8086,ND,NOLONG
+JMP imm32 [i: o32 e9 rel] 386
+JMP imm32|near [i: o32 e9 rel] 386,ND
+JMP imm32|far [i: o32 ea iwd seg] 386,ND,NOLONG
+JMP imm:imm [ji: odf ea iwd iw] 8086,NOLONG
+JMP imm16:imm [ji: o16 ea iw iw] 8086,NOLONG
+JMP imm:imm16 [ji: o16 ea iw iw] 8086,NOLONG
+JMP imm32:imm [ji: o32 ea id iw] 386,NOLONG
+JMP imm:imm32 [ji: o32 ea id iw] 386,NOLONG
+JMP mem|far [m: odf ff /5] 8086,NOLONG
+JMP mem|far [m: o64 ff /5] X64
+JMP mem16|far [m: o16 ff /5] 8086
+JMP mem32|far [m: o32 ff /5] 386
+JMP mem64|far [m: o64 ff /5] X64
+JMP mem|near [m: odf ff /4] 8086,ND
+JMP mem16|near [m: o16 ff /4] 8086,ND
+JMP mem32|near [m: o32 ff /4] 386,NOLONG,ND
+JMP mem64|near [m: o64nw ff /4] X64,ND
+JMP reg16 [m: o16 ff /4] 8086
+JMP reg32 [m: o32 ff /4] 386,NOLONG
+JMP reg64 [m: o64nw ff /4] X64
+JMP mem [m: odf ff /4] 8086
+JMP mem16 [m: o16 ff /4] 8086
+JMP mem32 [m: o32 ff /4] 386,NOLONG
+JMP mem [m: o64nw ff /4] X64
+JMP mem64 [m: o64nw ff /4] X64
+JMPE imm [i: odf 0f b8 rel] IA64
+JMPE imm16 [i: o16 0f b8 rel] IA64
+JMPE imm32 [i: o32 0f b8 rel] IA64
+JMPE rm16 [m: o16 0f 00 /6] IA64
+JMPE rm32 [m: o32 0f 00 /6] IA64
+LAHF void [ 9f] 8086
+LAR reg16,mem [rm: o16 0f 02 /r] 286,PROT,SW
+LAR reg16,reg16 [rm: o16 0f 02 /r] 286,PROT
+LAR reg16,reg32 [rm: o16 0f 02 /r] 386,PROT
+LAR reg16,reg64 [rm: o16 o64nw 0f 02 /r] X64,PROT,ND
+LAR reg32,mem [rm: o32 0f 02 /r] 386,PROT,SW
+LAR reg32,reg16 [rm: o32 0f 02 /r] 386,PROT
+LAR reg32,reg32 [rm: o32 0f 02 /r] 386,PROT
+LAR reg32,reg64 [rm: o32 o64nw 0f 02 /r] X64,PROT,ND
+LAR reg64,mem [rm: o64 0f 02 /r] X64,PROT,SW
+LAR reg64,reg16 [rm: o64 0f 02 /r] X64,PROT
+LAR reg64,reg32 [rm: o64 0f 02 /r] X64,PROT
+LAR reg64,reg64 [rm: o64 0f 02 /r] X64,PROT
+LDS reg16,mem [rm: o16 c5 /r] 8086,NOLONG
+LDS reg32,mem [rm: o32 c5 /r] 386,NOLONG
+LEA reg16,mem [rm: o16 8d /r] 8086
+LEA reg32,mem [rm: o32 8d /r] 386
+LEA reg64,mem [rm: o64 8d /r] X64
+LEAVE void [ c9] 186
+LES reg16,mem [rm: o16 c4 /r] 8086,NOLONG
+LES reg32,mem [rm: o32 c4 /r] 386,NOLONG
+LFENCE void [ 0f ae e8] X64,AMD
+LFS reg16,mem [rm: o16 0f b4 /r] 386
+LFS reg32,mem [rm: o32 0f b4 /r] 386
+LFS reg64,mem [rm: o64 0f b4 /r] X64
+LGDT mem [m: 0f 01 /2] 286,PRIV
+LGS reg16,mem [rm: o16 0f b5 /r] 386
+LGS reg32,mem [rm: o32 0f b5 /r] 386
+LGS reg64,mem [rm: o64 0f b5 /r] X64
+LIDT mem [m: 0f 01 /3] 286,PRIV
+LLDT mem [m: 0f 00 /2] 286,PROT,PRIV
+LLDT mem16 [m: 0f 00 /2] 286,PROT,PRIV
+LLDT reg16 [m: 0f 00 /2] 286,PROT,PRIV
+LMSW mem [m: 0f 01 /6] 286,PRIV
+LMSW mem16 [m: 0f 01 /6] 286,PRIV
+LMSW reg16 [m: 0f 01 /6] 286,PRIV
+LOADALL void [ 0f 07] 386,UNDOC
+LOADALL286 void [ 0f 05] 286,UNDOC
+LODSB void [ ac] 8086
+LODSD void [ o32 ad] 386
+LODSQ void [ o64 ad] X64
+LODSW void [ o16 ad] 8086
+LOOP imm [i: adf e2 rel8] 8086
+LOOP imm,reg_cx [i-: a16 e2 rel8] 8086,NOLONG
+LOOP imm,reg_ecx [i-: a32 e2 rel8] 386
+LOOP imm,reg_rcx [i-: a64 e2 rel8] X64
+LOOPE imm [i: adf e1 rel8] 8086
+LOOPE imm,reg_cx [i-: a16 e1 rel8] 8086,NOLONG
+LOOPE imm,reg_ecx [i-: a32 e1 rel8] 386
+LOOPE imm,reg_rcx [i-: a64 e1 rel8] X64
+LOOPNE imm [i: adf e0 rel8] 8086
+LOOPNE imm,reg_cx [i-: a16 e0 rel8] 8086,NOLONG
+LOOPNE imm,reg_ecx [i-: a32 e0 rel8] 386
+LOOPNE imm,reg_rcx [i-: a64 e0 rel8] X64
+LOOPNZ imm [i: adf e0 rel8] 8086
+LOOPNZ imm,reg_cx [i-: a16 e0 rel8] 8086,NOLONG
+LOOPNZ imm,reg_ecx [i-: a32 e0 rel8] 386
+LOOPNZ imm,reg_rcx [i-: a64 e0 rel8] X64
+LOOPZ imm [i: adf e1 rel8] 8086
+LOOPZ imm,reg_cx [i-: a16 e1 rel8] 8086,NOLONG
+LOOPZ imm,reg_ecx [i-: a32 e1 rel8] 386
+LOOPZ imm,reg_rcx [i-: a64 e1 rel8] X64
+LSL reg16,mem [rm: o16 0f 03 /r] 286,PROT,SW
+LSL reg16,reg16 [rm: o16 0f 03 /r] 286,PROT
+LSL reg16,reg32 [rm: o16 0f 03 /r] 386,PROT
+LSL reg16,reg64 [rm: o16 o64nw 0f 03 /r] X64,PROT,ND
+LSL reg32,mem [rm: o32 0f 03 /r] 386,PROT,SW
+LSL reg32,reg16 [rm: o32 0f 03 /r] 386,PROT
+LSL reg32,reg32 [rm: o32 0f 03 /r] 386,PROT
+LSL reg32,reg64 [rm: o32 o64nw 0f 03 /r] X64,PROT,ND
+LSL reg64,mem [rm: o64 0f 03 /r] X64,PROT,SW
+LSL reg64,reg16 [rm: o64 0f 03 /r] X64,PROT
+LSL reg64,reg32 [rm: o64 0f 03 /r] X64,PROT
+LSL reg64,reg64 [rm: o64 0f 03 /r] X64,PROT
+LSS reg16,mem [rm: o16 0f b2 /r] 386
+LSS reg32,mem [rm: o32 0f b2 /r] 386
+LSS reg64,mem [rm: o64 0f b2 /r] X64
+LTR mem [m: 0f 00 /3] 286,PROT,PRIV
+LTR mem16 [m: 0f 00 /3] 286,PROT,PRIV
+LTR reg16 [m: 0f 00 /3] 286,PROT,PRIV
+MFENCE void [ 0f ae f0] X64,AMD
+MONITOR void [ 0f 01 c8] PRESCOTT
+MONITOR reg_eax,reg_ecx,reg_edx [---: 0f 01 c8] PRESCOTT,ND
+MONITOR reg_rax,reg_ecx,reg_edx [---: 0f 01 c8] X64,ND
+MOV mem,reg_sreg [mr: 8c /r] 8086,SW
+MOV reg16,reg_sreg [mr: o16 8c /r] 8086
+MOV reg32,reg_sreg [mr: o32 8c /r] 386
+MOV reg64,reg_sreg [mr: o64nw 8c /r] X64,OPT,ND
+MOV rm64,reg_sreg [mr: o64 8c /r] X64
+MOV reg_sreg,mem [rm: 8e /r] 8086,SW
+MOV reg_sreg,reg16 [rm: 8e /r] 8086,OPT,ND
+MOV reg_sreg,reg32 [rm: 8e /r] 386,OPT,ND
+MOV reg_sreg,reg64 [rm: o64nw 8e /r] X64,OPT,ND
+MOV reg_sreg,reg16 [rm: o16 8e /r] 8086
+MOV reg_sreg,reg32 [rm: o32 8e /r] 386
+MOV reg_sreg,rm64 [rm: o64 8e /r] X64
+MOV reg_al,mem_offs [-i: a0 iwdq] 8086,SM
+MOV reg_ax,mem_offs [-i: o16 a1 iwdq] 8086,SM
+MOV reg_eax,mem_offs [-i: o32 a1 iwdq] 386,SM
+MOV reg_rax,mem_offs [-i: o64 a1 iwdq] X64,SM
+MOV mem_offs,reg_al [i-: a2 iwdq] 8086,SM,NOHLE
+MOV mem_offs,reg_ax [i-: o16 a3 iwdq] 8086,SM,NOHLE
+MOV mem_offs,reg_eax [i-: o32 a3 iwdq] 386,SM,NOHLE
+MOV mem_offs,reg_rax [i-: o64 a3 iwdq] X64,SM,NOHLE
+MOV reg32,reg_creg [mr: rex.l 0f 20 /r] 386,PRIV,NOLONG
+MOV reg64,reg_creg [mr: o64nw 0f 20 /r] X64,PRIV
+MOV reg_creg,reg32 [rm: rex.l 0f 22 /r] 386,PRIV,NOLONG
+MOV reg_creg,reg64 [rm: o64nw 0f 22 /r] X64,PRIV
+MOV reg32,reg_dreg [mr: 0f 21 /r] 386,PRIV,NOLONG
+MOV reg64,reg_dreg [mr: o64nw 0f 21 /r] X64,PRIV
+MOV reg_dreg,reg32 [rm: 0f 23 /r] 386,PRIV,NOLONG
+MOV reg_dreg,reg64 [rm: o64nw 0f 23 /r] X64,PRIV
+MOV reg32,reg_treg [mr: 0f 24 /r] 386,NOLONG,ND
+MOV reg_treg,reg32 [rm: 0f 26 /r] 386,NOLONG,ND
+MOV mem,reg8 [mr: hlexr 88 /r] 8086,SM
+MOV reg8,reg8 [mr: 88 /r] 8086
+MOV mem,reg16 [mr: hlexr o16 89 /r] 8086,SM
+MOV reg16,reg16 [mr: o16 89 /r] 8086
+MOV mem,reg32 [mr: hlexr o32 89 /r] 386,SM
+MOV reg32,reg32 [mr: o32 89 /r] 386
+MOV mem,reg64 [mr: hlexr o64 89 /r] X64,SM
+MOV reg64,reg64 [mr: o64 89 /r] X64
+MOV reg8,mem [rm: 8a /r] 8086,SM
+MOV reg8,reg8 [rm: 8a /r] 8086
+MOV reg16,mem [rm: o16 8b /r] 8086,SM
+MOV reg16,reg16 [rm: o16 8b /r] 8086
+MOV reg32,mem [rm: o32 8b /r] 386,SM
+MOV reg32,reg32 [rm: o32 8b /r] 386
+MOV reg64,mem [rm: o64 8b /r] X64,SM
+MOV reg64,reg64 [rm: o64 8b /r] X64
+MOV reg8,imm [ri: b0+r ib] 8086,SM
+MOV reg16,imm [ri: o16 b8+r iw] 8086,SM
+MOV reg32,imm [ri: o32 b8+r id] 386,SM
+MOV reg64,udword64 [ri: o64nw b8+r id] X64,SM,OPT,ND
+MOV reg64,sdword64 [mi: o64 c7 /0 idx] X64,SM,OPT,ND
+MOV reg64,imm [ri: o64 b8+r iq] X64,SM
+MOV rm8,imm [mi: hlexr c6 /0 ib] 8086,SM
+MOV rm16,imm [mi: hlexr o16 c7 /0 iw] 8086,SM
+MOV rm32,imm [mi: hlexr o32 c7 /0 id] 386,SM
+MOV rm64,imm [mi: hlexr o64 c7 /0 idx] X64,SM
+MOV rm64,imm32 [mi: hlexr o64 c7 /0 idx] X64
+MOV mem,imm8 [mi: hlexr c6 /0 ib] 8086,SM
+MOV mem,imm16 [mi: hlexr o16 c7 /0 iw] 8086,SM
+MOV mem,imm32 [mi: hlexr o32 c7 /0 id] 386,SM
+MOVD mmxreg,rm32 [rm: np 0f 6e /r] PENT,MMX,SD
+MOVD rm32,mmxreg [mr: np 0f 7e /r] PENT,MMX,SD
+MOVD mmxreg,rm64 [rm: np o64 0f 6e /r] X64,MMX,SX,ND
+MOVD rm64,mmxreg [mr: np o64 0f 7e /r] X64,MMX,SX,ND
+MOVQ mmxreg,mmxrm [rm: np 0f 6f /r] PENT,MMX,SQ
+MOVQ mmxrm,mmxreg [mr: np 0f 7f /r] PENT,MMX,SQ
+MOVQ mmxreg,rm64 [rm: np o64 0f 6e /r] X64,MMX
+MOVQ rm64,mmxreg [mr: np o64 0f 7e /r] X64,MMX
+MOVSB void [ a4] 8086
+MOVSD void [ o32 a5] 386
+MOVSQ void [ o64 a5] X64
+MOVSW void [ o16 a5] 8086
+MOVSX reg16,mem [rm: o16 0f be /r] 386,SB
+MOVSX reg16,reg8 [rm: o16 0f be /r] 386
+MOVSX reg32,rm8 [rm: o32 0f be /r] 386
+MOVSX reg32,rm16 [rm: o32 0f bf /r] 386
+MOVSX reg64,rm8 [rm: o64 0f be /r] X64
+MOVSX reg64,rm16 [rm: o64 0f bf /r] X64
+MOVSXD reg64,rm32 [rm: o64 63 /r] X64
+MOVSX reg64,rm32 [rm: o64 63 /r] X64,ND
+MOVZX reg16,mem [rm: o16 0f b6 /r] 386,SB
+MOVZX reg16,reg8 [rm: o16 0f b6 /r] 386
+MOVZX reg32,rm8 [rm: o32 0f b6 /r] 386
+MOVZX reg32,rm16 [rm: o32 0f b7 /r] 386
+MOVZX reg64,rm8 [rm: o64 0f b6 /r] X64
+MOVZX reg64,rm16 [rm: o64 0f b7 /r] X64
+MUL rm8 [m: f6 /4] 8086
+MUL rm16 [m: o16 f7 /4] 8086
+MUL rm32 [m: o32 f7 /4] 386
+MUL rm64 [m: o64 f7 /4] X64
+MWAIT void [ 0f 01 c9] PRESCOTT
+MWAIT reg_eax,reg_ecx [--: 0f 01 c9] PRESCOTT,ND
+NEG rm8 [m: hle f6 /3] 8086,LOCK
+NEG rm16 [m: hle o16 f7 /3] 8086,LOCK
+NEG rm32 [m: hle o32 f7 /3] 386,LOCK
+NEG rm64 [m: hle o64 f7 /3] X64,LOCK
+NOP void [ norexb 90] 8086
+NOP rm16 [m: o16 0f 1f /0] P6
+NOP rm32 [m: o32 0f 1f /0] P6
+NOP rm64 [m: o64 0f 1f /0] X64
+NOT rm8 [m: hle f6 /2] 8086,LOCK
+NOT rm16 [m: hle o16 f7 /2] 8086,LOCK
+NOT rm32 [m: hle o32 f7 /2] 386,LOCK
+NOT rm64 [m: hle o64 f7 /2] X64,LOCK
+OR mem,reg8 [mr: hle 08 /r] 8086,SM,LOCK
+OR reg8,reg8 [mr: 08 /r] 8086
+OR mem,reg16 [mr: hle o16 09 /r] 8086,SM,LOCK
+OR reg16,reg16 [mr: o16 09 /r] 8086
+OR mem,reg32 [mr: hle o32 09 /r] 386,SM,LOCK
+OR reg32,reg32 [mr: o32 09 /r] 386
+OR mem,reg64 [mr: hle o64 09 /r] X64,SM,LOCK
+OR reg64,reg64 [mr: o64 09 /r] X64
+OR reg8,mem [rm: 0a /r] 8086,SM
+OR reg8,reg8 [rm: 0a /r] 8086
+OR reg16,mem [rm: o16 0b /r] 8086,SM
+OR reg16,reg16 [rm: o16 0b /r] 8086
+OR reg32,mem [rm: o32 0b /r] 386,SM
+OR reg32,reg32 [rm: o32 0b /r] 386
+OR reg64,mem [rm: o64 0b /r] X64,SM
+OR reg64,reg64 [rm: o64 0b /r] X64
+OR rm16,imm8 [mi: hle o16 83 /1 ibx] 8086,LOCK
+OR rm32,imm8 [mi: hle o32 83 /1 ibx] 386,LOCK
+OR rm64,imm8 [mi: hle o64 83 /1 ibx] X64,LOCK
+OR reg_al,imm [-i: 0c ib] 8086,SM
+OR reg_ax,sbyte16 [mi: o16 83 /1 ibx] 8086,SM
+OR reg_ax,imm [-i: o16 0d iw] 8086,SM
+OR reg_eax,sbyte32 [mi: o32 83 /1 ibx] 386,SM
+OR reg_eax,imm [-i: o32 0d id] 386,SM
+OR reg_rax,sbyte64 [mi: o64 83 /1 ibx] X64,SM
+OR reg_rax,imm [-i: o64 0d idx] X64,SM
+OR rm8,imm [mi: hle 80 /1 ib] 8086,SM,LOCK
+OR rm16,imm [mi: hle o16 81+s /1 ibw] 8086,SM,LOCK
+OR rm32,imm [mi: hle o32 81+s /1 ibd] 386,SM,LOCK
+OR rm64,imm [mi: hle o64 81+s /1 ibd,s] X64,SM,LOCK
+OR mem,imm8 [mi: hle 80 /1 ib] 8086,SM,LOCK
+OR mem,imm16 [mi: hle o16 81+s /1 ibw] 8086,SM,LOCK
+OR mem,imm32 [mi: hle o32 81+s /1 ibd] 386,SM,LOCK
+OR rm8,imm [mi: hle 82 /1 ib] 8086,SM,LOCK,ND,NOLONG
+OUT imm,reg_al [i-: e6 ib,u] 8086,SB
+OUT imm,reg_ax [i-: o16 e7 ib,u] 8086,SB
+OUT imm,reg_eax [i-: o32 e7 ib,u] 386,SB
+OUT reg_dx,reg_al [--: ee] 8086
+OUT reg_dx,reg_ax [--: o16 ef] 8086
+OUT reg_dx,reg_eax [--: o32 ef] 386
+OUTSB void [ 6e] 186
+OUTSD void [ o32 6f] 386
+OUTSW void [ o16 6f] 186
+PACKSSDW mmxreg,mmxrm [rm: np o64nw 0f 6b /r] PENT,MMX,SQ
+PACKSSWB mmxreg,mmxrm [rm: np o64nw 0f 63 /r] PENT,MMX,SQ
+PACKUSWB mmxreg,mmxrm [rm: np o64nw 0f 67 /r] PENT,MMX,SQ
+PADDB mmxreg,mmxrm [rm: np o64nw 0f fc /r] PENT,MMX,SQ
+PADDD mmxreg,mmxrm [rm: np o64nw 0f fe /r] PENT,MMX,SQ
+PADDSB mmxreg,mmxrm [rm: np o64nw 0f ec /r] PENT,MMX,SQ
+PADDSIW mmxreg,mmxrm [rm: o64nw 0f 51 /r] PENT,MMX,SQ,CYRIX
+PADDSW mmxreg,mmxrm [rm: np o64nw 0f ed /r] PENT,MMX,SQ
+PADDUSB mmxreg,mmxrm [rm: np o64nw 0f dc /r] PENT,MMX,SQ
+PADDUSW mmxreg,mmxrm [rm: np o64nw 0f dd /r] PENT,MMX,SQ
+PADDW mmxreg,mmxrm [rm: np o64nw 0f fd /r] PENT,MMX,SQ
+PAND mmxreg,mmxrm [rm: np o64nw 0f db /r] PENT,MMX,SQ
+PANDN mmxreg,mmxrm [rm: np o64nw 0f df /r] PENT,MMX,SQ
+PAUSE void [ norexb f3i 90] 8086
+PAVEB mmxreg,mmxrm [rm: o64nw 0f 50 /r] PENT,MMX,SQ,CYRIX
+PAVGUSB mmxreg,mmxrm [rm: o64nw 0f 0f /r bf] PENT,3DNOW,SQ
+PCMPEQB mmxreg,mmxrm [rm: np o64nw 0f 74 /r] PENT,MMX,SQ
+PCMPEQD mmxreg,mmxrm [rm: np o64nw 0f 76 /r] PENT,MMX,SQ
+PCMPEQW mmxreg,mmxrm [rm: np o64nw 0f 75 /r] PENT,MMX,SQ
+PCMPGTB mmxreg,mmxrm [rm: np o64nw 0f 64 /r] PENT,MMX,SQ
+PCMPGTD mmxreg,mmxrm [rm: np o64nw 0f 66 /r] PENT,MMX,SQ
+PCMPGTW mmxreg,mmxrm [rm: np o64nw 0f 65 /r] PENT,MMX,SQ
+PDISTIB mmxreg,mem [rm: 0f 54 /r] PENT,MMX,SM,CYRIX
+PF2ID mmxreg,mmxrm [rm: o64nw 0f 0f /r 1d] PENT,3DNOW,SQ
+PFACC mmxreg,mmxrm [rm: o64nw 0f 0f /r ae] PENT,3DNOW,SQ
+PFADD mmxreg,mmxrm [rm: o64nw 0f 0f /r 9e] PENT,3DNOW,SQ
+PFCMPEQ mmxreg,mmxrm [rm: o64nw 0f 0f /r b0] PENT,3DNOW,SQ
+PFCMPGE mmxreg,mmxrm [rm: o64nw 0f 0f /r 90] PENT,3DNOW,SQ
+PFCMPGT mmxreg,mmxrm [rm: o64nw 0f 0f /r a0] PENT,3DNOW,SQ
+PFMAX mmxreg,mmxrm [rm: o64nw 0f 0f /r a4] PENT,3DNOW,SQ
+PFMIN mmxreg,mmxrm [rm: o64nw 0f 0f /r 94] PENT,3DNOW,SQ
+PFMUL mmxreg,mmxrm [rm: o64nw 0f 0f /r b4] PENT,3DNOW,SQ
+PFRCP mmxreg,mmxrm [rm: o64nw 0f 0f /r 96] PENT,3DNOW,SQ
+PFRCPIT1 mmxreg,mmxrm [rm: o64nw 0f 0f /r a6] PENT,3DNOW,SQ
+PFRCPIT2 mmxreg,mmxrm [rm: o64nw 0f 0f /r b6] PENT,3DNOW,SQ
+PFRSQIT1 mmxreg,mmxrm [rm: o64nw 0f 0f /r a7] PENT,3DNOW,SQ
+PFRSQRT mmxreg,mmxrm [rm: o64nw 0f 0f /r 97] PENT,3DNOW,SQ
+PFSUB mmxreg,mmxrm [rm: o64nw 0f 0f /r 9a] PENT,3DNOW,SQ
+PFSUBR mmxreg,mmxrm [rm: o64nw 0f 0f /r aa] PENT,3DNOW,SQ
+PI2FD mmxreg,mmxrm [rm: o64nw 0f 0f /r 0d] PENT,3DNOW,SQ
+PMACHRIW mmxreg,mem [rm: 0f 5e /r] PENT,MMX,SM,CYRIX
+PMADDWD mmxreg,mmxrm [rm: np o64nw 0f f5 /r] PENT,MMX,SQ
+PMAGW mmxreg,mmxrm [rm: o64nw 0f 52 /r] PENT,MMX,SQ,CYRIX
+PMULHRIW mmxreg,mmxrm [rm: o64nw 0f 5d /r] PENT,MMX,SQ,CYRIX
+PMULHRWA mmxreg,mmxrm [rm: o64nw 0f 0f /r b7] PENT,3DNOW,SQ
+PMULHRWC mmxreg,mmxrm [rm: o64nw 0f 59 /r] PENT,MMX,SQ,CYRIX
+PMULHW mmxreg,mmxrm [rm: np o64nw 0f e5 /r] PENT,MMX,SQ
+PMULLW mmxreg,mmxrm [rm: np o64nw 0f d5 /r] PENT,MMX,SQ
+PMVGEZB mmxreg,mem [rm: 0f 5c /r] PENT,MMX,SQ,CYRIX
+PMVLZB mmxreg,mem [rm: 0f 5b /r] PENT,MMX,SQ,CYRIX
+PMVNZB mmxreg,mem [rm: 0f 5a /r] PENT,MMX,SQ,CYRIX
+PMVZB mmxreg,mem [rm: 0f 58 /r] PENT,MMX,SQ,CYRIX
+POP reg16 [r: o16 58+r] 8086
+POP reg32 [r: o32 58+r] 386,NOLONG
+POP reg64 [r: o64nw 58+r] X64
+POP rm16 [m: o16 8f /0] 8086
+POP rm32 [m: o32 8f /0] 386,NOLONG
+POP rm64 [m: o64nw 8f /0] X64
+POP reg_cs [-: 0f] 8086,UNDOC,ND
+POP reg_dess [-: popseg] 8086,NOLONG
+POP reg_fsgs [-: 0f popseg2] 386
+POPA void [ odf 61] 186,NOLONG
+POPAD void [ o32 61] 386,NOLONG
+POPAW void [ o16 61] 186,NOLONG
+POPF void [ odf 9d] 8086
+POPFD void [ o32 9d] 386,NOLONG
+POPFQ void [ o32 9d] X64
+POPFW void [ o16 9d] 8086
+POR mmxreg,mmxrm [rm: np o64nw 0f eb /r] PENT,MMX,SQ
+PREFETCH mem [m: 0f 0d /0] PENT,3DNOW,SQ
+PREFETCHW mem [m: 0f 0d /1] PENT,3DNOW,SQ
+PSLLD mmxreg,mmxrm [rm: np o64nw 0f f2 /r] PENT,MMX,SQ
+PSLLD mmxreg,imm [mi: np 0f 72 /6 ib,u] PENT,MMX
+PSLLQ mmxreg,mmxrm [rm: np o64nw 0f f3 /r] PENT,MMX,SQ
+PSLLQ mmxreg,imm [mi: np 0f 73 /6 ib,u] PENT,MMX
+PSLLW mmxreg,mmxrm [rm: np o64nw 0f f1 /r] PENT,MMX,SQ
+PSLLW mmxreg,imm [mi: np 0f 71 /6 ib,u] PENT,MMX
+PSRAD mmxreg,mmxrm [rm: np o64nw 0f e2 /r] PENT,MMX,SQ
+PSRAD mmxreg,imm [mi: np 0f 72 /4 ib,u] PENT,MMX
+PSRAW mmxreg,mmxrm [rm: np o64nw 0f e1 /r] PENT,MMX,SQ
+PSRAW mmxreg,imm [mi: np 0f 71 /4 ib,u] PENT,MMX
+PSRLD mmxreg,mmxrm [rm: np o64nw 0f d2 /r] PENT,MMX,SQ
+PSRLD mmxreg,imm [mi: np 0f 72 /2 ib,u] PENT,MMX
+PSRLQ mmxreg,mmxrm [rm: np o64nw 0f d3 /r] PENT,MMX,SQ
+PSRLQ mmxreg,imm [mi: np 0f 73 /2 ib,u] PENT,MMX
+PSRLW mmxreg,mmxrm [rm: np o64nw 0f d1 /r] PENT,MMX,SQ
+PSRLW mmxreg,imm [mi: np 0f 71 /2 ib,u] PENT,MMX
+PSUBB mmxreg,mmxrm [rm: np o64nw 0f f8 /r] PENT,MMX,SQ
+PSUBD mmxreg,mmxrm [rm: np o64nw 0f fa /r] PENT,MMX,SQ
+PSUBSB mmxreg,mmxrm [rm: np o64nw 0f e8 /r] PENT,MMX,SQ
+PSUBSIW mmxreg,mmxrm [rm: o64nw 0f 55 /r] PENT,MMX,SQ,CYRIX
+PSUBSW mmxreg,mmxrm [rm: np o64nw 0f e9 /r] PENT,MMX,SQ
+PSUBUSB mmxreg,mmxrm [rm: np o64nw 0f d8 /r] PENT,MMX,SQ
+PSUBUSW mmxreg,mmxrm [rm: np o64nw 0f d9 /r] PENT,MMX,SQ
+PSUBW mmxreg,mmxrm [rm: np o64nw 0f f9 /r] PENT,MMX,SQ
+PUNPCKHBW mmxreg,mmxrm [rm: np o64nw 0f 68 /r] PENT,MMX,SQ
+PUNPCKHDQ mmxreg,mmxrm [rm: np o64nw 0f 6a /r] PENT,MMX,SQ
+PUNPCKHWD mmxreg,mmxrm [rm: np o64nw 0f 69 /r] PENT,MMX,SQ
+PUNPCKLBW mmxreg,mmxrm [rm: np o64nw 0f 60 /r] PENT,MMX,SQ
+PUNPCKLDQ mmxreg,mmxrm [rm: np o64nw 0f 62 /r] PENT,MMX,SQ
+PUNPCKLWD mmxreg,mmxrm [rm: np o64nw 0f 61 /r] PENT,MMX,SQ
+PUSH reg16 [r: o16 50+r] 8086
+PUSH reg32 [r: o32 50+r] 386,NOLONG
+PUSH reg64 [r: o64nw 50+r] X64
+PUSH rm16 [m: o16 ff /6] 8086
+PUSH rm32 [m: o32 ff /6] 386,NOLONG
+PUSH rm64 [m: o64nw ff /6] X64
+PUSH reg_cs [-: pushseg] 8086,NOLONG
+PUSH reg_dess [-: pushseg] 8086,NOLONG
+PUSH reg_fsgs [-: 0f pushseg2] 386
+PUSH imm8 [i: 6a ibx] 186
+PUSH imm16 [i: o16 68+s ibw] 186,AR0,SZ
+PUSH imm32 [i: o32 68+s ibd] 386,NOLONG,AR0,SZ
+PUSH imm32 [i: o32 68+s ibd] 386,NOLONG,SD
+PUSH imm32 [i: o64nw 68+s ibd,s] X64,AR0,SZ
+PUSH imm64 [i: o64nw 68+s ibd,s] X64,AR0,SZ
+PUSHA void [ odf 60] 186,NOLONG
+PUSHAD void [ o32 60] 386,NOLONG
+PUSHAW void [ o16 60] 186,NOLONG
+PUSHF void [ odf 9c] 8086
+PUSHFD void [ o32 9c] 386,NOLONG
+PUSHFQ void [ o32 9c] X64
+PUSHFW void [ o16 9c] 8086
+PXOR mmxreg,mmxrm [rm: np o64nw 0f ef /r] PENT,MMX,SQ
+RCL rm8,unity [m-: d0 /2] 8086
+RCL rm8,reg_cl [m-: d2 /2] 8086
+RCL rm8,imm8 [mi: c0 /2 ib,u] 186
+RCL rm16,unity [m-: o16 d1 /2] 8086
+RCL rm16,reg_cl [m-: o16 d3 /2] 8086
+RCL rm16,imm8 [mi: o16 c1 /2 ib,u] 186
+RCL rm32,unity [m-: o32 d1 /2] 386
+RCL rm32,reg_cl [m-: o32 d3 /2] 386
+RCL rm32,imm8 [mi: o32 c1 /2 ib,u] 386
+RCL rm64,unity [m-: o64 d1 /2] X64
+RCL rm64,reg_cl [m-: o64 d3 /2] X64
+RCL rm64,imm8 [mi: o64 c1 /2 ib,u] X64
+RCR rm8,unity [m-: d0 /3] 8086
+RCR rm8,reg_cl [m-: d2 /3] 8086
+RCR rm8,imm8 [mi: c0 /3 ib,u] 186
+RCR rm16,unity [m-: o16 d1 /3] 8086
+RCR rm16,reg_cl [m-: o16 d3 /3] 8086
+RCR rm16,imm8 [mi: o16 c1 /3 ib,u] 186
+RCR rm32,unity [m-: o32 d1 /3] 386
+RCR rm32,reg_cl [m-: o32 d3 /3] 386
+RCR rm32,imm8 [mi: o32 c1 /3 ib,u] 386
+RCR rm64,unity [m-: o64 d1 /3] X64
+RCR rm64,reg_cl [m-: o64 d3 /3] X64
+RCR rm64,imm8 [mi: o64 c1 /3 ib,u] X64
+RDSHR rm32 [m: o32 0f 36 /0] P6,CYRIX,SMM
+RDMSR void [ 0f 32] PENT,PRIV
+RDPMC void [ 0f 33] P6
+RDTSC void [ 0f 31] PENT
+RDTSCP void [ 0f 01 f9] X86_64
+RET void [ c3] 8086
+RET imm [i: c2 iw] 8086,SW
+RETF void [ cb] 8086
+RETF imm [i: ca iw] 8086,SW
+RETN void [ c3] 8086
+RETN imm [i: c2 iw] 8086,SW
+ROL rm8,unity [m-: d0 /0] 8086
+ROL rm8,reg_cl [m-: d2 /0] 8086
+ROL rm8,imm8 [mi: c0 /0 ib,u] 186
+ROL rm16,unity [m-: o16 d1 /0] 8086
+ROL rm16,reg_cl [m-: o16 d3 /0] 8086
+ROL rm16,imm8 [mi: o16 c1 /0 ib,u] 186
+ROL rm32,unity [m-: o32 d1 /0] 386
+ROL rm32,reg_cl [m-: o32 d3 /0] 386
+ROL rm32,imm8 [mi: o32 c1 /0 ib,u] 386
+ROL rm64,unity [m-: o64 d1 /0] X64
+ROL rm64,reg_cl [m-: o64 d3 /0] X64
+ROL rm64,imm8 [mi: o64 c1 /0 ib,u] X64
+ROR rm8,unity [m-: d0 /1] 8086
+ROR rm8,reg_cl [m-: d2 /1] 8086
+ROR rm8,imm8 [mi: c0 /1 ib,u] 186
+ROR rm16,unity [m-: o16 d1 /1] 8086
+ROR rm16,reg_cl [m-: o16 d3 /1] 8086
+ROR rm16,imm8 [mi: o16 c1 /1 ib,u] 186
+ROR rm32,unity [m-: o32 d1 /1] 386
+ROR rm32,reg_cl [m-: o32 d3 /1] 386
+ROR rm32,imm8 [mi: o32 c1 /1 ib,u] 386
+ROR rm64,unity [m-: o64 d1 /1] X64
+ROR rm64,reg_cl [m-: o64 d3 /1] X64
+ROR rm64,imm8 [mi: o64 c1 /1 ib,u] X64
+RDM void [ 0f 3a] P6,CYRIX,ND
+RSDC reg_sreg,mem80 [rm: 0f 79 /r] 486,CYRIX,SMM
+RSLDT mem80 [m: 0f 7b /0] 486,CYRIX,SMM
+RSM void [ 0f aa] PENT,SMM
+RSTS mem80 [m: 0f 7d /0] 486,CYRIX,SMM
+SAHF void [ 9e] 8086
+SAL rm8,unity [m-: d0 /4] 8086,ND
+SAL rm8,reg_cl [m-: d2 /4] 8086,ND
+SAL rm8,imm8 [mi: c0 /4 ib,u] 186,ND
+SAL rm16,unity [m-: o16 d1 /4] 8086,ND
+SAL rm16,reg_cl [m-: o16 d3 /4] 8086,ND
+SAL rm16,imm8 [mi: o16 c1 /4 ib,u] 186,ND
+SAL rm32,unity [m-: o32 d1 /4] 386,ND
+SAL rm32,reg_cl [m-: o32 d3 /4] 386,ND
+SAL rm32,imm8 [mi: o32 c1 /4 ib,u] 386,ND
+SAL rm64,unity [m-: o64 d1 /4] X64,ND
+SAL rm64,reg_cl [m-: o64 d3 /4] X64,ND
+SAL rm64,imm8 [mi: o64 c1 /4 ib,u] X64,ND
+SALC void [ d6] 8086,UNDOC
+SAR rm8,unity [m-: d0 /7] 8086
+SAR rm8,reg_cl [m-: d2 /7] 8086
+SAR rm8,imm8 [mi: c0 /7 ib,u] 186
+SAR rm16,unity [m-: o16 d1 /7] 8086
+SAR rm16,reg_cl [m-: o16 d3 /7] 8086
+SAR rm16,imm8 [mi: o16 c1 /7 ib,u] 186
+SAR rm32,unity [m-: o32 d1 /7] 386
+SAR rm32,reg_cl [m-: o32 d3 /7] 386
+SAR rm32,imm8 [mi: o32 c1 /7 ib,u] 386
+SAR rm64,unity [m-: o64 d1 /7] X64
+SAR rm64,reg_cl [m-: o64 d3 /7] X64
+SAR rm64,imm8 [mi: o64 c1 /7 ib,u] X64
+SBB mem,reg8 [mr: hle 18 /r] 8086,SM,LOCK
+SBB reg8,reg8 [mr: 18 /r] 8086
+SBB mem,reg16 [mr: hle o16 19 /r] 8086,SM,LOCK
+SBB reg16,reg16 [mr: o16 19 /r] 8086
+SBB mem,reg32 [mr: hle o32 19 /r] 386,SM,LOCK
+SBB reg32,reg32 [mr: o32 19 /r] 386
+SBB mem,reg64 [mr: hle o64 19 /r] X64,SM,LOCK
+SBB reg64,reg64 [mr: o64 19 /r] X64
+SBB reg8,mem [rm: 1a /r] 8086,SM
+SBB reg8,reg8 [rm: 1a /r] 8086
+SBB reg16,mem [rm: o16 1b /r] 8086,SM
+SBB reg16,reg16 [rm: o16 1b /r] 8086
+SBB reg32,mem [rm: o32 1b /r] 386,SM
+SBB reg32,reg32 [rm: o32 1b /r] 386
+SBB reg64,mem [rm: o64 1b /r] X64,SM
+SBB reg64,reg64 [rm: o64 1b /r] X64
+SBB rm16,imm8 [mi: hle o16 83 /3 ibx] 8086,LOCK
+SBB rm32,imm8 [mi: hle o32 83 /3 ibx] 386,LOCK
+SBB rm64,imm8 [mi: hle o64 83 /3 ibx] X64,LOCK
+SBB reg_al,imm [-i: 1c ib] 8086,SM
+SBB reg_ax,sbyte16 [mi: o16 83 /3 ibx] 8086,SM
+SBB reg_ax,imm [-i: o16 1d iw] 8086,SM
+SBB reg_eax,sbyte32 [mi: o32 83 /3 ibx] 386,SM
+SBB reg_eax,imm [-i: o32 1d id] 386,SM
+SBB reg_rax,sbyte64 [mi: o64 83 /3 ibx] X64,SM
+SBB reg_rax,imm [-i: o64 1d idx] X64,SM
+SBB rm8,imm [mi: hle 80 /3 ib] 8086,SM,LOCK
+SBB rm16,imm [mi: hle o16 81+s /3 ibw] 8086,SM,LOCK
+SBB rm32,imm [mi: hle o32 81+s /3 ibd] 386,SM,LOCK
+SBB rm64,imm [mi: hle o64 81+s /3 ibd,s] X64,SM,LOCK
+SBB mem,imm8 [mi: hle 80 /3 ib] 8086,SM,LOCK
+SBB mem,imm16 [mi: hle o16 81+s /3 ibw] 8086,SM,LOCK
+SBB mem,imm32 [mi: hle o32 81+s /3 ibd] 386,SM,LOCK
+SBB rm8,imm [mi: hle 82 /3 ib] 8086,SM,LOCK,ND,NOLONG
+SCASB void [ repe ae] 8086
+SCASD void [ repe o32 af] 386
+SCASQ void [ repe o64 af] X64
+SCASW void [ repe o16 af] 8086
+SFENCE void [ 0f ae f8] X64,AMD
+SGDT mem [m: 0f 01 /0] 286
+SHL rm8,unity [m-: d0 /4] 8086
+SHL rm8,reg_cl [m-: d2 /4] 8086
+SHL rm8,imm8 [mi: c0 /4 ib,u] 186
+SHL rm16,unity [m-: o16 d1 /4] 8086
+SHL rm16,reg_cl [m-: o16 d3 /4] 8086
+SHL rm16,imm8 [mi: o16 c1 /4 ib,u] 186
+SHL rm32,unity [m-: o32 d1 /4] 386
+SHL rm32,reg_cl [m-: o32 d3 /4] 386
+SHL rm32,imm8 [mi: o32 c1 /4 ib,u] 386
+SHL rm64,unity [m-: o64 d1 /4] X64
+SHL rm64,reg_cl [m-: o64 d3 /4] X64
+SHL rm64,imm8 [mi: o64 c1 /4 ib,u] X64
+SHLD mem,reg16,imm [mri: o16 0f a4 /r ib,u] 386,SM2,SB,AR2
+SHLD reg16,reg16,imm [mri: o16 0f a4 /r ib,u] 386,SM2,SB,AR2
+SHLD mem,reg32,imm [mri: o32 0f a4 /r ib,u] 386,SM2,SB,AR2
+SHLD reg32,reg32,imm [mri: o32 0f a4 /r ib,u] 386,SM2,SB,AR2
+SHLD mem,reg64,imm [mri: o64 0f a4 /r ib,u] X64,SM2,SB,AR2
+SHLD reg64,reg64,imm [mri: o64 0f a4 /r ib,u] X64,SM2,SB,AR2
+SHLD mem,reg16,reg_cl [mr-: o16 0f a5 /r] 386,SM
+SHLD reg16,reg16,reg_cl [mr-: o16 0f a5 /r] 386
+SHLD mem,reg32,reg_cl [mr-: o32 0f a5 /r] 386,SM
+SHLD reg32,reg32,reg_cl [mr-: o32 0f a5 /r] 386
+SHLD mem,reg64,reg_cl [mr-: o64 0f a5 /r] X64,SM
+SHLD reg64,reg64,reg_cl [mr-: o64 0f a5 /r] X64
+SHR rm8,unity [m-: d0 /5] 8086
+SHR rm8,reg_cl [m-: d2 /5] 8086
+SHR rm8,imm8 [mi: c0 /5 ib,u] 186
+SHR rm16,unity [m-: o16 d1 /5] 8086
+SHR rm16,reg_cl [m-: o16 d3 /5] 8086
+SHR rm16,imm8 [mi: o16 c1 /5 ib,u] 186
+SHR rm32,unity [m-: o32 d1 /5] 386
+SHR rm32,reg_cl [m-: o32 d3 /5] 386
+SHR rm32,imm8 [mi: o32 c1 /5 ib,u] 386
+SHR rm64,unity [m-: o64 d1 /5] X64
+SHR rm64,reg_cl [m-: o64 d3 /5] X64
+SHR rm64,imm8 [mi: o64 c1 /5 ib,u] X64
+SHRD mem,reg16,imm [mri: o16 0f ac /r ib,u] 386,SM2,SB,AR2
+SHRD reg16,reg16,imm [mri: o16 0f ac /r ib,u] 386,SM2,SB,AR2
+SHRD mem,reg32,imm [mri: o32 0f ac /r ib,u] 386,SM2,SB,AR2
+SHRD reg32,reg32,imm [mri: o32 0f ac /r ib,u] 386,SM2,SB,AR2
+SHRD mem,reg64,imm [mri: o64 0f ac /r ib,u] X64,SM2,SB,AR2
+SHRD reg64,reg64,imm [mri: o64 0f ac /r ib,u] X64,SM2,SB,AR2
+SHRD mem,reg16,reg_cl [mr-: o16 0f ad /r] 386,SM
+SHRD reg16,reg16,reg_cl [mr-: o16 0f ad /r] 386
+SHRD mem,reg32,reg_cl [mr-: o32 0f ad /r] 386,SM
+SHRD reg32,reg32,reg_cl [mr-: o32 0f ad /r] 386
+SHRD mem,reg64,reg_cl [mr-: o64 0f ad /r] X64,SM
+SHRD reg64,reg64,reg_cl [mr-: o64 0f ad /r] X64
+SIDT mem [m: 0f 01 /1] 286
+SLDT mem [m: 0f 00 /0] 286
+SLDT mem16 [m: 0f 00 /0] 286
+SLDT reg16 [m: o16 0f 00 /0] 286
+SLDT reg32 [m: o32 0f 00 /0] 386
+SLDT reg64 [m: o64nw 0f 00 /0] X64,ND
+SLDT reg64 [m: o64 0f 00 /0] X64
+SKINIT void [ 0f 01 de] X64
+SMI void [ f1] 386,UNDOC
+SMINT void [ 0f 38] P6,CYRIX,ND
; Older Cyrix chips had this; they had to move due to conflict with MMX
-SMINTOLD void \2\x0F\x7E 486,CYRIX,ND
-SMSW mem \2\x0F\x01\204 286
-SMSW mem16 \2\x0F\x01\204 286
-SMSW reg16 \320\2\x0F\x01\204 286
-SMSW reg32 \321\2\x0F\x01\204 386
-STC void \1\xF9 8086
-STD void \1\xFD 8086
-STGI void \3\x0F\x01\xDC X64
-STI void \1\xFB 8086
-STOSB void \1\xAA 8086
-STOSD void \321\1\xAB 386
-STOSQ void \324\1\xAB X64
-STOSW void \320\1\xAB 8086
-STR mem \2\x0F\x00\201 286,PROT
-STR mem16 \2\x0F\x00\201 286,PROT
-STR reg16 \320\2\x0F\x00\201 286,PROT
-STR reg32 \321\2\x0F\x00\201 386,PROT
-STR reg64 \324\2\x0F\x00\201 X64
-SUB mem,reg8 \1\x28\101 8086,SM
-SUB reg8,reg8 \1\x28\101 8086
-SUB mem,reg16 \320\1\x29\101 8086,SM
-SUB reg16,reg16 \320\1\x29\101 8086
-SUB mem,reg32 \321\1\x29\101 386,SM
-SUB reg32,reg32 \321\1\x29\101 386
-SUB mem,reg64 \324\1\x29\101 X64,SM
-SUB reg64,reg64 \324\1\x29\101 X64
-SUB reg8,mem \1\x2A\110 8086,SM
-SUB reg8,reg8 \1\x2A\110 8086
-SUB reg16,mem \320\1\x2B\110 8086,SM
-SUB reg16,reg16 \320\1\x2B\110 8086
-SUB reg32,mem \321\1\x2B\110 386,SM
-SUB reg32,reg32 \321\1\x2B\110 386
-SUB reg64,mem \324\1\x2B\110 X64,SM
-SUB reg64,reg64 \324\1\x2B\110 X64
-SUB rm16,imm8 \320\1\x83\205\275 8086
-SUB rm32,imm8 \321\1\x83\205\275 386
-SUB rm64,imm8 \324\1\x83\205\275 X64
-SUB reg_al,imm \1\x2C\21 8086,SM
-SUB reg_ax,sbyte16 \320\1\x83\205\275 8086,SM
-SUB reg_ax,imm \320\1\x2D\31 8086,SM
-SUB reg_eax,sbyte32 \321\1\x83\205\275 386,SM
-SUB reg_eax,imm \321\1\x2D\41 386,SM
-SUB reg_rax,sbyte64 \324\1\x83\205\275 X64,SM
-SUB reg_rax,imm \324\1\x2D\255 X64,SM
-SUB rm8,imm \1\x80\205\21 8086,SM
-SUB rm16,imm \320\145\x81\205\141 8086,SM
-SUB rm32,imm \321\155\x81\205\151 386,SM
-SUB rm64,imm \324\155\x81\205\251 X64,SM
-SUB mem,imm8 \1\x80\205\21 8086,SM
-SUB mem,imm16 \320\145\x81\205\141 8086,SM
-SUB mem,imm32 \321\155\x81\205\151 386,SM
-SVDC mem80,reg_sreg \2\x0F\x78\101 486,CYRIX,SMM
-SVLDT mem80 \2\x0F\x7A\200 486,CYRIX,SMM,ND
-SVTS mem80 \2\x0F\x7C\200 486,CYRIX,SMM
-SWAPGS void \3\x0F\x01\xF8 X64
-SYSCALL void \2\x0F\x05 P6,AMD
-SYSENTER void \2\x0F\x34 P6
-SYSEXIT void \2\x0F\x35 P6,PRIV
-SYSRET void \2\x0F\x07 P6,PRIV,AMD
-TEST mem,reg8 \1\x84\101 8086,SM
-TEST reg8,reg8 \1\x84\101 8086
-TEST mem,reg16 \320\1\x85\101 8086,SM
-TEST reg16,reg16 \320\1\x85\101 8086
-TEST mem,reg32 \321\1\x85\101 386,SM
-TEST reg32,reg32 \321\1\x85\101 386
-TEST mem,reg64 \324\1\x85\101 X64,SM
-TEST reg64,reg64 \324\1\x85\101 X64
-TEST reg8,mem \1\x84\110 8086,SM
-TEST reg16,mem \320\1\x85\110 8086,SM
-TEST reg32,mem \321\1\x85\110 386,SM
-TEST reg64,mem \324\1\x85\110 X64,SM
-TEST reg_al,imm \1\xA8\21 8086,SM
-TEST reg_ax,imm \320\1\xA9\31 8086,SM
-TEST reg_eax,imm \321\1\xA9\41 386,SM
-TEST reg_rax,imm \324\1\xA9\255 X64,SM
-TEST rm8,imm \1\xF6\200\21 8086,SM
-TEST rm16,imm \320\1\xF7\200\31 8086,SM
-TEST rm32,imm \321\1\xF7\200\41 386,SM
-TEST rm64,imm \324\1\xF7\200\255 X64,SM
-TEST mem,imm8 \1\xF6\200\21 8086,SM
-TEST mem,imm16 \320\1\xF7\200\31 8086,SM
-TEST mem,imm32 \321\1\xF7\200\41 386,SM
-UD0 void \2\x0F\xFF 186,UNDOC
-UD1 void \2\x0F\xB9 186,UNDOC
-UD2B void \2\x0F\xB9 186,UNDOC,ND
-UD2 void \2\x0F\x0B 186
-UD2A void \2\x0F\x0B 186,ND
-UMOV mem,reg8 \360\2\x0F\x10\101 386,UNDOC,SM,ND
-UMOV reg8,reg8 \360\2\x0F\x10\101 386,UNDOC,ND
-UMOV mem,reg16 \360\320\2\x0F\x11\101 386,UNDOC,SM,ND
-UMOV reg16,reg16 \360\320\2\x0F\x11\101 386,UNDOC,ND
-UMOV mem,reg32 \360\321\2\x0F\x11\101 386,UNDOC,SM,ND
-UMOV reg32,reg32 \360\321\2\x0F\x11\101 386,UNDOC,ND
-UMOV reg8,mem \360\2\x0F\x12\110 386,UNDOC,SM,ND
-UMOV reg8,reg8 \360\2\x0F\x12\110 386,UNDOC,ND
-UMOV reg16,mem \360\320\2\x0F\x13\110 386,UNDOC,SM,ND
-UMOV reg16,reg16 \360\320\2\x0F\x13\110 386,UNDOC,ND
-UMOV reg32,mem \360\321\2\x0F\x13\110 386,UNDOC,SM,ND
-UMOV reg32,reg32 \360\321\2\x0F\x13\110 386,UNDOC,ND
-VERR mem \2\x0F\x00\204 286,PROT
-VERR mem16 \2\x0F\x00\204 286,PROT
-VERR reg16 \2\x0F\x00\204 286,PROT
-VERW mem \2\x0F\x00\205 286,PROT
-VERW mem16 \2\x0F\x00\205 286,PROT
-VERW reg16 \2\x0F\x00\205 286,PROT
-FWAIT void \341 8086
-WBINVD void \2\x0F\x09 486,PRIV
-WRSHR rm32 \321\2\x0F\x37\200 P6,CYRIX,SMM
-WRMSR void \2\x0F\x30 PENT,PRIV
-XADD mem,reg8 \2\x0F\xC0\101 486,SM
-XADD reg8,reg8 \2\x0F\xC0\101 486
-XADD mem,reg16 \320\2\x0F\xC1\101 486,SM
-XADD reg16,reg16 \320\2\x0F\xC1\101 486
-XADD mem,reg32 \321\2\x0F\xC1\101 486,SM
-XADD reg32,reg32 \321\2\x0F\xC1\101 486
-XADD mem,reg64 \324\2\x0F\xC1\101 X64,SM
-XADD reg64,reg64 \324\2\x0F\xC1\101 X64
-XBTS reg16,mem \320\2\x0F\xA6\110 386,SW,UNDOC,ND
-XBTS reg16,reg16 \320\2\x0F\xA6\110 386,UNDOC,ND
-XBTS reg32,mem \321\2\x0F\xA6\110 386,SD,UNDOC,ND
-XBTS reg32,reg32 \321\2\x0F\xA6\110 386,UNDOC,ND
-XCHG reg_ax,reg16 \320\11\x90 8086
-XCHG reg_eax,reg32na \321\11\x90 386
-XCHG reg_rax,reg64 \324\11\x90 X64
-XCHG reg16,reg_ax \320\10\x90 8086
-XCHG reg32na,reg_eax \321\10\x90 386
-XCHG reg64,reg_rax \324\10\x90 X64
+SMINTOLD void [ 0f 7e] 486,CYRIX,ND
+SMSW mem [m: 0f 01 /4] 286
+SMSW mem16 [m: 0f 01 /4] 286
+SMSW reg16 [m: o16 0f 01 /4] 286
+SMSW reg32 [m: o32 0f 01 /4] 386
+STC void [ f9] 8086
+STD void [ fd] 8086
+STGI void [ 0f 01 dc] X64
+STI void [ fb] 8086
+STOSB void [ aa] 8086
+STOSD void [ o32 ab] 386
+STOSQ void [ o64 ab] X64
+STOSW void [ o16 ab] 8086
+STR mem [m: 0f 00 /1] 286,PROT
+STR mem16 [m: 0f 00 /1] 286,PROT
+STR reg16 [m: o16 0f 00 /1] 286,PROT
+STR reg32 [m: o32 0f 00 /1] 386,PROT
+STR reg64 [m: o64 0f 00 /1] X64
+SUB mem,reg8 [mr: hle 28 /r] 8086,SM,LOCK
+SUB reg8,reg8 [mr: 28 /r] 8086
+SUB mem,reg16 [mr: hle o16 29 /r] 8086,SM,LOCK
+SUB reg16,reg16 [mr: o16 29 /r] 8086
+SUB mem,reg32 [mr: hle o32 29 /r] 386,SM,LOCK
+SUB reg32,reg32 [mr: o32 29 /r] 386
+SUB mem,reg64 [mr: hle o64 29 /r] X64,SM,LOCK
+SUB reg64,reg64 [mr: o64 29 /r] X64
+SUB reg8,mem [rm: 2a /r] 8086,SM
+SUB reg8,reg8 [rm: 2a /r] 8086
+SUB reg16,mem [rm: o16 2b /r] 8086,SM
+SUB reg16,reg16 [rm: o16 2b /r] 8086
+SUB reg32,mem [rm: o32 2b /r] 386,SM
+SUB reg32,reg32 [rm: o32 2b /r] 386
+SUB reg64,mem [rm: o64 2b /r] X64,SM
+SUB reg64,reg64 [rm: o64 2b /r] X64
+SUB rm16,imm8 [mi: hle o16 83 /5 ibx] 8086,LOCK
+SUB rm32,imm8 [mi: hle o32 83 /5 ibx] 386,LOCK
+SUB rm64,imm8 [mi: hle o64 83 /5 ibx] X64,LOCK
+SUB reg_al,imm [-i: 2c ib] 8086,SM
+SUB reg_ax,sbyte16 [mi: o16 83 /5 ibx] 8086,SM
+SUB reg_ax,imm [-i: o16 2d iw] 8086,SM
+SUB reg_eax,sbyte32 [mi: o32 83 /5 ibx] 386,SM
+SUB reg_eax,imm [-i: o32 2d id] 386,SM
+SUB reg_rax,sbyte64 [mi: o64 83 /5 ibx] X64,SM
+SUB reg_rax,imm [-i: o64 2d idx] X64,SM
+SUB rm8,imm [mi: hle 80 /5 ib] 8086,SM,LOCK
+SUB rm16,imm [mi: hle o16 81+s /5 ibw] 8086,SM,LOCK
+SUB rm32,imm [mi: hle o32 81+s /5 ibd] 386,SM,LOCK
+SUB rm64,imm [mi: hle o64 81+s /5 ibd,s] X64,SM,LOCK
+SUB mem,imm8 [mi: hle 80 /5 ib] 8086,SM,LOCK
+SUB mem,imm16 [mi: hle o16 81+s /5 ibw] 8086,SM,LOCK
+SUB mem,imm32 [mi: hle o32 81+s /5 ibd] 386,SM,LOCK
+SUB rm8,imm [mi: hle 82 /5 ib] 8086,SM,LOCK,ND,NOLONG
+SVDC mem80,reg_sreg [mr: 0f 78 /r] 486,CYRIX,SMM
+SVLDT mem80 [m: 0f 7a /0] 486,CYRIX,SMM,ND
+SVTS mem80 [m: 0f 7c /0] 486,CYRIX,SMM
+SWAPGS void [ 0f 01 f8] X64
+SYSCALL void [ 0f 05] P6,AMD
+SYSENTER void [ 0f 34] P6
+SYSEXIT void [ 0f 35] P6,PRIV
+SYSRET void [ 0f 07] P6,PRIV,AMD
+TEST mem,reg8 [mr: 84 /r] 8086,SM
+TEST reg8,reg8 [mr: 84 /r] 8086
+TEST mem,reg16 [mr: o16 85 /r] 8086,SM
+TEST reg16,reg16 [mr: o16 85 /r] 8086
+TEST mem,reg32 [mr: o32 85 /r] 386,SM
+TEST reg32,reg32 [mr: o32 85 /r] 386
+TEST mem,reg64 [mr: o64 85 /r] X64,SM
+TEST reg64,reg64 [mr: o64 85 /r] X64
+TEST reg8,mem [rm: 84 /r] 8086,SM
+TEST reg16,mem [rm: o16 85 /r] 8086,SM
+TEST reg32,mem [rm: o32 85 /r] 386,SM
+TEST reg64,mem [rm: o64 85 /r] X64,SM
+TEST reg_al,imm [-i: a8 ib] 8086,SM
+TEST reg_ax,imm [-i: o16 a9 iw] 8086,SM
+TEST reg_eax,imm [-i: o32 a9 id] 386,SM
+TEST reg_rax,imm [-i: o64 a9 idx] X64,SM
+TEST rm8,imm [mi: f6 /0 ib] 8086,SM
+TEST rm16,imm [mi: o16 f7 /0 iw] 8086,SM
+TEST rm32,imm [mi: o32 f7 /0 id] 386,SM
+TEST rm64,imm [mi: o64 f7 /0 idx] X64,SM
+TEST mem,imm8 [mi: f6 /0 ib] 8086,SM
+TEST mem,imm16 [mi: o16 f7 /0 iw] 8086,SM
+TEST mem,imm32 [mi: o32 f7 /0 id] 386,SM
+UD0 void [ 0f ff] 186,UNDOC
+UD1 void [ 0f b9] 186,UNDOC
+UD2B void [ 0f b9] 186,UNDOC,ND
+UD2 void [ 0f 0b] 186
+UD2A void [ 0f 0b] 186,ND
+UMOV mem,reg8 [mr: np 0f 10 /r] 386,UNDOC,SM,ND
+UMOV reg8,reg8 [mr: np 0f 10 /r] 386,UNDOC,ND
+UMOV mem,reg16 [mr: np o16 0f 11 /r] 386,UNDOC,SM,ND
+UMOV reg16,reg16 [mr: np o16 0f 11 /r] 386,UNDOC,ND
+UMOV mem,reg32 [mr: np o32 0f 11 /r] 386,UNDOC,SM,ND
+UMOV reg32,reg32 [mr: np o32 0f 11 /r] 386,UNDOC,ND
+UMOV reg8,mem [rm: np 0f 12 /r] 386,UNDOC,SM,ND
+UMOV reg8,reg8 [rm: np 0f 12 /r] 386,UNDOC,ND
+UMOV reg16,mem [rm: np o16 0f 13 /r] 386,UNDOC,SM,ND
+UMOV reg16,reg16 [rm: np o16 0f 13 /r] 386,UNDOC,ND
+UMOV reg32,mem [rm: np o32 0f 13 /r] 386,UNDOC,SM,ND
+UMOV reg32,reg32 [rm: np o32 0f 13 /r] 386,UNDOC,ND
+VERR mem [m: 0f 00 /4] 286,PROT
+VERR mem16 [m: 0f 00 /4] 286,PROT
+VERR reg16 [m: 0f 00 /4] 286,PROT
+VERW mem [m: 0f 00 /5] 286,PROT
+VERW mem16 [m: 0f 00 /5] 286,PROT
+VERW reg16 [m: 0f 00 /5] 286,PROT
+FWAIT void [ wait] 8086
+WBINVD void [ 0f 09] 486,PRIV
+WRSHR rm32 [m: o32 0f 37 /0] P6,CYRIX,SMM
+WRMSR void [ 0f 30] PENT,PRIV
+XADD mem,reg8 [mr: hle 0f c0 /r] 486,SM,LOCK
+XADD reg8,reg8 [mr: 0f c0 /r] 486
+XADD mem,reg16 [mr: hle o16 0f c1 /r] 486,SM,LOCK
+XADD reg16,reg16 [mr: o16 0f c1 /r] 486
+XADD mem,reg32 [mr: hle o32 0f c1 /r] 486,SM,LOCK
+XADD reg32,reg32 [mr: o32 0f c1 /r] 486
+XADD mem,reg64 [mr: hle o64 0f c1 /r] X64,SM,LOCK
+XADD reg64,reg64 [mr: o64 0f c1 /r] X64
+XBTS reg16,mem [rm: o16 0f a6 /r] 386,SW,UNDOC,ND
+XBTS reg16,reg16 [rm: o16 0f a6 /r] 386,UNDOC,ND
+XBTS reg32,mem [rm: o32 0f a6 /r] 386,SD,UNDOC,ND
+XBTS reg32,reg32 [rm: o32 0f a6 /r] 386,UNDOC,ND
+XCHG reg_ax,reg16 [-r: o16 90+r] 8086
+XCHG reg_eax,reg32na [-r: o32 90+r] 386
+XCHG reg_rax,reg64 [-r: o64 90+r] X64
+XCHG reg16,reg_ax [r-: o16 90+r] 8086
+XCHG reg32na,reg_eax [r-: o32 90+r] 386
+XCHG reg64,reg_rax [r-: o64 90+r] X64
; This must be NOLONG since opcode 90 is NOP, and in 64-bit mode
; "xchg eax,eax" is *not* a NOP.
-XCHG reg_eax,reg_eax \321\1\x90 386,NOLONG
-XCHG reg8,mem \1\x86\110 8086,SM
-XCHG reg8,reg8 \1\x86\110 8086
-XCHG reg16,mem \320\1\x87\110 8086,SM
-XCHG reg16,reg16 \320\1\x87\110 8086
-XCHG reg32,mem \321\1\x87\110 386,SM
-XCHG reg32,reg32 \321\1\x87\110 386
-XCHG reg64,mem \324\1\x87\110 X64,SM
-XCHG reg64,reg64 \324\1\x87\110 X64
-XCHG mem,reg8 \1\x86\101 8086,SM
-XCHG reg8,reg8 \1\x86\101 8086
-XCHG mem,reg16 \320\1\x87\101 8086,SM
-XCHG reg16,reg16 \320\1\x87\101 8086
-XCHG mem,reg32 \321\1\x87\101 386,SM
-XCHG reg32,reg32 \321\1\x87\101 386
-XCHG mem,reg64 \324\1\x87\101 X64,SM
-XCHG reg64,reg64 \324\1\x87\101 X64
-XLATB void \1\xD7 8086
-XLAT void \1\xD7 8086
-XOR mem,reg8 \1\x30\101 8086,SM
-XOR reg8,reg8 \1\x30\101 8086
-XOR mem,reg16 \320\1\x31\101 8086,SM
-XOR reg16,reg16 \320\1\x31\101 8086
-XOR mem,reg32 \321\1\x31\101 386,SM
-XOR reg32,reg32 \321\1\x31\101 386
-XOR mem,reg64 \324\1\x31\101 X64,SM
-XOR reg64,reg64 \324\1\x31\101 X64
-XOR reg8,mem \1\x32\110 8086,SM
-XOR reg8,reg8 \1\x32\110 8086
-XOR reg16,mem \320\1\x33\110 8086,SM
-XOR reg16,reg16 \320\1\x33\110 8086
-XOR reg32,mem \321\1\x33\110 386,SM
-XOR reg32,reg32 \321\1\x33\110 386
-XOR reg64,mem \324\1\x33\110 X64,SM
-XOR reg64,reg64 \324\1\x33\110 X64
-XOR rm16,imm8 \320\1\x83\206\275 8086
-XOR rm32,imm8 \321\1\x83\206\275 386
-XOR rm64,imm8 \324\1\x83\206\275 X64
-XOR reg_al,imm \1\x34\21 8086,SM
-XOR reg_ax,sbyte16 \320\1\x83\206\275 8086,SM
-XOR reg_ax,imm \320\1\x35\31 8086,SM
-XOR reg_eax,sbyte32 \321\1\x83\206\275 386,SM
-XOR reg_eax,imm \321\1\x35\41 386,SM
-XOR reg_rax,sbyte64 \324\1\x83\206\275 X64,SM
-XOR reg_rax,imm \324\1\x35\255 X64,SM
-XOR rm8,imm \1\x80\206\21 8086,SM
-XOR rm16,imm \320\145\x81\206\141 8086,SM
-XOR rm32,imm \321\155\x81\206\151 386,SM
-XOR rm64,imm \324\155\x81\206\251 X64,SM
-XOR mem,imm8 \1\x80\206\21 8086,SM
-XOR mem,imm16 \320\145\x81\206\141 8086,SM
-XOR mem,imm32 \321\155\x81\206\151 386,SM
-CMOVcc reg16,mem \320\1\x0F\330\x40\110 P6,SM
-CMOVcc reg16,reg16 \320\1\x0F\330\x40\110 P6
-CMOVcc reg32,mem \321\1\x0F\330\x40\110 P6,SM
-CMOVcc reg32,reg32 \321\1\x0F\330\x40\110 P6
-CMOVcc reg64,mem \324\1\x0F\330\x40\110 X64,SM
-CMOVcc reg64,reg64 \324\1\x0F\330\x40\110 X64
-Jcc imm|near \322\1\x0F\330\x80\64 386
-Jcc imm16|near \320\1\x0F\330\x80\64 386
-Jcc imm32|near \321\1\x0F\330\x80\64 386
-Jcc imm|short \330\x70\50 8086,ND
-Jcc imm \370\330\x70\50 8086,ND
-Jcc imm \1\x0F\330\x80\64 386,ND
-Jcc imm \330\x71\373\1\xE9\64 8086,ND
-Jcc imm \330\x70\50 8086
-SETcc mem \1\x0F\330\x90\200 386,SB
-SETcc reg8 \1\x0F\330\x90\200 386
+XCHG reg_eax,reg_eax [--: o32 90] 386,NOLONG
+XCHG reg8,mem [rm: hlenl 86 /r] 8086,SM,LOCK
+XCHG reg8,reg8 [rm: 86 /r] 8086
+XCHG reg16,mem [rm: hlenl o16 87 /r] 8086,SM,LOCK
+XCHG reg16,reg16 [rm: o16 87 /r] 8086
+XCHG reg32,mem [rm: hlenl o32 87 /r] 386,SM,LOCK
+XCHG reg32,reg32 [rm: o32 87 /r] 386
+XCHG reg64,mem [rm: hlenl o64 87 /r] X64,SM,LOCK
+XCHG reg64,reg64 [rm: o64 87 /r] X64
+XCHG mem,reg8 [mr: hlenl 86 /r] 8086,SM,LOCK
+XCHG reg8,reg8 [mr: 86 /r] 8086
+XCHG mem,reg16 [mr: hlenl o16 87 /r] 8086,SM,LOCK
+XCHG reg16,reg16 [mr: o16 87 /r] 8086
+XCHG mem,reg32 [mr: hlenl o32 87 /r] 386,SM,LOCK
+XCHG reg32,reg32 [mr: o32 87 /r] 386
+XCHG mem,reg64 [mr: hlenl o64 87 /r] X64,SM,LOCK
+XCHG reg64,reg64 [mr: o64 87 /r] X64
+XLATB void [ d7] 8086
+XLAT void [ d7] 8086
+XOR mem,reg8 [mr: hle 30 /r] 8086,SM,LOCK
+XOR reg8,reg8 [mr: 30 /r] 8086
+XOR mem,reg16 [mr: hle o16 31 /r] 8086,SM,LOCK
+XOR reg16,reg16 [mr: o16 31 /r] 8086
+XOR mem,reg32 [mr: hle o32 31 /r] 386,SM,LOCK
+XOR reg32,reg32 [mr: o32 31 /r] 386
+XOR mem,reg64 [mr: hle o64 31 /r] X64,SM,LOCK
+XOR reg64,reg64 [mr: o64 31 /r] X64
+XOR reg8,mem [rm: 32 /r] 8086,SM
+XOR reg8,reg8 [rm: 32 /r] 8086
+XOR reg16,mem [rm: o16 33 /r] 8086,SM
+XOR reg16,reg16 [rm: o16 33 /r] 8086
+XOR reg32,mem [rm: o32 33 /r] 386,SM
+XOR reg32,reg32 [rm: o32 33 /r] 386
+XOR reg64,mem [rm: o64 33 /r] X64,SM
+XOR reg64,reg64 [rm: o64 33 /r] X64
+XOR rm16,imm8 [mi: hle o16 83 /6 ibx] 8086,LOCK
+XOR rm32,imm8 [mi: hle o32 83 /6 ibx] 386,LOCK
+XOR rm64,imm8 [mi: hle o64 83 /6 ibx] X64,LOCK
+XOR reg_al,imm [-i: 34 ib] 8086,SM
+XOR reg_ax,sbyte16 [mi: o16 83 /6 ibx] 8086,SM
+XOR reg_ax,imm [-i: o16 35 iw] 8086,SM
+XOR reg_eax,sbyte32 [mi: o32 83 /6 ibx] 386,SM
+XOR reg_eax,imm [-i: o32 35 id] 386,SM
+XOR reg_rax,sbyte64 [mi: o64 83 /6 ibx] X64,SM
+XOR reg_rax,imm [-i: o64 35 idx] X64,SM
+XOR rm8,imm [mi: hle 80 /6 ib] 8086,SM,LOCK
+XOR rm16,imm [mi: hle o16 81+s /6 ibw] 8086,SM,LOCK
+XOR rm32,imm [mi: hle o32 81+s /6 ibd] 386,SM,LOCK
+XOR rm64,imm [mi: hle o64 81+s /6 ibd,s] X64,SM,LOCK
+XOR mem,imm8 [mi: hle 80 /6 ib] 8086,SM,LOCK
+XOR mem,imm16 [mi: hle o16 81+s /6 ibw] 8086,SM,LOCK
+XOR mem,imm32 [mi: hle o32 81+s /6 ibd] 386,SM,LOCK
+XOR rm8,imm [mi: hle 82 /6 ib] 8086,SM,LOCK,ND,NOLONG
+CMOVcc reg16,mem [rm: o16 0f 40+c /r] P6,SM
+CMOVcc reg16,reg16 [rm: o16 0f 40+c /r] P6
+CMOVcc reg32,mem [rm: o32 0f 40+c /r] P6,SM
+CMOVcc reg32,reg32 [rm: o32 0f 40+c /r] P6
+CMOVcc reg64,mem [rm: o64 0f 40+c /r] X64,SM
+CMOVcc reg64,reg64 [rm: o64 0f 40+c /r] X64
+Jcc imm|near [i: odf 0f 80+c rel] 386
+Jcc imm16|near [i: o16 0f 80+c rel] 386
+Jcc imm32|near [i: o32 0f 80+c rel] 386
+Jcc imm|short [i: 70+c rel8] 8086,ND
+Jcc imm [i: jcc8 70+c rel8] 8086,ND
+Jcc imm [i: 0f 80+c rel] 386,ND
+Jcc imm [i: 71+c jlen e9 rel] 8086,ND
+Jcc imm [i: 70+c rel8] 8086
+SETcc mem [m: 0f 90+c /0] 386,SB
+SETcc reg8 [m: 0f 90+c /0] 386
;# Katmai Streaming SIMD instructions (SSE -- a.k.a. KNI, XMM, MMX2)
-ADDPS xmmreg,xmmrm \360\2\x0F\x58\110 KATMAI,SSE
-ADDSS xmmreg,xmmrm \363\2\x0F\x58\110 KATMAI,SSE,SD
-ANDNPS xmmreg,xmmrm \360\2\x0F\x55\110 KATMAI,SSE
-ANDPS xmmreg,xmmrm \360\2\x0F\x54\110 KATMAI,SSE
-CMPEQPS xmmreg,xmmrm \360\2\x0F\xC2\110\1\x00 KATMAI,SSE
-CMPEQSS xmmreg,xmmrm \363\2\x0F\xC2\110\1\x00 KATMAI,SSE
-CMPLEPS xmmreg,xmmrm \360\2\x0F\xC2\110\1\x02 KATMAI,SSE
-CMPLESS xmmreg,xmmrm \363\2\x0F\xC2\110\1\x02 KATMAI,SSE
-CMPLTPS xmmreg,xmmrm \360\2\x0F\xC2\110\1\x01 KATMAI,SSE
-CMPLTSS xmmreg,xmmrm \363\2\x0F\xC2\110\1\x01 KATMAI,SSE
-CMPNEQPS xmmreg,xmmrm \360\2\x0F\xC2\110\1\x04 KATMAI,SSE
-CMPNEQSS xmmreg,xmmrm \363\2\x0F\xC2\110\1\x04 KATMAI,SSE
-CMPNLEPS xmmreg,xmmrm \360\2\x0F\xC2\110\1\x06 KATMAI,SSE
-CMPNLESS xmmreg,xmmrm \363\2\x0F\xC2\110\1\x06 KATMAI,SSE
-CMPNLTPS xmmreg,xmmrm \360\2\x0F\xC2\110\1\x05 KATMAI,SSE
-CMPNLTSS xmmreg,xmmrm \363\2\x0F\xC2\110\1\x05 KATMAI,SSE
-CMPORDPS xmmreg,xmmrm \360\2\x0F\xC2\110\1\x07 KATMAI,SSE
-CMPORDSS xmmreg,xmmrm \363\2\x0F\xC2\110\1\x07 KATMAI,SSE
-CMPUNORDPS xmmreg,xmmrm \360\2\x0F\xC2\110\1\x03 KATMAI,SSE
-CMPUNORDSS xmmreg,xmmrm \363\2\x0F\xC2\110\1\x03 KATMAI,SSE
+ADDPS xmmreg,xmmrm128 [rm: np 0f 58 /r] KATMAI,SSE
+ADDSS xmmreg,xmmrm32 [rm: f3 0f 58 /r] KATMAI,SSE
+ANDNPS xmmreg,xmmrm128 [rm: np 0f 55 /r] KATMAI,SSE
+ANDPS xmmreg,xmmrm128 [rm: np 0f 54 /r] KATMAI,SSE
+CMPEQPS xmmreg,xmmrm128 [rm: np 0f c2 /r 00] KATMAI,SSE
+CMPEQSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 00] KATMAI,SSE
+CMPLEPS xmmreg,xmmrm128 [rm: np 0f c2 /r 02] KATMAI,SSE
+CMPLESS xmmreg,xmmrm32 [rm: f3 0f c2 /r 02] KATMAI,SSE
+CMPLTPS xmmreg,xmmrm128 [rm: np 0f c2 /r 01] KATMAI,SSE
+CMPLTSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 01] KATMAI,SSE
+CMPNEQPS xmmreg,xmmrm128 [rm: np 0f c2 /r 04] KATMAI,SSE
+CMPNEQSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 04] KATMAI,SSE
+CMPNLEPS xmmreg,xmmrm128 [rm: np 0f c2 /r 06] KATMAI,SSE
+CMPNLESS xmmreg,xmmrm32 [rm: f3 0f c2 /r 06] KATMAI,SSE
+CMPNLTPS xmmreg,xmmrm128 [rm: np 0f c2 /r 05] KATMAI,SSE
+CMPNLTSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 05] KATMAI,SSE
+CMPORDPS xmmreg,xmmrm128 [rm: np 0f c2 /r 07] KATMAI,SSE
+CMPORDSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 07] KATMAI,SSE
+CMPUNORDPS xmmreg,xmmrm128 [rm: np 0f c2 /r 03] KATMAI,SSE
+CMPUNORDSS xmmreg,xmmrm32 [rm: f3 0f c2 /r 03] KATMAI,SSE
; CMPPS/CMPSS must come after the specific ops; that way the disassembler will find the
; specific ops first and only disassemble illegal ones as cmpps/cmpss.
-CMPPS xmmreg,mem,imm \360\2\x0F\xC2\110\26 KATMAI,SSE,SB,AR2
-CMPPS xmmreg,xmmreg,imm \360\2\x0F\xC2\110\26 KATMAI,SSE,SB,AR2
-CMPSS xmmreg,mem,imm \363\2\x0F\xC2\110\26 KATMAI,SSE,SB,AR2
-CMPSS xmmreg,xmmreg,imm \363\2\x0F\xC2\110\26 KATMAI,SSE,SB,AR2
-COMISS xmmreg,xmmrm \360\2\x0F\x2F\110 KATMAI,SSE
-CVTPI2PS xmmreg,mmxrm \360\2\x0F\x2A\110 KATMAI,SSE,MMX,SQ
-CVTPS2PI mmxreg,xmmrm \360\2\x0F\x2D\110 KATMAI,SSE,MMX,SQ
-CVTSI2SS xmmreg,mem \363\2\x0F\x2A\110 KATMAI,SSE,SD,AR1,ND
-CVTSI2SS xmmreg,rm32 \363\2\x0F\x2A\110 KATMAI,SSE,SD,AR1
-CVTSI2SS xmmreg,rm64 \324\363\2\x0F\x2A\110 X64,SSE,SQ,AR1
-CVTSS2SI reg32,xmmreg \363\2\x0F\x2D\110 KATMAI,SSE,SD,AR1
-CVTSS2SI reg32,mem \363\2\x0F\x2D\110 KATMAI,SSE,SD,AR1
-CVTSS2SI reg64,xmmreg \324\363\2\x0F\x2D\110 X64,SSE,SD,AR1
-CVTSS2SI reg64,mem \324\363\2\x0F\x2D\110 X64,SSE,SD,AR1
-CVTTPS2PI mmxreg,xmmrm \360\2\x0F\x2C\110 KATMAI,SSE,MMX,SQ
-CVTTSS2SI reg32,xmmrm \363\2\x0F\x2C\110 KATMAI,SSE,SD,AR1
-CVTTSS2SI reg64,xmmrm \324\363\2\x0F\x2C\110 X64,SSE,SD,AR1
-DIVPS xmmreg,xmmrm \360\2\x0F\x5E\110 KATMAI,SSE
-DIVSS xmmreg,xmmrm \363\2\x0F\x5E\110 KATMAI,SSE
-LDMXCSR mem \2\x0F\xAE\202 KATMAI,SSE,SD
-MAXPS xmmreg,xmmrm \360\2\x0F\x5F\110 KATMAI,SSE
-MAXSS xmmreg,xmmrm \363\2\x0F\x5F\110 KATMAI,SSE
-MINPS xmmreg,xmmrm \360\2\x0F\x5D\110 KATMAI,SSE
-MINSS xmmreg,xmmrm \363\2\x0F\x5D\110 KATMAI,SSE
-MOVAPS xmmreg,mem \360\2\x0F\x28\110 KATMAI,SSE
-MOVAPS mem,xmmreg \360\2\x0F\x29\101 KATMAI,SSE
-MOVAPS xmmreg,xmmreg \360\2\x0F\x28\110 KATMAI,SSE
-MOVAPS xmmreg,xmmreg \360\2\x0F\x29\101 KATMAI,SSE
-MOVHPS xmmreg,mem \360\2\x0F\x16\110 KATMAI,SSE
-MOVHPS mem,xmmreg \360\2\x0F\x17\101 KATMAI,SSE
-MOVLHPS xmmreg,xmmreg \360\2\x0F\x16\110 KATMAI,SSE
-MOVLPS xmmreg,mem \360\2\x0F\x12\110 KATMAI,SSE
-MOVLPS mem,xmmreg \360\2\x0F\x13\101 KATMAI,SSE
-MOVHLPS xmmreg,xmmreg \360\2\x0F\x12\110 KATMAI,SSE
-MOVMSKPS reg32,xmmreg \360\2\x0F\x50\110 KATMAI,SSE
-MOVMSKPS reg64,xmmreg \360\324\2\x0F\x50\110 X64,SSE
-MOVNTPS mem,xmmreg \360\2\x0F\x2B\101 KATMAI,SSE
-MOVSS xmmreg,mem \363\2\x0F\x10\110 KATMAI,SSE
-MOVSS mem,xmmreg \363\2\x0F\x11\101 KATMAI,SSE
-MOVSS xmmreg,xmmreg \363\2\x0F\x10\110 KATMAI,SSE
-MOVSS xmmreg,xmmreg \363\2\x0F\x11\101 KATMAI,SSE
-MOVUPS xmmreg,mem \360\2\x0F\x10\110 KATMAI,SSE
-MOVUPS mem,xmmreg \360\2\x0F\x11\101 KATMAI,SSE
-MOVUPS xmmreg,xmmreg \360\2\x0F\x10\110 KATMAI,SSE
-MOVUPS xmmreg,xmmreg \360\2\x0F\x11\101 KATMAI,SSE
-MULPS xmmreg,xmmrm \360\2\x0F\x59\110 KATMAI,SSE
-MULSS xmmreg,xmmrm \363\2\x0F\x59\110 KATMAI,SSE
-ORPS xmmreg,xmmrm \360\2\x0F\x56\110 KATMAI,SSE
-RCPPS xmmreg,xmmrm \360\2\x0F\x53\110 KATMAI,SSE
-RCPSS xmmreg,xmmrm \363\2\x0F\x53\110 KATMAI,SSE
-RSQRTPS xmmreg,xmmrm \360\2\x0F\x52\110 KATMAI,SSE
-RSQRTSS xmmreg,xmmrm \363\2\x0F\x52\110 KATMAI,SSE
-SHUFPS xmmreg,mem,imm \360\2\x0F\xC6\110\26 KATMAI,SSE,SB,AR2
-SHUFPS xmmreg,xmmreg,imm \360\2\x0F\xC6\110\26 KATMAI,SSE,SB,AR2
-SQRTPS xmmreg,xmmrm \360\2\x0F\x51\110 KATMAI,SSE
-SQRTSS xmmreg,xmmrm \363\2\x0F\x51\110 KATMAI,SSE
-STMXCSR mem \2\x0F\xAE\203 KATMAI,SSE,SD
-SUBPS xmmreg,xmmrm \360\2\x0F\x5C\110 KATMAI,SSE
-SUBSS xmmreg,xmmrm \363\2\x0F\x5C\110 KATMAI,SSE
-UCOMISS xmmreg,xmmrm \360\2\x0F\x2E\110 KATMAI,SSE
-UNPCKHPS xmmreg,xmmrm \360\2\x0F\x15\110 KATMAI,SSE
-UNPCKLPS xmmreg,xmmrm \360\2\x0F\x14\110 KATMAI,SSE
-XORPS xmmreg,xmmrm \360\2\x0F\x57\110 KATMAI,SSE
+CMPPS xmmreg,mem,imm [rmi: np 0f c2 /r ib,u] KATMAI,SSE,SB,AR2
+CMPPS xmmreg,xmmreg,imm [rmi: np 0f c2 /r ib,u] KATMAI,SSE,SB,AR2
+CMPSS xmmreg,mem,imm [rmi: f3 0f c2 /r ib,u] KATMAI,SSE,SB,AR2
+CMPSS xmmreg,xmmreg,imm [rmi: f3 0f c2 /r ib,u] KATMAI,SSE,SB,AR2
+COMISS xmmreg,xmmrm32 [rm: np 0f 2f /r] KATMAI,SSE
+CVTPI2PS xmmreg,mmxrm64 [rm: np 0f 2a /r] KATMAI,SSE,MMX
+CVTPS2PI mmxreg,xmmrm64 [rm: np 0f 2d /r] KATMAI,SSE,MMX
+CVTSI2SS xmmreg,mem [rm: f3 0f 2a /r] KATMAI,SSE,SD,AR1,ND
+CVTSI2SS xmmreg,rm32 [rm: f3 0f 2a /r] KATMAI,SSE,SD,AR1
+CVTSI2SS xmmreg,rm64 [rm: o64 f3 0f 2a /r] X64,SSE,SQ,AR1
+CVTSS2SI reg32,xmmreg [rm: f3 0f 2d /r] KATMAI,SSE,SD,AR1
+CVTSS2SI reg32,mem [rm: f3 0f 2d /r] KATMAI,SSE,SD,AR1
+CVTSS2SI reg64,xmmreg [rm: o64 f3 0f 2d /r] X64,SSE,SD,AR1
+CVTSS2SI reg64,mem [rm: o64 f3 0f 2d /r] X64,SSE,SD,AR1
+CVTTPS2PI mmxreg,xmmrm [rm: np 0f 2c /r] KATMAI,SSE,MMX,SQ
+CVTTSS2SI reg32,xmmrm [rm: f3 0f 2c /r] KATMAI,SSE,SD,AR1
+CVTTSS2SI reg64,xmmrm [rm: o64 f3 0f 2c /r] X64,SSE,SD,AR1
+DIVPS xmmreg,xmmrm128 [rm: np 0f 5e /r] KATMAI,SSE
+DIVSS xmmreg,xmmrm32 [rm: f3 0f 5e /r] KATMAI,SSE
+LDMXCSR mem32 [m: 0f ae /2] KATMAI,SSE
+MAXPS xmmreg,xmmrm128 [rm: np 0f 5f /r] KATMAI,SSE
+MAXSS xmmreg,xmmrm32 [rm: f3 0f 5f /r] KATMAI,SSE
+MINPS xmmreg,xmmrm128 [rm: np 0f 5d /r] KATMAI,SSE
+MINSS xmmreg,xmmrm32 [rm: f3 0f 5d /r] KATMAI,SSE
+MOVAPS xmmreg,xmmrm128 [rm: np 0f 28 /r] KATMAI,SSE
+MOVAPS xmmrm128,xmmreg [mr: np 0f 29 /r] KATMAI,SSE
+MOVHPS xmmreg,mem64 [rm: np 0f 16 /r] KATMAI,SSE
+MOVHPS mem64,xmmreg [mr: np 0f 17 /r] KATMAI,SSE
+MOVLHPS xmmreg,xmmreg [rm: np 0f 16 /r] KATMAI,SSE
+MOVLPS xmmreg,mem64 [rm: np 0f 12 /r] KATMAI,SSE
+MOVLPS mem64,xmmreg [mr: np 0f 13 /r] KATMAI,SSE
+MOVHLPS xmmreg,xmmreg [rm: np 0f 12 /r] KATMAI,SSE
+MOVMSKPS reg32,xmmreg [rm: np 0f 50 /r] KATMAI,SSE
+MOVMSKPS reg64,xmmreg [rm: np o64 0f 50 /r] X64,SSE
+MOVNTPS mem128,xmmreg [mr: np 0f 2b /r] KATMAI,SSE
+MOVSS xmmreg,xmmrm32 [rm: f3 0f 10 /r] KATMAI,SSE
+MOVSS mem32,xmmreg [mr: f3 0f 11 /r] KATMAI,SSE
+MOVSS xmmreg,xmmreg [rm: f3 0f 10 /r] KATMAI,SSE
+MOVUPS xmmreg,xmmrm128 [rm: np 0f 10 /r] KATMAI,SSE
+MOVUPS xmmrm128,xmmreg [mr: np 0f 11 /r] KATMAI,SSE
+MULPS xmmreg,xmmrm128 [rm: np 0f 59 /r] KATMAI,SSE
+MULSS xmmreg,xmmrm32 [rm: f3 0f 59 /r] KATMAI,SSE
+ORPS xmmreg,xmmrm128 [rm: np 0f 56 /r] KATMAI,SSE
+RCPPS xmmreg,xmmrm128 [rm: np 0f 53 /r] KATMAI,SSE
+RCPSS xmmreg,xmmrm32 [rm: f3 0f 53 /r] KATMAI,SSE
+RSQRTPS xmmreg,xmmrm128 [rm: np 0f 52 /r] KATMAI,SSE
+RSQRTSS xmmreg,xmmrm32 [rm: f3 0f 52 /r] KATMAI,SSE
+SHUFPS xmmreg,xmmrm128,imm8 [rmi: np 0f c6 /r ib,u] KATMAI,SSE
+SQRTPS xmmreg,xmmrm128 [rm: np 0f 51 /r] KATMAI,SSE
+SQRTSS xmmreg,xmmrm32 [rm: f3 0f 51 /r] KATMAI,SSE
+STMXCSR mem32 [m: 0f ae /3] KATMAI,SSE
+SUBPS xmmreg,xmmrm128 [rm: np 0f 5c /r] KATMAI,SSE
+SUBSS xmmreg,xmmrm32 [rm: f3 0f 5c /r] KATMAI,SSE
+UCOMISS xmmreg,xmmrm32 [rm: np 0f 2e /r] KATMAI,SSE
+UNPCKHPS xmmreg,xmmrm128 [rm: np 0f 15 /r] KATMAI,SSE
+UNPCKLPS xmmreg,xmmrm128 [rm: np 0f 14 /r] KATMAI,SSE
+XORPS xmmreg,xmmrm128 [rm: np 0f 57 /r] KATMAI,SSE
;# Introduced in Deschutes but necessary for SSE support
FXRSTOR mem [m: 0f ae /1] P6,SSE,FPU
@@ -1518,8 +1528,8 @@ FXSAVE64 mem [m: o64 0f ae /0] X64,SSE,FPU
;# XSAVE group (AVX and extended state)
; Introduced in late Penryn ... we really need to clean up the handling
; of CPU feature bits.
-XGETBV void \360\3\x0F\x01\xD0 NEHALEM
-XSETBV void \360\3\x0F\x01\xD1 NEHALEM,PRIV
+XGETBV void [ np 0f 01 d0] NEHALEM
+XSETBV void [ np 0f 01 d1] NEHALEM,PRIV
XSAVE mem [m: 0f ae /4] NEHALEM
XSAVE64 mem [m: o64 0f ae /4] LONG,NEHALEM
XSAVEOPT mem [m: 0f ae /6] FUTURE
@@ -1530,271 +1540,272 @@ XRSTOR64 mem [m: o64 0f ae /5] LONG,NEHALEM
; These instructions are not SSE-specific; they are
;# Generic memory operations
; and work even if CR4.OSFXFR == 0
-PREFETCHNTA mem \2\x0F\x18\200 KATMAI
-PREFETCHT0 mem \2\x0F\x18\201 KATMAI
-PREFETCHT1 mem \2\x0F\x18\202 KATMAI
-PREFETCHT2 mem \2\x0F\x18\203 KATMAI
-SFENCE void \3\x0F\xAE\xF8 KATMAI
+PREFETCHNTA mem [m: 0f 18 /0] KATMAI
+PREFETCHT0 mem [m: 0f 18 /1] KATMAI
+PREFETCHT1 mem [m: 0f 18 /2] KATMAI
+PREFETCHT2 mem [m: 0f 18 /3] KATMAI
+SFENCE void [ 0f ae f8] KATMAI
;# New MMX instructions introduced in Katmai
-MASKMOVQ mmxreg,mmxreg \360\2\x0F\xF7\110 KATMAI,MMX
-MOVNTQ mem,mmxreg \360\2\x0F\xE7\101 KATMAI,MMX,SQ
-PAVGB mmxreg,mmxrm \360\323\2\x0F\xE0\110 KATMAI,MMX,SQ
-PAVGW mmxreg,mmxrm \360\323\2\x0F\xE3\110 KATMAI,MMX,SQ
-PEXTRW reg32,mmxreg,imm \360\2\x0F\xC5\110\26 KATMAI,MMX,SB,AR2
+MASKMOVQ mmxreg,mmxreg [rm: np 0f f7 /r] KATMAI,MMX
+MOVNTQ mem,mmxreg [mr: np 0f e7 /r] KATMAI,MMX,SQ
+PAVGB mmxreg,mmxrm [rm: np o64nw 0f e0 /r] KATMAI,MMX,SQ
+PAVGW mmxreg,mmxrm [rm: np o64nw 0f e3 /r] KATMAI,MMX,SQ
+PEXTRW reg32,mmxreg,imm [rmi: np 0f c5 /r ib,u] KATMAI,MMX,SB,AR2
; PINSRW is documented as using a reg32, but it's really using only 16 bit
; -- accept either, but be truthful in disassembly
-PINSRW mmxreg,mem,imm \360\2\x0F\xC4\110\26 KATMAI,MMX,SB,AR2
-PINSRW mmxreg,rm16,imm \360\2\x0F\xC4\110\26 KATMAI,MMX,SB,AR2
-PINSRW mmxreg,reg32,imm \360\2\x0F\xC4\110\26 KATMAI,MMX,SB,AR2
-PMAXSW mmxreg,mmxrm \360\323\2\x0F\xEE\110 KATMAI,MMX,SQ
-PMAXUB mmxreg,mmxrm \360\323\2\x0F\xDE\110 KATMAI,MMX,SQ
-PMINSW mmxreg,mmxrm \360\323\2\x0F\xEA\110 KATMAI,MMX,SQ
-PMINUB mmxreg,mmxrm \360\323\2\x0F\xDA\110 KATMAI,MMX,SQ
-PMOVMSKB reg32,mmxreg \360\2\x0F\xD7\110 KATMAI,MMX
-PMULHUW mmxreg,mmxrm \360\323\2\x0F\xE4\110 KATMAI,MMX,SQ
-PSADBW mmxreg,mmxrm \360\323\2\x0F\xF6\110 KATMAI,MMX,SQ
-PSHUFW mmxreg,mmxrm,imm \360\323\2\x0F\x70\110\22 KATMAI,MMX,SM2,SB,AR2
+PINSRW mmxreg,mem,imm [rmi: np 0f c4 /r ib,u] KATMAI,MMX,SB,AR2
+PINSRW mmxreg,rm16,imm [rmi: np 0f c4 /r ib,u] KATMAI,MMX,SB,AR2
+PINSRW mmxreg,reg32,imm [rmi: np 0f c4 /r ib,u] KATMAI,MMX,SB,AR2
+PMAXSW mmxreg,mmxrm [rm: np o64nw 0f ee /r] KATMAI,MMX,SQ
+PMAXUB mmxreg,mmxrm [rm: np o64nw 0f de /r] KATMAI,MMX,SQ
+PMINSW mmxreg,mmxrm [rm: np o64nw 0f ea /r] KATMAI,MMX,SQ
+PMINUB mmxreg,mmxrm [rm: np o64nw 0f da /r] KATMAI,MMX,SQ
+PMOVMSKB reg32,mmxreg [rm: np 0f d7 /r] KATMAI,MMX
+PMULHUW mmxreg,mmxrm [rm: np o64nw 0f e4 /r] KATMAI,MMX,SQ
+PSADBW mmxreg,mmxrm [rm: np o64nw 0f f6 /r] KATMAI,MMX,SQ
+PSHUFW mmxreg,mmxrm,imm [rmi: np o64nw 0f 70 /r ib] KATMAI,MMX,SM2,SB,AR2
;# AMD Enhanced 3DNow! (Athlon) instructions
-PF2IW mmxreg,mmxrm \323\2\x0F\x0F\110\01\x1C PENT,3DNOW,SQ
-PFNACC mmxreg,mmxrm \323\2\x0F\x0F\110\01\x8A PENT,3DNOW,SQ
-PFPNACC mmxreg,mmxrm \323\2\x0F\x0F\110\01\x8E PENT,3DNOW,SQ
-PI2FW mmxreg,mmxrm \323\2\x0F\x0F\110\01\x0C PENT,3DNOW,SQ
-PSWAPD mmxreg,mmxrm \323\2\x0F\x0F\110\01\xBB PENT,3DNOW,SQ
+PF2IW mmxreg,mmxrm [rm: o64nw 0f 0f /r 1c] PENT,3DNOW,SQ
+PFNACC mmxreg,mmxrm [rm: o64nw 0f 0f /r 8a] PENT,3DNOW,SQ
+PFPNACC mmxreg,mmxrm [rm: o64nw 0f 0f /r 8e] PENT,3DNOW,SQ
+PI2FW mmxreg,mmxrm [rm: o64nw 0f 0f /r 0c] PENT,3DNOW,SQ
+PSWAPD mmxreg,mmxrm [rm: o64nw 0f 0f /r bb] PENT,3DNOW,SQ
;# Willamette SSE2 Cacheability Instructions
-MASKMOVDQU xmmreg,xmmreg \361\2\x0F\xF7\110 WILLAMETTE,SSE2
+MASKMOVDQU xmmreg,xmmreg [rm: 66 0f f7 /r] WILLAMETTE,SSE2
; CLFLUSH needs its own feature flag implemented one day
-CLFLUSH mem \2\x0F\xAE\207 WILLAMETTE,SSE2
-MOVNTDQ mem,xmmreg \361\2\x0F\xE7\101 WILLAMETTE,SSE2,SO
-MOVNTI mem,reg32 \360\2\x0F\xC3\101 WILLAMETTE,SD
-MOVNTI mem,reg64 \324\360\2\x0F\xC3\101 X64,SQ
-MOVNTPD mem,xmmreg \361\2\x0F\x2B\101 WILLAMETTE,SSE2,SO
-LFENCE void \3\x0F\xAE\xE8 WILLAMETTE,SSE2
-MFENCE void \3\x0F\xAE\xF0 WILLAMETTE,SSE2
+CLFLUSH mem [m: 0f ae /7] WILLAMETTE,SSE2
+MOVNTDQ mem,xmmreg [mr: 66 0f e7 /r] WILLAMETTE,SSE2,SO
+MOVNTI mem,reg32 [mr: np 0f c3 /r] WILLAMETTE,SD
+MOVNTI mem,reg64 [mr: o64 np 0f c3 /r] X64,SQ
+MOVNTPD mem,xmmreg [mr: 66 0f 2b /r] WILLAMETTE,SSE2,SO
+LFENCE void [ 0f ae e8] WILLAMETTE,SSE2
+MFENCE void [ 0f ae f0] WILLAMETTE,SSE2
;# Willamette MMX instructions (SSE2 SIMD Integer Instructions)
-MOVD mem,xmmreg \361\317\2\x0F\x7E\101 WILLAMETTE,SSE2,SD
-MOVD xmmreg,mem \361\317\2\x0F\x6E\110 WILLAMETTE,SSE2,SD
-MOVD xmmreg,rm32 \361\317\2\x0F\x6E\110 WILLAMETTE,SSE2
-MOVD rm32,xmmreg \361\317\2\x0F\x7E\101 WILLAMETTE,SSE2
-MOVDQA xmmreg,xmmreg \361\2\x0F\x6F\110 WILLAMETTE,SSE2
-MOVDQA mem,xmmreg \361\2\x0F\x7F\101 WILLAMETTE,SSE2,SO
-MOVDQA xmmreg,mem \361\2\x0F\x6F\110 WILLAMETTE,SSE2,SO
-MOVDQA xmmreg,xmmreg \361\2\x0F\x7F\101 WILLAMETTE,SSE2
-MOVDQU xmmreg,xmmreg \363\2\x0F\x6F\110 WILLAMETTE,SSE2
-MOVDQU mem,xmmreg \363\2\x0F\x7F\101 WILLAMETTE,SSE2,SO
-MOVDQU xmmreg,mem \363\2\x0F\x6F\110 WILLAMETTE,SSE2,SO
-MOVDQU xmmreg,xmmreg \363\2\x0F\x7F\101 WILLAMETTE,SSE2
-MOVDQ2Q mmxreg,xmmreg \362\2\x0F\xD6\110 WILLAMETTE,SSE2
-MOVQ xmmreg,xmmreg \363\2\x0F\x7E\110 WILLAMETTE,SSE2
-MOVQ xmmreg,xmmreg \361\2\x0F\xD6\101 WILLAMETTE,SSE2
-MOVQ mem,xmmreg \361\2\x0F\xD6\101 WILLAMETTE,SSE2,SQ
-MOVQ xmmreg,mem \363\2\x0F\x7E\110 WILLAMETTE,SSE2,SQ
-MOVQ xmmreg,rm64 \361\324\2\x0F\x6E\110 X64,SSE2
-MOVQ rm64,xmmreg \361\324\2\x0F\x7E\101 X64,SSE2
-MOVQ2DQ xmmreg,mmxreg \363\2\x0F\xD6\110 WILLAMETTE,SSE2
-PACKSSWB xmmreg,xmmrm \361\2\x0F\x63\110 WILLAMETTE,SSE2,SO
-PACKSSDW xmmreg,xmmrm \361\2\x0F\x6B\110 WILLAMETTE,SSE2,SO
-PACKUSWB xmmreg,xmmrm \361\2\x0F\x67\110 WILLAMETTE,SSE2,SO
-PADDB xmmreg,xmmrm \361\2\x0F\xFC\110 WILLAMETTE,SSE2,SO
-PADDW xmmreg,xmmrm \361\2\x0F\xFD\110 WILLAMETTE,SSE2,SO
-PADDD xmmreg,xmmrm \361\2\x0F\xFE\110 WILLAMETTE,SSE2,SO
-PADDQ mmxreg,mmxrm \360\2\x0F\xD4\110 WILLAMETTE,MMX,SQ
-PADDQ xmmreg,xmmrm \361\2\x0F\xD4\110 WILLAMETTE,SSE2,SO
-PADDSB xmmreg,xmmrm \361\2\x0F\xEC\110 WILLAMETTE,SSE2,SO
-PADDSW xmmreg,xmmrm \361\2\x0F\xED\110 WILLAMETTE,SSE2,SO
-PADDUSB xmmreg,xmmrm \361\2\x0F\xDC\110 WILLAMETTE,SSE2,SO
-PADDUSW xmmreg,xmmrm \361\2\x0F\xDD\110 WILLAMETTE,SSE2,SO
-PAND xmmreg,xmmrm \361\2\x0F\xDB\110 WILLAMETTE,SSE2,SO
-PANDN xmmreg,xmmrm \361\2\x0F\xDF\110 WILLAMETTE,SSE2,SO
-PAVGB xmmreg,xmmrm \361\2\x0F\xE0\110 WILLAMETTE,SSE2,SO
-PAVGW xmmreg,xmmrm \361\2\x0F\xE3\110 WILLAMETTE,SSE2,SO
-PCMPEQB xmmreg,xmmrm \361\2\x0F\x74\110 WILLAMETTE,SSE2,SO
-PCMPEQW xmmreg,xmmrm \361\2\x0F\x75\110 WILLAMETTE,SSE2,SO
-PCMPEQD xmmreg,xmmrm \361\2\x0F\x76\110 WILLAMETTE,SSE2,SO
-PCMPGTB xmmreg,xmmrm \361\2\x0F\x64\110 WILLAMETTE,SSE2,SO
-PCMPGTW xmmreg,xmmrm \361\2\x0F\x65\110 WILLAMETTE,SSE2,SO
-PCMPGTD xmmreg,xmmrm \361\2\x0F\x66\110 WILLAMETTE,SSE2,SO
-PEXTRW reg32,xmmreg,imm \361\2\x0F\xC5\110\26 WILLAMETTE,SSE2,SB,AR2
-PINSRW xmmreg,reg16,imm \361\2\x0F\xC4\110\26 WILLAMETTE,SSE2,SB,AR2
-PINSRW xmmreg,reg32,imm \361\2\x0F\xC4\110\26 WILLAMETTE,SSE2,SB,AR2,ND
-PINSRW xmmreg,mem,imm \361\2\x0F\xC4\110\26 WILLAMETTE,SSE2,SB,AR2
-PINSRW xmmreg,mem16,imm \361\2\x0F\xC4\110\26 WILLAMETTE,SSE2,SB,AR2
-PMADDWD xmmreg,xmmrm \361\2\x0F\xF5\110 WILLAMETTE,SSE2,SO
-PMAXSW xmmreg,xmmrm \361\2\x0F\xEE\110 WILLAMETTE,SSE2,SO
-PMAXUB xmmreg,xmmrm \361\2\x0F\xDE\110 WILLAMETTE,SSE2,SO
-PMINSW xmmreg,xmmrm \361\2\x0F\xEA\110 WILLAMETTE,SSE2,SO
-PMINUB xmmreg,xmmrm \361\2\x0F\xDA\110 WILLAMETTE,SSE2,SO
-PMOVMSKB reg32,xmmreg \361\2\x0F\xD7\110 WILLAMETTE,SSE2
-PMULHUW xmmreg,xmmrm \361\2\x0F\xE4\110 WILLAMETTE,SSE2,SO
-PMULHW xmmreg,xmmrm \361\2\x0F\xE5\110 WILLAMETTE,SSE2,SO
-PMULLW xmmreg,xmmrm \361\2\x0F\xD5\110 WILLAMETTE,SSE2,SO
-PMULUDQ mmxreg,mmxrm \360\323\2\x0F\xF4\110 WILLAMETTE,SSE2,SO
-PMULUDQ xmmreg,xmmrm \361\2\x0F\xF4\110 WILLAMETTE,SSE2,SO
-POR xmmreg,xmmrm \361\2\x0F\xEB\110 WILLAMETTE,SSE2,SO
-PSADBW xmmreg,xmmrm \361\2\x0F\xF6\110 WILLAMETTE,SSE2,SO
-PSHUFD xmmreg,xmmreg,imm \361\2\x0F\x70\110\22 WILLAMETTE,SSE2,SB,AR2
-PSHUFD xmmreg,mem,imm \361\2\x0F\x70\110\22 WILLAMETTE,SSE2,SM2,SB,AR2
-PSHUFHW xmmreg,xmmreg,imm \363\2\x0F\x70\110\22 WILLAMETTE,SSE2,SB,AR2
-PSHUFHW xmmreg,mem,imm \363\2\x0F\x70\110\22 WILLAMETTE,SSE2,SM2,SB,AR2
-PSHUFLW xmmreg,xmmreg,imm \362\2\x0F\x70\110\22 WILLAMETTE,SSE2,SB,AR2
-PSHUFLW xmmreg,mem,imm \362\2\x0F\x70\110\22 WILLAMETTE,SSE2,SM2,SB,AR2
-PSLLDQ xmmreg,imm \361\2\x0F\x73\207\25 WILLAMETTE,SSE2,SB,AR1
-PSLLW xmmreg,xmmrm \361\2\x0F\xF1\110 WILLAMETTE,SSE2,SO
-PSLLW xmmreg,imm \361\2\x0F\x71\206\25 WILLAMETTE,SSE2,SB,AR1
-PSLLD xmmreg,xmmrm \361\2\x0F\xF2\110 WILLAMETTE,SSE2,SO
-PSLLD xmmreg,imm \361\2\x0F\x72\206\25 WILLAMETTE,SSE2,SB,AR1
-PSLLQ xmmreg,xmmrm \361\2\x0F\xF3\110 WILLAMETTE,SSE2,SO
-PSLLQ xmmreg,imm \361\2\x0F\x73\206\25 WILLAMETTE,SSE2,SB,AR1
-PSRAW xmmreg,xmmrm \361\2\x0F\xE1\110 WILLAMETTE,SSE2,SO
-PSRAW xmmreg,imm \361\2\x0F\x71\204\25 WILLAMETTE,SSE2,SB,AR1
-PSRAD xmmreg,xmmrm \361\2\x0F\xE2\110 WILLAMETTE,SSE2,SO
-PSRAD xmmreg,imm \361\2\x0F\x72\204\25 WILLAMETTE,SSE2,SB,AR1
-PSRLDQ xmmreg,imm \361\2\x0F\x73\203\25 WILLAMETTE,SSE2,SB,AR1
-PSRLW xmmreg,xmmrm \361\2\x0F\xD1\110 WILLAMETTE,SSE2,SO
-PSRLW xmmreg,imm \361\2\x0F\x71\202\25 WILLAMETTE,SSE2,SB,AR1
-PSRLD xmmreg,xmmrm \361\2\x0F\xD2\110 WILLAMETTE,SSE2,SO
-PSRLD xmmreg,imm \361\2\x0F\x72\202\25 WILLAMETTE,SSE2,SB,AR1
-PSRLQ xmmreg,xmmrm \361\2\x0F\xD3\110 WILLAMETTE,SSE2,SO
-PSRLQ xmmreg,imm \361\2\x0F\x73\202\25 WILLAMETTE,SSE2,SB,AR1
-PSUBB xmmreg,xmmrm \361\2\x0F\xF8\110 WILLAMETTE,SSE2,SO
-PSUBW xmmreg,xmmrm \361\2\x0F\xF9\110 WILLAMETTE,SSE2,SO
-PSUBD xmmreg,xmmrm \361\2\x0F\xFA\110 WILLAMETTE,SSE2,SO
-PSUBQ mmxreg,mmxrm \360\323\2\x0F\xFB\110 WILLAMETTE,SSE2,SO
-PSUBQ xmmreg,xmmrm \361\2\x0F\xFB\110 WILLAMETTE,SSE2,SO
-PSUBSB xmmreg,xmmrm \361\2\x0F\xE8\110 WILLAMETTE,SSE2,SO
-PSUBSW xmmreg,xmmrm \361\2\x0F\xE9\110 WILLAMETTE,SSE2,SO
-PSUBUSB xmmreg,xmmrm \361\2\x0F\xD8\110 WILLAMETTE,SSE2,SO
-PSUBUSW xmmreg,xmmrm \361\2\x0F\xD9\110 WILLAMETTE,SSE2,SO
-PUNPCKHBW xmmreg,xmmrm \361\2\x0F\x68\110 WILLAMETTE,SSE2,SO
-PUNPCKHWD xmmreg,xmmrm \361\2\x0F\x69\110 WILLAMETTE,SSE2,SO
-PUNPCKHDQ xmmreg,xmmrm \361\2\x0F\x6A\110 WILLAMETTE,SSE2,SO
-PUNPCKHQDQ xmmreg,xmmrm \361\2\x0F\x6D\110 WILLAMETTE,SSE2,SO
-PUNPCKLBW xmmreg,xmmrm \361\2\x0F\x60\110 WILLAMETTE,SSE2,SO
-PUNPCKLWD xmmreg,xmmrm \361\2\x0F\x61\110 WILLAMETTE,SSE2,SO
-PUNPCKLDQ xmmreg,xmmrm \361\2\x0F\x62\110 WILLAMETTE,SSE2,SO
-PUNPCKLQDQ xmmreg,xmmrm \361\2\x0F\x6C\110 WILLAMETTE,SSE2,SO
-PXOR xmmreg,xmmrm \361\2\x0F\xEF\110 WILLAMETTE,SSE2,SO
+MOVD mem,xmmreg [mr: 66 norexw 0f 7e /r] WILLAMETTE,SSE2,SD
+MOVD xmmreg,mem [rm: 66 norexw 0f 6e /r] WILLAMETTE,SSE2,SD
+MOVD xmmreg,rm32 [rm: 66 norexw 0f 6e /r] WILLAMETTE,SSE2
+MOVD rm32,xmmreg [mr: 66 norexw 0f 7e /r] WILLAMETTE,SSE2
+MOVDQA xmmreg,xmmreg [rm: 66 0f 6f /r] WILLAMETTE,SSE2
+MOVDQA mem,xmmreg [mr: 66 0f 7f /r] WILLAMETTE,SSE2,SO
+MOVDQA xmmreg,mem [rm: 66 0f 6f /r] WILLAMETTE,SSE2,SO
+MOVDQA xmmreg,xmmreg [mr: 66 0f 7f /r] WILLAMETTE,SSE2
+MOVDQU xmmreg,xmmreg [rm: f3 0f 6f /r] WILLAMETTE,SSE2
+MOVDQU mem,xmmreg [mr: f3 0f 7f /r] WILLAMETTE,SSE2,SO
+MOVDQU xmmreg,mem [rm: f3 0f 6f /r] WILLAMETTE,SSE2,SO
+MOVDQU xmmreg,xmmreg [mr: f3 0f 7f /r] WILLAMETTE,SSE2
+MOVDQ2Q mmxreg,xmmreg [rm: f2 0f d6 /r] WILLAMETTE,SSE2
+MOVQ xmmreg,xmmreg [rm: f3 0f 7e /r] WILLAMETTE,SSE2
+MOVQ xmmreg,xmmreg [mr: 66 0f d6 /r] WILLAMETTE,SSE2
+MOVQ mem,xmmreg [mr: 66 0f d6 /r] WILLAMETTE,SSE2,SQ
+MOVQ xmmreg,mem [rm: f3 0f 7e /r] WILLAMETTE,SSE2,SQ
+MOVQ xmmreg,rm64 [rm: 66 o64 0f 6e /r] X64,SSE2
+MOVQ rm64,xmmreg [mr: 66 o64 0f 7e /r] X64,SSE2
+MOVQ2DQ xmmreg,mmxreg [rm: f3 0f d6 /r] WILLAMETTE,SSE2
+PACKSSWB xmmreg,xmmrm [rm: 66 0f 63 /r] WILLAMETTE,SSE2,SO
+PACKSSDW xmmreg,xmmrm [rm: 66 0f 6b /r] WILLAMETTE,SSE2,SO
+PACKUSWB xmmreg,xmmrm [rm: 66 0f 67 /r] WILLAMETTE,SSE2,SO
+PADDB xmmreg,xmmrm [rm: 66 0f fc /r] WILLAMETTE,SSE2,SO
+PADDW xmmreg,xmmrm [rm: 66 0f fd /r] WILLAMETTE,SSE2,SO
+PADDD xmmreg,xmmrm [rm: 66 0f fe /r] WILLAMETTE,SSE2,SO
+PADDQ mmxreg,mmxrm [rm: np 0f d4 /r] WILLAMETTE,MMX,SQ
+PADDQ xmmreg,xmmrm [rm: 66 0f d4 /r] WILLAMETTE,SSE2,SO
+PADDSB xmmreg,xmmrm [rm: 66 0f ec /r] WILLAMETTE,SSE2,SO
+PADDSW xmmreg,xmmrm [rm: 66 0f ed /r] WILLAMETTE,SSE2,SO
+PADDUSB xmmreg,xmmrm [rm: 66 0f dc /r] WILLAMETTE,SSE2,SO
+PADDUSW xmmreg,xmmrm [rm: 66 0f dd /r] WILLAMETTE,SSE2,SO
+PAND xmmreg,xmmrm [rm: 66 0f db /r] WILLAMETTE,SSE2,SO
+PANDN xmmreg,xmmrm [rm: 66 0f df /r] WILLAMETTE,SSE2,SO
+PAVGB xmmreg,xmmrm [rm: 66 0f e0 /r] WILLAMETTE,SSE2,SO
+PAVGW xmmreg,xmmrm [rm: 66 0f e3 /r] WILLAMETTE,SSE2,SO
+PCMPEQB xmmreg,xmmrm [rm: 66 0f 74 /r] WILLAMETTE,SSE2,SO
+PCMPEQW xmmreg,xmmrm [rm: 66 0f 75 /r] WILLAMETTE,SSE2,SO
+PCMPEQD xmmreg,xmmrm [rm: 66 0f 76 /r] WILLAMETTE,SSE2,SO
+PCMPGTB xmmreg,xmmrm [rm: 66 0f 64 /r] WILLAMETTE,SSE2,SO
+PCMPGTW xmmreg,xmmrm [rm: 66 0f 65 /r] WILLAMETTE,SSE2,SO
+PCMPGTD xmmreg,xmmrm [rm: 66 0f 66 /r] WILLAMETTE,SSE2,SO
+PEXTRW reg32,xmmreg,imm [rmi: 66 0f c5 /r ib,u] WILLAMETTE,SSE2,SB,AR2
+PINSRW xmmreg,reg16,imm [rmi: 66 0f c4 /r ib,u] WILLAMETTE,SSE2,SB,AR2
+PINSRW xmmreg,reg32,imm [rmi: 66 0f c4 /r ib,u] WILLAMETTE,SSE2,SB,AR2,ND
+PINSRW xmmreg,mem,imm [rmi: 66 0f c4 /r ib,u] WILLAMETTE,SSE2,SB,AR2
+PINSRW xmmreg,mem16,imm [rmi: 66 0f c4 /r ib,u] WILLAMETTE,SSE2,SB,AR2
+PMADDWD xmmreg,xmmrm [rm: 66 0f f5 /r] WILLAMETTE,SSE2,SO
+PMAXSW xmmreg,xmmrm [rm: 66 0f ee /r] WILLAMETTE,SSE2,SO
+PMAXUB xmmreg,xmmrm [rm: 66 0f de /r] WILLAMETTE,SSE2,SO
+PMINSW xmmreg,xmmrm [rm: 66 0f ea /r] WILLAMETTE,SSE2,SO
+PMINUB xmmreg,xmmrm [rm: 66 0f da /r] WILLAMETTE,SSE2,SO
+PMOVMSKB reg32,xmmreg [rm: 66 0f d7 /r] WILLAMETTE,SSE2
+PMULHUW xmmreg,xmmrm [rm: 66 0f e4 /r] WILLAMETTE,SSE2,SO
+PMULHW xmmreg,xmmrm [rm: 66 0f e5 /r] WILLAMETTE,SSE2,SO
+PMULLW xmmreg,xmmrm [rm: 66 0f d5 /r] WILLAMETTE,SSE2,SO
+PMULUDQ mmxreg,mmxrm [rm: np o64nw 0f f4 /r] WILLAMETTE,SSE2,SO
+PMULUDQ xmmreg,xmmrm [rm: 66 0f f4 /r] WILLAMETTE,SSE2,SO
+POR xmmreg,xmmrm [rm: 66 0f eb /r] WILLAMETTE,SSE2,SO
+PSADBW xmmreg,xmmrm [rm: 66 0f f6 /r] WILLAMETTE,SSE2,SO
+PSHUFD xmmreg,xmmreg,imm [rmi: 66 0f 70 /r ib] WILLAMETTE,SSE2,SB,AR2
+PSHUFD xmmreg,mem,imm [rmi: 66 0f 70 /r ib] WILLAMETTE,SSE2,SM2,SB,AR2
+PSHUFHW xmmreg,xmmreg,imm [rmi: f3 0f 70 /r ib] WILLAMETTE,SSE2,SB,AR2
+PSHUFHW xmmreg,mem,imm [rmi: f3 0f 70 /r ib] WILLAMETTE,SSE2,SM2,SB,AR2
+PSHUFLW xmmreg,xmmreg,imm [rmi: f2 0f 70 /r ib] WILLAMETTE,SSE2,SB,AR2
+PSHUFLW xmmreg,mem,imm [rmi: f2 0f 70 /r ib] WILLAMETTE,SSE2,SM2,SB,AR2
+PSLLDQ xmmreg,imm [mi: 66 0f 73 /7 ib,u] WILLAMETTE,SSE2,SB,AR1
+PSLLW xmmreg,xmmrm [rm: 66 0f f1 /r] WILLAMETTE,SSE2,SO
+PSLLW xmmreg,imm [mi: 66 0f 71 /6 ib,u] WILLAMETTE,SSE2,SB,AR1
+PSLLD xmmreg,xmmrm [rm: 66 0f f2 /r] WILLAMETTE,SSE2,SO
+PSLLD xmmreg,imm [mi: 66 0f 72 /6 ib,u] WILLAMETTE,SSE2,SB,AR1
+PSLLQ xmmreg,xmmrm [rm: 66 0f f3 /r] WILLAMETTE,SSE2,SO
+PSLLQ xmmreg,imm [mi: 66 0f 73 /6 ib,u] WILLAMETTE,SSE2,SB,AR1
+PSRAW xmmreg,xmmrm [rm: 66 0f e1 /r] WILLAMETTE,SSE2,SO
+PSRAW xmmreg,imm [mi: 66 0f 71 /4 ib,u] WILLAMETTE,SSE2,SB,AR1
+PSRAD xmmreg,xmmrm [rm: 66 0f e2 /r] WILLAMETTE,SSE2,SO
+PSRAD xmmreg,imm [mi: 66 0f 72 /4 ib,u] WILLAMETTE,SSE2,SB,AR1
+PSRLDQ xmmreg,imm [mi: 66 0f 73 /3 ib,u] WILLAMETTE,SSE2,SB,AR1
+PSRLW xmmreg,xmmrm [rm: 66 0f d1 /r] WILLAMETTE,SSE2,SO
+PSRLW xmmreg,imm [mi: 66 0f 71 /2 ib,u] WILLAMETTE,SSE2,SB,AR1
+PSRLD xmmreg,xmmrm [rm: 66 0f d2 /r] WILLAMETTE,SSE2,SO
+PSRLD xmmreg,imm [mi: 66 0f 72 /2 ib,u] WILLAMETTE,SSE2,SB,AR1
+PSRLQ xmmreg,xmmrm [rm: 66 0f d3 /r] WILLAMETTE,SSE2,SO
+PSRLQ xmmreg,imm [mi: 66 0f 73 /2 ib,u] WILLAMETTE,SSE2,SB,AR1
+PSUBB xmmreg,xmmrm [rm: 66 0f f8 /r] WILLAMETTE,SSE2,SO
+PSUBW xmmreg,xmmrm [rm: 66 0f f9 /r] WILLAMETTE,SSE2,SO
+PSUBD xmmreg,xmmrm [rm: 66 0f fa /r] WILLAMETTE,SSE2,SO
+PSUBQ mmxreg,mmxrm [rm: np o64nw 0f fb /r] WILLAMETTE,SSE2,SO
+PSUBQ xmmreg,xmmrm [rm: 66 0f fb /r] WILLAMETTE,SSE2,SO
+PSUBSB xmmreg,xmmrm [rm: 66 0f e8 /r] WILLAMETTE,SSE2,SO
+PSUBSW xmmreg,xmmrm [rm: 66 0f e9 /r] WILLAMETTE,SSE2,SO
+PSUBUSB xmmreg,xmmrm [rm: 66 0f d8 /r] WILLAMETTE,SSE2,SO
+PSUBUSW xmmreg,xmmrm [rm: 66 0f d9 /r] WILLAMETTE,SSE2,SO
+PUNPCKHBW xmmreg,xmmrm [rm: 66 0f 68 /r] WILLAMETTE,SSE2,SO
+PUNPCKHWD xmmreg,xmmrm [rm: 66 0f 69 /r] WILLAMETTE,SSE2,SO
+PUNPCKHDQ xmmreg,xmmrm [rm: 66 0f 6a /r] WILLAMETTE,SSE2,SO
+PUNPCKHQDQ xmmreg,xmmrm [rm: 66 0f 6d /r] WILLAMETTE,SSE2,SO
+PUNPCKLBW xmmreg,xmmrm [rm: 66 0f 60 /r] WILLAMETTE,SSE2,SO
+PUNPCKLWD xmmreg,xmmrm [rm: 66 0f 61 /r] WILLAMETTE,SSE2,SO
+PUNPCKLDQ xmmreg,xmmrm [rm: 66 0f 62 /r] WILLAMETTE,SSE2,SO
+PUNPCKLQDQ xmmreg,xmmrm [rm: 66 0f 6c /r] WILLAMETTE,SSE2,SO
+PXOR xmmreg,xmmrm [rm: 66 0f ef /r] WILLAMETTE,SSE2,SO
;# Willamette Streaming SIMD instructions (SSE2)
-ADDPD xmmreg,xmmrm \361\2\x0F\x58\110 WILLAMETTE,SSE2,SO
-ADDSD xmmreg,xmmrm \362\2\x0F\x58\110 WILLAMETTE,SSE2,SQ
-ANDNPD xmmreg,xmmrm \361\2\x0F\x55\110 WILLAMETTE,SSE2,SO
-ANDPD xmmreg,xmmrm \361\2\x0F\x54\110 WILLAMETTE,SSE2,SO
-CMPEQPD xmmreg,xmmrm \361\2\x0F\xC2\110\1\x00 WILLAMETTE,SSE2,SO
-CMPEQSD xmmreg,xmmrm \362\2\x0F\xC2\110\1\x00 WILLAMETTE,SSE2
-CMPLEPD xmmreg,xmmrm \361\2\x0F\xC2\110\1\x02 WILLAMETTE,SSE2,SO
-CMPLESD xmmreg,xmmrm \362\2\x0F\xC2\110\1\x02 WILLAMETTE,SSE2
-CMPLTPD xmmreg,xmmrm \361\2\x0F\xC2\110\1\x01 WILLAMETTE,SSE2,SO
-CMPLTSD xmmreg,xmmrm \362\2\x0F\xC2\110\1\x01 WILLAMETTE,SSE2
-CMPNEQPD xmmreg,xmmrm \361\2\x0F\xC2\110\1\x04 WILLAMETTE,SSE2,SO
-CMPNEQSD xmmreg,xmmrm \362\2\x0F\xC2\110\1\x04 WILLAMETTE,SSE2
-CMPNLEPD xmmreg,xmmrm \361\2\x0F\xC2\110\1\x06 WILLAMETTE,SSE2,SO
-CMPNLESD xmmreg,xmmrm \362\2\x0F\xC2\110\1\x06 WILLAMETTE,SSE2
-CMPNLTPD xmmreg,xmmrm \361\2\x0F\xC2\110\1\x05 WILLAMETTE,SSE2,SO
-CMPNLTSD xmmreg,xmmrm \362\2\x0F\xC2\110\1\x05 WILLAMETTE,SSE2
-CMPORDPD xmmreg,xmmrm \361\2\x0F\xC2\110\1\x07 WILLAMETTE,SSE2,SO
-CMPORDSD xmmreg,xmmrm \362\2\x0F\xC2\110\1\x07 WILLAMETTE,SSE2
-CMPUNORDPD xmmreg,xmmrm \361\2\x0F\xC2\110\1\x03 WILLAMETTE,SSE2,SO
-CMPUNORDSD xmmreg,xmmrm \362\2\x0F\xC2\110\1\x03 WILLAMETTE,SSE2
+ADDPD xmmreg,xmmrm [rm: 66 0f 58 /r] WILLAMETTE,SSE2,SO
+ADDSD xmmreg,xmmrm [rm: f2 0f 58 /r] WILLAMETTE,SSE2,SQ
+ANDNPD xmmreg,xmmrm [rm: 66 0f 55 /r] WILLAMETTE,SSE2,SO
+ANDPD xmmreg,xmmrm [rm: 66 0f 54 /r] WILLAMETTE,SSE2,SO
+CMPEQPD xmmreg,xmmrm [rm: 66 0f c2 /r 00] WILLAMETTE,SSE2,SO
+CMPEQSD xmmreg,xmmrm [rm: f2 0f c2 /r 00] WILLAMETTE,SSE2
+CMPLEPD xmmreg,xmmrm [rm: 66 0f c2 /r 02] WILLAMETTE,SSE2,SO
+CMPLESD xmmreg,xmmrm [rm: f2 0f c2 /r 02] WILLAMETTE,SSE2
+CMPLTPD xmmreg,xmmrm [rm: 66 0f c2 /r 01] WILLAMETTE,SSE2,SO
+CMPLTSD xmmreg,xmmrm [rm: f2 0f c2 /r 01] WILLAMETTE,SSE2
+CMPNEQPD xmmreg,xmmrm [rm: 66 0f c2 /r 04] WILLAMETTE,SSE2,SO
+CMPNEQSD xmmreg,xmmrm [rm: f2 0f c2 /r 04] WILLAMETTE,SSE2
+CMPNLEPD xmmreg,xmmrm [rm: 66 0f c2 /r 06] WILLAMETTE,SSE2,SO
+CMPNLESD xmmreg,xmmrm [rm: f2 0f c2 /r 06] WILLAMETTE,SSE2
+CMPNLTPD xmmreg,xmmrm [rm: 66 0f c2 /r 05] WILLAMETTE,SSE2,SO
+CMPNLTSD xmmreg,xmmrm [rm: f2 0f c2 /r 05] WILLAMETTE,SSE2
+CMPORDPD xmmreg,xmmrm [rm: 66 0f c2 /r 07] WILLAMETTE,SSE2,SO
+CMPORDSD xmmreg,xmmrm [rm: f2 0f c2 /r 07] WILLAMETTE,SSE2
+CMPUNORDPD xmmreg,xmmrm [rm: 66 0f c2 /r 03] WILLAMETTE,SSE2,SO
+CMPUNORDSD xmmreg,xmmrm [rm: f2 0f c2 /r 03] WILLAMETTE,SSE2
; CMPPD/CMPSD must come after the specific ops; that way the disassembler will find the
; specific ops first and only disassemble illegal ones as cmppd/cmpsd.
-CMPPD xmmreg,xmmrm,imm \361\2\x0F\xC2\110\26 WILLAMETTE,SSE2,SM2,SB,AR2
-CMPSD xmmreg,xmmrm,imm \362\2\x0F\xC2\110\26 WILLAMETTE,SSE2,SB,AR2
-COMISD xmmreg,xmmrm \361\2\x0F\x2F\110 WILLAMETTE,SSE2
-CVTDQ2PD xmmreg,xmmrm \363\2\x0F\xE6\110 WILLAMETTE,SSE2,SQ
-CVTDQ2PS xmmreg,xmmrm \360\2\x0F\x5B\110 WILLAMETTE,SSE2,SO
-CVTPD2DQ xmmreg,xmmrm \362\2\x0F\xE6\110 WILLAMETTE,SSE2,SO
-CVTPD2PI mmxreg,xmmrm \361\2\x0F\x2D\110 WILLAMETTE,SSE2,SO
-CVTPD2PS xmmreg,xmmrm \361\2\x0F\x5A\110 WILLAMETTE,SSE2,SO
-CVTPI2PD xmmreg,mmxrm \361\2\x0F\x2A\110 WILLAMETTE,SSE2,SQ
-CVTPS2DQ xmmreg,xmmrm \361\2\x0F\x5B\110 WILLAMETTE,SSE2,SO
-CVTPS2PD xmmreg,xmmrm \360\2\x0F\x5A\110 WILLAMETTE,SSE2,SQ
-CVTSD2SI reg32,xmmreg \362\2\x0F\x2D\110 WILLAMETTE,SSE2,SQ,AR1
-CVTSD2SI reg32,mem \362\2\x0F\x2D\110 WILLAMETTE,SSE2,SQ,AR1
-CVTSD2SI reg64,xmmreg \324\362\2\x0F\x2D\110 X64,SSE2,SQ,AR1
-CVTSD2SI reg64,mem \324\362\2\x0F\x2D\110 X64,SSE2,SQ,AR1
-CVTSD2SS xmmreg,xmmrm \362\2\x0F\x5A\110 WILLAMETTE,SSE2,SQ
-CVTSI2SD xmmreg,mem \362\2\x0F\x2A\110 WILLAMETTE,SSE2,SD,AR1,ND
-CVTSI2SD xmmreg,rm32 \362\2\x0F\x2A\110 WILLAMETTE,SSE2,SD,AR1
-CVTSI2SD xmmreg,rm64 \324\362\2\x0F\x2A\110 X64,SSE2,SQ,AR1
-CVTSS2SD xmmreg,xmmrm \363\2\x0F\x5A\110 WILLAMETTE,SSE2,SD
-CVTTPD2PI mmxreg,xmmrm \361\2\x0F\x2C\110 WILLAMETTE,SSE2,SO
-CVTTPD2DQ xmmreg,xmmrm \361\2\x0F\xE6\110 WILLAMETTE,SSE2,SO
-CVTTPS2DQ xmmreg,xmmrm \363\2\x0F\x5B\110 WILLAMETTE,SSE2,SO
-CVTTSD2SI reg32,xmmreg \362\2\x0F\x2C\110 WILLAMETTE,SSE2,SQ,AR1
-CVTTSD2SI reg32,mem \362\2\x0F\x2C\110 WILLAMETTE,SSE2,SQ,AR1
-CVTTSD2SI reg64,xmmreg \324\362\2\x0F\x2C\110 X64,SSE2,SQ,AR1
-CVTTSD2SI reg64,mem \324\362\2\x0F\x2C\110 X64,SSE2,SQ,AR1
-DIVPD xmmreg,xmmrm \361\2\x0F\x5E\110 WILLAMETTE,SSE2,SO
-DIVSD xmmreg,xmmrm \362\2\x0F\x5E\110 WILLAMETTE,SSE2
-MAXPD xmmreg,xmmrm \361\2\x0F\x5F\110 WILLAMETTE,SSE2,SO
-MAXSD xmmreg,xmmrm \362\2\x0F\x5F\110 WILLAMETTE,SSE2
-MINPD xmmreg,xmmrm \361\2\x0F\x5D\110 WILLAMETTE,SSE2,SO
-MINSD xmmreg,xmmrm \362\2\x0F\x5D\110 WILLAMETTE,SSE2
-MOVAPD xmmreg,xmmreg \361\2\x0F\x28\110 WILLAMETTE,SSE2
-MOVAPD xmmreg,xmmreg \361\2\x0F\x29\101 WILLAMETTE,SSE2
-MOVAPD mem,xmmreg \361\2\x0F\x29\101 WILLAMETTE,SSE2,SO
-MOVAPD xmmreg,mem \361\2\x0F\x28\110 WILLAMETTE,SSE2,SO
-MOVHPD mem,xmmreg \361\2\x0F\x17\101 WILLAMETTE,SSE2
-MOVHPD xmmreg,mem \361\2\x0F\x16\110 WILLAMETTE,SSE2
-MOVLPD mem,xmmreg \361\2\x0F\x13\101 WILLAMETTE,SSE2
-MOVLPD xmmreg,mem \361\2\x0F\x12\110 WILLAMETTE,SSE2
-MOVMSKPD reg32,xmmreg \361\2\x0F\x50\110 WILLAMETTE,SSE2
-MOVMSKPD reg64,xmmreg \361\324\2\x0F\x50\110 X64,SSE2
-MOVSD xmmreg,xmmreg \362\2\x0F\x10\110 WILLAMETTE,SSE2
-MOVSD xmmreg,xmmreg \362\2\x0F\x11\101 WILLAMETTE,SSE2
-MOVSD mem,xmmreg \362\2\x0F\x11\101 WILLAMETTE,SSE2
-MOVSD xmmreg,mem \362\2\x0F\x10\110 WILLAMETTE,SSE2
-MOVUPD xmmreg,xmmreg \361\2\x0F\x10\110 WILLAMETTE,SSE2
-MOVUPD xmmreg,xmmreg \361\2\x0F\x11\101 WILLAMETTE,SSE2
-MOVUPD mem,xmmreg \361\2\x0F\x11\101 WILLAMETTE,SSE2,SO
-MOVUPD xmmreg,mem \361\2\x0F\x10\110 WILLAMETTE,SSE2,SO
-MULPD xmmreg,xmmrm \361\2\x0F\x59\110 WILLAMETTE,SSE2,SO
-MULSD xmmreg,xmmrm \362\2\x0F\x59\110 WILLAMETTE,SSE2
-ORPD xmmreg,xmmrm \361\2\x0F\x56\110 WILLAMETTE,SSE2,SO
-SHUFPD xmmreg,xmmreg,imm \361\2\x0F\xC6\110\26 WILLAMETTE,SSE2,SB,AR2
-SHUFPD xmmreg,mem,imm \361\2\x0F\xC6\110\26 WILLAMETTE,SSE2,SM,SB,AR2
-SQRTPD xmmreg,xmmrm \361\2\x0F\x51\110 WILLAMETTE,SSE2,SO
-SQRTSD xmmreg,xmmrm \362\2\x0F\x51\110 WILLAMETTE,SSE2
-SUBPD xmmreg,xmmrm \361\2\x0F\x5C\110 WILLAMETTE,SSE2,SO
-SUBSD xmmreg,xmmrm \362\2\x0F\x5C\110 WILLAMETTE,SSE2
-UCOMISD xmmreg,xmmrm \361\2\x0F\x2E\110 WILLAMETTE,SSE2
-UNPCKHPD xmmreg,xmmrm \361\2\x0F\x15\110 WILLAMETTE,SSE2,SO
-UNPCKLPD xmmreg,xmmrm \361\2\x0F\x14\110 WILLAMETTE,SSE2,SO
-XORPD xmmreg,xmmrm \361\2\x0F\x57\110 WILLAMETTE,SSE2,SO
+CMPPD xmmreg,xmmrm128,imm8 [rmi: 66 0f c2 /r ib,u] WILLAMETTE,SSE2
+CMPSD xmmreg,xmmrm128,imm8 [rmi: f2 0f c2 /r ib,u] WILLAMETTE,SSE2
+COMISD xmmreg,xmmrm [rm: 66 0f 2f /r] WILLAMETTE,SSE2
+CVTDQ2PD xmmreg,xmmrm [rm: f3 0f e6 /r] WILLAMETTE,SSE2,SQ
+CVTDQ2PS xmmreg,xmmrm [rm: np 0f 5b /r] WILLAMETTE,SSE2,SO
+CVTPD2DQ xmmreg,xmmrm [rm: f2 0f e6 /r] WILLAMETTE,SSE2,SO
+CVTPD2PI mmxreg,xmmrm [rm: 66 0f 2d /r] WILLAMETTE,SSE2,SO
+CVTPD2PS xmmreg,xmmrm [rm: 66 0f 5a /r] WILLAMETTE,SSE2,SO
+CVTPI2PD xmmreg,mmxrm [rm: 66 0f 2a /r] WILLAMETTE,SSE2,SQ
+CVTPS2DQ xmmreg,xmmrm [rm: 66 0f 5b /r] WILLAMETTE,SSE2,SO
+CVTPS2PD xmmreg,xmmrm [rm: np 0f 5a /r] WILLAMETTE,SSE2,SQ
+CVTSD2SI reg32,xmmreg [rm: f2 0f 2d /r] WILLAMETTE,SSE2,SQ,AR1
+CVTSD2SI reg32,mem [rm: f2 0f 2d /r] WILLAMETTE,SSE2,SQ,AR1
+CVTSD2SI reg64,xmmreg [rm: o64 f2 0f 2d /r] X64,SSE2,SQ,AR1
+CVTSD2SI reg64,mem [rm: o64 f2 0f 2d /r] X64,SSE2,SQ,AR1
+CVTSD2SS xmmreg,xmmrm [rm: f2 0f 5a /r] WILLAMETTE,SSE2,SQ
+CVTSI2SD xmmreg,mem [rm: f2 0f 2a /r] WILLAMETTE,SSE2,SD,AR1,ND
+CVTSI2SD xmmreg,rm32 [rm: f2 0f 2a /r] WILLAMETTE,SSE2,SD,AR1
+CVTSI2SD xmmreg,rm64 [rm: o64 f2 0f 2a /r] X64,SSE2,SQ,AR1
+CVTSS2SD xmmreg,xmmrm [rm: f3 0f 5a /r] WILLAMETTE,SSE2,SD
+CVTTPD2PI mmxreg,xmmrm [rm: 66 0f 2c /r] WILLAMETTE,SSE2,SO
+CVTTPD2DQ xmmreg,xmmrm [rm: 66 0f e6 /r] WILLAMETTE,SSE2,SO
+CVTTPS2DQ xmmreg,xmmrm [rm: f3 0f 5b /r] WILLAMETTE,SSE2,SO
+CVTTSD2SI reg32,xmmreg [rm: f2 0f 2c /r] WILLAMETTE,SSE2,SQ,AR1
+CVTTSD2SI reg32,mem [rm: f2 0f 2c /r] WILLAMETTE,SSE2,SQ,AR1
+CVTTSD2SI reg64,xmmreg [rm: o64 f2 0f 2c /r] X64,SSE2,SQ,AR1
+CVTTSD2SI reg64,mem [rm: o64 f2 0f 2c /r] X64,SSE2,SQ,AR1
+DIVPD xmmreg,xmmrm [rm: 66 0f 5e /r] WILLAMETTE,SSE2,SO
+DIVSD xmmreg,xmmrm [rm: f2 0f 5e /r] WILLAMETTE,SSE2
+MAXPD xmmreg,xmmrm [rm: 66 0f 5f /r] WILLAMETTE,SSE2,SO
+MAXSD xmmreg,xmmrm [rm: f2 0f 5f /r] WILLAMETTE,SSE2
+MINPD xmmreg,xmmrm [rm: 66 0f 5d /r] WILLAMETTE,SSE2,SO
+MINSD xmmreg,xmmrm [rm: f2 0f 5d /r] WILLAMETTE,SSE2
+MOVAPD xmmreg,xmmreg [rm: 66 0f 28 /r] WILLAMETTE,SSE2
+MOVAPD xmmreg,xmmreg [mr: 66 0f 29 /r] WILLAMETTE,SSE2
+MOVAPD mem,xmmreg [mr: 66 0f 29 /r] WILLAMETTE,SSE2,SO
+MOVAPD xmmreg,mem [rm: 66 0f 28 /r] WILLAMETTE,SSE2,SO
+MOVHPD mem,xmmreg [mr: 66 0f 17 /r] WILLAMETTE,SSE2
+MOVHPD xmmreg,mem [rm: 66 0f 16 /r] WILLAMETTE,SSE2
+MOVLPD mem,xmmreg [mr: 66 0f 13 /r] WILLAMETTE,SSE2
+MOVLPD xmmreg,mem [rm: 66 0f 12 /r] WILLAMETTE,SSE2
+MOVMSKPD reg32,xmmreg [rm: 66 0f 50 /r] WILLAMETTE,SSE2
+MOVMSKPD reg64,xmmreg [rm: 66 o64 0f 50 /r] X64,SSE2
+MOVSD xmmreg,xmmreg [rm: f2 0f 10 /r] WILLAMETTE,SSE2
+MOVSD xmmreg,xmmreg [mr: f2 0f 11 /r] WILLAMETTE,SSE2
+MOVSD mem64,xmmreg [mr: f2 0f 11 /r] WILLAMETTE,SSE2
+MOVSD xmmreg,mem64 [rm: f2 0f 10 /r] WILLAMETTE,SSE2
+MOVUPD xmmreg,xmmreg [rm: 66 0f 10 /r] WILLAMETTE,SSE2
+MOVUPD xmmreg,xmmreg [mr: 66 0f 11 /r] WILLAMETTE,SSE2
+MOVUPD mem,xmmreg [mr: 66 0f 11 /r] WILLAMETTE,SSE2,SO
+MOVUPD xmmreg,mem [rm: 66 0f 10 /r] WILLAMETTE,SSE2,SO
+MULPD xmmreg,xmmrm [rm: 66 0f 59 /r] WILLAMETTE,SSE2,SO
+MULSD xmmreg,xmmrm [rm: f2 0f 59 /r] WILLAMETTE,SSE2
+ORPD xmmreg,xmmrm [rm: 66 0f 56 /r] WILLAMETTE,SSE2,SO
+SHUFPD xmmreg,xmmreg,imm [rmi: 66 0f c6 /r ib,u] WILLAMETTE,SSE2,SB,AR2
+SHUFPD xmmreg,mem,imm [rmi: 66 0f c6 /r ib,u] WILLAMETTE,SSE2,SM,SB,AR2
+SQRTPD xmmreg,xmmrm [rm: 66 0f 51 /r] WILLAMETTE,SSE2,SO
+SQRTSD xmmreg,xmmrm [rm: f2 0f 51 /r] WILLAMETTE,SSE2
+SUBPD xmmreg,xmmrm [rm: 66 0f 5c /r] WILLAMETTE,SSE2,SO
+SUBSD xmmreg,xmmrm [rm: f2 0f 5c /r] WILLAMETTE,SSE2
+UCOMISD xmmreg,xmmrm [rm: 66 0f 2e /r] WILLAMETTE,SSE2
+UNPCKHPD xmmreg,xmmrm128 [rm: 66 0f 15 /r] WILLAMETTE,SSE2
+UNPCKLPD xmmreg,xmmrm128 [rm: 66 0f 14 /r] WILLAMETTE,SSE2
+XORPD xmmreg,xmmrm128 [rm: 66 0f 57 /r] WILLAMETTE,SSE2
;# Prescott New Instructions (SSE3)
-ADDSUBPD xmmreg,xmmrm \361\2\x0F\xD0\110 PRESCOTT,SSE3,SO
-ADDSUBPS xmmreg,xmmrm \362\2\x0F\xD0\110 PRESCOTT,SSE3,SO
-HADDPD xmmreg,xmmrm \361\2\x0F\x7C\110 PRESCOTT,SSE3,SO
-HADDPS xmmreg,xmmrm \362\2\x0F\x7C\110 PRESCOTT,SSE3,SO
-HSUBPD xmmreg,xmmrm \361\2\x0F\x7D\110 PRESCOTT,SSE3,SO
-HSUBPS xmmreg,xmmrm \362\2\x0F\x7D\110 PRESCOTT,SSE3,SO
-LDDQU xmmreg,mem \362\2\x0F\xF0\110 PRESCOTT,SSE3,SO
-MOVDDUP xmmreg,xmmrm \362\2\x0F\x12\110 PRESCOTT,SSE3
-MOVSHDUP xmmreg,xmmrm \363\2\x0F\x16\110 PRESCOTT,SSE3
-MOVSLDUP xmmreg,xmmrm \363\2\x0F\x12\110 PRESCOTT,SSE3
+ADDSUBPD xmmreg,xmmrm [rm: 66 0f d0 /r] PRESCOTT,SSE3,SO
+ADDSUBPS xmmreg,xmmrm [rm: f2 0f d0 /r] PRESCOTT,SSE3,SO
+HADDPD xmmreg,xmmrm [rm: 66 0f 7c /r] PRESCOTT,SSE3,SO
+HADDPS xmmreg,xmmrm [rm: f2 0f 7c /r] PRESCOTT,SSE3,SO
+HSUBPD xmmreg,xmmrm [rm: 66 0f 7d /r] PRESCOTT,SSE3,SO
+HSUBPS xmmreg,xmmrm [rm: f2 0f 7d /r] PRESCOTT,SSE3,SO
+LDDQU xmmreg,mem [rm: f2 0f f0 /r] PRESCOTT,SSE3,SO
+MOVDDUP xmmreg,xmmrm [rm: f2 0f 12 /r] PRESCOTT,SSE3
+MOVSHDUP xmmreg,xmmrm [rm: f3 0f 16 /r] PRESCOTT,SSE3
+MOVSLDUP xmmreg,xmmrm [rm: f3 0f 12 /r] PRESCOTT,SSE3
;# VMX Instructions
-VMCALL void \3\x0F\x01\xC1 VMX
-VMCLEAR mem \361\2\x0F\xC7\206 VMX
-VMLAUNCH void \3\x0F\x01\xC2 VMX
-VMLOAD void \3\x0F\x01\xDA X64,VMX
-VMMCALL void \3\x0F\x01\xD9 X64,VMX
-VMPTRLD mem \2\x0F\xC7\206 VMX
-VMPTRST mem \2\x0F\xC7\207 VMX
-VMREAD rm32,reg32 \360\2\x0F\x78\101 VMX,NOLONG,SD
-VMREAD rm64,reg64 \323\360\2\x0F\x78\101 X64,VMX,SQ
-VMRESUME void \3\x0F\x01\xC3 VMX
-VMRUN void \3\x0F\x01\xD8 X64,VMX
-VMSAVE void \3\x0F\x01\xDB X64,VMX
-VMWRITE reg32,rm32 \360\2\x0F\x79\110 VMX,NOLONG,SD
-VMWRITE reg64,rm64 \323\360\2\x0F\x79\110 X64,VMX,SQ
-VMXOFF void \3\x0F\x01\xC4 VMX
-VMXON mem \363\2\x0F\xC7\206 VMX
+VMCALL void [ 0f 01 c1] VMX
+VMCLEAR mem [m: 66 0f c7 /6] VMX
+VMFUNC void [ 0f 01 d4] VMX
+VMLAUNCH void [ 0f 01 c2] VMX
+VMLOAD void [ 0f 01 da] X64,VMX
+VMMCALL void [ 0f 01 d9] X64,VMX
+VMPTRLD mem [m: 0f c7 /6] VMX
+VMPTRST mem [m: 0f c7 /7] VMX
+VMREAD rm32,reg32 [mr: np 0f 78 /r] VMX,NOLONG,SD
+VMREAD rm64,reg64 [mr: o64nw np 0f 78 /r] X64,VMX,SQ
+VMRESUME void [ 0f 01 c3] VMX
+VMRUN void [ 0f 01 d8] X64,VMX
+VMSAVE void [ 0f 01 db] X64,VMX
+VMWRITE reg32,rm32 [rm: np 0f 79 /r] VMX,NOLONG,SD
+VMWRITE reg64,rm64 [rm: o64nw np 0f 79 /r] X64,VMX,SQ
+VMXOFF void [ 0f 01 c4] VMX
+VMXON mem [m: f3 0f c7 /6] VMX
;# Extended Page Tables VMX instructions
INVEPT reg32,mem [rm: 66 0f 38 80 /r] VMX,SO,NOLONG
INVEPT reg64,mem [rm: o64nw 66 0f 38 80 /r] VMX,SO,LONG
@@ -1802,133 +1813,133 @@ INVVPID reg32,mem [rm: 66 0f 38 81 /r] VMX,SO,NOLONG
INVVPID reg64,mem [rm: o64nw 66 0f 38 81 /r] VMX,SO,LONG
;# Tejas New Instructions (SSSE3)
-PABSB mmxreg,mmxrm \360\3\x0F\x38\x1C\110 SSSE3,MMX,SQ
-PABSB xmmreg,xmmrm \361\3\x0F\x38\x1C\110 SSSE3
-PABSW mmxreg,mmxrm \360\3\x0F\x38\x1D\110 SSSE3,MMX,SQ
-PABSW xmmreg,xmmrm \361\3\x0F\x38\x1D\110 SSSE3
-PABSD mmxreg,mmxrm \360\3\x0F\x38\x1E\110 SSSE3,MMX,SQ
-PABSD xmmreg,xmmrm \361\3\x0F\x38\x1E\110 SSSE3
-PALIGNR mmxreg,mmxrm,imm \360\3\x0F\x3A\x0F\110\26 SSSE3,MMX,SQ
-PALIGNR xmmreg,xmmrm,imm \361\3\x0F\x3A\x0F\110\26 SSSE3
-PHADDW mmxreg,mmxrm \360\3\x0F\x38\x01\110 SSSE3,MMX,SQ
-PHADDW xmmreg,xmmrm \361\3\x0F\x38\x01\110 SSSE3
-PHADDD mmxreg,mmxrm \360\3\x0F\x38\x02\110 SSSE3,MMX,SQ
-PHADDD xmmreg,xmmrm \361\3\x0F\x38\x02\110 SSSE3
-PHADDSW mmxreg,mmxrm \360\3\x0F\x38\x03\110 SSSE3,MMX,SQ
-PHADDSW xmmreg,xmmrm \361\3\x0F\x38\x03\110 SSSE3
-PHSUBW mmxreg,mmxrm \360\3\x0F\x38\x05\110 SSSE3,MMX,SQ
-PHSUBW xmmreg,xmmrm \361\3\x0F\x38\x05\110 SSSE3
-PHSUBD mmxreg,mmxrm \360\3\x0F\x38\x06\110 SSSE3,MMX,SQ
-PHSUBD xmmreg,xmmrm \361\3\x0F\x38\x06\110 SSSE3
-PHSUBSW mmxreg,mmxrm \360\3\x0F\x38\x07\110 SSSE3,MMX,SQ
-PHSUBSW xmmreg,xmmrm \361\3\x0F\x38\x07\110 SSSE3
-PMADDUBSW mmxreg,mmxrm \360\3\x0F\x38\x04\110 SSSE3,MMX,SQ
-PMADDUBSW xmmreg,xmmrm \361\3\x0F\x38\x04\110 SSSE3
-PMULHRSW mmxreg,mmxrm \360\3\x0F\x38\x0B\110 SSSE3,MMX,SQ
-PMULHRSW xmmreg,xmmrm \361\3\x0F\x38\x0B\110 SSSE3
-PSHUFB mmxreg,mmxrm \360\3\x0F\x38\x00\110 SSSE3,MMX,SQ
-PSHUFB xmmreg,xmmrm \361\3\x0F\x38\x00\110 SSSE3
-PSIGNB mmxreg,mmxrm \360\3\x0F\x38\x08\110 SSSE3,MMX,SQ
-PSIGNB xmmreg,xmmrm \361\3\x0F\x38\x08\110 SSSE3
-PSIGNW mmxreg,mmxrm \360\3\x0F\x38\x09\110 SSSE3,MMX,SQ
-PSIGNW xmmreg,xmmrm \361\3\x0F\x38\x09\110 SSSE3
-PSIGND mmxreg,mmxrm \360\3\x0F\x38\x0A\110 SSSE3,MMX,SQ
-PSIGND xmmreg,xmmrm \361\3\x0F\x38\x0A\110 SSSE3
+PABSB mmxreg,mmxrm [rm: np 0f 38 1c /r] SSSE3,MMX,SQ
+PABSB xmmreg,xmmrm [rm: 66 0f 38 1c /r] SSSE3
+PABSW mmxreg,mmxrm [rm: np 0f 38 1d /r] SSSE3,MMX,SQ
+PABSW xmmreg,xmmrm [rm: 66 0f 38 1d /r] SSSE3
+PABSD mmxreg,mmxrm [rm: np 0f 38 1e /r] SSSE3,MMX,SQ
+PABSD xmmreg,xmmrm [rm: 66 0f 38 1e /r] SSSE3
+PALIGNR mmxreg,mmxrm,imm [rmi: np 0f 3a 0f /r ib,u] SSSE3,MMX,SQ
+PALIGNR xmmreg,xmmrm,imm [rmi: 66 0f 3a 0f /r ib,u] SSSE3
+PHADDW mmxreg,mmxrm [rm: np 0f 38 01 /r] SSSE3,MMX,SQ
+PHADDW xmmreg,xmmrm [rm: 66 0f 38 01 /r] SSSE3
+PHADDD mmxreg,mmxrm [rm: np 0f 38 02 /r] SSSE3,MMX,SQ
+PHADDD xmmreg,xmmrm [rm: 66 0f 38 02 /r] SSSE3
+PHADDSW mmxreg,mmxrm [rm: np 0f 38 03 /r] SSSE3,MMX,SQ
+PHADDSW xmmreg,xmmrm [rm: 66 0f 38 03 /r] SSSE3
+PHSUBW mmxreg,mmxrm [rm: np 0f 38 05 /r] SSSE3,MMX,SQ
+PHSUBW xmmreg,xmmrm [rm: 66 0f 38 05 /r] SSSE3
+PHSUBD mmxreg,mmxrm [rm: np 0f 38 06 /r] SSSE3,MMX,SQ
+PHSUBD xmmreg,xmmrm [rm: 66 0f 38 06 /r] SSSE3
+PHSUBSW mmxreg,mmxrm [rm: np 0f 38 07 /r] SSSE3,MMX,SQ
+PHSUBSW xmmreg,xmmrm [rm: 66 0f 38 07 /r] SSSE3
+PMADDUBSW mmxreg,mmxrm [rm: np 0f 38 04 /r] SSSE3,MMX,SQ
+PMADDUBSW xmmreg,xmmrm [rm: 66 0f 38 04 /r] SSSE3
+PMULHRSW mmxreg,mmxrm [rm: np 0f 38 0b /r] SSSE3,MMX,SQ
+PMULHRSW xmmreg,xmmrm [rm: 66 0f 38 0b /r] SSSE3
+PSHUFB mmxreg,mmxrm [rm: np 0f 38 00 /r] SSSE3,MMX,SQ
+PSHUFB xmmreg,xmmrm [rm: 66 0f 38 00 /r] SSSE3
+PSIGNB mmxreg,mmxrm [rm: np 0f 38 08 /r] SSSE3,MMX,SQ
+PSIGNB xmmreg,xmmrm [rm: 66 0f 38 08 /r] SSSE3
+PSIGNW mmxreg,mmxrm [rm: np 0f 38 09 /r] SSSE3,MMX,SQ
+PSIGNW xmmreg,xmmrm [rm: 66 0f 38 09 /r] SSSE3
+PSIGND mmxreg,mmxrm [rm: np 0f 38 0a /r] SSSE3,MMX,SQ
+PSIGND xmmreg,xmmrm [rm: 66 0f 38 0a /r] SSSE3
;# AMD SSE4A
-EXTRQ xmmreg,imm,imm \361\2\x0F\x78\200\25\26 SSE4A,AMD
-EXTRQ xmmreg,xmmreg \361\2\x0F\x79\110 SSE4A,AMD
-INSERTQ xmmreg,xmmreg,imm,imm \362\2\x0F\x78\110\26\27 SSE4A,AMD
-INSERTQ xmmreg,xmmreg \362\2\x0F\x79\110 SSE4A,AMD
-MOVNTSD mem,xmmreg \362\2\x0F\x2B\101 SSE4A,AMD,SQ
-MOVNTSS mem,xmmreg \363\2\x0F\x2B\101 SSE4A,AMD,SD
+EXTRQ xmmreg,imm,imm [mij: 66 0f 78 /0 ib,u ib,u] SSE4A,AMD
+EXTRQ xmmreg,xmmreg [rm: 66 0f 79 /r] SSE4A,AMD
+INSERTQ xmmreg,xmmreg,imm,imm [rmij: f2 0f 78 /r ib,u ib,u] SSE4A,AMD
+INSERTQ xmmreg,xmmreg [rm: f2 0f 79 /r] SSE4A,AMD
+MOVNTSD mem,xmmreg [mr: f2 0f 2b /r] SSE4A,AMD,SQ
+MOVNTSS mem,xmmreg [mr: f3 0f 2b /r] SSE4A,AMD,SD
;# New instructions in Barcelona
-LZCNT reg16,rm16 \320\333\2\x0F\xBD\110 P6,AMD
-LZCNT reg32,rm32 \321\333\2\x0F\xBD\110 P6,AMD
-LZCNT reg64,rm64 \324\333\2\x0F\xBD\110 X64,AMD
+LZCNT reg16,rm16 [rm: o16 f3i 0f bd /r] P6,AMD
+LZCNT reg32,rm32 [rm: o32 f3i 0f bd /r] P6,AMD
+LZCNT reg64,rm64 [rm: o64 f3i 0f bd /r] X64,AMD
;# Penryn New Instructions (SSE4.1)
-BLENDPD xmmreg,xmmrm,imm \361\3\x0F\x3A\x0D\110\26 SSE41
-BLENDPS xmmreg,xmmrm,imm \361\3\x0F\x3A\x0C\110\26 SSE41
-BLENDVPD xmmreg,xmmrm,xmm0 \361\3\x0F\x38\x15\110 SSE41
-BLENDVPS xmmreg,xmmrm,xmm0 \361\3\x0F\x38\x14\110 SSE41
-DPPD xmmreg,xmmrm,imm \361\3\x0F\x3A\x41\110\26 SSE41
-DPPS xmmreg,xmmrm,imm \361\3\x0F\x3A\x40\110\26 SSE41
-EXTRACTPS rm32,xmmreg,imm \361\3\x0F\x3A\x17\101\26 SSE41
-EXTRACTPS reg64,xmmreg,imm \324\361\3\x0F\x3A\x17\101\26 SSE41,X64
-INSERTPS xmmreg,xmmrm,imm \361\3\x0F\x3A\x21\110\26 SSE41,SD
-MOVNTDQA xmmreg,mem \361\3\x0F\x38\x2A\110 SSE41
-MPSADBW xmmreg,xmmrm,imm \361\3\x0F\x3A\x42\110\26 SSE41
-PACKUSDW xmmreg,xmmrm \361\3\x0F\x38\x2B\110 SSE41
-PBLENDVB xmmreg,xmmrm,xmm0 \361\3\x0F\x38\x10\110 SSE41
-PBLENDW xmmreg,xmmrm,imm \361\3\x0F\x3A\x0E\110\26 SSE41
-PCMPEQQ xmmreg,xmmrm \361\3\x0F\x38\x29\110 SSE41
-PEXTRB reg32,xmmreg,imm \361\3\x0F\x3A\x14\101\26 SSE41
-PEXTRB mem8,xmmreg,imm \361\3\x0F\x3A\x14\101\26 SSE41
-PEXTRB reg64,xmmreg,imm \324\361\3\x0F\x3A\x14\101\26 SSE41,X64
-PEXTRD rm32,xmmreg,imm \361\3\x0F\x3A\x16\101\26 SSE41
-PEXTRQ rm64,xmmreg,imm \324\361\3\x0F\x3A\x16\101\26 SSE41,X64
-PEXTRW reg32,xmmreg,imm \361\3\x0F\x3A\x15\101\26 SSE41
-PEXTRW mem16,xmmreg,imm \361\3\x0F\x3A\x15\101\26 SSE41
-PEXTRW reg64,xmmreg,imm \324\361\3\x0F\x3A\x15\101\26 SSE41,X64
-PHMINPOSUW xmmreg,xmmrm \361\3\x0F\x38\x41\110 SSE41
-PINSRB xmmreg,mem,imm \361\3\x0F\x3A\x20\110\26 SSE41,SB,AR2
-PINSRB xmmreg,rm8,imm \325\361\3\x0F\x3A\x20\110\26 SSE41,SB,AR2
-PINSRB xmmreg,reg32,imm \361\3\x0F\x3A\x20\110\26 SSE41,SB,AR2
-PINSRD xmmreg,mem,imm \361\3\x0F\x3A\x22\110\26 SSE41,SB,AR2
-PINSRD xmmreg,rm32,imm \361\3\x0F\x3A\x22\110\26 SSE41,SB,AR2
-PINSRQ xmmreg,mem,imm \324\361\3\x0F\x3A\x22\110\26 SSE41,X64,SB,AR2
-PINSRQ xmmreg,rm64,imm \324\361\3\x0F\x3A\x22\110\26 SSE41,X64,SB,AR2
-PMAXSB xmmreg,xmmrm \361\3\x0F\x38\x3C\110 SSE41
-PMAXSD xmmreg,xmmrm \361\3\x0F\x38\x3D\110 SSE41
-PMAXUD xmmreg,xmmrm \361\3\x0F\x38\x3F\110 SSE41
-PMAXUW xmmreg,xmmrm \361\3\x0F\x38\x3E\110 SSE41
-PMINSB xmmreg,xmmrm \361\3\x0F\x38\x38\110 SSE41
-PMINSD xmmreg,xmmrm \361\3\x0F\x38\x39\110 SSE41
-PMINUD xmmreg,xmmrm \361\3\x0F\x38\x3B\110 SSE41
-PMINUW xmmreg,xmmrm \361\3\x0F\x38\x3A\110 SSE41
-PMOVSXBW xmmreg,xmmrm \361\3\x0F\x38\x20\110 SSE41,SQ
-PMOVSXBD xmmreg,xmmrm \361\3\x0F\x38\x21\110 SSE41,SD
-PMOVSXBQ xmmreg,xmmrm \361\3\x0F\x38\x22\110 SSE41,SW
-PMOVSXWD xmmreg,xmmrm \361\3\x0F\x38\x23\110 SSE41,SQ
-PMOVSXWQ xmmreg,xmmrm \361\3\x0F\x38\x24\110 SSE41,SD
-PMOVSXDQ xmmreg,xmmrm \361\3\x0F\x38\x25\110 SSE41,SQ
-PMOVZXBW xmmreg,xmmrm \361\3\x0F\x38\x30\110 SSE41,SQ
-PMOVZXBD xmmreg,xmmrm \361\3\x0F\x38\x31\110 SSE41,SD
-PMOVZXBQ xmmreg,xmmrm \361\3\x0F\x38\x32\110 SSE41,SW
-PMOVZXWD xmmreg,xmmrm \361\3\x0F\x38\x33\110 SSE41,SQ
-PMOVZXWQ xmmreg,xmmrm \361\3\x0F\x38\x34\110 SSE41,SD
-PMOVZXDQ xmmreg,xmmrm \361\3\x0F\x38\x35\110 SSE41,SQ
-PMULDQ xmmreg,xmmrm \361\3\x0F\x38\x28\110 SSE41
-PMULLD xmmreg,xmmrm \361\3\x0F\x38\x40\110 SSE41
-PTEST xmmreg,xmmrm \361\3\x0F\x38\x17\110 SSE41
-ROUNDPD xmmreg,xmmrm,imm \361\3\x0F\x3A\x09\110\26 SSE41
-ROUNDPS xmmreg,xmmrm,imm \361\3\x0F\x3A\x08\110\26 SSE41
-ROUNDSD xmmreg,xmmrm,imm \361\3\x0F\x3A\x0B\110\26 SSE41
-ROUNDSS xmmreg,xmmrm,imm \361\3\x0F\x3A\x0A\110\26 SSE41
+BLENDPD xmmreg,xmmrm,imm [rmi: 66 0f 3a 0d /r ib,u] SSE41
+BLENDPS xmmreg,xmmrm,imm [rmi: 66 0f 3a 0c /r ib,u] SSE41
+BLENDVPD xmmreg,xmmrm,xmm0 [rm-: 66 0f 38 15 /r] SSE41
+BLENDVPS xmmreg,xmmrm,xmm0 [rm-: 66 0f 38 14 /r] SSE41
+DPPD xmmreg,xmmrm,imm [rmi: 66 0f 3a 41 /r ib,u] SSE41
+DPPS xmmreg,xmmrm,imm [rmi: 66 0f 3a 40 /r ib,u] SSE41
+EXTRACTPS rm32,xmmreg,imm [mri: 66 0f 3a 17 /r ib,u] SSE41
+EXTRACTPS reg64,xmmreg,imm [mri: o64 66 0f 3a 17 /r ib,u] SSE41,X64
+INSERTPS xmmreg,xmmrm,imm [rmi: 66 0f 3a 21 /r ib,u] SSE41,SD
+MOVNTDQA xmmreg,mem [rm: 66 0f 38 2a /r] SSE41
+MPSADBW xmmreg,xmmrm,imm [rmi: 66 0f 3a 42 /r ib,u] SSE41
+PACKUSDW xmmreg,xmmrm [rm: 66 0f 38 2b /r] SSE41
+PBLENDVB xmmreg,xmmrm,xmm0 [rm-: 66 0f 38 10 /r] SSE41
+PBLENDW xmmreg,xmmrm,imm [rmi: 66 0f 3a 0e /r ib,u] SSE41
+PCMPEQQ xmmreg,xmmrm [rm: 66 0f 38 29 /r] SSE41
+PEXTRB reg32,xmmreg,imm [mri: 66 0f 3a 14 /r ib,u] SSE41
+PEXTRB mem8,xmmreg,imm [mri: 66 0f 3a 14 /r ib,u] SSE41
+PEXTRB reg64,xmmreg,imm [mri: o64 66 0f 3a 14 /r ib,u] SSE41,X64
+PEXTRD rm32,xmmreg,imm [mri: 66 0f 3a 16 /r ib,u] SSE41
+PEXTRQ rm64,xmmreg,imm [mri: o64 66 0f 3a 16 /r ib,u] SSE41,X64
+PEXTRW reg32,xmmreg,imm [mri: 66 0f 3a 15 /r ib,u] SSE41
+PEXTRW mem16,xmmreg,imm [mri: 66 0f 3a 15 /r ib,u] SSE41
+PEXTRW reg64,xmmreg,imm [mri: o64 66 0f 3a 15 /r ib,u] SSE41,X64
+PHMINPOSUW xmmreg,xmmrm [rm: 66 0f 38 41 /r] SSE41
+PINSRB xmmreg,mem,imm [rmi: 66 0f 3a 20 /r ib,u] SSE41,SB,AR2
+PINSRB xmmreg,rm8,imm [rmi: nohi 66 0f 3a 20 /r ib,u] SSE41,SB,AR2
+PINSRB xmmreg,reg32,imm [rmi: 66 0f 3a 20 /r ib,u] SSE41,SB,AR2
+PINSRD xmmreg,mem,imm [rmi: 66 0f 3a 22 /r ib,u] SSE41,SB,AR2
+PINSRD xmmreg,rm32,imm [rmi: 66 0f 3a 22 /r ib,u] SSE41,SB,AR2
+PINSRQ xmmreg,mem,imm [rmi: o64 66 0f 3a 22 /r ib,u] SSE41,X64,SB,AR2
+PINSRQ xmmreg,rm64,imm [rmi: o64 66 0f 3a 22 /r ib,u] SSE41,X64,SB,AR2
+PMAXSB xmmreg,xmmrm [rm: 66 0f 38 3c /r] SSE41
+PMAXSD xmmreg,xmmrm [rm: 66 0f 38 3d /r] SSE41
+PMAXUD xmmreg,xmmrm [rm: 66 0f 38 3f /r] SSE41
+PMAXUW xmmreg,xmmrm [rm: 66 0f 38 3e /r] SSE41
+PMINSB xmmreg,xmmrm [rm: 66 0f 38 38 /r] SSE41
+PMINSD xmmreg,xmmrm [rm: 66 0f 38 39 /r] SSE41
+PMINUD xmmreg,xmmrm [rm: 66 0f 38 3b /r] SSE41
+PMINUW xmmreg,xmmrm [rm: 66 0f 38 3a /r] SSE41
+PMOVSXBW xmmreg,xmmrm [rm: 66 0f 38 20 /r] SSE41,SQ
+PMOVSXBD xmmreg,xmmrm [rm: 66 0f 38 21 /r] SSE41,SD
+PMOVSXBQ xmmreg,xmmrm [rm: 66 0f 38 22 /r] SSE41,SW
+PMOVSXWD xmmreg,xmmrm [rm: 66 0f 38 23 /r] SSE41,SQ
+PMOVSXWQ xmmreg,xmmrm [rm: 66 0f 38 24 /r] SSE41,SD
+PMOVSXDQ xmmreg,xmmrm [rm: 66 0f 38 25 /r] SSE41,SQ
+PMOVZXBW xmmreg,xmmrm [rm: 66 0f 38 30 /r] SSE41,SQ
+PMOVZXBD xmmreg,xmmrm [rm: 66 0f 38 31 /r] SSE41,SD
+PMOVZXBQ xmmreg,xmmrm [rm: 66 0f 38 32 /r] SSE41,SW
+PMOVZXWD xmmreg,xmmrm [rm: 66 0f 38 33 /r] SSE41,SQ
+PMOVZXWQ xmmreg,xmmrm [rm: 66 0f 38 34 /r] SSE41,SD
+PMOVZXDQ xmmreg,xmmrm [rm: 66 0f 38 35 /r] SSE41,SQ
+PMULDQ xmmreg,xmmrm [rm: 66 0f 38 28 /r] SSE41
+PMULLD xmmreg,xmmrm [rm: 66 0f 38 40 /r] SSE41
+PTEST xmmreg,xmmrm [rm: 66 0f 38 17 /r] SSE41
+ROUNDPD xmmreg,xmmrm,imm [rmi: 66 0f 3a 09 /r ib,u] SSE41
+ROUNDPS xmmreg,xmmrm,imm [rmi: 66 0f 3a 08 /r ib,u] SSE41
+ROUNDSD xmmreg,xmmrm,imm [rmi: 66 0f 3a 0b /r ib,u] SSE41
+ROUNDSS xmmreg,xmmrm,imm [rmi: 66 0f 3a 0a /r ib,u] SSE41
;# Nehalem New Instructions (SSE4.2)
-CRC32 reg32,rm8 \332\3\x0F\x38\xF0\110 SSE42
-CRC32 reg32,rm16 \320\332\3\x0F\x38\xF1\110 SSE42
-CRC32 reg32,rm32 \321\332\3\x0F\x38\xF1\110 SSE42
-CRC32 reg64,rm8 \324\332\3\x0F\x38\xF0\110 SSE42,X64
-CRC32 reg64,rm64 \324\332\3\x0F\x38\xF1\110 SSE42,X64
-PCMPESTRI xmmreg,xmmrm,imm \361\3\x0F\x3A\x61\110\26 SSE42
-PCMPESTRM xmmreg,xmmrm,imm \361\3\x0F\x3A\x60\110\26 SSE42
-PCMPISTRI xmmreg,xmmrm,imm \361\3\x0F\x3A\x63\110\26 SSE42
-PCMPISTRM xmmreg,xmmrm,imm \361\3\x0F\x3A\x62\110\26 SSE42
-PCMPGTQ xmmreg,xmmrm \361\3\x0F\x38\x37\110 SSE42
-POPCNT reg16,rm16 \320\333\2\x0F\xB8\110 NEHALEM,SW
-POPCNT reg32,rm32 \321\333\2\x0F\xB8\110 NEHALEM,SD
-POPCNT reg64,rm64 \324\333\2\x0F\xB8\110 NEHALEM,SQ,X64
+CRC32 reg32,rm8 [rm: f2i 0f 38 f0 /r] SSE42
+CRC32 reg32,rm16 [rm: o16 f2i 0f 38 f1 /r] SSE42
+CRC32 reg32,rm32 [rm: o32 f2i 0f 38 f1 /r] SSE42
+CRC32 reg64,rm8 [rm: o64 f2i 0f 38 f0 /r] SSE42,X64
+CRC32 reg64,rm64 [rm: o64 f2i 0f 38 f1 /r] SSE42,X64
+PCMPESTRI xmmreg,xmmrm,imm [rmi: 66 0f 3a 61 /r ib,u] SSE42
+PCMPESTRM xmmreg,xmmrm,imm [rmi: 66 0f 3a 60 /r ib,u] SSE42
+PCMPISTRI xmmreg,xmmrm,imm [rmi: 66 0f 3a 63 /r ib,u] SSE42
+PCMPISTRM xmmreg,xmmrm,imm [rmi: 66 0f 3a 62 /r ib,u] SSE42
+PCMPGTQ xmmreg,xmmrm [rm: 66 0f 38 37 /r] SSE42
+POPCNT reg16,rm16 [rm: o16 f3i 0f b8 /r] NEHALEM,SW
+POPCNT reg32,rm32 [rm: o32 f3i 0f b8 /r] NEHALEM,SD
+POPCNT reg64,rm64 [rm: o64 f3i 0f b8 /r] NEHALEM,SQ,X64
;# Intel SMX
-GETSEC void \2\x0F\x37 KATMAI
+GETSEC void [ 0f 37] KATMAI
;# Geode (Cyrix) 3DNow! additions
-PFRCPV mmxreg,mmxrm \323\2\x0F\x0F\110\1\x86 PENT,3DNOW,SQ,CYRIX
-PFRSQRTV mmxreg,mmxrm \323\2\x0F\x0F\110\1\x87 PENT,3DNOW,SQ,CYRIX
+PFRCPV mmxreg,mmxrm [rm: o64nw 0f 0f /r 86] PENT,3DNOW,SQ,CYRIX
+PFRSQRTV mmxreg,mmxrm [rm: o64nw 0f 0f /r 87] PENT,3DNOW,SQ,CYRIX
;# Intel new instructions in ???
; Is NEHALEM right here?
@@ -1987,8 +1998,8 @@ VBROADCASTSS ymmreg,mem32 [rm: vex.256.66.0f38.w0 18 /r] AVX,SANDYBRIDGE
VBROADCASTSD ymmreg,mem64 [rm: vex.256.66.0f38.w0 19 /r] AVX,SANDYBRIDGE
VBROADCASTF128 ymmreg,mem128 [rm: vex.256.66.0f38.w0 1a /r] AVX,SANDYBRIDGE
; Specific aliases first, then the generic version, to keep the disassembler happy...
-VCMPEQ_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 00] AVX,SANDYBRIDGE
-VCMPEQ_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 00] AVX,SANDYBRIDGE
+VCMPEQ_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 10] AVX,SANDYBRIDGE
+VCMPEQ_OSPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 10] AVX,SANDYBRIDGE
VCMPEQPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 00] AVX,SANDYBRIDGE
VCMPEQPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 00] AVX,SANDYBRIDGE
VCMPLT_OSPD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f c2 /r 01] AVX,SANDYBRIDGE
@@ -2082,8 +2093,8 @@ VCMPTRUE_USPD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f c2 /r 1f] AVX,SA
VCMPPD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f c2 /r ib] AVX,SANDYBRIDGE
VCMPPD ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f c2 /r ib] AVX,SANDYBRIDGE
; Specific aliases first, then the generic version, to keep the disassembler happy...
-VCMPEQ_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 00] AVX,SANDYBRIDGE
-VCMPEQ_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 00] AVX,SANDYBRIDGE
+VCMPEQ_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 10] AVX,SANDYBRIDGE
+VCMPEQ_OSPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 10] AVX,SANDYBRIDGE
VCMPEQPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 00] AVX,SANDYBRIDGE
VCMPEQPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 00] AVX,SANDYBRIDGE
VCMPLT_OSPS xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.0f c2 /r 01] AVX,SANDYBRIDGE
@@ -2177,7 +2188,7 @@ VCMPTRUE_USPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.0f c2 /r 1f] AVX,SANDY
VCMPPS xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.0f c2 /r ib] AVX,SANDYBRIDGE
VCMPPS ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.0f c2 /r ib] AVX,SANDYBRIDGE
; Specific aliases first, then the generic version, to keep the disassembler happy...
-VCMPEQ_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 00] AVX,SANDYBRIDGE
+VCMPEQ_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 10] AVX,SANDYBRIDGE
VCMPEQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 00] AVX,SANDYBRIDGE
VCMPLT_OSSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 01] AVX,SANDYBRIDGE
VCMPLTSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 01] AVX,SANDYBRIDGE
@@ -2225,7 +2236,7 @@ VCMPGT_OQSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1e] AVX,SANDY
VCMPTRUE_USSD xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f2.0f c2 /r 1f] AVX,SANDYBRIDGE
VCMPSD xmmreg,xmmreg*,xmmrm64,imm8 [rvmi: vex.nds.lig.f2.0f c2 /r ib] AVX,SANDYBRIDGE
; Specific aliases first, then the generic version, to keep the disassembler happy...
-VCMPEQ_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 00] AVX,SANDYBRIDGE
+VCMPEQ_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 10] AVX,SANDYBRIDGE
VCMPEQSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 00] AVX,SANDYBRIDGE
VCMPLT_OSSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 01] AVX,SANDYBRIDGE
VCMPLTSS xmmreg,xmmreg*,xmmrm64 [rvm: vex.nds.lig.f3.0f c2 /r 01] AVX,SANDYBRIDGE
@@ -2424,9 +2435,9 @@ VMOVSHDUP ymmreg,ymmrm256 [rm: vex.256.f3.0f 16 /r] AVX,SANDYBRIDGE
VMOVSLDUP xmmreg,xmmrm128 [rm: vex.128.f3.0f 12 /r] AVX,SANDYBRIDGE
VMOVSLDUP ymmreg,ymmrm256 [rm: vex.256.f3.0f 12 /r] AVX,SANDYBRIDGE
VMOVSS xmmreg,xmmreg*,xmmreg [rvm: vex.nds.lig.f3.0f 10 /r] AVX,SANDYBRIDGE
-VMOVSS xmmreg,mem64 [rm: vex.lig.f3.0f 10 /r] AVX,SANDYBRIDGE
+VMOVSS xmmreg,mem32 [rm: vex.lig.f3.0f 10 /r] AVX,SANDYBRIDGE
VMOVSS xmmreg,xmmreg*,xmmreg [mvr: vex.nds.lig.f3.0f 11 /r] AVX,SANDYBRIDGE
-VMOVSS mem64,xmmreg [mr: vex.lig.f3.0f 11 /r] AVX,SANDYBRIDGE
+VMOVSS mem32,xmmreg [mr: vex.lig.f3.0f 11 /r] AVX,SANDYBRIDGE
VMOVUPD xmmreg,xmmrm128 [rm: vex.128.66.0f 10 /r] AVX,SANDYBRIDGE
VMOVUPD xmmrm128,xmmreg [mr: vex.128.66.0f 11 /r] AVX,SANDYBRIDGE
VMOVUPD ymmreg,ymmrm256 [rm: vex.256.66.0f 10 /r] AVX,SANDYBRIDGE
@@ -2475,11 +2486,11 @@ VPCMPISTRM xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a 62 /r ib] AVX,SANDYBRIDG
VPCMPEQB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 74 /r] AVX,SANDYBRIDGE
VPCMPEQW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 75 /r] AVX,SANDYBRIDGE
VPCMPEQD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 76 /r] AVX,SANDYBRIDGE
-VPCMPEQQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 29 /r] AVX,SANDYBRIDGE
+VPCMPEQQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 29 /r] AVX,SANDYBRIDGE
VPCMPGTB xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 64 /r] AVX,SANDYBRIDGE
VPCMPGTW xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 65 /r] AVX,SANDYBRIDGE
VPCMPGTD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 66 /r] AVX,SANDYBRIDGE
-VPCMPGTQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f 37 /r] AVX,SANDYBRIDGE
+VPCMPGTQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38 37 /r] AVX,SANDYBRIDGE
VPERMILPD xmmreg,xmmreg,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 0d /r] AVX,SANDYBRIDGE
VPERMILPD ymmreg,ymmreg,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 0d /r] AVX,SANDYBRIDGE
VPERMILPD xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a.w0 05 /r ib] AVX,SANDYBRIDGE
@@ -2488,7 +2499,7 @@ VPERMILPS xmmreg,xmmreg,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 0c /r] AVX,SANDY
VPERMILPS ymmreg,ymmreg,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 0c /r] AVX,SANDYBRIDGE
VPERMILPS xmmreg,xmmrm128,imm8 [rmi: vex.128.66.0f3a.w0 04 /r ib] AVX,SANDYBRIDGE
VPERMILPS ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a.w0 04 /r ib] AVX,SANDYBRIDGE
-VPERM2F128 ymmreg,ymmreg,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a.w0 06 /r ib] AVX,SANDYBRIDGE
+VPERM2F128 ymmreg,ymmreg,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a.w0 06 /r ib] AVX,SANDYBRIDGE
VPEXTRB reg64,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 14 /r ib] AVX,SANDYBRIDGE,LONG
VPEXTRB reg32,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 14 /r ib] AVX,SANDYBRIDGE
VPEXTRB mem8,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 14 /r ib] AVX,SANDYBRIDGE
@@ -2859,32 +2870,45 @@ VFNMSUB321SD xmmreg,xmmreg,xmmrm64 [rvm: vex.dds.128.66.0f38.w1 bf /r] FMA,FUT
;# Intel post-32 nm processor instructions
;
; Per AVX spec revision 7, document 319433-007
-RDFSBASE reg32 [m: f3 0f ae /0] LONG,FUTURE
+RDFSBASE reg32 [m: norexw f3 0f ae /0] LONG,FUTURE
RDFSBASE reg64 [m: o64 f3 0f ae /0] LONG,FUTURE
-RDGSBASE reg32 [m: f3 0f ae /1] LONG,FUTURE
+RDGSBASE reg32 [m: norexw f3 0f ae /1] LONG,FUTURE
RDGSBASE reg64 [m: o64 f3 0f ae /1] LONG,FUTURE
RDRAND reg16 [m: o16 0f c7 /6] FUTURE
RDRAND reg32 [m: o32 0f c7 /6] FUTURE
RDRAND reg64 [m: o64 0f c7 /6] LONG,FUTURE
-WRFSBASE reg32 [m: f3 0f ae /2] LONG,FUTURE
+WRFSBASE reg32 [m: norexw f3 0f ae /2] LONG,FUTURE
WRFSBASE reg64 [m: o64 f3 0f ae /2] LONG,FUTURE
-WRGSBASE reg32 [m: f3 0f ae /3] LONG,FUTURE
+WRGSBASE reg32 [m: norexw f3 0f ae /3] LONG,FUTURE
WRGSBASE reg64 [m: o64 f3 0f ae /3] LONG,FUTURE
VCVTPH2PS ymmreg,xmmrm128 [rm: vex.256.66.0f38.w0 13 /r] AVX,FUTURE
VCVTPH2PS xmmreg,xmmrm64 [rm: vex.128.66.0f38.w0 13 /r] AVX,FUTURE
VCVTPS2PH xmmrm128,ymmreg,imm8 [mri: vex.256.66.0f3a.w0 1d /r ib] AVX,FUTURE
VCVTPS2PH xmmrm64,xmmreg,imm8 [mri: vex.128.66.0f3a.w0 1d /r ib] AVX,FUTURE
+; Per AVX spec revision 13, document 319433-013
+ADCX reg32,rm32 [rm: norexw 66 0f 38 f6 /r] FUTURE
+ADCX reg64,rm64 [rm: o64 66 0f 38 f6 /r] LONG,FUTURE
+ADOX reg32,rm32 [rm: norexw f3 0f 38 f6 /r] FUTURE
+ADOX reg64,rm64 [rm: o64 f3 0f 38 f6 /r] LONG,FUTURE
+RDSEED reg16 [m: o16 0f c7 /7] FUTURE
+RDSEED reg32 [m: o32 0f c7 /7] FUTURE
+RDSEED reg64 [m: o64 0f c7 /7] LONG,FUTURE
+
+; Per AVX spec revision 14, document 319433-014
+CLAC void [ 0f 01 ca] PRIV,FUTURE
+STAC void [ 0f 01 cb] PRIV,FUTURE
+
;# VIA (Centaur) security instructions
-XSTORE void \3\x0F\xA7\xC0 PENT,CYRIX
-XCRYPTECB void \336\3\x0F\xA7\xC8 PENT,CYRIX
-XCRYPTCBC void \336\3\x0F\xA7\xD0 PENT,CYRIX
-XCRYPTCTR void \336\3\x0F\xA7\xD8 PENT,CYRIX
-XCRYPTCFB void \336\3\x0F\xA7\xE0 PENT,CYRIX
-XCRYPTOFB void \336\3\x0F\xA7\xE8 PENT,CYRIX
-MONTMUL void \336\3\x0F\xA6\xC0 PENT,CYRIX
-XSHA1 void \336\3\x0F\xA6\xC8 PENT,CYRIX
-XSHA256 void \336\3\x0F\xA6\xD0 PENT,CYRIX
+XSTORE void [ 0f a7 c0] PENT,CYRIX
+XCRYPTECB void [ mustrep 0f a7 c8] PENT,CYRIX
+XCRYPTCBC void [ mustrep 0f a7 d0] PENT,CYRIX
+XCRYPTCTR void [ mustrep 0f a7 d8] PENT,CYRIX
+XCRYPTCFB void [ mustrep 0f a7 e0] PENT,CYRIX
+XCRYPTOFB void [ mustrep 0f a7 e8] PENT,CYRIX
+MONTMUL void [ mustrep 0f a6 c0] PENT,CYRIX
+XSHA1 void [ mustrep 0f a6 c8] PENT,CYRIX
+XSHA256 void [ mustrep 0f a6 d0] PENT,CYRIX
;# AMD Lightweight Profiling (LWP) instructions
;
@@ -3115,198 +3139,444 @@ VPSHLQ xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 97 /r] AMD,SSE5
VPSHLW xmmreg,xmmrm128*,xmmreg [rmv: xop.m9.w0.nds.l0.p0 95 /r] AMD,SSE5
VPSHLW xmmreg,xmmreg*,xmmrm128 [rvm: xop.m9.w1.nds.l0.p0 95 /r] AMD,SSE5
+;# Intel AVX2 instructions
+;
+; based on pub number 319433-011 dated July 2011
+;
+VMPSADBW ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 42 /r ib] FUTURE,AVX2
+VPABSB ymmreg,ymmrm256 [rm: vex.256.66.0f38 1c /r] FUTURE,AVX2
+VPABSW ymmreg,ymmrm256 [rm: vex.256.66.0f38 1d /r] FUTURE,AVX2
+VPABSD ymmreg,ymmrm256 [rm: vex.256.66.0f38 1e /r] FUTURE,AVX2
+VPACKSSWB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 63 /r] FUTURE,AVX2
+VPACKSSDW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 6b /r] FUTURE,AVX2
+VPACKUSDW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 2b /r] FUTURE,AVX2
+VPACKUSWB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 67 /r] FUTURE,AVX2
+VPADDB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f fc /r] FUTURE,AVX2
+VPADDW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f fd /r] FUTURE,AVX2
+VPADDD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f fe /r] FUTURE,AVX2
+VPADDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f d4 /r] FUTURE,AVX2
+VPADDSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f ec /r] FUTURE,AVX2
+VPADDSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f ed /r] FUTURE,AVX2
+VPADDUSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f dc /r] FUTURE,AVX2
+VPADDUSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f dd /r] FUTURE,AVX2
+VPALIGNR ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 0f /r ib] FUTURE,AVX2
+VPAND ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f db /r] FUTURE,AVX2
+VPANDN ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f df /r] FUTURE,AVX2
+VPAVGB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e0 /r] FUTURE,AVX2
+VPAVGW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e3 /r] FUTURE,AVX2
+VPBLENDVB ymmreg,ymmreg*,ymmrm256,ymmreg [rvms: vex.nds.256.66.0f3a 4c /r /is4] FUTURE,AVX2
+VPBLENDW ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a 0e /r ib] FUTURE,AVX2
+VPCMPEQB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 74 /r] FUTURE,AVX2
+VPCMPEQW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 75 /r] FUTURE,AVX2
+VPCMPEQD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 76 /r] FUTURE,AVX2
+VPCMPEQQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 29 /r] FUTURE,AVX2
+VPCMPGTB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 64 /r] FUTURE,AVX2
+VPCMPGTW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 65 /r] FUTURE,AVX2
+VPCMPGTD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 66 /r] FUTURE,AVX2
+VPCMPGTQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 37 /r] FUTURE,AVX2
+VPHADDW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 01 /r] FUTURE,AVX2
+VPHADDD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 02 /r] FUTURE,AVX2
+VPHADDSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 03 /r] FUTURE,AVX2
+VPHSUBW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 05 /r] FUTURE,AVX2
+VPHSUBD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 06 /r] FUTURE,AVX2
+VPHSUBSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 07 /r] FUTURE,AVX2
+VPMADDUBSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 04 /r] FUTURE,AVX2
+VPMADDWD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f f5 /r] FUTURE,AVX2
+VPMAXSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3c /r] FUTURE,AVX2
+VPMAXSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f ee /r] FUTURE,AVX2
+VPMAXSD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3d /r] FUTURE,AVX2
+VPMAXUB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f de /r] FUTURE,AVX2
+VPMAXUW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3e /r] FUTURE,AVX2
+VPMAXUD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3f /r] FUTURE,AVX2
+VPMINSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 38 /r] FUTURE,AVX2
+VPMINSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f ea /r] FUTURE,AVX2
+VPMINSD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 39 /r] FUTURE,AVX2
+VPMINUB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f da /r] FUTURE,AVX2
+VPMINUW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3a /r] FUTURE,AVX2
+VPMINUD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 3b /r] FUTURE,AVX2
+VPMOVMSKB reg32,ymmreg [rm: vex.256.66.0f d7 /r] FUTURE,AVX2
+VPMOVMSKB reg64,ymmreg [rm: vex.256.66.0f d7 /r] FUTURE,AVX2
+VPMOVSXBW ymmreg,xmmrm128 [rm: vex.256.66.0f38 20 /r] FUTURE,AVX2
+VPMOVSXBD ymmreg,mem64 [rm: vex.256.66.0f38 21 /r] FUTURE,AVX2
+VPMOVSXBD ymmreg,xmmreg [rm: vex.256.66.0f38 21 /r] FUTURE,AVX2
+VPMOVSXBQ ymmreg,mem32 [rm: vex.256.66.0f38 22 /r] FUTURE,AVX2
+VPMOVSXBD ymmreg,xmmreg [rm: vex.256.66.0f38 22 /r] FUTURE,AVX2
+VPMOVSXWD ymmreg,xmmrm128 [rm: vex.256.66.0f38 23 /r] FUTURE,AVX2
+VPMOVSXWQ ymmreg,mem64 [rm: vex.256.66.0f38 24 /r] FUTURE,AVX2
+VPMOVSXWQ ymmreg,xmmreg [rm: vex.256.66.0f38 24 /r] FUTURE,AVX2
+VPMOVSXDQ ymmreg,xmmrm128 [rm: vex.256.66.0f38 25 /r] FUTURE,AVX2
+VPMOVZXBW ymmreg,xmmrm128 [rm: vex.256.66.0f38 30 /r] FUTURE,AVX2
+VPMOVZXBD ymmreg,mem64 [rm: vex.256.66.0f38 31 /r] FUTURE,AVX2
+VPMOVZXBD ymmreg,xmmreg [rm: vex.256.66.0f38 31 /r] FUTURE,AVX2
+VPMOVZXBQ ymmreg,mem32 [rm: vex.256.66.0f38 32 /r] FUTURE,AVX2
+VPMOVZXBQ ymmreg,xmmreg [rm: vex.256.66.0f38 32 /r] FUTURE,AVX2
+VPMOVZXWD ymmreg,xmmrm128 [rm: vex.256.66.0f38 33 /r] FUTURE,AVX2
+VPMOVZXWQ ymmreg,mem64 [rm: vex.256.66.0f38 34 /r] FUTURE,AVX2
+VPMOVZXWQ ymmreg,xmmreg [rm: vex.256.66.0f38 34 /r] FUTURE,AVX2
+VPMOVZXDQ ymmreg,xmmrm128 [rm: vex.256.66.0f38 35 /r] FUTURE,AVX2
+VPMULDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 28 /r] FUTURE,AVX2
+VPMULHRSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 0b /r] FUTURE,AVX2
+VPMULHUW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e4 /r] FUTURE,AVX2
+VPMULHW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e5 /r] FUTURE,AVX2
+VPMULLW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f d5 /r] FUTURE,AVX2
+VPMULLD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 40 /r] FUTURE,AVX2
+VPMULUDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f f4 /r] FUTURE,AVX2
+VPOR ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f eb /r] FUTURE,AVX2
+VPSADBW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f f6 /r] FUTURE,AVX2
+VPSHUFB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 00 /r] FUTURE,AVX2
+VPSHUFD ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f 70 /r ib] FUTURE,AVX2
+VPSHUFHW ymmreg,ymmrm256,imm8 [rmi: vex.256.f3.0f 70 /r ib] FUTURE,AVX2
+VPSHUFLW ymmreg,ymmrm256,imm8 [rmi: vex.256.f2.0f 70 /r ib] FUTURE,AVX2
+VPSIGNB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 08 /r] FUTURE,AVX2
+VPSIGNW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 09 /r] FUTURE,AVX2
+VPSIGND ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38 0a /r] FUTURE,AVX2
+VPSLLDQ ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 73 /7 ib] FUTURE,AVX2
+VPSLLW ymmreg,ymmreg*,xmmrm128 [vrm: vex.nds.256.66.0f f1 /r] FUTURE,AVX2
+VPSLLW ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 71 /6 ib] FUTURE,AVX2
+VPSLLD ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f f2 /r] FUTURE,AVX2
+VPSLLD ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 72 /6 ib] FUTURE,AVX2
+VPSLLQ ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f f3 /r] FUTURE,AVX2
+VPSLLQ ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 73 /6 ib] FUTURE,AVX2
+VPSRAW ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f e1 /r] FUTURE,AVX2
+VPSRAW ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 71 /4 ib] FUTURE,AVX2
+VPSRAD ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f e2 /r] FUTURE,AVX2
+VPSRAD ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 72 /4 ib] FUTURE,AVX2
+VPSRLDQ ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 73 /3 ib] FUTURE,AVX2
+VPSRLW ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f d1 /r] FUTURE,AVX2
+VPSRLW ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 71 /2 ib] FUTURE,AVX2
+VPSRLD ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f d2 /r] FUTURE,AVX2
+VPSRLD ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f 72 /2 ib] FUTURE,AVX2
+VPSRLQ ymmreg,ymmreg*,xmmrm128 [rvm: vex.nds.256.66.0f d3 /r] FUTURE,AVX2
+VPSRLQ ymmreg,ymmreg*,imm8 [vmi: vex.ndd.256.66.0f.wig 73 /2 ib] FUTURE,AVX2
+VPSUBB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f f8 /r] FUTURE,AVX2
+VPSUBW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f f9 /r] FUTURE,AVX2
+VPSUBD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f fa /r] FUTURE,AVX2
+VPSUBQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f fb /r] FUTURE,AVX2
+VPSUBSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e8 /r] FUTURE,AVX2
+VPSUBSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f e9 /r] FUTURE,AVX2
+VPSUBUSB ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f d8 /r] FUTURE,AVX2
+VPSUBUSW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f d9 /r] FUTURE,AVX2
+VPUNPCKHBW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 68 /r] FUTURE,AVX2
+VPUNPCKHWD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 69 /r] FUTURE,AVX2
+VPUNPCKHDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 6a /r] FUTURE,AVX2
+VPUNPCKHQDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 6d /r] FUTURE,AVX2
+VPUNPCKLBW ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 60 /r] FUTURE,AVX2
+VPUNPCKLWD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 61 /r] FUTURE,AVX2
+VPUNPCKLDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 62 /r] FUTURE,AVX2
+VPUNPCKLQDQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f 6c /r] FUTURE,AVX2
+VPXOR ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f ef /r] FUTURE,AVX2
+VMOVNTDQA ymmreg,mem128 [rm: vex.256.66.0f38 2a /r] FUTURE,AVX2
+VBROADCASTSS xmmreg,xmmreg [rm: vex.128.66.0f38.w0 18 /r] FUTURE,AVX2
+VBROADCASTSS ymmreg,xmmreg [rm: vex.256.66.0f38.w0 18 /r] FUTURE,AVX2
+VBROADCASTSD ymmreg,xmmreg [rm: vex.256.66.0f38.w0 19 /r] FUTURE,AVX2
+VBROADCASTI128 ymmreg,mem128 [rm: vex.256.66.0f38.w0 5a /r] FUTURE,AVX2
+VPBLENDD xmmreg,xmmreg*,xmmrm128,imm8 [rvmi: vex.nds.128.66.0f3a.w0 02 /r ib] FUTURE,AVX2
+VPBLENDD ymmreg,ymmreg*,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a.w0 02 /r ib] FUTURE,AVX2
+VPBROADCASTB xmmreg,mem8 [rm: vex.128.66.0f38.w0 78 /r] FUTURE,AVX2
+VPBROADCASTB xmmreg,xmmreg [rm: vex.128.66.0f38.w0 78 /r] FUTURE,AVX2
+VPBROADCASTB ymmreg,mem8 [rm: vex.256.66.0f38.w0 78 /r] FUTURE,AVX2
+VPBROADCASTB ymmreg,xmmreg [rm: vex.256.66.0f38.w0 78 /r] FUTURE,AVX2
+VPBROADCASTW xmmreg,mem16 [rm: vex.128.66.0f38.w0 79 /r] FUTURE,AVX2
+VPBROADCASTW xmmreg,xmmreg [rm: vex.128.66.0f38.w0 79 /r] FUTURE,AVX2
+VPBROADCASTW ymmreg,mem16 [rm: vex.256.66.0f38.w0 79 /r] FUTURE,AVX2
+VPBROADCASTW ymmreg,xmmreg [rm: vex.256.66.0f38.w0 79 /r] FUTURE,AVX2
+VPBROADCASTD xmmreg,mem32 [rm: vex.128.66.0f38.w0 58 /r] FUTURE,AVX2
+VPBROADCASTD xmmreg,xmmreg [rm: vex.128.66.0f38.w0 58 /r] FUTURE,AVX2
+VPBROADCASTD ymmreg,mem32 [rm: vex.256.66.0f38.w0 58 /r] FUTURE,AVX2
+VPBROADCASTD ymmreg,xmmreg [rm: vex.256.66.0f38.w0 58 /r] FUTURE,AVX2
+VPBROADCASTQ xmmreg,mem64 [rm: vex.128.66.0f38.w0 59 /r] FUTURE,AVX2
+VPBROADCASTQ xmmreg,xmmreg [rm: vex.128.66.0f38.w0 59 /r] FUTURE,AVX2
+VPBROADCASTQ ymmreg,mem64 [rm: vex.256.66.0f38.w0 59 /r] FUTURE,AVX2
+VPBROADCASTQ ymmreg,xmmreg [rm: vex.256.66.0f38.w0 59 /r] FUTURE,AVX2
+
+VPERMD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 36 /r] FUTURE,AVX2
+VPERMPD ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a.w1 01 /r ib] FUTURE,AVX2
+VPERMPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 16 /r] FUTURE,AVX2
+VPERMQ ymmreg,ymmrm256,imm8 [rmi: vex.256.66.0f3a.w1 00 /r ib] FUTURE,AVX2
+VPERM2I128 ymmreg,ymmreg,ymmrm256,imm8 [rvmi: vex.nds.256.66.0f3a.w0 46 /r ib] FUTURE,AVX2
+VEXTRACTI128 xmmrm128,ymmreg,imm8 [mri: vex.256.66.0f3a.w0 39 /r ib] FUTURE,AVX2
+
+VINSERTI128 ymmreg,ymmreg*,xmmrm128,imm8 [rvmi: vex.nds.256.66.0f3a.w0 38 /r ib] FUTURE,AVX2
+VPMASKMOVD xmmreg,xmmreg*,mem128 [rvm: vex.nds.128.66.0f38.w0 8c /r] FUTURE,AVX2
+VPMASKMOVD ymmreg,ymmreg*,mem256 [rvm: vex.nds.256.66.0f38.w0 8c /r] FUTURE,AVX2
+VPMASKMOVQ xmmreg,xmmreg*,mem128 [rvm: vex.nds.128.66.0f38.w1 8c /r] FUTURE,AVX2
+VPMASKMOVQ ymmreg,ymmreg*,mem256 [rvm: vex.nds.256.66.0f38.w1 8c /r] FUTURE,AVX2
+
+VPMASKMOVD mem128,xmmreg*,xmmreg [mvr: vex.nds.128.66.0f38.w0 8e /r] FUTURE,AVX2
+VPMASKMOVD mem256,ymmreg*,ymmreg [mvr: vex.nds.256.66.0f38.w0 8e /r] FUTURE,AVX2
+VPMASKMOVQ mem128,xmmreg*,xmmreg [mvr: vex.nds.128.66.0f38.w1 8e /r] FUTURE,AVX2
+VPMASKMOVQ mem256,ymmreg*,ymmreg [mvr: vex.nds.256.66.0f38.w1 8e /r] FUTURE,AVX2
+
+VPSLLVD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 47 /r] FUTURE,AVX2
+VPSLLVQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w1 47 /r] FUTURE,AVX2
+VPSLLVD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 47 /r] FUTURE,AVX2
+VPSLLVQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w1 47 /r] FUTURE,AVX2
+
+VPSRAVD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 46 /r] FUTURE,AVX2
+VPSRAVD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 46 /r] FUTURE,AVX2
+
+VPSRLVD xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w0 45 /r] FUTURE,AVX2
+VPSRLVQ xmmreg,xmmreg*,xmmrm128 [rvm: vex.nds.128.66.0f38.w1 45 /r] FUTURE,AVX2
+VPSRLVD ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w0 45 /r] FUTURE,AVX2
+VPSRLVQ ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.66.0f38.w1 45 /r] FUTURE,AVX2
+
+VGATHERDPD xmmreg,mem64,xmmreg [rmv: vm32x vex.dds.128.66.0f38.w1 92 /r] FUTURE,AVX2
+VGATHERQPD xmmreg,mem64,xmmreg [rmv: vm64x vex.dds.128.66.0f38.w1 93 /r] FUTURE,AVX2
+VGATHERDPD ymmreg,mem64,ymmreg [rmv: vm32x vex.dds.256.66.0f38.w1 92 /r] FUTURE,AVX2
+VGATHERQPD ymmreg,mem64,ymmreg [rmv: vm64y vex.dds.256.66.0f38.w1 92 /r] FUTURE,AVX2
+
+VGATHERDPS xmmreg,mem32,xmmreg [rmv: vm32x vex.dds.128.66.0f38.w0 92 /r] FUTURE,AVX2
+VGATHERQPS xmmreg,mem32,xmmreg [rmv: vm64x vex.dds.128.66.0f38.w0 93 /r] FUTURE,AVX2
+VGATHERDPS ymmreg,mem32,ymmreg [rmv: vm32y vex.dds.256.66.0f38.w0 92 /r] FUTURE,AVX2
+VGATHERQPS xmmreg,mem32,xmmreg [rmv: vm64y vex.dds.256.66.0f38.w0 93 /r] FUTURE,AVX2
+
+VPGATHERDD xmmreg,mem32,xmmreg [rmv: vm32x vex.dds.128.66.0f38.w0 90 /r] FUTURE,AVX2
+VPGATHERQD xmmreg,mem32,xmmreg [rmv: vm64x vex.dds.128.66.0f38.w0 91 /r] FUTURE,AVX2
+VPGATHERDD ymmreg,mem32,ymmreg [rmv: vm32y vex.dds.256.66.0f38.w0 90 /r] FUTURE,AVX2
+VPGATHERQD xmmreg,mem32,xmmreg [rmv: vm64y vex.dds.256.66.0f38.w0 91 /r] FUTURE,AVX2
+
+VPGATHERDQ xmmreg,mem64,xmmreg [rmv: vm32x vex.dds.128.66.0f38.w1 90 /r] FUTURE,AVX2
+VPGATHERQQ xmmreg,mem64,xmmreg [rmv: vm64x vex.dds.128.66.0f38.w1 91 /r] FUTURE,AVX2
+VPGATHERDQ ymmreg,mem64,ymmreg [rmv: vm32x vex.dds.256.66.0f38.w1 90 /r] FUTURE,AVX2
+VPGATHERQQ ymmreg,mem64,ymmreg [rmv: vm64y vex.dds.256.66.0f38.w1 91 /r] FUTURE,AVX2
+
+;# Transactional Synchronization Extensions (TSX)
+XABORT imm [i: c6 f8 ib] FUTURE,RTM
+XABORT imm8 [i: c6 f8 ib] FUTURE,RTM
+XBEGIN imm [i: odf c7 f8 rel] FUTURE,RTM
+XBEGIN imm|near [i: odf c7 f8 rel] FUTURE,RTM
+XBEGIN imm16 [i: o16 c7 f8 rel] FUTURE,RTM
+XBEGIN imm16|near [i: o16 c7 f8 rel] FUTURE,RTM
+XBEGIN imm32 [i: o32 c7 f8 rel] FUTURE,RTM
+XBEGIN imm32|near [i: o32 c7 f8 rel] FUTURE,RTM
+XEND void [ 0f 01 d5] FUTURE,RTM
+XTEST void [ 0f 01 d6] FUTURE,HLE,RTM
+
+;# Intel BMI1 and BMI2 instructions
+;
+; based on pub number 319433-011 dated July 2011
+;
+TZCNT reg16,rm16 [rm: o16 f3 0f bc /r] FUTURE,BMI1
+TZCNT reg32,rm32 [rm: o32 f3 0f bc /r] FUTURE,BMI1
+TZCNT reg64,rm64 [rm: o64 f3 0f bc /r] LONG,FUTURE,BMI1
+ANDN reg32,reg32,rm32 [rvm: vex.nds.lz.0f38.w0 f2 /r] FUTURE,BMI1
+ANDN reg64,reg64,rm64 [rvm: vex.nds.lz.0f38.w1 f2 /r] LONG,FUTURE,BMI1
+BEXTR reg32,rm32,reg32 [rmv: vex.nds.lz.0f38.w0 f7 /r] FUTURE,BMI1
+BEXTR reg64,rm64,reg64 [rmv: vex.nds.lz.0f38.w1 f7 /r] LONG,FUTURE,BMI1
+BLSI reg32,rm32 [vm: vex.ndd.lz.0f38.w0 f3 /3] FUTURE,BMI1
+BLSI reg64,rm64 [vm: vex.ndd.lz.0f38.w1 f3 /3] LONG,FUTURE,BMI1
+BLSMSK reg32,rm32 [vm: vex.ndd.lz.0f38.w0 f3 /2] FUTURE,BMI1
+BLSMSK reg64,rm64 [vm: vex.ndd.lz.0f38.w1 f3 /2] LONG,FUTURE,BMI1
+BLSR reg32,rm32 [vm: vex.ndd.lz.0f38.w0 f3 /1] FUTURE,BMI1
+BLSR reg64,rm64 [vm: vex.ndd.lz.0f38.w1 f3 /1] LONG,FUTURE,BMI1
+BZHI reg32,rm32,reg32 [rmv: vex.nds.lz.0f38.w0 f5 /r] FUTURE,BMI2
+BZHI reg64,rm64,reg64 [rmv: vex.nds.lz.0f38.w1 f5 /r] LONG,FUTURE,BMI2
+MULX reg32,reg32,rm32 [rvm: vex.ndd.lz.f2.0f38.w0 f6 /r] FUTURE,BMI2
+MULX reg64,reg64,rm64 [rvm: vex.ndd.lz.f2.0f38.w1 f6 /r] LONG,FUTURE,BMI2
+PDEP reg32,reg32,rm32 [rvm: vex.nds.lz.f2.0f38.w0 f5 /r] FUTURE,BMI2
+PDEP reg64,reg64,rm64 [rvm: vex.nds.lz.f2.0f38.w1 f5 /r] LONG,FUTURE,BMI2
+PEXT reg32,reg32,rm32 [rvm: vex.nds.lz.f3.0f38.w0 f5 /r] FUTURE,BMI2
+PEXT reg64,reg64,rm64 [rvm: vex.nds.lz.f3.0f38.w1 f5 /r] LONG,FUTURE,BMI2
+RORX reg32,rm32,imm8 [rmi: vex.lz.f2.0f3a.w0 f0 /r ib] FUTURE,BMI2
+RORX reg64,rm64,imm8 [rmi: vex.lz.f2.0f3a.w1 f0 /r ib] LONG,FUTURE,BMI2
+SARX reg32,rm32,reg32 [rmv: vex.nds.lz.f3.0f38.w0 f7 /r] FUTURE,BMI2
+SARX reg64,rm64,reg64 [rmv: vex.nds.lz.f3.0f38.w1 f7 /r] LONG,FUTURE,BMI2
+SHLX reg32,rm32,reg32 [rmv: vex.nds.lz.66.0f38.w0 f7 /r] FUTURE,BMI2
+SHLX reg64,rm64,reg64 [rmv: vex.nds.lz.66.0f38.w1 f7 /r] LONG,FUTURE,BMI2
+SHRX reg32,rm32,reg32 [rmv: vex.nds.lz.f2.0f38.w0 f7 /r] FUTURE,BMI2
+SHRX reg64,rm64,reg64 [rmv: vex.nds.lz.f2.0f38.w1 f7 /r] LONG,FUTURE,BMI2
;# Systematic names for the hinting nop instructions
; These should be last in the file
-HINT_NOP0 rm16 \320\2\x0F\x18\200 P6,UNDOC
-HINT_NOP0 rm32 \321\2\x0F\x18\200 P6,UNDOC
-HINT_NOP0 rm64 \324\2\x0F\x18\200 X64,UNDOC
-HINT_NOP1 rm16 \320\2\x0F\x18\201 P6,UNDOC
-HINT_NOP1 rm32 \321\2\x0F\x18\201 P6,UNDOC
-HINT_NOP1 rm64 \324\2\x0F\x18\201 X64,UNDOC
-HINT_NOP2 rm16 \320\2\x0F\x18\202 P6,UNDOC
-HINT_NOP2 rm32 \321\2\x0F\x18\202 P6,UNDOC
-HINT_NOP2 rm64 \324\2\x0F\x18\202 X64,UNDOC
-HINT_NOP3 rm16 \320\2\x0F\x18\203 P6,UNDOC
-HINT_NOP3 rm32 \321\2\x0F\x18\203 P6,UNDOC
-HINT_NOP3 rm64 \324\2\x0F\x18\203 X64,UNDOC
-HINT_NOP4 rm16 \320\2\x0F\x18\204 P6,UNDOC
-HINT_NOP4 rm32 \321\2\x0F\x18\204 P6,UNDOC
-HINT_NOP4 rm64 \324\2\x0F\x18\204 X64,UNDOC
-HINT_NOP5 rm16 \320\2\x0F\x18\205 P6,UNDOC
-HINT_NOP5 rm32 \321\2\x0F\x18\205 P6,UNDOC
-HINT_NOP5 rm64 \324\2\x0F\x18\205 X64,UNDOC
-HINT_NOP6 rm16 \320\2\x0F\x18\206 P6,UNDOC
-HINT_NOP6 rm32 \321\2\x0F\x18\206 P6,UNDOC
-HINT_NOP6 rm64 \324\2\x0F\x18\206 X64,UNDOC
-HINT_NOP7 rm16 \320\2\x0F\x18\207 P6,UNDOC
-HINT_NOP7 rm32 \321\2\x0F\x18\207 P6,UNDOC
-HINT_NOP7 rm64 \324\2\x0F\x18\207 X64,UNDOC
-HINT_NOP8 rm16 \320\2\x0F\x19\200 P6,UNDOC
-HINT_NOP8 rm32 \321\2\x0F\x19\200 P6,UNDOC
-HINT_NOP8 rm64 \324\2\x0F\x19\200 X64,UNDOC
-HINT_NOP9 rm16 \320\2\x0F\x19\201 P6,UNDOC
-HINT_NOP9 rm32 \321\2\x0F\x19\201 P6,UNDOC
-HINT_NOP9 rm64 \324\2\x0F\x19\201 X64,UNDOC
-HINT_NOP10 rm16 \320\2\x0F\x19\202 P6,UNDOC
-HINT_NOP10 rm32 \321\2\x0F\x19\202 P6,UNDOC
-HINT_NOP10 rm64 \324\2\x0F\x19\202 X64,UNDOC
-HINT_NOP11 rm16 \320\2\x0F\x19\203 P6,UNDOC
-HINT_NOP11 rm32 \321\2\x0F\x19\203 P6,UNDOC
-HINT_NOP11 rm64 \324\2\x0F\x19\203 X64,UNDOC
-HINT_NOP12 rm16 \320\2\x0F\x19\204 P6,UNDOC
-HINT_NOP12 rm32 \321\2\x0F\x19\204 P6,UNDOC
-HINT_NOP12 rm64 \324\2\x0F\x19\204 X64,UNDOC
-HINT_NOP13 rm16 \320\2\x0F\x19\205 P6,UNDOC
-HINT_NOP13 rm32 \321\2\x0F\x19\205 P6,UNDOC
-HINT_NOP13 rm64 \324\2\x0F\x19\205 X64,UNDOC
-HINT_NOP14 rm16 \320\2\x0F\x19\206 P6,UNDOC
-HINT_NOP14 rm32 \321\2\x0F\x19\206 P6,UNDOC
-HINT_NOP14 rm64 \324\2\x0F\x19\206 X64,UNDOC
-HINT_NOP15 rm16 \320\2\x0F\x19\207 P6,UNDOC
-HINT_NOP15 rm32 \321\2\x0F\x19\207 P6,UNDOC
-HINT_NOP15 rm64 \324\2\x0F\x19\207 X64,UNDOC
-HINT_NOP16 rm16 \320\2\x0F\x1A\200 P6,UNDOC
-HINT_NOP16 rm32 \321\2\x0F\x1A\200 P6,UNDOC
-HINT_NOP16 rm64 \324\2\x0F\x1A\200 X64,UNDOC
-HINT_NOP17 rm16 \320\2\x0F\x1A\201 P6,UNDOC
-HINT_NOP17 rm32 \321\2\x0F\x1A\201 P6,UNDOC
-HINT_NOP17 rm64 \324\2\x0F\x1A\201 X64,UNDOC
-HINT_NOP18 rm16 \320\2\x0F\x1A\202 P6,UNDOC
-HINT_NOP18 rm32 \321\2\x0F\x1A\202 P6,UNDOC
-HINT_NOP18 rm64 \324\2\x0F\x1A\202 X64,UNDOC
-HINT_NOP19 rm16 \320\2\x0F\x1A\203 P6,UNDOC
-HINT_NOP19 rm32 \321\2\x0F\x1A\203 P6,UNDOC
-HINT_NOP19 rm64 \324\2\x0F\x1A\203 X64,UNDOC
-HINT_NOP20 rm16 \320\2\x0F\x1A\204 P6,UNDOC
-HINT_NOP20 rm32 \321\2\x0F\x1A\204 P6,UNDOC
-HINT_NOP20 rm64 \324\2\x0F\x1A\204 X64,UNDOC
-HINT_NOP21 rm16 \320\2\x0F\x1A\205 P6,UNDOC
-HINT_NOP21 rm32 \321\2\x0F\x1A\205 P6,UNDOC
-HINT_NOP21 rm64 \324\2\x0F\x1A\205 X64,UNDOC
-HINT_NOP22 rm16 \320\2\x0F\x1A\206 P6,UNDOC
-HINT_NOP22 rm32 \321\2\x0F\x1A\206 P6,UNDOC
-HINT_NOP22 rm64 \324\2\x0F\x1A\206 X64,UNDOC
-HINT_NOP23 rm16 \320\2\x0F\x1A\207 P6,UNDOC
-HINT_NOP23 rm32 \321\2\x0F\x1A\207 P6,UNDOC
-HINT_NOP23 rm64 \324\2\x0F\x1A\207 X64,UNDOC
-HINT_NOP24 rm16 \320\2\x0F\x1B\200 P6,UNDOC
-HINT_NOP24 rm32 \321\2\x0F\x1B\200 P6,UNDOC
-HINT_NOP24 rm64 \324\2\x0F\x1B\200 X64,UNDOC
-HINT_NOP25 rm16 \320\2\x0F\x1B\201 P6,UNDOC
-HINT_NOP25 rm32 \321\2\x0F\x1B\201 P6,UNDOC
-HINT_NOP25 rm64 \324\2\x0F\x1B\201 X64,UNDOC
-HINT_NOP26 rm16 \320\2\x0F\x1B\202 P6,UNDOC
-HINT_NOP26 rm32 \321\2\x0F\x1B\202 P6,UNDOC
-HINT_NOP26 rm64 \324\2\x0F\x1B\202 X64,UNDOC
-HINT_NOP27 rm16 \320\2\x0F\x1B\203 P6,UNDOC
-HINT_NOP27 rm32 \321\2\x0F\x1B\203 P6,UNDOC
-HINT_NOP27 rm64 \324\2\x0F\x1B\203 X64,UNDOC
-HINT_NOP28 rm16 \320\2\x0F\x1B\204 P6,UNDOC
-HINT_NOP28 rm32 \321\2\x0F\x1B\204 P6,UNDOC
-HINT_NOP28 rm64 \324\2\x0F\x1B\204 X64,UNDOC
-HINT_NOP29 rm16 \320\2\x0F\x1B\205 P6,UNDOC
-HINT_NOP29 rm32 \321\2\x0F\x1B\205 P6,UNDOC
-HINT_NOP29 rm64 \324\2\x0F\x1B\205 X64,UNDOC
-HINT_NOP30 rm16 \320\2\x0F\x1B\206 P6,UNDOC
-HINT_NOP30 rm32 \321\2\x0F\x1B\206 P6,UNDOC
-HINT_NOP30 rm64 \324\2\x0F\x1B\206 X64,UNDOC
-HINT_NOP31 rm16 \320\2\x0F\x1B\207 P6,UNDOC
-HINT_NOP31 rm32 \321\2\x0F\x1B\207 P6,UNDOC
-HINT_NOP31 rm64 \324\2\x0F\x1B\207 X64,UNDOC
-HINT_NOP32 rm16 \320\2\x0F\x1C\200 P6,UNDOC
-HINT_NOP32 rm32 \321\2\x0F\x1C\200 P6,UNDOC
-HINT_NOP32 rm64 \324\2\x0F\x1C\200 X64,UNDOC
-HINT_NOP33 rm16 \320\2\x0F\x1C\201 P6,UNDOC
-HINT_NOP33 rm32 \321\2\x0F\x1C\201 P6,UNDOC
-HINT_NOP33 rm64 \324\2\x0F\x1C\201 X64,UNDOC
-HINT_NOP34 rm16 \320\2\x0F\x1C\202 P6,UNDOC
-HINT_NOP34 rm32 \321\2\x0F\x1C\202 P6,UNDOC
-HINT_NOP34 rm64 \324\2\x0F\x1C\202 X64,UNDOC
-HINT_NOP35 rm16 \320\2\x0F\x1C\203 P6,UNDOC
-HINT_NOP35 rm32 \321\2\x0F\x1C\203 P6,UNDOC
-HINT_NOP35 rm64 \324\2\x0F\x1C\203 X64,UNDOC
-HINT_NOP36 rm16 \320\2\x0F\x1C\204 P6,UNDOC
-HINT_NOP36 rm32 \321\2\x0F\x1C\204 P6,UNDOC
-HINT_NOP36 rm64 \324\2\x0F\x1C\204 X64,UNDOC
-HINT_NOP37 rm16 \320\2\x0F\x1C\205 P6,UNDOC
-HINT_NOP37 rm32 \321\2\x0F\x1C\205 P6,UNDOC
-HINT_NOP37 rm64 \324\2\x0F\x1C\205 X64,UNDOC
-HINT_NOP38 rm16 \320\2\x0F\x1C\206 P6,UNDOC
-HINT_NOP38 rm32 \321\2\x0F\x1C\206 P6,UNDOC
-HINT_NOP38 rm64 \324\2\x0F\x1C\206 X64,UNDOC
-HINT_NOP39 rm16 \320\2\x0F\x1C\207 P6,UNDOC
-HINT_NOP39 rm32 \321\2\x0F\x1C\207 P6,UNDOC
-HINT_NOP39 rm64 \324\2\x0F\x1C\207 X64,UNDOC
-HINT_NOP40 rm16 \320\2\x0F\x1D\200 P6,UNDOC
-HINT_NOP40 rm32 \321\2\x0F\x1D\200 P6,UNDOC
-HINT_NOP40 rm64 \324\2\x0F\x1D\200 X64,UNDOC
-HINT_NOP41 rm16 \320\2\x0F\x1D\201 P6,UNDOC
-HINT_NOP41 rm32 \321\2\x0F\x1D\201 P6,UNDOC
-HINT_NOP41 rm64 \324\2\x0F\x1D\201 X64,UNDOC
-HINT_NOP42 rm16 \320\2\x0F\x1D\202 P6,UNDOC
-HINT_NOP42 rm32 \321\2\x0F\x1D\202 P6,UNDOC
-HINT_NOP42 rm64 \324\2\x0F\x1D\202 X64,UNDOC
-HINT_NOP43 rm16 \320\2\x0F\x1D\203 P6,UNDOC
-HINT_NOP43 rm32 \321\2\x0F\x1D\203 P6,UNDOC
-HINT_NOP43 rm64 \324\2\x0F\x1D\203 X64,UNDOC
-HINT_NOP44 rm16 \320\2\x0F\x1D\204 P6,UNDOC
-HINT_NOP44 rm32 \321\2\x0F\x1D\204 P6,UNDOC
-HINT_NOP44 rm64 \324\2\x0F\x1D\204 X64,UNDOC
-HINT_NOP45 rm16 \320\2\x0F\x1D\205 P6,UNDOC
-HINT_NOP45 rm32 \321\2\x0F\x1D\205 P6,UNDOC
-HINT_NOP45 rm64 \324\2\x0F\x1D\205 X64,UNDOC
-HINT_NOP46 rm16 \320\2\x0F\x1D\206 P6,UNDOC
-HINT_NOP46 rm32 \321\2\x0F\x1D\206 P6,UNDOC
-HINT_NOP46 rm64 \324\2\x0F\x1D\206 X64,UNDOC
-HINT_NOP47 rm16 \320\2\x0F\x1D\207 P6,UNDOC
-HINT_NOP47 rm32 \321\2\x0F\x1D\207 P6,UNDOC
-HINT_NOP47 rm64 \324\2\x0F\x1D\207 X64,UNDOC
-HINT_NOP48 rm16 \320\2\x0F\x1E\200 P6,UNDOC
-HINT_NOP48 rm32 \321\2\x0F\x1E\200 P6,UNDOC
-HINT_NOP48 rm64 \324\2\x0F\x1E\200 X64,UNDOC
-HINT_NOP49 rm16 \320\2\x0F\x1E\201 P6,UNDOC
-HINT_NOP49 rm32 \321\2\x0F\x1E\201 P6,UNDOC
-HINT_NOP49 rm64 \324\2\x0F\x1E\201 X64,UNDOC
-HINT_NOP50 rm16 \320\2\x0F\x1E\202 P6,UNDOC
-HINT_NOP50 rm32 \321\2\x0F\x1E\202 P6,UNDOC
-HINT_NOP50 rm64 \324\2\x0F\x1E\202 X64,UNDOC
-HINT_NOP51 rm16 \320\2\x0F\x1E\203 P6,UNDOC
-HINT_NOP51 rm32 \321\2\x0F\x1E\203 P6,UNDOC
-HINT_NOP51 rm64 \324\2\x0F\x1E\203 X64,UNDOC
-HINT_NOP52 rm16 \320\2\x0F\x1E\204 P6,UNDOC
-HINT_NOP52 rm32 \321\2\x0F\x1E\204 P6,UNDOC
-HINT_NOP52 rm64 \324\2\x0F\x1E\204 X64,UNDOC
-HINT_NOP53 rm16 \320\2\x0F\x1E\205 P6,UNDOC
-HINT_NOP53 rm32 \321\2\x0F\x1E\205 P6,UNDOC
-HINT_NOP53 rm64 \324\2\x0F\x1E\205 X64,UNDOC
-HINT_NOP54 rm16 \320\2\x0F\x1E\206 P6,UNDOC
-HINT_NOP54 rm32 \321\2\x0F\x1E\206 P6,UNDOC
-HINT_NOP54 rm64 \324\2\x0F\x1E\206 X64,UNDOC
-HINT_NOP55 rm16 \320\2\x0F\x1E\207 P6,UNDOC
-HINT_NOP55 rm32 \321\2\x0F\x1E\207 P6,UNDOC
-HINT_NOP55 rm64 \324\2\x0F\x1E\207 X64,UNDOC
-HINT_NOP56 rm16 \320\2\x0F\x1F\200 P6,UNDOC
-HINT_NOP56 rm32 \321\2\x0F\x1F\200 P6,UNDOC
-HINT_NOP56 rm64 \324\2\x0F\x1F\200 X64,UNDOC
-HINT_NOP57 rm16 \320\2\x0F\x1F\201 P6,UNDOC
-HINT_NOP57 rm32 \321\2\x0F\x1F\201 P6,UNDOC
-HINT_NOP57 rm64 \324\2\x0F\x1F\201 X64,UNDOC
-HINT_NOP58 rm16 \320\2\x0F\x1F\202 P6,UNDOC
-HINT_NOP58 rm32 \321\2\x0F\x1F\202 P6,UNDOC
-HINT_NOP58 rm64 \324\2\x0F\x1F\202 X64,UNDOC
-HINT_NOP59 rm16 \320\2\x0F\x1F\203 P6,UNDOC
-HINT_NOP59 rm32 \321\2\x0F\x1F\203 P6,UNDOC
-HINT_NOP59 rm64 \324\2\x0F\x1F\203 X64,UNDOC
-HINT_NOP60 rm16 \320\2\x0F\x1F\204 P6,UNDOC
-HINT_NOP60 rm32 \321\2\x0F\x1F\204 P6,UNDOC
-HINT_NOP60 rm64 \324\2\x0F\x1F\204 X64,UNDOC
-HINT_NOP61 rm16 \320\2\x0F\x1F\205 P6,UNDOC
-HINT_NOP61 rm32 \321\2\x0F\x1F\205 P6,UNDOC
-HINT_NOP61 rm64 \324\2\x0F\x1F\205 X64,UNDOC
-HINT_NOP62 rm16 \320\2\x0F\x1F\206 P6,UNDOC
-HINT_NOP62 rm32 \321\2\x0F\x1F\206 P6,UNDOC
-HINT_NOP62 rm64 \324\2\x0F\x1F\206 X64,UNDOC
-HINT_NOP63 rm16 \320\2\x0F\x1F\207 P6,UNDOC
-HINT_NOP63 rm32 \321\2\x0F\x1F\207 P6,UNDOC
-HINT_NOP63 rm64 \324\2\x0F\x1F\207 X64,UNDOC
+HINT_NOP0 rm16 [m: o16 0f 18 /0] P6,UNDOC
+HINT_NOP0 rm32 [m: o32 0f 18 /0] P6,UNDOC
+HINT_NOP0 rm64 [m: o64 0f 18 /0] X64,UNDOC
+HINT_NOP1 rm16 [m: o16 0f 18 /1] P6,UNDOC
+HINT_NOP1 rm32 [m: o32 0f 18 /1] P6,UNDOC
+HINT_NOP1 rm64 [m: o64 0f 18 /1] X64,UNDOC
+HINT_NOP2 rm16 [m: o16 0f 18 /2] P6,UNDOC
+HINT_NOP2 rm32 [m: o32 0f 18 /2] P6,UNDOC
+HINT_NOP2 rm64 [m: o64 0f 18 /2] X64,UNDOC
+HINT_NOP3 rm16 [m: o16 0f 18 /3] P6,UNDOC
+HINT_NOP3 rm32 [m: o32 0f 18 /3] P6,UNDOC
+HINT_NOP3 rm64 [m: o64 0f 18 /3] X64,UNDOC
+HINT_NOP4 rm16 [m: o16 0f 18 /4] P6,UNDOC
+HINT_NOP4 rm32 [m: o32 0f 18 /4] P6,UNDOC
+HINT_NOP4 rm64 [m: o64 0f 18 /4] X64,UNDOC
+HINT_NOP5 rm16 [m: o16 0f 18 /5] P6,UNDOC
+HINT_NOP5 rm32 [m: o32 0f 18 /5] P6,UNDOC
+HINT_NOP5 rm64 [m: o64 0f 18 /5] X64,UNDOC
+HINT_NOP6 rm16 [m: o16 0f 18 /6] P6,UNDOC
+HINT_NOP6 rm32 [m: o32 0f 18 /6] P6,UNDOC
+HINT_NOP6 rm64 [m: o64 0f 18 /6] X64,UNDOC
+HINT_NOP7 rm16 [m: o16 0f 18 /7] P6,UNDOC
+HINT_NOP7 rm32 [m: o32 0f 18 /7] P6,UNDOC
+HINT_NOP7 rm64 [m: o64 0f 18 /7] X64,UNDOC
+HINT_NOP8 rm16 [m: o16 0f 19 /0] P6,UNDOC
+HINT_NOP8 rm32 [m: o32 0f 19 /0] P6,UNDOC
+HINT_NOP8 rm64 [m: o64 0f 19 /0] X64,UNDOC
+HINT_NOP9 rm16 [m: o16 0f 19 /1] P6,UNDOC
+HINT_NOP9 rm32 [m: o32 0f 19 /1] P6,UNDOC
+HINT_NOP9 rm64 [m: o64 0f 19 /1] X64,UNDOC
+HINT_NOP10 rm16 [m: o16 0f 19 /2] P6,UNDOC
+HINT_NOP10 rm32 [m: o32 0f 19 /2] P6,UNDOC
+HINT_NOP10 rm64 [m: o64 0f 19 /2] X64,UNDOC
+HINT_NOP11 rm16 [m: o16 0f 19 /3] P6,UNDOC
+HINT_NOP11 rm32 [m: o32 0f 19 /3] P6,UNDOC
+HINT_NOP11 rm64 [m: o64 0f 19 /3] X64,UNDOC
+HINT_NOP12 rm16 [m: o16 0f 19 /4] P6,UNDOC
+HINT_NOP12 rm32 [m: o32 0f 19 /4] P6,UNDOC
+HINT_NOP12 rm64 [m: o64 0f 19 /4] X64,UNDOC
+HINT_NOP13 rm16 [m: o16 0f 19 /5] P6,UNDOC
+HINT_NOP13 rm32 [m: o32 0f 19 /5] P6,UNDOC
+HINT_NOP13 rm64 [m: o64 0f 19 /5] X64,UNDOC
+HINT_NOP14 rm16 [m: o16 0f 19 /6] P6,UNDOC
+HINT_NOP14 rm32 [m: o32 0f 19 /6] P6,UNDOC
+HINT_NOP14 rm64 [m: o64 0f 19 /6] X64,UNDOC
+HINT_NOP15 rm16 [m: o16 0f 19 /7] P6,UNDOC
+HINT_NOP15 rm32 [m: o32 0f 19 /7] P6,UNDOC
+HINT_NOP15 rm64 [m: o64 0f 19 /7] X64,UNDOC
+HINT_NOP16 rm16 [m: o16 0f 1a /0] P6,UNDOC
+HINT_NOP16 rm32 [m: o32 0f 1a /0] P6,UNDOC
+HINT_NOP16 rm64 [m: o64 0f 1a /0] X64,UNDOC
+HINT_NOP17 rm16 [m: o16 0f 1a /1] P6,UNDOC
+HINT_NOP17 rm32 [m: o32 0f 1a /1] P6,UNDOC
+HINT_NOP17 rm64 [m: o64 0f 1a /1] X64,UNDOC
+HINT_NOP18 rm16 [m: o16 0f 1a /2] P6,UNDOC
+HINT_NOP18 rm32 [m: o32 0f 1a /2] P6,UNDOC
+HINT_NOP18 rm64 [m: o64 0f 1a /2] X64,UNDOC
+HINT_NOP19 rm16 [m: o16 0f 1a /3] P6,UNDOC
+HINT_NOP19 rm32 [m: o32 0f 1a /3] P6,UNDOC
+HINT_NOP19 rm64 [m: o64 0f 1a /3] X64,UNDOC
+HINT_NOP20 rm16 [m: o16 0f 1a /4] P6,UNDOC
+HINT_NOP20 rm32 [m: o32 0f 1a /4] P6,UNDOC
+HINT_NOP20 rm64 [m: o64 0f 1a /4] X64,UNDOC
+HINT_NOP21 rm16 [m: o16 0f 1a /5] P6,UNDOC
+HINT_NOP21 rm32 [m: o32 0f 1a /5] P6,UNDOC
+HINT_NOP21 rm64 [m: o64 0f 1a /5] X64,UNDOC
+HINT_NOP22 rm16 [m: o16 0f 1a /6] P6,UNDOC
+HINT_NOP22 rm32 [m: o32 0f 1a /6] P6,UNDOC
+HINT_NOP22 rm64 [m: o64 0f 1a /6] X64,UNDOC
+HINT_NOP23 rm16 [m: o16 0f 1a /7] P6,UNDOC
+HINT_NOP23 rm32 [m: o32 0f 1a /7] P6,UNDOC
+HINT_NOP23 rm64 [m: o64 0f 1a /7] X64,UNDOC
+HINT_NOP24 rm16 [m: o16 0f 1b /0] P6,UNDOC
+HINT_NOP24 rm32 [m: o32 0f 1b /0] P6,UNDOC
+HINT_NOP24 rm64 [m: o64 0f 1b /0] X64,UNDOC
+HINT_NOP25 rm16 [m: o16 0f 1b /1] P6,UNDOC
+HINT_NOP25 rm32 [m: o32 0f 1b /1] P6,UNDOC
+HINT_NOP25 rm64 [m: o64 0f 1b /1] X64,UNDOC
+HINT_NOP26 rm16 [m: o16 0f 1b /2] P6,UNDOC
+HINT_NOP26 rm32 [m: o32 0f 1b /2] P6,UNDOC
+HINT_NOP26 rm64 [m: o64 0f 1b /2] X64,UNDOC
+HINT_NOP27 rm16 [m: o16 0f 1b /3] P6,UNDOC
+HINT_NOP27 rm32 [m: o32 0f 1b /3] P6,UNDOC
+HINT_NOP27 rm64 [m: o64 0f 1b /3] X64,UNDOC
+HINT_NOP28 rm16 [m: o16 0f 1b /4] P6,UNDOC
+HINT_NOP28 rm32 [m: o32 0f 1b /4] P6,UNDOC
+HINT_NOP28 rm64 [m: o64 0f 1b /4] X64,UNDOC
+HINT_NOP29 rm16 [m: o16 0f 1b /5] P6,UNDOC
+HINT_NOP29 rm32 [m: o32 0f 1b /5] P6,UNDOC
+HINT_NOP29 rm64 [m: o64 0f 1b /5] X64,UNDOC
+HINT_NOP30 rm16 [m: o16 0f 1b /6] P6,UNDOC
+HINT_NOP30 rm32 [m: o32 0f 1b /6] P6,UNDOC
+HINT_NOP30 rm64 [m: o64 0f 1b /6] X64,UNDOC
+HINT_NOP31 rm16 [m: o16 0f 1b /7] P6,UNDOC
+HINT_NOP31 rm32 [m: o32 0f 1b /7] P6,UNDOC
+HINT_NOP31 rm64 [m: o64 0f 1b /7] X64,UNDOC
+HINT_NOP32 rm16 [m: o16 0f 1c /0] P6,UNDOC
+HINT_NOP32 rm32 [m: o32 0f 1c /0] P6,UNDOC
+HINT_NOP32 rm64 [m: o64 0f 1c /0] X64,UNDOC
+HINT_NOP33 rm16 [m: o16 0f 1c /1] P6,UNDOC
+HINT_NOP33 rm32 [m: o32 0f 1c /1] P6,UNDOC
+HINT_NOP33 rm64 [m: o64 0f 1c /1] X64,UNDOC
+HINT_NOP34 rm16 [m: o16 0f 1c /2] P6,UNDOC
+HINT_NOP34 rm32 [m: o32 0f 1c /2] P6,UNDOC
+HINT_NOP34 rm64 [m: o64 0f 1c /2] X64,UNDOC
+HINT_NOP35 rm16 [m: o16 0f 1c /3] P6,UNDOC
+HINT_NOP35 rm32 [m: o32 0f 1c /3] P6,UNDOC
+HINT_NOP35 rm64 [m: o64 0f 1c /3] X64,UNDOC
+HINT_NOP36 rm16 [m: o16 0f 1c /4] P6,UNDOC
+HINT_NOP36 rm32 [m: o32 0f 1c /4] P6,UNDOC
+HINT_NOP36 rm64 [m: o64 0f 1c /4] X64,UNDOC
+HINT_NOP37 rm16 [m: o16 0f 1c /5] P6,UNDOC
+HINT_NOP37 rm32 [m: o32 0f 1c /5] P6,UNDOC
+HINT_NOP37 rm64 [m: o64 0f 1c /5] X64,UNDOC
+HINT_NOP38 rm16 [m: o16 0f 1c /6] P6,UNDOC
+HINT_NOP38 rm32 [m: o32 0f 1c /6] P6,UNDOC
+HINT_NOP38 rm64 [m: o64 0f 1c /6] X64,UNDOC
+HINT_NOP39 rm16 [m: o16 0f 1c /7] P6,UNDOC
+HINT_NOP39 rm32 [m: o32 0f 1c /7] P6,UNDOC
+HINT_NOP39 rm64 [m: o64 0f 1c /7] X64,UNDOC
+HINT_NOP40 rm16 [m: o16 0f 1d /0] P6,UNDOC
+HINT_NOP40 rm32 [m: o32 0f 1d /0] P6,UNDOC
+HINT_NOP40 rm64 [m: o64 0f 1d /0] X64,UNDOC
+HINT_NOP41 rm16 [m: o16 0f 1d /1] P6,UNDOC
+HINT_NOP41 rm32 [m: o32 0f 1d /1] P6,UNDOC
+HINT_NOP41 rm64 [m: o64 0f 1d /1] X64,UNDOC
+HINT_NOP42 rm16 [m: o16 0f 1d /2] P6,UNDOC
+HINT_NOP42 rm32 [m: o32 0f 1d /2] P6,UNDOC
+HINT_NOP42 rm64 [m: o64 0f 1d /2] X64,UNDOC
+HINT_NOP43 rm16 [m: o16 0f 1d /3] P6,UNDOC
+HINT_NOP43 rm32 [m: o32 0f 1d /3] P6,UNDOC
+HINT_NOP43 rm64 [m: o64 0f 1d /3] X64,UNDOC
+HINT_NOP44 rm16 [m: o16 0f 1d /4] P6,UNDOC
+HINT_NOP44 rm32 [m: o32 0f 1d /4] P6,UNDOC
+HINT_NOP44 rm64 [m: o64 0f 1d /4] X64,UNDOC
+HINT_NOP45 rm16 [m: o16 0f 1d /5] P6,UNDOC
+HINT_NOP45 rm32 [m: o32 0f 1d /5] P6,UNDOC
+HINT_NOP45 rm64 [m: o64 0f 1d /5] X64,UNDOC
+HINT_NOP46 rm16 [m: o16 0f 1d /6] P6,UNDOC
+HINT_NOP46 rm32 [m: o32 0f 1d /6] P6,UNDOC
+HINT_NOP46 rm64 [m: o64 0f 1d /6] X64,UNDOC
+HINT_NOP47 rm16 [m: o16 0f 1d /7] P6,UNDOC
+HINT_NOP47 rm32 [m: o32 0f 1d /7] P6,UNDOC
+HINT_NOP47 rm64 [m: o64 0f 1d /7] X64,UNDOC
+HINT_NOP48 rm16 [m: o16 0f 1e /0] P6,UNDOC
+HINT_NOP48 rm32 [m: o32 0f 1e /0] P6,UNDOC
+HINT_NOP48 rm64 [m: o64 0f 1e /0] X64,UNDOC
+HINT_NOP49 rm16 [m: o16 0f 1e /1] P6,UNDOC
+HINT_NOP49 rm32 [m: o32 0f 1e /1] P6,UNDOC
+HINT_NOP49 rm64 [m: o64 0f 1e /1] X64,UNDOC
+HINT_NOP50 rm16 [m: o16 0f 1e /2] P6,UNDOC
+HINT_NOP50 rm32 [m: o32 0f 1e /2] P6,UNDOC
+HINT_NOP50 rm64 [m: o64 0f 1e /2] X64,UNDOC
+HINT_NOP51 rm16 [m: o16 0f 1e /3] P6,UNDOC
+HINT_NOP51 rm32 [m: o32 0f 1e /3] P6,UNDOC
+HINT_NOP51 rm64 [m: o64 0f 1e /3] X64,UNDOC
+HINT_NOP52 rm16 [m: o16 0f 1e /4] P6,UNDOC
+HINT_NOP52 rm32 [m: o32 0f 1e /4] P6,UNDOC
+HINT_NOP52 rm64 [m: o64 0f 1e /4] X64,UNDOC
+HINT_NOP53 rm16 [m: o16 0f 1e /5] P6,UNDOC
+HINT_NOP53 rm32 [m: o32 0f 1e /5] P6,UNDOC
+HINT_NOP53 rm64 [m: o64 0f 1e /5] X64,UNDOC
+HINT_NOP54 rm16 [m: o16 0f 1e /6] P6,UNDOC
+HINT_NOP54 rm32 [m: o32 0f 1e /6] P6,UNDOC
+HINT_NOP54 rm64 [m: o64 0f 1e /6] X64,UNDOC
+HINT_NOP55 rm16 [m: o16 0f 1e /7] P6,UNDOC
+HINT_NOP55 rm32 [m: o32 0f 1e /7] P6,UNDOC
+HINT_NOP55 rm64 [m: o64 0f 1e /7] X64,UNDOC
+HINT_NOP56 rm16 [m: o16 0f 1f /0] P6,UNDOC
+HINT_NOP56 rm32 [m: o32 0f 1f /0] P6,UNDOC
+HINT_NOP56 rm64 [m: o64 0f 1f /0] X64,UNDOC
+HINT_NOP57 rm16 [m: o16 0f 1f /1] P6,UNDOC
+HINT_NOP57 rm32 [m: o32 0f 1f /1] P6,UNDOC
+HINT_NOP57 rm64 [m: o64 0f 1f /1] X64,UNDOC
+HINT_NOP58 rm16 [m: o16 0f 1f /2] P6,UNDOC
+HINT_NOP58 rm32 [m: o32 0f 1f /2] P6,UNDOC
+HINT_NOP58 rm64 [m: o64 0f 1f /2] X64,UNDOC
+HINT_NOP59 rm16 [m: o16 0f 1f /3] P6,UNDOC
+HINT_NOP59 rm32 [m: o32 0f 1f /3] P6,UNDOC
+HINT_NOP59 rm64 [m: o64 0f 1f /3] X64,UNDOC
+HINT_NOP60 rm16 [m: o16 0f 1f /4] P6,UNDOC
+HINT_NOP60 rm32 [m: o32 0f 1f /4] P6,UNDOC
+HINT_NOP60 rm64 [m: o64 0f 1f /4] X64,UNDOC
+HINT_NOP61 rm16 [m: o16 0f 1f /5] P6,UNDOC
+HINT_NOP61 rm32 [m: o32 0f 1f /5] P6,UNDOC
+HINT_NOP61 rm64 [m: o64 0f 1f /5] X64,UNDOC
+HINT_NOP62 rm16 [m: o16 0f 1f /6] P6,UNDOC
+HINT_NOP62 rm32 [m: o32 0f 1f /6] P6,UNDOC
+HINT_NOP62 rm64 [m: o64 0f 1f /6] X64,UNDOC
+HINT_NOP63 rm16 [m: o16 0f 1f /7] P6,UNDOC
+HINT_NOP63 rm32 [m: o32 0f 1f /7] P6,UNDOC
+HINT_NOP63 rm64 [m: o64 0f 1f /7] X64,UNDOC
diff --git a/insns.h b/insns.h
index 4f3dd80..5ab58fa 100644
--- a/insns.h
+++ b/insns.h
@@ -13,17 +13,20 @@
#include "tokens.h"
struct itemplate {
- enum opcode opcode; /* the token, passed from "parser.c" */
- int operands; /* number of operands */
- opflags_t opd[MAX_OPERANDS]; /* bit flags for operand types */
- const uint8_t *code; /* the code it assembles to */
- uint32_t flags; /* some flags */
+ enum opcode opcode; /* the token, passed from "parser.c" */
+ int operands; /* number of operands */
+ opflags_t opd[MAX_OPERANDS]; /* bit flags for operand types */
+ const uint8_t *code; /* the code it assembles to */
+ uint32_t flags; /* some flags */
};
/* Disassembler table structure */
-/* If n == -1, then p points to another table of 256
- struct disasm_index, otherwise p points to a list of n
- struct itemplates to consider. */
+
+/*
+ * If n == -1, then p points to another table of 256
+ * struct disasm_index, otherwise p points to a list of n
+ * struct itemplates to consider.
+ */
struct disasm_index {
const void *p;
int n;
@@ -69,67 +72,77 @@ extern const uint8_t nasm_bytecodes[];
* required to have unspecified size in the instruction too...)
*/
-#define IF_SM 0x00000001UL /* size match */
-#define IF_SM2 0x00000002UL /* size match first two operands */
-#define IF_SB 0x00000004UL /* unsized operands can't be non-byte */
-#define IF_SW 0x00000008UL /* unsized operands can't be non-word */
-#define IF_SD 0x0000000CUL /* unsized operands can't be non-dword */
-#define IF_SQ 0x00000010UL /* unsized operands can't be non-qword */
-#define IF_SO 0x00000014UL /* unsized operands can't be non-oword */
-#define IF_SY 0x00000018UL /* unsized operands can't be non-yword */
-#define IF_SZ 0x00000038UL /* unsized operands must match the bitsize */
-#define IF_SX 0x0000003CUL /* unsized operands not allowed */
-#define IF_SMASK 0x0000003CUL /* mask for unsized argument size */
-#define IF_AR0 0x00000040UL /* SB, SW, SD applies to argument 0 */
-#define IF_AR1 0x00000080UL /* SB, SW, SD applies to argument 1 */
-#define IF_AR2 0x000000C0UL /* SB, SW, SD applies to argument 2 */
-#define IF_AR3 0x00000100UL /* SB, SW, SD applies to argument 3 */
-#define IF_AR4 0x00000140UL /* SB, SW, SD applies to argument 4 */
-#define IF_ARMASK 0x000001C0UL /* mask for unsized argument spec */
-#define IF_ARSHFT 6 /* LSB in IF_ARMASK */
+#define IF_SM 0x00000001UL /* size match */
+#define IF_SM2 0x00000002UL /* size match first two operands */
+#define IF_SB 0x00000004UL /* unsized operands can't be non-byte */
+#define IF_SW 0x00000008UL /* unsized operands can't be non-word */
+#define IF_SD 0x0000000CUL /* unsized operands can't be non-dword */
+#define IF_SQ 0x00000010UL /* unsized operands can't be non-qword */
+#define IF_SO 0x00000014UL /* unsized operands can't be non-oword */
+#define IF_SY 0x00000018UL /* unsized operands can't be non-yword */
+#define IF_SZ 0x00000038UL /* unsized operands must match the bitsize */
+#define IF_SX 0x0000003CUL /* unsized operands not allowed */
+#define IF_SMASK 0x0000003CUL /* mask for unsized argument size */
+#define IF_AR0 0x00000040UL /* SB, SW, SD applies to argument 0 */
+#define IF_AR1 0x00000080UL /* SB, SW, SD applies to argument 1 */
+#define IF_AR2 0x000000C0UL /* SB, SW, SD applies to argument 2 */
+#define IF_AR3 0x00000100UL /* SB, SW, SD applies to argument 3 */
+#define IF_AR4 0x00000140UL /* SB, SW, SD applies to argument 4 */
+#define IF_ARMASK 0x000001C0UL /* mask for unsized argument spec */
+#define IF_ARSHFT 6 /* LSB in IF_ARMASK */
+#define IF_OPT 0x00000200UL /* optimizing assembly only */
/* The next 3 bits aren't actually used for anything */
-#define IF_PRIV 0x00000000UL /* it's a privileged instruction */
-#define IF_SMM 0x00000000UL /* it's only valid in SMM */
-#define IF_PROT 0x00000000UL /* it's protected mode only */
-#define IF_NOLONG 0x00000800UL /* it's not available in long mode */
-#define IF_UNDOC 0x00001000UL /* it's an undocumented instruction */
-#define IF_FPU 0x00002000UL /* it's an FPU instruction */
-#define IF_MMX 0x00004000UL /* it's an MMX instruction */
-#define IF_3DNOW 0x00008000UL /* it's a 3DNow! instruction */
-#define IF_SSE 0x00010000UL /* it's a SSE (KNI, MMX2) instruction */
-#define IF_SSE2 0x00020000UL /* it's a SSE2 instruction */
-#define IF_SSE3 0x00040000UL /* it's a SSE3 (PNI) instruction */
-#define IF_VMX 0x00080000UL /* it's a VMX instruction */
-#define IF_LONG 0x00100000UL /* long mode instruction */
-#define IF_SSSE3 0x00200000UL /* it's an SSSE3 instruction */
-#define IF_SSE4A 0x00400000UL /* AMD SSE4a */
-#define IF_SSE41 0x00800000UL /* it's an SSE4.1 instruction */
-#define IF_SSE42 0x00800000UL /* HACK NEED TO REORGANIZE THESE BITS */
-#define IF_SSE5 0x00800000UL /* HACK NEED TO REORGANIZE THESE BITS */
-#define IF_AVX 0x00800000UL /* HACK NEED TO REORGANIZE THESE BITS */
-#define IF_FMA 0x00800000UL /* HACK NEED TO REORGANIZE THESE BITS */
-#define IF_PMASK 0xFF000000UL /* the mask for processor types */
-#define IF_PLEVEL 0x0F000000UL /* the mask for processor instr. level */
- /* also the highest possible processor */
-#define IF_PFMASK 0xF01FFF00UL /* the mask for disassembly "prefer" */
-#define IF_8086 0x00000000UL /* 8086 instruction */
-#define IF_186 0x01000000UL /* 186+ instruction */
-#define IF_286 0x02000000UL /* 286+ instruction */
-#define IF_386 0x03000000UL /* 386+ instruction */
-#define IF_486 0x04000000UL /* 486+ instruction */
-#define IF_PENT 0x05000000UL /* Pentium instruction */
-#define IF_P6 0x06000000UL /* P6 instruction */
-#define IF_KATMAI 0x07000000UL /* Katmai instructions */
-#define IF_WILLAMETTE 0x08000000UL /* Willamette instructions */
-#define IF_PRESCOTT 0x09000000UL /* Prescott instructions */
-#define IF_X86_64 0x0A000000UL /* x86-64 instruction (long or legacy mode) */
-#define IF_NEHALEM 0x0B000000UL /* Nehalem instruction */
-#define IF_WESTMERE 0x0C000000UL /* Westmere instruction */
-#define IF_SANDYBRIDGE 0x0D000000UL /* Sandy Bridge instruction */
-#define IF_FUTURE 0x0E000000UL /* Future processor (not yet disclosed) */
-#define IF_X64 (IF_LONG|IF_X86_64)
-#define IF_IA64 0x0F000000UL /* IA64 instructions (in x86 mode) */
-#define IF_CYRIX 0x10000000UL /* Cyrix-specific instruction */
-#define IF_AMD 0x20000000UL /* AMD-specific instruction */
+#define IF_PRIV 0x00000000UL /* it's a privileged instruction */
+#define IF_SMM 0x00000000UL /* it's only valid in SMM */
+#define IF_PROT 0x00000000UL /* it's protected mode only */
+#define IF_LOCK 0x00000400UL /* lockable if operand 0 is memory */
+#define IF_NOLONG 0x00000800UL /* it's not available in long mode */
+#define IF_LONG 0x00001000UL /* long mode instruction */
+#define IF_NOHLE 0x00002000UL /* HLE prefixes forbidden */
+/* These flags are currently not used for anything - intended for insn set */
+#define IF_UNDOC 0x00000000UL /* it's an undocumented instruction */
+#define IF_FPU 0x00000000UL /* it's an FPU instruction */
+#define IF_MMX 0x00000000UL /* it's an MMX instruction */
+#define IF_3DNOW 0x00000000UL /* it's a 3DNow! instruction */
+#define IF_SSE 0x00000000UL /* it's a SSE (KNI, MMX2) instruction */
+#define IF_SSE2 0x00000000UL /* it's a SSE2 instruction */
+#define IF_SSE3 0x00000000UL /* it's a SSE3 (PNI) instruction */
+#define IF_VMX 0x00000000UL /* it's a VMX instruction */
+#define IF_SSSE3 0x00000000UL /* it's an SSSE3 instruction */
+#define IF_SSE4A 0x00000000UL /* AMD SSE4a */
+#define IF_SSE41 0x00000000UL /* it's an SSE4.1 instruction */
+#define IF_SSE42 0x00000000UL /* HACK NEED TO REORGANIZE THESE BITS */
+#define IF_SSE5 0x00000000UL /* HACK NEED TO REORGANIZE THESE BITS */
+#define IF_AVX 0x00000000UL /* HACK NEED TO REORGANIZE THESE BITS */
+#define IF_AVX2 0x00000000UL /* HACK NEED TO REORGANIZE THESE BITS */
+#define IF_FMA 0x00000000UL /* HACK NEED TO REORGANIZE THESE BITS */
+#define IF_BMI1 0x00000000UL /* HACK NEED TO REORGANIZE THESE BITS */
+#define IF_BMI2 0x00000000UL /* HACK NEED TO REORGANIZE THESE BITS */
+#define IF_HLE 0x00000000UL /* HACK NEED TO REORGANIZE THESE BITS */
+#define IF_RTM 0x00000000UL /* HACK NEED TO REORGANIZE THESE BITS */
+#define IF_INVPCID 0x00000000UL /* HACK NEED TO REORGANIZE THESE BITS */
+#define IF_PMASK 0xFF000000UL /* the mask for processor types */
+#define IF_PLEVEL 0x0F000000UL /* the mask for processor instr. level */
+ /* also the highest possible processor */
+#define IF_PFMASK 0xF01FF800UL /* the mask for disassembly "prefer" */
+#define IF_8086 0x00000000UL /* 8086 instruction */
+#define IF_186 0x01000000UL /* 186+ instruction */
+#define IF_286 0x02000000UL /* 286+ instruction */
+#define IF_386 0x03000000UL /* 386+ instruction */
+#define IF_486 0x04000000UL /* 486+ instruction */
+#define IF_PENT 0x05000000UL /* Pentium instruction */
+#define IF_P6 0x06000000UL /* P6 instruction */
+#define IF_KATMAI 0x07000000UL /* Katmai instructions */
+#define IF_WILLAMETTE 0x08000000UL /* Willamette instructions */
+#define IF_PRESCOTT 0x09000000UL /* Prescott instructions */
+#define IF_X86_64 0x0A000000UL /* x86-64 instruction (long or legacy mode) */
+#define IF_NEHALEM 0x0B000000UL /* Nehalem instruction */
+#define IF_WESTMERE 0x0C000000UL /* Westmere instruction */
+#define IF_SANDYBRIDGE 0x0D000000UL /* Sandy Bridge instruction */
+#define IF_FUTURE 0x0E000000UL /* Future processor (not yet disclosed) */
+#define IF_X64 (IF_LONG|IF_X86_64)
+#define IF_IA64 0x0F000000UL /* IA64 instructions (in x86 mode) */
+#define IF_CYRIX 0x10000000UL /* Cyrix-specific instruction */
+#define IF_AMD 0x20000000UL /* AMD-specific instruction */
-#endif
+#endif /* NASM_INSNS_H */
diff --git a/insns.pl b/insns.pl
index 5ffdce2..b154dbd 100755
--- a/insns.pl
+++ b/insns.pl
@@ -1,7 +1,7 @@
#!/usr/bin/perl
## --------------------------------------------------------------------------
-##
-## Copyright 1996-2009 The NASM Authors - All Rights Reserved
+##
+## Copyright 1996-2012 The NASM Authors - All Rights Reserved
## See the file AUTHORS included with the NASM distribution for
## the specific copyright holders.
##
@@ -15,7 +15,7 @@
## copyright notice, this list of conditions and the following
## disclaimer in the documentation and/or other materials provided
## with the distribution.
-##
+##
## THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
## CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
## INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
@@ -52,9 +52,9 @@ $vex_classes = scalar(@vex_class);
for ($c = 0; $c < $vex_classes; $c++) {
$vexmap{$vex_class[$c]} = $c;
for ($m = 0; $m < 32; $m++) {
- for ($p = 0; $p < 4; $p++) {
- push(@vexlist, sprintf("%s%02X%01X", $vex_class[$c], $m, $p));
- }
+ for ($p = 0; $p < 4; $p++) {
+ push(@vexlist, sprintf("%s%02X%01X", $vex_class[$c], $m, $p));
+ }
}
}
@disasm_prefixes = (@vexlist, @disasm_prefixes);
@@ -67,13 +67,13 @@ print STDERR "Reading insns.dat...\n";
undef $output;
foreach $arg ( @ARGV ) {
if ( $arg =~ /^\-/ ) {
- if ( $arg =~ /^\-([abdin])$/ ) {
- $output = $1;
- } else {
- die "$0: Unknown option: ${arg}\n";
- }
+ if ( $arg =~ /^\-([abdin])$/ ) {
+ $output = $1;
+ } else {
+ die "$0: Unknown option: ${arg}\n";
+ }
} else {
- push (@args, $arg);
+ push (@args, $arg);
}
}
@@ -91,72 +91,72 @@ while (<F>) {
next if ( /^\s*(\;.*|)$/ ); # comments or blank lines
unless (/^\s*(\S+)\s+(\S+)\s+(\S+|\[.*\])\s+(\S+)\s*$/) {
- warn "line $line does not contain four fields\n";
- next;
+ warn "line $line does not contain four fields\n";
+ next;
}
@fields = ($1, $2, $3, $4);
@field_list = ([@fields, 0]);
if ($fields[1] =~ /\*/) {
- # This instruction has relaxed form(s)
- if ($fields[2] !~ /^\[/) {
- warn "line $line has an * operand but uses raw bytecodes\n";
- next;
- }
-
- $opmask = 0;
- @ops = split(/,/, $fields[1]);
- for ($oi = 0; $oi < scalar @ops; $oi++) {
- if ($ops[$oi] =~ /\*$/) {
- if ($oi == 0) {
- warn "line $line has a first operand with a *\n";
- next;
- }
- $opmask |= 1 << $oi;
- }
- }
-
- for ($oi = 1; $oi < (1 << scalar @ops); $oi++) {
- if (($oi & ~$opmask) == 0) {
- my @xops = ();
- my $omask = ~$oi;
- for ($oj = 0; $oj < scalar(@ops); $oj++) {
- if ($omask & 1) {
- push(@xops, $ops[$oj]);
- }
- $omask >>= 1;
- }
- push(@field_list, [$fields[0], join(',', @xops),
- $fields[2], $fields[3], $oi]);
- }
- }
+ # This instruction has relaxed form(s)
+ if ($fields[2] !~ /^\[/) {
+ warn "line $line has an * operand but uses raw bytecodes\n";
+ next;
+ }
+
+ $opmask = 0;
+ @ops = split(/,/, $fields[1]);
+ for ($oi = 0; $oi < scalar @ops; $oi++) {
+ if ($ops[$oi] =~ /\*$/) {
+ if ($oi == 0) {
+ warn "line $line has a first operand with a *\n";
+ next;
+ }
+ $opmask |= 1 << $oi;
+ }
+ }
+
+ for ($oi = 1; $oi < (1 << scalar @ops); $oi++) {
+ if (($oi & ~$opmask) == 0) {
+ my @xops = ();
+ my $omask = ~$oi;
+ for ($oj = 0; $oj < scalar(@ops); $oj++) {
+ if ($omask & 1) {
+ push(@xops, $ops[$oj]);
+ }
+ $omask >>= 1;
+ }
+ push(@field_list, [$fields[0], join(',', @xops),
+ $fields[2], $fields[3], $oi]);
+ }
+ }
}
foreach $fptr (@field_list) {
- @fields = @$fptr;
- ($formatted, $nd) = format_insn(@fields);
- if ($formatted) {
- $insns++;
- $aname = "aa_$fields[0]";
- push @$aname, $formatted;
- }
- if ( $fields[0] =~ /cc$/ ) {
- # Conditional instruction
- $k_opcodes_cc{$fields[0]}++;
- } else {
- # Unconditional instruction
- $k_opcodes{$fields[0]}++;
- }
- if ($formatted && !$nd) {
- push @big, $formatted;
- my @sseq = startseq($fields[2], $fields[4]);
- foreach $i (@sseq) {
- if (!defined($dinstables{$i})) {
- $dinstables{$i} = [];
- }
- push(@{$dinstables{$i}}, $#big);
- }
- }
+ @fields = @$fptr;
+ ($formatted, $nd) = format_insn(@fields);
+ if ($formatted) {
+ $insns++;
+ $aname = "aa_$fields[0]";
+ push @$aname, $formatted;
+ }
+ if ( $fields[0] =~ /cc$/ ) {
+ # Conditional instruction
+ $k_opcodes_cc{$fields[0]}++;
+ } else {
+ # Unconditional instruction
+ $k_opcodes{$fields[0]}++;
+ }
+ if ($formatted && !$nd) {
+ push @big, $formatted;
+ my @sseq = startseq($fields[2], $fields[4]);
+ foreach $i (@sseq) {
+ if (!defined($dinstables{$i})) {
+ $dinstables{$i} = [];
+ }
+ push(@{$dinstables{$i}}, $#big);
+ }
+ }
}
}
@@ -178,9 +178,9 @@ foreach $bl (@bytecode_list) {
push(@bytecode_array, $bl);
while ($h ne '') {
- $bytecode_pos{$h} = $bytecode_next;
- $h = substr($h, 2);
- $bytecode_next++;
+ $bytecode_pos{$h} = $bytecode_next;
+ $h = substr($h, 2);
+ $bytecode_next++;
}
}
undef @bytecode_list;
@@ -203,12 +203,12 @@ if ( !defined($output) || $output eq 'b') {
$p = 0;
foreach $bl (@bytecode_array) {
- printf B " /* %5d */ ", $p;
- foreach $d (@$bl) {
- printf B "%#o,", $d;
- $p++;
- }
- printf B "\n";
+ printf B " /* %5d */ ", $p;
+ foreach $d (@$bl) {
+ printf B "%#o,", $d;
+ $p++;
+ }
+ printf B "\n";
}
print B "};\n";
@@ -217,12 +217,12 @@ if ( !defined($output) || $output eq 'b') {
print B " * Bytecode frequencies (including reuse):\n";
print B " *\n";
for ($i = 0; $i < 32; $i++) {
- print B " *";
- for ($j = 0; $j < 256; $j += 32) {
- print B " |" if ($j);
- printf B " %3o:%4d", $i+$j, $bytecode_count[$i+$j];
- }
- print B "\n";
+ print B " *";
+ for ($j = 0; $j < 256; $j += 32) {
+ print B " |" if ($j);
+ printf B " %3o:%4d", $i+$j, $bytecode_count[$i+$j];
+ }
+ print B "\n";
}
print B " */\n";
@@ -241,16 +241,16 @@ if ( !defined($output) || $output eq 'a' ) {
print A "#include \"insns.h\"\n\n";
foreach $i (@opcodes, @opcodes_cc) {
- print A "static const struct itemplate instrux_${i}[] = {\n";
- $aname = "aa_$i";
- foreach $j (@$aname) {
- print A " ", codesubst($j), "\n";
- }
- print A " ITEMPLATE_END\n};\n\n";
+ print A "static const struct itemplate instrux_${i}[] = {\n";
+ $aname = "aa_$i";
+ foreach $j (@$aname) {
+ print A " ", codesubst($j), "\n";
+ }
+ print A " ITEMPLATE_END\n};\n\n";
}
print A "const struct itemplate * const nasm_instructions[] = {\n";
foreach $i (@opcodes, @opcodes_cc) {
- print A " instrux_${i},\n";
+ print A " instrux_${i},\n";
}
print A "};\n";
@@ -271,69 +271,69 @@ if ( !defined($output) || $output eq 'd' ) {
print D "static const struct itemplate instrux[] = {\n";
$n = 0;
foreach $j (@big) {
- printf D " /* %4d */ %s\n", $n++, codesubst($j);
+ printf D " /* %4d */ %s\n", $n++, codesubst($j);
}
print D "};\n";
foreach $h (sort(keys(%dinstables))) {
- next if ($h eq ''); # Skip pseudo-instructions
- print D "\nstatic const struct itemplate * const itable_${h}[] = {\n";
- foreach $j (@{$dinstables{$h}}) {
- print D " instrux + $j,\n";
- }
- print D "};\n";
+ next if ($h eq ''); # Skip pseudo-instructions
+ print D "\nstatic const struct itemplate * const itable_${h}[] = {\n";
+ foreach $j (@{$dinstables{$h}}) {
+ print D " instrux + $j,\n";
+ }
+ print D "};\n";
}
@prefix_list = ();
foreach $h (@disasm_prefixes, '') {
- for ($c = 0; $c < 256; $c++) {
- $nn = sprintf("%s%02X", $h, $c);
- if ($is_prefix{$nn} || defined($dinstables{$nn})) {
- # At least one entry in this prefix table
- push(@prefix_list, $h);
- $is_prefix{$h} = 1;
- last;
- }
- }
+ for ($c = 0; $c < 256; $c++) {
+ $nn = sprintf("%s%02X", $h, $c);
+ if ($is_prefix{$nn} || defined($dinstables{$nn})) {
+ # At least one entry in this prefix table
+ push(@prefix_list, $h);
+ $is_prefix{$h} = 1;
+ last;
+ }
+ }
}
foreach $h (@prefix_list) {
- print D "\n";
- print D "static " unless ($h eq '');
- print D "const struct disasm_index ";
- print D ($h eq '') ? 'itable' : "itable_$h";
- print D "[256] = {\n";
- for ($c = 0; $c < 256; $c++) {
- $nn = sprintf("%s%02X", $h, $c);
- if ($is_prefix{$nn}) {
- die "$fname: ambiguous decoding of $nn\n"
- if (defined($dinstables{$nn}));
- printf D " /* 0x%02x */ { itable_%s, -1 },\n", $c, $nn;
- } elsif (defined($dinstables{$nn})) {
- printf D " /* 0x%02x */ { itable_%s, %u },\n", $c,
- $nn, scalar(@{$dinstables{$nn}});
- } else {
- printf D " /* 0x%02x */ { NULL, 0 },\n", $c;
- }
- }
- print D "};\n";
+ print D "\n";
+ print D "static " unless ($h eq '');
+ print D "const struct disasm_index ";
+ print D ($h eq '') ? 'itable' : "itable_$h";
+ print D "[256] = {\n";
+ for ($c = 0; $c < 256; $c++) {
+ $nn = sprintf("%s%02X", $h, $c);
+ if ($is_prefix{$nn}) {
+ die "$fname: ambiguous decoding of $nn\n"
+ if (defined($dinstables{$nn}));
+ printf D " /* 0x%02x */ { itable_%s, -1 },\n", $c, $nn;
+ } elsif (defined($dinstables{$nn})) {
+ printf D " /* 0x%02x */ { itable_%s, %u },\n", $c,
+ $nn, scalar(@{$dinstables{$nn}});
+ } else {
+ printf D " /* 0x%02x */ { NULL, 0 },\n", $c;
+ }
+ }
+ print D "};\n";
}
printf D "\nconst struct disasm_index * const itable_vex[%d][32][4] =\n",
$vex_classes;
print D "{\n";
for ($c = 0; $c < $vex_classes; $c++) {
- print D " {\n";
- for ($m = 0; $m < 32; $m++) {
- print D " { ";
- for ($p = 0; $p < 4; $p++) {
- $vp = sprintf("%s%02X%01X", $vex_class[$c], $m, $p);
- printf D "%-15s",
- ($is_prefix{$vp} ? sprintf("itable_%s,", $vp) : 'NULL,');
- }
- print D "},\n";
- }
- print D " },\n";
+ print D " {\n";
+ for ($m = 0; $m < 32; $m++) {
+ print D " { ";
+ for ($p = 0; $p < 4; $p++) {
+ $vp = sprintf("%s%02X%01X", $vex_class[$c], $m, $p);
+ printf D "%-15s",
+ ($is_prefix{$vp} ? sprintf("itable_%s,", $vp) : 'NULL,');
+ }
+ print D "},\n";
+ }
+ print D " },\n";
}
print D "};\n";
@@ -355,10 +355,10 @@ if ( !defined($output) || $output eq 'i' ) {
print I "enum opcode {\n";
$maxlen = 0;
foreach $i (@opcodes, @opcodes_cc) {
- print I "\tI_${i},\n";
- $len = length($i);
- $len++ if ( $i =~ /cc$/ ); # Condition codes can be 3 characters long
- $maxlen = $len if ( $len > $maxlen );
+ print I "\tI_${i},\n";
+ $len = length($i);
+ $len++ if ( $i =~ /cc$/ ); # Condition codes can be 3 characters long
+ $maxlen = $len if ( $len > $maxlen );
}
print I "\tI_none = -1\n";
print I "};\n\n";
@@ -381,12 +381,12 @@ if ( !defined($output) || $output eq 'n' ) {
print N "const char * const nasm_insn_names[] = {";
$first = 1;
foreach $i (@opcodes, @opcodes_cc) {
- print N "," if ( !$first );
- $first = 0;
- $ilower = $i;
- $ilower =~ s/cc$//; # Remove conditional cc suffix
- $ilower =~ tr/A-Z/a-z/; # Change to lower case (Perl 4 compatible)
- print N "\n\t\"${ilower}\"";
+ print N "," if ( !$first );
+ $first = 0;
+ $ilower = $i;
+ $ilower =~ s/cc$//; # Remove conditional cc suffix
+ $ilower =~ tr/A-Z/a-z/; # Change to lower case (Perl 4 compatible)
+ print N "\n\t\"${ilower}\"";
}
print N "\n};\n";
close N;
@@ -398,24 +398,24 @@ printf STDERR "Done: %d instructions\n", $insns;
sub count_bytecodes(@) {
my $skip = 0;
foreach my $bc (@_) {
- if ($skip) {
- $skip--;
- next;
- }
- $bytecode_count[$bc]++;
- if ($bc >= 01 && $bc <= 04) {
- $skip = $bc;
- } elsif (($bc & ~03) == 010) {
- $skip = 1;
- } elsif (($bc & ~013) == 0144) {
- $skip = 1;
- } elsif ($bc == 0172) {
- $skip = 1;
- } elsif ($bc >= 0260 && $bc <= 0270) {
- $skip = 2;
- } elsif ($bc == 0330) {
- $skip = 1;
- }
+ if ($skip) {
+ $skip--;
+ next;
+ }
+ $bytecode_count[$bc]++;
+ if ($bc >= 01 && $bc <= 04) {
+ $skip = $bc;
+ } elsif (($bc & ~03) == 010) {
+ $skip = 1;
+ } elsif (($bc & ~013) == 0144) {
+ $skip = 1;
+ } elsif ($bc == 0172 || $bc == 0173) {
+ $skip = 1;
+ } elsif ($bc >= 0260 && $bc <= 0270) {
+ $skip = 2;
+ } elsif ($bc == 0330) {
+ $skip = 1;
+ }
}
}
@@ -432,38 +432,38 @@ sub format_insn($$$$$) {
$operands =~ s/:/|colon,/g;
@ops = ();
if ($operands ne 'void') {
- foreach $op (split(/,/, $operands)) {
- if ($op =~ /^\=([0-9]+)$/) {
- $op = "same_as|$1";
- } else {
- @opx = ();
- foreach $opp (split(/\|/, $op)) {
- @oppx = ();
- if ($opp =~ /^(.*[^\d])(8|16|32|64|80|128|256)$/) {
- my $ox = $1;
- my $on = $2;
- if ($ox !~ /^sbyte$/) {
- $opp = $ox;
- push(@oppx, "bits$on");
- }
- }
- $opp =~ s/^mem$/memory/;
- $opp =~ s/^memory_offs$/mem_offs/;
- $opp =~ s/^imm$/immediate/;
- $opp =~ s/^([a-z]+)rm$/rm_$1/;
- $opp =~ s/^rm$/rm_gpr/;
- $opp =~ s/^reg$/reg_gpr/;
- push(@opx, $opp, @oppx);
- }
- $op = join('|', @opx);
- }
- push(@ops, $op);
- }
+ foreach $op (split(/,/, $operands)) {
+ if ($op =~ /^\=([0-9]+)$/) {
+ $op = "same_as|$1";
+ } else {
+ @opx = ();
+ foreach $opp (split(/\|/, $op)) {
+ @oppx = ();
+ if ($opp =~ /^(.*[^\d])(8|16|32|64|80|128|256)$/) {
+ my $ox = $1;
+ my $on = $2;
+ if ($ox !~ /^(sbyte|sdword|udword)$/) {
+ $opp = $ox;
+ push(@oppx, "bits$on");
+ }
+ }
+ $opp =~ s/^mem$/memory/;
+ $opp =~ s/^memory_offs$/mem_offs/;
+ $opp =~ s/^imm$/immediate/;
+ $opp =~ s/^([a-z]+)rm$/rm_$1/;
+ $opp =~ s/^rm$/rm_gpr/;
+ $opp =~ s/^reg$/reg_gpr/;
+ push(@opx, $opp, @oppx);
+ }
+ $op = join('|', @opx);
+ }
+ push(@ops, $op);
+ }
}
$num = scalar(@ops);
while (scalar(@ops) < $MAX_OPERANDS) {
- push(@ops, '0');
+ push(@ops, '0');
}
$operands = join(',', @ops);
$operands =~ tr/a-z/A-Z/;
@@ -490,11 +490,11 @@ sub codesubst($) {
my $n;
while ($s =~ /\@\@CODES-([0-9A-F]+)\@\@/) {
- my $pos = $bytecode_pos{$1};
- if (!defined($pos)) {
- die "$fname: no position assigned to byte code $1\n";
- }
- $s = $` . "nasm_bytecodes+${pos}" . "$'";
+ my $pos = $bytecode_pos{$1};
+ if (!defined($pos)) {
+ die "$fname: no position assigned to byte code $1\n";
+ }
+ $s = $` . "nasm_bytecodes+${pos}" . "$'";
}
return $s;
}
@@ -505,7 +505,7 @@ sub addprefix ($@) {
my @l = ();
foreach $x (@list) {
- push(@l, sprintf("%s%02X", $prefix, $x));
+ push(@l, sprintf("%s%02X", $prefix, $x));
}
return @l;
@@ -521,23 +521,25 @@ sub decodify($$) {
my($codestr, $relax) = @_;
if ($codestr =~ /^\s*\[([^\]]*)\]\s*$/) {
- return byte_code_compile($1, $relax);
+ return byte_code_compile($1, $relax);
}
my $c = $codestr;
my @codes = ();
- while ($c ne '') {
- if ($c =~ /^\\x([0-9a-f]+)(.*)$/i) {
- push(@codes, hex $1);
- $c = $2;
- next;
- } elsif ($c =~ /^\\([0-7]{1,3})(.*)$/) {
- push(@codes, oct $1);
- $c = $2;
- next;
- } else {
- die "$fname: unknown code format in \"$codestr\"\n";
+ unless ($codestr eq 'ignore') {
+ while ($c ne '') {
+ if ($c =~ /^\\x([0-9a-f]+)(.*)$/i) {
+ push(@codes, hex $1);
+ $c = $2;
+ next;
+ } elsif ($c =~ /^\\([0-7]{1,3})(.*)$/) {
+ push(@codes, oct $1);
+ $c = $2;
+ next;
+ } else {
+ die "$fname: unknown code format in \"$codestr\"\n";
+ }
}
}
@@ -550,7 +552,7 @@ sub hexstr(@) {
my $c;
foreach $c (@_) {
- $s .= sprintf("%02X", $c);
+ $s .= sprintf("%02X", $c);
}
return $s;
}
@@ -575,63 +577,63 @@ sub startseq($$) {
@codes = decodify($codestr, $relax);
while ($c0 = shift(@codes)) {
- $c1 = $codes[0];
- if ($c0 >= 01 && $c0 <= 04) {
- # Fixed byte string
- my $fbs = $prefix;
- while (1) {
- if ($c0 >= 01 && $c0 <= 04) {
- while ($c0--) {
- $fbs .= sprintf("%02X", shift(@codes));
- }
- } else {
- last;
- }
- $c0 = shift(@codes);
- }
-
- foreach $pfx (@disasm_prefixes) {
- if (substr($fbs, 0, length($pfx)) eq $pfx) {
- $prefix = $pfx;
- $fbs = substr($fbs, length($pfx));
- last;
- }
- }
-
- if ($fbs ne '') {
- return ($prefix.substr($fbs,0,2));
- }
-
- unshift(@codes, $c0);
- } elsif ($c0 >= 010 && $c0 <= 013) {
- return addprefix($prefix, $c1..($c1+7));
- } elsif (($c0 & ~013) == 0144) {
- return addprefix($prefix, $c1, $c1|2);
- } elsif ($c0 == 0330) {
- return addprefix($prefix, $c1..($c1+15));
- } elsif ($c0 == 0 || $c0 == 0340) {
- return $prefix;
- } elsif ($c0 == 0344) {
- return addprefix($prefix, 0x06, 0x0E, 0x16, 0x1E);
- } elsif ($c0 == 0345) {
- return addprefix($prefix, 0x07, 0x17, 0x1F);
- } elsif ($c0 == 0346) {
- return addprefix($prefix, 0xA0, 0xA8);
- } elsif ($c0 == 0347) {
- return addprefix($prefix, 0xA1, 0xA9);
- } elsif (($c0 & ~3) == 0260 || $c0 == 0270) {
- my $c,$m,$wlp;
- $m = shift(@codes);
- $wlp = shift(@codes);
- $c = ($m >> 6);
- $m = $m & 31;
- $prefix .= sprintf('%s%02X%01X', $vex_class[$c], $m, $wlp & 3);
- } elsif ($c0 >= 0172 && $c0 <= 174) {
- shift(@codes); # Skip is4 control byte
- } else {
- # We really need to be able to distinguish "forbidden"
- # and "ignorable" codes here
- }
+ $c1 = $codes[0];
+ if ($c0 >= 01 && $c0 <= 04) {
+ # Fixed byte string
+ my $fbs = $prefix;
+ while (1) {
+ if ($c0 >= 01 && $c0 <= 04) {
+ while ($c0--) {
+ $fbs .= sprintf("%02X", shift(@codes));
+ }
+ } else {
+ last;
+ }
+ $c0 = shift(@codes);
+ }
+
+ foreach $pfx (@disasm_prefixes) {
+ if (substr($fbs, 0, length($pfx)) eq $pfx) {
+ $prefix = $pfx;
+ $fbs = substr($fbs, length($pfx));
+ last;
+ }
+ }
+
+ if ($fbs ne '') {
+ return ($prefix.substr($fbs,0,2));
+ }
+
+ unshift(@codes, $c0);
+ } elsif ($c0 >= 010 && $c0 <= 013) {
+ return addprefix($prefix, $c1..($c1+7));
+ } elsif (($c0 & ~013) == 0144) {
+ return addprefix($prefix, $c1, $c1|2);
+ } elsif ($c0 == 0330) {
+ return addprefix($prefix, $c1..($c1+15));
+ } elsif ($c0 == 0 || $c0 == 0340) {
+ return $prefix;
+ } elsif ($c0 == 0344) {
+ return addprefix($prefix, 0x06, 0x0E, 0x16, 0x1E);
+ } elsif ($c0 == 0345) {
+ return addprefix($prefix, 0x07, 0x17, 0x1F);
+ } elsif ($c0 == 0346) {
+ return addprefix($prefix, 0xA0, 0xA8);
+ } elsif ($c0 == 0347) {
+ return addprefix($prefix, 0xA1, 0xA9);
+ } elsif (($c0 & ~3) == 0260 || $c0 == 0270) {
+ my $c,$m,$wlp;
+ $m = shift(@codes);
+ $wlp = shift(@codes);
+ $c = ($m >> 6);
+ $m = $m & 31;
+ $prefix .= sprintf('%s%02X%01X', $vex_class[$c], $m, $wlp & 3);
+ } elsif ($c0 >= 0172 && $c0 <= 173) {
+ shift(@codes); # Skip is4 control byte
+ } else {
+ # We really need to be able to distinguish "forbidden"
+ # and "ignorable" codes here
+ }
}
return $prefix;
}
@@ -649,7 +651,6 @@ sub startseq($$) {
# r = register field in the modr/m
# m = modr/m
# v = VEX "v" field
-# d = DREX "dst" field
# i = immediate
# s = register field of is4/imz2 field
# - = implicit (unencoded) operand
@@ -668,267 +669,264 @@ sub byte_code_compile($$) {
my $op, $oq;
my $opex;
+ my %imm_codes = (
+ 'ib,s' => 014, # Signed imm8
+ 'ib' => 020, # imm8
+ 'ib,u' => 024, # Unsigned imm8
+ 'iw' => 030, # imm16
+ 'ibx' => 0274, # imm8 sign-extended to opsize
+ 'iwd' => 034, # imm16 or imm32, depending on opsize
+ 'id' => 040, # imm32
+ 'idx' => 0254, # imm32 extended to 64 bits
+ 'iwdq' => 044, # imm16/32/64, depending on opsize
+ 'rel8' => 050,
+ 'iq' => 054,
+ 'rel16' => 060,
+ 'rel' => 064, # 16 or 32 bit relative operand
+ 'rel32' => 070,
+ 'seg' => 074,
+ 'ibw' => 0140, # imm16 that can be bytified
+ 'ibd' => 0150, # imm32 that can be bytified
+ 'ibd,s' => 0250 # imm32 that can be bytified, sign extended to 64 bits
+ );
+ my %imm_codes_bytifiers = (
+ 'ibw' => 0144,
+ 'ibd' => 0154,
+ 'ibd,s' => 0154
+ );
+ my %plain_codes = (
+ 'o16' => 0320, # 16-bit operand size
+ 'o32' => 0321, # 32-bit operand size
+ 'odf' => 0322, # Operand size is default
+ 'o64' => 0324, # 64-bit operand size requiring REX.W
+ 'o64nw' => 0323, # Implied 64-bit operand size (no REX.W)
+ 'a16' => 0310,
+ 'a32' => 0311,
+ 'adf' => 0312, # Address size is default
+ 'a64' => 0313,
+ '!osp' => 0364,
+ '!asp' => 0365,
+ 'f2i' => 0332, # F2 prefix, but 66 for operand size is OK
+ 'f3i' => 0333, # F3 prefix, but 66 for operand size is OK
+ 'pushseg' => 0344,
+ 'popseg' => 0345,
+ 'pushseg2' => 0346,
+ 'popseg2' => 0347,
+ 'mustrep' => 0336,
+ 'mustrepne' => 0337,
+ 'rex.l' => 0334,
+ 'norexb' => 0314,
+ 'norexx' => 0315,
+ 'norexr' => 0316,
+ 'norexw' => 0317,
+ 'repe' => 0335,
+ 'nohi' => 0325, # Use spl/bpl/sil/dil even without REX
+ 'wait' => 0341, # Needs a wait prefix
+ 'resb' => 0340,
+ 'jcc8' => 0370, # Match only if Jcc possible with single byte
+ 'jmp8' => 0371, # Match only if JMP possible with single byte
+ 'jlen' => 0373, # Length of jump
+ 'hlexr' => 0271,
+ 'hlenl' => 0272,
+ 'hle' => 0273,
+ # This instruction takes XMM VSIB
+ 'vsibx' => 0374,
+ 'vm32x' => 0374,
+ 'vm64x' => 0374,
+ # This instruction takes YMM VSIB
+ 'vsiby' => 0375,
+ 'vm32y' => 0375,
+ 'vm64y' => 0375
+ );
+
unless ($str =~ /^(([^\s:]*)\:|)\s*(.*\S)\s*$/) {
- die "$fname: $line: cannot parse: [$str]\n";
+ die "$fname: $line: cannot parse: [$str]\n";
}
$opr = "\L$2";
$opc = "\L$3";
my $op = 0;
for ($i = 0; $i < length($opr); $i++) {
- my $c = substr($opr,$i,1);
- if ($c eq '+') {
- $op--;
- } else {
- if ($relax & 1) {
- $op--;
- }
- $relax >>= 1;
- $oppos{$c} = $op++;
- }
+ my $c = substr($opr,$i,1);
+ if ($c eq '+') {
+ $op--;
+ } else {
+ if ($relax & 1) {
+ $op--;
+ }
+ $relax >>= 1;
+ $oppos{$c} = $op++;
+ }
}
- $prefix_ok = 1;
+ my $last_imm = 'h';
+ my $prefix_ok = 1;
foreach $op (split(/\s*(?:\s|(?=[\/\\]))/, $opc)) {
- if ($op eq 'o16') {
- push(@codes, 0320);
- } elsif ($op eq 'o32') {
- push(@codes, 0321);
- } elsif ($op eq 'o64') { # 64-bit operand size requiring REX.W
- push(@codes, 0324);
- } elsif ($op eq 'o64nw') { # Implied 64-bit operand size (no REX.W)
- push(@codes, 0323);
- } elsif ($op eq 'a16') {
- push(@codes, 0310);
- } elsif ($op eq 'a32') {
- push(@codes, 0311);
- } elsif ($op eq 'a64') {
- push(@codes, 0313);
- } elsif ($op eq '!osp') {
- push(@codes, 0364);
- } elsif ($op eq '!asp') {
- push(@codes, 0365);
- } elsif ($op eq 'rex.l') {
- push(@codes, 0334);
- } elsif ($op eq 'repe') {
- push(@codes, 0335);
- } elsif ($op eq 'nohi') { # Use spl/bpl/sil/dil even without REX
- push(@codes, 0325);
- } elsif ($prefix_ok && $op =~ /^(66|f2|f3|np)$/) {
- # 66/F2/F3 prefix used as an opcode extension, or np = no prefix
- if ($op eq '66') {
- push(@codes, 0361);
- } elsif ($op eq 'f2') {
- push(@codes, 0362);
- } elsif ($op eq 'f3') {
- push(@codes, 0363);
- } else {
- push(@codes, 0360);
- }
- } elsif ($op =~ /^[0-9a-f]{2}$/) {
- if (defined($litix) && $litix+$codes[$litix]+1 == scalar @codes &&
- $codes[$litix] < 4) {
- $codes[$litix]++;
- push(@codes, hex $op);
- } else {
- $litix = scalar(@codes);
- push(@codes, 01, hex $op);
- }
- $prefix_ok = 0;
- } elsif ($op eq '/r') {
- if (!defined($oppos{'r'}) || !defined($oppos{'m'})) {
- die "$fname: $line: $op requires r and m operands\n";
- }
- $opex = (($oppos{'m'} & 4) ? 06 : 0) |
- (($oppos{'r'} & 4) ? 05 : 0);
- push(@codes, $opex) if ($opex);
- push(@codes, 0100 + (($oppos{'m'} & 3) << 3) + ($oppos{'r'} & 3));
- $prefix_ok = 0;
- } elsif ($op =~ m:^/([0-7])$:) {
- if (!defined($oppos{'m'})) {
- die "$fname: $line: $op requires m operand\n";
- }
- push(@codes, 06) if ($oppos{'m'} & 4);
- push(@codes, 0200 + (($oppos{'m'} & 3) << 3) + $1);
- $prefix_ok = 0;
- } elsif ($op =~ /^(vex|xop)(|\..*)$/) {
- my $c = $vexmap{$1};
- my ($m,$w,$l,$p) = (undef,2,undef,0);
- my $has_nds = 0;
- my @subops = split(/\./, $op);
- shift @subops; # Drop prefix
- foreach $oq (@subops) {
- if ($oq eq '128' || $oq eq 'l0' || $oq eq 'lz') {
- $l = 0;
- } elsif ($oq eq '256' || $oq eq 'l1') {
- $l = 1;
- } elsif ($oq eq 'lig') {
- $l = 2;
- } elsif ($oq eq 'w0') {
- $w = 0;
- } elsif ($oq eq 'w1') {
- $w = 1;
- } elsif ($oq eq 'wig') {
- $w = 2;
- } elsif ($oq eq 'ww') {
- $w = 3;
- } elsif ($oq eq 'p0') {
- $p = 0;
- } elsif ($oq eq '66' || $oq eq 'p1') {
- $p = 1;
- } elsif ($oq eq 'f3' || $oq eq 'p2') {
- $p = 2;
- } elsif ($oq eq 'f2' || $oq eq 'p3') {
- $p = 3;
- } elsif ($oq eq '0f') {
- $m = 1;
- } elsif ($oq eq '0f38') {
- $m = 2;
- } elsif ($oq eq '0f3a') {
- $m = 3;
- } elsif ($oq =~ /^m([0-9]+)$/) {
- $m = $1+0;
- } elsif ($oq eq 'nds' || $oq eq 'ndd' || $oq eq 'dds') {
- if (!defined($oppos{'v'})) {
- die "$fname: $line: vex.$oq without 'v' operand\n";
- }
- $has_nds = 1;
- } else {
- die "$fname: $line: undefined VEX subcode: $oq\n";
- }
- }
- if (!defined($m) || !defined($w) || !defined($l) || !defined($p)) {
- die "$fname: $line: missing fields in VEX specification\n";
- }
- if (defined($oppos{'v'}) && !$has_nds) {
- die "$fname: $line: 'v' operand without vex.nds or vex.ndd\n";
- }
- push(@codes, defined($oppos{'v'}) ? 0260+($oppos{'v'} & 3) : 0270,
- ($c << 6)+$m, ($w << 4)+($l << 2)+$p);
- $prefix_ok = 0;
- } elsif ($op =~ /^\/drex([01])$/) {
- my $oc0 = $1;
- if (!defined($oppos{'d'})) {
- die "$fname: $line: DREX without a 'd' operand\n";
- }
- # Note the use of *unshift* here, as opposed to *push*.
- # This is because NASM want this byte code at the start of
- # the instruction sequence, but the AMD documentation puts
- # this at (roughly) the position of the drex byte itself.
- # This allows us to match the AMD documentation and still
- # do the right thing.
- unshift(@codes, 0160+($oppos{'d'} & 3)+($oc0 ? 4 : 0));
- unshift(@codes, 05) if ($oppos{'d'} & 4);
- } elsif ($op =~ /^(ib\,s|ib|ibx|ib\,w|iw|iwd|id|idx|iwdq|rel|rel8|rel16|rel32|iq|seg|ibw|ibd|ibd,s)$/) {
- if (!defined($oppos{'i'})) {
- die "$fname: $line: $op without 'i' operand\n";
- }
- if ($op eq 'ib,s') { # Signed imm8
- push(@codes, 05) if ($oppos{'i'} & 4);
- push(@codes, 014+($oppos{'i'} & 3));
- } elsif ($op eq 'ib') { # imm8
- push(@codes, 05) if ($oppos{'i'} & 4);
- push(@codes, 020+($oppos{'i'} & 3));
- } elsif ($op eq 'ib,u') { # Unsigned imm8
- push(@codes, 05) if ($oppos{'i'} & 4);
- push(@codes, 024+($oppos{'i'} & 3));
- } elsif ($op eq 'iw') { # imm16
- push(@codes, 05) if ($oppos{'i'} & 4);
- push(@codes, 030+($oppos{'i'} & 3));
- } elsif ($op eq 'ibx') { # imm8 sign-extended to opsize
- push(@codes, 05) if ($oppos{'i'} & 4);
- push(@codes, 0274+($oppos{'i'} & 3));
- } elsif ($op eq 'iwd') { # imm16 or imm32, depending on opsize
- push(@codes, 05) if ($oppos{'i'} & 4);
- push(@codes, 034+($oppos{'i'} & 3));
- } elsif ($op eq 'id') { # imm32
- push(@codes, 05) if ($oppos{'i'} & 4);
- push(@codes, 040+($oppos{'i'} & 3));
- } elsif ($op eq 'idx') { # imm32 extended to 64 bits
- push(@codes, 05) if ($oppos{'i'} & 4);
- push(@codes, 0254+($oppos{'i'} & 3));
- } elsif ($op eq 'iwdq') { # imm16/32/64, depending on opsize
- push(@codes, 05) if ($oppos{'i'} & 4);
- push(@codes, 044+($oppos{'i'} & 3));
- } elsif ($op eq 'rel8') {
- push(@codes, 05) if ($oppos{'i'} & 4);
- push(@codes, 050+($oppos{'i'} & 3));
- } elsif ($op eq 'iq') {
- push(@codes, 05) if ($oppos{'i'} & 4);
- push(@codes, 054+($oppos{'i'} & 3));
- } elsif ($op eq 'rel16') {
- push(@codes, 05) if ($oppos{'i'} & 4);
- push(@codes, 060+($oppos{'i'} & 3));
- } elsif ($op eq 'rel') { # 16 or 32 bit relative operand
- push(@codes, 05) if ($oppos{'i'} & 4);
- push(@codes, 064+($oppos{'i'} & 3));
- } elsif ($op eq 'rel32') {
- push(@codes, 05) if ($oppos{'i'} & 4);
- push(@codes, 070+($oppos{'i'} & 3));
- } elsif ($op eq 'seg') {
- push(@codes, 05) if ($oppos{'i'} & 4);
- push(@codes, 074+($oppos{'i'} & 3));
- } elsif ($op eq 'ibw') { # imm16 that can be bytified
- if (!defined($s_pos)) {
- die "$fname: $line: $op without a +s byte\n";
- }
- $codes[$s_pos] += 0144;
- push(@codes, 05) if ($oppos{'i'} & 4);
- push(@codes, 0140+($oppos{'i'} & 3));
- } elsif ($op eq 'ibd') { # imm32 that can be bytified
- if (!defined($s_pos)) {
- die "$fname: $line: $op without a +s byte\n";
- }
- $codes[$s_pos] += 0154;
- push(@codes, 05) if ($oppos{'i'} & 4);
- push(@codes, 0150+($oppos{'i'} & 3));
- } elsif ($op eq 'ibd,s') {
- # imm32 that can be bytified, sign extended to 64 bits
- if (!defined($s_pos)) {
- die "$fname: $line: $op without a +s byte\n";
- }
- $codes[$s_pos] += 0154;
- push(@codes, 05) if ($oppos{'i'} & 4);
- push(@codes, 0250+($oppos{'i'} & 3));
- }
- $prefix_ok = 0;
- } elsif ($op eq '/is4') {
- if (!defined($oppos{'s'})) {
- die "$fname: $line: $op without 's' operand\n";
- }
- if (defined($oppos{'i'})) {
- push(@codes, 0172, ($oppos{'s'} << 3)+$oppos{'i'});
- } else {
- push(@codes, 0174, $oppos{'s'});
- }
- $prefix_ok = 0;
- } elsif ($op =~ /^\/is4\=([0-9]+)$/) {
- my $imm = $1;
- if (!defined($oppos{'s'})) {
- die "$fname: $line: $op without 's' operand\n";
- }
- if ($imm < 0 || $imm > 15) {
- die "$fname: $line: invalid imm4 value for $op: $imm\n";
- }
- push(@codes, 0173, ($oppos{'s'} << 4) + $imm);
- $prefix_ok = 0;
- } elsif ($op =~ /^([0-9a-f]{2})\+s$/) {
- if (!defined($oppos{'i'})) {
- die "$fname: $line: $op without 'i' operand\n";
- }
- $s_pos = scalar @codes;
- push(@codes, 05) if ($oppos{'i'} & 4);
- push(@codes, $oppos{'i'} & 3, hex $1);
- $prefix_ok = 0;
- } elsif ($op =~ /^([0-9a-f]{2})\+c$/) {
- push(@codes, 0330, hex $1);
- $prefix_ok = 0;
- } elsif ($op =~ /^\\([0-7]+|x[0-9a-f]{2})$/) {
- # Escape to enter literal bytecodes
- push(@codes, oct $1);
- } else {
- die "$fname: $line: unknown operation: $op\n";
- }
+ my $pc = $plain_codes{$op};
+
+ if (defined $pc) {
+ # Plain code
+ push(@codes, $pc);
+ } elsif ($prefix_ok && $op =~ /^(66|f2|f3|np)$/) {
+ # 66/F2/F3 prefix used as an opcode extension, or np = no prefix
+ if ($op eq '66') {
+ push(@codes, 0361);
+ } elsif ($op eq 'f2') {
+ push(@codes, 0362);
+ } elsif ($op eq 'f3') {
+ push(@codes, 0363);
+ } else {
+ push(@codes, 0360);
+ }
+ } elsif ($op =~ /^[0-9a-f]{2}$/) {
+ if (defined($litix) && $litix+$codes[$litix]+1 == scalar @codes &&
+ $codes[$litix] < 4) {
+ $codes[$litix]++;
+ push(@codes, hex $op);
+ } else {
+ $litix = scalar(@codes);
+ push(@codes, 01, hex $op);
+ }
+ $prefix_ok = 0;
+ } elsif ($op eq '/r') {
+ if (!defined($oppos{'r'}) || !defined($oppos{'m'})) {
+ die "$fname: $line: $op requires r and m operands\n";
+ }
+ $opex = (($oppos{'m'} & 4) ? 06 : 0) |
+ (($oppos{'r'} & 4) ? 05 : 0);
+ push(@codes, $opex) if ($opex);
+ push(@codes, 0100 + (($oppos{'m'} & 3) << 3) + ($oppos{'r'} & 3));
+ $prefix_ok = 0;
+ } elsif ($op =~ m:^/([0-7])$:) {
+ if (!defined($oppos{'m'})) {
+ die "$fname: $line: $op requires m operand\n";
+ }
+ push(@codes, 06) if ($oppos{'m'} & 4);
+ push(@codes, 0200 + (($oppos{'m'} & 3) << 3) + $1);
+ $prefix_ok = 0;
+ } elsif ($op =~ /^(vex|xop)(|\..*)$/) {
+ my $c = $vexmap{$1};
+ my ($m,$w,$l,$p) = (undef,2,undef,0);
+ my $has_nds = 0;
+ my @subops = split(/\./, $op);
+ shift @subops; # Drop prefix
+ foreach $oq (@subops) {
+ if ($oq eq '128' || $oq eq 'l0' || $oq eq 'lz') {
+ $l = 0;
+ } elsif ($oq eq '256' || $oq eq 'l1') {
+ $l = 1;
+ } elsif ($oq eq 'lig') {
+ $l = 2;
+ } elsif ($oq eq 'w0') {
+ $w = 0;
+ } elsif ($oq eq 'w1') {
+ $w = 1;
+ } elsif ($oq eq 'wig') {
+ $w = 2;
+ } elsif ($oq eq 'ww') {
+ $w = 3;
+ } elsif ($oq eq 'p0') {
+ $p = 0;
+ } elsif ($oq eq '66' || $oq eq 'p1') {
+ $p = 1;
+ } elsif ($oq eq 'f3' || $oq eq 'p2') {
+ $p = 2;
+ } elsif ($oq eq 'f2' || $oq eq 'p3') {
+ $p = 3;
+ } elsif ($oq eq '0f') {
+ $m = 1;
+ } elsif ($oq eq '0f38') {
+ $m = 2;
+ } elsif ($oq eq '0f3a') {
+ $m = 3;
+ } elsif ($oq =~ /^m([0-9]+)$/) {
+ $m = $1+0;
+ } elsif ($oq eq 'nds' || $oq eq 'ndd' || $oq eq 'dds') {
+ if (!defined($oppos{'v'})) {
+ die "$fname: $line: vex.$oq without 'v' operand\n";
+ }
+ $has_nds = 1;
+ } else {
+ die "$fname: $line: undefined VEX subcode: $oq\n";
+ }
+ }
+ if (!defined($m) || !defined($w) || !defined($l) || !defined($p)) {
+ die "$fname: $line: missing fields in VEX specification\n";
+ }
+ if (defined($oppos{'v'}) && !$has_nds) {
+ die "$fname: $line: 'v' operand without vex.nds or vex.ndd\n";
+ }
+ push(@codes, defined($oppos{'v'}) ? 0260+($oppos{'v'} & 3) : 0270,
+ ($c << 6)+$m, ($w << 4)+($l << 2)+$p);
+ $prefix_ok = 0;
+ } elsif (defined $imm_codes{$op}) {
+ if ($op eq 'seg') {
+ if ($last_imm lt 'i') {
+ die "$fname: $line: seg without an immediate operand\n";
+ }
+ } else {
+ $last_imm++;
+ if ($last_imm gt 'j') {
+ die "$fname: $line: too many immediate operands\n";
+ }
+ }
+ if (!defined($oppos{$last_imm})) {
+ die "$fname: $line: $op without '$last_imm' operand\n";
+ }
+ push(@codes, 05) if ($oppos{$last_imm} & 4);
+ push(@codes, $imm_codes{$op} + ($oppos{$last_imm} & 3));
+ if (defined $imm_codes_bytifiers{$op}) {
+ if (!defined($s_pos)) {
+ die "$fname: $line: $op without a +s byte\n";
+ }
+ $codes[$s_pos] += $imm_codes_bytifiers{$op};
+ }
+ $prefix_ok = 0;
+ } elsif ($op eq '/is4') {
+ if (!defined($oppos{'s'})) {
+ die "$fname: $line: $op without 's' operand\n";
+ }
+ if (defined($oppos{'i'})) {
+ push(@codes, 0172, ($oppos{'s'} << 3)+$oppos{'i'});
+ } else {
+ push(@codes, 05) if ($oppos{'s'} & 4);
+ push(@codes, 0174+($oppos{'s'} & 3));
+ }
+ $prefix_ok = 0;
+ } elsif ($op =~ /^\/is4\=([0-9]+)$/) {
+ my $imm = $1;
+ if (!defined($oppos{'s'})) {
+ die "$fname: $line: $op without 's' operand\n";
+ }
+ if ($imm < 0 || $imm > 15) {
+ die "$fname: $line: invalid imm4 value for $op: $imm\n";
+ }
+ push(@codes, 0173, ($oppos{'s'} << 4) + $imm);
+ $prefix_ok = 0;
+ } elsif ($op =~ /^([0-9a-f]{2})\+s$/) {
+ if (!defined($oppos{'i'})) {
+ die "$fname: $line: $op without 'i' operand\n";
+ }
+ $s_pos = scalar @codes;
+ push(@codes, 05) if ($oppos{'i'} & 4);
+ push(@codes, $oppos{'i'} & 3, hex $1);
+ $prefix_ok = 0;
+ } elsif ($op =~ /^([0-9a-f]{2})\+c$/) {
+ push(@codes, 0330, hex $1);
+ $prefix_ok = 0;
+ } elsif ($op =~ /^([0-9a-f]{2})\+r$/) {
+ if (!defined($oppos{'r'})) {
+ die "$fname: $line: $op without 'r' operand\n";
+ }
+ push(@codes, 05) if ($oppos{'r'} & 4);
+ push(@codes, 010 + ($oppos{'r'} & 3), hex $1);
+ $prefix_ok = 0;
+ } elsif ($op =~ /^\\([0-7]+|x[0-9a-f]{2})$/) {
+ # Escape to enter literal bytecodes
+ push(@codes, oct $1);
+ } else {
+ die "$fname: $line: unknown operation: $op\n";
+ }
}
return @codes;
diff --git a/insnsa.c b/insnsa.c
index f6e9559..174977b 100644
--- a/insnsa.c
+++ b/insnsa.c
@@ -4,869 +4,927 @@
#include "insns.h"
static const struct itemplate instrux_AAA[] = {
- {I_AAA, 0, {0,0,0,0,0}, nasm_bytecodes+19680, IF_8086|IF_NOLONG},
+ {I_AAA, 0, {0,0,0,0,0}, nasm_bytecodes+22117, IF_8086|IF_NOLONG},
ITEMPLATE_END
};
static const struct itemplate instrux_AAD[] = {
- {I_AAD, 0, {0,0,0,0,0}, nasm_bytecodes+18632, IF_8086|IF_NOLONG},
- {I_AAD, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+18636, IF_8086|IF_SB|IF_NOLONG},
+ {I_AAD, 0, {0,0,0,0,0}, nasm_bytecodes+21129, IF_8086|IF_NOLONG},
+ {I_AAD, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+21133, IF_8086|IF_SB|IF_NOLONG},
ITEMPLATE_END
};
static const struct itemplate instrux_AAM[] = {
- {I_AAM, 0, {0,0,0,0,0}, nasm_bytecodes+18640, IF_8086|IF_NOLONG},
- {I_AAM, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+18644, IF_8086|IF_SB|IF_NOLONG},
+ {I_AAM, 0, {0,0,0,0,0}, nasm_bytecodes+21137, IF_8086|IF_NOLONG},
+ {I_AAM, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+21141, IF_8086|IF_SB|IF_NOLONG},
ITEMPLATE_END
};
static const struct itemplate instrux_AAS[] = {
- {I_AAS, 0, {0,0,0,0,0}, nasm_bytecodes+19683, IF_8086|IF_NOLONG},
+ {I_AAS, 0, {0,0,0,0,0}, nasm_bytecodes+22120, IF_8086|IF_NOLONG},
ITEMPLATE_END
};
static const struct itemplate instrux_ADC[] = {
- {I_ADC, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+18648, IF_8086|IF_SM},
- {I_ADC, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+18648, IF_8086},
- {I_ADC, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16772, IF_8086|IF_SM},
- {I_ADC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16772, IF_8086},
- {I_ADC, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16777, IF_386|IF_SM},
- {I_ADC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16777, IF_386},
- {I_ADC, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16782, IF_X64|IF_SM},
- {I_ADC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16782, IF_X64},
- {I_ADC, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+9884, IF_8086|IF_SM},
- {I_ADC, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+9884, IF_8086},
- {I_ADC, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16787, IF_8086|IF_SM},
- {I_ADC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16787, IF_8086},
- {I_ADC, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+16792, IF_386|IF_SM},
- {I_ADC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16792, IF_386},
- {I_ADC, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+16797, IF_X64|IF_SM},
- {I_ADC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16797, IF_X64},
- {I_ADC, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13220, IF_8086},
- {I_ADC, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13226, IF_386},
- {I_ADC, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13232, IF_X64},
- {I_ADC, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+18652, IF_8086|IF_SM},
- {I_ADC, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+13220, IF_8086|IF_SM},
- {I_ADC, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+16802, IF_8086|IF_SM},
- {I_ADC, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+13226, IF_386|IF_SM},
- {I_ADC, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+16807, IF_386|IF_SM},
- {I_ADC, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+13232, IF_X64|IF_SM},
- {I_ADC, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+16812, IF_X64|IF_SM},
- {I_ADC, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+16817, IF_8086|IF_SM},
- {I_ADC, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+13238, IF_8086|IF_SM},
- {I_ADC, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+13244, IF_386|IF_SM},
- {I_ADC, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+13250, IF_X64|IF_SM},
- {I_ADC, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16817, IF_8086|IF_SM},
- {I_ADC, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+13238, IF_8086|IF_SM},
- {I_ADC, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+13244, IF_386|IF_SM},
+ {I_ADC, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19399, IF_8086|IF_SM|IF_LOCK},
+ {I_ADC, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19400, IF_8086},
+ {I_ADC, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+15799, IF_8086|IF_SM|IF_LOCK},
+ {I_ADC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+15800, IF_8086},
+ {I_ADC, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+15805, IF_386|IF_SM|IF_LOCK},
+ {I_ADC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+15806, IF_386},
+ {I_ADC, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+15811, IF_X64|IF_SM|IF_LOCK},
+ {I_ADC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+15812, IF_X64},
+ {I_ADC, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+10636, IF_8086|IF_SM},
+ {I_ADC, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+10636, IF_8086},
+ {I_ADC, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+19404, IF_8086|IF_SM},
+ {I_ADC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+19404, IF_8086},
+ {I_ADC, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+19409, IF_386|IF_SM},
+ {I_ADC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+19409, IF_386},
+ {I_ADC, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+19414, IF_X64|IF_SM},
+ {I_ADC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+19414, IF_X64},
+ {I_ADC, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7322, IF_8086|IF_LOCK},
+ {I_ADC, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7329, IF_386|IF_LOCK},
+ {I_ADC, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7336, IF_X64|IF_LOCK},
+ {I_ADC, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+21145, IF_8086|IF_SM},
+ {I_ADC, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+7323, IF_8086|IF_SM},
+ {I_ADC, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+19419, IF_8086|IF_SM},
+ {I_ADC, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+7330, IF_386|IF_SM},
+ {I_ADC, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+19424, IF_386|IF_SM},
+ {I_ADC, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+7337, IF_X64|IF_SM},
+ {I_ADC, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+19429, IF_X64|IF_SM},
+ {I_ADC, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+15817, IF_8086|IF_SM|IF_LOCK},
+ {I_ADC, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+7343, IF_8086|IF_SM|IF_LOCK},
+ {I_ADC, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+7350, IF_386|IF_SM|IF_LOCK},
+ {I_ADC, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+7357, IF_X64|IF_SM|IF_LOCK},
+ {I_ADC, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+15817, IF_8086|IF_SM|IF_LOCK},
+ {I_ADC, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+7343, IF_8086|IF_SM|IF_LOCK},
+ {I_ADC, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+7350, IF_386|IF_SM|IF_LOCK},
+ {I_ADC, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+15823, IF_8086|IF_SM|IF_LOCK|IF_NOLONG},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ADCX[] = {
+ {I_ADCX, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+5282, IF_FUTURE},
+ {I_ADCX, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+5290, IF_LONG|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_ADD[] = {
- {I_ADD, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+18656, IF_8086|IF_SM},
- {I_ADD, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+18656, IF_8086},
- {I_ADD, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16822, IF_8086|IF_SM},
- {I_ADD, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16822, IF_8086},
- {I_ADD, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16827, IF_386|IF_SM},
- {I_ADD, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16827, IF_386},
- {I_ADD, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16832, IF_X64|IF_SM},
- {I_ADD, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16832, IF_X64},
- {I_ADD, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+10535, IF_8086|IF_SM},
- {I_ADD, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+10535, IF_8086},
- {I_ADD, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16837, IF_8086|IF_SM},
- {I_ADD, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16837, IF_8086},
- {I_ADD, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+16842, IF_386|IF_SM},
- {I_ADD, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16842, IF_386},
- {I_ADD, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+16847, IF_X64|IF_SM},
- {I_ADD, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16847, IF_X64},
- {I_ADD, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13256, IF_8086},
- {I_ADD, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13262, IF_386},
- {I_ADD, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13268, IF_X64},
- {I_ADD, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+18660, IF_8086|IF_SM},
- {I_ADD, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+13256, IF_8086|IF_SM},
- {I_ADD, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+16852, IF_8086|IF_SM},
- {I_ADD, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+13262, IF_386|IF_SM},
- {I_ADD, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+16857, IF_386|IF_SM},
- {I_ADD, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+13268, IF_X64|IF_SM},
- {I_ADD, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+16862, IF_X64|IF_SM},
- {I_ADD, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+16867, IF_8086|IF_SM},
- {I_ADD, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+13274, IF_8086|IF_SM},
- {I_ADD, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+13280, IF_386|IF_SM},
- {I_ADD, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+13286, IF_X64|IF_SM},
- {I_ADD, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16867, IF_8086|IF_SM},
- {I_ADD, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+13274, IF_8086|IF_SM},
- {I_ADD, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+13280, IF_386|IF_SM},
+ {I_ADD, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19434, IF_8086|IF_SM|IF_LOCK},
+ {I_ADD, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19435, IF_8086},
+ {I_ADD, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+15829, IF_8086|IF_SM|IF_LOCK},
+ {I_ADD, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+15830, IF_8086},
+ {I_ADD, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+15835, IF_386|IF_SM|IF_LOCK},
+ {I_ADD, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+15836, IF_386},
+ {I_ADD, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+15841, IF_X64|IF_SM|IF_LOCK},
+ {I_ADD, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+15842, IF_X64},
+ {I_ADD, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+14381, IF_8086|IF_SM},
+ {I_ADD, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+14381, IF_8086},
+ {I_ADD, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+19439, IF_8086|IF_SM},
+ {I_ADD, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+19439, IF_8086},
+ {I_ADD, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+19444, IF_386|IF_SM},
+ {I_ADD, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+19444, IF_386},
+ {I_ADD, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+19449, IF_X64|IF_SM},
+ {I_ADD, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+19449, IF_X64},
+ {I_ADD, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7364, IF_8086|IF_LOCK},
+ {I_ADD, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7371, IF_386|IF_LOCK},
+ {I_ADD, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7378, IF_X64|IF_LOCK},
+ {I_ADD, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+21149, IF_8086|IF_SM},
+ {I_ADD, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+7365, IF_8086|IF_SM},
+ {I_ADD, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+19454, IF_8086|IF_SM},
+ {I_ADD, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+7372, IF_386|IF_SM},
+ {I_ADD, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+19459, IF_386|IF_SM},
+ {I_ADD, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+7379, IF_X64|IF_SM},
+ {I_ADD, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+19464, IF_X64|IF_SM},
+ {I_ADD, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+15847, IF_8086|IF_SM|IF_LOCK},
+ {I_ADD, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+7385, IF_8086|IF_SM|IF_LOCK},
+ {I_ADD, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+7392, IF_386|IF_SM|IF_LOCK},
+ {I_ADD, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+7399, IF_X64|IF_SM|IF_LOCK},
+ {I_ADD, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+15847, IF_8086|IF_SM|IF_LOCK},
+ {I_ADD, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+7385, IF_8086|IF_SM|IF_LOCK},
+ {I_ADD, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+7392, IF_386|IF_SM|IF_LOCK},
+ {I_ADD, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+15853, IF_8086|IF_SM|IF_LOCK|IF_NOLONG},
ITEMPLATE_END
};
static const struct itemplate instrux_ADDPD[] = {
- {I_ADDPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15188, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_ADDPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17779, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_ADDPS[] = {
- {I_ADDPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14468, IF_KATMAI|IF_SSE},
+ {I_ADDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17059, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_ADDSD[] = {
- {I_ADDSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15194, IF_WILLAMETTE|IF_SSE2|IF_SQ},
+ {I_ADDSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17785, IF_WILLAMETTE|IF_SSE2|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_ADDSS[] = {
- {I_ADDSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14474, IF_KATMAI|IF_SSE|IF_SD},
+ {I_ADDSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+17065, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_ADDSUBPD[] = {
- {I_ADDSUBPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15464, IF_PRESCOTT|IF_SSE3|IF_SO},
+ {I_ADDSUBPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18055, IF_PRESCOTT|IF_SSE3|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_ADDSUBPS[] = {
- {I_ADDSUBPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15470, IF_PRESCOTT|IF_SSE3|IF_SO},
+ {I_ADDSUBPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18061, IF_PRESCOTT|IF_SSE3|IF_SO},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ADOX[] = {
+ {I_ADOX, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+5298, IF_FUTURE},
+ {I_ADOX, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+5306, IF_LONG|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_AESDEC[] = {
- {I_AESDEC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8411, IF_SSE|IF_WESTMERE},
+ {I_AESDEC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9163, IF_SSE|IF_WESTMERE},
ITEMPLATE_END
};
static const struct itemplate instrux_AESDECLAST[] = {
- {I_AESDECLAST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8418, IF_SSE|IF_WESTMERE},
+ {I_AESDECLAST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9170, IF_SSE|IF_WESTMERE},
ITEMPLATE_END
};
static const struct itemplate instrux_AESENC[] = {
- {I_AESENC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8397, IF_SSE|IF_WESTMERE},
+ {I_AESENC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9149, IF_SSE|IF_WESTMERE},
ITEMPLATE_END
};
static const struct itemplate instrux_AESENCLAST[] = {
- {I_AESENCLAST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8404, IF_SSE|IF_WESTMERE},
+ {I_AESENCLAST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9156, IF_SSE|IF_WESTMERE},
ITEMPLATE_END
};
static const struct itemplate instrux_AESIMC[] = {
- {I_AESIMC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8425, IF_SSE|IF_WESTMERE},
+ {I_AESIMC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9177, IF_SSE|IF_WESTMERE},
ITEMPLATE_END
};
static const struct itemplate instrux_AESKEYGENASSIST[] = {
- {I_AESKEYGENASSIST, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5856, IF_SSE|IF_WESTMERE},
+ {I_AESKEYGENASSIST, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4362, IF_SSE|IF_WESTMERE},
ITEMPLATE_END
};
static const struct itemplate instrux_AND[] = {
- {I_AND, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+18664, IF_8086|IF_SM},
- {I_AND, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+18664, IF_8086},
- {I_AND, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16872, IF_8086|IF_SM},
- {I_AND, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16872, IF_8086},
- {I_AND, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16877, IF_386|IF_SM},
- {I_AND, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16877, IF_386},
- {I_AND, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16882, IF_X64|IF_SM},
- {I_AND, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16882, IF_X64},
- {I_AND, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+10822, IF_8086|IF_SM},
- {I_AND, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+10822, IF_8086},
- {I_AND, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16887, IF_8086|IF_SM},
- {I_AND, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16887, IF_8086},
- {I_AND, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+16892, IF_386|IF_SM},
- {I_AND, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16892, IF_386},
- {I_AND, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+16897, IF_X64|IF_SM},
- {I_AND, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16897, IF_X64},
- {I_AND, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13292, IF_8086},
- {I_AND, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13298, IF_386},
- {I_AND, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13304, IF_X64},
- {I_AND, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+18668, IF_8086|IF_SM},
- {I_AND, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+13292, IF_8086|IF_SM},
- {I_AND, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+16902, IF_8086|IF_SM},
- {I_AND, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+13298, IF_386|IF_SM},
- {I_AND, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+16907, IF_386|IF_SM},
- {I_AND, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+13304, IF_X64|IF_SM},
- {I_AND, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+16912, IF_X64|IF_SM},
- {I_AND, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+16917, IF_8086|IF_SM},
- {I_AND, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+13310, IF_8086|IF_SM},
- {I_AND, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+13316, IF_386|IF_SM},
- {I_AND, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+13322, IF_X64|IF_SM},
- {I_AND, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16917, IF_8086|IF_SM},
- {I_AND, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+13310, IF_8086|IF_SM},
- {I_AND, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+13316, IF_386|IF_SM},
+ {I_AND, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19469, IF_8086|IF_SM|IF_LOCK},
+ {I_AND, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19470, IF_8086},
+ {I_AND, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+15859, IF_8086|IF_SM|IF_LOCK},
+ {I_AND, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+15860, IF_8086},
+ {I_AND, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+15865, IF_386|IF_SM|IF_LOCK},
+ {I_AND, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+15866, IF_386},
+ {I_AND, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+15871, IF_X64|IF_SM|IF_LOCK},
+ {I_AND, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+15872, IF_X64},
+ {I_AND, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+14661, IF_8086|IF_SM},
+ {I_AND, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+14661, IF_8086},
+ {I_AND, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+19474, IF_8086|IF_SM},
+ {I_AND, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+19474, IF_8086},
+ {I_AND, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+19479, IF_386|IF_SM},
+ {I_AND, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+19479, IF_386},
+ {I_AND, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+19484, IF_X64|IF_SM},
+ {I_AND, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+19484, IF_X64},
+ {I_AND, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7406, IF_8086|IF_LOCK},
+ {I_AND, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7413, IF_386|IF_LOCK},
+ {I_AND, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7420, IF_X64|IF_LOCK},
+ {I_AND, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+21153, IF_8086|IF_SM},
+ {I_AND, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+7407, IF_8086|IF_SM},
+ {I_AND, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+19489, IF_8086|IF_SM},
+ {I_AND, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+7414, IF_386|IF_SM},
+ {I_AND, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+19494, IF_386|IF_SM},
+ {I_AND, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+7421, IF_X64|IF_SM},
+ {I_AND, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+19499, IF_X64|IF_SM},
+ {I_AND, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+15877, IF_8086|IF_SM|IF_LOCK},
+ {I_AND, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+7427, IF_8086|IF_SM|IF_LOCK},
+ {I_AND, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+7434, IF_386|IF_SM|IF_LOCK},
+ {I_AND, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+7441, IF_X64|IF_SM|IF_LOCK},
+ {I_AND, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+15877, IF_8086|IF_SM|IF_LOCK},
+ {I_AND, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+7427, IF_8086|IF_SM|IF_LOCK},
+ {I_AND, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+7434, IF_386|IF_SM|IF_LOCK},
+ {I_AND, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+15883, IF_8086|IF_SM|IF_LOCK|IF_NOLONG},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_ANDN[] = {
+ {I_ANDN, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, nasm_bytecodes+15631, IF_FUTURE|IF_BMI1},
+ {I_ANDN, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, nasm_bytecodes+15638, IF_LONG|IF_FUTURE|IF_BMI1},
ITEMPLATE_END
};
static const struct itemplate instrux_ANDNPD[] = {
- {I_ANDNPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15200, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_ANDNPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17791, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_ANDNPS[] = {
- {I_ANDNPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14480, IF_KATMAI|IF_SSE},
+ {I_ANDNPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17071, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_ANDPD[] = {
- {I_ANDPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15206, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_ANDPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17797, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_ANDPS[] = {
- {I_ANDPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14486, IF_KATMAI|IF_SSE},
+ {I_ANDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17077, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_ARPL[] = {
- {I_ARPL, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18672, IF_286|IF_PROT|IF_SM|IF_NOLONG},
- {I_ARPL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18672, IF_286|IF_PROT|IF_NOLONG},
+ {I_ARPL, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+21157, IF_286|IF_PROT|IF_SM|IF_NOLONG},
+ {I_ARPL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+21157, IF_286|IF_PROT|IF_NOLONG},
ITEMPLATE_END
};
static const struct itemplate instrux_BB0_RESET[] = {
- {I_BB0_RESET, 0, {0,0,0,0,0}, nasm_bytecodes+18676, IF_PENT|IF_CYRIX},
+ {I_BB0_RESET, 0, {0,0,0,0,0}, nasm_bytecodes+21161, IF_PENT|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_BB1_RESET[] = {
- {I_BB1_RESET, 0, {0,0,0,0,0}, nasm_bytecodes+18680, IF_PENT|IF_CYRIX},
+ {I_BB1_RESET, 0, {0,0,0,0,0}, nasm_bytecodes+21165, IF_PENT|IF_CYRIX},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BEXTR[] = {
+ {I_BEXTR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, nasm_bytecodes+15645, IF_FUTURE|IF_BMI1},
+ {I_BEXTR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, nasm_bytecodes+15652, IF_LONG|IF_FUTURE|IF_BMI1},
ITEMPLATE_END
};
static const struct itemplate instrux_BLENDPD[] = {
- {I_BLENDPD, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5688, IF_SSE41},
+ {I_BLENDPD, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4194, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_BLENDPS[] = {
- {I_BLENDPS, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5696, IF_SSE41},
+ {I_BLENDPS, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4202, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_BLENDVPD[] = {
- {I_BLENDVPD, 3, {XMMREG,RM_XMM,XMM0,0,0}, nasm_bytecodes+8117, IF_SSE41},
+ {I_BLENDVPD, 3, {XMMREG,RM_XMM,XMM0,0,0}, nasm_bytecodes+8869, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_BLENDVPS[] = {
- {I_BLENDVPS, 3, {XMMREG,RM_XMM,XMM0,0,0}, nasm_bytecodes+8124, IF_SSE41},
+ {I_BLENDVPS, 3, {XMMREG,RM_XMM,XMM0,0,0}, nasm_bytecodes+8876, IF_SSE41},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BLSI[] = {
+ {I_BLSI, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+15659, IF_FUTURE|IF_BMI1},
+ {I_BLSI, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+15666, IF_LONG|IF_FUTURE|IF_BMI1},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BLSMSK[] = {
+ {I_BLSMSK, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+15673, IF_FUTURE|IF_BMI1},
+ {I_BLSMSK, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+15680, IF_LONG|IF_FUTURE|IF_BMI1},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BLSR[] = {
+ {I_BLSR, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+15687, IF_FUTURE|IF_BMI1},
+ {I_BLSR, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+15694, IF_LONG|IF_FUTURE|IF_BMI1},
ITEMPLATE_END
};
static const struct itemplate instrux_BOUND[] = {
- {I_BOUND, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16922, IF_186|IF_NOLONG},
- {I_BOUND, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+16927, IF_386|IF_NOLONG},
+ {I_BOUND, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+19504, IF_186|IF_NOLONG},
+ {I_BOUND, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+19509, IF_386|IF_NOLONG},
ITEMPLATE_END
};
static const struct itemplate instrux_BSF[] = {
- {I_BSF, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+13328, IF_386|IF_SM},
- {I_BSF, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13328, IF_386},
- {I_BSF, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+13334, IF_386|IF_SM},
- {I_BSF, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13334, IF_386},
- {I_BSF, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+13340, IF_X64|IF_SM},
- {I_BSF, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13340, IF_X64},
+ {I_BSF, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+15889, IF_386|IF_SM},
+ {I_BSF, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+15889, IF_386},
+ {I_BSF, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+15895, IF_386|IF_SM},
+ {I_BSF, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+15895, IF_386},
+ {I_BSF, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+15901, IF_X64|IF_SM},
+ {I_BSF, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+15901, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_BSR[] = {
- {I_BSR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+13346, IF_386|IF_SM},
- {I_BSR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13346, IF_386},
- {I_BSR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+13352, IF_386|IF_SM},
- {I_BSR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13352, IF_386},
- {I_BSR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+13358, IF_X64|IF_SM},
- {I_BSR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13358, IF_X64},
+ {I_BSR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+15907, IF_386|IF_SM},
+ {I_BSR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+15907, IF_386},
+ {I_BSR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+15913, IF_386|IF_SM},
+ {I_BSR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+15913, IF_386},
+ {I_BSR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+15919, IF_X64|IF_SM},
+ {I_BSR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+15919, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_BSWAP[] = {
- {I_BSWAP, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+13364, IF_486},
- {I_BSWAP, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+13370, IF_X64},
+ {I_BSWAP, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15925, IF_486},
+ {I_BSWAP, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15931, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_BT[] = {
- {I_BT, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13376, IF_386|IF_SM},
- {I_BT, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13376, IF_386},
- {I_BT, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13382, IF_386|IF_SM},
- {I_BT, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13382, IF_386},
- {I_BT, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13388, IF_X64|IF_SM},
- {I_BT, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13388, IF_X64},
- {I_BT, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+6920, IF_386|IF_SB},
- {I_BT, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+6927, IF_386|IF_SB},
- {I_BT, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+6934, IF_X64|IF_SB},
+ {I_BT, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+15937, IF_386|IF_SM},
+ {I_BT, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+15937, IF_386},
+ {I_BT, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+15943, IF_386|IF_SM},
+ {I_BT, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+15943, IF_386},
+ {I_BT, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+15949, IF_X64|IF_SM},
+ {I_BT, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+15949, IF_X64},
+ {I_BT, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+7448, IF_386|IF_SB},
+ {I_BT, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+7455, IF_386|IF_SB},
+ {I_BT, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+7462, IF_X64|IF_SB},
ITEMPLATE_END
};
static const struct itemplate instrux_BTC[] = {
- {I_BTC, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13394, IF_386|IF_SM},
- {I_BTC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13394, IF_386},
- {I_BTC, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13400, IF_386|IF_SM},
- {I_BTC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13400, IF_386},
- {I_BTC, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13406, IF_X64|IF_SM},
- {I_BTC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13406, IF_X64},
- {I_BTC, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+6941, IF_386|IF_SB},
- {I_BTC, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+6948, IF_386|IF_SB},
- {I_BTC, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+6955, IF_X64|IF_SB},
+ {I_BTC, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+7469, IF_386|IF_SM|IF_LOCK},
+ {I_BTC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+7470, IF_386},
+ {I_BTC, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7476, IF_386|IF_SM|IF_LOCK},
+ {I_BTC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7477, IF_386},
+ {I_BTC, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7483, IF_X64|IF_SM|IF_LOCK},
+ {I_BTC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7484, IF_X64},
+ {I_BTC, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+3618, IF_386|IF_SB|IF_LOCK},
+ {I_BTC, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+3626, IF_386|IF_SB|IF_LOCK},
+ {I_BTC, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+3634, IF_X64|IF_SB|IF_LOCK},
ITEMPLATE_END
};
static const struct itemplate instrux_BTR[] = {
- {I_BTR, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13412, IF_386|IF_SM},
- {I_BTR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13412, IF_386},
- {I_BTR, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13418, IF_386|IF_SM},
- {I_BTR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13418, IF_386},
- {I_BTR, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13424, IF_X64|IF_SM},
- {I_BTR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13424, IF_X64},
- {I_BTR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+6962, IF_386|IF_SB},
- {I_BTR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+6969, IF_386|IF_SB},
- {I_BTR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+6976, IF_X64|IF_SB},
+ {I_BTR, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+7490, IF_386|IF_SM|IF_LOCK},
+ {I_BTR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+7491, IF_386},
+ {I_BTR, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7497, IF_386|IF_SM|IF_LOCK},
+ {I_BTR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7498, IF_386},
+ {I_BTR, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7504, IF_X64|IF_SM|IF_LOCK},
+ {I_BTR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7505, IF_X64},
+ {I_BTR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+3642, IF_386|IF_SB|IF_LOCK},
+ {I_BTR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+3650, IF_386|IF_SB|IF_LOCK},
+ {I_BTR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+3658, IF_X64|IF_SB|IF_LOCK},
ITEMPLATE_END
};
static const struct itemplate instrux_BTS[] = {
- {I_BTS, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13430, IF_386|IF_SM},
- {I_BTS, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13430, IF_386},
- {I_BTS, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13436, IF_386|IF_SM},
- {I_BTS, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13436, IF_386},
- {I_BTS, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13442, IF_X64|IF_SM},
- {I_BTS, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13442, IF_X64},
- {I_BTS, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+6983, IF_386|IF_SB},
- {I_BTS, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+6990, IF_386|IF_SB},
- {I_BTS, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+6997, IF_X64|IF_SB},
+ {I_BTS, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+7511, IF_386|IF_SM|IF_LOCK},
+ {I_BTS, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+7512, IF_386},
+ {I_BTS, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7518, IF_386|IF_SM|IF_LOCK},
+ {I_BTS, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7519, IF_386},
+ {I_BTS, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7525, IF_X64|IF_SM|IF_LOCK},
+ {I_BTS, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7526, IF_X64},
+ {I_BTS, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+3666, IF_386|IF_SB|IF_LOCK},
+ {I_BTS, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+3674, IF_386|IF_SB|IF_LOCK},
+ {I_BTS, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+3682, IF_X64|IF_SB|IF_LOCK},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_BZHI[] = {
+ {I_BZHI, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, nasm_bytecodes+15701, IF_FUTURE|IF_BMI2},
+ {I_BZHI, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, nasm_bytecodes+15708, IF_LONG|IF_FUTURE|IF_BMI2},
ITEMPLATE_END
};
static const struct itemplate instrux_CALL[] = {
- {I_CALL, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+16932, IF_8086},
- {I_CALL, 1, {IMMEDIATE|NEAR,0,0,0,0}, nasm_bytecodes+16932, IF_8086},
- {I_CALL, 1, {IMMEDIATE|FAR,0,0,0,0}, nasm_bytecodes+13448, IF_8086|IF_NOLONG},
- {I_CALL, 1, {IMMEDIATE|BITS16,0,0,0,0}, nasm_bytecodes+16937, IF_8086},
- {I_CALL, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, nasm_bytecodes+16937, IF_8086},
- {I_CALL, 1, {IMMEDIATE|BITS16|FAR,0,0,0,0}, nasm_bytecodes+13454, IF_8086|IF_NOLONG},
- {I_CALL, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+16942, IF_386},
- {I_CALL, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, nasm_bytecodes+16942, IF_386},
- {I_CALL, 1, {IMMEDIATE|BITS32|FAR,0,0,0,0}, nasm_bytecodes+13460, IF_386|IF_NOLONG},
- {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+13466, IF_8086|IF_NOLONG},
- {I_CALL, 2, {IMMEDIATE|BITS16|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+13472, IF_8086|IF_NOLONG},
- {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+13472, IF_8086|IF_NOLONG},
- {I_CALL, 2, {IMMEDIATE|BITS32|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+13478, IF_386|IF_NOLONG},
- {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+13478, IF_386|IF_NOLONG},
- {I_CALL, 1, {MEMORY|FAR,0,0,0,0}, nasm_bytecodes+16947, IF_8086|IF_NOLONG},
- {I_CALL, 1, {MEMORY|FAR,0,0,0,0}, nasm_bytecodes+16952, IF_X64},
- {I_CALL, 1, {MEMORY|BITS16|FAR,0,0,0,0}, nasm_bytecodes+16957, IF_8086},
- {I_CALL, 1, {MEMORY|BITS32|FAR,0,0,0,0}, nasm_bytecodes+16962, IF_386},
- {I_CALL, 1, {MEMORY|BITS64|FAR,0,0,0,0}, nasm_bytecodes+16952, IF_X64},
- {I_CALL, 1, {MEMORY|NEAR,0,0,0,0}, nasm_bytecodes+16967, IF_8086},
- {I_CALL, 1, {MEMORY|BITS16|NEAR,0,0,0,0}, nasm_bytecodes+16972, IF_8086},
- {I_CALL, 1, {MEMORY|BITS32|NEAR,0,0,0,0}, nasm_bytecodes+16977, IF_386|IF_NOLONG},
- {I_CALL, 1, {MEMORY|BITS64|NEAR,0,0,0,0}, nasm_bytecodes+16982, IF_X64},
- {I_CALL, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16972, IF_8086},
- {I_CALL, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16977, IF_386|IF_NOLONG},
- {I_CALL, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16987, IF_X64},
- {I_CALL, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+16967, IF_8086},
- {I_CALL, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+16972, IF_8086},
- {I_CALL, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+16977, IF_386|IF_NOLONG},
- {I_CALL, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+16987, IF_X64},
+ {I_CALL, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+19514, IF_8086},
+ {I_CALL, 1, {IMMEDIATE|NEAR,0,0,0,0}, nasm_bytecodes+19514, IF_8086},
+ {I_CALL, 1, {IMMEDIATE|FAR,0,0,0,0}, nasm_bytecodes+15955, IF_8086|IF_NOLONG},
+ {I_CALL, 1, {IMMEDIATE|BITS16,0,0,0,0}, nasm_bytecodes+19519, IF_8086},
+ {I_CALL, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, nasm_bytecodes+19519, IF_8086},
+ {I_CALL, 1, {IMMEDIATE|BITS16|FAR,0,0,0,0}, nasm_bytecodes+15961, IF_8086|IF_NOLONG},
+ {I_CALL, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+19524, IF_386},
+ {I_CALL, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, nasm_bytecodes+19524, IF_386},
+ {I_CALL, 1, {IMMEDIATE|BITS32|FAR,0,0,0,0}, nasm_bytecodes+15967, IF_386|IF_NOLONG},
+ {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+15973, IF_8086|IF_NOLONG},
+ {I_CALL, 2, {IMMEDIATE|BITS16|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+15979, IF_8086|IF_NOLONG},
+ {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+15979, IF_8086|IF_NOLONG},
+ {I_CALL, 2, {IMMEDIATE|BITS32|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+15985, IF_386|IF_NOLONG},
+ {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+15985, IF_386|IF_NOLONG},
+ {I_CALL, 1, {MEMORY|FAR,0,0,0,0}, nasm_bytecodes+19529, IF_8086|IF_NOLONG},
+ {I_CALL, 1, {MEMORY|FAR,0,0,0,0}, nasm_bytecodes+19534, IF_X64},
+ {I_CALL, 1, {MEMORY|BITS16|FAR,0,0,0,0}, nasm_bytecodes+19539, IF_8086},
+ {I_CALL, 1, {MEMORY|BITS32|FAR,0,0,0,0}, nasm_bytecodes+19544, IF_386},
+ {I_CALL, 1, {MEMORY|BITS64|FAR,0,0,0,0}, nasm_bytecodes+19534, IF_X64},
+ {I_CALL, 1, {MEMORY|NEAR,0,0,0,0}, nasm_bytecodes+19549, IF_8086},
+ {I_CALL, 1, {MEMORY|BITS16|NEAR,0,0,0,0}, nasm_bytecodes+19554, IF_8086},
+ {I_CALL, 1, {MEMORY|BITS32|NEAR,0,0,0,0}, nasm_bytecodes+19559, IF_386|IF_NOLONG},
+ {I_CALL, 1, {MEMORY|BITS64|NEAR,0,0,0,0}, nasm_bytecodes+19564, IF_X64},
+ {I_CALL, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19554, IF_8086},
+ {I_CALL, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19559, IF_386|IF_NOLONG},
+ {I_CALL, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19564, IF_X64},
+ {I_CALL, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19549, IF_8086},
+ {I_CALL, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+19554, IF_8086},
+ {I_CALL, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+19559, IF_386|IF_NOLONG},
+ {I_CALL, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19564, IF_X64},
+ {I_CALL, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+19564, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_CBW[] = {
- {I_CBW, 0, {0,0,0,0,0}, nasm_bytecodes+18684, IF_8086},
+ {I_CBW, 0, {0,0,0,0,0}, nasm_bytecodes+21169, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_CDQ[] = {
- {I_CDQ, 0, {0,0,0,0,0}, nasm_bytecodes+18688, IF_386},
+ {I_CDQ, 0, {0,0,0,0,0}, nasm_bytecodes+21173, IF_386},
ITEMPLATE_END
};
static const struct itemplate instrux_CDQE[] = {
- {I_CDQE, 0, {0,0,0,0,0}, nasm_bytecodes+18692, IF_X64},
+ {I_CDQE, 0, {0,0,0,0,0}, nasm_bytecodes+21177, IF_X64},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_CLAC[] = {
+ {I_CLAC, 0, {0,0,0,0,0}, nasm_bytecodes+21099, IF_PRIV|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_CLC[] = {
- {I_CLC, 0, {0,0,0,0,0}, nasm_bytecodes+18424, IF_8086},
+ {I_CLC, 0, {0,0,0,0,0}, nasm_bytecodes+20936, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_CLD[] = {
- {I_CLD, 0, {0,0,0,0,0}, nasm_bytecodes+19686, IF_8086},
+ {I_CLD, 0, {0,0,0,0,0}, nasm_bytecodes+22123, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_CLFLUSH[] = {
- {I_CLFLUSH, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18577, IF_WILLAMETTE|IF_SSE2},
+ {I_CLFLUSH, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+21049, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_CLGI[] = {
- {I_CLGI, 0, {0,0,0,0,0}, nasm_bytecodes+16992, IF_X64|IF_AMD},
+ {I_CLGI, 0, {0,0,0,0,0}, nasm_bytecodes+19569, IF_X64|IF_AMD},
ITEMPLATE_END
};
static const struct itemplate instrux_CLI[] = {
- {I_CLI, 0, {0,0,0,0,0}, nasm_bytecodes+19689, IF_8086},
+ {I_CLI, 0, {0,0,0,0,0}, nasm_bytecodes+22126, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_CLTS[] = {
- {I_CLTS, 0, {0,0,0,0,0}, nasm_bytecodes+18696, IF_286|IF_PRIV},
+ {I_CLTS, 0, {0,0,0,0,0}, nasm_bytecodes+21181, IF_286|IF_PRIV},
ITEMPLATE_END
};
static const struct itemplate instrux_CMC[] = {
- {I_CMC, 0, {0,0,0,0,0}, nasm_bytecodes+19692, IF_8086},
+ {I_CMC, 0, {0,0,0,0,0}, nasm_bytecodes+22129, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_CMP[] = {
- {I_CMP, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+18700, IF_8086|IF_SM},
- {I_CMP, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+18700, IF_8086},
- {I_CMP, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16997, IF_8086|IF_SM},
- {I_CMP, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16997, IF_8086},
- {I_CMP, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17002, IF_386|IF_SM},
- {I_CMP, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17002, IF_386},
- {I_CMP, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17007, IF_X64|IF_SM},
- {I_CMP, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17007, IF_X64},
- {I_CMP, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+10780, IF_8086|IF_SM},
- {I_CMP, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+10780, IF_8086},
- {I_CMP, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+17012, IF_8086|IF_SM},
- {I_CMP, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+17012, IF_8086},
- {I_CMP, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+17017, IF_386|IF_SM},
- {I_CMP, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17017, IF_386},
- {I_CMP, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+17022, IF_X64|IF_SM},
- {I_CMP, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17022, IF_X64},
- {I_CMP, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13484, IF_8086},
- {I_CMP, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13490, IF_386},
- {I_CMP, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13496, IF_X64},
- {I_CMP, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+18704, IF_8086|IF_SM},
- {I_CMP, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+13484, IF_8086|IF_SM},
- {I_CMP, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+17027, IF_8086|IF_SM},
- {I_CMP, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+13490, IF_386|IF_SM},
- {I_CMP, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+17032, IF_386|IF_SM},
- {I_CMP, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+13496, IF_X64|IF_SM},
- {I_CMP, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+17037, IF_X64|IF_SM},
- {I_CMP, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+17042, IF_8086|IF_SM},
- {I_CMP, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+13502, IF_8086|IF_SM},
- {I_CMP, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+13508, IF_386|IF_SM},
- {I_CMP, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+13514, IF_X64|IF_SM},
- {I_CMP, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+17042, IF_8086|IF_SM},
- {I_CMP, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+13502, IF_8086|IF_SM},
- {I_CMP, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+13508, IF_386|IF_SM},
+ {I_CMP, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+21185, IF_8086|IF_SM},
+ {I_CMP, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+21185, IF_8086},
+ {I_CMP, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+19574, IF_8086|IF_SM},
+ {I_CMP, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+19574, IF_8086},
+ {I_CMP, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+19579, IF_386|IF_SM},
+ {I_CMP, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+19579, IF_386},
+ {I_CMP, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+19584, IF_X64|IF_SM},
+ {I_CMP, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+19584, IF_X64},
+ {I_CMP, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+14619, IF_8086|IF_SM},
+ {I_CMP, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+14619, IF_8086},
+ {I_CMP, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+19589, IF_8086|IF_SM},
+ {I_CMP, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+19589, IF_8086},
+ {I_CMP, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+19594, IF_386|IF_SM},
+ {I_CMP, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+19594, IF_386},
+ {I_CMP, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+19599, IF_X64|IF_SM},
+ {I_CMP, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+19599, IF_X64},
+ {I_CMP, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+15991, IF_8086},
+ {I_CMP, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+15997, IF_386},
+ {I_CMP, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16003, IF_X64},
+ {I_CMP, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+21189, IF_8086|IF_SM},
+ {I_CMP, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+15991, IF_8086|IF_SM},
+ {I_CMP, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+19604, IF_8086|IF_SM},
+ {I_CMP, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+15997, IF_386|IF_SM},
+ {I_CMP, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+19609, IF_386|IF_SM},
+ {I_CMP, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+16003, IF_X64|IF_SM},
+ {I_CMP, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+19614, IF_X64|IF_SM},
+ {I_CMP, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+19619, IF_8086|IF_SM},
+ {I_CMP, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+16009, IF_8086|IF_SM},
+ {I_CMP, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+16015, IF_386|IF_SM},
+ {I_CMP, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+16021, IF_X64|IF_SM},
+ {I_CMP, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+19619, IF_8086|IF_SM},
+ {I_CMP, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+16009, IF_8086|IF_SM},
+ {I_CMP, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+16015, IF_386|IF_SM},
+ {I_CMP, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+19624, IF_8086|IF_SM|IF_NOLONG},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPEQPD[] = {
- {I_CMPEQPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5512, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_CMPEQPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4018, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPEQPS[] = {
- {I_CMPEQPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5336, IF_KATMAI|IF_SSE},
+ {I_CMPEQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3842, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPEQSD[] = {
- {I_CMPEQSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5520, IF_WILLAMETTE|IF_SSE2},
+ {I_CMPEQSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4026, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPEQSS[] = {
- {I_CMPEQSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5344, IF_KATMAI|IF_SSE},
+ {I_CMPEQSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+3850, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPLEPD[] = {
- {I_CMPLEPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5528, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_CMPLEPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4034, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPLEPS[] = {
- {I_CMPLEPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5352, IF_KATMAI|IF_SSE},
+ {I_CMPLEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3858, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPLESD[] = {
- {I_CMPLESD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5536, IF_WILLAMETTE|IF_SSE2},
+ {I_CMPLESD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4042, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPLESS[] = {
- {I_CMPLESS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5360, IF_KATMAI|IF_SSE},
+ {I_CMPLESS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+3866, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPLTPD[] = {
- {I_CMPLTPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5544, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_CMPLTPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4050, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPLTPS[] = {
- {I_CMPLTPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5368, IF_KATMAI|IF_SSE},
+ {I_CMPLTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3874, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPLTSD[] = {
- {I_CMPLTSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5552, IF_WILLAMETTE|IF_SSE2},
+ {I_CMPLTSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4058, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPLTSS[] = {
- {I_CMPLTSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5376, IF_KATMAI|IF_SSE},
+ {I_CMPLTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+3882, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPNEQPD[] = {
- {I_CMPNEQPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5560, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_CMPNEQPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4066, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPNEQPS[] = {
- {I_CMPNEQPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5384, IF_KATMAI|IF_SSE},
+ {I_CMPNEQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3890, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPNEQSD[] = {
- {I_CMPNEQSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5568, IF_WILLAMETTE|IF_SSE2},
+ {I_CMPNEQSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4074, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPNEQSS[] = {
- {I_CMPNEQSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5392, IF_KATMAI|IF_SSE},
+ {I_CMPNEQSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+3898, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPNLEPD[] = {
- {I_CMPNLEPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5576, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_CMPNLEPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4082, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPNLEPS[] = {
- {I_CMPNLEPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5400, IF_KATMAI|IF_SSE},
+ {I_CMPNLEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3906, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPNLESD[] = {
- {I_CMPNLESD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5584, IF_WILLAMETTE|IF_SSE2},
+ {I_CMPNLESD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4090, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPNLESS[] = {
- {I_CMPNLESS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5408, IF_KATMAI|IF_SSE},
+ {I_CMPNLESS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+3914, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPNLTPD[] = {
- {I_CMPNLTPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5592, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_CMPNLTPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4098, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPNLTPS[] = {
- {I_CMPNLTPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5416, IF_KATMAI|IF_SSE},
+ {I_CMPNLTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3922, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPNLTSD[] = {
- {I_CMPNLTSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5600, IF_WILLAMETTE|IF_SSE2},
+ {I_CMPNLTSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4106, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPNLTSS[] = {
- {I_CMPNLTSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5424, IF_KATMAI|IF_SSE},
+ {I_CMPNLTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+3930, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPORDPD[] = {
- {I_CMPORDPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5608, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_CMPORDPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4114, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPORDPS[] = {
- {I_CMPORDPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5432, IF_KATMAI|IF_SSE},
+ {I_CMPORDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3938, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPORDSD[] = {
- {I_CMPORDSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5616, IF_WILLAMETTE|IF_SSE2},
+ {I_CMPORDSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4122, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPORDSS[] = {
- {I_CMPORDSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5440, IF_KATMAI|IF_SSE},
+ {I_CMPORDSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+3946, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPPD[] = {
- {I_CMPPD, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+7823, IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},
+ {I_CMPPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+8575, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPPS[] = {
- {I_CMPPS, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+7550, IF_KATMAI|IF_SSE|IF_SB|IF_AR2},
- {I_CMPPS, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+7550, IF_KATMAI|IF_SSE|IF_SB|IF_AR2},
+ {I_CMPPS, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+8302, IF_KATMAI|IF_SSE|IF_SB|IF_AR2},
+ {I_CMPPS, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+8302, IF_KATMAI|IF_SSE|IF_SB|IF_AR2},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPSB[] = {
- {I_CMPSB, 0, {0,0,0,0,0}, nasm_bytecodes+18708, IF_8086},
+ {I_CMPSB, 0, {0,0,0,0,0}, nasm_bytecodes+21193, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPSD[] = {
- {I_CMPSD, 0, {0,0,0,0,0}, nasm_bytecodes+17047, IF_386},
- {I_CMPSD, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+7830, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
+ {I_CMPSD, 0, {0,0,0,0,0}, nasm_bytecodes+19629, IF_386},
+ {I_CMPSD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+8582, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPSQ[] = {
- {I_CMPSQ, 0, {0,0,0,0,0}, nasm_bytecodes+17052, IF_X64},
+ {I_CMPSQ, 0, {0,0,0,0,0}, nasm_bytecodes+19634, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPSS[] = {
- {I_CMPSS, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+7557, IF_KATMAI|IF_SSE|IF_SB|IF_AR2},
- {I_CMPSS, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+7557, IF_KATMAI|IF_SSE|IF_SB|IF_AR2},
+ {I_CMPSS, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+8309, IF_KATMAI|IF_SSE|IF_SB|IF_AR2},
+ {I_CMPSS, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+8309, IF_KATMAI|IF_SSE|IF_SB|IF_AR2},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPSW[] = {
- {I_CMPSW, 0, {0,0,0,0,0}, nasm_bytecodes+17057, IF_8086},
+ {I_CMPSW, 0, {0,0,0,0,0}, nasm_bytecodes+19639, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPUNORDPD[] = {
- {I_CMPUNORDPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5624, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_CMPUNORDPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4130, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPUNORDPS[] = {
- {I_CMPUNORDPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5448, IF_KATMAI|IF_SSE},
+ {I_CMPUNORDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3954, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPUNORDSD[] = {
- {I_CMPUNORDSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5632, IF_WILLAMETTE|IF_SSE2},
+ {I_CMPUNORDSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4138, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPUNORDSS[] = {
- {I_CMPUNORDSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5456, IF_KATMAI|IF_SSE},
+ {I_CMPUNORDSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+3962, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPXCHG[] = {
- {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+17062, IF_PENT|IF_SM},
- {I_CMPXCHG, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+17062, IF_PENT},
- {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13520, IF_PENT|IF_SM},
- {I_CMPXCHG, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13520, IF_PENT},
- {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13526, IF_PENT|IF_SM},
- {I_CMPXCHG, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13526, IF_PENT},
- {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13532, IF_X64|IF_SM},
- {I_CMPXCHG, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13532, IF_X64},
+ {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+16027, IF_PENT|IF_SM|IF_LOCK},
+ {I_CMPXCHG, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+16028, IF_PENT},
+ {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+7532, IF_PENT|IF_SM|IF_LOCK},
+ {I_CMPXCHG, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+7533, IF_PENT},
+ {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7539, IF_PENT|IF_SM|IF_LOCK},
+ {I_CMPXCHG, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7540, IF_PENT},
+ {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7546, IF_X64|IF_SM|IF_LOCK},
+ {I_CMPXCHG, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7547, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPXCHG16B[] = {
- {I_CMPXCHG16B, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+13550, IF_X64},
+ {I_CMPXCHG16B, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+16051, IF_X64|IF_LOCK},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPXCHG486[] = {
- {I_CMPXCHG486, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+17067, IF_486|IF_SM|IF_UNDOC},
- {I_CMPXCHG486, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+17067, IF_486|IF_UNDOC},
- {I_CMPXCHG486, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13538, IF_486|IF_SM|IF_UNDOC},
- {I_CMPXCHG486, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13538, IF_486|IF_UNDOC},
- {I_CMPXCHG486, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13544, IF_486|IF_SM|IF_UNDOC},
- {I_CMPXCHG486, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13544, IF_486|IF_UNDOC},
+ {I_CMPXCHG486, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19644, IF_486|IF_SM|IF_UNDOC|IF_LOCK},
+ {I_CMPXCHG486, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19644, IF_486|IF_UNDOC},
+ {I_CMPXCHG486, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16033, IF_486|IF_SM|IF_UNDOC|IF_LOCK},
+ {I_CMPXCHG486, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16033, IF_486|IF_UNDOC},
+ {I_CMPXCHG486, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16039, IF_486|IF_SM|IF_UNDOC|IF_LOCK},
+ {I_CMPXCHG486, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16039, IF_486|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_CMPXCHG8B[] = {
- {I_CMPXCHG8B, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+13551, IF_PENT},
+ {I_CMPXCHG8B, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+16045, IF_PENT|IF_LOCK},
ITEMPLATE_END
};
static const struct itemplate instrux_COMISD[] = {
- {I_COMISD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15212, IF_WILLAMETTE|IF_SSE2},
+ {I_COMISD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17803, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_COMISS[] = {
- {I_COMISS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14492, IF_KATMAI|IF_SSE},
+ {I_COMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+17083, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_CPUID[] = {
- {I_CPUID, 0, {0,0,0,0,0}, nasm_bytecodes+18712, IF_PENT},
+ {I_CPUID, 0, {0,0,0,0,0}, nasm_bytecodes+21197, IF_PENT},
ITEMPLATE_END
};
static const struct itemplate instrux_CPU_READ[] = {
- {I_CPU_READ, 0, {0,0,0,0,0}, nasm_bytecodes+18716, IF_PENT|IF_CYRIX},
+ {I_CPU_READ, 0, {0,0,0,0,0}, nasm_bytecodes+21201, IF_PENT|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_CPU_WRITE[] = {
- {I_CPU_WRITE, 0, {0,0,0,0,0}, nasm_bytecodes+18720, IF_PENT|IF_CYRIX},
+ {I_CPU_WRITE, 0, {0,0,0,0,0}, nasm_bytecodes+21205, IF_PENT|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_CQO[] = {
- {I_CQO, 0, {0,0,0,0,0}, nasm_bytecodes+18724, IF_X64},
+ {I_CQO, 0, {0,0,0,0,0}, nasm_bytecodes+21209, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_CRC32[] = {
- {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, nasm_bytecodes+5793, IF_SSE42},
- {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+5776, IF_SSE42},
- {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+5784, IF_SSE42},
- {I_CRC32, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, nasm_bytecodes+5792, IF_SSE42|IF_X64},
- {I_CRC32, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+5800, IF_SSE42|IF_X64},
+ {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, nasm_bytecodes+4299, IF_SSE42},
+ {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+4282, IF_SSE42},
+ {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+4290, IF_SSE42},
+ {I_CRC32, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, nasm_bytecodes+4298, IF_SSE42|IF_X64},
+ {I_CRC32, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+4306, IF_SSE42|IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_CVTDQ2PD[] = {
- {I_CVTDQ2PD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15218, IF_WILLAMETTE|IF_SSE2|IF_SQ},
+ {I_CVTDQ2PD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17809, IF_WILLAMETTE|IF_SSE2|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_CVTDQ2PS[] = {
- {I_CVTDQ2PS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15224, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_CVTDQ2PS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17815, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_CVTPD2DQ[] = {
- {I_CVTPD2DQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15230, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_CVTPD2DQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17821, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_CVTPD2PI[] = {
- {I_CVTPD2PI, 2, {MMXREG,RM_XMM,0,0,0}, nasm_bytecodes+15236, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_CVTPD2PI, 2, {MMXREG,RM_XMM,0,0,0}, nasm_bytecodes+17827, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_CVTPD2PS[] = {
- {I_CVTPD2PS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15242, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_CVTPD2PS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17833, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_CVTPI2PD[] = {
- {I_CVTPI2PD, 2, {XMMREG,RM_MMX,0,0,0}, nasm_bytecodes+15248, IF_WILLAMETTE|IF_SSE2|IF_SQ},
+ {I_CVTPI2PD, 2, {XMMREG,RM_MMX,0,0,0}, nasm_bytecodes+17839, IF_WILLAMETTE|IF_SSE2|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_CVTPI2PS[] = {
- {I_CVTPI2PS, 2, {XMMREG,RM_MMX,0,0,0}, nasm_bytecodes+14498, IF_KATMAI|IF_SSE|IF_MMX|IF_SQ},
+ {I_CVTPI2PS, 2, {XMMREG,RM_MMX|BITS64,0,0,0}, nasm_bytecodes+17089, IF_KATMAI|IF_SSE|IF_MMX},
ITEMPLATE_END
};
static const struct itemplate instrux_CVTPS2DQ[] = {
- {I_CVTPS2DQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15254, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_CVTPS2DQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17845, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_CVTPS2PD[] = {
- {I_CVTPS2PD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15260, IF_WILLAMETTE|IF_SSE2|IF_SQ},
+ {I_CVTPS2PD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17851, IF_WILLAMETTE|IF_SSE2|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_CVTPS2PI[] = {
- {I_CVTPS2PI, 2, {MMXREG,RM_XMM,0,0,0}, nasm_bytecodes+14504, IF_KATMAI|IF_SSE|IF_MMX|IF_SQ},
+ {I_CVTPS2PI, 2, {MMXREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+17095, IF_KATMAI|IF_SSE|IF_MMX},
ITEMPLATE_END
};
static const struct itemplate instrux_CVTSD2SI[] = {
- {I_CVTSD2SI, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+7838, IF_WILLAMETTE|IF_SSE2|IF_SQ|IF_AR1},
- {I_CVTSD2SI, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+7838, IF_WILLAMETTE|IF_SSE2|IF_SQ|IF_AR1},
- {I_CVTSD2SI, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+7837, IF_X64|IF_SSE2|IF_SQ|IF_AR1},
- {I_CVTSD2SI, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+7837, IF_X64|IF_SSE2|IF_SQ|IF_AR1},
+ {I_CVTSD2SI, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+8590, IF_WILLAMETTE|IF_SSE2|IF_SQ|IF_AR1},
+ {I_CVTSD2SI, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+8590, IF_WILLAMETTE|IF_SSE2|IF_SQ|IF_AR1},
+ {I_CVTSD2SI, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+8589, IF_X64|IF_SSE2|IF_SQ|IF_AR1},
+ {I_CVTSD2SI, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+8589, IF_X64|IF_SSE2|IF_SQ|IF_AR1},
ITEMPLATE_END
};
static const struct itemplate instrux_CVTSD2SS[] = {
- {I_CVTSD2SS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15266, IF_WILLAMETTE|IF_SSE2|IF_SQ},
+ {I_CVTSD2SS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17857, IF_WILLAMETTE|IF_SSE2|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_CVTSI2SD[] = {
- {I_CVTSI2SD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+7845, IF_WILLAMETTE|IF_SSE2|IF_SD|IF_AR1},
- {I_CVTSI2SD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+7845, IF_WILLAMETTE|IF_SSE2|IF_SD|IF_AR1},
- {I_CVTSI2SD, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+7844, IF_X64|IF_SSE2|IF_SQ|IF_AR1},
+ {I_CVTSI2SD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+8597, IF_WILLAMETTE|IF_SSE2|IF_SD|IF_AR1},
+ {I_CVTSI2SD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+8597, IF_WILLAMETTE|IF_SSE2|IF_SD|IF_AR1},
+ {I_CVTSI2SD, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+8596, IF_X64|IF_SSE2|IF_SQ|IF_AR1},
ITEMPLATE_END
};
static const struct itemplate instrux_CVTSI2SS[] = {
- {I_CVTSI2SS, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+7565, IF_KATMAI|IF_SSE|IF_SD|IF_AR1},
- {I_CVTSI2SS, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+7565, IF_KATMAI|IF_SSE|IF_SD|IF_AR1},
- {I_CVTSI2SS, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+7564, IF_X64|IF_SSE|IF_SQ|IF_AR1},
+ {I_CVTSI2SS, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+8317, IF_KATMAI|IF_SSE|IF_SD|IF_AR1},
+ {I_CVTSI2SS, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+8317, IF_KATMAI|IF_SSE|IF_SD|IF_AR1},
+ {I_CVTSI2SS, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+8316, IF_X64|IF_SSE|IF_SQ|IF_AR1},
ITEMPLATE_END
};
static const struct itemplate instrux_CVTSS2SD[] = {
- {I_CVTSS2SD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15272, IF_WILLAMETTE|IF_SSE2|IF_SD},
+ {I_CVTSS2SD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17863, IF_WILLAMETTE|IF_SSE2|IF_SD},
ITEMPLATE_END
};
static const struct itemplate instrux_CVTSS2SI[] = {
- {I_CVTSS2SI, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+7572, IF_KATMAI|IF_SSE|IF_SD|IF_AR1},
- {I_CVTSS2SI, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+7572, IF_KATMAI|IF_SSE|IF_SD|IF_AR1},
- {I_CVTSS2SI, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+7571, IF_X64|IF_SSE|IF_SD|IF_AR1},
- {I_CVTSS2SI, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+7571, IF_X64|IF_SSE|IF_SD|IF_AR1},
+ {I_CVTSS2SI, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+8324, IF_KATMAI|IF_SSE|IF_SD|IF_AR1},
+ {I_CVTSS2SI, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+8324, IF_KATMAI|IF_SSE|IF_SD|IF_AR1},
+ {I_CVTSS2SI, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+8323, IF_X64|IF_SSE|IF_SD|IF_AR1},
+ {I_CVTSS2SI, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+8323, IF_X64|IF_SSE|IF_SD|IF_AR1},
ITEMPLATE_END
};
static const struct itemplate instrux_CVTTPD2DQ[] = {
- {I_CVTTPD2DQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15284, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_CVTTPD2DQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17875, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_CVTTPD2PI[] = {
- {I_CVTTPD2PI, 2, {MMXREG,RM_XMM,0,0,0}, nasm_bytecodes+15278, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_CVTTPD2PI, 2, {MMXREG,RM_XMM,0,0,0}, nasm_bytecodes+17869, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_CVTTPS2DQ[] = {
- {I_CVTTPS2DQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15290, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_CVTTPS2DQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17881, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_CVTTPS2PI[] = {
- {I_CVTTPS2PI, 2, {MMXREG,RM_XMM,0,0,0}, nasm_bytecodes+14510, IF_KATMAI|IF_SSE|IF_MMX|IF_SQ},
+ {I_CVTTPS2PI, 2, {MMXREG,RM_XMM,0,0,0}, nasm_bytecodes+17101, IF_KATMAI|IF_SSE|IF_MMX|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_CVTTSD2SI[] = {
- {I_CVTTSD2SI, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+7852, IF_WILLAMETTE|IF_SSE2|IF_SQ|IF_AR1},
- {I_CVTTSD2SI, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+7852, IF_WILLAMETTE|IF_SSE2|IF_SQ|IF_AR1},
- {I_CVTTSD2SI, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+7851, IF_X64|IF_SSE2|IF_SQ|IF_AR1},
- {I_CVTTSD2SI, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+7851, IF_X64|IF_SSE2|IF_SQ|IF_AR1},
+ {I_CVTTSD2SI, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+8604, IF_WILLAMETTE|IF_SSE2|IF_SQ|IF_AR1},
+ {I_CVTTSD2SI, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+8604, IF_WILLAMETTE|IF_SSE2|IF_SQ|IF_AR1},
+ {I_CVTTSD2SI, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+8603, IF_X64|IF_SSE2|IF_SQ|IF_AR1},
+ {I_CVTTSD2SI, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+8603, IF_X64|IF_SSE2|IF_SQ|IF_AR1},
ITEMPLATE_END
};
static const struct itemplate instrux_CVTTSS2SI[] = {
- {I_CVTTSS2SI, 2, {REG_GPR|BITS32,RM_XMM,0,0,0}, nasm_bytecodes+7579, IF_KATMAI|IF_SSE|IF_SD|IF_AR1},
- {I_CVTTSS2SI, 2, {REG_GPR|BITS64,RM_XMM,0,0,0}, nasm_bytecodes+7578, IF_X64|IF_SSE|IF_SD|IF_AR1},
+ {I_CVTTSS2SI, 2, {REG_GPR|BITS32,RM_XMM,0,0,0}, nasm_bytecodes+8331, IF_KATMAI|IF_SSE|IF_SD|IF_AR1},
+ {I_CVTTSS2SI, 2, {REG_GPR|BITS64,RM_XMM,0,0,0}, nasm_bytecodes+8330, IF_X64|IF_SSE|IF_SD|IF_AR1},
ITEMPLATE_END
};
static const struct itemplate instrux_CWD[] = {
- {I_CWD, 0, {0,0,0,0,0}, nasm_bytecodes+18728, IF_8086},
+ {I_CWD, 0, {0,0,0,0,0}, nasm_bytecodes+21213, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_CWDE[] = {
- {I_CWDE, 0, {0,0,0,0,0}, nasm_bytecodes+18732, IF_386},
+ {I_CWDE, 0, {0,0,0,0,0}, nasm_bytecodes+21217, IF_386},
ITEMPLATE_END
};
static const struct itemplate instrux_DAA[] = {
- {I_DAA, 0, {0,0,0,0,0}, nasm_bytecodes+19695, IF_8086|IF_NOLONG},
+ {I_DAA, 0, {0,0,0,0,0}, nasm_bytecodes+22132, IF_8086|IF_NOLONG},
ITEMPLATE_END
};
static const struct itemplate instrux_DAS[] = {
- {I_DAS, 0, {0,0,0,0,0}, nasm_bytecodes+19698, IF_8086|IF_NOLONG},
+ {I_DAS, 0, {0,0,0,0,0}, nasm_bytecodes+22135, IF_8086|IF_NOLONG},
ITEMPLATE_END
};
@@ -879,45 +937,45 @@ static const struct itemplate instrux_DD[] = {
};
static const struct itemplate instrux_DEC[] = {
- {I_DEC, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18736, IF_8086|IF_NOLONG},
- {I_DEC, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18740, IF_386|IF_NOLONG},
- {I_DEC, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+18744, IF_8086},
- {I_DEC, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17072, IF_8086},
- {I_DEC, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+17077, IF_386},
- {I_DEC, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+17082, IF_X64},
+ {I_DEC, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+21221, IF_8086|IF_NOLONG},
+ {I_DEC, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+21225, IF_386|IF_NOLONG},
+ {I_DEC, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+19649, IF_8086|IF_LOCK},
+ {I_DEC, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16057, IF_8086|IF_LOCK},
+ {I_DEC, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16063, IF_386|IF_LOCK},
+ {I_DEC, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16069, IF_X64|IF_LOCK},
ITEMPLATE_END
};
static const struct itemplate instrux_DIV[] = {
- {I_DIV, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+18748, IF_8086},
- {I_DIV, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17087, IF_8086},
- {I_DIV, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+17092, IF_386},
- {I_DIV, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+17097, IF_X64},
+ {I_DIV, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+21229, IF_8086},
+ {I_DIV, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19654, IF_8086},
+ {I_DIV, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19659, IF_386},
+ {I_DIV, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19664, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_DIVPD[] = {
- {I_DIVPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15296, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_DIVPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17887, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_DIVPS[] = {
- {I_DIVPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14516, IF_KATMAI|IF_SSE},
+ {I_DIVPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17107, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_DIVSD[] = {
- {I_DIVSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15302, IF_WILLAMETTE|IF_SSE2},
+ {I_DIVSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17893, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_DIVSS[] = {
- {I_DIVSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14522, IF_KATMAI|IF_SSE},
+ {I_DIVSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+17113, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_DMINT[] = {
- {I_DMINT, 0, {0,0,0,0,0}, nasm_bytecodes+18752, IF_P6|IF_CYRIX},
+ {I_DMINT, 0, {0,0,0,0,0}, nasm_bytecodes+21233, IF_P6|IF_CYRIX},
ITEMPLATE_END
};
@@ -926,12 +984,12 @@ static const struct itemplate instrux_DO[] = {
};
static const struct itemplate instrux_DPPD[] = {
- {I_DPPD, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5704, IF_SSE41},
+ {I_DPPD, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4210, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_DPPS[] = {
- {I_DPPS, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5712, IF_SSE41},
+ {I_DPPS, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4218, IF_SSE41},
ITEMPLATE_END
};
@@ -952,18 +1010,18 @@ static const struct itemplate instrux_DY[] = {
};
static const struct itemplate instrux_EMMS[] = {
- {I_EMMS, 0, {0,0,0,0,0}, nasm_bytecodes+18756, IF_PENT|IF_MMX},
+ {I_EMMS, 0, {0,0,0,0,0}, nasm_bytecodes+21237, IF_PENT|IF_MMX},
ITEMPLATE_END
};
static const struct itemplate instrux_ENTER[] = {
- {I_ENTER, 2, {IMMEDIATE,IMMEDIATE,0,0,0}, nasm_bytecodes+17102, IF_186},
+ {I_ENTER, 2, {IMMEDIATE,IMMEDIATE,0,0,0}, nasm_bytecodes+19669, IF_186},
ITEMPLATE_END
};
static const struct itemplate instrux_EQU[] = {
- {I_EQU, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+5526, IF_8086},
- {I_EQU, 2, {IMMEDIATE|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+5526, IF_8086},
+ {I_EQU, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+22176, IF_8086},
+ {I_EQU, 2, {IMMEDIATE|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+22176, IF_8086},
ITEMPLATE_END
};
@@ -974,1216 +1032,1216 @@ static const struct itemplate instrux_EXTRACTPS[] = {
};
static const struct itemplate instrux_EXTRQ[] = {
- {I_EXTRQ, 3, {XMMREG,IMMEDIATE,IMMEDIATE,0,0}, nasm_bytecodes+5672, IF_SSE4A|IF_AMD},
- {I_EXTRQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+15536, IF_SSE4A|IF_AMD},
+ {I_EXTRQ, 3, {XMMREG,IMMEDIATE,IMMEDIATE,0,0}, nasm_bytecodes+4178, IF_SSE4A|IF_AMD},
+ {I_EXTRQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+18127, IF_SSE4A|IF_AMD},
ITEMPLATE_END
};
static const struct itemplate instrux_F2XM1[] = {
- {I_F2XM1, 0, {0,0,0,0,0}, nasm_bytecodes+18760, IF_8086|IF_FPU},
+ {I_F2XM1, 0, {0,0,0,0,0}, nasm_bytecodes+21241, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FABS[] = {
- {I_FABS, 0, {0,0,0,0,0}, nasm_bytecodes+18764, IF_8086|IF_FPU},
+ {I_FABS, 0, {0,0,0,0,0}, nasm_bytecodes+21245, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FADD[] = {
- {I_FADD, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18768, IF_8086|IF_FPU},
- {I_FADD, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+18772, IF_8086|IF_FPU},
- {I_FADD, 1, {FPUREG|TO,0,0,0,0}, nasm_bytecodes+17107, IF_8086|IF_FPU},
- {I_FADD, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17112, IF_8086|IF_FPU},
- {I_FADD, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17107, IF_8086|IF_FPU},
- {I_FADD, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17117, IF_8086|IF_FPU},
- {I_FADD, 0, {0,0,0,0,0}, nasm_bytecodes+18776, IF_8086|IF_FPU},
+ {I_FADD, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21249, IF_8086|IF_FPU},
+ {I_FADD, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21253, IF_8086|IF_FPU},
+ {I_FADD, 1, {FPUREG|TO,0,0,0,0}, nasm_bytecodes+19674, IF_8086|IF_FPU},
+ {I_FADD, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19679, IF_8086|IF_FPU},
+ {I_FADD, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+19674, IF_8086|IF_FPU},
+ {I_FADD, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19684, IF_8086|IF_FPU},
+ {I_FADD, 0, {0,0,0,0,0}, nasm_bytecodes+21257, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FADDP[] = {
- {I_FADDP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17122, IF_8086|IF_FPU},
- {I_FADDP, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17122, IF_8086|IF_FPU},
- {I_FADDP, 0, {0,0,0,0,0}, nasm_bytecodes+18776, IF_8086|IF_FPU},
+ {I_FADDP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19689, IF_8086|IF_FPU},
+ {I_FADDP, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+19689, IF_8086|IF_FPU},
+ {I_FADDP, 0, {0,0,0,0,0}, nasm_bytecodes+21257, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FBLD[] = {
- {I_FBLD, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+18780, IF_8086|IF_FPU},
- {I_FBLD, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18780, IF_8086|IF_FPU},
+ {I_FBLD, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+21261, IF_8086|IF_FPU},
+ {I_FBLD, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+21261, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FBSTP[] = {
- {I_FBSTP, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+18784, IF_8086|IF_FPU},
- {I_FBSTP, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18784, IF_8086|IF_FPU},
+ {I_FBSTP, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+21265, IF_8086|IF_FPU},
+ {I_FBSTP, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+21265, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FCHS[] = {
- {I_FCHS, 0, {0,0,0,0,0}, nasm_bytecodes+18788, IF_8086|IF_FPU},
+ {I_FCHS, 0, {0,0,0,0,0}, nasm_bytecodes+21269, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FCLEX[] = {
- {I_FCLEX, 0, {0,0,0,0,0}, nasm_bytecodes+17127, IF_8086|IF_FPU},
+ {I_FCLEX, 0, {0,0,0,0,0}, nasm_bytecodes+19694, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FCMOVB[] = {
- {I_FCMOVB, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17132, IF_P6|IF_FPU},
- {I_FCMOVB, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17137, IF_P6|IF_FPU},
- {I_FCMOVB, 0, {0,0,0,0,0}, nasm_bytecodes+18792, IF_P6|IF_FPU},
+ {I_FCMOVB, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19699, IF_P6|IF_FPU},
+ {I_FCMOVB, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19704, IF_P6|IF_FPU},
+ {I_FCMOVB, 0, {0,0,0,0,0}, nasm_bytecodes+21273, IF_P6|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FCMOVBE[] = {
- {I_FCMOVBE, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17142, IF_P6|IF_FPU},
- {I_FCMOVBE, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17147, IF_P6|IF_FPU},
- {I_FCMOVBE, 0, {0,0,0,0,0}, nasm_bytecodes+18796, IF_P6|IF_FPU},
+ {I_FCMOVBE, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19709, IF_P6|IF_FPU},
+ {I_FCMOVBE, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19714, IF_P6|IF_FPU},
+ {I_FCMOVBE, 0, {0,0,0,0,0}, nasm_bytecodes+21277, IF_P6|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FCMOVE[] = {
- {I_FCMOVE, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17152, IF_P6|IF_FPU},
- {I_FCMOVE, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17157, IF_P6|IF_FPU},
- {I_FCMOVE, 0, {0,0,0,0,0}, nasm_bytecodes+18800, IF_P6|IF_FPU},
+ {I_FCMOVE, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19719, IF_P6|IF_FPU},
+ {I_FCMOVE, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19724, IF_P6|IF_FPU},
+ {I_FCMOVE, 0, {0,0,0,0,0}, nasm_bytecodes+21281, IF_P6|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FCMOVNB[] = {
- {I_FCMOVNB, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17162, IF_P6|IF_FPU},
- {I_FCMOVNB, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17167, IF_P6|IF_FPU},
- {I_FCMOVNB, 0, {0,0,0,0,0}, nasm_bytecodes+18804, IF_P6|IF_FPU},
+ {I_FCMOVNB, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19729, IF_P6|IF_FPU},
+ {I_FCMOVNB, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19734, IF_P6|IF_FPU},
+ {I_FCMOVNB, 0, {0,0,0,0,0}, nasm_bytecodes+21285, IF_P6|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FCMOVNBE[] = {
- {I_FCMOVNBE, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17172, IF_P6|IF_FPU},
- {I_FCMOVNBE, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17177, IF_P6|IF_FPU},
- {I_FCMOVNBE, 0, {0,0,0,0,0}, nasm_bytecodes+18808, IF_P6|IF_FPU},
+ {I_FCMOVNBE, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19739, IF_P6|IF_FPU},
+ {I_FCMOVNBE, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19744, IF_P6|IF_FPU},
+ {I_FCMOVNBE, 0, {0,0,0,0,0}, nasm_bytecodes+21289, IF_P6|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FCMOVNE[] = {
- {I_FCMOVNE, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17182, IF_P6|IF_FPU},
- {I_FCMOVNE, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17187, IF_P6|IF_FPU},
- {I_FCMOVNE, 0, {0,0,0,0,0}, nasm_bytecodes+18812, IF_P6|IF_FPU},
+ {I_FCMOVNE, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19749, IF_P6|IF_FPU},
+ {I_FCMOVNE, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19754, IF_P6|IF_FPU},
+ {I_FCMOVNE, 0, {0,0,0,0,0}, nasm_bytecodes+21293, IF_P6|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FCMOVNU[] = {
- {I_FCMOVNU, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17192, IF_P6|IF_FPU},
- {I_FCMOVNU, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17197, IF_P6|IF_FPU},
- {I_FCMOVNU, 0, {0,0,0,0,0}, nasm_bytecodes+18816, IF_P6|IF_FPU},
+ {I_FCMOVNU, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19759, IF_P6|IF_FPU},
+ {I_FCMOVNU, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19764, IF_P6|IF_FPU},
+ {I_FCMOVNU, 0, {0,0,0,0,0}, nasm_bytecodes+21297, IF_P6|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FCMOVU[] = {
- {I_FCMOVU, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17202, IF_P6|IF_FPU},
- {I_FCMOVU, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17207, IF_P6|IF_FPU},
- {I_FCMOVU, 0, {0,0,0,0,0}, nasm_bytecodes+18820, IF_P6|IF_FPU},
+ {I_FCMOVU, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19769, IF_P6|IF_FPU},
+ {I_FCMOVU, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19774, IF_P6|IF_FPU},
+ {I_FCMOVU, 0, {0,0,0,0,0}, nasm_bytecodes+21301, IF_P6|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FCOM[] = {
- {I_FCOM, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18824, IF_8086|IF_FPU},
- {I_FCOM, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+18828, IF_8086|IF_FPU},
- {I_FCOM, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17212, IF_8086|IF_FPU},
- {I_FCOM, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17217, IF_8086|IF_FPU},
- {I_FCOM, 0, {0,0,0,0,0}, nasm_bytecodes+18832, IF_8086|IF_FPU},
+ {I_FCOM, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21305, IF_8086|IF_FPU},
+ {I_FCOM, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21309, IF_8086|IF_FPU},
+ {I_FCOM, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19779, IF_8086|IF_FPU},
+ {I_FCOM, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19784, IF_8086|IF_FPU},
+ {I_FCOM, 0, {0,0,0,0,0}, nasm_bytecodes+21313, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FCOMI[] = {
- {I_FCOMI, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17222, IF_P6|IF_FPU},
- {I_FCOMI, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17227, IF_P6|IF_FPU},
- {I_FCOMI, 0, {0,0,0,0,0}, nasm_bytecodes+18836, IF_P6|IF_FPU},
+ {I_FCOMI, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19789, IF_P6|IF_FPU},
+ {I_FCOMI, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19794, IF_P6|IF_FPU},
+ {I_FCOMI, 0, {0,0,0,0,0}, nasm_bytecodes+21317, IF_P6|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FCOMIP[] = {
- {I_FCOMIP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17232, IF_P6|IF_FPU},
- {I_FCOMIP, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17237, IF_P6|IF_FPU},
- {I_FCOMIP, 0, {0,0,0,0,0}, nasm_bytecodes+18840, IF_P6|IF_FPU},
+ {I_FCOMIP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19799, IF_P6|IF_FPU},
+ {I_FCOMIP, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19804, IF_P6|IF_FPU},
+ {I_FCOMIP, 0, {0,0,0,0,0}, nasm_bytecodes+21321, IF_P6|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FCOMP[] = {
- {I_FCOMP, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18844, IF_8086|IF_FPU},
- {I_FCOMP, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+18848, IF_8086|IF_FPU},
- {I_FCOMP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17242, IF_8086|IF_FPU},
- {I_FCOMP, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17247, IF_8086|IF_FPU},
- {I_FCOMP, 0, {0,0,0,0,0}, nasm_bytecodes+18852, IF_8086|IF_FPU},
+ {I_FCOMP, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21325, IF_8086|IF_FPU},
+ {I_FCOMP, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21329, IF_8086|IF_FPU},
+ {I_FCOMP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19809, IF_8086|IF_FPU},
+ {I_FCOMP, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19814, IF_8086|IF_FPU},
+ {I_FCOMP, 0, {0,0,0,0,0}, nasm_bytecodes+21333, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FCOMPP[] = {
- {I_FCOMPP, 0, {0,0,0,0,0}, nasm_bytecodes+18856, IF_8086|IF_FPU},
+ {I_FCOMPP, 0, {0,0,0,0,0}, nasm_bytecodes+21337, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FCOS[] = {
- {I_FCOS, 0, {0,0,0,0,0}, nasm_bytecodes+18860, IF_386|IF_FPU},
+ {I_FCOS, 0, {0,0,0,0,0}, nasm_bytecodes+21341, IF_386|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FDECSTP[] = {
- {I_FDECSTP, 0, {0,0,0,0,0}, nasm_bytecodes+18864, IF_8086|IF_FPU},
+ {I_FDECSTP, 0, {0,0,0,0,0}, nasm_bytecodes+21345, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FDISI[] = {
- {I_FDISI, 0, {0,0,0,0,0}, nasm_bytecodes+17252, IF_8086|IF_FPU},
+ {I_FDISI, 0, {0,0,0,0,0}, nasm_bytecodes+19819, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FDIV[] = {
- {I_FDIV, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18868, IF_8086|IF_FPU},
- {I_FDIV, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+18872, IF_8086|IF_FPU},
- {I_FDIV, 1, {FPUREG|TO,0,0,0,0}, nasm_bytecodes+17257, IF_8086|IF_FPU},
- {I_FDIV, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17262, IF_8086|IF_FPU},
- {I_FDIV, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17257, IF_8086|IF_FPU},
- {I_FDIV, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17267, IF_8086|IF_FPU},
- {I_FDIV, 0, {0,0,0,0,0}, nasm_bytecodes+18876, IF_8086|IF_FPU},
+ {I_FDIV, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21349, IF_8086|IF_FPU},
+ {I_FDIV, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21353, IF_8086|IF_FPU},
+ {I_FDIV, 1, {FPUREG|TO,0,0,0,0}, nasm_bytecodes+19824, IF_8086|IF_FPU},
+ {I_FDIV, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19829, IF_8086|IF_FPU},
+ {I_FDIV, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+19824, IF_8086|IF_FPU},
+ {I_FDIV, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19834, IF_8086|IF_FPU},
+ {I_FDIV, 0, {0,0,0,0,0}, nasm_bytecodes+21357, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FDIVP[] = {
- {I_FDIVP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17272, IF_8086|IF_FPU},
- {I_FDIVP, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17272, IF_8086|IF_FPU},
- {I_FDIVP, 0, {0,0,0,0,0}, nasm_bytecodes+18876, IF_8086|IF_FPU},
+ {I_FDIVP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19839, IF_8086|IF_FPU},
+ {I_FDIVP, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+19839, IF_8086|IF_FPU},
+ {I_FDIVP, 0, {0,0,0,0,0}, nasm_bytecodes+21357, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FDIVR[] = {
- {I_FDIVR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18880, IF_8086|IF_FPU},
- {I_FDIVR, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+18884, IF_8086|IF_FPU},
- {I_FDIVR, 1, {FPUREG|TO,0,0,0,0}, nasm_bytecodes+17277, IF_8086|IF_FPU},
- {I_FDIVR, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17277, IF_8086|IF_FPU},
- {I_FDIVR, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17282, IF_8086|IF_FPU},
- {I_FDIVR, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17287, IF_8086|IF_FPU},
- {I_FDIVR, 0, {0,0,0,0,0}, nasm_bytecodes+18888, IF_8086|IF_FPU},
+ {I_FDIVR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21361, IF_8086|IF_FPU},
+ {I_FDIVR, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21365, IF_8086|IF_FPU},
+ {I_FDIVR, 1, {FPUREG|TO,0,0,0,0}, nasm_bytecodes+19844, IF_8086|IF_FPU},
+ {I_FDIVR, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+19844, IF_8086|IF_FPU},
+ {I_FDIVR, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19849, IF_8086|IF_FPU},
+ {I_FDIVR, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19854, IF_8086|IF_FPU},
+ {I_FDIVR, 0, {0,0,0,0,0}, nasm_bytecodes+21369, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FDIVRP[] = {
- {I_FDIVRP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17292, IF_8086|IF_FPU},
- {I_FDIVRP, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17292, IF_8086|IF_FPU},
- {I_FDIVRP, 0, {0,0,0,0,0}, nasm_bytecodes+18888, IF_8086|IF_FPU},
+ {I_FDIVRP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19859, IF_8086|IF_FPU},
+ {I_FDIVRP, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+19859, IF_8086|IF_FPU},
+ {I_FDIVRP, 0, {0,0,0,0,0}, nasm_bytecodes+21369, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FEMMS[] = {
- {I_FEMMS, 0, {0,0,0,0,0}, nasm_bytecodes+18892, IF_PENT|IF_3DNOW},
+ {I_FEMMS, 0, {0,0,0,0,0}, nasm_bytecodes+21373, IF_PENT|IF_3DNOW},
ITEMPLATE_END
};
static const struct itemplate instrux_FENI[] = {
- {I_FENI, 0, {0,0,0,0,0}, nasm_bytecodes+17297, IF_8086|IF_FPU},
+ {I_FENI, 0, {0,0,0,0,0}, nasm_bytecodes+19864, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FFREE[] = {
- {I_FFREE, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17302, IF_8086|IF_FPU},
- {I_FFREE, 0, {0,0,0,0,0}, nasm_bytecodes+18896, IF_8086|IF_FPU},
+ {I_FFREE, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19869, IF_8086|IF_FPU},
+ {I_FFREE, 0, {0,0,0,0,0}, nasm_bytecodes+21377, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FFREEP[] = {
- {I_FFREEP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17307, IF_286|IF_FPU|IF_UNDOC},
- {I_FFREEP, 0, {0,0,0,0,0}, nasm_bytecodes+18900, IF_286|IF_FPU|IF_UNDOC},
+ {I_FFREEP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19874, IF_286|IF_FPU|IF_UNDOC},
+ {I_FFREEP, 0, {0,0,0,0,0}, nasm_bytecodes+21381, IF_286|IF_FPU|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_FIADD[] = {
- {I_FIADD, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18904, IF_8086|IF_FPU},
- {I_FIADD, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+18908, IF_8086|IF_FPU},
+ {I_FIADD, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21385, IF_8086|IF_FPU},
+ {I_FIADD, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+21389, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FICOM[] = {
- {I_FICOM, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18912, IF_8086|IF_FPU},
- {I_FICOM, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+18916, IF_8086|IF_FPU},
+ {I_FICOM, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21393, IF_8086|IF_FPU},
+ {I_FICOM, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+21397, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FICOMP[] = {
- {I_FICOMP, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18920, IF_8086|IF_FPU},
- {I_FICOMP, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+18924, IF_8086|IF_FPU},
+ {I_FICOMP, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21401, IF_8086|IF_FPU},
+ {I_FICOMP, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+21405, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FIDIV[] = {
- {I_FIDIV, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18928, IF_8086|IF_FPU},
- {I_FIDIV, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+18932, IF_8086|IF_FPU},
+ {I_FIDIV, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21409, IF_8086|IF_FPU},
+ {I_FIDIV, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+21413, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FIDIVR[] = {
- {I_FIDIVR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18936, IF_8086|IF_FPU},
- {I_FIDIVR, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+18940, IF_8086|IF_FPU},
+ {I_FIDIVR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21417, IF_8086|IF_FPU},
+ {I_FIDIVR, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+21421, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FILD[] = {
- {I_FILD, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18944, IF_8086|IF_FPU},
- {I_FILD, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+18948, IF_8086|IF_FPU},
- {I_FILD, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+18952, IF_8086|IF_FPU},
+ {I_FILD, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21425, IF_8086|IF_FPU},
+ {I_FILD, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+21429, IF_8086|IF_FPU},
+ {I_FILD, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21433, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FIMUL[] = {
- {I_FIMUL, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18956, IF_8086|IF_FPU},
- {I_FIMUL, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+18960, IF_8086|IF_FPU},
+ {I_FIMUL, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21437, IF_8086|IF_FPU},
+ {I_FIMUL, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+21441, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FINCSTP[] = {
- {I_FINCSTP, 0, {0,0,0,0,0}, nasm_bytecodes+18964, IF_8086|IF_FPU},
+ {I_FINCSTP, 0, {0,0,0,0,0}, nasm_bytecodes+21445, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FINIT[] = {
- {I_FINIT, 0, {0,0,0,0,0}, nasm_bytecodes+17312, IF_8086|IF_FPU},
+ {I_FINIT, 0, {0,0,0,0,0}, nasm_bytecodes+19879, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FIST[] = {
- {I_FIST, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18968, IF_8086|IF_FPU},
- {I_FIST, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+18972, IF_8086|IF_FPU},
+ {I_FIST, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21449, IF_8086|IF_FPU},
+ {I_FIST, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+21453, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FISTP[] = {
- {I_FISTP, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18976, IF_8086|IF_FPU},
- {I_FISTP, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+18980, IF_8086|IF_FPU},
- {I_FISTP, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+18984, IF_8086|IF_FPU},
+ {I_FISTP, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21457, IF_8086|IF_FPU},
+ {I_FISTP, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+21461, IF_8086|IF_FPU},
+ {I_FISTP, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21465, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FISTTP[] = {
- {I_FISTTP, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+18988, IF_PRESCOTT|IF_FPU},
- {I_FISTTP, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18992, IF_PRESCOTT|IF_FPU},
- {I_FISTTP, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+18996, IF_PRESCOTT|IF_FPU},
+ {I_FISTTP, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+21469, IF_PRESCOTT|IF_FPU},
+ {I_FISTTP, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21473, IF_PRESCOTT|IF_FPU},
+ {I_FISTTP, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21477, IF_PRESCOTT|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FISUB[] = {
- {I_FISUB, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+19000, IF_8086|IF_FPU},
- {I_FISUB, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+19004, IF_8086|IF_FPU},
+ {I_FISUB, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21481, IF_8086|IF_FPU},
+ {I_FISUB, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+21485, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FISUBR[] = {
- {I_FISUBR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+19008, IF_8086|IF_FPU},
- {I_FISUBR, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+19012, IF_8086|IF_FPU},
+ {I_FISUBR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21489, IF_8086|IF_FPU},
+ {I_FISUBR, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+21493, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FLD[] = {
- {I_FLD, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+19016, IF_8086|IF_FPU},
- {I_FLD, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+19020, IF_8086|IF_FPU},
- {I_FLD, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+19024, IF_8086|IF_FPU},
- {I_FLD, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17317, IF_8086|IF_FPU},
- {I_FLD, 0, {0,0,0,0,0}, nasm_bytecodes+19028, IF_8086|IF_FPU},
+ {I_FLD, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21497, IF_8086|IF_FPU},
+ {I_FLD, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21501, IF_8086|IF_FPU},
+ {I_FLD, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+21505, IF_8086|IF_FPU},
+ {I_FLD, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19884, IF_8086|IF_FPU},
+ {I_FLD, 0, {0,0,0,0,0}, nasm_bytecodes+21509, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FLD1[] = {
- {I_FLD1, 0, {0,0,0,0,0}, nasm_bytecodes+19032, IF_8086|IF_FPU},
+ {I_FLD1, 0, {0,0,0,0,0}, nasm_bytecodes+21513, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FLDCW[] = {
- {I_FLDCW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19036, IF_8086|IF_FPU|IF_SW},
+ {I_FLDCW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+21517, IF_8086|IF_FPU|IF_SW},
ITEMPLATE_END
};
static const struct itemplate instrux_FLDENV[] = {
- {I_FLDENV, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19040, IF_8086|IF_FPU},
+ {I_FLDENV, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+21521, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FLDL2E[] = {
- {I_FLDL2E, 0, {0,0,0,0,0}, nasm_bytecodes+19044, IF_8086|IF_FPU},
+ {I_FLDL2E, 0, {0,0,0,0,0}, nasm_bytecodes+21525, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FLDL2T[] = {
- {I_FLDL2T, 0, {0,0,0,0,0}, nasm_bytecodes+19048, IF_8086|IF_FPU},
+ {I_FLDL2T, 0, {0,0,0,0,0}, nasm_bytecodes+21529, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FLDLG2[] = {
- {I_FLDLG2, 0, {0,0,0,0,0}, nasm_bytecodes+19052, IF_8086|IF_FPU},
+ {I_FLDLG2, 0, {0,0,0,0,0}, nasm_bytecodes+21533, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FLDLN2[] = {
- {I_FLDLN2, 0, {0,0,0,0,0}, nasm_bytecodes+19056, IF_8086|IF_FPU},
+ {I_FLDLN2, 0, {0,0,0,0,0}, nasm_bytecodes+21537, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FLDPI[] = {
- {I_FLDPI, 0, {0,0,0,0,0}, nasm_bytecodes+19060, IF_8086|IF_FPU},
+ {I_FLDPI, 0, {0,0,0,0,0}, nasm_bytecodes+21541, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FLDZ[] = {
- {I_FLDZ, 0, {0,0,0,0,0}, nasm_bytecodes+19064, IF_8086|IF_FPU},
+ {I_FLDZ, 0, {0,0,0,0,0}, nasm_bytecodes+21545, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FMUL[] = {
- {I_FMUL, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+19068, IF_8086|IF_FPU},
- {I_FMUL, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+19072, IF_8086|IF_FPU},
- {I_FMUL, 1, {FPUREG|TO,0,0,0,0}, nasm_bytecodes+17322, IF_8086|IF_FPU},
- {I_FMUL, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17322, IF_8086|IF_FPU},
- {I_FMUL, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17327, IF_8086|IF_FPU},
- {I_FMUL, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17332, IF_8086|IF_FPU},
- {I_FMUL, 0, {0,0,0,0,0}, nasm_bytecodes+19076, IF_8086|IF_FPU},
+ {I_FMUL, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21549, IF_8086|IF_FPU},
+ {I_FMUL, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21553, IF_8086|IF_FPU},
+ {I_FMUL, 1, {FPUREG|TO,0,0,0,0}, nasm_bytecodes+19889, IF_8086|IF_FPU},
+ {I_FMUL, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+19889, IF_8086|IF_FPU},
+ {I_FMUL, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19894, IF_8086|IF_FPU},
+ {I_FMUL, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19899, IF_8086|IF_FPU},
+ {I_FMUL, 0, {0,0,0,0,0}, nasm_bytecodes+21557, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FMULP[] = {
- {I_FMULP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17337, IF_8086|IF_FPU},
- {I_FMULP, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17337, IF_8086|IF_FPU},
- {I_FMULP, 0, {0,0,0,0,0}, nasm_bytecodes+19076, IF_8086|IF_FPU},
+ {I_FMULP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19904, IF_8086|IF_FPU},
+ {I_FMULP, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+19904, IF_8086|IF_FPU},
+ {I_FMULP, 0, {0,0,0,0,0}, nasm_bytecodes+21557, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FNCLEX[] = {
- {I_FNCLEX, 0, {0,0,0,0,0}, nasm_bytecodes+17128, IF_8086|IF_FPU},
+ {I_FNCLEX, 0, {0,0,0,0,0}, nasm_bytecodes+19695, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FNDISI[] = {
- {I_FNDISI, 0, {0,0,0,0,0}, nasm_bytecodes+17253, IF_8086|IF_FPU},
+ {I_FNDISI, 0, {0,0,0,0,0}, nasm_bytecodes+19820, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FNENI[] = {
- {I_FNENI, 0, {0,0,0,0,0}, nasm_bytecodes+17298, IF_8086|IF_FPU},
+ {I_FNENI, 0, {0,0,0,0,0}, nasm_bytecodes+19865, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FNINIT[] = {
- {I_FNINIT, 0, {0,0,0,0,0}, nasm_bytecodes+17313, IF_8086|IF_FPU},
+ {I_FNINIT, 0, {0,0,0,0,0}, nasm_bytecodes+19880, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FNOP[] = {
- {I_FNOP, 0, {0,0,0,0,0}, nasm_bytecodes+19080, IF_8086|IF_FPU},
+ {I_FNOP, 0, {0,0,0,0,0}, nasm_bytecodes+21561, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FNSAVE[] = {
- {I_FNSAVE, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17343, IF_8086|IF_FPU},
+ {I_FNSAVE, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19910, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FNSTCW[] = {
- {I_FNSTCW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17353, IF_8086|IF_FPU|IF_SW},
+ {I_FNSTCW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19920, IF_8086|IF_FPU|IF_SW},
ITEMPLATE_END
};
static const struct itemplate instrux_FNSTENV[] = {
- {I_FNSTENV, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17358, IF_8086|IF_FPU},
+ {I_FNSTENV, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19925, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FNSTSW[] = {
- {I_FNSTSW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17368, IF_8086|IF_FPU|IF_SW},
- {I_FNSTSW, 1, {REG_AX,0,0,0,0}, nasm_bytecodes+17373, IF_286|IF_FPU},
+ {I_FNSTSW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19935, IF_8086|IF_FPU|IF_SW},
+ {I_FNSTSW, 1, {REG_AX,0,0,0,0}, nasm_bytecodes+19940, IF_286|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FPATAN[] = {
- {I_FPATAN, 0, {0,0,0,0,0}, nasm_bytecodes+19084, IF_8086|IF_FPU},
+ {I_FPATAN, 0, {0,0,0,0,0}, nasm_bytecodes+21565, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FPREM[] = {
- {I_FPREM, 0, {0,0,0,0,0}, nasm_bytecodes+19088, IF_8086|IF_FPU},
+ {I_FPREM, 0, {0,0,0,0,0}, nasm_bytecodes+21569, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FPREM1[] = {
- {I_FPREM1, 0, {0,0,0,0,0}, nasm_bytecodes+19092, IF_386|IF_FPU},
+ {I_FPREM1, 0, {0,0,0,0,0}, nasm_bytecodes+21573, IF_386|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FPTAN[] = {
- {I_FPTAN, 0, {0,0,0,0,0}, nasm_bytecodes+19096, IF_8086|IF_FPU},
+ {I_FPTAN, 0, {0,0,0,0,0}, nasm_bytecodes+21577, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FRNDINT[] = {
- {I_FRNDINT, 0, {0,0,0,0,0}, nasm_bytecodes+19100, IF_8086|IF_FPU},
+ {I_FRNDINT, 0, {0,0,0,0,0}, nasm_bytecodes+21581, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FRSTOR[] = {
- {I_FRSTOR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19104, IF_8086|IF_FPU},
+ {I_FRSTOR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+21585, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FSAVE[] = {
- {I_FSAVE, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17342, IF_8086|IF_FPU},
+ {I_FSAVE, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19909, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FSCALE[] = {
- {I_FSCALE, 0, {0,0,0,0,0}, nasm_bytecodes+19108, IF_8086|IF_FPU},
+ {I_FSCALE, 0, {0,0,0,0,0}, nasm_bytecodes+21589, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FSETPM[] = {
- {I_FSETPM, 0, {0,0,0,0,0}, nasm_bytecodes+19112, IF_286|IF_FPU},
+ {I_FSETPM, 0, {0,0,0,0,0}, nasm_bytecodes+21593, IF_286|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FSIN[] = {
- {I_FSIN, 0, {0,0,0,0,0}, nasm_bytecodes+19116, IF_386|IF_FPU},
+ {I_FSIN, 0, {0,0,0,0,0}, nasm_bytecodes+21597, IF_386|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FSINCOS[] = {
- {I_FSINCOS, 0, {0,0,0,0,0}, nasm_bytecodes+19120, IF_386|IF_FPU},
+ {I_FSINCOS, 0, {0,0,0,0,0}, nasm_bytecodes+21601, IF_386|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FSQRT[] = {
- {I_FSQRT, 0, {0,0,0,0,0}, nasm_bytecodes+19124, IF_8086|IF_FPU},
+ {I_FSQRT, 0, {0,0,0,0,0}, nasm_bytecodes+21605, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FST[] = {
- {I_FST, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+19128, IF_8086|IF_FPU},
- {I_FST, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+19132, IF_8086|IF_FPU},
- {I_FST, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17347, IF_8086|IF_FPU},
- {I_FST, 0, {0,0,0,0,0}, nasm_bytecodes+19136, IF_8086|IF_FPU},
+ {I_FST, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21609, IF_8086|IF_FPU},
+ {I_FST, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21613, IF_8086|IF_FPU},
+ {I_FST, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19914, IF_8086|IF_FPU},
+ {I_FST, 0, {0,0,0,0,0}, nasm_bytecodes+21617, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FSTCW[] = {
- {I_FSTCW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17352, IF_8086|IF_FPU|IF_SW},
+ {I_FSTCW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19919, IF_8086|IF_FPU|IF_SW},
ITEMPLATE_END
};
static const struct itemplate instrux_FSTENV[] = {
- {I_FSTENV, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17357, IF_8086|IF_FPU},
+ {I_FSTENV, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19924, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FSTP[] = {
- {I_FSTP, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+19140, IF_8086|IF_FPU},
- {I_FSTP, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+19144, IF_8086|IF_FPU},
- {I_FSTP, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+19148, IF_8086|IF_FPU},
- {I_FSTP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17362, IF_8086|IF_FPU},
- {I_FSTP, 0, {0,0,0,0,0}, nasm_bytecodes+19152, IF_8086|IF_FPU},
+ {I_FSTP, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21621, IF_8086|IF_FPU},
+ {I_FSTP, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21625, IF_8086|IF_FPU},
+ {I_FSTP, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+21629, IF_8086|IF_FPU},
+ {I_FSTP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19929, IF_8086|IF_FPU},
+ {I_FSTP, 0, {0,0,0,0,0}, nasm_bytecodes+21633, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FSTSW[] = {
- {I_FSTSW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17367, IF_8086|IF_FPU|IF_SW},
- {I_FSTSW, 1, {REG_AX,0,0,0,0}, nasm_bytecodes+17372, IF_286|IF_FPU},
+ {I_FSTSW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19934, IF_8086|IF_FPU|IF_SW},
+ {I_FSTSW, 1, {REG_AX,0,0,0,0}, nasm_bytecodes+19939, IF_286|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FSUB[] = {
- {I_FSUB, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+19156, IF_8086|IF_FPU},
- {I_FSUB, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+19160, IF_8086|IF_FPU},
- {I_FSUB, 1, {FPUREG|TO,0,0,0,0}, nasm_bytecodes+17377, IF_8086|IF_FPU},
- {I_FSUB, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17377, IF_8086|IF_FPU},
- {I_FSUB, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17382, IF_8086|IF_FPU},
- {I_FSUB, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17387, IF_8086|IF_FPU},
- {I_FSUB, 0, {0,0,0,0,0}, nasm_bytecodes+19164, IF_8086|IF_FPU},
+ {I_FSUB, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21637, IF_8086|IF_FPU},
+ {I_FSUB, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21641, IF_8086|IF_FPU},
+ {I_FSUB, 1, {FPUREG|TO,0,0,0,0}, nasm_bytecodes+19944, IF_8086|IF_FPU},
+ {I_FSUB, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+19944, IF_8086|IF_FPU},
+ {I_FSUB, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19949, IF_8086|IF_FPU},
+ {I_FSUB, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19954, IF_8086|IF_FPU},
+ {I_FSUB, 0, {0,0,0,0,0}, nasm_bytecodes+21645, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FSUBP[] = {
- {I_FSUBP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17392, IF_8086|IF_FPU},
- {I_FSUBP, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17392, IF_8086|IF_FPU},
- {I_FSUBP, 0, {0,0,0,0,0}, nasm_bytecodes+19164, IF_8086|IF_FPU},
+ {I_FSUBP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19959, IF_8086|IF_FPU},
+ {I_FSUBP, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+19959, IF_8086|IF_FPU},
+ {I_FSUBP, 0, {0,0,0,0,0}, nasm_bytecodes+21645, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FSUBR[] = {
- {I_FSUBR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+19168, IF_8086|IF_FPU},
- {I_FSUBR, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+19172, IF_8086|IF_FPU},
- {I_FSUBR, 1, {FPUREG|TO,0,0,0,0}, nasm_bytecodes+17397, IF_8086|IF_FPU},
- {I_FSUBR, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17397, IF_8086|IF_FPU},
- {I_FSUBR, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17402, IF_8086|IF_FPU},
- {I_FSUBR, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17407, IF_8086|IF_FPU},
- {I_FSUBR, 0, {0,0,0,0,0}, nasm_bytecodes+19176, IF_8086|IF_FPU},
+ {I_FSUBR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21649, IF_8086|IF_FPU},
+ {I_FSUBR, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21653, IF_8086|IF_FPU},
+ {I_FSUBR, 1, {FPUREG|TO,0,0,0,0}, nasm_bytecodes+19964, IF_8086|IF_FPU},
+ {I_FSUBR, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+19964, IF_8086|IF_FPU},
+ {I_FSUBR, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19969, IF_8086|IF_FPU},
+ {I_FSUBR, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19974, IF_8086|IF_FPU},
+ {I_FSUBR, 0, {0,0,0,0,0}, nasm_bytecodes+21657, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FSUBRP[] = {
- {I_FSUBRP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17412, IF_8086|IF_FPU},
- {I_FSUBRP, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17412, IF_8086|IF_FPU},
- {I_FSUBRP, 0, {0,0,0,0,0}, nasm_bytecodes+19176, IF_8086|IF_FPU},
+ {I_FSUBRP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19979, IF_8086|IF_FPU},
+ {I_FSUBRP, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+19979, IF_8086|IF_FPU},
+ {I_FSUBRP, 0, {0,0,0,0,0}, nasm_bytecodes+21657, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FTST[] = {
- {I_FTST, 0, {0,0,0,0,0}, nasm_bytecodes+19180, IF_8086|IF_FPU},
+ {I_FTST, 0, {0,0,0,0,0}, nasm_bytecodes+21661, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FUCOM[] = {
- {I_FUCOM, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17417, IF_386|IF_FPU},
- {I_FUCOM, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17422, IF_386|IF_FPU},
- {I_FUCOM, 0, {0,0,0,0,0}, nasm_bytecodes+19184, IF_386|IF_FPU},
+ {I_FUCOM, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19984, IF_386|IF_FPU},
+ {I_FUCOM, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19989, IF_386|IF_FPU},
+ {I_FUCOM, 0, {0,0,0,0,0}, nasm_bytecodes+21665, IF_386|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FUCOMI[] = {
- {I_FUCOMI, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17427, IF_P6|IF_FPU},
- {I_FUCOMI, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17432, IF_P6|IF_FPU},
- {I_FUCOMI, 0, {0,0,0,0,0}, nasm_bytecodes+19188, IF_P6|IF_FPU},
+ {I_FUCOMI, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19994, IF_P6|IF_FPU},
+ {I_FUCOMI, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19999, IF_P6|IF_FPU},
+ {I_FUCOMI, 0, {0,0,0,0,0}, nasm_bytecodes+21669, IF_P6|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FUCOMIP[] = {
- {I_FUCOMIP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17437, IF_P6|IF_FPU},
- {I_FUCOMIP, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17442, IF_P6|IF_FPU},
- {I_FUCOMIP, 0, {0,0,0,0,0}, nasm_bytecodes+19192, IF_P6|IF_FPU},
+ {I_FUCOMIP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+20004, IF_P6|IF_FPU},
+ {I_FUCOMIP, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+20009, IF_P6|IF_FPU},
+ {I_FUCOMIP, 0, {0,0,0,0,0}, nasm_bytecodes+21673, IF_P6|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FUCOMP[] = {
- {I_FUCOMP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17447, IF_386|IF_FPU},
- {I_FUCOMP, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17452, IF_386|IF_FPU},
- {I_FUCOMP, 0, {0,0,0,0,0}, nasm_bytecodes+19196, IF_386|IF_FPU},
+ {I_FUCOMP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+20014, IF_386|IF_FPU},
+ {I_FUCOMP, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+20019, IF_386|IF_FPU},
+ {I_FUCOMP, 0, {0,0,0,0,0}, nasm_bytecodes+21677, IF_386|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FUCOMPP[] = {
- {I_FUCOMPP, 0, {0,0,0,0,0}, nasm_bytecodes+19200, IF_386|IF_FPU},
+ {I_FUCOMPP, 0, {0,0,0,0,0}, nasm_bytecodes+21681, IF_386|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FWAIT[] = {
- {I_FWAIT, 0, {0,0,0,0,0}, nasm_bytecodes+19186, IF_8086},
+ {I_FWAIT, 0, {0,0,0,0,0}, nasm_bytecodes+21667, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_FXAM[] = {
- {I_FXAM, 0, {0,0,0,0,0}, nasm_bytecodes+19204, IF_8086|IF_FPU},
+ {I_FXAM, 0, {0,0,0,0,0}, nasm_bytecodes+21685, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FXCH[] = {
- {I_FXCH, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17457, IF_8086|IF_FPU},
- {I_FXCH, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17457, IF_8086|IF_FPU},
- {I_FXCH, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17462, IF_8086|IF_FPU},
- {I_FXCH, 0, {0,0,0,0,0}, nasm_bytecodes+19208, IF_8086|IF_FPU},
+ {I_FXCH, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+20024, IF_8086|IF_FPU},
+ {I_FXCH, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+20024, IF_8086|IF_FPU},
+ {I_FXCH, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+20029, IF_8086|IF_FPU},
+ {I_FXCH, 0, {0,0,0,0,0}, nasm_bytecodes+21689, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FXRSTOR[] = {
- {I_FXRSTOR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14709, IF_P6|IF_SSE|IF_FPU},
+ {I_FXRSTOR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17300, IF_P6|IF_SSE|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FXRSTOR64[] = {
- {I_FXRSTOR64, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14708, IF_X64|IF_SSE|IF_FPU},
+ {I_FXRSTOR64, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17299, IF_X64|IF_SSE|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FXSAVE[] = {
- {I_FXSAVE, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14715, IF_P6|IF_SSE|IF_FPU},
+ {I_FXSAVE, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17306, IF_P6|IF_SSE|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FXSAVE64[] = {
- {I_FXSAVE64, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14714, IF_X64|IF_SSE|IF_FPU},
+ {I_FXSAVE64, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17305, IF_X64|IF_SSE|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FXTRACT[] = {
- {I_FXTRACT, 0, {0,0,0,0,0}, nasm_bytecodes+19212, IF_8086|IF_FPU},
+ {I_FXTRACT, 0, {0,0,0,0,0}, nasm_bytecodes+21693, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FYL2X[] = {
- {I_FYL2X, 0, {0,0,0,0,0}, nasm_bytecodes+19216, IF_8086|IF_FPU},
+ {I_FYL2X, 0, {0,0,0,0,0}, nasm_bytecodes+21697, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_FYL2XP1[] = {
- {I_FYL2XP1, 0, {0,0,0,0,0}, nasm_bytecodes+19220, IF_8086|IF_FPU},
+ {I_FYL2XP1, 0, {0,0,0,0,0}, nasm_bytecodes+21701, IF_8086|IF_FPU},
ITEMPLATE_END
};
static const struct itemplate instrux_GETSEC[] = {
- {I_GETSEC, 0, {0,0,0,0,0}, nasm_bytecodes+19676, IF_KATMAI},
+ {I_GETSEC, 0, {0,0,0,0,0}, nasm_bytecodes+22113, IF_KATMAI},
ITEMPLATE_END
};
static const struct itemplate instrux_HADDPD[] = {
- {I_HADDPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15476, IF_PRESCOTT|IF_SSE3|IF_SO},
+ {I_HADDPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18067, IF_PRESCOTT|IF_SSE3|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_HADDPS[] = {
- {I_HADDPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15482, IF_PRESCOTT|IF_SSE3|IF_SO},
+ {I_HADDPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18073, IF_PRESCOTT|IF_SSE3|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP0[] = {
- {I_HINT_NOP0, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15638, IF_P6|IF_UNDOC},
- {I_HINT_NOP0, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15644, IF_P6|IF_UNDOC},
- {I_HINT_NOP0, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15650, IF_X64|IF_UNDOC},
+ {I_HINT_NOP0, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18265, IF_P6|IF_UNDOC},
+ {I_HINT_NOP0, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18271, IF_P6|IF_UNDOC},
+ {I_HINT_NOP0, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18277, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP1[] = {
- {I_HINT_NOP1, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15656, IF_P6|IF_UNDOC},
- {I_HINT_NOP1, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15662, IF_P6|IF_UNDOC},
- {I_HINT_NOP1, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15668, IF_X64|IF_UNDOC},
+ {I_HINT_NOP1, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18283, IF_P6|IF_UNDOC},
+ {I_HINT_NOP1, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18289, IF_P6|IF_UNDOC},
+ {I_HINT_NOP1, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18295, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP10[] = {
- {I_HINT_NOP10, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15818, IF_P6|IF_UNDOC},
- {I_HINT_NOP10, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15824, IF_P6|IF_UNDOC},
- {I_HINT_NOP10, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15830, IF_X64|IF_UNDOC},
+ {I_HINT_NOP10, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18445, IF_P6|IF_UNDOC},
+ {I_HINT_NOP10, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18451, IF_P6|IF_UNDOC},
+ {I_HINT_NOP10, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18457, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP11[] = {
- {I_HINT_NOP11, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15836, IF_P6|IF_UNDOC},
- {I_HINT_NOP11, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15842, IF_P6|IF_UNDOC},
- {I_HINT_NOP11, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15848, IF_X64|IF_UNDOC},
+ {I_HINT_NOP11, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18463, IF_P6|IF_UNDOC},
+ {I_HINT_NOP11, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18469, IF_P6|IF_UNDOC},
+ {I_HINT_NOP11, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18475, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP12[] = {
- {I_HINT_NOP12, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15854, IF_P6|IF_UNDOC},
- {I_HINT_NOP12, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15860, IF_P6|IF_UNDOC},
- {I_HINT_NOP12, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15866, IF_X64|IF_UNDOC},
+ {I_HINT_NOP12, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18481, IF_P6|IF_UNDOC},
+ {I_HINT_NOP12, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18487, IF_P6|IF_UNDOC},
+ {I_HINT_NOP12, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18493, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP13[] = {
- {I_HINT_NOP13, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15872, IF_P6|IF_UNDOC},
- {I_HINT_NOP13, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15878, IF_P6|IF_UNDOC},
- {I_HINT_NOP13, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15884, IF_X64|IF_UNDOC},
+ {I_HINT_NOP13, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18499, IF_P6|IF_UNDOC},
+ {I_HINT_NOP13, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18505, IF_P6|IF_UNDOC},
+ {I_HINT_NOP13, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18511, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP14[] = {
- {I_HINT_NOP14, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15890, IF_P6|IF_UNDOC},
- {I_HINT_NOP14, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15896, IF_P6|IF_UNDOC},
- {I_HINT_NOP14, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15902, IF_X64|IF_UNDOC},
+ {I_HINT_NOP14, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18517, IF_P6|IF_UNDOC},
+ {I_HINT_NOP14, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18523, IF_P6|IF_UNDOC},
+ {I_HINT_NOP14, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18529, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP15[] = {
- {I_HINT_NOP15, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15908, IF_P6|IF_UNDOC},
- {I_HINT_NOP15, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15914, IF_P6|IF_UNDOC},
- {I_HINT_NOP15, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15920, IF_X64|IF_UNDOC},
+ {I_HINT_NOP15, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18535, IF_P6|IF_UNDOC},
+ {I_HINT_NOP15, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18541, IF_P6|IF_UNDOC},
+ {I_HINT_NOP15, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18547, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP16[] = {
- {I_HINT_NOP16, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15926, IF_P6|IF_UNDOC},
- {I_HINT_NOP16, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15932, IF_P6|IF_UNDOC},
- {I_HINT_NOP16, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15938, IF_X64|IF_UNDOC},
+ {I_HINT_NOP16, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18553, IF_P6|IF_UNDOC},
+ {I_HINT_NOP16, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18559, IF_P6|IF_UNDOC},
+ {I_HINT_NOP16, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18565, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP17[] = {
- {I_HINT_NOP17, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15944, IF_P6|IF_UNDOC},
- {I_HINT_NOP17, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15950, IF_P6|IF_UNDOC},
- {I_HINT_NOP17, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15956, IF_X64|IF_UNDOC},
+ {I_HINT_NOP17, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18571, IF_P6|IF_UNDOC},
+ {I_HINT_NOP17, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18577, IF_P6|IF_UNDOC},
+ {I_HINT_NOP17, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18583, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP18[] = {
- {I_HINT_NOP18, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15962, IF_P6|IF_UNDOC},
- {I_HINT_NOP18, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15968, IF_P6|IF_UNDOC},
- {I_HINT_NOP18, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15974, IF_X64|IF_UNDOC},
+ {I_HINT_NOP18, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18589, IF_P6|IF_UNDOC},
+ {I_HINT_NOP18, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18595, IF_P6|IF_UNDOC},
+ {I_HINT_NOP18, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18601, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP19[] = {
- {I_HINT_NOP19, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15980, IF_P6|IF_UNDOC},
- {I_HINT_NOP19, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15986, IF_P6|IF_UNDOC},
- {I_HINT_NOP19, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15992, IF_X64|IF_UNDOC},
+ {I_HINT_NOP19, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18607, IF_P6|IF_UNDOC},
+ {I_HINT_NOP19, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18613, IF_P6|IF_UNDOC},
+ {I_HINT_NOP19, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18619, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP2[] = {
- {I_HINT_NOP2, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15674, IF_P6|IF_UNDOC},
- {I_HINT_NOP2, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15680, IF_P6|IF_UNDOC},
- {I_HINT_NOP2, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15686, IF_X64|IF_UNDOC},
+ {I_HINT_NOP2, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18301, IF_P6|IF_UNDOC},
+ {I_HINT_NOP2, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18307, IF_P6|IF_UNDOC},
+ {I_HINT_NOP2, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18313, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP20[] = {
- {I_HINT_NOP20, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15998, IF_P6|IF_UNDOC},
- {I_HINT_NOP20, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16004, IF_P6|IF_UNDOC},
- {I_HINT_NOP20, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16010, IF_X64|IF_UNDOC},
+ {I_HINT_NOP20, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18625, IF_P6|IF_UNDOC},
+ {I_HINT_NOP20, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18631, IF_P6|IF_UNDOC},
+ {I_HINT_NOP20, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18637, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP21[] = {
- {I_HINT_NOP21, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16016, IF_P6|IF_UNDOC},
- {I_HINT_NOP21, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16022, IF_P6|IF_UNDOC},
- {I_HINT_NOP21, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16028, IF_X64|IF_UNDOC},
+ {I_HINT_NOP21, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18643, IF_P6|IF_UNDOC},
+ {I_HINT_NOP21, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18649, IF_P6|IF_UNDOC},
+ {I_HINT_NOP21, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18655, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP22[] = {
- {I_HINT_NOP22, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16034, IF_P6|IF_UNDOC},
- {I_HINT_NOP22, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16040, IF_P6|IF_UNDOC},
- {I_HINT_NOP22, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16046, IF_X64|IF_UNDOC},
+ {I_HINT_NOP22, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18661, IF_P6|IF_UNDOC},
+ {I_HINT_NOP22, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18667, IF_P6|IF_UNDOC},
+ {I_HINT_NOP22, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18673, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP23[] = {
- {I_HINT_NOP23, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16052, IF_P6|IF_UNDOC},
- {I_HINT_NOP23, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16058, IF_P6|IF_UNDOC},
- {I_HINT_NOP23, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16064, IF_X64|IF_UNDOC},
+ {I_HINT_NOP23, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18679, IF_P6|IF_UNDOC},
+ {I_HINT_NOP23, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18685, IF_P6|IF_UNDOC},
+ {I_HINT_NOP23, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18691, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP24[] = {
- {I_HINT_NOP24, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16070, IF_P6|IF_UNDOC},
- {I_HINT_NOP24, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16076, IF_P6|IF_UNDOC},
- {I_HINT_NOP24, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16082, IF_X64|IF_UNDOC},
+ {I_HINT_NOP24, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18697, IF_P6|IF_UNDOC},
+ {I_HINT_NOP24, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18703, IF_P6|IF_UNDOC},
+ {I_HINT_NOP24, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18709, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP25[] = {
- {I_HINT_NOP25, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16088, IF_P6|IF_UNDOC},
- {I_HINT_NOP25, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16094, IF_P6|IF_UNDOC},
- {I_HINT_NOP25, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16100, IF_X64|IF_UNDOC},
+ {I_HINT_NOP25, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18715, IF_P6|IF_UNDOC},
+ {I_HINT_NOP25, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18721, IF_P6|IF_UNDOC},
+ {I_HINT_NOP25, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18727, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP26[] = {
- {I_HINT_NOP26, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16106, IF_P6|IF_UNDOC},
- {I_HINT_NOP26, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16112, IF_P6|IF_UNDOC},
- {I_HINT_NOP26, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16118, IF_X64|IF_UNDOC},
+ {I_HINT_NOP26, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18733, IF_P6|IF_UNDOC},
+ {I_HINT_NOP26, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18739, IF_P6|IF_UNDOC},
+ {I_HINT_NOP26, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18745, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP27[] = {
- {I_HINT_NOP27, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16124, IF_P6|IF_UNDOC},
- {I_HINT_NOP27, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16130, IF_P6|IF_UNDOC},
- {I_HINT_NOP27, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16136, IF_X64|IF_UNDOC},
+ {I_HINT_NOP27, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18751, IF_P6|IF_UNDOC},
+ {I_HINT_NOP27, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18757, IF_P6|IF_UNDOC},
+ {I_HINT_NOP27, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18763, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP28[] = {
- {I_HINT_NOP28, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16142, IF_P6|IF_UNDOC},
- {I_HINT_NOP28, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16148, IF_P6|IF_UNDOC},
- {I_HINT_NOP28, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16154, IF_X64|IF_UNDOC},
+ {I_HINT_NOP28, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18769, IF_P6|IF_UNDOC},
+ {I_HINT_NOP28, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18775, IF_P6|IF_UNDOC},
+ {I_HINT_NOP28, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18781, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP29[] = {
- {I_HINT_NOP29, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16160, IF_P6|IF_UNDOC},
- {I_HINT_NOP29, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16166, IF_P6|IF_UNDOC},
- {I_HINT_NOP29, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16172, IF_X64|IF_UNDOC},
+ {I_HINT_NOP29, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18787, IF_P6|IF_UNDOC},
+ {I_HINT_NOP29, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18793, IF_P6|IF_UNDOC},
+ {I_HINT_NOP29, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18799, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP3[] = {
- {I_HINT_NOP3, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15692, IF_P6|IF_UNDOC},
- {I_HINT_NOP3, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15698, IF_P6|IF_UNDOC},
- {I_HINT_NOP3, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15704, IF_X64|IF_UNDOC},
+ {I_HINT_NOP3, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18319, IF_P6|IF_UNDOC},
+ {I_HINT_NOP3, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18325, IF_P6|IF_UNDOC},
+ {I_HINT_NOP3, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18331, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP30[] = {
- {I_HINT_NOP30, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16178, IF_P6|IF_UNDOC},
- {I_HINT_NOP30, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16184, IF_P6|IF_UNDOC},
- {I_HINT_NOP30, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16190, IF_X64|IF_UNDOC},
+ {I_HINT_NOP30, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18805, IF_P6|IF_UNDOC},
+ {I_HINT_NOP30, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18811, IF_P6|IF_UNDOC},
+ {I_HINT_NOP30, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18817, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP31[] = {
- {I_HINT_NOP31, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16196, IF_P6|IF_UNDOC},
- {I_HINT_NOP31, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16202, IF_P6|IF_UNDOC},
- {I_HINT_NOP31, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16208, IF_X64|IF_UNDOC},
+ {I_HINT_NOP31, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18823, IF_P6|IF_UNDOC},
+ {I_HINT_NOP31, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18829, IF_P6|IF_UNDOC},
+ {I_HINT_NOP31, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18835, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP32[] = {
- {I_HINT_NOP32, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16214, IF_P6|IF_UNDOC},
- {I_HINT_NOP32, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16220, IF_P6|IF_UNDOC},
- {I_HINT_NOP32, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16226, IF_X64|IF_UNDOC},
+ {I_HINT_NOP32, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18841, IF_P6|IF_UNDOC},
+ {I_HINT_NOP32, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18847, IF_P6|IF_UNDOC},
+ {I_HINT_NOP32, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18853, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP33[] = {
- {I_HINT_NOP33, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16232, IF_P6|IF_UNDOC},
- {I_HINT_NOP33, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16238, IF_P6|IF_UNDOC},
- {I_HINT_NOP33, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16244, IF_X64|IF_UNDOC},
+ {I_HINT_NOP33, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18859, IF_P6|IF_UNDOC},
+ {I_HINT_NOP33, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18865, IF_P6|IF_UNDOC},
+ {I_HINT_NOP33, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18871, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP34[] = {
- {I_HINT_NOP34, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16250, IF_P6|IF_UNDOC},
- {I_HINT_NOP34, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16256, IF_P6|IF_UNDOC},
- {I_HINT_NOP34, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16262, IF_X64|IF_UNDOC},
+ {I_HINT_NOP34, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18877, IF_P6|IF_UNDOC},
+ {I_HINT_NOP34, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18883, IF_P6|IF_UNDOC},
+ {I_HINT_NOP34, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18889, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP35[] = {
- {I_HINT_NOP35, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16268, IF_P6|IF_UNDOC},
- {I_HINT_NOP35, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16274, IF_P6|IF_UNDOC},
- {I_HINT_NOP35, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16280, IF_X64|IF_UNDOC},
+ {I_HINT_NOP35, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18895, IF_P6|IF_UNDOC},
+ {I_HINT_NOP35, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18901, IF_P6|IF_UNDOC},
+ {I_HINT_NOP35, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18907, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP36[] = {
- {I_HINT_NOP36, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16286, IF_P6|IF_UNDOC},
- {I_HINT_NOP36, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16292, IF_P6|IF_UNDOC},
- {I_HINT_NOP36, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16298, IF_X64|IF_UNDOC},
+ {I_HINT_NOP36, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18913, IF_P6|IF_UNDOC},
+ {I_HINT_NOP36, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18919, IF_P6|IF_UNDOC},
+ {I_HINT_NOP36, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18925, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP37[] = {
- {I_HINT_NOP37, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16304, IF_P6|IF_UNDOC},
- {I_HINT_NOP37, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16310, IF_P6|IF_UNDOC},
- {I_HINT_NOP37, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16316, IF_X64|IF_UNDOC},
+ {I_HINT_NOP37, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18931, IF_P6|IF_UNDOC},
+ {I_HINT_NOP37, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18937, IF_P6|IF_UNDOC},
+ {I_HINT_NOP37, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18943, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP38[] = {
- {I_HINT_NOP38, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16322, IF_P6|IF_UNDOC},
- {I_HINT_NOP38, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16328, IF_P6|IF_UNDOC},
- {I_HINT_NOP38, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16334, IF_X64|IF_UNDOC},
+ {I_HINT_NOP38, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18949, IF_P6|IF_UNDOC},
+ {I_HINT_NOP38, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18955, IF_P6|IF_UNDOC},
+ {I_HINT_NOP38, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18961, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP39[] = {
- {I_HINT_NOP39, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16340, IF_P6|IF_UNDOC},
- {I_HINT_NOP39, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16346, IF_P6|IF_UNDOC},
- {I_HINT_NOP39, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16352, IF_X64|IF_UNDOC},
+ {I_HINT_NOP39, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18967, IF_P6|IF_UNDOC},
+ {I_HINT_NOP39, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18973, IF_P6|IF_UNDOC},
+ {I_HINT_NOP39, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18979, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP4[] = {
- {I_HINT_NOP4, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15710, IF_P6|IF_UNDOC},
- {I_HINT_NOP4, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15716, IF_P6|IF_UNDOC},
- {I_HINT_NOP4, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15722, IF_X64|IF_UNDOC},
+ {I_HINT_NOP4, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18337, IF_P6|IF_UNDOC},
+ {I_HINT_NOP4, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18343, IF_P6|IF_UNDOC},
+ {I_HINT_NOP4, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18349, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP40[] = {
- {I_HINT_NOP40, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16358, IF_P6|IF_UNDOC},
- {I_HINT_NOP40, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16364, IF_P6|IF_UNDOC},
- {I_HINT_NOP40, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16370, IF_X64|IF_UNDOC},
+ {I_HINT_NOP40, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18985, IF_P6|IF_UNDOC},
+ {I_HINT_NOP40, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18991, IF_P6|IF_UNDOC},
+ {I_HINT_NOP40, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18997, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP41[] = {
- {I_HINT_NOP41, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16376, IF_P6|IF_UNDOC},
- {I_HINT_NOP41, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16382, IF_P6|IF_UNDOC},
- {I_HINT_NOP41, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16388, IF_X64|IF_UNDOC},
+ {I_HINT_NOP41, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19003, IF_P6|IF_UNDOC},
+ {I_HINT_NOP41, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19009, IF_P6|IF_UNDOC},
+ {I_HINT_NOP41, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19015, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP42[] = {
- {I_HINT_NOP42, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16394, IF_P6|IF_UNDOC},
- {I_HINT_NOP42, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16400, IF_P6|IF_UNDOC},
- {I_HINT_NOP42, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16406, IF_X64|IF_UNDOC},
+ {I_HINT_NOP42, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19021, IF_P6|IF_UNDOC},
+ {I_HINT_NOP42, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19027, IF_P6|IF_UNDOC},
+ {I_HINT_NOP42, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19033, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP43[] = {
- {I_HINT_NOP43, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16412, IF_P6|IF_UNDOC},
- {I_HINT_NOP43, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16418, IF_P6|IF_UNDOC},
- {I_HINT_NOP43, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16424, IF_X64|IF_UNDOC},
+ {I_HINT_NOP43, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19039, IF_P6|IF_UNDOC},
+ {I_HINT_NOP43, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19045, IF_P6|IF_UNDOC},
+ {I_HINT_NOP43, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19051, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP44[] = {
- {I_HINT_NOP44, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16430, IF_P6|IF_UNDOC},
- {I_HINT_NOP44, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16436, IF_P6|IF_UNDOC},
- {I_HINT_NOP44, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16442, IF_X64|IF_UNDOC},
+ {I_HINT_NOP44, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19057, IF_P6|IF_UNDOC},
+ {I_HINT_NOP44, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19063, IF_P6|IF_UNDOC},
+ {I_HINT_NOP44, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19069, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP45[] = {
- {I_HINT_NOP45, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16448, IF_P6|IF_UNDOC},
- {I_HINT_NOP45, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16454, IF_P6|IF_UNDOC},
- {I_HINT_NOP45, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16460, IF_X64|IF_UNDOC},
+ {I_HINT_NOP45, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19075, IF_P6|IF_UNDOC},
+ {I_HINT_NOP45, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19081, IF_P6|IF_UNDOC},
+ {I_HINT_NOP45, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19087, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP46[] = {
- {I_HINT_NOP46, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16466, IF_P6|IF_UNDOC},
- {I_HINT_NOP46, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16472, IF_P6|IF_UNDOC},
- {I_HINT_NOP46, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16478, IF_X64|IF_UNDOC},
+ {I_HINT_NOP46, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19093, IF_P6|IF_UNDOC},
+ {I_HINT_NOP46, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19099, IF_P6|IF_UNDOC},
+ {I_HINT_NOP46, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19105, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP47[] = {
- {I_HINT_NOP47, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16484, IF_P6|IF_UNDOC},
- {I_HINT_NOP47, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16490, IF_P6|IF_UNDOC},
- {I_HINT_NOP47, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16496, IF_X64|IF_UNDOC},
+ {I_HINT_NOP47, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19111, IF_P6|IF_UNDOC},
+ {I_HINT_NOP47, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19117, IF_P6|IF_UNDOC},
+ {I_HINT_NOP47, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19123, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP48[] = {
- {I_HINT_NOP48, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16502, IF_P6|IF_UNDOC},
- {I_HINT_NOP48, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16508, IF_P6|IF_UNDOC},
- {I_HINT_NOP48, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16514, IF_X64|IF_UNDOC},
+ {I_HINT_NOP48, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19129, IF_P6|IF_UNDOC},
+ {I_HINT_NOP48, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19135, IF_P6|IF_UNDOC},
+ {I_HINT_NOP48, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19141, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP49[] = {
- {I_HINT_NOP49, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16520, IF_P6|IF_UNDOC},
- {I_HINT_NOP49, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16526, IF_P6|IF_UNDOC},
- {I_HINT_NOP49, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16532, IF_X64|IF_UNDOC},
+ {I_HINT_NOP49, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19147, IF_P6|IF_UNDOC},
+ {I_HINT_NOP49, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19153, IF_P6|IF_UNDOC},
+ {I_HINT_NOP49, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19159, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP5[] = {
- {I_HINT_NOP5, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15728, IF_P6|IF_UNDOC},
- {I_HINT_NOP5, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15734, IF_P6|IF_UNDOC},
- {I_HINT_NOP5, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15740, IF_X64|IF_UNDOC},
+ {I_HINT_NOP5, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18355, IF_P6|IF_UNDOC},
+ {I_HINT_NOP5, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18361, IF_P6|IF_UNDOC},
+ {I_HINT_NOP5, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18367, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP50[] = {
- {I_HINT_NOP50, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16538, IF_P6|IF_UNDOC},
- {I_HINT_NOP50, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16544, IF_P6|IF_UNDOC},
- {I_HINT_NOP50, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16550, IF_X64|IF_UNDOC},
+ {I_HINT_NOP50, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19165, IF_P6|IF_UNDOC},
+ {I_HINT_NOP50, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19171, IF_P6|IF_UNDOC},
+ {I_HINT_NOP50, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19177, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP51[] = {
- {I_HINT_NOP51, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16556, IF_P6|IF_UNDOC},
- {I_HINT_NOP51, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16562, IF_P6|IF_UNDOC},
- {I_HINT_NOP51, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16568, IF_X64|IF_UNDOC},
+ {I_HINT_NOP51, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19183, IF_P6|IF_UNDOC},
+ {I_HINT_NOP51, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19189, IF_P6|IF_UNDOC},
+ {I_HINT_NOP51, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19195, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP52[] = {
- {I_HINT_NOP52, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16574, IF_P6|IF_UNDOC},
- {I_HINT_NOP52, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16580, IF_P6|IF_UNDOC},
- {I_HINT_NOP52, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16586, IF_X64|IF_UNDOC},
+ {I_HINT_NOP52, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19201, IF_P6|IF_UNDOC},
+ {I_HINT_NOP52, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19207, IF_P6|IF_UNDOC},
+ {I_HINT_NOP52, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19213, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP53[] = {
- {I_HINT_NOP53, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16592, IF_P6|IF_UNDOC},
- {I_HINT_NOP53, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16598, IF_P6|IF_UNDOC},
- {I_HINT_NOP53, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16604, IF_X64|IF_UNDOC},
+ {I_HINT_NOP53, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19219, IF_P6|IF_UNDOC},
+ {I_HINT_NOP53, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19225, IF_P6|IF_UNDOC},
+ {I_HINT_NOP53, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19231, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP54[] = {
- {I_HINT_NOP54, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16610, IF_P6|IF_UNDOC},
- {I_HINT_NOP54, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16616, IF_P6|IF_UNDOC},
- {I_HINT_NOP54, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16622, IF_X64|IF_UNDOC},
+ {I_HINT_NOP54, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19237, IF_P6|IF_UNDOC},
+ {I_HINT_NOP54, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19243, IF_P6|IF_UNDOC},
+ {I_HINT_NOP54, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19249, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP55[] = {
- {I_HINT_NOP55, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16628, IF_P6|IF_UNDOC},
- {I_HINT_NOP55, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16634, IF_P6|IF_UNDOC},
- {I_HINT_NOP55, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16640, IF_X64|IF_UNDOC},
+ {I_HINT_NOP55, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19255, IF_P6|IF_UNDOC},
+ {I_HINT_NOP55, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19261, IF_P6|IF_UNDOC},
+ {I_HINT_NOP55, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19267, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP56[] = {
- {I_HINT_NOP56, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+13976, IF_P6|IF_UNDOC},
- {I_HINT_NOP56, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+13982, IF_P6|IF_UNDOC},
- {I_HINT_NOP56, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+13988, IF_X64|IF_UNDOC},
+ {I_HINT_NOP56, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16549, IF_P6|IF_UNDOC},
+ {I_HINT_NOP56, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16555, IF_P6|IF_UNDOC},
+ {I_HINT_NOP56, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16561, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP57[] = {
- {I_HINT_NOP57, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16646, IF_P6|IF_UNDOC},
- {I_HINT_NOP57, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16652, IF_P6|IF_UNDOC},
- {I_HINT_NOP57, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16658, IF_X64|IF_UNDOC},
+ {I_HINT_NOP57, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19273, IF_P6|IF_UNDOC},
+ {I_HINT_NOP57, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19279, IF_P6|IF_UNDOC},
+ {I_HINT_NOP57, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19285, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP58[] = {
- {I_HINT_NOP58, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16664, IF_P6|IF_UNDOC},
- {I_HINT_NOP58, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16670, IF_P6|IF_UNDOC},
- {I_HINT_NOP58, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16676, IF_X64|IF_UNDOC},
+ {I_HINT_NOP58, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19291, IF_P6|IF_UNDOC},
+ {I_HINT_NOP58, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19297, IF_P6|IF_UNDOC},
+ {I_HINT_NOP58, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19303, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP59[] = {
- {I_HINT_NOP59, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16682, IF_P6|IF_UNDOC},
- {I_HINT_NOP59, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16688, IF_P6|IF_UNDOC},
- {I_HINT_NOP59, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16694, IF_X64|IF_UNDOC},
+ {I_HINT_NOP59, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19309, IF_P6|IF_UNDOC},
+ {I_HINT_NOP59, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19315, IF_P6|IF_UNDOC},
+ {I_HINT_NOP59, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19321, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP6[] = {
- {I_HINT_NOP6, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15746, IF_P6|IF_UNDOC},
- {I_HINT_NOP6, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15752, IF_P6|IF_UNDOC},
- {I_HINT_NOP6, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15758, IF_X64|IF_UNDOC},
+ {I_HINT_NOP6, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18373, IF_P6|IF_UNDOC},
+ {I_HINT_NOP6, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18379, IF_P6|IF_UNDOC},
+ {I_HINT_NOP6, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18385, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP60[] = {
- {I_HINT_NOP60, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16700, IF_P6|IF_UNDOC},
- {I_HINT_NOP60, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16706, IF_P6|IF_UNDOC},
- {I_HINT_NOP60, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16712, IF_X64|IF_UNDOC},
+ {I_HINT_NOP60, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19327, IF_P6|IF_UNDOC},
+ {I_HINT_NOP60, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19333, IF_P6|IF_UNDOC},
+ {I_HINT_NOP60, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19339, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP61[] = {
- {I_HINT_NOP61, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16718, IF_P6|IF_UNDOC},
- {I_HINT_NOP61, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16724, IF_P6|IF_UNDOC},
- {I_HINT_NOP61, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16730, IF_X64|IF_UNDOC},
+ {I_HINT_NOP61, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19345, IF_P6|IF_UNDOC},
+ {I_HINT_NOP61, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19351, IF_P6|IF_UNDOC},
+ {I_HINT_NOP61, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19357, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP62[] = {
- {I_HINT_NOP62, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16736, IF_P6|IF_UNDOC},
- {I_HINT_NOP62, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16742, IF_P6|IF_UNDOC},
- {I_HINT_NOP62, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16748, IF_X64|IF_UNDOC},
+ {I_HINT_NOP62, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19363, IF_P6|IF_UNDOC},
+ {I_HINT_NOP62, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19369, IF_P6|IF_UNDOC},
+ {I_HINT_NOP62, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19375, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP63[] = {
- {I_HINT_NOP63, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16754, IF_P6|IF_UNDOC},
- {I_HINT_NOP63, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16760, IF_P6|IF_UNDOC},
- {I_HINT_NOP63, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16766, IF_X64|IF_UNDOC},
+ {I_HINT_NOP63, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19381, IF_P6|IF_UNDOC},
+ {I_HINT_NOP63, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19387, IF_P6|IF_UNDOC},
+ {I_HINT_NOP63, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19393, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP7[] = {
- {I_HINT_NOP7, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15764, IF_P6|IF_UNDOC},
- {I_HINT_NOP7, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15770, IF_P6|IF_UNDOC},
- {I_HINT_NOP7, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15776, IF_X64|IF_UNDOC},
+ {I_HINT_NOP7, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18391, IF_P6|IF_UNDOC},
+ {I_HINT_NOP7, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18397, IF_P6|IF_UNDOC},
+ {I_HINT_NOP7, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18403, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP8[] = {
- {I_HINT_NOP8, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15782, IF_P6|IF_UNDOC},
- {I_HINT_NOP8, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15788, IF_P6|IF_UNDOC},
- {I_HINT_NOP8, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15794, IF_X64|IF_UNDOC},
+ {I_HINT_NOP8, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18409, IF_P6|IF_UNDOC},
+ {I_HINT_NOP8, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18415, IF_P6|IF_UNDOC},
+ {I_HINT_NOP8, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18421, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HINT_NOP9[] = {
- {I_HINT_NOP9, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15800, IF_P6|IF_UNDOC},
- {I_HINT_NOP9, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15806, IF_P6|IF_UNDOC},
- {I_HINT_NOP9, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15812, IF_X64|IF_UNDOC},
+ {I_HINT_NOP9, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18427, IF_P6|IF_UNDOC},
+ {I_HINT_NOP9, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18433, IF_P6|IF_UNDOC},
+ {I_HINT_NOP9, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18439, IF_X64|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_HLT[] = {
- {I_HLT, 0, {0,0,0,0,0}, nasm_bytecodes+19701, IF_8086|IF_PRIV},
+ {I_HLT, 0, {0,0,0,0,0}, nasm_bytecodes+22138, IF_8086|IF_PRIV},
ITEMPLATE_END
};
static const struct itemplate instrux_HSUBPD[] = {
- {I_HSUBPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15488, IF_PRESCOTT|IF_SSE3|IF_SO},
+ {I_HSUBPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18079, IF_PRESCOTT|IF_SSE3|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_HSUBPS[] = {
- {I_HSUBPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15494, IF_PRESCOTT|IF_SSE3|IF_SO},
+ {I_HSUBPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18085, IF_PRESCOTT|IF_SSE3|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_IBTS[] = {
- {I_IBTS, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13538, IF_386|IF_SW|IF_UNDOC},
- {I_IBTS, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13538, IF_386|IF_UNDOC},
- {I_IBTS, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13544, IF_386|IF_SD|IF_UNDOC},
- {I_IBTS, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13544, IF_386|IF_UNDOC},
+ {I_IBTS, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16033, IF_386|IF_SW|IF_UNDOC},
+ {I_IBTS, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16033, IF_386|IF_UNDOC},
+ {I_IBTS, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16039, IF_386|IF_SD|IF_UNDOC},
+ {I_IBTS, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16039, IF_386|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_ICEBP[] = {
- {I_ICEBP, 0, {0,0,0,0,0}, nasm_bytecodes+19704, IF_386},
+ {I_ICEBP, 0, {0,0,0,0,0}, nasm_bytecodes+22141, IF_386},
ITEMPLATE_END
};
static const struct itemplate instrux_IDIV[] = {
- {I_IDIV, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+19224, IF_8086},
- {I_IDIV, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17467, IF_8086},
- {I_IDIV, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+17472, IF_386},
- {I_IDIV, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+17477, IF_X64},
+ {I_IDIV, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+21705, IF_8086},
+ {I_IDIV, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+20034, IF_8086},
+ {I_IDIV, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+20039, IF_386},
+ {I_IDIV, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+20044, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_IMUL[] = {
- {I_IMUL, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+19228, IF_8086},
- {I_IMUL, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17482, IF_8086},
- {I_IMUL, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+17487, IF_386},
- {I_IMUL, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+17492, IF_X64},
- {I_IMUL, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+13556, IF_386|IF_SM},
- {I_IMUL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13556, IF_386},
- {I_IMUL, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+13562, IF_386|IF_SM},
- {I_IMUL, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13562, IF_386},
- {I_IMUL, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+13568, IF_X64|IF_SM},
- {I_IMUL, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13568, IF_X64},
- {I_IMUL, 3, {REG_GPR|BITS16,MEMORY,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+13574, IF_186|IF_SM},
- {I_IMUL, 3, {REG_GPR|BITS16,MEMORY,SBYTE16,0,0}, nasm_bytecodes+13574, IF_186|IF_SM},
- {I_IMUL, 3, {REG_GPR|BITS16,MEMORY,IMMEDIATE|BITS16,0,0}, nasm_bytecodes+13580, IF_186|IF_SM},
- {I_IMUL, 3, {REG_GPR|BITS16,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+13586, IF_186|IF_SM},
- {I_IMUL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+13574, IF_186},
- {I_IMUL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,SBYTE16,0,0}, nasm_bytecodes+13574, IF_186|IF_SM},
- {I_IMUL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE|BITS16,0,0}, nasm_bytecodes+13580, IF_186},
- {I_IMUL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+13586, IF_186|IF_SM},
- {I_IMUL, 3, {REG_GPR|BITS32,MEMORY,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+13592, IF_386|IF_SM},
- {I_IMUL, 3, {REG_GPR|BITS32,MEMORY,SBYTE32,0,0}, nasm_bytecodes+13592, IF_386|IF_SM},
- {I_IMUL, 3, {REG_GPR|BITS32,MEMORY,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+13598, IF_386|IF_SM},
- {I_IMUL, 3, {REG_GPR|BITS32,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+13604, IF_386|IF_SM},
- {I_IMUL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+13592, IF_386},
- {I_IMUL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,SBYTE32,0,0}, nasm_bytecodes+13592, IF_386|IF_SM},
- {I_IMUL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+13598, IF_386},
- {I_IMUL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+13604, IF_386|IF_SM},
- {I_IMUL, 3, {REG_GPR|BITS64,MEMORY,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+13610, IF_X64|IF_SM},
- {I_IMUL, 3, {REG_GPR|BITS64,MEMORY,SBYTE64,0,0}, nasm_bytecodes+13610, IF_X64|IF_SM},
- {I_IMUL, 3, {REG_GPR|BITS64,MEMORY,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+13616, IF_X64|IF_SM},
- {I_IMUL, 3, {REG_GPR|BITS64,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+13622, IF_X64|IF_SM},
- {I_IMUL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+13610, IF_X64},
- {I_IMUL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,SBYTE64,0,0}, nasm_bytecodes+13610, IF_X64|IF_SM},
- {I_IMUL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+13616, IF_X64},
- {I_IMUL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE,0,0}, nasm_bytecodes+13622, IF_X64|IF_SM},
- {I_IMUL, 2, {REG_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13628, IF_186},
- {I_IMUL, 2, {REG_GPR|BITS16,SBYTE16,0,0,0}, nasm_bytecodes+13628, IF_186|IF_SM},
- {I_IMUL, 2, {REG_GPR|BITS16,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+13634, IF_186},
- {I_IMUL, 2, {REG_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+13640, IF_186|IF_SM},
- {I_IMUL, 2, {REG_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13646, IF_386},
- {I_IMUL, 2, {REG_GPR|BITS32,SBYTE32,0,0,0}, nasm_bytecodes+13646, IF_386|IF_SM},
- {I_IMUL, 2, {REG_GPR|BITS32,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+13652, IF_386},
- {I_IMUL, 2, {REG_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+13658, IF_386|IF_SM},
- {I_IMUL, 2, {REG_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13664, IF_X64},
- {I_IMUL, 2, {REG_GPR|BITS64,SBYTE64,0,0,0}, nasm_bytecodes+13664, IF_X64|IF_SM},
- {I_IMUL, 2, {REG_GPR|BITS64,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+13670, IF_X64},
- {I_IMUL, 2, {REG_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+13676, IF_X64|IF_SM},
+ {I_IMUL, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+21709, IF_8086},
+ {I_IMUL, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+20049, IF_8086},
+ {I_IMUL, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+20054, IF_386},
+ {I_IMUL, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+20059, IF_X64},
+ {I_IMUL, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16075, IF_386|IF_SM},
+ {I_IMUL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16075, IF_386},
+ {I_IMUL, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+16081, IF_386|IF_SM},
+ {I_IMUL, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16081, IF_386},
+ {I_IMUL, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+16087, IF_X64|IF_SM},
+ {I_IMUL, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16087, IF_X64},
+ {I_IMUL, 3, {REG_GPR|BITS16,MEMORY,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+16093, IF_186|IF_SM},
+ {I_IMUL, 3, {REG_GPR|BITS16,MEMORY,SBYTE16,0,0}, nasm_bytecodes+16093, IF_186|IF_SM},
+ {I_IMUL, 3, {REG_GPR|BITS16,MEMORY,IMMEDIATE|BITS16,0,0}, nasm_bytecodes+16099, IF_186|IF_SM},
+ {I_IMUL, 3, {REG_GPR|BITS16,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+16105, IF_186|IF_SM},
+ {I_IMUL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+16093, IF_186},
+ {I_IMUL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,SBYTE16,0,0}, nasm_bytecodes+16093, IF_186|IF_SM},
+ {I_IMUL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE|BITS16,0,0}, nasm_bytecodes+16099, IF_186},
+ {I_IMUL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+16105, IF_186|IF_SM},
+ {I_IMUL, 3, {REG_GPR|BITS32,MEMORY,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+16111, IF_386|IF_SM},
+ {I_IMUL, 3, {REG_GPR|BITS32,MEMORY,SBYTE32,0,0}, nasm_bytecodes+16111, IF_386|IF_SM},
+ {I_IMUL, 3, {REG_GPR|BITS32,MEMORY,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+16117, IF_386|IF_SM},
+ {I_IMUL, 3, {REG_GPR|BITS32,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+16123, IF_386|IF_SM},
+ {I_IMUL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+16111, IF_386},
+ {I_IMUL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,SBYTE32,0,0}, nasm_bytecodes+16111, IF_386|IF_SM},
+ {I_IMUL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+16117, IF_386},
+ {I_IMUL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+16123, IF_386|IF_SM},
+ {I_IMUL, 3, {REG_GPR|BITS64,MEMORY,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+16129, IF_X64|IF_SM},
+ {I_IMUL, 3, {REG_GPR|BITS64,MEMORY,SBYTE64,0,0}, nasm_bytecodes+16129, IF_X64|IF_SM},
+ {I_IMUL, 3, {REG_GPR|BITS64,MEMORY,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+16135, IF_X64|IF_SM},
+ {I_IMUL, 3, {REG_GPR|BITS64,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+16141, IF_X64|IF_SM},
+ {I_IMUL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+16129, IF_X64},
+ {I_IMUL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,SBYTE64,0,0}, nasm_bytecodes+16129, IF_X64|IF_SM},
+ {I_IMUL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+16135, IF_X64},
+ {I_IMUL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE,0,0}, nasm_bytecodes+16141, IF_X64|IF_SM},
+ {I_IMUL, 2, {REG_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16147, IF_186},
+ {I_IMUL, 2, {REG_GPR|BITS16,SBYTE16,0,0,0}, nasm_bytecodes+16147, IF_186|IF_SM},
+ {I_IMUL, 2, {REG_GPR|BITS16,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+16153, IF_186},
+ {I_IMUL, 2, {REG_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+16159, IF_186|IF_SM},
+ {I_IMUL, 2, {REG_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16165, IF_386},
+ {I_IMUL, 2, {REG_GPR|BITS32,SBYTE32,0,0,0}, nasm_bytecodes+16165, IF_386|IF_SM},
+ {I_IMUL, 2, {REG_GPR|BITS32,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+16171, IF_386},
+ {I_IMUL, 2, {REG_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+16177, IF_386|IF_SM},
+ {I_IMUL, 2, {REG_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16183, IF_X64},
+ {I_IMUL, 2, {REG_GPR|BITS64,SBYTE64,0,0,0}, nasm_bytecodes+16183, IF_X64|IF_SM},
+ {I_IMUL, 2, {REG_GPR|BITS64,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+16189, IF_X64},
+ {I_IMUL, 2, {REG_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+16195, IF_X64|IF_SM},
ITEMPLATE_END
};
static const struct itemplate instrux_IN[] = {
- {I_IN, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+19232, IF_8086|IF_SB},
- {I_IN, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+17497, IF_8086|IF_SB},
- {I_IN, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+17502, IF_386|IF_SB},
- {I_IN, 2, {REG_AL,REG_DX,0,0,0}, nasm_bytecodes+19707, IF_8086},
- {I_IN, 2, {REG_AX,REG_DX,0,0,0}, nasm_bytecodes+19236, IF_8086},
- {I_IN, 2, {REG_EAX,REG_DX,0,0,0}, nasm_bytecodes+19240, IF_386},
+ {I_IN, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+21713, IF_8086|IF_SB},
+ {I_IN, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+20064, IF_8086|IF_SB},
+ {I_IN, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+20069, IF_386|IF_SB},
+ {I_IN, 2, {REG_AL,REG_DX,0,0,0}, nasm_bytecodes+22144, IF_8086},
+ {I_IN, 2, {REG_AX,REG_DX,0,0,0}, nasm_bytecodes+21717, IF_8086},
+ {I_IN, 2, {REG_EAX,REG_DX,0,0,0}, nasm_bytecodes+21721, IF_386},
ITEMPLATE_END
};
static const struct itemplate instrux_INC[] = {
- {I_INC, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19244, IF_8086|IF_NOLONG},
- {I_INC, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19248, IF_386|IF_NOLONG},
- {I_INC, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+19252, IF_8086},
- {I_INC, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17507, IF_8086},
- {I_INC, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+17512, IF_386},
- {I_INC, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+17517, IF_X64},
+ {I_INC, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+21725, IF_8086|IF_NOLONG},
+ {I_INC, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+21729, IF_386|IF_NOLONG},
+ {I_INC, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+20074, IF_8086|IF_LOCK},
+ {I_INC, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16201, IF_8086|IF_LOCK},
+ {I_INC, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16207, IF_386|IF_LOCK},
+ {I_INC, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16213, IF_X64|IF_LOCK},
ITEMPLATE_END
};
@@ -2192,1154 +2250,1179 @@ static const struct itemplate instrux_INCBIN[] = {
};
static const struct itemplate instrux_INSB[] = {
- {I_INSB, 0, {0,0,0,0,0}, nasm_bytecodes+19710, IF_186},
+ {I_INSB, 0, {0,0,0,0,0}, nasm_bytecodes+22147, IF_186},
ITEMPLATE_END
};
static const struct itemplate instrux_INSD[] = {
- {I_INSD, 0, {0,0,0,0,0}, nasm_bytecodes+19256, IF_386},
+ {I_INSD, 0, {0,0,0,0,0}, nasm_bytecodes+21733, IF_386},
ITEMPLATE_END
};
static const struct itemplate instrux_INSERTPS[] = {
- {I_INSERTPS, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5720, IF_SSE41|IF_SD},
+ {I_INSERTPS, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4226, IF_SSE41|IF_SD},
ITEMPLATE_END
};
static const struct itemplate instrux_INSERTQ[] = {
- {I_INSERTQ, 4, {XMMREG,XMMREG,IMMEDIATE,IMMEDIATE,0}, nasm_bytecodes+5680, IF_SSE4A|IF_AMD},
- {I_INSERTQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+15542, IF_SSE4A|IF_AMD},
+ {I_INSERTQ, 4, {XMMREG,XMMREG,IMMEDIATE,IMMEDIATE,0}, nasm_bytecodes+4186, IF_SSE4A|IF_AMD},
+ {I_INSERTQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+18133, IF_SSE4A|IF_AMD},
ITEMPLATE_END
};
static const struct itemplate instrux_INSW[] = {
- {I_INSW, 0, {0,0,0,0,0}, nasm_bytecodes+19260, IF_186},
+ {I_INSW, 0, {0,0,0,0,0}, nasm_bytecodes+21737, IF_186},
ITEMPLATE_END
};
static const struct itemplate instrux_INT[] = {
- {I_INT, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+19264, IF_8086|IF_SB},
+ {I_INT, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+21741, IF_8086|IF_SB},
ITEMPLATE_END
};
static const struct itemplate instrux_INT01[] = {
- {I_INT01, 0, {0,0,0,0,0}, nasm_bytecodes+19704, IF_386},
+ {I_INT01, 0, {0,0,0,0,0}, nasm_bytecodes+22141, IF_386},
ITEMPLATE_END
};
static const struct itemplate instrux_INT03[] = {
- {I_INT03, 0, {0,0,0,0,0}, nasm_bytecodes+19713, IF_8086},
+ {I_INT03, 0, {0,0,0,0,0}, nasm_bytecodes+22150, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_INT1[] = {
- {I_INT1, 0, {0,0,0,0,0}, nasm_bytecodes+19704, IF_386},
+ {I_INT1, 0, {0,0,0,0,0}, nasm_bytecodes+22141, IF_386},
ITEMPLATE_END
};
static const struct itemplate instrux_INT3[] = {
- {I_INT3, 0, {0,0,0,0,0}, nasm_bytecodes+19713, IF_8086},
+ {I_INT3, 0, {0,0,0,0,0}, nasm_bytecodes+22150, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_INTO[] = {
- {I_INTO, 0, {0,0,0,0,0}, nasm_bytecodes+19716, IF_8086|IF_NOLONG},
+ {I_INTO, 0, {0,0,0,0,0}, nasm_bytecodes+22153, IF_8086|IF_NOLONG},
ITEMPLATE_END
};
static const struct itemplate instrux_INVD[] = {
- {I_INVD, 0, {0,0,0,0,0}, nasm_bytecodes+19268, IF_486|IF_PRIV},
+ {I_INVD, 0, {0,0,0,0,0}, nasm_bytecodes+21745, IF_486|IF_PRIV},
ITEMPLATE_END
};
static const struct itemplate instrux_INVEPT[] = {
- {I_INVEPT, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+5641, IF_VMX|IF_SO|IF_NOLONG},
- {I_INVEPT, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+5640, IF_VMX|IF_SO|IF_LONG},
+ {I_INVEPT, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+4147, IF_VMX|IF_SO|IF_NOLONG},
+ {I_INVEPT, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+4146, IF_VMX|IF_SO|IF_LONG},
ITEMPLATE_END
};
static const struct itemplate instrux_INVLPG[] = {
- {I_INVLPG, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17522, IF_486|IF_PRIV},
+ {I_INVLPG, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20079, IF_486|IF_PRIV},
ITEMPLATE_END
};
static const struct itemplate instrux_INVLPGA[] = {
- {I_INVLPGA, 2, {REG_AX,REG_ECX,0,0,0}, nasm_bytecodes+13682, IF_X86_64|IF_AMD|IF_NOLONG},
- {I_INVLPGA, 2, {REG_EAX,REG_ECX,0,0,0}, nasm_bytecodes+13688, IF_X86_64|IF_AMD},
- {I_INVLPGA, 2, {REG_RAX,REG_ECX,0,0,0}, nasm_bytecodes+7004, IF_X64|IF_AMD},
- {I_INVLPGA, 0, {0,0,0,0,0}, nasm_bytecodes+13689, IF_X86_64|IF_AMD},
+ {I_INVLPGA, 2, {REG_AX,REG_ECX,0,0,0}, nasm_bytecodes+16219, IF_X86_64|IF_AMD|IF_NOLONG},
+ {I_INVLPGA, 2, {REG_EAX,REG_ECX,0,0,0}, nasm_bytecodes+16225, IF_X86_64|IF_AMD},
+ {I_INVLPGA, 2, {REG_RAX,REG_ECX,0,0,0}, nasm_bytecodes+7560, IF_X64|IF_AMD},
+ {I_INVLPGA, 0, {0,0,0,0,0}, nasm_bytecodes+16226, IF_X86_64|IF_AMD},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_INVPCID[] = {
+ {I_INVPCID, 2, {REG_GPR|BITS32,MEMORY|BITS128,0,0,0}, nasm_bytecodes+7553, IF_FUTURE|IF_INVPCID|IF_PRIV|IF_NOLONG},
+ {I_INVPCID, 2, {REG_GPR|BITS64,MEMORY|BITS128,0,0,0}, nasm_bytecodes+7553, IF_FUTURE|IF_INVPCID|IF_PRIV|IF_LONG},
ITEMPLATE_END
};
static const struct itemplate instrux_INVVPID[] = {
- {I_INVVPID, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+5649, IF_VMX|IF_SO|IF_NOLONG},
- {I_INVVPID, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+5648, IF_VMX|IF_SO|IF_LONG},
+ {I_INVVPID, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+4155, IF_VMX|IF_SO|IF_NOLONG},
+ {I_INVVPID, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+4154, IF_VMX|IF_SO|IF_LONG},
ITEMPLATE_END
};
static const struct itemplate instrux_IRET[] = {
- {I_IRET, 0, {0,0,0,0,0}, nasm_bytecodes+19272, IF_8086},
+ {I_IRET, 0, {0,0,0,0,0}, nasm_bytecodes+21749, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_IRETD[] = {
- {I_IRETD, 0, {0,0,0,0,0}, nasm_bytecodes+19276, IF_386},
+ {I_IRETD, 0, {0,0,0,0,0}, nasm_bytecodes+21753, IF_386},
ITEMPLATE_END
};
static const struct itemplate instrux_IRETQ[] = {
- {I_IRETQ, 0, {0,0,0,0,0}, nasm_bytecodes+19280, IF_X64},
+ {I_IRETQ, 0, {0,0,0,0,0}, nasm_bytecodes+21757, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_IRETW[] = {
- {I_IRETW, 0, {0,0,0,0,0}, nasm_bytecodes+19284, IF_8086},
+ {I_IRETW, 0, {0,0,0,0,0}, nasm_bytecodes+21761, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_JCXZ[] = {
- {I_JCXZ, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+17527, IF_8086|IF_NOLONG},
+ {I_JCXZ, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+20084, IF_8086|IF_NOLONG},
ITEMPLATE_END
};
static const struct itemplate instrux_JECXZ[] = {
- {I_JECXZ, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+17532, IF_386},
+ {I_JECXZ, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+20089, IF_386},
ITEMPLATE_END
};
static const struct itemplate instrux_JMP[] = {
- {I_JMP, 1, {IMMEDIATE|SHORT,0,0,0,0}, nasm_bytecodes+17543, IF_8086},
- {I_JMP, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+17542, IF_8086},
- {I_JMP, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+17547, IF_8086},
- {I_JMP, 1, {IMMEDIATE|NEAR,0,0,0,0}, nasm_bytecodes+17547, IF_8086},
- {I_JMP, 1, {IMMEDIATE|FAR,0,0,0,0}, nasm_bytecodes+13694, IF_8086|IF_NOLONG},
- {I_JMP, 1, {IMMEDIATE|BITS16,0,0,0,0}, nasm_bytecodes+17552, IF_8086},
- {I_JMP, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, nasm_bytecodes+17552, IF_8086},
- {I_JMP, 1, {IMMEDIATE|BITS16|FAR,0,0,0,0}, nasm_bytecodes+13700, IF_8086|IF_NOLONG},
- {I_JMP, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+17557, IF_386},
- {I_JMP, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, nasm_bytecodes+17557, IF_386},
- {I_JMP, 1, {IMMEDIATE|BITS32|FAR,0,0,0,0}, nasm_bytecodes+13706, IF_386|IF_NOLONG},
- {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+13712, IF_8086|IF_NOLONG},
- {I_JMP, 2, {IMMEDIATE|BITS16|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+13718, IF_8086|IF_NOLONG},
- {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+13718, IF_8086|IF_NOLONG},
- {I_JMP, 2, {IMMEDIATE|BITS32|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+13724, IF_386|IF_NOLONG},
- {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+13724, IF_386|IF_NOLONG},
- {I_JMP, 1, {MEMORY|FAR,0,0,0,0}, nasm_bytecodes+17562, IF_8086|IF_NOLONG},
- {I_JMP, 1, {MEMORY|FAR,0,0,0,0}, nasm_bytecodes+17567, IF_X64},
- {I_JMP, 1, {MEMORY|BITS16|FAR,0,0,0,0}, nasm_bytecodes+17572, IF_8086},
- {I_JMP, 1, {MEMORY|BITS32|FAR,0,0,0,0}, nasm_bytecodes+17577, IF_386},
- {I_JMP, 1, {MEMORY|BITS64|FAR,0,0,0,0}, nasm_bytecodes+17567, IF_X64},
- {I_JMP, 1, {MEMORY|NEAR,0,0,0,0}, nasm_bytecodes+17582, IF_8086},
- {I_JMP, 1, {MEMORY|BITS16|NEAR,0,0,0,0}, nasm_bytecodes+17587, IF_8086},
- {I_JMP, 1, {MEMORY|BITS32|NEAR,0,0,0,0}, nasm_bytecodes+17592, IF_386|IF_NOLONG},
- {I_JMP, 1, {MEMORY|BITS64|NEAR,0,0,0,0}, nasm_bytecodes+17597, IF_X64},
- {I_JMP, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17587, IF_8086},
- {I_JMP, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+17592, IF_386|IF_NOLONG},
- {I_JMP, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+17597, IF_X64},
- {I_JMP, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17582, IF_8086},
- {I_JMP, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+17587, IF_8086},
- {I_JMP, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+17592, IF_386|IF_NOLONG},
- {I_JMP, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+17597, IF_X64},
+ {I_JMP, 1, {IMMEDIATE|SHORT,0,0,0,0}, nasm_bytecodes+20100, IF_8086},
+ {I_JMP, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+20099, IF_8086},
+ {I_JMP, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+20104, IF_8086},
+ {I_JMP, 1, {IMMEDIATE|NEAR,0,0,0,0}, nasm_bytecodes+20104, IF_8086},
+ {I_JMP, 1, {IMMEDIATE|FAR,0,0,0,0}, nasm_bytecodes+16231, IF_8086|IF_NOLONG},
+ {I_JMP, 1, {IMMEDIATE|BITS16,0,0,0,0}, nasm_bytecodes+20109, IF_8086},
+ {I_JMP, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, nasm_bytecodes+20109, IF_8086},
+ {I_JMP, 1, {IMMEDIATE|BITS16|FAR,0,0,0,0}, nasm_bytecodes+16237, IF_8086|IF_NOLONG},
+ {I_JMP, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+20114, IF_386},
+ {I_JMP, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, nasm_bytecodes+20114, IF_386},
+ {I_JMP, 1, {IMMEDIATE|BITS32|FAR,0,0,0,0}, nasm_bytecodes+16243, IF_386|IF_NOLONG},
+ {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+16249, IF_8086|IF_NOLONG},
+ {I_JMP, 2, {IMMEDIATE|BITS16|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+16255, IF_8086|IF_NOLONG},
+ {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+16255, IF_8086|IF_NOLONG},
+ {I_JMP, 2, {IMMEDIATE|BITS32|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+16261, IF_386|IF_NOLONG},
+ {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+16261, IF_386|IF_NOLONG},
+ {I_JMP, 1, {MEMORY|FAR,0,0,0,0}, nasm_bytecodes+20119, IF_8086|IF_NOLONG},
+ {I_JMP, 1, {MEMORY|FAR,0,0,0,0}, nasm_bytecodes+20124, IF_X64},
+ {I_JMP, 1, {MEMORY|BITS16|FAR,0,0,0,0}, nasm_bytecodes+20129, IF_8086},
+ {I_JMP, 1, {MEMORY|BITS32|FAR,0,0,0,0}, nasm_bytecodes+20134, IF_386},
+ {I_JMP, 1, {MEMORY|BITS64|FAR,0,0,0,0}, nasm_bytecodes+20124, IF_X64},
+ {I_JMP, 1, {MEMORY|NEAR,0,0,0,0}, nasm_bytecodes+20139, IF_8086},
+ {I_JMP, 1, {MEMORY|BITS16|NEAR,0,0,0,0}, nasm_bytecodes+20144, IF_8086},
+ {I_JMP, 1, {MEMORY|BITS32|NEAR,0,0,0,0}, nasm_bytecodes+20149, IF_386|IF_NOLONG},
+ {I_JMP, 1, {MEMORY|BITS64|NEAR,0,0,0,0}, nasm_bytecodes+20154, IF_X64},
+ {I_JMP, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+20144, IF_8086},
+ {I_JMP, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+20149, IF_386|IF_NOLONG},
+ {I_JMP, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+20154, IF_X64},
+ {I_JMP, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20139, IF_8086},
+ {I_JMP, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+20144, IF_8086},
+ {I_JMP, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+20149, IF_386|IF_NOLONG},
+ {I_JMP, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20154, IF_X64},
+ {I_JMP, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+20154, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_JMPE[] = {
- {I_JMPE, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+13730, IF_IA64},
- {I_JMPE, 1, {IMMEDIATE|BITS16,0,0,0,0}, nasm_bytecodes+13736, IF_IA64},
- {I_JMPE, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+13742, IF_IA64},
- {I_JMPE, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+13748, IF_IA64},
- {I_JMPE, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+13754, IF_IA64},
+ {I_JMPE, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+16267, IF_IA64},
+ {I_JMPE, 1, {IMMEDIATE|BITS16,0,0,0,0}, nasm_bytecodes+16273, IF_IA64},
+ {I_JMPE, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+16279, IF_IA64},
+ {I_JMPE, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16285, IF_IA64},
+ {I_JMPE, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16291, IF_IA64},
ITEMPLATE_END
};
static const struct itemplate instrux_JRCXZ[] = {
- {I_JRCXZ, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+17537, IF_X64},
+ {I_JRCXZ, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+20094, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_LAHF[] = {
- {I_LAHF, 0, {0,0,0,0,0}, nasm_bytecodes+19719, IF_8086},
+ {I_LAHF, 0, {0,0,0,0,0}, nasm_bytecodes+22156, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_LAR[] = {
- {I_LAR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+13760, IF_286|IF_PROT|IF_SW},
- {I_LAR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13760, IF_286|IF_PROT},
- {I_LAR, 2, {REG_GPR|BITS16,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13760, IF_386|IF_PROT},
- {I_LAR, 2, {REG_GPR|BITS16,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7011, IF_X64|IF_PROT},
- {I_LAR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+13766, IF_386|IF_PROT|IF_SW},
- {I_LAR, 2, {REG_GPR|BITS32,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13766, IF_386|IF_PROT},
- {I_LAR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13766, IF_386|IF_PROT},
- {I_LAR, 2, {REG_GPR|BITS32,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7018, IF_X64|IF_PROT},
- {I_LAR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+13772, IF_X64|IF_PROT|IF_SW},
- {I_LAR, 2, {REG_GPR|BITS64,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13772, IF_X64|IF_PROT},
- {I_LAR, 2, {REG_GPR|BITS64,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13772, IF_X64|IF_PROT},
- {I_LAR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13772, IF_X64|IF_PROT},
+ {I_LAR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16297, IF_286|IF_PROT|IF_SW},
+ {I_LAR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16297, IF_286|IF_PROT},
+ {I_LAR, 2, {REG_GPR|BITS16,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16297, IF_386|IF_PROT},
+ {I_LAR, 2, {REG_GPR|BITS16,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7567, IF_X64|IF_PROT},
+ {I_LAR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+16303, IF_386|IF_PROT|IF_SW},
+ {I_LAR, 2, {REG_GPR|BITS32,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16303, IF_386|IF_PROT},
+ {I_LAR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16303, IF_386|IF_PROT},
+ {I_LAR, 2, {REG_GPR|BITS32,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7574, IF_X64|IF_PROT},
+ {I_LAR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+16309, IF_X64|IF_PROT|IF_SW},
+ {I_LAR, 2, {REG_GPR|BITS64,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16309, IF_X64|IF_PROT},
+ {I_LAR, 2, {REG_GPR|BITS64,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16309, IF_X64|IF_PROT},
+ {I_LAR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16309, IF_X64|IF_PROT},
ITEMPLATE_END
};
static const struct itemplate instrux_LDDQU[] = {
- {I_LDDQU, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+15500, IF_PRESCOTT|IF_SSE3|IF_SO},
+ {I_LDDQU, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+18091, IF_PRESCOTT|IF_SSE3|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_LDMXCSR[] = {
- {I_LDMXCSR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+12536, IF_KATMAI|IF_SSE|IF_SD},
+ {I_LDMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+13309, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_LDS[] = {
- {I_LDS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+17602, IF_8086|IF_NOLONG},
- {I_LDS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+17607, IF_386|IF_NOLONG},
+ {I_LDS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+20159, IF_8086|IF_NOLONG},
+ {I_LDS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+20164, IF_386|IF_NOLONG},
ITEMPLATE_END
};
static const struct itemplate instrux_LEA[] = {
- {I_LEA, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+17612, IF_8086},
- {I_LEA, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+17617, IF_386},
- {I_LEA, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+17622, IF_X64},
+ {I_LEA, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+20169, IF_8086},
+ {I_LEA, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+20174, IF_386},
+ {I_LEA, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+20179, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_LEAVE[] = {
- {I_LEAVE, 0, {0,0,0,0,0}, nasm_bytecodes+17859, IF_186},
+ {I_LEAVE, 0, {0,0,0,0,0}, nasm_bytecodes+20436, IF_186},
ITEMPLATE_END
};
static const struct itemplate instrux_LES[] = {
- {I_LES, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+17627, IF_8086|IF_NOLONG},
- {I_LES, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+17632, IF_386|IF_NOLONG},
+ {I_LES, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+20184, IF_8086|IF_NOLONG},
+ {I_LES, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+20189, IF_386|IF_NOLONG},
ITEMPLATE_END
};
static const struct itemplate instrux_LFENCE[] = {
- {I_LFENCE, 0, {0,0,0,0,0}, nasm_bytecodes+17637, IF_X64|IF_AMD},
- {I_LFENCE, 0, {0,0,0,0,0}, nasm_bytecodes+17637, IF_WILLAMETTE|IF_SSE2},
+ {I_LFENCE, 0, {0,0,0,0,0}, nasm_bytecodes+20194, IF_X64|IF_AMD},
+ {I_LFENCE, 0, {0,0,0,0,0}, nasm_bytecodes+20194, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_LFS[] = {
- {I_LFS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+13778, IF_386},
- {I_LFS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+13784, IF_386},
- {I_LFS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+13790, IF_X64},
+ {I_LFS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16315, IF_386},
+ {I_LFS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+16321, IF_386},
+ {I_LFS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+16327, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_LGDT[] = {
- {I_LGDT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17642, IF_286|IF_PRIV},
+ {I_LGDT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20199, IF_286|IF_PRIV},
ITEMPLATE_END
};
static const struct itemplate instrux_LGS[] = {
- {I_LGS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+13796, IF_386},
- {I_LGS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+13802, IF_386},
- {I_LGS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+13808, IF_X64},
+ {I_LGS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16333, IF_386},
+ {I_LGS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+16339, IF_386},
+ {I_LGS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+16345, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_LIDT[] = {
- {I_LIDT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17647, IF_286|IF_PRIV},
+ {I_LIDT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20204, IF_286|IF_PRIV},
ITEMPLATE_END
};
static const struct itemplate instrux_LLDT[] = {
- {I_LLDT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17652, IF_286|IF_PROT|IF_PRIV},
- {I_LLDT, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+17652, IF_286|IF_PROT|IF_PRIV},
- {I_LLDT, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17652, IF_286|IF_PROT|IF_PRIV},
+ {I_LLDT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20209, IF_286|IF_PROT|IF_PRIV},
+ {I_LLDT, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+20209, IF_286|IF_PROT|IF_PRIV},
+ {I_LLDT, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+20209, IF_286|IF_PROT|IF_PRIV},
ITEMPLATE_END
};
static const struct itemplate instrux_LLWPCB[] = {
- {I_LLWPCB, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+12562, IF_AMD|IF_386},
- {I_LLWPCB, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+12569, IF_AMD|IF_X64},
+ {I_LLWPCB, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+13342, IF_AMD|IF_386},
+ {I_LLWPCB, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+13349, IF_AMD|IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_LMSW[] = {
- {I_LMSW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17657, IF_286|IF_PRIV},
- {I_LMSW, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+17657, IF_286|IF_PRIV},
- {I_LMSW, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17657, IF_286|IF_PRIV},
+ {I_LMSW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20214, IF_286|IF_PRIV},
+ {I_LMSW, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+20214, IF_286|IF_PRIV},
+ {I_LMSW, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+20214, IF_286|IF_PRIV},
ITEMPLATE_END
};
static const struct itemplate instrux_LOADALL[] = {
- {I_LOADALL, 0, {0,0,0,0,0}, nasm_bytecodes+19288, IF_386|IF_UNDOC},
+ {I_LOADALL, 0, {0,0,0,0,0}, nasm_bytecodes+21765, IF_386|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_LOADALL286[] = {
- {I_LOADALL286, 0, {0,0,0,0,0}, nasm_bytecodes+19292, IF_286|IF_UNDOC},
+ {I_LOADALL286, 0, {0,0,0,0,0}, nasm_bytecodes+21769, IF_286|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_LODSB[] = {
- {I_LODSB, 0, {0,0,0,0,0}, nasm_bytecodes+19722, IF_8086},
+ {I_LODSB, 0, {0,0,0,0,0}, nasm_bytecodes+22159, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_LODSD[] = {
- {I_LODSD, 0, {0,0,0,0,0}, nasm_bytecodes+19296, IF_386},
+ {I_LODSD, 0, {0,0,0,0,0}, nasm_bytecodes+21773, IF_386},
ITEMPLATE_END
};
static const struct itemplate instrux_LODSQ[] = {
- {I_LODSQ, 0, {0,0,0,0,0}, nasm_bytecodes+19300, IF_X64},
+ {I_LODSQ, 0, {0,0,0,0,0}, nasm_bytecodes+21777, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_LODSW[] = {
- {I_LODSW, 0, {0,0,0,0,0}, nasm_bytecodes+19304, IF_8086},
+ {I_LODSW, 0, {0,0,0,0,0}, nasm_bytecodes+21781, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_LOOP[] = {
- {I_LOOP, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+17662, IF_8086},
- {I_LOOP, 2, {IMMEDIATE,REG_CX,0,0,0}, nasm_bytecodes+17667, IF_8086|IF_NOLONG},
- {I_LOOP, 2, {IMMEDIATE,REG_ECX,0,0,0}, nasm_bytecodes+17672, IF_386},
- {I_LOOP, 2, {IMMEDIATE,REG_RCX,0,0,0}, nasm_bytecodes+17677, IF_X64},
+ {I_LOOP, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+20219, IF_8086},
+ {I_LOOP, 2, {IMMEDIATE,REG_CX,0,0,0}, nasm_bytecodes+20224, IF_8086|IF_NOLONG},
+ {I_LOOP, 2, {IMMEDIATE,REG_ECX,0,0,0}, nasm_bytecodes+20229, IF_386},
+ {I_LOOP, 2, {IMMEDIATE,REG_RCX,0,0,0}, nasm_bytecodes+20234, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_LOOPE[] = {
- {I_LOOPE, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+17682, IF_8086},
- {I_LOOPE, 2, {IMMEDIATE,REG_CX,0,0,0}, nasm_bytecodes+17687, IF_8086|IF_NOLONG},
- {I_LOOPE, 2, {IMMEDIATE,REG_ECX,0,0,0}, nasm_bytecodes+17692, IF_386},
- {I_LOOPE, 2, {IMMEDIATE,REG_RCX,0,0,0}, nasm_bytecodes+17697, IF_X64},
+ {I_LOOPE, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+20239, IF_8086},
+ {I_LOOPE, 2, {IMMEDIATE,REG_CX,0,0,0}, nasm_bytecodes+20244, IF_8086|IF_NOLONG},
+ {I_LOOPE, 2, {IMMEDIATE,REG_ECX,0,0,0}, nasm_bytecodes+20249, IF_386},
+ {I_LOOPE, 2, {IMMEDIATE,REG_RCX,0,0,0}, nasm_bytecodes+20254, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_LOOPNE[] = {
- {I_LOOPNE, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+17702, IF_8086},
- {I_LOOPNE, 2, {IMMEDIATE,REG_CX,0,0,0}, nasm_bytecodes+17707, IF_8086|IF_NOLONG},
- {I_LOOPNE, 2, {IMMEDIATE,REG_ECX,0,0,0}, nasm_bytecodes+17712, IF_386},
- {I_LOOPNE, 2, {IMMEDIATE,REG_RCX,0,0,0}, nasm_bytecodes+17717, IF_X64},
+ {I_LOOPNE, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+20259, IF_8086},
+ {I_LOOPNE, 2, {IMMEDIATE,REG_CX,0,0,0}, nasm_bytecodes+20264, IF_8086|IF_NOLONG},
+ {I_LOOPNE, 2, {IMMEDIATE,REG_ECX,0,0,0}, nasm_bytecodes+20269, IF_386},
+ {I_LOOPNE, 2, {IMMEDIATE,REG_RCX,0,0,0}, nasm_bytecodes+20274, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_LOOPNZ[] = {
- {I_LOOPNZ, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+17702, IF_8086},
- {I_LOOPNZ, 2, {IMMEDIATE,REG_CX,0,0,0}, nasm_bytecodes+17707, IF_8086|IF_NOLONG},
- {I_LOOPNZ, 2, {IMMEDIATE,REG_ECX,0,0,0}, nasm_bytecodes+17712, IF_386},
- {I_LOOPNZ, 2, {IMMEDIATE,REG_RCX,0,0,0}, nasm_bytecodes+17717, IF_X64},
+ {I_LOOPNZ, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+20259, IF_8086},
+ {I_LOOPNZ, 2, {IMMEDIATE,REG_CX,0,0,0}, nasm_bytecodes+20264, IF_8086|IF_NOLONG},
+ {I_LOOPNZ, 2, {IMMEDIATE,REG_ECX,0,0,0}, nasm_bytecodes+20269, IF_386},
+ {I_LOOPNZ, 2, {IMMEDIATE,REG_RCX,0,0,0}, nasm_bytecodes+20274, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_LOOPZ[] = {
- {I_LOOPZ, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+17682, IF_8086},
- {I_LOOPZ, 2, {IMMEDIATE,REG_CX,0,0,0}, nasm_bytecodes+17687, IF_8086|IF_NOLONG},
- {I_LOOPZ, 2, {IMMEDIATE,REG_ECX,0,0,0}, nasm_bytecodes+17692, IF_386},
- {I_LOOPZ, 2, {IMMEDIATE,REG_RCX,0,0,0}, nasm_bytecodes+17697, IF_X64},
+ {I_LOOPZ, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+20239, IF_8086},
+ {I_LOOPZ, 2, {IMMEDIATE,REG_CX,0,0,0}, nasm_bytecodes+20244, IF_8086|IF_NOLONG},
+ {I_LOOPZ, 2, {IMMEDIATE,REG_ECX,0,0,0}, nasm_bytecodes+20249, IF_386},
+ {I_LOOPZ, 2, {IMMEDIATE,REG_RCX,0,0,0}, nasm_bytecodes+20254, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_LSL[] = {
- {I_LSL, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+13814, IF_286|IF_PROT|IF_SW},
- {I_LSL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13814, IF_286|IF_PROT},
- {I_LSL, 2, {REG_GPR|BITS16,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13814, IF_386|IF_PROT},
- {I_LSL, 2, {REG_GPR|BITS16,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7025, IF_X64|IF_PROT},
- {I_LSL, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+13820, IF_386|IF_PROT|IF_SW},
- {I_LSL, 2, {REG_GPR|BITS32,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13820, IF_386|IF_PROT},
- {I_LSL, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13820, IF_386|IF_PROT},
- {I_LSL, 2, {REG_GPR|BITS32,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7032, IF_X64|IF_PROT},
- {I_LSL, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+13826, IF_X64|IF_PROT|IF_SW},
- {I_LSL, 2, {REG_GPR|BITS64,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13826, IF_X64|IF_PROT},
- {I_LSL, 2, {REG_GPR|BITS64,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13826, IF_X64|IF_PROT},
- {I_LSL, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13826, IF_X64|IF_PROT},
+ {I_LSL, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16351, IF_286|IF_PROT|IF_SW},
+ {I_LSL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16351, IF_286|IF_PROT},
+ {I_LSL, 2, {REG_GPR|BITS16,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16351, IF_386|IF_PROT},
+ {I_LSL, 2, {REG_GPR|BITS16,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7581, IF_X64|IF_PROT},
+ {I_LSL, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+16357, IF_386|IF_PROT|IF_SW},
+ {I_LSL, 2, {REG_GPR|BITS32,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16357, IF_386|IF_PROT},
+ {I_LSL, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16357, IF_386|IF_PROT},
+ {I_LSL, 2, {REG_GPR|BITS32,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7588, IF_X64|IF_PROT},
+ {I_LSL, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+16363, IF_X64|IF_PROT|IF_SW},
+ {I_LSL, 2, {REG_GPR|BITS64,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16363, IF_X64|IF_PROT},
+ {I_LSL, 2, {REG_GPR|BITS64,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16363, IF_X64|IF_PROT},
+ {I_LSL, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16363, IF_X64|IF_PROT},
ITEMPLATE_END
};
static const struct itemplate instrux_LSS[] = {
- {I_LSS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+13832, IF_386},
- {I_LSS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+13838, IF_386},
- {I_LSS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+13844, IF_X64},
+ {I_LSS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16369, IF_386},
+ {I_LSS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+16375, IF_386},
+ {I_LSS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+16381, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_LTR[] = {
- {I_LTR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17722, IF_286|IF_PROT|IF_PRIV},
- {I_LTR, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+17722, IF_286|IF_PROT|IF_PRIV},
- {I_LTR, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17722, IF_286|IF_PROT|IF_PRIV},
+ {I_LTR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20279, IF_286|IF_PROT|IF_PRIV},
+ {I_LTR, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+20279, IF_286|IF_PROT|IF_PRIV},
+ {I_LTR, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+20279, IF_286|IF_PROT|IF_PRIV},
ITEMPLATE_END
};
static const struct itemplate instrux_LWPINS[] = {
- {I_LWPINS, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+6712, IF_AMD|IF_386},
- {I_LWPINS, 3, {REG_GPR|BITS64,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+6720, IF_AMD|IF_X64},
+ {I_LWPINS, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+5330, IF_AMD|IF_386},
+ {I_LWPINS, 3, {REG_GPR|BITS64,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+5338, IF_AMD|IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_LWPVAL[] = {
- {I_LWPVAL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+6696, IF_AMD|IF_386},
- {I_LWPVAL, 3, {REG_GPR|BITS64,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+6704, IF_AMD|IF_X64},
+ {I_LWPVAL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+5314, IF_AMD|IF_386},
+ {I_LWPVAL, 3, {REG_GPR|BITS64,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+5322, IF_AMD|IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_LZCNT[] = {
- {I_LZCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+8096, IF_P6|IF_AMD},
- {I_LZCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+8103, IF_P6|IF_AMD},
- {I_LZCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+8110, IF_X64|IF_AMD},
+ {I_LZCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+8848, IF_P6|IF_AMD},
+ {I_LZCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+8855, IF_P6|IF_AMD},
+ {I_LZCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+8862, IF_X64|IF_AMD},
ITEMPLATE_END
};
static const struct itemplate instrux_MASKMOVDQU[] = {
- {I_MASKMOVDQU, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14768, IF_WILLAMETTE|IF_SSE2},
+ {I_MASKMOVDQU, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17359, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_MASKMOVQ[] = {
- {I_MASKMOVQ, 2, {MMXREG,MMXREG,0,0,0}, nasm_bytecodes+14750, IF_KATMAI|IF_MMX},
+ {I_MASKMOVQ, 2, {MMXREG,MMXREG,0,0,0}, nasm_bytecodes+17341, IF_KATMAI|IF_MMX},
ITEMPLATE_END
};
static const struct itemplate instrux_MAXPD[] = {
- {I_MAXPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15308, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_MAXPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17899, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_MAXPS[] = {
- {I_MAXPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14528, IF_KATMAI|IF_SSE},
+ {I_MAXPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17119, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_MAXSD[] = {
- {I_MAXSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15314, IF_WILLAMETTE|IF_SSE2},
+ {I_MAXSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17905, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_MAXSS[] = {
- {I_MAXSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14534, IF_KATMAI|IF_SSE},
+ {I_MAXSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+17125, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_MFENCE[] = {
- {I_MFENCE, 0, {0,0,0,0,0}, nasm_bytecodes+17727, IF_X64|IF_AMD},
- {I_MFENCE, 0, {0,0,0,0,0}, nasm_bytecodes+17727, IF_WILLAMETTE|IF_SSE2},
+ {I_MFENCE, 0, {0,0,0,0,0}, nasm_bytecodes+20284, IF_X64|IF_AMD},
+ {I_MFENCE, 0, {0,0,0,0,0}, nasm_bytecodes+20284, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_MINPD[] = {
- {I_MINPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15320, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_MINPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17911, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_MINPS[] = {
- {I_MINPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14540, IF_KATMAI|IF_SSE},
+ {I_MINPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17131, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_MINSD[] = {
- {I_MINSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15326, IF_WILLAMETTE|IF_SSE2},
+ {I_MINSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17917, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_MINSS[] = {
- {I_MINSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14546, IF_KATMAI|IF_SSE},
+ {I_MINSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+17137, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_MONITOR[] = {
- {I_MONITOR, 0, {0,0,0,0,0}, nasm_bytecodes+17732, IF_PRESCOTT},
- {I_MONITOR, 3, {REG_EAX,REG_ECX,REG_EDX,0,0}, nasm_bytecodes+17732, IF_PRESCOTT},
- {I_MONITOR, 3, {REG_RAX,REG_ECX,REG_EDX,0,0}, nasm_bytecodes+17732, IF_X64},
+ {I_MONITOR, 0, {0,0,0,0,0}, nasm_bytecodes+20289, IF_PRESCOTT},
+ {I_MONITOR, 3, {REG_EAX,REG_ECX,REG_EDX,0,0}, nasm_bytecodes+20289, IF_PRESCOTT},
+ {I_MONITOR, 3, {REG_RAX,REG_ECX,REG_EDX,0,0}, nasm_bytecodes+20289, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_MONTMUL[] = {
- {I_MONTMUL, 0, {0,0,0,0,0}, nasm_bytecodes+15620, IF_PENT|IF_CYRIX},
+ {I_MONTMUL, 0, {0,0,0,0,0}, nasm_bytecodes+18229, IF_PENT|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_MOV[] = {
- {I_MOV, 2, {MEMORY,REG_SREG,0,0,0}, nasm_bytecodes+17743, IF_8086|IF_SM},
- {I_MOV, 2, {REG_GPR|BITS16,REG_SREG,0,0,0}, nasm_bytecodes+17737, IF_8086},
- {I_MOV, 2, {REG_GPR|BITS32,REG_SREG,0,0,0}, nasm_bytecodes+17742, IF_386},
- {I_MOV, 2, {REG_SREG,MEMORY,0,0,0}, nasm_bytecodes+19308, IF_8086|IF_SM},
- {I_MOV, 2, {REG_SREG,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+19308, IF_8086},
- {I_MOV, 2, {REG_SREG,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+19308, IF_386},
- {I_MOV, 2, {REG_AL,MEM_OFFS,0,0,0}, nasm_bytecodes+19312, IF_8086|IF_SM},
- {I_MOV, 2, {REG_AX,MEM_OFFS,0,0,0}, nasm_bytecodes+17747, IF_8086|IF_SM},
- {I_MOV, 2, {REG_EAX,MEM_OFFS,0,0,0}, nasm_bytecodes+17752, IF_386|IF_SM},
- {I_MOV, 2, {REG_RAX,MEM_OFFS,0,0,0}, nasm_bytecodes+17757, IF_X64|IF_SM},
- {I_MOV, 2, {MEM_OFFS,REG_AL,0,0,0}, nasm_bytecodes+19316, IF_8086|IF_SM},
- {I_MOV, 2, {MEM_OFFS,REG_AX,0,0,0}, nasm_bytecodes+17762, IF_8086|IF_SM},
- {I_MOV, 2, {MEM_OFFS,REG_EAX,0,0,0}, nasm_bytecodes+17767, IF_386|IF_SM},
- {I_MOV, 2, {MEM_OFFS,REG_RAX,0,0,0}, nasm_bytecodes+17772, IF_X64|IF_SM},
- {I_MOV, 2, {REG_GPR|BITS32,REG_CREG,0,0,0}, nasm_bytecodes+13850, IF_386|IF_PRIV|IF_NOLONG},
- {I_MOV, 2, {REG_GPR|BITS64,REG_CREG,0,0,0}, nasm_bytecodes+13856, IF_X64|IF_PRIV},
- {I_MOV, 2, {REG_CREG,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13862, IF_386|IF_PRIV|IF_NOLONG},
- {I_MOV, 2, {REG_CREG,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13868, IF_X64|IF_PRIV},
- {I_MOV, 2, {REG_GPR|BITS32,REG_DREG,0,0,0}, nasm_bytecodes+13875, IF_386|IF_PRIV|IF_NOLONG},
- {I_MOV, 2, {REG_GPR|BITS64,REG_DREG,0,0,0}, nasm_bytecodes+13874, IF_X64|IF_PRIV},
- {I_MOV, 2, {REG_DREG,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13881, IF_386|IF_PRIV|IF_NOLONG},
- {I_MOV, 2, {REG_DREG,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13880, IF_X64|IF_PRIV},
- {I_MOV, 2, {REG_GPR|BITS32,REG_TREG,0,0,0}, nasm_bytecodes+17777, IF_386|IF_NOLONG},
- {I_MOV, 2, {REG_TREG,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17782, IF_386|IF_NOLONG},
- {I_MOV, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19320, IF_8086|IF_SM},
- {I_MOV, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19320, IF_8086},
- {I_MOV, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+17787, IF_8086|IF_SM},
- {I_MOV, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+17787, IF_8086},
- {I_MOV, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17792, IF_386|IF_SM},
- {I_MOV, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17792, IF_386},
- {I_MOV, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17797, IF_X64|IF_SM},
- {I_MOV, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17797, IF_X64},
- {I_MOV, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+19324, IF_8086|IF_SM},
- {I_MOV, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19324, IF_8086},
- {I_MOV, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+17802, IF_8086|IF_SM},
- {I_MOV, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+17802, IF_8086},
- {I_MOV, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+17807, IF_386|IF_SM},
- {I_MOV, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17807, IF_386},
- {I_MOV, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+17812, IF_X64|IF_SM},
- {I_MOV, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17812, IF_X64},
- {I_MOV, 2, {REG_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+19328, IF_8086|IF_SM},
- {I_MOV, 2, {REG_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+17817, IF_8086|IF_SM},
- {I_MOV, 2, {REG_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+17822, IF_386|IF_SM},
- {I_MOV, 2, {REG_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+17827, IF_X64|IF_SM},
- {I_MOV, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+17832, IF_8086|IF_SM},
- {I_MOV, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+13886, IF_8086|IF_SM},
- {I_MOV, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+13892, IF_386|IF_SM},
- {I_MOV, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+13898, IF_X64|IF_SM},
- {I_MOV, 2, {RM_GPR|BITS64,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+13898, IF_X64},
- {I_MOV, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+17832, IF_8086|IF_SM},
- {I_MOV, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+13886, IF_8086|IF_SM},
- {I_MOV, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+13892, IF_386|IF_SM},
+ {I_MOV, 2, {MEMORY,REG_SREG,0,0,0}, nasm_bytecodes+20310, IF_8086|IF_SW},
+ {I_MOV, 2, {REG_GPR|BITS16,REG_SREG,0,0,0}, nasm_bytecodes+20294, IF_8086},
+ {I_MOV, 2, {REG_GPR|BITS32,REG_SREG,0,0,0}, nasm_bytecodes+20299, IF_386},
+ {I_MOV, 2, {REG_GPR|BITS64,REG_SREG,0,0,0}, nasm_bytecodes+20304, IF_X64|IF_OPT},
+ {I_MOV, 2, {RM_GPR|BITS64,REG_SREG,0,0,0}, nasm_bytecodes+20309, IF_X64},
+ {I_MOV, 2, {REG_SREG,MEMORY,0,0,0}, nasm_bytecodes+20330, IF_8086|IF_SW},
+ {I_MOV, 2, {REG_SREG,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+20330, IF_8086|IF_OPT},
+ {I_MOV, 2, {REG_SREG,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+20330, IF_386|IF_OPT},
+ {I_MOV, 2, {REG_SREG,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+20314, IF_X64|IF_OPT},
+ {I_MOV, 2, {REG_SREG,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+20319, IF_8086},
+ {I_MOV, 2, {REG_SREG,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+20324, IF_386},
+ {I_MOV, 2, {REG_SREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+20329, IF_X64},
+ {I_MOV, 2, {REG_AL,MEM_OFFS,0,0,0}, nasm_bytecodes+21785, IF_8086|IF_SM},
+ {I_MOV, 2, {REG_AX,MEM_OFFS,0,0,0}, nasm_bytecodes+20334, IF_8086|IF_SM},
+ {I_MOV, 2, {REG_EAX,MEM_OFFS,0,0,0}, nasm_bytecodes+20339, IF_386|IF_SM},
+ {I_MOV, 2, {REG_RAX,MEM_OFFS,0,0,0}, nasm_bytecodes+20344, IF_X64|IF_SM},
+ {I_MOV, 2, {MEM_OFFS,REG_AL,0,0,0}, nasm_bytecodes+21789, IF_8086|IF_SM|IF_NOHLE},
+ {I_MOV, 2, {MEM_OFFS,REG_AX,0,0,0}, nasm_bytecodes+20349, IF_8086|IF_SM|IF_NOHLE},
+ {I_MOV, 2, {MEM_OFFS,REG_EAX,0,0,0}, nasm_bytecodes+20354, IF_386|IF_SM|IF_NOHLE},
+ {I_MOV, 2, {MEM_OFFS,REG_RAX,0,0,0}, nasm_bytecodes+20359, IF_X64|IF_SM|IF_NOHLE},
+ {I_MOV, 2, {REG_GPR|BITS32,REG_CREG,0,0,0}, nasm_bytecodes+16387, IF_386|IF_PRIV|IF_NOLONG},
+ {I_MOV, 2, {REG_GPR|BITS64,REG_CREG,0,0,0}, nasm_bytecodes+16393, IF_X64|IF_PRIV},
+ {I_MOV, 2, {REG_CREG,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16399, IF_386|IF_PRIV|IF_NOLONG},
+ {I_MOV, 2, {REG_CREG,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16405, IF_X64|IF_PRIV},
+ {I_MOV, 2, {REG_GPR|BITS32,REG_DREG,0,0,0}, nasm_bytecodes+16412, IF_386|IF_PRIV|IF_NOLONG},
+ {I_MOV, 2, {REG_GPR|BITS64,REG_DREG,0,0,0}, nasm_bytecodes+16411, IF_X64|IF_PRIV},
+ {I_MOV, 2, {REG_DREG,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16418, IF_386|IF_PRIV|IF_NOLONG},
+ {I_MOV, 2, {REG_DREG,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16417, IF_X64|IF_PRIV},
+ {I_MOV, 2, {REG_GPR|BITS32,REG_TREG,0,0,0}, nasm_bytecodes+20364, IF_386|IF_NOLONG},
+ {I_MOV, 2, {REG_TREG,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+20369, IF_386|IF_NOLONG},
+ {I_MOV, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+20374, IF_8086|IF_SM},
+ {I_MOV, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+20375, IF_8086},
+ {I_MOV, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16423, IF_8086|IF_SM},
+ {I_MOV, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16424, IF_8086},
+ {I_MOV, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16429, IF_386|IF_SM},
+ {I_MOV, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16430, IF_386},
+ {I_MOV, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16435, IF_X64|IF_SM},
+ {I_MOV, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16436, IF_X64},
+ {I_MOV, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+21793, IF_8086|IF_SM},
+ {I_MOV, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+21793, IF_8086},
+ {I_MOV, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+20379, IF_8086|IF_SM},
+ {I_MOV, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+20379, IF_8086},
+ {I_MOV, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+20384, IF_386|IF_SM},
+ {I_MOV, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+20384, IF_386},
+ {I_MOV, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+20389, IF_X64|IF_SM},
+ {I_MOV, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+20389, IF_X64},
+ {I_MOV, 2, {REG_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+21797, IF_8086|IF_SM},
+ {I_MOV, 2, {REG_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+20394, IF_8086|IF_SM},
+ {I_MOV, 2, {REG_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+20399, IF_386|IF_SM},
+ {I_MOV, 2, {REG_GPR|BITS64,UDWORD64,0,0,0}, nasm_bytecodes+20404, IF_X64|IF_SM|IF_OPT},
+ {I_MOV, 2, {REG_GPR|BITS64,SDWORD64,0,0,0}, nasm_bytecodes+7610, IF_X64|IF_SM|IF_OPT},
+ {I_MOV, 2, {REG_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+20409, IF_X64|IF_SM},
+ {I_MOV, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+16441, IF_8086|IF_SM},
+ {I_MOV, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+7595, IF_8086|IF_SM},
+ {I_MOV, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+7602, IF_386|IF_SM},
+ {I_MOV, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+7609, IF_X64|IF_SM},
+ {I_MOV, 2, {RM_GPR|BITS64,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+7609, IF_X64},
+ {I_MOV, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16441, IF_8086|IF_SM},
+ {I_MOV, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+7595, IF_8086|IF_SM},
+ {I_MOV, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+7602, IF_386|IF_SM},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVAPD[] = {
- {I_MOVAPD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+15332, IF_WILLAMETTE|IF_SSE2},
- {I_MOVAPD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+15338, IF_WILLAMETTE|IF_SSE2},
- {I_MOVAPD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+15338, IF_WILLAMETTE|IF_SSE2|IF_SO},
- {I_MOVAPD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+15332, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_MOVAPD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17923, IF_WILLAMETTE|IF_SSE2},
+ {I_MOVAPD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17929, IF_WILLAMETTE|IF_SSE2},
+ {I_MOVAPD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+17929, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_MOVAPD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+17923, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVAPS[] = {
- {I_MOVAPS, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+14552, IF_KATMAI|IF_SSE},
- {I_MOVAPS, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+14558, IF_KATMAI|IF_SSE},
- {I_MOVAPS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14552, IF_KATMAI|IF_SSE},
- {I_MOVAPS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14558, IF_KATMAI|IF_SSE},
+ {I_MOVAPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17143, IF_KATMAI|IF_SSE},
+ {I_MOVAPS, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+17149, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVBE[] = {
- {I_MOVBE, 2, {REG_GPR|BITS16,MEMORY|BITS16,0,0,0}, nasm_bytecodes+8355, IF_NEHALEM|IF_SM},
- {I_MOVBE, 2, {REG_GPR|BITS32,MEMORY|BITS32,0,0,0}, nasm_bytecodes+8362, IF_NEHALEM|IF_SM},
- {I_MOVBE, 2, {REG_GPR|BITS64,MEMORY|BITS64,0,0,0}, nasm_bytecodes+8369, IF_NEHALEM|IF_SM},
- {I_MOVBE, 2, {MEMORY|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+8376, IF_NEHALEM|IF_SM},
- {I_MOVBE, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+8383, IF_NEHALEM|IF_SM},
- {I_MOVBE, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+8390, IF_NEHALEM|IF_SM},
+ {I_MOVBE, 2, {REG_GPR|BITS16,MEMORY|BITS16,0,0,0}, nasm_bytecodes+9107, IF_NEHALEM|IF_SM},
+ {I_MOVBE, 2, {REG_GPR|BITS32,MEMORY|BITS32,0,0,0}, nasm_bytecodes+9114, IF_NEHALEM|IF_SM},
+ {I_MOVBE, 2, {REG_GPR|BITS64,MEMORY|BITS64,0,0,0}, nasm_bytecodes+9121, IF_NEHALEM|IF_SM},
+ {I_MOVBE, 2, {MEMORY|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+9128, IF_NEHALEM|IF_SM},
+ {I_MOVBE, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+9135, IF_NEHALEM|IF_SM},
+ {I_MOVBE, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+9142, IF_NEHALEM|IF_SM},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVD[] = {
- {I_MOVD, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+13904, IF_PENT|IF_MMX|IF_SD},
- {I_MOVD, 2, {MMXREG,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13904, IF_PENT|IF_MMX},
- {I_MOVD, 2, {MEMORY,MMXREG,0,0,0}, nasm_bytecodes+13910, IF_PENT|IF_MMX|IF_SD},
- {I_MOVD, 2, {REG_GPR|BITS32,MMXREG,0,0,0}, nasm_bytecodes+13910, IF_PENT|IF_MMX},
- {I_MOVD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+7039, IF_X64|IF_SD},
- {I_MOVD, 2, {XMMREG,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7039, IF_X64},
- {I_MOVD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+7046, IF_X64|IF_SD},
- {I_MOVD, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+7046, IF_X64|IF_SSE},
- {I_MOVD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+7676, IF_WILLAMETTE|IF_SSE2|IF_SD},
- {I_MOVD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+7683, IF_WILLAMETTE|IF_SSE2|IF_SD},
- {I_MOVD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+7683, IF_WILLAMETTE|IF_SSE2},
- {I_MOVD, 2, {RM_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+7676, IF_WILLAMETTE|IF_SSE2},
+ {I_MOVD, 2, {MMXREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+16447, IF_PENT|IF_MMX|IF_SD},
+ {I_MOVD, 2, {RM_GPR|BITS32,MMXREG,0,0,0}, nasm_bytecodes+16453, IF_PENT|IF_MMX|IF_SD},
+ {I_MOVD, 2, {MMXREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+7616, IF_X64|IF_MMX|IF_SX},
+ {I_MOVD, 2, {RM_GPR|BITS64,MMXREG,0,0,0}, nasm_bytecodes+7623, IF_X64|IF_MMX|IF_SX},
+ {I_MOVD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+8428, IF_WILLAMETTE|IF_SSE2|IF_SD},
+ {I_MOVD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+8435, IF_WILLAMETTE|IF_SSE2|IF_SD},
+ {I_MOVD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+8435, IF_WILLAMETTE|IF_SSE2},
+ {I_MOVD, 2, {RM_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+8428, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVDDUP[] = {
- {I_MOVDDUP, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15506, IF_PRESCOTT|IF_SSE3},
+ {I_MOVDDUP, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18097, IF_PRESCOTT|IF_SSE3},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVDQ2Q[] = {
- {I_MOVDQ2Q, 2, {MMXREG,XMMREG,0,0,0}, nasm_bytecodes+14810, IF_WILLAMETTE|IF_SSE2},
+ {I_MOVDQ2Q, 2, {MMXREG,XMMREG,0,0,0}, nasm_bytecodes+17401, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVDQA[] = {
- {I_MOVDQA, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14786, IF_WILLAMETTE|IF_SSE2},
- {I_MOVDQA, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+14792, IF_WILLAMETTE|IF_SSE2|IF_SO},
- {I_MOVDQA, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+14786, IF_WILLAMETTE|IF_SSE2|IF_SO},
- {I_MOVDQA, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14792, IF_WILLAMETTE|IF_SSE2},
+ {I_MOVDQA, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17377, IF_WILLAMETTE|IF_SSE2},
+ {I_MOVDQA, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+17383, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_MOVDQA, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+17377, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_MOVDQA, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17383, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVDQU[] = {
- {I_MOVDQU, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14798, IF_WILLAMETTE|IF_SSE2},
- {I_MOVDQU, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+14804, IF_WILLAMETTE|IF_SSE2|IF_SO},
- {I_MOVDQU, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+14798, IF_WILLAMETTE|IF_SSE2|IF_SO},
- {I_MOVDQU, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14804, IF_WILLAMETTE|IF_SSE2},
+ {I_MOVDQU, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17389, IF_WILLAMETTE|IF_SSE2},
+ {I_MOVDQU, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+17395, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_MOVDQU, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+17389, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_MOVDQU, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17395, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVHLPS[] = {
- {I_MOVHLPS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14384, IF_KATMAI|IF_SSE},
+ {I_MOVHLPS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+16957, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVHPD[] = {
- {I_MOVHPD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+15344, IF_WILLAMETTE|IF_SSE2},
- {I_MOVHPD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+15350, IF_WILLAMETTE|IF_SSE2},
+ {I_MOVHPD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+17935, IF_WILLAMETTE|IF_SSE2},
+ {I_MOVHPD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+17941, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVHPS[] = {
- {I_MOVHPS, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+14564, IF_KATMAI|IF_SSE},
- {I_MOVHPS, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+14570, IF_KATMAI|IF_SSE},
+ {I_MOVHPS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+17155, IF_KATMAI|IF_SSE},
+ {I_MOVHPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+17161, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVLHPS[] = {
- {I_MOVLHPS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14564, IF_KATMAI|IF_SSE},
+ {I_MOVLHPS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17155, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVLPD[] = {
- {I_MOVLPD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+15356, IF_WILLAMETTE|IF_SSE2},
- {I_MOVLPD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+15362, IF_WILLAMETTE|IF_SSE2},
+ {I_MOVLPD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+17947, IF_WILLAMETTE|IF_SSE2},
+ {I_MOVLPD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+17953, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVLPS[] = {
- {I_MOVLPS, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+14384, IF_KATMAI|IF_SSE},
- {I_MOVLPS, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+14576, IF_KATMAI|IF_SSE},
+ {I_MOVLPS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+16957, IF_KATMAI|IF_SSE},
+ {I_MOVLPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+17167, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVMSKPD[] = {
- {I_MOVMSKPD, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+15368, IF_WILLAMETTE|IF_SSE2},
- {I_MOVMSKPD, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+7858, IF_X64|IF_SSE2},
+ {I_MOVMSKPD, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+17959, IF_WILLAMETTE|IF_SSE2},
+ {I_MOVMSKPD, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+8610, IF_X64|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVMSKPS[] = {
- {I_MOVMSKPS, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+14582, IF_KATMAI|IF_SSE},
- {I_MOVMSKPS, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+7585, IF_X64|IF_SSE},
+ {I_MOVMSKPS, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+17173, IF_KATMAI|IF_SSE},
+ {I_MOVMSKPS, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+8337, IF_X64|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVNTDQ[] = {
- {I_MOVNTDQ, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+14774, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_MOVNTDQ, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+17365, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVNTDQA[] = {
- {I_MOVNTDQA, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+8131, IF_SSE41},
+ {I_MOVNTDQA, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+8883, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVNTI[] = {
- {I_MOVNTI, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7670, IF_WILLAMETTE|IF_SD},
- {I_MOVNTI, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7669, IF_X64|IF_SQ},
+ {I_MOVNTI, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+8422, IF_WILLAMETTE|IF_SD},
+ {I_MOVNTI, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+8421, IF_X64|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVNTPD[] = {
- {I_MOVNTPD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+14780, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_MOVNTPD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+17371, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVNTPS[] = {
- {I_MOVNTPS, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+14588, IF_KATMAI|IF_SSE},
+ {I_MOVNTPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, nasm_bytecodes+17179, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVNTQ[] = {
- {I_MOVNTQ, 2, {MEMORY,MMXREG,0,0,0}, nasm_bytecodes+14756, IF_KATMAI|IF_MMX|IF_SQ},
+ {I_MOVNTQ, 2, {MEMORY,MMXREG,0,0,0}, nasm_bytecodes+17347, IF_KATMAI|IF_MMX|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVNTSD[] = {
- {I_MOVNTSD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+15548, IF_SSE4A|IF_AMD|IF_SQ},
+ {I_MOVNTSD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+18139, IF_SSE4A|IF_AMD|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVNTSS[] = {
- {I_MOVNTSS, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+15554, IF_SSE4A|IF_AMD|IF_SD},
+ {I_MOVNTSS, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+18145, IF_SSE4A|IF_AMD|IF_SD},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVQ[] = {
- {I_MOVQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7053, IF_PENT|IF_MMX|IF_SQ},
- {I_MOVQ, 2, {RM_MMX,MMXREG,0,0,0}, nasm_bytecodes+7060, IF_PENT|IF_MMX|IF_SQ},
- {I_MOVQ, 2, {MMXREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+13904, IF_X64|IF_MMX},
- {I_MOVQ, 2, {RM_GPR|BITS64,MMXREG,0,0,0}, nasm_bytecodes+13910, IF_X64|IF_MMX},
- {I_MOVQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14816, IF_WILLAMETTE|IF_SSE2},
- {I_MOVQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14822, IF_WILLAMETTE|IF_SSE2},
- {I_MOVQ, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+14822, IF_WILLAMETTE|IF_SSE2|IF_SQ},
- {I_MOVQ, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+14816, IF_WILLAMETTE|IF_SSE2|IF_SQ},
- {I_MOVQ, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+7690, IF_X64|IF_SSE2},
- {I_MOVQ, 2, {RM_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+7697, IF_X64|IF_SSE2},
+ {I_MOVQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+16459, IF_PENT|IF_MMX|IF_SQ},
+ {I_MOVQ, 2, {RM_MMX,MMXREG,0,0,0}, nasm_bytecodes+16465, IF_PENT|IF_MMX|IF_SQ},
+ {I_MOVQ, 2, {MMXREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+7616, IF_X64|IF_MMX},
+ {I_MOVQ, 2, {RM_GPR|BITS64,MMXREG,0,0,0}, nasm_bytecodes+7623, IF_X64|IF_MMX},
+ {I_MOVQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17407, IF_WILLAMETTE|IF_SSE2},
+ {I_MOVQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17413, IF_WILLAMETTE|IF_SSE2},
+ {I_MOVQ, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+17413, IF_WILLAMETTE|IF_SSE2|IF_SQ},
+ {I_MOVQ, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+17407, IF_WILLAMETTE|IF_SSE2|IF_SQ},
+ {I_MOVQ, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+8442, IF_X64|IF_SSE2},
+ {I_MOVQ, 2, {RM_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+8449, IF_X64|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVQ2DQ[] = {
- {I_MOVQ2DQ, 2, {XMMREG,MMXREG,0,0,0}, nasm_bytecodes+14828, IF_WILLAMETTE|IF_SSE2},
+ {I_MOVQ2DQ, 2, {XMMREG,MMXREG,0,0,0}, nasm_bytecodes+17419, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVSB[] = {
- {I_MOVSB, 0, {0,0,0,0,0}, nasm_bytecodes+5245, IF_8086},
+ {I_MOVSB, 0, {0,0,0,0,0}, nasm_bytecodes+3751, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVSD[] = {
- {I_MOVSD, 0, {0,0,0,0,0}, nasm_bytecodes+19332, IF_386},
- {I_MOVSD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+15374, IF_WILLAMETTE|IF_SSE2},
- {I_MOVSD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+15380, IF_WILLAMETTE|IF_SSE2},
- {I_MOVSD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+15380, IF_WILLAMETTE|IF_SSE2},
- {I_MOVSD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+15374, IF_WILLAMETTE|IF_SSE2},
+ {I_MOVSD, 0, {0,0,0,0,0}, nasm_bytecodes+21801, IF_386},
+ {I_MOVSD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17965, IF_WILLAMETTE|IF_SSE2},
+ {I_MOVSD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17971, IF_WILLAMETTE|IF_SSE2},
+ {I_MOVSD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+17971, IF_WILLAMETTE|IF_SSE2},
+ {I_MOVSD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+17965, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVSHDUP[] = {
- {I_MOVSHDUP, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15512, IF_PRESCOTT|IF_SSE3},
+ {I_MOVSHDUP, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18103, IF_PRESCOTT|IF_SSE3},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVSLDUP[] = {
- {I_MOVSLDUP, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15518, IF_PRESCOTT|IF_SSE3},
+ {I_MOVSLDUP, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18109, IF_PRESCOTT|IF_SSE3},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVSQ[] = {
- {I_MOVSQ, 0, {0,0,0,0,0}, nasm_bytecodes+19336, IF_X64},
+ {I_MOVSQ, 0, {0,0,0,0,0}, nasm_bytecodes+21805, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVSS[] = {
- {I_MOVSS, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+14594, IF_KATMAI|IF_SSE},
- {I_MOVSS, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+14600, IF_KATMAI|IF_SSE},
- {I_MOVSS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14594, IF_KATMAI|IF_SSE},
- {I_MOVSS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14600, IF_KATMAI|IF_SSE},
+ {I_MOVSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+17185, IF_KATMAI|IF_SSE},
+ {I_MOVSS, 2, {MEMORY|BITS32,XMMREG,0,0,0}, nasm_bytecodes+17191, IF_KATMAI|IF_SSE},
+ {I_MOVSS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17185, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVSW[] = {
- {I_MOVSW, 0, {0,0,0,0,0}, nasm_bytecodes+19340, IF_8086},
+ {I_MOVSW, 0, {0,0,0,0,0}, nasm_bytecodes+21809, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVSX[] = {
- {I_MOVSX, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+13916, IF_386|IF_SB},
- {I_MOVSX, 2, {REG_GPR|BITS16,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+13916, IF_386},
- {I_MOVSX, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, nasm_bytecodes+13922, IF_386},
- {I_MOVSX, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+13928, IF_386},
- {I_MOVSX, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, nasm_bytecodes+13934, IF_X64},
- {I_MOVSX, 2, {REG_GPR|BITS64,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+13940, IF_X64},
- {I_MOVSX, 2, {REG_GPR|BITS64,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+17837, IF_X64},
+ {I_MOVSX, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16471, IF_386|IF_SB},
+ {I_MOVSX, 2, {REG_GPR|BITS16,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+16471, IF_386},
+ {I_MOVSX, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, nasm_bytecodes+16477, IF_386},
+ {I_MOVSX, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+16483, IF_386},
+ {I_MOVSX, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, nasm_bytecodes+16489, IF_X64},
+ {I_MOVSX, 2, {REG_GPR|BITS64,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+16495, IF_X64},
+ {I_MOVSX, 2, {REG_GPR|BITS64,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+20414, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVSXD[] = {
- {I_MOVSXD, 2, {REG_GPR|BITS64,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+17837, IF_X64},
+ {I_MOVSXD, 2, {REG_GPR|BITS64,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+20414, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVUPD[] = {
- {I_MOVUPD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+15386, IF_WILLAMETTE|IF_SSE2},
- {I_MOVUPD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+15392, IF_WILLAMETTE|IF_SSE2},
- {I_MOVUPD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+15392, IF_WILLAMETTE|IF_SSE2|IF_SO},
- {I_MOVUPD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+15386, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_MOVUPD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17977, IF_WILLAMETTE|IF_SSE2},
+ {I_MOVUPD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17983, IF_WILLAMETTE|IF_SSE2},
+ {I_MOVUPD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+17983, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_MOVUPD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+17977, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVUPS[] = {
- {I_MOVUPS, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+14606, IF_KATMAI|IF_SSE},
- {I_MOVUPS, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+14612, IF_KATMAI|IF_SSE},
- {I_MOVUPS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14606, IF_KATMAI|IF_SSE},
- {I_MOVUPS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14612, IF_KATMAI|IF_SSE},
+ {I_MOVUPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17197, IF_KATMAI|IF_SSE},
+ {I_MOVUPS, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+17203, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_MOVZX[] = {
- {I_MOVZX, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+13946, IF_386|IF_SB},
- {I_MOVZX, 2, {REG_GPR|BITS16,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+13946, IF_386},
- {I_MOVZX, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, nasm_bytecodes+13952, IF_386},
- {I_MOVZX, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+13958, IF_386},
- {I_MOVZX, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, nasm_bytecodes+13964, IF_X64},
- {I_MOVZX, 2, {REG_GPR|BITS64,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+13970, IF_X64},
+ {I_MOVZX, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16501, IF_386|IF_SB},
+ {I_MOVZX, 2, {REG_GPR|BITS16,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+16501, IF_386},
+ {I_MOVZX, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, nasm_bytecodes+16507, IF_386},
+ {I_MOVZX, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+16513, IF_386},
+ {I_MOVZX, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, nasm_bytecodes+16519, IF_X64},
+ {I_MOVZX, 2, {REG_GPR|BITS64,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+16525, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_MPSADBW[] = {
- {I_MPSADBW, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5728, IF_SSE41},
+ {I_MPSADBW, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4234, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_MUL[] = {
- {I_MUL, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+19344, IF_8086},
- {I_MUL, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17842, IF_8086},
- {I_MUL, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+17847, IF_386},
- {I_MUL, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+17852, IF_X64},
+ {I_MUL, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+21813, IF_8086},
+ {I_MUL, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+20419, IF_8086},
+ {I_MUL, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+20424, IF_386},
+ {I_MUL, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+20429, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_MULPD[] = {
- {I_MULPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15398, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_MULPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17989, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_MULPS[] = {
- {I_MULPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14618, IF_KATMAI|IF_SSE},
+ {I_MULPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17209, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_MULSD[] = {
- {I_MULSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15404, IF_WILLAMETTE|IF_SSE2},
+ {I_MULSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17995, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_MULSS[] = {
- {I_MULSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14624, IF_KATMAI|IF_SSE},
+ {I_MULSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+17215, IF_KATMAI|IF_SSE},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_MULX[] = {
+ {I_MULX, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, nasm_bytecodes+15715, IF_FUTURE|IF_BMI2},
+ {I_MULX, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, nasm_bytecodes+15722, IF_LONG|IF_FUTURE|IF_BMI2},
ITEMPLATE_END
};
static const struct itemplate instrux_MWAIT[] = {
- {I_MWAIT, 0, {0,0,0,0,0}, nasm_bytecodes+17857, IF_PRESCOTT},
- {I_MWAIT, 2, {REG_EAX,REG_ECX,0,0,0}, nasm_bytecodes+17857, IF_PRESCOTT},
+ {I_MWAIT, 0, {0,0,0,0,0}, nasm_bytecodes+20434, IF_PRESCOTT},
+ {I_MWAIT, 2, {REG_EAX,REG_ECX,0,0,0}, nasm_bytecodes+20434, IF_PRESCOTT},
ITEMPLATE_END
};
static const struct itemplate instrux_NEG[] = {
- {I_NEG, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+19348, IF_8086},
- {I_NEG, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17862, IF_8086},
- {I_NEG, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+17867, IF_386},
- {I_NEG, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+17872, IF_X64},
+ {I_NEG, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+20439, IF_8086|IF_LOCK},
+ {I_NEG, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16531, IF_8086|IF_LOCK},
+ {I_NEG, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16537, IF_386|IF_LOCK},
+ {I_NEG, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16543, IF_X64|IF_LOCK},
ITEMPLATE_END
};
static const struct itemplate instrux_NOP[] = {
- {I_NOP, 0, {0,0,0,0,0}, nasm_bytecodes+19352, IF_8086},
- {I_NOP, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+13976, IF_P6},
- {I_NOP, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+13982, IF_P6},
- {I_NOP, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+13988, IF_X64},
+ {I_NOP, 0, {0,0,0,0,0}, nasm_bytecodes+21817, IF_8086},
+ {I_NOP, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16549, IF_P6},
+ {I_NOP, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16555, IF_P6},
+ {I_NOP, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16561, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_NOT[] = {
- {I_NOT, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+19356, IF_8086},
- {I_NOT, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17877, IF_8086},
- {I_NOT, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+17882, IF_386},
- {I_NOT, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+17887, IF_X64},
+ {I_NOT, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+20444, IF_8086|IF_LOCK},
+ {I_NOT, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16567, IF_8086|IF_LOCK},
+ {I_NOT, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16573, IF_386|IF_LOCK},
+ {I_NOT, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16579, IF_X64|IF_LOCK},
ITEMPLATE_END
};
static const struct itemplate instrux_OR[] = {
- {I_OR, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19360, IF_8086|IF_SM},
- {I_OR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19360, IF_8086},
- {I_OR, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+17892, IF_8086|IF_SM},
- {I_OR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+17892, IF_8086},
- {I_OR, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17897, IF_386|IF_SM},
- {I_OR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17897, IF_386},
- {I_OR, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17902, IF_X64|IF_SM},
- {I_OR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17902, IF_X64},
- {I_OR, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+11067, IF_8086|IF_SM},
- {I_OR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+11067, IF_8086},
- {I_OR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+17907, IF_8086|IF_SM},
- {I_OR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+17907, IF_8086},
- {I_OR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+17912, IF_386|IF_SM},
- {I_OR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17912, IF_386},
- {I_OR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+17917, IF_X64|IF_SM},
- {I_OR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17917, IF_X64},
- {I_OR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13994, IF_8086},
- {I_OR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+14000, IF_386},
- {I_OR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+14006, IF_X64},
- {I_OR, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+19364, IF_8086|IF_SM},
- {I_OR, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+13994, IF_8086|IF_SM},
- {I_OR, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+17922, IF_8086|IF_SM},
- {I_OR, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+14000, IF_386|IF_SM},
- {I_OR, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+17927, IF_386|IF_SM},
- {I_OR, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+14006, IF_X64|IF_SM},
- {I_OR, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+17932, IF_X64|IF_SM},
- {I_OR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+17937, IF_8086|IF_SM},
- {I_OR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+14012, IF_8086|IF_SM},
- {I_OR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+14018, IF_386|IF_SM},
- {I_OR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+14024, IF_X64|IF_SM},
- {I_OR, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+17937, IF_8086|IF_SM},
- {I_OR, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+14012, IF_8086|IF_SM},
- {I_OR, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+14018, IF_386|IF_SM},
+ {I_OR, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+20449, IF_8086|IF_SM|IF_LOCK},
+ {I_OR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+20450, IF_8086},
+ {I_OR, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16585, IF_8086|IF_SM|IF_LOCK},
+ {I_OR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16586, IF_8086},
+ {I_OR, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16591, IF_386|IF_SM|IF_LOCK},
+ {I_OR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16592, IF_386},
+ {I_OR, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16597, IF_X64|IF_SM|IF_LOCK},
+ {I_OR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16598, IF_X64},
+ {I_OR, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+14906, IF_8086|IF_SM},
+ {I_OR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+14906, IF_8086},
+ {I_OR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+20454, IF_8086|IF_SM},
+ {I_OR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+20454, IF_8086},
+ {I_OR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+20459, IF_386|IF_SM},
+ {I_OR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+20459, IF_386},
+ {I_OR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+20464, IF_X64|IF_SM},
+ {I_OR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+20464, IF_X64},
+ {I_OR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7630, IF_8086|IF_LOCK},
+ {I_OR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7637, IF_386|IF_LOCK},
+ {I_OR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7644, IF_X64|IF_LOCK},
+ {I_OR, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+21821, IF_8086|IF_SM},
+ {I_OR, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+7631, IF_8086|IF_SM},
+ {I_OR, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+20469, IF_8086|IF_SM},
+ {I_OR, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+7638, IF_386|IF_SM},
+ {I_OR, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+20474, IF_386|IF_SM},
+ {I_OR, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+7645, IF_X64|IF_SM},
+ {I_OR, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+20479, IF_X64|IF_SM},
+ {I_OR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+16603, IF_8086|IF_SM|IF_LOCK},
+ {I_OR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+7651, IF_8086|IF_SM|IF_LOCK},
+ {I_OR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+7658, IF_386|IF_SM|IF_LOCK},
+ {I_OR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+7665, IF_X64|IF_SM|IF_LOCK},
+ {I_OR, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16603, IF_8086|IF_SM|IF_LOCK},
+ {I_OR, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+7651, IF_8086|IF_SM|IF_LOCK},
+ {I_OR, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+7658, IF_386|IF_SM|IF_LOCK},
+ {I_OR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+16609, IF_8086|IF_SM|IF_LOCK|IF_NOLONG},
ITEMPLATE_END
};
static const struct itemplate instrux_ORPD[] = {
- {I_ORPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15410, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_ORPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18001, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_ORPS[] = {
- {I_ORPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14630, IF_KATMAI|IF_SSE},
+ {I_ORPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17221, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_OUT[] = {
- {I_OUT, 2, {IMMEDIATE,REG_AL,0,0,0}, nasm_bytecodes+19368, IF_8086|IF_SB},
- {I_OUT, 2, {IMMEDIATE,REG_AX,0,0,0}, nasm_bytecodes+17942, IF_8086|IF_SB},
- {I_OUT, 2, {IMMEDIATE,REG_EAX,0,0,0}, nasm_bytecodes+17947, IF_386|IF_SB},
- {I_OUT, 2, {REG_DX,REG_AL,0,0,0}, nasm_bytecodes+19725, IF_8086},
- {I_OUT, 2, {REG_DX,REG_AX,0,0,0}, nasm_bytecodes+19372, IF_8086},
- {I_OUT, 2, {REG_DX,REG_EAX,0,0,0}, nasm_bytecodes+19376, IF_386},
+ {I_OUT, 2, {IMMEDIATE,REG_AL,0,0,0}, nasm_bytecodes+21825, IF_8086|IF_SB},
+ {I_OUT, 2, {IMMEDIATE,REG_AX,0,0,0}, nasm_bytecodes+20484, IF_8086|IF_SB},
+ {I_OUT, 2, {IMMEDIATE,REG_EAX,0,0,0}, nasm_bytecodes+20489, IF_386|IF_SB},
+ {I_OUT, 2, {REG_DX,REG_AL,0,0,0}, nasm_bytecodes+22162, IF_8086},
+ {I_OUT, 2, {REG_DX,REG_AX,0,0,0}, nasm_bytecodes+21829, IF_8086},
+ {I_OUT, 2, {REG_DX,REG_EAX,0,0,0}, nasm_bytecodes+21833, IF_386},
ITEMPLATE_END
};
static const struct itemplate instrux_OUTSB[] = {
- {I_OUTSB, 0, {0,0,0,0,0}, nasm_bytecodes+19728, IF_186},
+ {I_OUTSB, 0, {0,0,0,0,0}, nasm_bytecodes+22165, IF_186},
ITEMPLATE_END
};
static const struct itemplate instrux_OUTSD[] = {
- {I_OUTSD, 0, {0,0,0,0,0}, nasm_bytecodes+19380, IF_386},
+ {I_OUTSD, 0, {0,0,0,0,0}, nasm_bytecodes+21837, IF_386},
ITEMPLATE_END
};
static const struct itemplate instrux_OUTSW[] = {
- {I_OUTSW, 0, {0,0,0,0,0}, nasm_bytecodes+19384, IF_186},
+ {I_OUTSW, 0, {0,0,0,0,0}, nasm_bytecodes+21841, IF_186},
ITEMPLATE_END
};
static const struct itemplate instrux_PABSB[] = {
- {I_PABSB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7886, IF_SSSE3|IF_MMX|IF_SQ},
- {I_PABSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+7893, IF_SSSE3},
+ {I_PABSB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8638, IF_SSSE3|IF_MMX|IF_SQ},
+ {I_PABSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8645, IF_SSSE3},
ITEMPLATE_END
};
static const struct itemplate instrux_PABSD[] = {
- {I_PABSD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7914, IF_SSSE3|IF_MMX|IF_SQ},
- {I_PABSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+7921, IF_SSSE3},
+ {I_PABSD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8666, IF_SSSE3|IF_MMX|IF_SQ},
+ {I_PABSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8673, IF_SSSE3},
ITEMPLATE_END
};
static const struct itemplate instrux_PABSW[] = {
- {I_PABSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7900, IF_SSSE3|IF_MMX|IF_SQ},
- {I_PABSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+7907, IF_SSSE3},
+ {I_PABSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8652, IF_SSSE3|IF_MMX|IF_SQ},
+ {I_PABSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8659, IF_SSSE3},
ITEMPLATE_END
};
static const struct itemplate instrux_PACKSSDW[] = {
- {I_PACKSSDW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7067, IF_PENT|IF_MMX|IF_SQ},
- {I_PACKSSDW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14840, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PACKSSDW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7672, IF_PENT|IF_MMX|IF_SQ},
+ {I_PACKSSDW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17431, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PACKSSWB[] = {
- {I_PACKSSWB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7074, IF_PENT|IF_MMX|IF_SQ},
- {I_PACKSSWB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14834, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PACKSSWB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7679, IF_PENT|IF_MMX|IF_SQ},
+ {I_PACKSSWB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17425, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PACKUSDW[] = {
- {I_PACKUSDW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8138, IF_SSE41},
+ {I_PACKUSDW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8890, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_PACKUSWB[] = {
- {I_PACKUSWB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7081, IF_PENT|IF_MMX|IF_SQ},
- {I_PACKUSWB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14846, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PACKUSWB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7686, IF_PENT|IF_MMX|IF_SQ},
+ {I_PACKUSWB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17437, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PADDB[] = {
- {I_PADDB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7088, IF_PENT|IF_MMX|IF_SQ},
- {I_PADDB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14852, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PADDB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7693, IF_PENT|IF_MMX|IF_SQ},
+ {I_PADDB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17443, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PADDD[] = {
- {I_PADDD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7095, IF_PENT|IF_MMX|IF_SQ},
- {I_PADDD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14864, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PADDD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7700, IF_PENT|IF_MMX|IF_SQ},
+ {I_PADDD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17455, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PADDQ[] = {
- {I_PADDQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+14870, IF_WILLAMETTE|IF_MMX|IF_SQ},
- {I_PADDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14876, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PADDQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+17461, IF_WILLAMETTE|IF_MMX|IF_SQ},
+ {I_PADDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17467, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PADDSB[] = {
- {I_PADDSB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7102, IF_PENT|IF_MMX|IF_SQ},
- {I_PADDSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14882, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PADDSB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7707, IF_PENT|IF_MMX|IF_SQ},
+ {I_PADDSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17473, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PADDSIW[] = {
- {I_PADDSIW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+14030, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
+ {I_PADDSIW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+16615, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_PADDSW[] = {
- {I_PADDSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7109, IF_PENT|IF_MMX|IF_SQ},
- {I_PADDSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14888, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PADDSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7714, IF_PENT|IF_MMX|IF_SQ},
+ {I_PADDSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17479, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PADDUSB[] = {
- {I_PADDUSB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7116, IF_PENT|IF_MMX|IF_SQ},
- {I_PADDUSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14894, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PADDUSB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7721, IF_PENT|IF_MMX|IF_SQ},
+ {I_PADDUSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17485, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PADDUSW[] = {
- {I_PADDUSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7123, IF_PENT|IF_MMX|IF_SQ},
- {I_PADDUSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14900, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PADDUSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7728, IF_PENT|IF_MMX|IF_SQ},
+ {I_PADDUSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17491, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PADDW[] = {
- {I_PADDW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7130, IF_PENT|IF_MMX|IF_SQ},
- {I_PADDW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14858, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PADDW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7735, IF_PENT|IF_MMX|IF_SQ},
+ {I_PADDW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17449, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PALIGNR[] = {
- {I_PALIGNR, 3, {MMXREG,RM_MMX,IMMEDIATE,0,0}, nasm_bytecodes+5656, IF_SSSE3|IF_MMX|IF_SQ},
- {I_PALIGNR, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5664, IF_SSSE3},
+ {I_PALIGNR, 3, {MMXREG,RM_MMX,IMMEDIATE,0,0}, nasm_bytecodes+4162, IF_SSSE3|IF_MMX|IF_SQ},
+ {I_PALIGNR, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4170, IF_SSSE3},
ITEMPLATE_END
};
static const struct itemplate instrux_PAND[] = {
- {I_PAND, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7137, IF_PENT|IF_MMX|IF_SQ},
- {I_PAND, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14906, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PAND, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7742, IF_PENT|IF_MMX|IF_SQ},
+ {I_PAND, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17497, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PANDN[] = {
- {I_PANDN, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7144, IF_PENT|IF_MMX|IF_SQ},
- {I_PANDN, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14912, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PANDN, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7749, IF_PENT|IF_MMX|IF_SQ},
+ {I_PANDN, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17503, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PAUSE[] = {
- {I_PAUSE, 0, {0,0,0,0,0}, nasm_bytecodes+17952, IF_8086},
+ {I_PAUSE, 0, {0,0,0,0,0}, nasm_bytecodes+20494, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_PAVEB[] = {
- {I_PAVEB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+14036, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
+ {I_PAVEB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+16621, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_PAVGB[] = {
- {I_PAVGB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7599, IF_KATMAI|IF_MMX|IF_SQ},
- {I_PAVGB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14918, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PAVGB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8351, IF_KATMAI|IF_MMX|IF_SQ},
+ {I_PAVGB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17509, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PAVGUSB[] = {
- {I_PAVGUSB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5184, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PAVGUSB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3690, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PAVGW[] = {
- {I_PAVGW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7606, IF_KATMAI|IF_MMX|IF_SQ},
- {I_PAVGW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14924, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PAVGW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8358, IF_KATMAI|IF_MMX|IF_SQ},
+ {I_PAVGW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17515, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PBLENDVB[] = {
- {I_PBLENDVB, 3, {XMMREG,RM_XMM,XMM0,0,0}, nasm_bytecodes+8145, IF_SSE41},
+ {I_PBLENDVB, 3, {XMMREG,RM_XMM,XMM0,0,0}, nasm_bytecodes+8897, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_PBLENDW[] = {
- {I_PBLENDW, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5736, IF_SSE41},
+ {I_PBLENDW, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4242, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_PCLMULHQHQDQ[] = {
- {I_PCLMULHQHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3627, IF_SSE|IF_WESTMERE},
+ {I_PCLMULHQHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3537, IF_SSE|IF_WESTMERE},
ITEMPLATE_END
};
static const struct itemplate instrux_PCLMULHQLQDQ[] = {
- {I_PCLMULHQLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3609, IF_SSE|IF_WESTMERE},
+ {I_PCLMULHQLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3519, IF_SSE|IF_WESTMERE},
ITEMPLATE_END
};
static const struct itemplate instrux_PCLMULLQHQDQ[] = {
- {I_PCLMULLQHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3618, IF_SSE|IF_WESTMERE},
+ {I_PCLMULLQHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3528, IF_SSE|IF_WESTMERE},
ITEMPLATE_END
};
static const struct itemplate instrux_PCLMULLQLQDQ[] = {
- {I_PCLMULLQLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3600, IF_SSE|IF_WESTMERE},
+ {I_PCLMULLQLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3510, IF_SSE|IF_WESTMERE},
ITEMPLATE_END
};
static const struct itemplate instrux_PCLMULQDQ[] = {
- {I_PCLMULQDQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6656, IF_SSE|IF_WESTMERE},
+ {I_PCLMULQDQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5242, IF_SSE|IF_WESTMERE},
ITEMPLATE_END
};
static const struct itemplate instrux_PCMPEQB[] = {
- {I_PCMPEQB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7151, IF_PENT|IF_MMX|IF_SQ},
- {I_PCMPEQB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14930, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PCMPEQB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7756, IF_PENT|IF_MMX|IF_SQ},
+ {I_PCMPEQB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17521, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PCMPEQD[] = {
- {I_PCMPEQD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7158, IF_PENT|IF_MMX|IF_SQ},
- {I_PCMPEQD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14942, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PCMPEQD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7763, IF_PENT|IF_MMX|IF_SQ},
+ {I_PCMPEQD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17533, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PCMPEQQ[] = {
- {I_PCMPEQQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8152, IF_SSE41},
+ {I_PCMPEQQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8904, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_PCMPEQW[] = {
- {I_PCMPEQW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7165, IF_PENT|IF_MMX|IF_SQ},
- {I_PCMPEQW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14936, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PCMPEQW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7770, IF_PENT|IF_MMX|IF_SQ},
+ {I_PCMPEQW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17527, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PCMPESTRI[] = {
- {I_PCMPESTRI, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5808, IF_SSE42},
+ {I_PCMPESTRI, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4314, IF_SSE42},
ITEMPLATE_END
};
static const struct itemplate instrux_PCMPESTRM[] = {
- {I_PCMPESTRM, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5816, IF_SSE42},
+ {I_PCMPESTRM, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4322, IF_SSE42},
ITEMPLATE_END
};
static const struct itemplate instrux_PCMPGTB[] = {
- {I_PCMPGTB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7172, IF_PENT|IF_MMX|IF_SQ},
- {I_PCMPGTB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14948, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PCMPGTB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7777, IF_PENT|IF_MMX|IF_SQ},
+ {I_PCMPGTB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17539, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PCMPGTD[] = {
- {I_PCMPGTD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7179, IF_PENT|IF_MMX|IF_SQ},
- {I_PCMPGTD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14960, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PCMPGTD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7784, IF_PENT|IF_MMX|IF_SQ},
+ {I_PCMPGTD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17551, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PCMPGTQ[] = {
- {I_PCMPGTQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8327, IF_SSE42},
+ {I_PCMPGTQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9079, IF_SSE42},
ITEMPLATE_END
};
static const struct itemplate instrux_PCMPGTW[] = {
- {I_PCMPGTW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7186, IF_PENT|IF_MMX|IF_SQ},
- {I_PCMPGTW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14954, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PCMPGTW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7791, IF_PENT|IF_MMX|IF_SQ},
+ {I_PCMPGTW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17545, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PCMPISTRI[] = {
- {I_PCMPISTRI, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5824, IF_SSE42},
+ {I_PCMPISTRI, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4330, IF_SSE42},
ITEMPLATE_END
};
static const struct itemplate instrux_PCMPISTRM[] = {
- {I_PCMPISTRM, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5832, IF_SSE42},
+ {I_PCMPISTRM, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4338, IF_SSE42},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PDEP[] = {
+ {I_PDEP, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, nasm_bytecodes+15729, IF_FUTURE|IF_BMI2},
+ {I_PDEP, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, nasm_bytecodes+15736, IF_LONG|IF_FUTURE|IF_BMI2},
ITEMPLATE_END
};
static const struct itemplate instrux_PDISTIB[] = {
- {I_PDISTIB, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+15207, IF_PENT|IF_MMX|IF_SM|IF_CYRIX},
+ {I_PDISTIB, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+17798, IF_PENT|IF_MMX|IF_SM|IF_CYRIX},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_PEXT[] = {
+ {I_PEXT, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, nasm_bytecodes+15743, IF_FUTURE|IF_BMI2},
+ {I_PEXT, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, nasm_bytecodes+15750, IF_LONG|IF_FUTURE|IF_BMI2},
ITEMPLATE_END
};
@@ -3361,8 +3444,8 @@ static const struct itemplate instrux_PEXTRQ[] = {
};
static const struct itemplate instrux_PEXTRW[] = {
- {I_PEXTRW, 3, {REG_GPR|BITS32,MMXREG,IMMEDIATE,0,0}, nasm_bytecodes+7613, IF_KATMAI|IF_MMX|IF_SB|IF_AR2},
- {I_PEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+7704, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
+ {I_PEXTRW, 3, {REG_GPR|BITS32,MMXREG,IMMEDIATE,0,0}, nasm_bytecodes+8365, IF_KATMAI|IF_MMX|IF_SB|IF_AR2},
+ {I_PEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+8456, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
{I_PEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+28, IF_SSE41},
{I_PEXTRW, 3, {MEMORY|BITS16,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+28, IF_SSE41},
{I_PEXTRW, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+27, IF_SSE41|IF_X64},
@@ -3370,158 +3453,158 @@ static const struct itemplate instrux_PEXTRW[] = {
};
static const struct itemplate instrux_PF2ID[] = {
- {I_PF2ID, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5192, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PF2ID, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3698, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PF2IW[] = {
- {I_PF2IW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5472, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PF2IW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3978, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PFACC[] = {
- {I_PFACC, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5200, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PFACC, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3706, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PFADD[] = {
- {I_PFADD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5208, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PFADD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3714, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PFCMPEQ[] = {
- {I_PFCMPEQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5216, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PFCMPEQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3722, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PFCMPGE[] = {
- {I_PFCMPGE, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5224, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PFCMPGE, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3730, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PFCMPGT[] = {
- {I_PFCMPGT, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5232, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PFCMPGT, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3738, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PFMAX[] = {
- {I_PFMAX, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5240, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PFMAX, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3746, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PFMIN[] = {
- {I_PFMIN, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5248, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PFMIN, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3754, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PFMUL[] = {
- {I_PFMUL, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5256, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PFMUL, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3762, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PFNACC[] = {
- {I_PFNACC, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5480, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PFNACC, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3986, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PFPNACC[] = {
- {I_PFPNACC, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5488, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PFPNACC, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3994, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PFRCP[] = {
- {I_PFRCP, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5264, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PFRCP, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3770, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PFRCPIT1[] = {
- {I_PFRCPIT1, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5272, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PFRCPIT1, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3778, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PFRCPIT2[] = {
- {I_PFRCPIT2, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5280, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PFRCPIT2, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3786, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PFRCPV[] = {
- {I_PFRCPV, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5840, IF_PENT|IF_3DNOW|IF_SQ|IF_CYRIX},
+ {I_PFRCPV, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+4346, IF_PENT|IF_3DNOW|IF_SQ|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_PFRSQIT1[] = {
- {I_PFRSQIT1, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5288, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PFRSQIT1, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3794, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PFRSQRT[] = {
- {I_PFRSQRT, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5296, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PFRSQRT, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3802, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PFRSQRTV[] = {
- {I_PFRSQRTV, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5848, IF_PENT|IF_3DNOW|IF_SQ|IF_CYRIX},
+ {I_PFRSQRTV, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+4354, IF_PENT|IF_3DNOW|IF_SQ|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_PFSUB[] = {
- {I_PFSUB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5304, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PFSUB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3810, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PFSUBR[] = {
- {I_PFSUBR, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5312, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PFSUBR, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3818, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PHADDD[] = {
- {I_PHADDD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7942, IF_SSSE3|IF_MMX|IF_SQ},
- {I_PHADDD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+7949, IF_SSSE3},
+ {I_PHADDD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8694, IF_SSSE3|IF_MMX|IF_SQ},
+ {I_PHADDD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8701, IF_SSSE3},
ITEMPLATE_END
};
static const struct itemplate instrux_PHADDSW[] = {
- {I_PHADDSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7956, IF_SSSE3|IF_MMX|IF_SQ},
- {I_PHADDSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+7963, IF_SSSE3},
+ {I_PHADDSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8708, IF_SSSE3|IF_MMX|IF_SQ},
+ {I_PHADDSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8715, IF_SSSE3},
ITEMPLATE_END
};
static const struct itemplate instrux_PHADDW[] = {
- {I_PHADDW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7928, IF_SSSE3|IF_MMX|IF_SQ},
- {I_PHADDW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+7935, IF_SSSE3},
+ {I_PHADDW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8680, IF_SSSE3|IF_MMX|IF_SQ},
+ {I_PHADDW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8687, IF_SSSE3},
ITEMPLATE_END
};
static const struct itemplate instrux_PHMINPOSUW[] = {
- {I_PHMINPOSUW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8159, IF_SSE41},
+ {I_PHMINPOSUW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8911, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_PHSUBD[] = {
- {I_PHSUBD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7984, IF_SSSE3|IF_MMX|IF_SQ},
- {I_PHSUBD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+7991, IF_SSSE3},
+ {I_PHSUBD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8736, IF_SSSE3|IF_MMX|IF_SQ},
+ {I_PHSUBD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8743, IF_SSSE3},
ITEMPLATE_END
};
static const struct itemplate instrux_PHSUBSW[] = {
- {I_PHSUBSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7998, IF_SSSE3|IF_MMX|IF_SQ},
- {I_PHSUBSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8005, IF_SSSE3},
+ {I_PHSUBSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8750, IF_SSSE3|IF_MMX|IF_SQ},
+ {I_PHSUBSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8757, IF_SSSE3},
ITEMPLATE_END
};
static const struct itemplate instrux_PHSUBW[] = {
- {I_PHSUBW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7970, IF_SSSE3|IF_MMX|IF_SQ},
- {I_PHSUBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+7977, IF_SSSE3},
+ {I_PHSUBW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8722, IF_SSSE3|IF_MMX|IF_SQ},
+ {I_PHSUBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8729, IF_SSSE3},
ITEMPLATE_END
};
static const struct itemplate instrux_PI2FD[] = {
- {I_PI2FD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5320, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PI2FD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3826, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PI2FW[] = {
- {I_PI2FW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5496, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PI2FW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+4002, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
@@ -3545,723 +3628,730 @@ static const struct itemplate instrux_PINSRQ[] = {
};
static const struct itemplate instrux_PINSRW[] = {
- {I_PINSRW, 3, {MMXREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+7620, IF_KATMAI|IF_MMX|IF_SB|IF_AR2},
- {I_PINSRW, 3, {MMXREG,RM_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+7620, IF_KATMAI|IF_MMX|IF_SB|IF_AR2},
- {I_PINSRW, 3, {MMXREG,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+7620, IF_KATMAI|IF_MMX|IF_SB|IF_AR2},
- {I_PINSRW, 3, {XMMREG,REG_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+7711, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
- {I_PINSRW, 3, {XMMREG,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+7711, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
- {I_PINSRW, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+7711, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
- {I_PINSRW, 3, {XMMREG,MEMORY|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+7711, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
+ {I_PINSRW, 3, {MMXREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+8372, IF_KATMAI|IF_MMX|IF_SB|IF_AR2},
+ {I_PINSRW, 3, {MMXREG,RM_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+8372, IF_KATMAI|IF_MMX|IF_SB|IF_AR2},
+ {I_PINSRW, 3, {MMXREG,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+8372, IF_KATMAI|IF_MMX|IF_SB|IF_AR2},
+ {I_PINSRW, 3, {XMMREG,REG_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+8463, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
+ {I_PINSRW, 3, {XMMREG,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+8463, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
+ {I_PINSRW, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+8463, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
+ {I_PINSRW, 3, {XMMREG,MEMORY|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+8463, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
ITEMPLATE_END
};
static const struct itemplate instrux_PMACHRIW[] = {
- {I_PMACHRIW, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+15303, IF_PENT|IF_MMX|IF_SM|IF_CYRIX},
+ {I_PMACHRIW, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+17894, IF_PENT|IF_MMX|IF_SM|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_PMADDUBSW[] = {
- {I_PMADDUBSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8012, IF_SSSE3|IF_MMX|IF_SQ},
- {I_PMADDUBSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8019, IF_SSSE3},
+ {I_PMADDUBSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8764, IF_SSSE3|IF_MMX|IF_SQ},
+ {I_PMADDUBSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8771, IF_SSSE3},
ITEMPLATE_END
};
static const struct itemplate instrux_PMADDWD[] = {
- {I_PMADDWD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7193, IF_PENT|IF_MMX|IF_SQ},
- {I_PMADDWD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14966, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PMADDWD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7798, IF_PENT|IF_MMX|IF_SQ},
+ {I_PMADDWD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17557, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PMAGW[] = {
- {I_PMAGW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+14042, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
+ {I_PMAGW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+16627, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_PMAXSB[] = {
- {I_PMAXSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8166, IF_SSE41},
+ {I_PMAXSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8918, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_PMAXSD[] = {
- {I_PMAXSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8173, IF_SSE41},
+ {I_PMAXSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8925, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_PMAXSW[] = {
- {I_PMAXSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7627, IF_KATMAI|IF_MMX|IF_SQ},
- {I_PMAXSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14972, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PMAXSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8379, IF_KATMAI|IF_MMX|IF_SQ},
+ {I_PMAXSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17563, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PMAXUB[] = {
- {I_PMAXUB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7634, IF_KATMAI|IF_MMX|IF_SQ},
- {I_PMAXUB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14978, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PMAXUB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8386, IF_KATMAI|IF_MMX|IF_SQ},
+ {I_PMAXUB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17569, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PMAXUD[] = {
- {I_PMAXUD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8180, IF_SSE41},
+ {I_PMAXUD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8932, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_PMAXUW[] = {
- {I_PMAXUW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8187, IF_SSE41},
+ {I_PMAXUW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8939, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_PMINSB[] = {
- {I_PMINSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8194, IF_SSE41},
+ {I_PMINSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8946, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_PMINSD[] = {
- {I_PMINSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8201, IF_SSE41},
+ {I_PMINSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8953, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_PMINSW[] = {
- {I_PMINSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7641, IF_KATMAI|IF_MMX|IF_SQ},
- {I_PMINSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14984, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PMINSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8393, IF_KATMAI|IF_MMX|IF_SQ},
+ {I_PMINSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17575, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PMINUB[] = {
- {I_PMINUB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7648, IF_KATMAI|IF_MMX|IF_SQ},
- {I_PMINUB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14990, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PMINUB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8400, IF_KATMAI|IF_MMX|IF_SQ},
+ {I_PMINUB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17581, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PMINUD[] = {
- {I_PMINUD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8208, IF_SSE41},
+ {I_PMINUD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8960, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_PMINUW[] = {
- {I_PMINUW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8215, IF_SSE41},
+ {I_PMINUW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8967, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_PMOVMSKB[] = {
- {I_PMOVMSKB, 2, {REG_GPR|BITS32,MMXREG,0,0,0}, nasm_bytecodes+14762, IF_KATMAI|IF_MMX},
- {I_PMOVMSKB, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+14996, IF_WILLAMETTE|IF_SSE2},
+ {I_PMOVMSKB, 2, {REG_GPR|BITS32,MMXREG,0,0,0}, nasm_bytecodes+17353, IF_KATMAI|IF_MMX},
+ {I_PMOVMSKB, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+17587, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_PMOVSXBD[] = {
- {I_PMOVSXBD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8229, IF_SSE41|IF_SD},
+ {I_PMOVSXBD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8981, IF_SSE41|IF_SD},
ITEMPLATE_END
};
static const struct itemplate instrux_PMOVSXBQ[] = {
- {I_PMOVSXBQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8236, IF_SSE41|IF_SW},
+ {I_PMOVSXBQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8988, IF_SSE41|IF_SW},
ITEMPLATE_END
};
static const struct itemplate instrux_PMOVSXBW[] = {
- {I_PMOVSXBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8222, IF_SSE41|IF_SQ},
+ {I_PMOVSXBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8974, IF_SSE41|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PMOVSXDQ[] = {
- {I_PMOVSXDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8257, IF_SSE41|IF_SQ},
+ {I_PMOVSXDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9009, IF_SSE41|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PMOVSXWD[] = {
- {I_PMOVSXWD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8243, IF_SSE41|IF_SQ},
+ {I_PMOVSXWD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8995, IF_SSE41|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PMOVSXWQ[] = {
- {I_PMOVSXWQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8250, IF_SSE41|IF_SD},
+ {I_PMOVSXWQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9002, IF_SSE41|IF_SD},
ITEMPLATE_END
};
static const struct itemplate instrux_PMOVZXBD[] = {
- {I_PMOVZXBD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8271, IF_SSE41|IF_SD},
+ {I_PMOVZXBD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9023, IF_SSE41|IF_SD},
ITEMPLATE_END
};
static const struct itemplate instrux_PMOVZXBQ[] = {
- {I_PMOVZXBQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8278, IF_SSE41|IF_SW},
+ {I_PMOVZXBQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9030, IF_SSE41|IF_SW},
ITEMPLATE_END
};
static const struct itemplate instrux_PMOVZXBW[] = {
- {I_PMOVZXBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8264, IF_SSE41|IF_SQ},
+ {I_PMOVZXBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9016, IF_SSE41|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PMOVZXDQ[] = {
- {I_PMOVZXDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8299, IF_SSE41|IF_SQ},
+ {I_PMOVZXDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9051, IF_SSE41|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PMOVZXWD[] = {
- {I_PMOVZXWD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8285, IF_SSE41|IF_SQ},
+ {I_PMOVZXWD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9037, IF_SSE41|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PMOVZXWQ[] = {
- {I_PMOVZXWQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8292, IF_SSE41|IF_SD},
+ {I_PMOVZXWQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9044, IF_SSE41|IF_SD},
ITEMPLATE_END
};
static const struct itemplate instrux_PMULDQ[] = {
- {I_PMULDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8306, IF_SSE41},
+ {I_PMULDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9058, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_PMULHRIW[] = {
- {I_PMULHRIW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+14048, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
+ {I_PMULHRIW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+16633, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_PMULHRSW[] = {
- {I_PMULHRSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8026, IF_SSSE3|IF_MMX|IF_SQ},
- {I_PMULHRSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8033, IF_SSSE3},
+ {I_PMULHRSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8778, IF_SSSE3|IF_MMX|IF_SQ},
+ {I_PMULHRSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8785, IF_SSSE3},
ITEMPLATE_END
};
static const struct itemplate instrux_PMULHRWA[] = {
- {I_PMULHRWA, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5328, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PMULHRWA, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3834, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PMULHRWC[] = {
- {I_PMULHRWC, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+14054, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
+ {I_PMULHRWC, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+16639, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_PMULHUW[] = {
- {I_PMULHUW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7655, IF_KATMAI|IF_MMX|IF_SQ},
- {I_PMULHUW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15002, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PMULHUW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8407, IF_KATMAI|IF_MMX|IF_SQ},
+ {I_PMULHUW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17593, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PMULHW[] = {
- {I_PMULHW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7200, IF_PENT|IF_MMX|IF_SQ},
- {I_PMULHW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15008, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PMULHW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7805, IF_PENT|IF_MMX|IF_SQ},
+ {I_PMULHW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17599, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PMULLD[] = {
- {I_PMULLD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8313, IF_SSE41},
+ {I_PMULLD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9065, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_PMULLW[] = {
- {I_PMULLW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7207, IF_PENT|IF_MMX|IF_SQ},
- {I_PMULLW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15014, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PMULLW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7812, IF_PENT|IF_MMX|IF_SQ},
+ {I_PMULLW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17605, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PMULUDQ[] = {
- {I_PMULUDQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7718, IF_WILLAMETTE|IF_SSE2|IF_SO},
- {I_PMULUDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15020, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PMULUDQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8470, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PMULUDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17611, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PMVGEZB[] = {
- {I_PMVGEZB, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+15435, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
+ {I_PMVGEZB, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+18026, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_PMVLZB[] = {
- {I_PMVLZB, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+15291, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
+ {I_PMVLZB, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+17882, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_PMVNZB[] = {
- {I_PMVNZB, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+15273, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
+ {I_PMVNZB, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+17864, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_PMVZB[] = {
- {I_PMVZB, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+15195, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
+ {I_PMVZB, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+17786, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_POP[] = {
- {I_POP, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19388, IF_8086},
- {I_POP, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19392, IF_386|IF_NOLONG},
- {I_POP, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19396, IF_X64},
- {I_POP, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17957, IF_8086},
- {I_POP, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+17962, IF_386|IF_NOLONG},
- {I_POP, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+17967, IF_X64},
- {I_POP, 1, {REG_CS,0,0,0,0}, nasm_bytecodes+3291, IF_8086|IF_UNDOC},
- {I_POP, 1, {REG_DESS,0,0,0,0}, nasm_bytecodes+19206, IF_8086|IF_NOLONG},
- {I_POP, 1, {REG_FSGS,0,0,0,0}, nasm_bytecodes+19400, IF_386},
+ {I_POP, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+21845, IF_8086},
+ {I_POP, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+21849, IF_386|IF_NOLONG},
+ {I_POP, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+21853, IF_X64},
+ {I_POP, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+20499, IF_8086},
+ {I_POP, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+20504, IF_386|IF_NOLONG},
+ {I_POP, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+20509, IF_X64},
+ {I_POP, 1, {REG_CS,0,0,0,0}, nasm_bytecodes+3237, IF_8086|IF_UNDOC},
+ {I_POP, 1, {REG_DESS,0,0,0,0}, nasm_bytecodes+21687, IF_8086|IF_NOLONG},
+ {I_POP, 1, {REG_FSGS,0,0,0,0}, nasm_bytecodes+21857, IF_386},
ITEMPLATE_END
};
static const struct itemplate instrux_POPA[] = {
- {I_POPA, 0, {0,0,0,0,0}, nasm_bytecodes+19404, IF_186|IF_NOLONG},
+ {I_POPA, 0, {0,0,0,0,0}, nasm_bytecodes+21861, IF_186|IF_NOLONG},
ITEMPLATE_END
};
static const struct itemplate instrux_POPAD[] = {
- {I_POPAD, 0, {0,0,0,0,0}, nasm_bytecodes+19408, IF_386|IF_NOLONG},
+ {I_POPAD, 0, {0,0,0,0,0}, nasm_bytecodes+21865, IF_386|IF_NOLONG},
ITEMPLATE_END
};
static const struct itemplate instrux_POPAW[] = {
- {I_POPAW, 0, {0,0,0,0,0}, nasm_bytecodes+19412, IF_186|IF_NOLONG},
+ {I_POPAW, 0, {0,0,0,0,0}, nasm_bytecodes+21869, IF_186|IF_NOLONG},
ITEMPLATE_END
};
static const struct itemplate instrux_POPCNT[] = {
- {I_POPCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+8334, IF_NEHALEM|IF_SW},
- {I_POPCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+8341, IF_NEHALEM|IF_SD},
- {I_POPCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+8348, IF_NEHALEM|IF_SQ|IF_X64},
+ {I_POPCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+9086, IF_NEHALEM|IF_SW},
+ {I_POPCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+9093, IF_NEHALEM|IF_SD},
+ {I_POPCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+9100, IF_NEHALEM|IF_SQ|IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_POPF[] = {
- {I_POPF, 0, {0,0,0,0,0}, nasm_bytecodes+19416, IF_8086},
+ {I_POPF, 0, {0,0,0,0,0}, nasm_bytecodes+21873, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_POPFD[] = {
- {I_POPFD, 0, {0,0,0,0,0}, nasm_bytecodes+19420, IF_386|IF_NOLONG},
+ {I_POPFD, 0, {0,0,0,0,0}, nasm_bytecodes+21877, IF_386|IF_NOLONG},
ITEMPLATE_END
};
static const struct itemplate instrux_POPFQ[] = {
- {I_POPFQ, 0, {0,0,0,0,0}, nasm_bytecodes+19420, IF_X64},
+ {I_POPFQ, 0, {0,0,0,0,0}, nasm_bytecodes+21877, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_POPFW[] = {
- {I_POPFW, 0, {0,0,0,0,0}, nasm_bytecodes+19424, IF_8086},
+ {I_POPFW, 0, {0,0,0,0,0}, nasm_bytecodes+21881, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_POR[] = {
- {I_POR, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7214, IF_PENT|IF_MMX|IF_SQ},
- {I_POR, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15026, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_POR, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7819, IF_PENT|IF_MMX|IF_SQ},
+ {I_POR, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17617, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PREFETCH[] = {
- {I_PREFETCH, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17972, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PREFETCH, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20514, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PREFETCHNTA[] = {
- {I_PREFETCHNTA, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+15651, IF_KATMAI},
+ {I_PREFETCHNTA, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18278, IF_KATMAI},
ITEMPLATE_END
};
static const struct itemplate instrux_PREFETCHT0[] = {
- {I_PREFETCHT0, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+15669, IF_KATMAI},
+ {I_PREFETCHT0, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18296, IF_KATMAI},
ITEMPLATE_END
};
static const struct itemplate instrux_PREFETCHT1[] = {
- {I_PREFETCHT1, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+15687, IF_KATMAI},
+ {I_PREFETCHT1, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18314, IF_KATMAI},
ITEMPLATE_END
};
static const struct itemplate instrux_PREFETCHT2[] = {
- {I_PREFETCHT2, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+15705, IF_KATMAI},
+ {I_PREFETCHT2, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18332, IF_KATMAI},
ITEMPLATE_END
};
static const struct itemplate instrux_PREFETCHW[] = {
- {I_PREFETCHW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17977, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PREFETCHW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20519, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PSADBW[] = {
- {I_PSADBW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7662, IF_KATMAI|IF_MMX|IF_SQ},
- {I_PSADBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15032, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PSADBW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8414, IF_KATMAI|IF_MMX|IF_SQ},
+ {I_PSADBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17623, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PSHUFB[] = {
- {I_PSHUFB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8040, IF_SSSE3|IF_MMX|IF_SQ},
- {I_PSHUFB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8047, IF_SSSE3},
+ {I_PSHUFB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8792, IF_SSSE3|IF_MMX|IF_SQ},
+ {I_PSHUFB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8799, IF_SSSE3},
ITEMPLATE_END
};
static const struct itemplate instrux_PSHUFD[] = {
- {I_PSHUFD, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+7725, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
- {I_PSHUFD, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+7725, IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},
+ {I_PSHUFD, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+8477, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
+ {I_PSHUFD, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+8477, IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},
ITEMPLATE_END
};
static const struct itemplate instrux_PSHUFHW[] = {
- {I_PSHUFHW, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+7732, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
- {I_PSHUFHW, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+7732, IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},
+ {I_PSHUFHW, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+8484, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
+ {I_PSHUFHW, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+8484, IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},
ITEMPLATE_END
};
static const struct itemplate instrux_PSHUFLW[] = {
- {I_PSHUFLW, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+7739, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
- {I_PSHUFLW, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+7739, IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},
+ {I_PSHUFLW, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+8491, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
+ {I_PSHUFLW, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+8491, IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},
ITEMPLATE_END
};
static const struct itemplate instrux_PSHUFW[] = {
- {I_PSHUFW, 3, {MMXREG,RM_MMX,IMMEDIATE,0,0}, nasm_bytecodes+5464, IF_KATMAI|IF_MMX|IF_SM2|IF_SB|IF_AR2},
+ {I_PSHUFW, 3, {MMXREG,RM_MMX,IMMEDIATE,0,0}, nasm_bytecodes+3970, IF_KATMAI|IF_MMX|IF_SM2|IF_SB|IF_AR2},
ITEMPLATE_END
};
static const struct itemplate instrux_PSIGNB[] = {
- {I_PSIGNB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8054, IF_SSSE3|IF_MMX|IF_SQ},
- {I_PSIGNB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8061, IF_SSSE3},
+ {I_PSIGNB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8806, IF_SSSE3|IF_MMX|IF_SQ},
+ {I_PSIGNB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8813, IF_SSSE3},
ITEMPLATE_END
};
static const struct itemplate instrux_PSIGND[] = {
- {I_PSIGND, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8082, IF_SSSE3|IF_MMX|IF_SQ},
- {I_PSIGND, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8089, IF_SSSE3},
+ {I_PSIGND, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8834, IF_SSSE3|IF_MMX|IF_SQ},
+ {I_PSIGND, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8841, IF_SSSE3},
ITEMPLATE_END
};
static const struct itemplate instrux_PSIGNW[] = {
- {I_PSIGNW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8068, IF_SSSE3|IF_MMX|IF_SQ},
- {I_PSIGNW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8075, IF_SSSE3},
+ {I_PSIGNW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8820, IF_SSSE3|IF_MMX|IF_SQ},
+ {I_PSIGNW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8827, IF_SSSE3},
ITEMPLATE_END
};
static const struct itemplate instrux_PSLLD[] = {
- {I_PSLLD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7221, IF_PENT|IF_MMX|IF_SQ},
- {I_PSLLD, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7228, IF_PENT|IF_MMX},
- {I_PSLLD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15044, IF_WILLAMETTE|IF_SSE2|IF_SO},
- {I_PSLLD, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7760, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
+ {I_PSLLD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7826, IF_PENT|IF_MMX|IF_SQ},
+ {I_PSLLD, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7833, IF_PENT|IF_MMX},
+ {I_PSLLD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17635, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PSLLD, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+8512, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
ITEMPLATE_END
};
static const struct itemplate instrux_PSLLDQ[] = {
- {I_PSLLDQ, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7746, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
+ {I_PSLLDQ, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+8498, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
ITEMPLATE_END
};
static const struct itemplate instrux_PSLLQ[] = {
- {I_PSLLQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7235, IF_PENT|IF_MMX|IF_SQ},
- {I_PSLLQ, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7242, IF_PENT|IF_MMX},
- {I_PSLLQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15050, IF_WILLAMETTE|IF_SSE2|IF_SO},
- {I_PSLLQ, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7767, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
+ {I_PSLLQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7840, IF_PENT|IF_MMX|IF_SQ},
+ {I_PSLLQ, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7847, IF_PENT|IF_MMX},
+ {I_PSLLQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17641, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PSLLQ, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+8519, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
ITEMPLATE_END
};
static const struct itemplate instrux_PSLLW[] = {
- {I_PSLLW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7249, IF_PENT|IF_MMX|IF_SQ},
- {I_PSLLW, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7256, IF_PENT|IF_MMX},
- {I_PSLLW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15038, IF_WILLAMETTE|IF_SSE2|IF_SO},
- {I_PSLLW, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7753, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
+ {I_PSLLW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7854, IF_PENT|IF_MMX|IF_SQ},
+ {I_PSLLW, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7861, IF_PENT|IF_MMX},
+ {I_PSLLW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17629, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PSLLW, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+8505, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
ITEMPLATE_END
};
static const struct itemplate instrux_PSRAD[] = {
- {I_PSRAD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7263, IF_PENT|IF_MMX|IF_SQ},
- {I_PSRAD, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7270, IF_PENT|IF_MMX},
- {I_PSRAD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15062, IF_WILLAMETTE|IF_SSE2|IF_SO},
- {I_PSRAD, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7781, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
+ {I_PSRAD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7868, IF_PENT|IF_MMX|IF_SQ},
+ {I_PSRAD, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7875, IF_PENT|IF_MMX},
+ {I_PSRAD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17653, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PSRAD, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+8533, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
ITEMPLATE_END
};
static const struct itemplate instrux_PSRAW[] = {
- {I_PSRAW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7277, IF_PENT|IF_MMX|IF_SQ},
- {I_PSRAW, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7284, IF_PENT|IF_MMX},
- {I_PSRAW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15056, IF_WILLAMETTE|IF_SSE2|IF_SO},
- {I_PSRAW, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7774, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
+ {I_PSRAW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7882, IF_PENT|IF_MMX|IF_SQ},
+ {I_PSRAW, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7889, IF_PENT|IF_MMX},
+ {I_PSRAW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17647, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PSRAW, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+8526, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
ITEMPLATE_END
};
static const struct itemplate instrux_PSRLD[] = {
- {I_PSRLD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7291, IF_PENT|IF_MMX|IF_SQ},
- {I_PSRLD, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7298, IF_PENT|IF_MMX},
- {I_PSRLD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15074, IF_WILLAMETTE|IF_SSE2|IF_SO},
- {I_PSRLD, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7802, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
+ {I_PSRLD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7896, IF_PENT|IF_MMX|IF_SQ},
+ {I_PSRLD, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7903, IF_PENT|IF_MMX},
+ {I_PSRLD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17665, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PSRLD, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+8554, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
ITEMPLATE_END
};
static const struct itemplate instrux_PSRLDQ[] = {
- {I_PSRLDQ, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7788, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
+ {I_PSRLDQ, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+8540, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
ITEMPLATE_END
};
static const struct itemplate instrux_PSRLQ[] = {
- {I_PSRLQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7305, IF_PENT|IF_MMX|IF_SQ},
- {I_PSRLQ, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7312, IF_PENT|IF_MMX},
- {I_PSRLQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15080, IF_WILLAMETTE|IF_SSE2|IF_SO},
- {I_PSRLQ, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7809, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
+ {I_PSRLQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7910, IF_PENT|IF_MMX|IF_SQ},
+ {I_PSRLQ, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7917, IF_PENT|IF_MMX},
+ {I_PSRLQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17671, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PSRLQ, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+8561, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
ITEMPLATE_END
};
static const struct itemplate instrux_PSRLW[] = {
- {I_PSRLW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7319, IF_PENT|IF_MMX|IF_SQ},
- {I_PSRLW, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7326, IF_PENT|IF_MMX},
- {I_PSRLW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15068, IF_WILLAMETTE|IF_SSE2|IF_SO},
- {I_PSRLW, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7795, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
+ {I_PSRLW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7924, IF_PENT|IF_MMX|IF_SQ},
+ {I_PSRLW, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7931, IF_PENT|IF_MMX},
+ {I_PSRLW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17659, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PSRLW, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+8547, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
ITEMPLATE_END
};
static const struct itemplate instrux_PSUBB[] = {
- {I_PSUBB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7333, IF_PENT|IF_MMX|IF_SQ},
- {I_PSUBB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15086, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PSUBB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7938, IF_PENT|IF_MMX|IF_SQ},
+ {I_PSUBB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17677, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PSUBD[] = {
- {I_PSUBD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7340, IF_PENT|IF_MMX|IF_SQ},
- {I_PSUBD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15098, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PSUBD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7945, IF_PENT|IF_MMX|IF_SQ},
+ {I_PSUBD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17689, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PSUBQ[] = {
- {I_PSUBQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7816, IF_WILLAMETTE|IF_SSE2|IF_SO},
- {I_PSUBQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15104, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PSUBQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8568, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PSUBQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17695, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PSUBSB[] = {
- {I_PSUBSB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7347, IF_PENT|IF_MMX|IF_SQ},
- {I_PSUBSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15110, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PSUBSB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7952, IF_PENT|IF_MMX|IF_SQ},
+ {I_PSUBSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17701, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PSUBSIW[] = {
- {I_PSUBSIW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+14060, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
+ {I_PSUBSIW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+16645, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_PSUBSW[] = {
- {I_PSUBSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7354, IF_PENT|IF_MMX|IF_SQ},
- {I_PSUBSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15116, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PSUBSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7959, IF_PENT|IF_MMX|IF_SQ},
+ {I_PSUBSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17707, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PSUBUSB[] = {
- {I_PSUBUSB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7361, IF_PENT|IF_MMX|IF_SQ},
- {I_PSUBUSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15122, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PSUBUSB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7966, IF_PENT|IF_MMX|IF_SQ},
+ {I_PSUBUSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17713, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PSUBUSW[] = {
- {I_PSUBUSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7368, IF_PENT|IF_MMX|IF_SQ},
- {I_PSUBUSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15128, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PSUBUSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7973, IF_PENT|IF_MMX|IF_SQ},
+ {I_PSUBUSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17719, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PSUBW[] = {
- {I_PSUBW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7375, IF_PENT|IF_MMX|IF_SQ},
- {I_PSUBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15092, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PSUBW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7980, IF_PENT|IF_MMX|IF_SQ},
+ {I_PSUBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17683, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PSWAPD[] = {
- {I_PSWAPD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5504, IF_PENT|IF_3DNOW|IF_SQ},
+ {I_PSWAPD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+4010, IF_PENT|IF_3DNOW|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_PTEST[] = {
- {I_PTEST, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8320, IF_SSE41},
+ {I_PTEST, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9072, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_PUNPCKHBW[] = {
- {I_PUNPCKHBW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7382, IF_PENT|IF_MMX|IF_SQ},
- {I_PUNPCKHBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15134, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PUNPCKHBW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7987, IF_PENT|IF_MMX|IF_SQ},
+ {I_PUNPCKHBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17725, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PUNPCKHDQ[] = {
- {I_PUNPCKHDQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7389, IF_PENT|IF_MMX|IF_SQ},
- {I_PUNPCKHDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15146, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PUNPCKHDQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7994, IF_PENT|IF_MMX|IF_SQ},
+ {I_PUNPCKHDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17737, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PUNPCKHQDQ[] = {
- {I_PUNPCKHQDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15152, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PUNPCKHQDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17743, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PUNPCKHWD[] = {
- {I_PUNPCKHWD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7396, IF_PENT|IF_MMX|IF_SQ},
- {I_PUNPCKHWD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15140, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PUNPCKHWD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8001, IF_PENT|IF_MMX|IF_SQ},
+ {I_PUNPCKHWD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17731, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PUNPCKLBW[] = {
- {I_PUNPCKLBW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7403, IF_PENT|IF_MMX|IF_SQ},
- {I_PUNPCKLBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15158, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PUNPCKLBW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8008, IF_PENT|IF_MMX|IF_SQ},
+ {I_PUNPCKLBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17749, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PUNPCKLDQ[] = {
- {I_PUNPCKLDQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7410, IF_PENT|IF_MMX|IF_SQ},
- {I_PUNPCKLDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15170, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PUNPCKLDQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8015, IF_PENT|IF_MMX|IF_SQ},
+ {I_PUNPCKLDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17761, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PUNPCKLQDQ[] = {
- {I_PUNPCKLQDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15176, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PUNPCKLQDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17767, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PUNPCKLWD[] = {
- {I_PUNPCKLWD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7417, IF_PENT|IF_MMX|IF_SQ},
- {I_PUNPCKLWD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15164, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PUNPCKLWD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8022, IF_PENT|IF_MMX|IF_SQ},
+ {I_PUNPCKLWD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17755, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_PUSH[] = {
- {I_PUSH, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19428, IF_8086},
- {I_PUSH, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19432, IF_386|IF_NOLONG},
- {I_PUSH, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19436, IF_X64},
- {I_PUSH, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17982, IF_8086},
- {I_PUSH, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+17987, IF_386|IF_NOLONG},
- {I_PUSH, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+17992, IF_X64},
- {I_PUSH, 1, {REG_CS,0,0,0,0}, nasm_bytecodes+19182, IF_8086|IF_NOLONG},
- {I_PUSH, 1, {REG_DESS,0,0,0,0}, nasm_bytecodes+19182, IF_8086|IF_NOLONG},
- {I_PUSH, 1, {REG_FSGS,0,0,0,0}, nasm_bytecodes+19440, IF_386},
- {I_PUSH, 1, {IMMEDIATE|BITS8,0,0,0,0}, nasm_bytecodes+19444, IF_186},
- {I_PUSH, 1, {IMMEDIATE|BITS16,0,0,0,0}, nasm_bytecodes+17997, IF_186|IF_AR0|IF_SZ},
- {I_PUSH, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+18002, IF_386|IF_NOLONG|IF_AR0|IF_SZ},
- {I_PUSH, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+18002, IF_386|IF_NOLONG|IF_SD},
- {I_PUSH, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+18007, IF_X64|IF_AR0|IF_SZ},
- {I_PUSH, 1, {IMMEDIATE|BITS64,0,0,0,0}, nasm_bytecodes+18007, IF_X64|IF_AR0|IF_SZ},
+ {I_PUSH, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+21885, IF_8086},
+ {I_PUSH, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+21889, IF_386|IF_NOLONG},
+ {I_PUSH, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+21893, IF_X64},
+ {I_PUSH, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+20524, IF_8086},
+ {I_PUSH, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+20529, IF_386|IF_NOLONG},
+ {I_PUSH, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+20534, IF_X64},
+ {I_PUSH, 1, {REG_CS,0,0,0,0}, nasm_bytecodes+21663, IF_8086|IF_NOLONG},
+ {I_PUSH, 1, {REG_DESS,0,0,0,0}, nasm_bytecodes+21663, IF_8086|IF_NOLONG},
+ {I_PUSH, 1, {REG_FSGS,0,0,0,0}, nasm_bytecodes+21897, IF_386},
+ {I_PUSH, 1, {IMMEDIATE|BITS8,0,0,0,0}, nasm_bytecodes+21901, IF_186},
+ {I_PUSH, 1, {IMMEDIATE|BITS16,0,0,0,0}, nasm_bytecodes+20539, IF_186|IF_AR0|IF_SZ},
+ {I_PUSH, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+20544, IF_386|IF_NOLONG|IF_AR0|IF_SZ},
+ {I_PUSH, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+20544, IF_386|IF_NOLONG|IF_SD},
+ {I_PUSH, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+20549, IF_X64|IF_AR0|IF_SZ},
+ {I_PUSH, 1, {IMMEDIATE|BITS64,0,0,0,0}, nasm_bytecodes+20549, IF_X64|IF_AR0|IF_SZ},
ITEMPLATE_END
};
static const struct itemplate instrux_PUSHA[] = {
- {I_PUSHA, 0, {0,0,0,0,0}, nasm_bytecodes+19448, IF_186|IF_NOLONG},
+ {I_PUSHA, 0, {0,0,0,0,0}, nasm_bytecodes+21905, IF_186|IF_NOLONG},
ITEMPLATE_END
};
static const struct itemplate instrux_PUSHAD[] = {
- {I_PUSHAD, 0, {0,0,0,0,0}, nasm_bytecodes+19452, IF_386|IF_NOLONG},
+ {I_PUSHAD, 0, {0,0,0,0,0}, nasm_bytecodes+21909, IF_386|IF_NOLONG},
ITEMPLATE_END
};
static const struct itemplate instrux_PUSHAW[] = {
- {I_PUSHAW, 0, {0,0,0,0,0}, nasm_bytecodes+19456, IF_186|IF_NOLONG},
+ {I_PUSHAW, 0, {0,0,0,0,0}, nasm_bytecodes+21913, IF_186|IF_NOLONG},
ITEMPLATE_END
};
static const struct itemplate instrux_PUSHF[] = {
- {I_PUSHF, 0, {0,0,0,0,0}, nasm_bytecodes+19460, IF_8086},
+ {I_PUSHF, 0, {0,0,0,0,0}, nasm_bytecodes+21917, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_PUSHFD[] = {
- {I_PUSHFD, 0, {0,0,0,0,0}, nasm_bytecodes+19464, IF_386|IF_NOLONG},
+ {I_PUSHFD, 0, {0,0,0,0,0}, nasm_bytecodes+21921, IF_386|IF_NOLONG},
ITEMPLATE_END
};
static const struct itemplate instrux_PUSHFQ[] = {
- {I_PUSHFQ, 0, {0,0,0,0,0}, nasm_bytecodes+19464, IF_X64},
+ {I_PUSHFQ, 0, {0,0,0,0,0}, nasm_bytecodes+21921, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_PUSHFW[] = {
- {I_PUSHFW, 0, {0,0,0,0,0}, nasm_bytecodes+19468, IF_8086},
+ {I_PUSHFW, 0, {0,0,0,0,0}, nasm_bytecodes+21925, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_PXOR[] = {
- {I_PXOR, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7424, IF_PENT|IF_MMX|IF_SQ},
- {I_PXOR, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15182, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_PXOR, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8029, IF_PENT|IF_MMX|IF_SQ},
+ {I_PXOR, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17773, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_RCL[] = {
- {I_RCL, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+19472, IF_8086},
- {I_RCL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+19476, IF_8086},
- {I_RCL, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+18012, IF_186|IF_SB},
- {I_RCL, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+18017, IF_8086},
- {I_RCL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+18022, IF_8086},
- {I_RCL, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+14066, IF_186|IF_SB},
- {I_RCL, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+18027, IF_386},
- {I_RCL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+18032, IF_386},
- {I_RCL, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+14072, IF_386|IF_SB},
- {I_RCL, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+18037, IF_X64},
- {I_RCL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+18042, IF_X64},
- {I_RCL, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+14078, IF_X64|IF_SB},
+ {I_RCL, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+21929, IF_8086},
+ {I_RCL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+21933, IF_8086},
+ {I_RCL, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+20554, IF_186},
+ {I_RCL, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+20559, IF_8086},
+ {I_RCL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+20564, IF_8086},
+ {I_RCL, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16651, IF_186},
+ {I_RCL, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+20569, IF_386},
+ {I_RCL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+20574, IF_386},
+ {I_RCL, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16657, IF_386},
+ {I_RCL, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+20579, IF_X64},
+ {I_RCL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+20584, IF_X64},
+ {I_RCL, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16663, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_RCPPS[] = {
- {I_RCPPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14636, IF_KATMAI|IF_SSE},
+ {I_RCPPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17227, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_RCPSS[] = {
- {I_RCPSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14642, IF_KATMAI|IF_SSE},
+ {I_RCPSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+17233, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_RCR[] = {
- {I_RCR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+19480, IF_8086},
- {I_RCR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+19484, IF_8086},
- {I_RCR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+18047, IF_186|IF_SB},
- {I_RCR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+18052, IF_8086},
- {I_RCR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+18057, IF_8086},
- {I_RCR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+14084, IF_186|IF_SB},
- {I_RCR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+18062, IF_386},
- {I_RCR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+18067, IF_386},
- {I_RCR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+14090, IF_386|IF_SB},
- {I_RCR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+18072, IF_X64},
- {I_RCR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+18077, IF_X64},
- {I_RCR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+14096, IF_X64|IF_SB},
+ {I_RCR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+21937, IF_8086},
+ {I_RCR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+21941, IF_8086},
+ {I_RCR, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+20589, IF_186},
+ {I_RCR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+20594, IF_8086},
+ {I_RCR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+20599, IF_8086},
+ {I_RCR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16669, IF_186},
+ {I_RCR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+20604, IF_386},
+ {I_RCR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+20609, IF_386},
+ {I_RCR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16675, IF_386},
+ {I_RCR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+20614, IF_X64},
+ {I_RCR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+20619, IF_X64},
+ {I_RCR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16681, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_RDFSBASE[] = {
- {I_RDFSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+12521, IF_LONG|IF_FUTURE},
- {I_RDFSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+12520, IF_LONG|IF_FUTURE},
+ {I_RDFSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+13272, IF_LONG|IF_FUTURE},
+ {I_RDFSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+13279, IF_LONG|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_RDGSBASE[] = {
- {I_RDGSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+12528, IF_LONG|IF_FUTURE},
- {I_RDGSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+12527, IF_LONG|IF_FUTURE},
+ {I_RDGSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+13286, IF_LONG|IF_FUTURE},
+ {I_RDGSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+13293, IF_LONG|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_RDM[] = {
- {I_RDM, 0, {0,0,0,0,0}, nasm_bytecodes+18676, IF_P6|IF_CYRIX},
+ {I_RDM, 0, {0,0,0,0,0}, nasm_bytecodes+21161, IF_P6|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_RDMSR[] = {
- {I_RDMSR, 0, {0,0,0,0,0}, nasm_bytecodes+19488, IF_PENT|IF_PRIV},
+ {I_RDMSR, 0, {0,0,0,0,0}, nasm_bytecodes+21945, IF_PENT|IF_PRIV},
ITEMPLATE_END
};
static const struct itemplate instrux_RDPMC[] = {
- {I_RDPMC, 0, {0,0,0,0,0}, nasm_bytecodes+19492, IF_P6},
+ {I_RDPMC, 0, {0,0,0,0,0}, nasm_bytecodes+21949, IF_P6},
ITEMPLATE_END
};
static const struct itemplate instrux_RDRAND[] = {
- {I_RDRAND, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15572, IF_FUTURE},
- {I_RDRAND, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15578, IF_FUTURE},
- {I_RDRAND, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15584, IF_LONG|IF_FUTURE},
+ {I_RDRAND, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18163, IF_FUTURE},
+ {I_RDRAND, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18169, IF_FUTURE},
+ {I_RDRAND, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18175, IF_LONG|IF_FUTURE},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RDSEED[] = {
+ {I_RDSEED, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18181, IF_FUTURE},
+ {I_RDSEED, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18187, IF_FUTURE},
+ {I_RDSEED, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18193, IF_LONG|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_RDSHR[] = {
- {I_RDSHR, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+14102, IF_P6|IF_CYRIX|IF_SMM},
+ {I_RDSHR, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16687, IF_P6|IF_CYRIX|IF_SMM},
ITEMPLATE_END
};
static const struct itemplate instrux_RDTSC[] = {
- {I_RDTSC, 0, {0,0,0,0,0}, nasm_bytecodes+19496, IF_PENT},
+ {I_RDTSC, 0, {0,0,0,0,0}, nasm_bytecodes+21953, IF_PENT},
ITEMPLATE_END
};
static const struct itemplate instrux_RDTSCP[] = {
- {I_RDTSCP, 0, {0,0,0,0,0}, nasm_bytecodes+18082, IF_X86_64},
+ {I_RDTSCP, 0, {0,0,0,0,0}, nasm_bytecodes+20624, IF_X86_64},
ITEMPLATE_END
};
static const struct itemplate instrux_RESB[] = {
- {I_RESB, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+18790, IF_8086},
+ {I_RESB, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+21271, IF_8086},
ITEMPLATE_END
};
@@ -4290,5177 +4380,5663 @@ static const struct itemplate instrux_RESY[] = {
};
static const struct itemplate instrux_RET[] = {
- {I_RET, 0, {0,0,0,0,0}, nasm_bytecodes+18609, IF_8086},
- {I_RET, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+19500, IF_8086|IF_SW},
+ {I_RET, 0, {0,0,0,0,0}, nasm_bytecodes+21081, IF_8086},
+ {I_RET, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+21957, IF_8086|IF_SW},
ITEMPLATE_END
};
static const struct itemplate instrux_RETF[] = {
- {I_RETF, 0, {0,0,0,0,0}, nasm_bytecodes+19731, IF_8086},
- {I_RETF, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+19504, IF_8086|IF_SW},
+ {I_RETF, 0, {0,0,0,0,0}, nasm_bytecodes+21106, IF_8086},
+ {I_RETF, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+21961, IF_8086|IF_SW},
ITEMPLATE_END
};
static const struct itemplate instrux_RETN[] = {
- {I_RETN, 0, {0,0,0,0,0}, nasm_bytecodes+18609, IF_8086},
- {I_RETN, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+19500, IF_8086|IF_SW},
+ {I_RETN, 0, {0,0,0,0,0}, nasm_bytecodes+21081, IF_8086},
+ {I_RETN, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+21957, IF_8086|IF_SW},
ITEMPLATE_END
};
static const struct itemplate instrux_ROL[] = {
- {I_ROL, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+19508, IF_8086},
- {I_ROL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+19512, IF_8086},
- {I_ROL, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+18087, IF_186|IF_SB},
- {I_ROL, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+18092, IF_8086},
- {I_ROL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+18097, IF_8086},
- {I_ROL, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+14108, IF_186|IF_SB},
- {I_ROL, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+18102, IF_386},
- {I_ROL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+18107, IF_386},
- {I_ROL, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+14114, IF_386|IF_SB},
- {I_ROL, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+18112, IF_X64},
- {I_ROL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+18117, IF_X64},
- {I_ROL, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+14120, IF_X64|IF_SB},
+ {I_ROL, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+21965, IF_8086},
+ {I_ROL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+21969, IF_8086},
+ {I_ROL, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+20629, IF_186},
+ {I_ROL, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+20634, IF_8086},
+ {I_ROL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+20639, IF_8086},
+ {I_ROL, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16693, IF_186},
+ {I_ROL, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+20644, IF_386},
+ {I_ROL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+20649, IF_386},
+ {I_ROL, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16699, IF_386},
+ {I_ROL, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+20654, IF_X64},
+ {I_ROL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+20659, IF_X64},
+ {I_ROL, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16705, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_ROR[] = {
- {I_ROR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+19516, IF_8086},
- {I_ROR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+19520, IF_8086},
- {I_ROR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+18122, IF_186|IF_SB},
- {I_ROR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+18127, IF_8086},
- {I_ROR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+18132, IF_8086},
- {I_ROR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+14126, IF_186|IF_SB},
- {I_ROR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+18137, IF_386},
- {I_ROR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+18142, IF_386},
- {I_ROR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+14132, IF_386|IF_SB},
- {I_ROR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+18147, IF_X64},
- {I_ROR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+18152, IF_X64},
- {I_ROR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+14138, IF_X64|IF_SB},
+ {I_ROR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+21973, IF_8086},
+ {I_ROR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+21977, IF_8086},
+ {I_ROR, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+20664, IF_186},
+ {I_ROR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+20669, IF_8086},
+ {I_ROR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+20674, IF_8086},
+ {I_ROR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16711, IF_186},
+ {I_ROR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+20679, IF_386},
+ {I_ROR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+20684, IF_386},
+ {I_ROR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16717, IF_386},
+ {I_ROR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+20689, IF_X64},
+ {I_ROR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+20694, IF_X64},
+ {I_ROR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16723, IF_X64},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_RORX[] = {
+ {I_RORX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7306, IF_FUTURE|IF_BMI2},
+ {I_RORX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7314, IF_LONG|IF_FUTURE|IF_BMI2},
ITEMPLATE_END
};
static const struct itemplate instrux_ROUNDPD[] = {
- {I_ROUNDPD, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5744, IF_SSE41},
+ {I_ROUNDPD, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4250, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_ROUNDPS[] = {
- {I_ROUNDPS, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5752, IF_SSE41},
+ {I_ROUNDPS, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4258, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_ROUNDSD[] = {
- {I_ROUNDSD, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5760, IF_SSE41},
+ {I_ROUNDSD, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4266, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_ROUNDSS[] = {
- {I_ROUNDSS, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5768, IF_SSE41},
+ {I_ROUNDSS, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4274, IF_SSE41},
ITEMPLATE_END
};
static const struct itemplate instrux_RSDC[] = {
- {I_RSDC, 2, {REG_SREG,MEMORY|BITS80,0,0,0}, nasm_bytecodes+15543, IF_486|IF_CYRIX|IF_SMM},
+ {I_RSDC, 2, {REG_SREG,MEMORY|BITS80,0,0,0}, nasm_bytecodes+18134, IF_486|IF_CYRIX|IF_SMM},
ITEMPLATE_END
};
static const struct itemplate instrux_RSLDT[] = {
- {I_RSLDT, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+18157, IF_486|IF_CYRIX|IF_SMM},
+ {I_RSLDT, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+20699, IF_486|IF_CYRIX|IF_SMM},
ITEMPLATE_END
};
static const struct itemplate instrux_RSM[] = {
- {I_RSM, 0, {0,0,0,0,0}, nasm_bytecodes+19524, IF_PENT|IF_SMM},
+ {I_RSM, 0, {0,0,0,0,0}, nasm_bytecodes+21981, IF_PENT|IF_SMM},
ITEMPLATE_END
};
static const struct itemplate instrux_RSQRTPS[] = {
- {I_RSQRTPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14648, IF_KATMAI|IF_SSE},
+ {I_RSQRTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17239, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_RSQRTSS[] = {
- {I_RSQRTSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14654, IF_KATMAI|IF_SSE},
+ {I_RSQRTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+17245, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_RSTS[] = {
- {I_RSTS, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+18162, IF_486|IF_CYRIX|IF_SMM},
+ {I_RSTS, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+20704, IF_486|IF_CYRIX|IF_SMM},
ITEMPLATE_END
};
static const struct itemplate instrux_SAHF[] = {
- {I_SAHF, 0, {0,0,0,0,0}, nasm_bytecodes+5213, IF_8086},
+ {I_SAHF, 0, {0,0,0,0,0}, nasm_bytecodes+3719, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_SAL[] = {
- {I_SAL, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+19528, IF_8086},
- {I_SAL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+19532, IF_8086},
- {I_SAL, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+18167, IF_186|IF_SB},
- {I_SAL, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+18172, IF_8086},
- {I_SAL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+18177, IF_8086},
- {I_SAL, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+14144, IF_186|IF_SB},
- {I_SAL, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+18182, IF_386},
- {I_SAL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+18187, IF_386},
- {I_SAL, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+14150, IF_386|IF_SB},
- {I_SAL, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+18192, IF_X64},
- {I_SAL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+18197, IF_X64},
- {I_SAL, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+14156, IF_X64|IF_SB},
+ {I_SAL, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+21985, IF_8086},
+ {I_SAL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+21989, IF_8086},
+ {I_SAL, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+20709, IF_186},
+ {I_SAL, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+20714, IF_8086},
+ {I_SAL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+20719, IF_8086},
+ {I_SAL, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16729, IF_186},
+ {I_SAL, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+20724, IF_386},
+ {I_SAL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+20729, IF_386},
+ {I_SAL, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16735, IF_386},
+ {I_SAL, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+20734, IF_X64},
+ {I_SAL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+20739, IF_X64},
+ {I_SAL, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16741, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_SALC[] = {
- {I_SALC, 0, {0,0,0,0,0}, nasm_bytecodes+19734, IF_8086|IF_UNDOC},
+ {I_SALC, 0, {0,0,0,0,0}, nasm_bytecodes+21126, IF_8086|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_SAR[] = {
- {I_SAR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+19536, IF_8086},
- {I_SAR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+19540, IF_8086},
- {I_SAR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+18202, IF_186|IF_SB},
- {I_SAR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+18207, IF_8086},
- {I_SAR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+18212, IF_8086},
- {I_SAR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+14162, IF_186|IF_SB},
- {I_SAR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+18217, IF_386},
- {I_SAR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+18222, IF_386},
- {I_SAR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+14168, IF_386|IF_SB},
- {I_SAR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+18227, IF_X64},
- {I_SAR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+18232, IF_X64},
- {I_SAR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+14174, IF_X64|IF_SB},
+ {I_SAR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+21993, IF_8086},
+ {I_SAR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+21997, IF_8086},
+ {I_SAR, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+20744, IF_186},
+ {I_SAR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+20749, IF_8086},
+ {I_SAR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+20754, IF_8086},
+ {I_SAR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16747, IF_186},
+ {I_SAR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+20759, IF_386},
+ {I_SAR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+20764, IF_386},
+ {I_SAR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16753, IF_386},
+ {I_SAR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+20769, IF_X64},
+ {I_SAR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+20774, IF_X64},
+ {I_SAR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16759, IF_X64},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SARX[] = {
+ {I_SARX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, nasm_bytecodes+15757, IF_FUTURE|IF_BMI2},
+ {I_SARX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, nasm_bytecodes+15764, IF_LONG|IF_FUTURE|IF_BMI2},
ITEMPLATE_END
};
static const struct itemplate instrux_SBB[] = {
- {I_SBB, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19544, IF_8086|IF_SM},
- {I_SBB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19544, IF_8086},
- {I_SBB, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18237, IF_8086|IF_SM},
- {I_SBB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18237, IF_8086},
- {I_SBB, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18242, IF_386|IF_SM},
- {I_SBB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18242, IF_386},
- {I_SBB, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18247, IF_X64|IF_SM},
- {I_SBB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18247, IF_X64},
- {I_SBB, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+8771, IF_8086|IF_SM},
- {I_SBB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+8771, IF_8086},
- {I_SBB, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+18252, IF_8086|IF_SM},
- {I_SBB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18252, IF_8086},
- {I_SBB, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+18257, IF_386|IF_SM},
- {I_SBB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18257, IF_386},
- {I_SBB, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+18262, IF_X64|IF_SM},
- {I_SBB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18262, IF_X64},
- {I_SBB, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+14180, IF_8086},
- {I_SBB, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+14186, IF_386},
- {I_SBB, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+14192, IF_X64},
- {I_SBB, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+19548, IF_8086|IF_SM},
- {I_SBB, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+14180, IF_8086|IF_SM},
- {I_SBB, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+18267, IF_8086|IF_SM},
- {I_SBB, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+14186, IF_386|IF_SM},
- {I_SBB, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+18272, IF_386|IF_SM},
- {I_SBB, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+14192, IF_X64|IF_SM},
- {I_SBB, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+18277, IF_X64|IF_SM},
- {I_SBB, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+18282, IF_8086|IF_SM},
- {I_SBB, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+14198, IF_8086|IF_SM},
- {I_SBB, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+14204, IF_386|IF_SM},
- {I_SBB, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+14210, IF_X64|IF_SM},
- {I_SBB, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+18282, IF_8086|IF_SM},
- {I_SBB, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+14198, IF_8086|IF_SM},
- {I_SBB, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+14204, IF_386|IF_SM},
+ {I_SBB, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+20779, IF_8086|IF_SM|IF_LOCK},
+ {I_SBB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+20780, IF_8086},
+ {I_SBB, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16765, IF_8086|IF_SM|IF_LOCK},
+ {I_SBB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16766, IF_8086},
+ {I_SBB, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16771, IF_386|IF_SM|IF_LOCK},
+ {I_SBB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16772, IF_386},
+ {I_SBB, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16777, IF_X64|IF_SM|IF_LOCK},
+ {I_SBB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16778, IF_X64},
+ {I_SBB, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+9523, IF_8086|IF_SM},
+ {I_SBB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+9523, IF_8086},
+ {I_SBB, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+20784, IF_8086|IF_SM},
+ {I_SBB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+20784, IF_8086},
+ {I_SBB, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+20789, IF_386|IF_SM},
+ {I_SBB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+20789, IF_386},
+ {I_SBB, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+20794, IF_X64|IF_SM},
+ {I_SBB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+20794, IF_X64},
+ {I_SBB, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+8036, IF_8086|IF_LOCK},
+ {I_SBB, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+8043, IF_386|IF_LOCK},
+ {I_SBB, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+8050, IF_X64|IF_LOCK},
+ {I_SBB, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+22001, IF_8086|IF_SM},
+ {I_SBB, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+8037, IF_8086|IF_SM},
+ {I_SBB, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+20799, IF_8086|IF_SM},
+ {I_SBB, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+8044, IF_386|IF_SM},
+ {I_SBB, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+20804, IF_386|IF_SM},
+ {I_SBB, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+8051, IF_X64|IF_SM},
+ {I_SBB, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+20809, IF_X64|IF_SM},
+ {I_SBB, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+16783, IF_8086|IF_SM|IF_LOCK},
+ {I_SBB, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+8057, IF_8086|IF_SM|IF_LOCK},
+ {I_SBB, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+8064, IF_386|IF_SM|IF_LOCK},
+ {I_SBB, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+8071, IF_X64|IF_SM|IF_LOCK},
+ {I_SBB, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16783, IF_8086|IF_SM|IF_LOCK},
+ {I_SBB, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+8057, IF_8086|IF_SM|IF_LOCK},
+ {I_SBB, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+8064, IF_386|IF_SM|IF_LOCK},
+ {I_SBB, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+16789, IF_8086|IF_SM|IF_LOCK|IF_NOLONG},
ITEMPLATE_END
};
static const struct itemplate instrux_SCASB[] = {
- {I_SCASB, 0, {0,0,0,0,0}, nasm_bytecodes+19552, IF_8086},
+ {I_SCASB, 0, {0,0,0,0,0}, nasm_bytecodes+22005, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_SCASD[] = {
- {I_SCASD, 0, {0,0,0,0,0}, nasm_bytecodes+18287, IF_386},
+ {I_SCASD, 0, {0,0,0,0,0}, nasm_bytecodes+20814, IF_386},
ITEMPLATE_END
};
static const struct itemplate instrux_SCASQ[] = {
- {I_SCASQ, 0, {0,0,0,0,0}, nasm_bytecodes+18292, IF_X64},
+ {I_SCASQ, 0, {0,0,0,0,0}, nasm_bytecodes+20819, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_SCASW[] = {
- {I_SCASW, 0, {0,0,0,0,0}, nasm_bytecodes+18297, IF_8086},
+ {I_SCASW, 0, {0,0,0,0,0}, nasm_bytecodes+20824, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_SFENCE[] = {
- {I_SFENCE, 0, {0,0,0,0,0}, nasm_bytecodes+18302, IF_X64|IF_AMD},
- {I_SFENCE, 0, {0,0,0,0,0}, nasm_bytecodes+18302, IF_KATMAI},
+ {I_SFENCE, 0, {0,0,0,0,0}, nasm_bytecodes+20829, IF_X64|IF_AMD},
+ {I_SFENCE, 0, {0,0,0,0,0}, nasm_bytecodes+20829, IF_KATMAI},
ITEMPLATE_END
};
static const struct itemplate instrux_SGDT[] = {
- {I_SGDT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18307, IF_286},
+ {I_SGDT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20834, IF_286},
ITEMPLATE_END
};
static const struct itemplate instrux_SHL[] = {
- {I_SHL, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+19528, IF_8086},
- {I_SHL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+19532, IF_8086},
- {I_SHL, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+18167, IF_186|IF_SB},
- {I_SHL, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+18172, IF_8086},
- {I_SHL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+18177, IF_8086},
- {I_SHL, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+14144, IF_186|IF_SB},
- {I_SHL, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+18182, IF_386},
- {I_SHL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+18187, IF_386},
- {I_SHL, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+14150, IF_386|IF_SB},
- {I_SHL, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+18192, IF_X64},
- {I_SHL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+18197, IF_X64},
- {I_SHL, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+14156, IF_X64|IF_SB},
+ {I_SHL, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+21985, IF_8086},
+ {I_SHL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+21989, IF_8086},
+ {I_SHL, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+20709, IF_186},
+ {I_SHL, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+20714, IF_8086},
+ {I_SHL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+20719, IF_8086},
+ {I_SHL, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16729, IF_186},
+ {I_SHL, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+20724, IF_386},
+ {I_SHL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+20729, IF_386},
+ {I_SHL, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16735, IF_386},
+ {I_SHL, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+20734, IF_X64},
+ {I_SHL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+20739, IF_X64},
+ {I_SHL, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16741, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_SHLD[] = {
- {I_SHLD, 3, {MEMORY,REG_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+7431, IF_386|IF_SM2|IF_SB|IF_AR2},
- {I_SHLD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+7431, IF_386|IF_SM2|IF_SB|IF_AR2},
- {I_SHLD, 3, {MEMORY,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+7438, IF_386|IF_SM2|IF_SB|IF_AR2},
- {I_SHLD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+7438, IF_386|IF_SM2|IF_SB|IF_AR2},
- {I_SHLD, 3, {MEMORY,REG_GPR|BITS64,IMMEDIATE,0,0}, nasm_bytecodes+7445, IF_X64|IF_SM2|IF_SB|IF_AR2},
- {I_SHLD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE,0,0}, nasm_bytecodes+7445, IF_X64|IF_SM2|IF_SB|IF_AR2},
- {I_SHLD, 3, {MEMORY,REG_GPR|BITS16,REG_CL,0,0}, nasm_bytecodes+14216, IF_386|IF_SM},
- {I_SHLD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,REG_CL,0,0}, nasm_bytecodes+14216, IF_386},
- {I_SHLD, 3, {MEMORY,REG_GPR|BITS32,REG_CL,0,0}, nasm_bytecodes+14222, IF_386|IF_SM},
- {I_SHLD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,REG_CL,0,0}, nasm_bytecodes+14222, IF_386},
- {I_SHLD, 3, {MEMORY,REG_GPR|BITS64,REG_CL,0,0}, nasm_bytecodes+14228, IF_X64|IF_SM},
- {I_SHLD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,REG_CL,0,0}, nasm_bytecodes+14228, IF_X64},
+ {I_SHLD, 3, {MEMORY,REG_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+8078, IF_386|IF_SM2|IF_SB|IF_AR2},
+ {I_SHLD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+8078, IF_386|IF_SM2|IF_SB|IF_AR2},
+ {I_SHLD, 3, {MEMORY,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+8085, IF_386|IF_SM2|IF_SB|IF_AR2},
+ {I_SHLD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+8085, IF_386|IF_SM2|IF_SB|IF_AR2},
+ {I_SHLD, 3, {MEMORY,REG_GPR|BITS64,IMMEDIATE,0,0}, nasm_bytecodes+8092, IF_X64|IF_SM2|IF_SB|IF_AR2},
+ {I_SHLD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE,0,0}, nasm_bytecodes+8092, IF_X64|IF_SM2|IF_SB|IF_AR2},
+ {I_SHLD, 3, {MEMORY,REG_GPR|BITS16,REG_CL,0,0}, nasm_bytecodes+16795, IF_386|IF_SM},
+ {I_SHLD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,REG_CL,0,0}, nasm_bytecodes+16795, IF_386},
+ {I_SHLD, 3, {MEMORY,REG_GPR|BITS32,REG_CL,0,0}, nasm_bytecodes+16801, IF_386|IF_SM},
+ {I_SHLD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,REG_CL,0,0}, nasm_bytecodes+16801, IF_386},
+ {I_SHLD, 3, {MEMORY,REG_GPR|BITS64,REG_CL,0,0}, nasm_bytecodes+16807, IF_X64|IF_SM},
+ {I_SHLD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,REG_CL,0,0}, nasm_bytecodes+16807, IF_X64},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SHLX[] = {
+ {I_SHLX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, nasm_bytecodes+15771, IF_FUTURE|IF_BMI2},
+ {I_SHLX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, nasm_bytecodes+15778, IF_LONG|IF_FUTURE|IF_BMI2},
ITEMPLATE_END
};
static const struct itemplate instrux_SHR[] = {
- {I_SHR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+19556, IF_8086},
- {I_SHR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+19560, IF_8086},
- {I_SHR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+18312, IF_186|IF_SB},
- {I_SHR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+18317, IF_8086},
- {I_SHR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+18322, IF_8086},
- {I_SHR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+14234, IF_186|IF_SB},
- {I_SHR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+18327, IF_386},
- {I_SHR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+18332, IF_386},
- {I_SHR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+14240, IF_386|IF_SB},
- {I_SHR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+18337, IF_X64},
- {I_SHR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+18342, IF_X64},
- {I_SHR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+14246, IF_X64|IF_SB},
+ {I_SHR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+22009, IF_8086},
+ {I_SHR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+22013, IF_8086},
+ {I_SHR, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+20839, IF_186},
+ {I_SHR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+20844, IF_8086},
+ {I_SHR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+20849, IF_8086},
+ {I_SHR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16813, IF_186},
+ {I_SHR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+20854, IF_386},
+ {I_SHR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+20859, IF_386},
+ {I_SHR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16819, IF_386},
+ {I_SHR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+20864, IF_X64},
+ {I_SHR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+20869, IF_X64},
+ {I_SHR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16825, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_SHRD[] = {
- {I_SHRD, 3, {MEMORY,REG_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+7452, IF_386|IF_SM2|IF_SB|IF_AR2},
- {I_SHRD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+7452, IF_386|IF_SM2|IF_SB|IF_AR2},
- {I_SHRD, 3, {MEMORY,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+7459, IF_386|IF_SM2|IF_SB|IF_AR2},
- {I_SHRD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+7459, IF_386|IF_SM2|IF_SB|IF_AR2},
- {I_SHRD, 3, {MEMORY,REG_GPR|BITS64,IMMEDIATE,0,0}, nasm_bytecodes+7466, IF_X64|IF_SM2|IF_SB|IF_AR2},
- {I_SHRD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE,0,0}, nasm_bytecodes+7466, IF_X64|IF_SM2|IF_SB|IF_AR2},
- {I_SHRD, 3, {MEMORY,REG_GPR|BITS16,REG_CL,0,0}, nasm_bytecodes+14252, IF_386|IF_SM},
- {I_SHRD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,REG_CL,0,0}, nasm_bytecodes+14252, IF_386},
- {I_SHRD, 3, {MEMORY,REG_GPR|BITS32,REG_CL,0,0}, nasm_bytecodes+14258, IF_386|IF_SM},
- {I_SHRD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,REG_CL,0,0}, nasm_bytecodes+14258, IF_386},
- {I_SHRD, 3, {MEMORY,REG_GPR|BITS64,REG_CL,0,0}, nasm_bytecodes+14264, IF_X64|IF_SM},
- {I_SHRD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,REG_CL,0,0}, nasm_bytecodes+14264, IF_X64},
+ {I_SHRD, 3, {MEMORY,REG_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+8099, IF_386|IF_SM2|IF_SB|IF_AR2},
+ {I_SHRD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+8099, IF_386|IF_SM2|IF_SB|IF_AR2},
+ {I_SHRD, 3, {MEMORY,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+8106, IF_386|IF_SM2|IF_SB|IF_AR2},
+ {I_SHRD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+8106, IF_386|IF_SM2|IF_SB|IF_AR2},
+ {I_SHRD, 3, {MEMORY,REG_GPR|BITS64,IMMEDIATE,0,0}, nasm_bytecodes+8113, IF_X64|IF_SM2|IF_SB|IF_AR2},
+ {I_SHRD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE,0,0}, nasm_bytecodes+8113, IF_X64|IF_SM2|IF_SB|IF_AR2},
+ {I_SHRD, 3, {MEMORY,REG_GPR|BITS16,REG_CL,0,0}, nasm_bytecodes+16831, IF_386|IF_SM},
+ {I_SHRD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,REG_CL,0,0}, nasm_bytecodes+16831, IF_386},
+ {I_SHRD, 3, {MEMORY,REG_GPR|BITS32,REG_CL,0,0}, nasm_bytecodes+16837, IF_386|IF_SM},
+ {I_SHRD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,REG_CL,0,0}, nasm_bytecodes+16837, IF_386},
+ {I_SHRD, 3, {MEMORY,REG_GPR|BITS64,REG_CL,0,0}, nasm_bytecodes+16843, IF_X64|IF_SM},
+ {I_SHRD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,REG_CL,0,0}, nasm_bytecodes+16843, IF_X64},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_SHRX[] = {
+ {I_SHRX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, nasm_bytecodes+15785, IF_FUTURE|IF_BMI2},
+ {I_SHRX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, nasm_bytecodes+15792, IF_LONG|IF_FUTURE|IF_BMI2},
ITEMPLATE_END
};
static const struct itemplate instrux_SHUFPD[] = {
- {I_SHUFPD, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+7865, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
- {I_SHUFPD, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+7865, IF_WILLAMETTE|IF_SSE2|IF_SM|IF_SB|IF_AR2},
+ {I_SHUFPD, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+8617, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
+ {I_SHUFPD, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+8617, IF_WILLAMETTE|IF_SSE2|IF_SM|IF_SB|IF_AR2},
ITEMPLATE_END
};
static const struct itemplate instrux_SHUFPS[] = {
- {I_SHUFPS, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+7592, IF_KATMAI|IF_SSE|IF_SB|IF_AR2},
- {I_SHUFPS, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+7592, IF_KATMAI|IF_SSE|IF_SB|IF_AR2},
+ {I_SHUFPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+8344, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_SIDT[] = {
- {I_SIDT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18347, IF_286},
+ {I_SIDT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20874, IF_286},
ITEMPLATE_END
};
static const struct itemplate instrux_SKINIT[] = {
- {I_SKINIT, 0, {0,0,0,0,0}, nasm_bytecodes+18352, IF_X64},
+ {I_SKINIT, 0, {0,0,0,0,0}, nasm_bytecodes+20879, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_SLDT[] = {
- {I_SLDT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14289, IF_286},
- {I_SLDT, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+14289, IF_286},
- {I_SLDT, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+14270, IF_286},
- {I_SLDT, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+14276, IF_386},
- {I_SLDT, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+14282, IF_X64},
- {I_SLDT, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+14288, IF_X64},
+ {I_SLDT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+16868, IF_286},
+ {I_SLDT, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+16868, IF_286},
+ {I_SLDT, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16849, IF_286},
+ {I_SLDT, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16855, IF_386},
+ {I_SLDT, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16861, IF_X64},
+ {I_SLDT, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16867, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_SLWPCB[] = {
- {I_SLWPCB, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+12576, IF_AMD|IF_386},
- {I_SLWPCB, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+12583, IF_AMD|IF_X64},
+ {I_SLWPCB, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+13356, IF_AMD|IF_386},
+ {I_SLWPCB, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+13363, IF_AMD|IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_SMI[] = {
- {I_SMI, 0, {0,0,0,0,0}, nasm_bytecodes+19704, IF_386|IF_UNDOC},
+ {I_SMI, 0, {0,0,0,0,0}, nasm_bytecodes+22141, IF_386|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_SMINT[] = {
- {I_SMINT, 0, {0,0,0,0,0}, nasm_bytecodes+19564, IF_P6|IF_CYRIX},
+ {I_SMINT, 0, {0,0,0,0,0}, nasm_bytecodes+22017, IF_P6|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_SMINTOLD[] = {
- {I_SMINTOLD, 0, {0,0,0,0,0}, nasm_bytecodes+19568, IF_486|IF_CYRIX},
+ {I_SMINTOLD, 0, {0,0,0,0,0}, nasm_bytecodes+22021, IF_486|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_SMSW[] = {
- {I_SMSW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14301, IF_286},
- {I_SMSW, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+14301, IF_286},
- {I_SMSW, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+14294, IF_286},
- {I_SMSW, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+14300, IF_386},
+ {I_SMSW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+16880, IF_286},
+ {I_SMSW, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+16880, IF_286},
+ {I_SMSW, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16873, IF_286},
+ {I_SMSW, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16879, IF_386},
ITEMPLATE_END
};
static const struct itemplate instrux_SQRTPD[] = {
- {I_SQRTPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15416, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_SQRTPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18007, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_SQRTPS[] = {
- {I_SQRTPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14660, IF_KATMAI|IF_SSE},
+ {I_SQRTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17251, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_SQRTSD[] = {
- {I_SQRTSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15422, IF_WILLAMETTE|IF_SSE2},
+ {I_SQRTSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18013, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_SQRTSS[] = {
- {I_SQRTSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14666, IF_KATMAI|IF_SSE},
+ {I_SQRTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+17257, IF_KATMAI|IF_SSE},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_STAC[] = {
+ {I_STAC, 0, {0,0,0,0,0}, nasm_bytecodes+21104, IF_PRIV|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_STC[] = {
- {I_STC, 0, {0,0,0,0,0}, nasm_bytecodes+18084, IF_8086},
+ {I_STC, 0, {0,0,0,0,0}, nasm_bytecodes+20626, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_STD[] = {
- {I_STD, 0, {0,0,0,0,0}, nasm_bytecodes+19737, IF_8086},
+ {I_STD, 0, {0,0,0,0,0}, nasm_bytecodes+22168, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_STGI[] = {
- {I_STGI, 0, {0,0,0,0,0}, nasm_bytecodes+18357, IF_X64},
+ {I_STGI, 0, {0,0,0,0,0}, nasm_bytecodes+20884, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_STI[] = {
- {I_STI, 0, {0,0,0,0,0}, nasm_bytecodes+19740, IF_8086},
+ {I_STI, 0, {0,0,0,0,0}, nasm_bytecodes+22171, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_STMXCSR[] = {
- {I_STMXCSR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+12543, IF_KATMAI|IF_SSE|IF_SD},
+ {I_STMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+13323, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_STOSB[] = {
- {I_STOSB, 0, {0,0,0,0,0}, nasm_bytecodes+5317, IF_8086},
+ {I_STOSB, 0, {0,0,0,0,0}, nasm_bytecodes+3823, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_STOSD[] = {
- {I_STOSD, 0, {0,0,0,0,0}, nasm_bytecodes+19572, IF_386},
+ {I_STOSD, 0, {0,0,0,0,0}, nasm_bytecodes+22025, IF_386},
ITEMPLATE_END
};
static const struct itemplate instrux_STOSQ[] = {
- {I_STOSQ, 0, {0,0,0,0,0}, nasm_bytecodes+19576, IF_X64},
+ {I_STOSQ, 0, {0,0,0,0,0}, nasm_bytecodes+22029, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_STOSW[] = {
- {I_STOSW, 0, {0,0,0,0,0}, nasm_bytecodes+19580, IF_8086},
+ {I_STOSW, 0, {0,0,0,0,0}, nasm_bytecodes+22033, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_STR[] = {
- {I_STR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14319, IF_286|IF_PROT},
- {I_STR, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+14319, IF_286|IF_PROT},
- {I_STR, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+14306, IF_286|IF_PROT},
- {I_STR, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+14312, IF_386|IF_PROT},
- {I_STR, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+14318, IF_X64},
+ {I_STR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+16898, IF_286|IF_PROT},
+ {I_STR, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+16898, IF_286|IF_PROT},
+ {I_STR, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16885, IF_286|IF_PROT},
+ {I_STR, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16891, IF_386|IF_PROT},
+ {I_STR, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16897, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_SUB[] = {
- {I_SUB, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19584, IF_8086|IF_SM},
- {I_SUB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19584, IF_8086},
- {I_SUB, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18362, IF_8086|IF_SM},
- {I_SUB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18362, IF_8086},
- {I_SUB, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18367, IF_386|IF_SM},
- {I_SUB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18367, IF_386},
- {I_SUB, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18372, IF_X64|IF_SM},
- {I_SUB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18372, IF_X64},
- {I_SUB, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+9786, IF_8086|IF_SM},
- {I_SUB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+9786, IF_8086},
- {I_SUB, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+18377, IF_8086|IF_SM},
- {I_SUB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18377, IF_8086},
- {I_SUB, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+18382, IF_386|IF_SM},
- {I_SUB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18382, IF_386},
- {I_SUB, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+18387, IF_X64|IF_SM},
- {I_SUB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18387, IF_X64},
- {I_SUB, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+14324, IF_8086},
- {I_SUB, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+14330, IF_386},
- {I_SUB, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+14336, IF_X64},
- {I_SUB, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+19588, IF_8086|IF_SM},
- {I_SUB, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+14324, IF_8086|IF_SM},
- {I_SUB, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+18392, IF_8086|IF_SM},
- {I_SUB, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+14330, IF_386|IF_SM},
- {I_SUB, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+18397, IF_386|IF_SM},
- {I_SUB, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+14336, IF_X64|IF_SM},
- {I_SUB, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+18402, IF_X64|IF_SM},
- {I_SUB, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+18407, IF_8086|IF_SM},
- {I_SUB, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+14342, IF_8086|IF_SM},
- {I_SUB, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+14348, IF_386|IF_SM},
- {I_SUB, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+14354, IF_X64|IF_SM},
- {I_SUB, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+18407, IF_8086|IF_SM},
- {I_SUB, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+14342, IF_8086|IF_SM},
- {I_SUB, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+14348, IF_386|IF_SM},
+ {I_SUB, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+20889, IF_8086|IF_SM|IF_LOCK},
+ {I_SUB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+20890, IF_8086},
+ {I_SUB, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16903, IF_8086|IF_SM|IF_LOCK},
+ {I_SUB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16904, IF_8086},
+ {I_SUB, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16909, IF_386|IF_SM|IF_LOCK},
+ {I_SUB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16910, IF_386},
+ {I_SUB, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16915, IF_X64|IF_SM|IF_LOCK},
+ {I_SUB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16916, IF_X64},
+ {I_SUB, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+15263, IF_8086|IF_SM},
+ {I_SUB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+15263, IF_8086},
+ {I_SUB, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+20894, IF_8086|IF_SM},
+ {I_SUB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+20894, IF_8086},
+ {I_SUB, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+20899, IF_386|IF_SM},
+ {I_SUB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+20899, IF_386},
+ {I_SUB, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+20904, IF_X64|IF_SM},
+ {I_SUB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+20904, IF_X64},
+ {I_SUB, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+8120, IF_8086|IF_LOCK},
+ {I_SUB, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+8127, IF_386|IF_LOCK},
+ {I_SUB, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+8134, IF_X64|IF_LOCK},
+ {I_SUB, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+22037, IF_8086|IF_SM},
+ {I_SUB, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+8121, IF_8086|IF_SM},
+ {I_SUB, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+20909, IF_8086|IF_SM},
+ {I_SUB, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+8128, IF_386|IF_SM},
+ {I_SUB, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+20914, IF_386|IF_SM},
+ {I_SUB, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+8135, IF_X64|IF_SM},
+ {I_SUB, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+20919, IF_X64|IF_SM},
+ {I_SUB, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+16921, IF_8086|IF_SM|IF_LOCK},
+ {I_SUB, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+8141, IF_8086|IF_SM|IF_LOCK},
+ {I_SUB, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+8148, IF_386|IF_SM|IF_LOCK},
+ {I_SUB, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+8155, IF_X64|IF_SM|IF_LOCK},
+ {I_SUB, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16921, IF_8086|IF_SM|IF_LOCK},
+ {I_SUB, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+8141, IF_8086|IF_SM|IF_LOCK},
+ {I_SUB, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+8148, IF_386|IF_SM|IF_LOCK},
+ {I_SUB, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+16927, IF_8086|IF_SM|IF_LOCK|IF_NOLONG},
ITEMPLATE_END
};
static const struct itemplate instrux_SUBPD[] = {
- {I_SUBPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15428, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_SUBPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18019, IF_WILLAMETTE|IF_SSE2|IF_SO},
ITEMPLATE_END
};
static const struct itemplate instrux_SUBPS[] = {
- {I_SUBPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14672, IF_KATMAI|IF_SSE},
+ {I_SUBPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17263, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_SUBSD[] = {
- {I_SUBSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15434, IF_WILLAMETTE|IF_SSE2},
+ {I_SUBSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18025, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_SUBSS[] = {
- {I_SUBSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14678, IF_KATMAI|IF_SSE},
+ {I_SUBSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+17269, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_SVDC[] = {
- {I_SVDC, 2, {MEMORY|BITS80,REG_SREG,0,0,0}, nasm_bytecodes+7874, IF_486|IF_CYRIX|IF_SMM},
+ {I_SVDC, 2, {MEMORY|BITS80,REG_SREG,0,0,0}, nasm_bytecodes+8626, IF_486|IF_CYRIX|IF_SMM},
ITEMPLATE_END
};
static const struct itemplate instrux_SVLDT[] = {
- {I_SVLDT, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+18412, IF_486|IF_CYRIX|IF_SMM},
+ {I_SVLDT, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+20924, IF_486|IF_CYRIX|IF_SMM},
ITEMPLATE_END
};
static const struct itemplate instrux_SVTS[] = {
- {I_SVTS, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+18417, IF_486|IF_CYRIX|IF_SMM},
+ {I_SVTS, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+20929, IF_486|IF_CYRIX|IF_SMM},
ITEMPLATE_END
};
static const struct itemplate instrux_SWAPGS[] = {
- {I_SWAPGS, 0, {0,0,0,0,0}, nasm_bytecodes+18422, IF_X64},
+ {I_SWAPGS, 0, {0,0,0,0,0}, nasm_bytecodes+20934, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_SYSCALL[] = {
- {I_SYSCALL, 0, {0,0,0,0,0}, nasm_bytecodes+19292, IF_P6|IF_AMD},
+ {I_SYSCALL, 0, {0,0,0,0,0}, nasm_bytecodes+21769, IF_P6|IF_AMD},
ITEMPLATE_END
};
static const struct itemplate instrux_SYSENTER[] = {
- {I_SYSENTER, 0, {0,0,0,0,0}, nasm_bytecodes+19592, IF_P6},
+ {I_SYSENTER, 0, {0,0,0,0,0}, nasm_bytecodes+22041, IF_P6},
ITEMPLATE_END
};
static const struct itemplate instrux_SYSEXIT[] = {
- {I_SYSEXIT, 0, {0,0,0,0,0}, nasm_bytecodes+19596, IF_P6|IF_PRIV},
+ {I_SYSEXIT, 0, {0,0,0,0,0}, nasm_bytecodes+22045, IF_P6|IF_PRIV},
ITEMPLATE_END
};
static const struct itemplate instrux_SYSRET[] = {
- {I_SYSRET, 0, {0,0,0,0,0}, nasm_bytecodes+19288, IF_P6|IF_PRIV|IF_AMD},
+ {I_SYSRET, 0, {0,0,0,0,0}, nasm_bytecodes+21765, IF_P6|IF_PRIV|IF_AMD},
ITEMPLATE_END
};
static const struct itemplate instrux_TEST[] = {
- {I_TEST, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19600, IF_8086|IF_SM},
- {I_TEST, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19600, IF_8086},
- {I_TEST, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18427, IF_8086|IF_SM},
- {I_TEST, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18427, IF_8086},
- {I_TEST, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18432, IF_386|IF_SM},
- {I_TEST, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18432, IF_386},
- {I_TEST, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18437, IF_X64|IF_SM},
- {I_TEST, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18437, IF_X64},
- {I_TEST, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+19604, IF_8086|IF_SM},
- {I_TEST, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+18442, IF_8086|IF_SM},
- {I_TEST, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+18447, IF_386|IF_SM},
- {I_TEST, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+18452, IF_X64|IF_SM},
- {I_TEST, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+19608, IF_8086|IF_SM},
- {I_TEST, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+18457, IF_8086|IF_SM},
- {I_TEST, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+18462, IF_386|IF_SM},
- {I_TEST, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+18467, IF_X64|IF_SM},
- {I_TEST, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+18472, IF_8086|IF_SM},
- {I_TEST, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+14360, IF_8086|IF_SM},
- {I_TEST, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+14366, IF_386|IF_SM},
- {I_TEST, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+14372, IF_X64|IF_SM},
- {I_TEST, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+18472, IF_8086|IF_SM},
- {I_TEST, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+14360, IF_8086|IF_SM},
- {I_TEST, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+14366, IF_386|IF_SM},
+ {I_TEST, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+22049, IF_8086|IF_SM},
+ {I_TEST, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+22049, IF_8086},
+ {I_TEST, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+20939, IF_8086|IF_SM},
+ {I_TEST, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+20939, IF_8086},
+ {I_TEST, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+20944, IF_386|IF_SM},
+ {I_TEST, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+20944, IF_386},
+ {I_TEST, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+20949, IF_X64|IF_SM},
+ {I_TEST, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+20949, IF_X64},
+ {I_TEST, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+22053, IF_8086|IF_SM},
+ {I_TEST, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+20954, IF_8086|IF_SM},
+ {I_TEST, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+20959, IF_386|IF_SM},
+ {I_TEST, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+20964, IF_X64|IF_SM},
+ {I_TEST, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+22057, IF_8086|IF_SM},
+ {I_TEST, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+20969, IF_8086|IF_SM},
+ {I_TEST, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+20974, IF_386|IF_SM},
+ {I_TEST, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+20979, IF_X64|IF_SM},
+ {I_TEST, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+20984, IF_8086|IF_SM},
+ {I_TEST, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+16933, IF_8086|IF_SM},
+ {I_TEST, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+16939, IF_386|IF_SM},
+ {I_TEST, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+16945, IF_X64|IF_SM},
+ {I_TEST, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+20984, IF_8086|IF_SM},
+ {I_TEST, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+16933, IF_8086|IF_SM},
+ {I_TEST, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+16939, IF_386|IF_SM},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_TZCNT[] = {
+ {I_TZCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+15610, IF_FUTURE|IF_BMI1},
+ {I_TZCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+15617, IF_FUTURE|IF_BMI1},
+ {I_TZCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+15624, IF_LONG|IF_FUTURE|IF_BMI1},
ITEMPLATE_END
};
static const struct itemplate instrux_UCOMISD[] = {
- {I_UCOMISD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15440, IF_WILLAMETTE|IF_SSE2},
+ {I_UCOMISD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18031, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_UCOMISS[] = {
- {I_UCOMISS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14684, IF_KATMAI|IF_SSE},
+ {I_UCOMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+17275, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_UD0[] = {
- {I_UD0, 0, {0,0,0,0,0}, nasm_bytecodes+19612, IF_186|IF_UNDOC},
+ {I_UD0, 0, {0,0,0,0,0}, nasm_bytecodes+22061, IF_186|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_UD1[] = {
- {I_UD1, 0, {0,0,0,0,0}, nasm_bytecodes+19616, IF_186|IF_UNDOC},
+ {I_UD1, 0, {0,0,0,0,0}, nasm_bytecodes+22065, IF_186|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_UD2[] = {
- {I_UD2, 0, {0,0,0,0,0}, nasm_bytecodes+19620, IF_186},
+ {I_UD2, 0, {0,0,0,0,0}, nasm_bytecodes+22069, IF_186},
ITEMPLATE_END
};
static const struct itemplate instrux_UD2A[] = {
- {I_UD2A, 0, {0,0,0,0,0}, nasm_bytecodes+19620, IF_186},
+ {I_UD2A, 0, {0,0,0,0,0}, nasm_bytecodes+22069, IF_186},
ITEMPLATE_END
};
static const struct itemplate instrux_UD2B[] = {
- {I_UD2B, 0, {0,0,0,0,0}, nasm_bytecodes+19616, IF_186|IF_UNDOC},
+ {I_UD2B, 0, {0,0,0,0,0}, nasm_bytecodes+22065, IF_186|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_UMOV[] = {
- {I_UMOV, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+14378, IF_386|IF_UNDOC|IF_SM},
- {I_UMOV, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+14378, IF_386|IF_UNDOC},
- {I_UMOV, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+7473, IF_386|IF_UNDOC|IF_SM},
- {I_UMOV, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+7473, IF_386|IF_UNDOC},
- {I_UMOV, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7480, IF_386|IF_UNDOC|IF_SM},
- {I_UMOV, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7480, IF_386|IF_UNDOC},
- {I_UMOV, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+14384, IF_386|IF_UNDOC|IF_SM},
- {I_UMOV, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+14384, IF_386|IF_UNDOC},
- {I_UMOV, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+7487, IF_386|IF_UNDOC|IF_SM},
- {I_UMOV, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+7487, IF_386|IF_UNDOC},
- {I_UMOV, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+7494, IF_386|IF_UNDOC|IF_SM},
- {I_UMOV, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7494, IF_386|IF_UNDOC},
+ {I_UMOV, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+16951, IF_386|IF_UNDOC|IF_SM},
+ {I_UMOV, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+16951, IF_386|IF_UNDOC},
+ {I_UMOV, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+8162, IF_386|IF_UNDOC|IF_SM},
+ {I_UMOV, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+8162, IF_386|IF_UNDOC},
+ {I_UMOV, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+8169, IF_386|IF_UNDOC|IF_SM},
+ {I_UMOV, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+8169, IF_386|IF_UNDOC},
+ {I_UMOV, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+16957, IF_386|IF_UNDOC|IF_SM},
+ {I_UMOV, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+16957, IF_386|IF_UNDOC},
+ {I_UMOV, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+8176, IF_386|IF_UNDOC|IF_SM},
+ {I_UMOV, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+8176, IF_386|IF_UNDOC},
+ {I_UMOV, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+8183, IF_386|IF_UNDOC|IF_SM},
+ {I_UMOV, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+8183, IF_386|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_UNPCKHPD[] = {
- {I_UNPCKHPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15446, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_UNPCKHPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+18037, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_UNPCKHPS[] = {
- {I_UNPCKHPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14690, IF_KATMAI|IF_SSE},
+ {I_UNPCKHPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17281, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_UNPCKLPD[] = {
- {I_UNPCKLPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15452, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_UNPCKLPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+18043, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_UNPCKLPS[] = {
- {I_UNPCKLPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14696, IF_KATMAI|IF_SSE},
+ {I_UNPCKLPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17287, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_VADDPD[] = {
- {I_VADDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+8495, IF_AVX|IF_SANDYBRIDGE},
- {I_VADDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8502, IF_AVX|IF_SANDYBRIDGE},
- {I_VADDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+8509, IF_AVX|IF_SANDYBRIDGE},
- {I_VADDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+8516, IF_AVX|IF_SANDYBRIDGE},
+ {I_VADDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9247, IF_AVX|IF_SANDYBRIDGE},
+ {I_VADDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9254, IF_AVX|IF_SANDYBRIDGE},
+ {I_VADDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9261, IF_AVX|IF_SANDYBRIDGE},
+ {I_VADDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9268, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VADDPS[] = {
- {I_VADDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+8523, IF_AVX|IF_SANDYBRIDGE},
- {I_VADDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8530, IF_AVX|IF_SANDYBRIDGE},
- {I_VADDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+8537, IF_AVX|IF_SANDYBRIDGE},
- {I_VADDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+8544, IF_AVX|IF_SANDYBRIDGE},
+ {I_VADDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9275, IF_AVX|IF_SANDYBRIDGE},
+ {I_VADDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9282, IF_AVX|IF_SANDYBRIDGE},
+ {I_VADDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9289, IF_AVX|IF_SANDYBRIDGE},
+ {I_VADDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9296, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VADDSD[] = {
- {I_VADDSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+8551, IF_AVX|IF_SANDYBRIDGE},
- {I_VADDSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+8558, IF_AVX|IF_SANDYBRIDGE},
+ {I_VADDSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+9303, IF_AVX|IF_SANDYBRIDGE},
+ {I_VADDSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9310, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VADDSS[] = {
- {I_VADDSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+8565, IF_AVX|IF_SANDYBRIDGE},
- {I_VADDSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+8572, IF_AVX|IF_SANDYBRIDGE},
+ {I_VADDSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+9317, IF_AVX|IF_SANDYBRIDGE},
+ {I_VADDSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9324, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VADDSUBPD[] = {
- {I_VADDSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+8579, IF_AVX|IF_SANDYBRIDGE},
- {I_VADDSUBPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8586, IF_AVX|IF_SANDYBRIDGE},
- {I_VADDSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+8593, IF_AVX|IF_SANDYBRIDGE},
- {I_VADDSUBPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+8600, IF_AVX|IF_SANDYBRIDGE},
+ {I_VADDSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9331, IF_AVX|IF_SANDYBRIDGE},
+ {I_VADDSUBPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9338, IF_AVX|IF_SANDYBRIDGE},
+ {I_VADDSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9345, IF_AVX|IF_SANDYBRIDGE},
+ {I_VADDSUBPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9352, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VADDSUBPS[] = {
- {I_VADDSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+8607, IF_AVX|IF_SANDYBRIDGE},
- {I_VADDSUBPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8614, IF_AVX|IF_SANDYBRIDGE},
- {I_VADDSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+8621, IF_AVX|IF_SANDYBRIDGE},
- {I_VADDSUBPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+8628, IF_AVX|IF_SANDYBRIDGE},
+ {I_VADDSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9359, IF_AVX|IF_SANDYBRIDGE},
+ {I_VADDSUBPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9366, IF_AVX|IF_SANDYBRIDGE},
+ {I_VADDSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9373, IF_AVX|IF_SANDYBRIDGE},
+ {I_VADDSUBPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9380, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VAESDEC[] = {
- {I_VAESDEC, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+8460, IF_AVX|IF_SANDYBRIDGE},
- {I_VAESDEC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8467, IF_AVX|IF_SANDYBRIDGE},
+ {I_VAESDEC, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9212, IF_AVX|IF_SANDYBRIDGE},
+ {I_VAESDEC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9219, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VAESDECLAST[] = {
- {I_VAESDECLAST, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+8474, IF_AVX|IF_SANDYBRIDGE},
- {I_VAESDECLAST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8481, IF_AVX|IF_SANDYBRIDGE},
+ {I_VAESDECLAST, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9226, IF_AVX|IF_SANDYBRIDGE},
+ {I_VAESDECLAST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9233, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VAESENC[] = {
- {I_VAESENC, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+8432, IF_AVX|IF_SANDYBRIDGE},
- {I_VAESENC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8439, IF_AVX|IF_SANDYBRIDGE},
+ {I_VAESENC, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9184, IF_AVX|IF_SANDYBRIDGE},
+ {I_VAESENC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9191, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VAESENCLAST[] = {
- {I_VAESENCLAST, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+8446, IF_AVX|IF_SANDYBRIDGE},
- {I_VAESENCLAST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8453, IF_AVX|IF_SANDYBRIDGE},
+ {I_VAESENCLAST, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9198, IF_AVX|IF_SANDYBRIDGE},
+ {I_VAESENCLAST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9205, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VAESIMC[] = {
- {I_VAESIMC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8488, IF_AVX|IF_SANDYBRIDGE},
+ {I_VAESIMC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9240, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VAESKEYGENASSIST[] = {
- {I_VAESKEYGENASSIST, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5864, IF_AVX|IF_SANDYBRIDGE},
+ {I_VAESKEYGENASSIST, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4370, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VANDNPD[] = {
- {I_VANDNPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+8691, IF_AVX|IF_SANDYBRIDGE},
- {I_VANDNPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8698, IF_AVX|IF_SANDYBRIDGE},
- {I_VANDNPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+8705, IF_AVX|IF_SANDYBRIDGE},
- {I_VANDNPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+8712, IF_AVX|IF_SANDYBRIDGE},
+ {I_VANDNPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9443, IF_AVX|IF_SANDYBRIDGE},
+ {I_VANDNPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9450, IF_AVX|IF_SANDYBRIDGE},
+ {I_VANDNPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9457, IF_AVX|IF_SANDYBRIDGE},
+ {I_VANDNPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9464, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VANDNPS[] = {
- {I_VANDNPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+8719, IF_AVX|IF_SANDYBRIDGE},
- {I_VANDNPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8726, IF_AVX|IF_SANDYBRIDGE},
- {I_VANDNPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+8733, IF_AVX|IF_SANDYBRIDGE},
- {I_VANDNPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+8740, IF_AVX|IF_SANDYBRIDGE},
+ {I_VANDNPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9471, IF_AVX|IF_SANDYBRIDGE},
+ {I_VANDNPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9478, IF_AVX|IF_SANDYBRIDGE},
+ {I_VANDNPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9485, IF_AVX|IF_SANDYBRIDGE},
+ {I_VANDNPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9492, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VANDPD[] = {
- {I_VANDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+8635, IF_AVX|IF_SANDYBRIDGE},
- {I_VANDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8642, IF_AVX|IF_SANDYBRIDGE},
- {I_VANDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+8649, IF_AVX|IF_SANDYBRIDGE},
- {I_VANDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+8656, IF_AVX|IF_SANDYBRIDGE},
+ {I_VANDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9387, IF_AVX|IF_SANDYBRIDGE},
+ {I_VANDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9394, IF_AVX|IF_SANDYBRIDGE},
+ {I_VANDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9401, IF_AVX|IF_SANDYBRIDGE},
+ {I_VANDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9408, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VANDPS[] = {
- {I_VANDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+8663, IF_AVX|IF_SANDYBRIDGE},
- {I_VANDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8670, IF_AVX|IF_SANDYBRIDGE},
- {I_VANDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+8677, IF_AVX|IF_SANDYBRIDGE},
- {I_VANDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+8684, IF_AVX|IF_SANDYBRIDGE},
+ {I_VANDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9415, IF_AVX|IF_SANDYBRIDGE},
+ {I_VANDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9422, IF_AVX|IF_SANDYBRIDGE},
+ {I_VANDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9429, IF_AVX|IF_SANDYBRIDGE},
+ {I_VANDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9436, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VBLENDPD[] = {
- {I_VBLENDPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+5872, IF_AVX|IF_SANDYBRIDGE},
- {I_VBLENDPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5880, IF_AVX|IF_SANDYBRIDGE},
- {I_VBLENDPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+5888, IF_AVX|IF_SANDYBRIDGE},
- {I_VBLENDPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5896, IF_AVX|IF_SANDYBRIDGE},
+ {I_VBLENDPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+4378, IF_AVX|IF_SANDYBRIDGE},
+ {I_VBLENDPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4386, IF_AVX|IF_SANDYBRIDGE},
+ {I_VBLENDPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+4394, IF_AVX|IF_SANDYBRIDGE},
+ {I_VBLENDPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4402, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VBLENDPS[] = {
- {I_VBLENDPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+5904, IF_AVX|IF_SANDYBRIDGE},
- {I_VBLENDPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5912, IF_AVX|IF_SANDYBRIDGE},
- {I_VBLENDPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+5920, IF_AVX|IF_SANDYBRIDGE},
- {I_VBLENDPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5928, IF_AVX|IF_SANDYBRIDGE},
+ {I_VBLENDPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+4410, IF_AVX|IF_SANDYBRIDGE},
+ {I_VBLENDPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4418, IF_AVX|IF_SANDYBRIDGE},
+ {I_VBLENDPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+4426, IF_AVX|IF_SANDYBRIDGE},
+ {I_VBLENDPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4434, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VBLENDVPD[] = {
- {I_VBLENDVPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+54, IF_AVX|IF_SANDYBRIDGE},
- {I_VBLENDVPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+63, IF_AVX|IF_SANDYBRIDGE},
- {I_VBLENDVPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+72, IF_AVX|IF_SANDYBRIDGE},
- {I_VBLENDVPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+81, IF_AVX|IF_SANDYBRIDGE},
+ {I_VBLENDVPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4442, IF_AVX|IF_SANDYBRIDGE},
+ {I_VBLENDVPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4450, IF_AVX|IF_SANDYBRIDGE},
+ {I_VBLENDVPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+4458, IF_AVX|IF_SANDYBRIDGE},
+ {I_VBLENDVPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+4466, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VBLENDVPS[] = {
- {I_VBLENDVPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+90, IF_AVX|IF_SANDYBRIDGE},
- {I_VBLENDVPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+99, IF_AVX|IF_SANDYBRIDGE},
- {I_VBLENDVPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+108, IF_AVX|IF_SANDYBRIDGE},
- {I_VBLENDVPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+117, IF_AVX|IF_SANDYBRIDGE},
+ {I_VBLENDVPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4474, IF_AVX|IF_SANDYBRIDGE},
+ {I_VBLENDVPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4482, IF_AVX|IF_SANDYBRIDGE},
+ {I_VBLENDVPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+4490, IF_AVX|IF_SANDYBRIDGE},
+ {I_VBLENDVPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+4498, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VBROADCASTF128[] = {
- {I_VBROADCASTF128, 2, {YMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+8768, IF_AVX|IF_SANDYBRIDGE},
+ {I_VBROADCASTF128, 2, {YMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+9520, IF_AVX|IF_SANDYBRIDGE},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VBROADCASTI128[] = {
+ {I_VBROADCASTI128, 2, {YMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+15267, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VBROADCASTSD[] = {
- {I_VBROADCASTSD, 2, {YMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+8761, IF_AVX|IF_SANDYBRIDGE},
+ {I_VBROADCASTSD, 2, {YMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+9513, IF_AVX|IF_SANDYBRIDGE},
+ {I_VBROADCASTSD, 2, {YMMREG,XMMREG,0,0,0}, nasm_bytecodes+9513, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VBROADCASTSS[] = {
- {I_VBROADCASTSS, 2, {XMMREG,MEMORY|BITS32,0,0,0}, nasm_bytecodes+8747, IF_AVX|IF_SANDYBRIDGE},
- {I_VBROADCASTSS, 2, {YMMREG,MEMORY|BITS32,0,0,0}, nasm_bytecodes+8754, IF_AVX|IF_SANDYBRIDGE},
+ {I_VBROADCASTSS, 2, {XMMREG,MEMORY|BITS32,0,0,0}, nasm_bytecodes+9499, IF_AVX|IF_SANDYBRIDGE},
+ {I_VBROADCASTSS, 2, {YMMREG,MEMORY|BITS32,0,0,0}, nasm_bytecodes+9506, IF_AVX|IF_SANDYBRIDGE},
+ {I_VBROADCASTSS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+9499, IF_FUTURE|IF_AVX2},
+ {I_VBROADCASTSS, 2, {YMMREG,XMMREG,0,0,0}, nasm_bytecodes+9506, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPEQPD[] = {
- {I_VCMPEQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+126, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+135, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+144, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+153, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+90, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+99, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+108, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+117, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPEQPS[] = {
- {I_VCMPEQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1278, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1287, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1296, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1305, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1242, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1251, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1260, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1269, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPEQSD[] = {
- {I_VCMPEQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2430, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2439, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2376, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2385, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPEQSS[] = {
- {I_VCMPEQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3006, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3015, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2952, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2961, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPEQ_OSPD[] = {
- {I_VCMPEQ_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+126, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+135, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+144, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+153, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+702, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+711, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+720, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+729, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+54, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+63, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+72, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+81, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+54, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+63, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+72, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+81, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPEQ_OSPS[] = {
- {I_VCMPEQ_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1278, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1287, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1296, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1305, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1854, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1863, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1872, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1881, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1206, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1215, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1224, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1233, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1206, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1215, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1224, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1233, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPEQ_OSSD[] = {
- {I_VCMPEQ_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2430, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2439, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2718, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2727, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2358, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2367, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2358, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2367, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPEQ_OSSS[] = {
- {I_VCMPEQ_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3006, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3015, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3294, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3303, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2934, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2943, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2934, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2943, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPEQ_UQPD[] = {
- {I_VCMPEQ_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+414, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+423, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+432, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+441, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+378, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+387, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+396, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+405, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPEQ_UQPS[] = {
- {I_VCMPEQ_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1566, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1575, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1584, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1593, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1530, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1539, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1548, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1557, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPEQ_UQSD[] = {
- {I_VCMPEQ_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2574, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2583, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2520, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2529, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPEQ_UQSS[] = {
- {I_VCMPEQ_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3150, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3159, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3096, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3105, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPEQ_USPD[] = {
- {I_VCMPEQ_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+990, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+999, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1008, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1017, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+918, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+927, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+936, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+945, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPEQ_USPS[] = {
- {I_VCMPEQ_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2142, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2151, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2160, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2169, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2070, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2079, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2088, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2097, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPEQ_USSD[] = {
- {I_VCMPEQ_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2862, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2871, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2790, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2799, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPEQ_USSS[] = {
- {I_VCMPEQ_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3438, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPEQ_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3447, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3366, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPEQ_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3375, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPFALSEPD[] = {
- {I_VCMPFALSEPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+522, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPFALSEPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+531, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPFALSEPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+540, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPFALSEPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+549, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSEPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+486, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSEPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+495, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSEPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+504, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSEPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+513, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPFALSEPS[] = {
- {I_VCMPFALSEPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1674, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPFALSEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1683, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPFALSEPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1692, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPFALSEPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1701, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSEPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1638, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1647, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSEPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1656, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSEPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1665, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPFALSESD[] = {
- {I_VCMPFALSESD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2628, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPFALSESD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2637, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSESD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2574, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSESD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2583, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPFALSESS[] = {
- {I_VCMPFALSESS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3204, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPFALSESS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3213, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSESS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3150, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSESS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3159, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPFALSE_OQPD[] = {
- {I_VCMPFALSE_OQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+522, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPFALSE_OQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+531, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPFALSE_OQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+540, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPFALSE_OQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+549, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSE_OQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+486, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSE_OQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+495, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSE_OQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+504, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSE_OQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+513, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPFALSE_OQPS[] = {
- {I_VCMPFALSE_OQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1674, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPFALSE_OQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1683, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPFALSE_OQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1692, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPFALSE_OQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1701, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSE_OQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1638, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSE_OQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1647, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSE_OQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1656, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSE_OQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1665, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPFALSE_OQSD[] = {
- {I_VCMPFALSE_OQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2628, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPFALSE_OQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2637, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSE_OQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2574, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSE_OQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2583, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPFALSE_OQSS[] = {
- {I_VCMPFALSE_OQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3204, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPFALSE_OQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3213, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSE_OQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3150, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSE_OQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3159, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPFALSE_OSPD[] = {
- {I_VCMPFALSE_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1098, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPFALSE_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1107, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPFALSE_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1116, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPFALSE_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1125, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSE_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1026, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSE_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1035, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSE_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1044, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSE_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1053, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPFALSE_OSPS[] = {
- {I_VCMPFALSE_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2250, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPFALSE_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2259, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPFALSE_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2268, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPFALSE_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2277, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSE_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2178, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSE_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2187, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSE_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2196, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSE_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2205, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPFALSE_OSSD[] = {
- {I_VCMPFALSE_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2916, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPFALSE_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2925, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSE_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2844, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSE_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2853, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPFALSE_OSSS[] = {
- {I_VCMPFALSE_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3492, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPFALSE_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3501, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSE_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3420, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPFALSE_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3429, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPGEPD[] = {
- {I_VCMPGEPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+594, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGEPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+603, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGEPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+612, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGEPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+621, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGEPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+558, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGEPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+567, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGEPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+576, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGEPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+585, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPGEPS[] = {
- {I_VCMPGEPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1746, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1755, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGEPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1764, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGEPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1773, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGEPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1710, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1719, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGEPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1728, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGEPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1737, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPGESD[] = {
- {I_VCMPGESD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2664, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGESD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2673, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGESD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2610, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGESD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2619, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPGESS[] = {
- {I_VCMPGESS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3240, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGESS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3249, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGESS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3186, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGESS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3195, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPGE_OQPD[] = {
- {I_VCMPGE_OQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1170, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGE_OQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1179, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGE_OQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1188, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGE_OQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1197, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGE_OQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1098, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGE_OQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1107, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGE_OQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1116, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGE_OQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1125, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPGE_OQPS[] = {
- {I_VCMPGE_OQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2322, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGE_OQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2331, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGE_OQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2340, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGE_OQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2349, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGE_OQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2250, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGE_OQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2259, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGE_OQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2268, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGE_OQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2277, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPGE_OQSD[] = {
- {I_VCMPGE_OQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2952, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGE_OQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2961, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGE_OQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2880, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGE_OQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2889, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPGE_OQSS[] = {
- {I_VCMPGE_OQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3528, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGE_OQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3537, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGE_OQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3456, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGE_OQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3465, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPGE_OSPD[] = {
- {I_VCMPGE_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+594, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGE_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+603, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGE_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+612, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGE_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+621, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGE_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+558, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGE_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+567, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGE_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+576, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGE_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+585, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPGE_OSPS[] = {
- {I_VCMPGE_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1746, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGE_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1755, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGE_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1764, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGE_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1773, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGE_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1710, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGE_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1719, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGE_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1728, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGE_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1737, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPGE_OSSD[] = {
- {I_VCMPGE_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2664, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGE_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2673, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGE_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2610, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGE_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2619, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPGE_OSSS[] = {
- {I_VCMPGE_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3240, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGE_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3249, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGE_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3186, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGE_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3195, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPGTPD[] = {
- {I_VCMPGTPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+630, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+639, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGTPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+648, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+657, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGTPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+594, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+603, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGTPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+612, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+621, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPGTPS[] = {
- {I_VCMPGTPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1782, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1791, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGTPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1800, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1809, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGTPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1746, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1755, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGTPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1764, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1773, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPGTSD[] = {
- {I_VCMPGTSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2682, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2691, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGTSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2628, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2637, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPGTSS[] = {
- {I_VCMPGTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3258, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGTSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3267, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3204, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGTSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3213, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPGT_OQPD[] = {
- {I_VCMPGT_OQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1206, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGT_OQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1215, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGT_OQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1224, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGT_OQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1233, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGT_OQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1134, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGT_OQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1143, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGT_OQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1152, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGT_OQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1161, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPGT_OQPS[] = {
- {I_VCMPGT_OQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2358, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGT_OQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2367, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGT_OQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2376, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGT_OQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2385, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGT_OQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2286, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGT_OQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2295, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGT_OQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2304, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGT_OQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2313, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPGT_OQSD[] = {
- {I_VCMPGT_OQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2970, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGT_OQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2979, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGT_OQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2898, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGT_OQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2907, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPGT_OQSS[] = {
- {I_VCMPGT_OQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3546, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGT_OQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3555, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGT_OQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3474, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGT_OQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3483, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPGT_OSPD[] = {
- {I_VCMPGT_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+630, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGT_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+639, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGT_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+648, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGT_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+657, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGT_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+594, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGT_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+603, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGT_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+612, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGT_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+621, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPGT_OSPS[] = {
- {I_VCMPGT_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1782, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGT_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1791, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGT_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1800, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGT_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1809, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGT_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1746, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGT_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1755, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGT_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1764, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGT_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1773, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPGT_OSSD[] = {
- {I_VCMPGT_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2682, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGT_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2691, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGT_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2628, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGT_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2637, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPGT_OSSS[] = {
- {I_VCMPGT_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3258, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPGT_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3267, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGT_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3204, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPGT_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3213, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPLEPD[] = {
- {I_VCMPLEPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+198, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLEPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+207, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLEPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+216, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLEPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+225, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLEPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+162, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLEPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+171, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLEPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+180, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLEPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+189, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPLEPS[] = {
- {I_VCMPLEPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1350, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1359, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLEPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1368, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLEPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1377, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLEPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1314, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1323, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLEPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1332, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLEPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1341, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPLESD[] = {
- {I_VCMPLESD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2466, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLESD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2475, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLESD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2412, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLESD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2421, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPLESS[] = {
- {I_VCMPLESS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3042, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLESS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3051, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLESS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2988, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLESS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2997, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPLE_OQPD[] = {
- {I_VCMPLE_OQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+774, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLE_OQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+783, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLE_OQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+792, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLE_OQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+801, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLE_OQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+702, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLE_OQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+711, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLE_OQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+720, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLE_OQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+729, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPLE_OQPS[] = {
- {I_VCMPLE_OQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1926, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLE_OQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1935, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLE_OQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1944, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLE_OQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1953, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLE_OQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1854, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLE_OQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1863, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLE_OQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1872, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLE_OQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1881, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPLE_OQSD[] = {
- {I_VCMPLE_OQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2754, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLE_OQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2763, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLE_OQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2682, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLE_OQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2691, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPLE_OQSS[] = {
- {I_VCMPLE_OQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3330, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLE_OQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3339, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLE_OQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3258, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLE_OQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3267, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPLE_OSPD[] = {
- {I_VCMPLE_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+198, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLE_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+207, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLE_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+216, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLE_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+225, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLE_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+162, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLE_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+171, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLE_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+180, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLE_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+189, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPLE_OSPS[] = {
- {I_VCMPLE_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1350, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLE_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1359, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLE_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1368, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLE_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1377, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLE_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1314, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLE_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1323, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLE_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1332, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLE_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1341, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPLE_OSSD[] = {
- {I_VCMPLE_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2466, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLE_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2475, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLE_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2412, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLE_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2421, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPLE_OSSS[] = {
- {I_VCMPLE_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3042, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLE_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3051, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLE_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2988, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLE_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2997, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPLTPD[] = {
- {I_VCMPLTPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+162, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+171, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLTPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+180, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+189, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLTPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+126, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+135, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLTPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+144, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+153, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPLTPS[] = {
- {I_VCMPLTPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1314, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1323, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLTPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1332, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1341, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLTPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1278, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1287, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLTPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1296, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1305, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPLTSD[] = {
- {I_VCMPLTSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2448, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2457, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLTSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2394, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2403, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPLTSS[] = {
- {I_VCMPLTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3024, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLTSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3033, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2970, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLTSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2979, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPLT_OQPD[] = {
- {I_VCMPLT_OQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+738, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLT_OQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+747, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLT_OQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+756, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLT_OQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+765, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLT_OQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+666, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLT_OQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+675, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLT_OQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+684, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLT_OQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+693, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPLT_OQPS[] = {
- {I_VCMPLT_OQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1890, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLT_OQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1899, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLT_OQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1908, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLT_OQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1917, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLT_OQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1818, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLT_OQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1827, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLT_OQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1836, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLT_OQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1845, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPLT_OQSD[] = {
- {I_VCMPLT_OQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2736, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLT_OQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2745, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLT_OQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2664, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLT_OQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2673, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPLT_OQSS[] = {
- {I_VCMPLT_OQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3312, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLT_OQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3321, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLT_OQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3240, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLT_OQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3249, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPLT_OSPD[] = {
- {I_VCMPLT_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+162, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLT_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+171, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLT_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+180, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLT_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+189, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLT_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+126, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLT_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+135, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLT_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+144, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLT_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+153, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPLT_OSPS[] = {
- {I_VCMPLT_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1314, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLT_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1323, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLT_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1332, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLT_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1341, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLT_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1278, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLT_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1287, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLT_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1296, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLT_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1305, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPLT_OSSD[] = {
- {I_VCMPLT_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2448, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLT_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2457, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLT_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2394, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLT_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2403, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPLT_OSSS[] = {
- {I_VCMPLT_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3024, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPLT_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3033, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLT_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2970, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPLT_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2979, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNEQPD[] = {
- {I_VCMPNEQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+270, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+279, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+288, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+297, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+234, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+243, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+252, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+261, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNEQPS[] = {
- {I_VCMPNEQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1422, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1431, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1440, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1449, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1386, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1395, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1404, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1413, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNEQSD[] = {
- {I_VCMPNEQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2502, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2511, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2448, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2457, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNEQSS[] = {
- {I_VCMPNEQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3078, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3087, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3024, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3033, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNEQ_OQPD[] = {
- {I_VCMPNEQ_OQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+558, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_OQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+567, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_OQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+576, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_OQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+585, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_OQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+522, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_OQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+531, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_OQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+540, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_OQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+549, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNEQ_OQPS[] = {
- {I_VCMPNEQ_OQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1710, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_OQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1719, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_OQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1728, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_OQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1737, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_OQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1674, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_OQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1683, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_OQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1692, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_OQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1701, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNEQ_OQSD[] = {
- {I_VCMPNEQ_OQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2646, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_OQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2655, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_OQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2592, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_OQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2601, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNEQ_OQSS[] = {
- {I_VCMPNEQ_OQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3222, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_OQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3231, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_OQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3168, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_OQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3177, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNEQ_OSPD[] = {
- {I_VCMPNEQ_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1134, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1143, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1152, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1161, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1062, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1071, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1080, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1089, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNEQ_OSPS[] = {
- {I_VCMPNEQ_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2286, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2295, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2304, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2313, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2214, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2223, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2232, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2241, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNEQ_OSSD[] = {
- {I_VCMPNEQ_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2934, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2943, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2862, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2871, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNEQ_OSSS[] = {
- {I_VCMPNEQ_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3510, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3519, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3438, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3447, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNEQ_UQPD[] = {
- {I_VCMPNEQ_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+270, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+279, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+288, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+297, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+234, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+243, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+252, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+261, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNEQ_UQPS[] = {
- {I_VCMPNEQ_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1422, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1431, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1440, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1449, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1386, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1395, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1404, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1413, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNEQ_UQSD[] = {
- {I_VCMPNEQ_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2502, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2511, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2448, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2457, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNEQ_UQSS[] = {
- {I_VCMPNEQ_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3078, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3087, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3024, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3033, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNEQ_USPD[] = {
- {I_VCMPNEQ_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+846, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+855, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+864, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+873, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+774, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+783, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+792, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+801, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNEQ_USPS[] = {
- {I_VCMPNEQ_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1998, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2007, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2016, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2025, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1926, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1935, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1944, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1953, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNEQ_USSD[] = {
- {I_VCMPNEQ_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2790, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2799, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2718, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2727, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNEQ_USSS[] = {
- {I_VCMPNEQ_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3366, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNEQ_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3375, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3294, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNEQ_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3303, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNGEPD[] = {
- {I_VCMPNGEPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+450, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGEPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+459, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGEPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+468, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGEPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+477, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGEPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+414, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGEPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+423, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGEPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+432, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGEPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+441, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNGEPS[] = {
- {I_VCMPNGEPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1602, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1611, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGEPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1620, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGEPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1629, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGEPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1566, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1575, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGEPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1584, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGEPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1593, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNGESD[] = {
- {I_VCMPNGESD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2592, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGESD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2601, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGESD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2538, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGESD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2547, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNGESS[] = {
- {I_VCMPNGESS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3168, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGESS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3177, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGESS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3114, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGESS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3123, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNGE_UQPD[] = {
- {I_VCMPNGE_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1026, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGE_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1035, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGE_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1044, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGE_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1053, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGE_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+954, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGE_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+963, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGE_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+972, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGE_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+981, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNGE_UQPS[] = {
- {I_VCMPNGE_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2178, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGE_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2187, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGE_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2196, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGE_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2205, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGE_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2106, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGE_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2115, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGE_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2124, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGE_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2133, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNGE_UQSD[] = {
- {I_VCMPNGE_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2880, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGE_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2889, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGE_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2808, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGE_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2817, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNGE_UQSS[] = {
- {I_VCMPNGE_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3456, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGE_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3465, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGE_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3384, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGE_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3393, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNGE_USPD[] = {
- {I_VCMPNGE_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+450, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGE_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+459, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGE_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+468, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGE_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+477, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGE_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+414, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGE_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+423, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGE_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+432, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGE_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+441, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNGE_USPS[] = {
- {I_VCMPNGE_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1602, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGE_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1611, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGE_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1620, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGE_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1629, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGE_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1566, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGE_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1575, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGE_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1584, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGE_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1593, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNGE_USSD[] = {
- {I_VCMPNGE_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2592, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGE_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2601, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGE_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2538, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGE_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2547, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNGE_USSS[] = {
- {I_VCMPNGE_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3168, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGE_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3177, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGE_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3114, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGE_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3123, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNGTPD[] = {
- {I_VCMPNGTPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+486, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+495, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGTPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+504, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+513, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGTPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+450, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+459, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGTPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+468, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+477, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNGTPS[] = {
- {I_VCMPNGTPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1638, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1647, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGTPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1656, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1665, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGTPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1602, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1611, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGTPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1620, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1629, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNGTSD[] = {
- {I_VCMPNGTSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2610, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2619, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGTSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2556, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2565, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNGTSS[] = {
- {I_VCMPNGTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3186, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGTSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3195, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3132, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGTSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3141, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNGT_UQPD[] = {
- {I_VCMPNGT_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1062, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGT_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1071, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGT_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1080, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGT_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1089, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGT_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+990, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGT_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+999, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGT_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1008, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGT_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1017, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNGT_UQPS[] = {
- {I_VCMPNGT_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2214, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGT_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2223, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGT_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2232, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGT_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2241, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGT_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2142, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGT_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2151, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGT_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2160, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGT_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2169, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNGT_UQSD[] = {
- {I_VCMPNGT_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2898, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGT_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2907, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGT_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2826, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGT_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2835, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNGT_UQSS[] = {
- {I_VCMPNGT_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3474, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGT_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3483, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGT_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3402, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGT_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3411, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNGT_USPD[] = {
- {I_VCMPNGT_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+486, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGT_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+495, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGT_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+504, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGT_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+513, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGT_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+450, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGT_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+459, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGT_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+468, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGT_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+477, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNGT_USPS[] = {
- {I_VCMPNGT_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1638, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGT_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1647, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGT_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1656, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGT_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1665, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGT_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1602, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGT_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1611, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGT_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1620, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGT_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1629, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNGT_USSD[] = {
- {I_VCMPNGT_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2610, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGT_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2619, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGT_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2556, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGT_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2565, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNGT_USSS[] = {
- {I_VCMPNGT_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3186, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNGT_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3195, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGT_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3132, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNGT_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3141, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNLEPD[] = {
- {I_VCMPNLEPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+342, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLEPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+351, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLEPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+360, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLEPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+369, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLEPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+306, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLEPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+315, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLEPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+324, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLEPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+333, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNLEPS[] = {
- {I_VCMPNLEPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1494, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1503, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLEPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1512, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLEPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1521, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLEPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1458, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1467, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLEPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1476, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLEPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1485, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNLESD[] = {
- {I_VCMPNLESD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2538, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLESD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2547, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLESD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2484, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLESD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2493, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNLESS[] = {
- {I_VCMPNLESS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3114, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLESS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3123, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLESS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3060, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLESS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3069, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNLE_UQPD[] = {
- {I_VCMPNLE_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+918, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLE_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+927, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLE_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+936, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLE_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+945, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLE_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+846, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLE_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+855, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLE_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+864, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLE_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+873, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNLE_UQPS[] = {
- {I_VCMPNLE_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2070, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLE_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2079, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLE_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2088, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLE_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2097, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLE_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1998, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLE_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2007, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLE_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2016, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLE_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2025, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNLE_UQSD[] = {
- {I_VCMPNLE_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2826, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLE_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2835, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLE_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2754, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLE_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2763, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNLE_UQSS[] = {
- {I_VCMPNLE_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3402, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLE_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3411, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLE_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3330, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLE_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3339, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNLE_USPD[] = {
- {I_VCMPNLE_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+342, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLE_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+351, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLE_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+360, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLE_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+369, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLE_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+306, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLE_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+315, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLE_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+324, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLE_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+333, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNLE_USPS[] = {
- {I_VCMPNLE_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1494, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLE_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1503, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLE_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1512, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLE_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1521, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLE_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1458, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLE_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1467, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLE_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1476, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLE_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1485, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNLE_USSD[] = {
- {I_VCMPNLE_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2538, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLE_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2547, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLE_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2484, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLE_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2493, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNLE_USSS[] = {
- {I_VCMPNLE_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3114, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLE_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3123, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLE_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3060, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLE_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3069, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNLTPD[] = {
- {I_VCMPNLTPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+306, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+315, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLTPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+324, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+333, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLTPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+270, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+279, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLTPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+288, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+297, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNLTPS[] = {
- {I_VCMPNLTPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1458, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1467, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLTPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1476, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1485, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLTPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1422, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1431, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLTPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1440, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1449, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNLTSD[] = {
- {I_VCMPNLTSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2520, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2529, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLTSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2466, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2475, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNLTSS[] = {
- {I_VCMPNLTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3096, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLTSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3105, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3042, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLTSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3051, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNLT_UQPD[] = {
- {I_VCMPNLT_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+882, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLT_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+891, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLT_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+900, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLT_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+909, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLT_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+810, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLT_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+819, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLT_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+828, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLT_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+837, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNLT_UQPS[] = {
- {I_VCMPNLT_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2034, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLT_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2043, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLT_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2052, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLT_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2061, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLT_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1962, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLT_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1971, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLT_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1980, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLT_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1989, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNLT_UQSD[] = {
- {I_VCMPNLT_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2808, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLT_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2817, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLT_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2736, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLT_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2745, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNLT_UQSS[] = {
- {I_VCMPNLT_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3384, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLT_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3393, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLT_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3312, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLT_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3321, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNLT_USPD[] = {
- {I_VCMPNLT_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+306, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLT_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+315, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLT_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+324, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLT_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+333, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLT_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+270, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLT_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+279, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLT_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+288, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLT_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+297, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNLT_USPS[] = {
- {I_VCMPNLT_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1458, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLT_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1467, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLT_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1476, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLT_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1485, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLT_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1422, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLT_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1431, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLT_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1440, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLT_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1449, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNLT_USSD[] = {
- {I_VCMPNLT_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2520, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLT_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2529, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLT_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2466, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLT_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2475, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPNLT_USSS[] = {
- {I_VCMPNLT_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3096, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPNLT_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3105, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLT_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3042, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPNLT_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3051, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPORDPD[] = {
- {I_VCMPORDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+378, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPORDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+387, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPORDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+396, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPORDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+405, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+342, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+351, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+360, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+369, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPORDPS[] = {
- {I_VCMPORDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1530, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPORDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1539, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPORDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1548, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPORDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1557, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1494, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1503, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1512, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1521, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPORDSD[] = {
- {I_VCMPORDSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2556, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPORDSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2565, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORDSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2502, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORDSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2511, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPORDSS[] = {
- {I_VCMPORDSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3132, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPORDSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3141, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORDSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3078, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORDSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3087, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPORD_QPD[] = {
- {I_VCMPORD_QPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+378, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPORD_QPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+387, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPORD_QPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+396, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPORD_QPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+405, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORD_QPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+342, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORD_QPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+351, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORD_QPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+360, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORD_QPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+369, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPORD_QPS[] = {
- {I_VCMPORD_QPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1530, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPORD_QPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1539, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPORD_QPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1548, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPORD_QPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1557, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORD_QPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1494, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORD_QPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1503, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORD_QPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1512, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORD_QPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1521, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPORD_QSD[] = {
- {I_VCMPORD_QSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2556, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPORD_QSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2565, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORD_QSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2502, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORD_QSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2511, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPORD_QSS[] = {
- {I_VCMPORD_QSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3132, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPORD_QSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3141, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORD_QSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3078, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORD_QSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3087, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPORD_SPD[] = {
- {I_VCMPORD_SPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+954, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPORD_SPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+963, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPORD_SPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+972, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPORD_SPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+981, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORD_SPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+882, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORD_SPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+891, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORD_SPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+900, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORD_SPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+909, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPORD_SPS[] = {
- {I_VCMPORD_SPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2106, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPORD_SPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2115, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPORD_SPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2124, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPORD_SPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2133, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORD_SPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2034, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORD_SPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2043, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORD_SPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2052, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORD_SPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2061, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPORD_SSD[] = {
- {I_VCMPORD_SSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2844, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPORD_SSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2853, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORD_SSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2772, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORD_SSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2781, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPORD_SSS[] = {
- {I_VCMPORD_SSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3420, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPORD_SSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3429, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORD_SSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3348, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPORD_SSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3357, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPPD[] = {
- {I_VCMPPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+5936, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5944, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+5952, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5960, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+4506, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4514, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+4522, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4530, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPPS[] = {
- {I_VCMPPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+5968, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5976, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+5984, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5992, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+4538, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4546, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+4554, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4562, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPSD[] = {
- {I_VCMPSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, nasm_bytecodes+6000, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPSD, 3, {XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6008, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, nasm_bytecodes+4570, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPSD, 3, {XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4578, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPSS[] = {
- {I_VCMPSS, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, nasm_bytecodes+6016, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPSS, 3, {XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6024, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPSS, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, nasm_bytecodes+4586, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPSS, 3, {XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4594, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPTRUEPD[] = {
- {I_VCMPTRUEPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+666, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPTRUEPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+675, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPTRUEPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+684, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPTRUEPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+693, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUEPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+630, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUEPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+639, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUEPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+648, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUEPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+657, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPTRUEPS[] = {
- {I_VCMPTRUEPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1818, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPTRUEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1827, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPTRUEPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1836, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPTRUEPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1845, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUEPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1782, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1791, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUEPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1800, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUEPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1809, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPTRUESD[] = {
- {I_VCMPTRUESD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2700, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPTRUESD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2709, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUESD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2646, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUESD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2655, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPTRUESS[] = {
- {I_VCMPTRUESS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3276, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPTRUESS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3285, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUESS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3222, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUESS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3231, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPTRUE_UQPD[] = {
- {I_VCMPTRUE_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+666, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPTRUE_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+675, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPTRUE_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+684, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPTRUE_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+693, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUE_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+630, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUE_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+639, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUE_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+648, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUE_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+657, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPTRUE_UQPS[] = {
- {I_VCMPTRUE_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1818, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPTRUE_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1827, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPTRUE_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1836, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPTRUE_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1845, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUE_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1782, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUE_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1791, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUE_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1800, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUE_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1809, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPTRUE_UQSD[] = {
- {I_VCMPTRUE_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2700, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPTRUE_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2709, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUE_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2646, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUE_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2655, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPTRUE_UQSS[] = {
- {I_VCMPTRUE_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3276, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPTRUE_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3285, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUE_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3222, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUE_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3231, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPTRUE_USPD[] = {
- {I_VCMPTRUE_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1242, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPTRUE_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1251, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPTRUE_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1260, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPTRUE_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1269, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUE_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1170, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUE_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1179, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUE_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1188, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUE_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1197, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPTRUE_USPS[] = {
- {I_VCMPTRUE_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2394, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPTRUE_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2403, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPTRUE_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2412, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPTRUE_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2421, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUE_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2322, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUE_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2331, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUE_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2340, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUE_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2349, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPTRUE_USSD[] = {
- {I_VCMPTRUE_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2988, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPTRUE_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2997, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUE_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2916, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUE_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2925, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPTRUE_USSS[] = {
- {I_VCMPTRUE_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3564, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPTRUE_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3573, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUE_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3492, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPTRUE_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3501, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPUNORDPD[] = {
- {I_VCMPUNORDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+234, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPUNORDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+243, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPUNORDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+252, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPUNORDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+261, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+198, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+207, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+216, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+225, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPUNORDPS[] = {
- {I_VCMPUNORDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1386, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPUNORDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1395, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPUNORDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1404, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPUNORDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1413, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1350, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1359, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1368, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1377, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPUNORDSD[] = {
- {I_VCMPUNORDSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2484, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPUNORDSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2493, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORDSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2430, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORDSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2439, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPUNORDSS[] = {
- {I_VCMPUNORDSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3060, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPUNORDSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3069, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORDSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3006, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORDSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3015, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPUNORD_QPD[] = {
- {I_VCMPUNORD_QPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+234, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPUNORD_QPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+243, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPUNORD_QPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+252, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPUNORD_QPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+261, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORD_QPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+198, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORD_QPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+207, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORD_QPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+216, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORD_QPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+225, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPUNORD_QPS[] = {
- {I_VCMPUNORD_QPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1386, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPUNORD_QPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1395, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPUNORD_QPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1404, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPUNORD_QPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1413, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORD_QPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1350, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORD_QPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1359, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORD_QPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1368, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORD_QPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1377, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPUNORD_QSD[] = {
- {I_VCMPUNORD_QSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2484, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPUNORD_QSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2493, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORD_QSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2430, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORD_QSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2439, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPUNORD_QSS[] = {
- {I_VCMPUNORD_QSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3060, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPUNORD_QSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3069, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORD_QSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3006, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORD_QSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3015, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPUNORD_SPD[] = {
- {I_VCMPUNORD_SPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+810, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPUNORD_SPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+819, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPUNORD_SPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+828, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPUNORD_SPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+837, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORD_SPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+738, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORD_SPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+747, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORD_SPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+756, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORD_SPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+765, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPUNORD_SPS[] = {
- {I_VCMPUNORD_SPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1962, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPUNORD_SPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1971, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPUNORD_SPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1980, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPUNORD_SPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1989, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORD_SPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1890, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORD_SPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1899, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORD_SPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1908, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORD_SPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1917, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPUNORD_SSD[] = {
- {I_VCMPUNORD_SSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2772, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPUNORD_SSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2781, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORD_SSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2700, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORD_SSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2709, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCMPUNORD_SSS[] = {
- {I_VCMPUNORD_SSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3348, IF_AVX|IF_SANDYBRIDGE},
- {I_VCMPUNORD_SSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3357, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORD_SSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3276, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCMPUNORD_SSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3285, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCOMISD[] = {
- {I_VCOMISD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+8775, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCOMISD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9527, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCOMISS[] = {
- {I_VCOMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+8782, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCOMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9534, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCVTDQ2PD[] = {
- {I_VCVTDQ2PD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+8789, IF_AVX|IF_SANDYBRIDGE},
- {I_VCVTDQ2PD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8796, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCVTDQ2PD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9541, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCVTDQ2PD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9548, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCVTDQ2PS[] = {
- {I_VCVTDQ2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8803, IF_AVX|IF_SANDYBRIDGE},
- {I_VCVTDQ2PS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+8810, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCVTDQ2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9555, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCVTDQ2PS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9562, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCVTPD2DQ[] = {
- {I_VCVTPD2DQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+8817, IF_AVX|IF_SANDYBRIDGE},
- {I_VCVTPD2DQ, 2, {XMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+8817, IF_AVX|IF_SANDYBRIDGE|IF_SO},
- {I_VCVTPD2DQ, 2, {XMMREG,YMMREG,0,0,0}, nasm_bytecodes+8824, IF_AVX|IF_SANDYBRIDGE},
- {I_VCVTPD2DQ, 2, {XMMREG,MEMORY|BITS256,0,0,0}, nasm_bytecodes+8824, IF_AVX|IF_SANDYBRIDGE|IF_SY},
+ {I_VCVTPD2DQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+9569, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCVTPD2DQ, 2, {XMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+9569, IF_AVX|IF_SANDYBRIDGE|IF_SO},
+ {I_VCVTPD2DQ, 2, {XMMREG,YMMREG,0,0,0}, nasm_bytecodes+9576, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCVTPD2DQ, 2, {XMMREG,MEMORY|BITS256,0,0,0}, nasm_bytecodes+9576, IF_AVX|IF_SANDYBRIDGE|IF_SY},
ITEMPLATE_END
};
static const struct itemplate instrux_VCVTPD2PS[] = {
- {I_VCVTPD2PS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+8831, IF_AVX|IF_SANDYBRIDGE},
- {I_VCVTPD2PS, 2, {XMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+8831, IF_AVX|IF_SANDYBRIDGE|IF_SO},
- {I_VCVTPD2PS, 2, {XMMREG,YMMREG,0,0,0}, nasm_bytecodes+8838, IF_AVX|IF_SANDYBRIDGE},
- {I_VCVTPD2PS, 2, {XMMREG,MEMORY|BITS256,0,0,0}, nasm_bytecodes+8838, IF_AVX|IF_SANDYBRIDGE|IF_SY},
+ {I_VCVTPD2PS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+9583, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCVTPD2PS, 2, {XMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+9583, IF_AVX|IF_SANDYBRIDGE|IF_SO},
+ {I_VCVTPD2PS, 2, {XMMREG,YMMREG,0,0,0}, nasm_bytecodes+9590, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCVTPD2PS, 2, {XMMREG,MEMORY|BITS256,0,0,0}, nasm_bytecodes+9590, IF_AVX|IF_SANDYBRIDGE|IF_SY},
ITEMPLATE_END
};
static const struct itemplate instrux_VCVTPH2PS[] = {
- {I_VCVTPH2PS, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12548, IF_AVX|IF_FUTURE},
- {I_VCVTPH2PS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+12555, IF_AVX|IF_FUTURE},
+ {I_VCVTPH2PS, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13328, IF_AVX|IF_FUTURE},
+ {I_VCVTPH2PS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+13335, IF_AVX|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCVTPS2DQ[] = {
- {I_VCVTPS2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8845, IF_AVX|IF_SANDYBRIDGE},
- {I_VCVTPS2DQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+8852, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCVTPS2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9597, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCVTPS2DQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9604, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCVTPS2PD[] = {
- {I_VCVTPS2PD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+8859, IF_AVX|IF_SANDYBRIDGE},
- {I_VCVTPS2PD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8866, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCVTPS2PD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9611, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCVTPS2PD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9618, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCVTPS2PH[] = {
- {I_VCVTPS2PH, 3, {RM_XMM|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6680, IF_AVX|IF_FUTURE},
- {I_VCVTPS2PH, 3, {RM_XMM|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6688, IF_AVX|IF_FUTURE},
+ {I_VCVTPS2PH, 3, {RM_XMM|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5266, IF_AVX|IF_FUTURE},
+ {I_VCVTPS2PH, 3, {RM_XMM|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5274, IF_AVX|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCVTSD2SI[] = {
- {I_VCVTSD2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+8873, IF_AVX|IF_SANDYBRIDGE},
- {I_VCVTSD2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+8880, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ {I_VCVTSD2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9625, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCVTSD2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9632, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
ITEMPLATE_END
};
static const struct itemplate instrux_VCVTSD2SS[] = {
- {I_VCVTSD2SS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+8887, IF_AVX|IF_SANDYBRIDGE},
- {I_VCVTSD2SS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+8894, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCVTSD2SS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+9639, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCVTSD2SS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9646, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCVTSI2SD[] = {
- {I_VCVTSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, nasm_bytecodes+8901, IF_AVX|IF_SANDYBRIDGE|IF_SD},
- {I_VCVTSI2SD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+8908, IF_AVX|IF_SANDYBRIDGE|IF_SD},
- {I_VCVTSI2SD, 3, {XMMREG,XMMREG,MEMORY|BITS32,0,0}, nasm_bytecodes+8901, IF_AVX|IF_SANDYBRIDGE|IF_SD},
- {I_VCVTSI2SD, 2, {XMMREG,MEMORY|BITS32,0,0,0}, nasm_bytecodes+8908, IF_AVX|IF_SANDYBRIDGE|IF_SD},
- {I_VCVTSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, nasm_bytecodes+8915, IF_AVX|IF_SANDYBRIDGE|IF_LONG|IF_SQ},
- {I_VCVTSI2SD, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+8922, IF_AVX|IF_SANDYBRIDGE|IF_LONG|IF_SQ},
+ {I_VCVTSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, nasm_bytecodes+9653, IF_AVX|IF_SANDYBRIDGE|IF_SD},
+ {I_VCVTSI2SD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+9660, IF_AVX|IF_SANDYBRIDGE|IF_SD},
+ {I_VCVTSI2SD, 3, {XMMREG,XMMREG,MEMORY|BITS32,0,0}, nasm_bytecodes+9653, IF_AVX|IF_SANDYBRIDGE|IF_SD},
+ {I_VCVTSI2SD, 2, {XMMREG,MEMORY|BITS32,0,0,0}, nasm_bytecodes+9660, IF_AVX|IF_SANDYBRIDGE|IF_SD},
+ {I_VCVTSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, nasm_bytecodes+9667, IF_AVX|IF_SANDYBRIDGE|IF_LONG|IF_SQ},
+ {I_VCVTSI2SD, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+9674, IF_AVX|IF_SANDYBRIDGE|IF_LONG|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_VCVTSI2SS[] = {
- {I_VCVTSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, nasm_bytecodes+8929, IF_AVX|IF_SANDYBRIDGE|IF_SD},
- {I_VCVTSI2SS, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+8936, IF_AVX|IF_SANDYBRIDGE|IF_SD},
- {I_VCVTSI2SS, 3, {XMMREG,XMMREG,MEMORY|BITS32,0,0}, nasm_bytecodes+8929, IF_AVX|IF_SANDYBRIDGE|IF_SD},
- {I_VCVTSI2SS, 2, {XMMREG,MEMORY|BITS32,0,0,0}, nasm_bytecodes+8936, IF_AVX|IF_SANDYBRIDGE|IF_SD},
- {I_VCVTSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, nasm_bytecodes+8943, IF_AVX|IF_SANDYBRIDGE|IF_LONG|IF_SQ},
- {I_VCVTSI2SS, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+8950, IF_AVX|IF_SANDYBRIDGE|IF_LONG|IF_SQ},
+ {I_VCVTSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, nasm_bytecodes+9681, IF_AVX|IF_SANDYBRIDGE|IF_SD},
+ {I_VCVTSI2SS, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+9688, IF_AVX|IF_SANDYBRIDGE|IF_SD},
+ {I_VCVTSI2SS, 3, {XMMREG,XMMREG,MEMORY|BITS32,0,0}, nasm_bytecodes+9681, IF_AVX|IF_SANDYBRIDGE|IF_SD},
+ {I_VCVTSI2SS, 2, {XMMREG,MEMORY|BITS32,0,0,0}, nasm_bytecodes+9688, IF_AVX|IF_SANDYBRIDGE|IF_SD},
+ {I_VCVTSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, nasm_bytecodes+9695, IF_AVX|IF_SANDYBRIDGE|IF_LONG|IF_SQ},
+ {I_VCVTSI2SS, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+9702, IF_AVX|IF_SANDYBRIDGE|IF_LONG|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_VCVTSS2SD[] = {
- {I_VCVTSS2SD, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+8957, IF_AVX|IF_SANDYBRIDGE},
- {I_VCVTSS2SD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+8964, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCVTSS2SD, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+9709, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCVTSS2SD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9716, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCVTSS2SI[] = {
- {I_VCVTSS2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+8971, IF_AVX|IF_SANDYBRIDGE},
- {I_VCVTSS2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+8978, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ {I_VCVTSS2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9723, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCVTSS2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9730, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
ITEMPLATE_END
};
static const struct itemplate instrux_VCVTTPD2DQ[] = {
- {I_VCVTTPD2DQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+8985, IF_AVX|IF_SANDYBRIDGE},
- {I_VCVTTPD2DQ, 2, {XMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+8985, IF_AVX|IF_SANDYBRIDGE|IF_SO},
- {I_VCVTTPD2DQ, 2, {XMMREG,YMMREG,0,0,0}, nasm_bytecodes+8992, IF_AVX|IF_SANDYBRIDGE},
- {I_VCVTTPD2DQ, 2, {XMMREG,MEMORY|BITS256,0,0,0}, nasm_bytecodes+8992, IF_AVX|IF_SANDYBRIDGE|IF_SY},
+ {I_VCVTTPD2DQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+9737, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCVTTPD2DQ, 2, {XMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+9737, IF_AVX|IF_SANDYBRIDGE|IF_SO},
+ {I_VCVTTPD2DQ, 2, {XMMREG,YMMREG,0,0,0}, nasm_bytecodes+9744, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCVTTPD2DQ, 2, {XMMREG,MEMORY|BITS256,0,0,0}, nasm_bytecodes+9744, IF_AVX|IF_SANDYBRIDGE|IF_SY},
ITEMPLATE_END
};
static const struct itemplate instrux_VCVTTPS2DQ[] = {
- {I_VCVTTPS2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8999, IF_AVX|IF_SANDYBRIDGE},
- {I_VCVTTPS2DQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9006, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCVTTPS2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9751, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCVTTPS2DQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9758, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VCVTTSD2SI[] = {
- {I_VCVTTSD2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9013, IF_AVX|IF_SANDYBRIDGE},
- {I_VCVTTSD2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9020, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ {I_VCVTTSD2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9765, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCVTTSD2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9772, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
ITEMPLATE_END
};
static const struct itemplate instrux_VCVTTSS2SI[] = {
- {I_VCVTTSS2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9027, IF_AVX|IF_SANDYBRIDGE},
- {I_VCVTTSS2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9034, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ {I_VCVTTSS2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9779, IF_AVX|IF_SANDYBRIDGE},
+ {I_VCVTTSS2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9786, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
ITEMPLATE_END
};
static const struct itemplate instrux_VDIVPD[] = {
- {I_VDIVPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9041, IF_AVX|IF_SANDYBRIDGE},
- {I_VDIVPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9048, IF_AVX|IF_SANDYBRIDGE},
- {I_VDIVPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9055, IF_AVX|IF_SANDYBRIDGE},
- {I_VDIVPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9062, IF_AVX|IF_SANDYBRIDGE},
+ {I_VDIVPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9793, IF_AVX|IF_SANDYBRIDGE},
+ {I_VDIVPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9800, IF_AVX|IF_SANDYBRIDGE},
+ {I_VDIVPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9807, IF_AVX|IF_SANDYBRIDGE},
+ {I_VDIVPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9814, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VDIVPS[] = {
- {I_VDIVPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9069, IF_AVX|IF_SANDYBRIDGE},
- {I_VDIVPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9076, IF_AVX|IF_SANDYBRIDGE},
- {I_VDIVPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9083, IF_AVX|IF_SANDYBRIDGE},
- {I_VDIVPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9090, IF_AVX|IF_SANDYBRIDGE},
+ {I_VDIVPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9821, IF_AVX|IF_SANDYBRIDGE},
+ {I_VDIVPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9828, IF_AVX|IF_SANDYBRIDGE},
+ {I_VDIVPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9835, IF_AVX|IF_SANDYBRIDGE},
+ {I_VDIVPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9842, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VDIVSD[] = {
- {I_VDIVSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+9097, IF_AVX|IF_SANDYBRIDGE},
- {I_VDIVSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9104, IF_AVX|IF_SANDYBRIDGE},
+ {I_VDIVSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+9849, IF_AVX|IF_SANDYBRIDGE},
+ {I_VDIVSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9856, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VDIVSS[] = {
- {I_VDIVSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+9111, IF_AVX|IF_SANDYBRIDGE},
- {I_VDIVSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9118, IF_AVX|IF_SANDYBRIDGE},
+ {I_VDIVSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+9863, IF_AVX|IF_SANDYBRIDGE},
+ {I_VDIVSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9870, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VDPPD[] = {
- {I_VDPPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6032, IF_AVX|IF_SANDYBRIDGE},
- {I_VDPPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6040, IF_AVX|IF_SANDYBRIDGE},
+ {I_VDPPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+4602, IF_AVX|IF_SANDYBRIDGE},
+ {I_VDPPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4610, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VDPPS[] = {
- {I_VDPPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6048, IF_AVX|IF_SANDYBRIDGE},
- {I_VDPPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6056, IF_AVX|IF_SANDYBRIDGE},
- {I_VDPPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+6064, IF_AVX|IF_SANDYBRIDGE},
- {I_VDPPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6072, IF_AVX|IF_SANDYBRIDGE},
+ {I_VDPPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+4618, IF_AVX|IF_SANDYBRIDGE},
+ {I_VDPPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4626, IF_AVX|IF_SANDYBRIDGE},
+ {I_VDPPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+4634, IF_AVX|IF_SANDYBRIDGE},
+ {I_VDPPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4642, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VERR[] = {
- {I_VERR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18477, IF_286|IF_PROT},
- {I_VERR, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+18477, IF_286|IF_PROT},
- {I_VERR, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18477, IF_286|IF_PROT},
+ {I_VERR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20989, IF_286|IF_PROT},
+ {I_VERR, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+20989, IF_286|IF_PROT},
+ {I_VERR, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+20989, IF_286|IF_PROT},
ITEMPLATE_END
};
static const struct itemplate instrux_VERW[] = {
- {I_VERW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18482, IF_286|IF_PROT},
- {I_VERW, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+18482, IF_286|IF_PROT},
- {I_VERW, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18482, IF_286|IF_PROT},
+ {I_VERW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20994, IF_286|IF_PROT},
+ {I_VERW, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+20994, IF_286|IF_PROT},
+ {I_VERW, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+20994, IF_286|IF_PROT},
ITEMPLATE_END
};
static const struct itemplate instrux_VEXTRACTF128[] = {
- {I_VEXTRACTF128, 3, {RM_XMM|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6080, IF_AVX|IF_SANDYBRIDGE},
+ {I_VEXTRACTF128, 3, {RM_XMM|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4650, IF_AVX|IF_SANDYBRIDGE},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VEXTRACTI128[] = {
+ {I_VEXTRACTI128, 3, {RM_XMM|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7154, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VEXTRACTPS[] = {
- {I_VEXTRACTPS, 3, {RM_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6088, IF_AVX|IF_SANDYBRIDGE},
+ {I_VEXTRACTPS, 3, {RM_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4658, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADD123PD[] = {
- {I_VFMADD123PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11890, IF_FMA|IF_FUTURE},
- {I_VFMADD123PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11897, IF_FMA|IF_FUTURE},
+ {I_VFMADD123PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12642, IF_FMA|IF_FUTURE},
+ {I_VFMADD123PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12649, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADD123PS[] = {
- {I_VFMADD123PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11876, IF_FMA|IF_FUTURE},
- {I_VFMADD123PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11883, IF_FMA|IF_FUTURE},
+ {I_VFMADD123PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12628, IF_FMA|IF_FUTURE},
+ {I_VFMADD123PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12635, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADD123SD[] = {
- {I_VFMADD123SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12373, IF_FMA|IF_FUTURE},
+ {I_VFMADD123SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13125, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADD123SS[] = {
- {I_VFMADD123SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12366, IF_FMA|IF_FUTURE},
+ {I_VFMADD123SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13118, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADD132PD[] = {
- {I_VFMADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11862, IF_FMA|IF_FUTURE},
- {I_VFMADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11869, IF_FMA|IF_FUTURE},
+ {I_VFMADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12614, IF_FMA|IF_FUTURE},
+ {I_VFMADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12621, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADD132PS[] = {
- {I_VFMADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11848, IF_FMA|IF_FUTURE},
- {I_VFMADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11855, IF_FMA|IF_FUTURE},
+ {I_VFMADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12600, IF_FMA|IF_FUTURE},
+ {I_VFMADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12607, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADD132SD[] = {
- {I_VFMADD132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12359, IF_FMA|IF_FUTURE},
+ {I_VFMADD132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13111, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADD132SS[] = {
- {I_VFMADD132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12352, IF_FMA|IF_FUTURE},
+ {I_VFMADD132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13104, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADD213PD[] = {
- {I_VFMADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11890, IF_FMA|IF_FUTURE},
- {I_VFMADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11897, IF_FMA|IF_FUTURE},
+ {I_VFMADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12642, IF_FMA|IF_FUTURE},
+ {I_VFMADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12649, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADD213PS[] = {
- {I_VFMADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11876, IF_FMA|IF_FUTURE},
- {I_VFMADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11883, IF_FMA|IF_FUTURE},
+ {I_VFMADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12628, IF_FMA|IF_FUTURE},
+ {I_VFMADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12635, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADD213SD[] = {
- {I_VFMADD213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12373, IF_FMA|IF_FUTURE},
+ {I_VFMADD213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13125, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADD213SS[] = {
- {I_VFMADD213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12366, IF_FMA|IF_FUTURE},
+ {I_VFMADD213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13118, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADD231PD[] = {
- {I_VFMADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11918, IF_FMA|IF_FUTURE},
- {I_VFMADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11925, IF_FMA|IF_FUTURE},
+ {I_VFMADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12670, IF_FMA|IF_FUTURE},
+ {I_VFMADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12677, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADD231PS[] = {
- {I_VFMADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11904, IF_FMA|IF_FUTURE},
- {I_VFMADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11911, IF_FMA|IF_FUTURE},
+ {I_VFMADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12656, IF_FMA|IF_FUTURE},
+ {I_VFMADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12663, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADD231SD[] = {
- {I_VFMADD231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12387, IF_FMA|IF_FUTURE},
+ {I_VFMADD231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13139, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADD231SS[] = {
- {I_VFMADD231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12380, IF_FMA|IF_FUTURE},
+ {I_VFMADD231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13132, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADD312PD[] = {
- {I_VFMADD312PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11862, IF_FMA|IF_FUTURE},
- {I_VFMADD312PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11869, IF_FMA|IF_FUTURE},
+ {I_VFMADD312PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12614, IF_FMA|IF_FUTURE},
+ {I_VFMADD312PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12621, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADD312PS[] = {
- {I_VFMADD312PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11848, IF_FMA|IF_FUTURE},
- {I_VFMADD312PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11855, IF_FMA|IF_FUTURE},
+ {I_VFMADD312PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12600, IF_FMA|IF_FUTURE},
+ {I_VFMADD312PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12607, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADD312SD[] = {
- {I_VFMADD312SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12359, IF_FMA|IF_FUTURE},
+ {I_VFMADD312SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13111, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADD312SS[] = {
- {I_VFMADD312SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12352, IF_FMA|IF_FUTURE},
+ {I_VFMADD312SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13104, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADD321PD[] = {
- {I_VFMADD321PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11918, IF_FMA|IF_FUTURE},
- {I_VFMADD321PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11925, IF_FMA|IF_FUTURE},
+ {I_VFMADD321PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12670, IF_FMA|IF_FUTURE},
+ {I_VFMADD321PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12677, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADD321PS[] = {
- {I_VFMADD321PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11904, IF_FMA|IF_FUTURE},
- {I_VFMADD321PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11911, IF_FMA|IF_FUTURE},
+ {I_VFMADD321PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12656, IF_FMA|IF_FUTURE},
+ {I_VFMADD321PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12663, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADD321SD[] = {
- {I_VFMADD321SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12387, IF_FMA|IF_FUTURE},
+ {I_VFMADD321SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13139, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADD321SS[] = {
- {I_VFMADD321SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12380, IF_FMA|IF_FUTURE},
+ {I_VFMADD321SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13132, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADDPD[] = {
- {I_VFMADDPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+3708, IF_AMD|IF_SSE5},
- {I_VFMADDPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+3717, IF_AMD|IF_SSE5},
- {I_VFMADDPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+3726, IF_AMD|IF_SSE5},
- {I_VFMADDPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+3735, IF_AMD|IF_SSE5},
- {I_VFMADDPD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+3744, IF_AMD|IF_SSE5},
- {I_VFMADDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+3753, IF_AMD|IF_SSE5},
- {I_VFMADDPD, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+3762, IF_AMD|IF_SSE5},
- {I_VFMADDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+3771, IF_AMD|IF_SSE5},
+ {I_VFMADDPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5346, IF_AMD|IF_SSE5},
+ {I_VFMADDPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5354, IF_AMD|IF_SSE5},
+ {I_VFMADDPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+5362, IF_AMD|IF_SSE5},
+ {I_VFMADDPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+5370, IF_AMD|IF_SSE5},
+ {I_VFMADDPD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+5378, IF_AMD|IF_SSE5},
+ {I_VFMADDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+5386, IF_AMD|IF_SSE5},
+ {I_VFMADDPD, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+5394, IF_AMD|IF_SSE5},
+ {I_VFMADDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+5402, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADDPS[] = {
- {I_VFMADDPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+3780, IF_AMD|IF_SSE5},
- {I_VFMADDPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+3789, IF_AMD|IF_SSE5},
- {I_VFMADDPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+3798, IF_AMD|IF_SSE5},
- {I_VFMADDPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+3807, IF_AMD|IF_SSE5},
- {I_VFMADDPS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+3816, IF_AMD|IF_SSE5},
- {I_VFMADDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+3825, IF_AMD|IF_SSE5},
- {I_VFMADDPS, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+3834, IF_AMD|IF_SSE5},
- {I_VFMADDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+3843, IF_AMD|IF_SSE5},
+ {I_VFMADDPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5410, IF_AMD|IF_SSE5},
+ {I_VFMADDPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5418, IF_AMD|IF_SSE5},
+ {I_VFMADDPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+5426, IF_AMD|IF_SSE5},
+ {I_VFMADDPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+5434, IF_AMD|IF_SSE5},
+ {I_VFMADDPS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+5442, IF_AMD|IF_SSE5},
+ {I_VFMADDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+5450, IF_AMD|IF_SSE5},
+ {I_VFMADDPS, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+5458, IF_AMD|IF_SSE5},
+ {I_VFMADDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+5466, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADDSD[] = {
- {I_VFMADDSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,XMMREG,0}, nasm_bytecodes+3852, IF_AMD|IF_SSE5},
- {I_VFMADDSD, 3, {XMMREG,RM_XMM|BITS64,XMMREG,0,0}, nasm_bytecodes+3861, IF_AMD|IF_SSE5},
- {I_VFMADDSD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS64,0}, nasm_bytecodes+3870, IF_AMD|IF_SSE5},
- {I_VFMADDSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3879, IF_AMD|IF_SSE5},
+ {I_VFMADDSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,XMMREG,0}, nasm_bytecodes+5474, IF_AMD|IF_SSE5},
+ {I_VFMADDSD, 3, {XMMREG,RM_XMM|BITS64,XMMREG,0,0}, nasm_bytecodes+5482, IF_AMD|IF_SSE5},
+ {I_VFMADDSD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS64,0}, nasm_bytecodes+5490, IF_AMD|IF_SSE5},
+ {I_VFMADDSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+5498, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADDSS[] = {
- {I_VFMADDSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,XMMREG,0}, nasm_bytecodes+3888, IF_AMD|IF_SSE5},
- {I_VFMADDSS, 3, {XMMREG,RM_XMM|BITS32,XMMREG,0,0}, nasm_bytecodes+3897, IF_AMD|IF_SSE5},
- {I_VFMADDSS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS32,0}, nasm_bytecodes+3906, IF_AMD|IF_SSE5},
- {I_VFMADDSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+3915, IF_AMD|IF_SSE5},
+ {I_VFMADDSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,XMMREG,0}, nasm_bytecodes+5506, IF_AMD|IF_SSE5},
+ {I_VFMADDSS, 3, {XMMREG,RM_XMM|BITS32,XMMREG,0,0}, nasm_bytecodes+5514, IF_AMD|IF_SSE5},
+ {I_VFMADDSS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS32,0}, nasm_bytecodes+5522, IF_AMD|IF_SSE5},
+ {I_VFMADDSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+5530, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADDSUB123PD[] = {
- {I_VFMADDSUB123PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11974, IF_FMA|IF_FUTURE},
- {I_VFMADDSUB123PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11981, IF_FMA|IF_FUTURE},
+ {I_VFMADDSUB123PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12726, IF_FMA|IF_FUTURE},
+ {I_VFMADDSUB123PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12733, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADDSUB123PS[] = {
- {I_VFMADDSUB123PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11960, IF_FMA|IF_FUTURE},
- {I_VFMADDSUB123PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11967, IF_FMA|IF_FUTURE},
+ {I_VFMADDSUB123PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12712, IF_FMA|IF_FUTURE},
+ {I_VFMADDSUB123PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12719, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADDSUB132PD[] = {
- {I_VFMADDSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11946, IF_FMA|IF_FUTURE},
- {I_VFMADDSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11953, IF_FMA|IF_FUTURE},
+ {I_VFMADDSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12698, IF_FMA|IF_FUTURE},
+ {I_VFMADDSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12705, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADDSUB132PS[] = {
- {I_VFMADDSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11932, IF_FMA|IF_FUTURE},
- {I_VFMADDSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11939, IF_FMA|IF_FUTURE},
+ {I_VFMADDSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12684, IF_FMA|IF_FUTURE},
+ {I_VFMADDSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12691, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADDSUB213PD[] = {
- {I_VFMADDSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11974, IF_FMA|IF_FUTURE},
- {I_VFMADDSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11981, IF_FMA|IF_FUTURE},
+ {I_VFMADDSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12726, IF_FMA|IF_FUTURE},
+ {I_VFMADDSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12733, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADDSUB213PS[] = {
- {I_VFMADDSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11960, IF_FMA|IF_FUTURE},
- {I_VFMADDSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11967, IF_FMA|IF_FUTURE},
+ {I_VFMADDSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12712, IF_FMA|IF_FUTURE},
+ {I_VFMADDSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12719, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADDSUB231PD[] = {
- {I_VFMADDSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12002, IF_FMA|IF_FUTURE},
- {I_VFMADDSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12009, IF_FMA|IF_FUTURE},
+ {I_VFMADDSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12754, IF_FMA|IF_FUTURE},
+ {I_VFMADDSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12761, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADDSUB231PS[] = {
- {I_VFMADDSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11988, IF_FMA|IF_FUTURE},
- {I_VFMADDSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11995, IF_FMA|IF_FUTURE},
+ {I_VFMADDSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12740, IF_FMA|IF_FUTURE},
+ {I_VFMADDSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12747, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADDSUB312PD[] = {
- {I_VFMADDSUB312PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11946, IF_FMA|IF_FUTURE},
- {I_VFMADDSUB312PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11953, IF_FMA|IF_FUTURE},
+ {I_VFMADDSUB312PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12698, IF_FMA|IF_FUTURE},
+ {I_VFMADDSUB312PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12705, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADDSUB312PS[] = {
- {I_VFMADDSUB312PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11932, IF_FMA|IF_FUTURE},
- {I_VFMADDSUB312PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11939, IF_FMA|IF_FUTURE},
+ {I_VFMADDSUB312PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12684, IF_FMA|IF_FUTURE},
+ {I_VFMADDSUB312PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12691, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADDSUB321PD[] = {
- {I_VFMADDSUB321PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12002, IF_FMA|IF_FUTURE},
- {I_VFMADDSUB321PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12009, IF_FMA|IF_FUTURE},
+ {I_VFMADDSUB321PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12754, IF_FMA|IF_FUTURE},
+ {I_VFMADDSUB321PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12761, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADDSUB321PS[] = {
- {I_VFMADDSUB321PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11988, IF_FMA|IF_FUTURE},
- {I_VFMADDSUB321PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11995, IF_FMA|IF_FUTURE},
+ {I_VFMADDSUB321PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12740, IF_FMA|IF_FUTURE},
+ {I_VFMADDSUB321PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12747, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADDSUBPD[] = {
- {I_VFMADDSUBPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+3924, IF_AMD|IF_SSE5},
- {I_VFMADDSUBPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+3933, IF_AMD|IF_SSE5},
- {I_VFMADDSUBPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+3942, IF_AMD|IF_SSE5},
- {I_VFMADDSUBPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+3951, IF_AMD|IF_SSE5},
- {I_VFMADDSUBPD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+3960, IF_AMD|IF_SSE5},
- {I_VFMADDSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+3969, IF_AMD|IF_SSE5},
- {I_VFMADDSUBPD, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+3978, IF_AMD|IF_SSE5},
- {I_VFMADDSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+3987, IF_AMD|IF_SSE5},
+ {I_VFMADDSUBPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5538, IF_AMD|IF_SSE5},
+ {I_VFMADDSUBPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5546, IF_AMD|IF_SSE5},
+ {I_VFMADDSUBPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+5554, IF_AMD|IF_SSE5},
+ {I_VFMADDSUBPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+5562, IF_AMD|IF_SSE5},
+ {I_VFMADDSUBPD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+5570, IF_AMD|IF_SSE5},
+ {I_VFMADDSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+5578, IF_AMD|IF_SSE5},
+ {I_VFMADDSUBPD, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+5586, IF_AMD|IF_SSE5},
+ {I_VFMADDSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+5594, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMADDSUBPS[] = {
- {I_VFMADDSUBPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+3996, IF_AMD|IF_SSE5},
- {I_VFMADDSUBPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4005, IF_AMD|IF_SSE5},
- {I_VFMADDSUBPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+4014, IF_AMD|IF_SSE5},
- {I_VFMADDSUBPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+4023, IF_AMD|IF_SSE5},
- {I_VFMADDSUBPS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+4032, IF_AMD|IF_SSE5},
- {I_VFMADDSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+4041, IF_AMD|IF_SSE5},
- {I_VFMADDSUBPS, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+4050, IF_AMD|IF_SSE5},
- {I_VFMADDSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+4059, IF_AMD|IF_SSE5},
+ {I_VFMADDSUBPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5602, IF_AMD|IF_SSE5},
+ {I_VFMADDSUBPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5610, IF_AMD|IF_SSE5},
+ {I_VFMADDSUBPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+5618, IF_AMD|IF_SSE5},
+ {I_VFMADDSUBPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+5626, IF_AMD|IF_SSE5},
+ {I_VFMADDSUBPS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+5634, IF_AMD|IF_SSE5},
+ {I_VFMADDSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+5642, IF_AMD|IF_SSE5},
+ {I_VFMADDSUBPS, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+5650, IF_AMD|IF_SSE5},
+ {I_VFMADDSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+5658, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUB123PD[] = {
- {I_VFMSUB123PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12058, IF_FMA|IF_FUTURE},
- {I_VFMSUB123PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12065, IF_FMA|IF_FUTURE},
+ {I_VFMSUB123PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12810, IF_FMA|IF_FUTURE},
+ {I_VFMSUB123PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12817, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUB123PS[] = {
- {I_VFMSUB123PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12044, IF_FMA|IF_FUTURE},
- {I_VFMSUB123PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12051, IF_FMA|IF_FUTURE},
+ {I_VFMSUB123PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12796, IF_FMA|IF_FUTURE},
+ {I_VFMSUB123PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12803, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUB123SD[] = {
- {I_VFMSUB123SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12415, IF_FMA|IF_FUTURE},
+ {I_VFMSUB123SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13167, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUB123SS[] = {
- {I_VFMSUB123SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12408, IF_FMA|IF_FUTURE},
+ {I_VFMSUB123SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13160, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUB132PD[] = {
- {I_VFMSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12030, IF_FMA|IF_FUTURE},
- {I_VFMSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12037, IF_FMA|IF_FUTURE},
+ {I_VFMSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12782, IF_FMA|IF_FUTURE},
+ {I_VFMSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12789, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUB132PS[] = {
- {I_VFMSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12016, IF_FMA|IF_FUTURE},
- {I_VFMSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12023, IF_FMA|IF_FUTURE},
+ {I_VFMSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12768, IF_FMA|IF_FUTURE},
+ {I_VFMSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12775, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUB132SD[] = {
- {I_VFMSUB132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12401, IF_FMA|IF_FUTURE},
+ {I_VFMSUB132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13153, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUB132SS[] = {
- {I_VFMSUB132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12394, IF_FMA|IF_FUTURE},
+ {I_VFMSUB132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13146, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUB213PD[] = {
- {I_VFMSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12058, IF_FMA|IF_FUTURE},
- {I_VFMSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12065, IF_FMA|IF_FUTURE},
+ {I_VFMSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12810, IF_FMA|IF_FUTURE},
+ {I_VFMSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12817, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUB213PS[] = {
- {I_VFMSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12044, IF_FMA|IF_FUTURE},
- {I_VFMSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12051, IF_FMA|IF_FUTURE},
+ {I_VFMSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12796, IF_FMA|IF_FUTURE},
+ {I_VFMSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12803, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUB213SD[] = {
- {I_VFMSUB213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12415, IF_FMA|IF_FUTURE},
+ {I_VFMSUB213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13167, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUB213SS[] = {
- {I_VFMSUB213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12408, IF_FMA|IF_FUTURE},
+ {I_VFMSUB213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13160, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUB231PD[] = {
- {I_VFMSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12086, IF_FMA|IF_FUTURE},
- {I_VFMSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12093, IF_FMA|IF_FUTURE},
+ {I_VFMSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12838, IF_FMA|IF_FUTURE},
+ {I_VFMSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12845, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUB231PS[] = {
- {I_VFMSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12072, IF_FMA|IF_FUTURE},
- {I_VFMSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12079, IF_FMA|IF_FUTURE},
+ {I_VFMSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12824, IF_FMA|IF_FUTURE},
+ {I_VFMSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12831, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUB231SD[] = {
- {I_VFMSUB231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12429, IF_FMA|IF_FUTURE},
+ {I_VFMSUB231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13181, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUB231SS[] = {
- {I_VFMSUB231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12422, IF_FMA|IF_FUTURE},
+ {I_VFMSUB231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13174, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUB312PD[] = {
- {I_VFMSUB312PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12030, IF_FMA|IF_FUTURE},
- {I_VFMSUB312PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12037, IF_FMA|IF_FUTURE},
+ {I_VFMSUB312PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12782, IF_FMA|IF_FUTURE},
+ {I_VFMSUB312PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12789, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUB312PS[] = {
- {I_VFMSUB312PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12016, IF_FMA|IF_FUTURE},
- {I_VFMSUB312PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12023, IF_FMA|IF_FUTURE},
+ {I_VFMSUB312PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12768, IF_FMA|IF_FUTURE},
+ {I_VFMSUB312PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12775, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUB312SD[] = {
- {I_VFMSUB312SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12401, IF_FMA|IF_FUTURE},
+ {I_VFMSUB312SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13153, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUB312SS[] = {
- {I_VFMSUB312SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12394, IF_FMA|IF_FUTURE},
+ {I_VFMSUB312SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13146, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUB321PD[] = {
- {I_VFMSUB321PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12086, IF_FMA|IF_FUTURE},
- {I_VFMSUB321PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12093, IF_FMA|IF_FUTURE},
+ {I_VFMSUB321PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12838, IF_FMA|IF_FUTURE},
+ {I_VFMSUB321PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12845, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUB321PS[] = {
- {I_VFMSUB321PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12072, IF_FMA|IF_FUTURE},
- {I_VFMSUB321PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12079, IF_FMA|IF_FUTURE},
+ {I_VFMSUB321PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12824, IF_FMA|IF_FUTURE},
+ {I_VFMSUB321PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12831, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUB321SD[] = {
- {I_VFMSUB321SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12429, IF_FMA|IF_FUTURE},
+ {I_VFMSUB321SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13181, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUB321SS[] = {
- {I_VFMSUB321SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12422, IF_FMA|IF_FUTURE},
+ {I_VFMSUB321SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13174, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUBADD123PD[] = {
- {I_VFMSUBADD123PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12142, IF_FMA|IF_FUTURE},
- {I_VFMSUBADD123PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12149, IF_FMA|IF_FUTURE},
+ {I_VFMSUBADD123PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12894, IF_FMA|IF_FUTURE},
+ {I_VFMSUBADD123PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12901, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUBADD123PS[] = {
- {I_VFMSUBADD123PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12128, IF_FMA|IF_FUTURE},
- {I_VFMSUBADD123PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12135, IF_FMA|IF_FUTURE},
+ {I_VFMSUBADD123PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12880, IF_FMA|IF_FUTURE},
+ {I_VFMSUBADD123PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12887, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUBADD132PD[] = {
- {I_VFMSUBADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12114, IF_FMA|IF_FUTURE},
- {I_VFMSUBADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12121, IF_FMA|IF_FUTURE},
+ {I_VFMSUBADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12866, IF_FMA|IF_FUTURE},
+ {I_VFMSUBADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12873, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUBADD132PS[] = {
- {I_VFMSUBADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12100, IF_FMA|IF_FUTURE},
- {I_VFMSUBADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12107, IF_FMA|IF_FUTURE},
+ {I_VFMSUBADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12852, IF_FMA|IF_FUTURE},
+ {I_VFMSUBADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12859, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUBADD213PD[] = {
- {I_VFMSUBADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12142, IF_FMA|IF_FUTURE},
- {I_VFMSUBADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12149, IF_FMA|IF_FUTURE},
+ {I_VFMSUBADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12894, IF_FMA|IF_FUTURE},
+ {I_VFMSUBADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12901, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUBADD213PS[] = {
- {I_VFMSUBADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12128, IF_FMA|IF_FUTURE},
- {I_VFMSUBADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12135, IF_FMA|IF_FUTURE},
+ {I_VFMSUBADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12880, IF_FMA|IF_FUTURE},
+ {I_VFMSUBADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12887, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUBADD231PD[] = {
- {I_VFMSUBADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12170, IF_FMA|IF_FUTURE},
- {I_VFMSUBADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12177, IF_FMA|IF_FUTURE},
+ {I_VFMSUBADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12922, IF_FMA|IF_FUTURE},
+ {I_VFMSUBADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12929, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUBADD231PS[] = {
- {I_VFMSUBADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12156, IF_FMA|IF_FUTURE},
- {I_VFMSUBADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12163, IF_FMA|IF_FUTURE},
+ {I_VFMSUBADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12908, IF_FMA|IF_FUTURE},
+ {I_VFMSUBADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12915, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUBADD312PD[] = {
- {I_VFMSUBADD312PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12114, IF_FMA|IF_FUTURE},
- {I_VFMSUBADD312PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12121, IF_FMA|IF_FUTURE},
+ {I_VFMSUBADD312PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12866, IF_FMA|IF_FUTURE},
+ {I_VFMSUBADD312PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12873, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUBADD312PS[] = {
- {I_VFMSUBADD312PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12100, IF_FMA|IF_FUTURE},
- {I_VFMSUBADD312PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12107, IF_FMA|IF_FUTURE},
+ {I_VFMSUBADD312PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12852, IF_FMA|IF_FUTURE},
+ {I_VFMSUBADD312PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12859, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUBADD321PD[] = {
- {I_VFMSUBADD321PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12170, IF_FMA|IF_FUTURE},
- {I_VFMSUBADD321PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12177, IF_FMA|IF_FUTURE},
+ {I_VFMSUBADD321PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12922, IF_FMA|IF_FUTURE},
+ {I_VFMSUBADD321PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12929, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUBADD321PS[] = {
- {I_VFMSUBADD321PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12156, IF_FMA|IF_FUTURE},
- {I_VFMSUBADD321PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12163, IF_FMA|IF_FUTURE},
+ {I_VFMSUBADD321PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12908, IF_FMA|IF_FUTURE},
+ {I_VFMSUBADD321PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12915, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUBADDPD[] = {
- {I_VFMSUBADDPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4068, IF_AMD|IF_SSE5},
- {I_VFMSUBADDPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4077, IF_AMD|IF_SSE5},
- {I_VFMSUBADDPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+4086, IF_AMD|IF_SSE5},
- {I_VFMSUBADDPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+4095, IF_AMD|IF_SSE5},
- {I_VFMSUBADDPD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+4104, IF_AMD|IF_SSE5},
- {I_VFMSUBADDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+4113, IF_AMD|IF_SSE5},
- {I_VFMSUBADDPD, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+4122, IF_AMD|IF_SSE5},
- {I_VFMSUBADDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+4131, IF_AMD|IF_SSE5},
+ {I_VFMSUBADDPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5666, IF_AMD|IF_SSE5},
+ {I_VFMSUBADDPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5674, IF_AMD|IF_SSE5},
+ {I_VFMSUBADDPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+5682, IF_AMD|IF_SSE5},
+ {I_VFMSUBADDPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+5690, IF_AMD|IF_SSE5},
+ {I_VFMSUBADDPD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+5698, IF_AMD|IF_SSE5},
+ {I_VFMSUBADDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+5706, IF_AMD|IF_SSE5},
+ {I_VFMSUBADDPD, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+5714, IF_AMD|IF_SSE5},
+ {I_VFMSUBADDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+5722, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUBADDPS[] = {
- {I_VFMSUBADDPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4140, IF_AMD|IF_SSE5},
- {I_VFMSUBADDPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4149, IF_AMD|IF_SSE5},
- {I_VFMSUBADDPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+4158, IF_AMD|IF_SSE5},
- {I_VFMSUBADDPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+4167, IF_AMD|IF_SSE5},
- {I_VFMSUBADDPS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+4176, IF_AMD|IF_SSE5},
- {I_VFMSUBADDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+4185, IF_AMD|IF_SSE5},
- {I_VFMSUBADDPS, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+4194, IF_AMD|IF_SSE5},
- {I_VFMSUBADDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+4203, IF_AMD|IF_SSE5},
+ {I_VFMSUBADDPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5730, IF_AMD|IF_SSE5},
+ {I_VFMSUBADDPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5738, IF_AMD|IF_SSE5},
+ {I_VFMSUBADDPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+5746, IF_AMD|IF_SSE5},
+ {I_VFMSUBADDPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+5754, IF_AMD|IF_SSE5},
+ {I_VFMSUBADDPS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+5762, IF_AMD|IF_SSE5},
+ {I_VFMSUBADDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+5770, IF_AMD|IF_SSE5},
+ {I_VFMSUBADDPS, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+5778, IF_AMD|IF_SSE5},
+ {I_VFMSUBADDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+5786, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUBPD[] = {
- {I_VFMSUBPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4212, IF_AMD|IF_SSE5},
- {I_VFMSUBPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4221, IF_AMD|IF_SSE5},
- {I_VFMSUBPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+4230, IF_AMD|IF_SSE5},
- {I_VFMSUBPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+4239, IF_AMD|IF_SSE5},
- {I_VFMSUBPD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+4248, IF_AMD|IF_SSE5},
- {I_VFMSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+4257, IF_AMD|IF_SSE5},
- {I_VFMSUBPD, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+4266, IF_AMD|IF_SSE5},
- {I_VFMSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+4275, IF_AMD|IF_SSE5},
+ {I_VFMSUBPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5794, IF_AMD|IF_SSE5},
+ {I_VFMSUBPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5802, IF_AMD|IF_SSE5},
+ {I_VFMSUBPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+5810, IF_AMD|IF_SSE5},
+ {I_VFMSUBPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+5818, IF_AMD|IF_SSE5},
+ {I_VFMSUBPD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+5826, IF_AMD|IF_SSE5},
+ {I_VFMSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+5834, IF_AMD|IF_SSE5},
+ {I_VFMSUBPD, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+5842, IF_AMD|IF_SSE5},
+ {I_VFMSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+5850, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUBPS[] = {
- {I_VFMSUBPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4284, IF_AMD|IF_SSE5},
- {I_VFMSUBPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4293, IF_AMD|IF_SSE5},
- {I_VFMSUBPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+4302, IF_AMD|IF_SSE5},
- {I_VFMSUBPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+4311, IF_AMD|IF_SSE5},
- {I_VFMSUBPS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+4320, IF_AMD|IF_SSE5},
- {I_VFMSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+4329, IF_AMD|IF_SSE5},
- {I_VFMSUBPS, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+4338, IF_AMD|IF_SSE5},
- {I_VFMSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+4347, IF_AMD|IF_SSE5},
+ {I_VFMSUBPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5858, IF_AMD|IF_SSE5},
+ {I_VFMSUBPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5866, IF_AMD|IF_SSE5},
+ {I_VFMSUBPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+5874, IF_AMD|IF_SSE5},
+ {I_VFMSUBPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+5882, IF_AMD|IF_SSE5},
+ {I_VFMSUBPS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+5890, IF_AMD|IF_SSE5},
+ {I_VFMSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+5898, IF_AMD|IF_SSE5},
+ {I_VFMSUBPS, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+5906, IF_AMD|IF_SSE5},
+ {I_VFMSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+5914, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUBSD[] = {
- {I_VFMSUBSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,XMMREG,0}, nasm_bytecodes+4356, IF_AMD|IF_SSE5},
- {I_VFMSUBSD, 3, {XMMREG,RM_XMM|BITS64,XMMREG,0,0}, nasm_bytecodes+4365, IF_AMD|IF_SSE5},
- {I_VFMSUBSD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS64,0}, nasm_bytecodes+4374, IF_AMD|IF_SSE5},
- {I_VFMSUBSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+4383, IF_AMD|IF_SSE5},
+ {I_VFMSUBSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,XMMREG,0}, nasm_bytecodes+5922, IF_AMD|IF_SSE5},
+ {I_VFMSUBSD, 3, {XMMREG,RM_XMM|BITS64,XMMREG,0,0}, nasm_bytecodes+5930, IF_AMD|IF_SSE5},
+ {I_VFMSUBSD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS64,0}, nasm_bytecodes+5938, IF_AMD|IF_SSE5},
+ {I_VFMSUBSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+5946, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VFMSUBSS[] = {
- {I_VFMSUBSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,XMMREG,0}, nasm_bytecodes+4392, IF_AMD|IF_SSE5},
- {I_VFMSUBSS, 3, {XMMREG,RM_XMM|BITS32,XMMREG,0,0}, nasm_bytecodes+4401, IF_AMD|IF_SSE5},
- {I_VFMSUBSS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS32,0}, nasm_bytecodes+4410, IF_AMD|IF_SSE5},
- {I_VFMSUBSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+4419, IF_AMD|IF_SSE5},
+ {I_VFMSUBSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,XMMREG,0}, nasm_bytecodes+5954, IF_AMD|IF_SSE5},
+ {I_VFMSUBSS, 3, {XMMREG,RM_XMM|BITS32,XMMREG,0,0}, nasm_bytecodes+5962, IF_AMD|IF_SSE5},
+ {I_VFMSUBSS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS32,0}, nasm_bytecodes+5970, IF_AMD|IF_SSE5},
+ {I_VFMSUBSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+5978, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADD123PD[] = {
- {I_VFNMADD123PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12226, IF_FMA|IF_FUTURE},
- {I_VFNMADD123PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12233, IF_FMA|IF_FUTURE},
+ {I_VFNMADD123PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12978, IF_FMA|IF_FUTURE},
+ {I_VFNMADD123PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12985, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADD123PS[] = {
- {I_VFNMADD123PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12212, IF_FMA|IF_FUTURE},
- {I_VFNMADD123PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12219, IF_FMA|IF_FUTURE},
+ {I_VFNMADD123PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12964, IF_FMA|IF_FUTURE},
+ {I_VFNMADD123PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12971, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADD123SD[] = {
- {I_VFNMADD123SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12457, IF_FMA|IF_FUTURE},
+ {I_VFNMADD123SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13209, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADD123SS[] = {
- {I_VFNMADD123SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12450, IF_FMA|IF_FUTURE},
+ {I_VFNMADD123SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13202, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADD132PD[] = {
- {I_VFNMADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12198, IF_FMA|IF_FUTURE},
- {I_VFNMADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12205, IF_FMA|IF_FUTURE},
+ {I_VFNMADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12950, IF_FMA|IF_FUTURE},
+ {I_VFNMADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12957, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADD132PS[] = {
- {I_VFNMADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12184, IF_FMA|IF_FUTURE},
- {I_VFNMADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12191, IF_FMA|IF_FUTURE},
+ {I_VFNMADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12936, IF_FMA|IF_FUTURE},
+ {I_VFNMADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12943, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADD132SD[] = {
- {I_VFNMADD132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12443, IF_FMA|IF_FUTURE},
+ {I_VFNMADD132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13195, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADD132SS[] = {
- {I_VFNMADD132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12436, IF_FMA|IF_FUTURE},
+ {I_VFNMADD132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13188, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADD213PD[] = {
- {I_VFNMADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12226, IF_FMA|IF_FUTURE},
- {I_VFNMADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12233, IF_FMA|IF_FUTURE},
+ {I_VFNMADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12978, IF_FMA|IF_FUTURE},
+ {I_VFNMADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12985, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADD213PS[] = {
- {I_VFNMADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12212, IF_FMA|IF_FUTURE},
- {I_VFNMADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12219, IF_FMA|IF_FUTURE},
+ {I_VFNMADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12964, IF_FMA|IF_FUTURE},
+ {I_VFNMADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12971, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADD213SD[] = {
- {I_VFNMADD213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12457, IF_FMA|IF_FUTURE},
+ {I_VFNMADD213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13209, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADD213SS[] = {
- {I_VFNMADD213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12450, IF_FMA|IF_FUTURE},
+ {I_VFNMADD213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13202, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADD231PD[] = {
- {I_VFNMADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12254, IF_FMA|IF_FUTURE},
- {I_VFNMADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12261, IF_FMA|IF_FUTURE},
+ {I_VFNMADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13006, IF_FMA|IF_FUTURE},
+ {I_VFNMADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13013, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADD231PS[] = {
- {I_VFNMADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12240, IF_FMA|IF_FUTURE},
- {I_VFNMADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12247, IF_FMA|IF_FUTURE},
+ {I_VFNMADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12992, IF_FMA|IF_FUTURE},
+ {I_VFNMADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12999, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADD231SD[] = {
- {I_VFNMADD231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12471, IF_FMA|IF_FUTURE},
+ {I_VFNMADD231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13223, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADD231SS[] = {
- {I_VFNMADD231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12464, IF_FMA|IF_FUTURE},
+ {I_VFNMADD231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13216, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADD312PD[] = {
- {I_VFNMADD312PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12198, IF_FMA|IF_FUTURE},
- {I_VFNMADD312PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12205, IF_FMA|IF_FUTURE},
+ {I_VFNMADD312PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12950, IF_FMA|IF_FUTURE},
+ {I_VFNMADD312PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12957, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADD312PS[] = {
- {I_VFNMADD312PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12184, IF_FMA|IF_FUTURE},
- {I_VFNMADD312PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12191, IF_FMA|IF_FUTURE},
+ {I_VFNMADD312PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12936, IF_FMA|IF_FUTURE},
+ {I_VFNMADD312PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12943, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADD312SD[] = {
- {I_VFNMADD312SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12443, IF_FMA|IF_FUTURE},
+ {I_VFNMADD312SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13195, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADD312SS[] = {
- {I_VFNMADD312SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12436, IF_FMA|IF_FUTURE},
+ {I_VFNMADD312SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13188, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADD321PD[] = {
- {I_VFNMADD321PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12254, IF_FMA|IF_FUTURE},
- {I_VFNMADD321PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12261, IF_FMA|IF_FUTURE},
+ {I_VFNMADD321PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13006, IF_FMA|IF_FUTURE},
+ {I_VFNMADD321PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13013, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADD321PS[] = {
- {I_VFNMADD321PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12240, IF_FMA|IF_FUTURE},
- {I_VFNMADD321PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12247, IF_FMA|IF_FUTURE},
+ {I_VFNMADD321PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12992, IF_FMA|IF_FUTURE},
+ {I_VFNMADD321PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12999, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADD321SD[] = {
- {I_VFNMADD321SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12471, IF_FMA|IF_FUTURE},
+ {I_VFNMADD321SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13223, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADD321SS[] = {
- {I_VFNMADD321SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12464, IF_FMA|IF_FUTURE},
+ {I_VFNMADD321SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13216, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADDPD[] = {
- {I_VFNMADDPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4428, IF_AMD|IF_SSE5},
- {I_VFNMADDPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4437, IF_AMD|IF_SSE5},
- {I_VFNMADDPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+4446, IF_AMD|IF_SSE5},
- {I_VFNMADDPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+4455, IF_AMD|IF_SSE5},
- {I_VFNMADDPD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+4464, IF_AMD|IF_SSE5},
- {I_VFNMADDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+4473, IF_AMD|IF_SSE5},
- {I_VFNMADDPD, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+4482, IF_AMD|IF_SSE5},
- {I_VFNMADDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+4491, IF_AMD|IF_SSE5},
+ {I_VFNMADDPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5986, IF_AMD|IF_SSE5},
+ {I_VFNMADDPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5994, IF_AMD|IF_SSE5},
+ {I_VFNMADDPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+6002, IF_AMD|IF_SSE5},
+ {I_VFNMADDPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+6010, IF_AMD|IF_SSE5},
+ {I_VFNMADDPD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+6018, IF_AMD|IF_SSE5},
+ {I_VFNMADDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+6026, IF_AMD|IF_SSE5},
+ {I_VFNMADDPD, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+6034, IF_AMD|IF_SSE5},
+ {I_VFNMADDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+6042, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADDPS[] = {
- {I_VFNMADDPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4500, IF_AMD|IF_SSE5},
- {I_VFNMADDPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4509, IF_AMD|IF_SSE5},
- {I_VFNMADDPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+4518, IF_AMD|IF_SSE5},
- {I_VFNMADDPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+4527, IF_AMD|IF_SSE5},
- {I_VFNMADDPS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+4536, IF_AMD|IF_SSE5},
- {I_VFNMADDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+4545, IF_AMD|IF_SSE5},
- {I_VFNMADDPS, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+4554, IF_AMD|IF_SSE5},
- {I_VFNMADDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+4563, IF_AMD|IF_SSE5},
+ {I_VFNMADDPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6050, IF_AMD|IF_SSE5},
+ {I_VFNMADDPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6058, IF_AMD|IF_SSE5},
+ {I_VFNMADDPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+6066, IF_AMD|IF_SSE5},
+ {I_VFNMADDPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+6074, IF_AMD|IF_SSE5},
+ {I_VFNMADDPS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+6082, IF_AMD|IF_SSE5},
+ {I_VFNMADDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+6090, IF_AMD|IF_SSE5},
+ {I_VFNMADDPS, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+6098, IF_AMD|IF_SSE5},
+ {I_VFNMADDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+6106, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADDSD[] = {
- {I_VFNMADDSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,XMMREG,0}, nasm_bytecodes+4572, IF_AMD|IF_SSE5},
- {I_VFNMADDSD, 3, {XMMREG,RM_XMM|BITS64,XMMREG,0,0}, nasm_bytecodes+4581, IF_AMD|IF_SSE5},
- {I_VFNMADDSD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS64,0}, nasm_bytecodes+4590, IF_AMD|IF_SSE5},
- {I_VFNMADDSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+4599, IF_AMD|IF_SSE5},
+ {I_VFNMADDSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,XMMREG,0}, nasm_bytecodes+6114, IF_AMD|IF_SSE5},
+ {I_VFNMADDSD, 3, {XMMREG,RM_XMM|BITS64,XMMREG,0,0}, nasm_bytecodes+6122, IF_AMD|IF_SSE5},
+ {I_VFNMADDSD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS64,0}, nasm_bytecodes+6130, IF_AMD|IF_SSE5},
+ {I_VFNMADDSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+6138, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMADDSS[] = {
- {I_VFNMADDSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,XMMREG,0}, nasm_bytecodes+4608, IF_AMD|IF_SSE5},
- {I_VFNMADDSS, 3, {XMMREG,RM_XMM|BITS32,XMMREG,0,0}, nasm_bytecodes+4617, IF_AMD|IF_SSE5},
- {I_VFNMADDSS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS32,0}, nasm_bytecodes+4626, IF_AMD|IF_SSE5},
- {I_VFNMADDSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+4635, IF_AMD|IF_SSE5},
+ {I_VFNMADDSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,XMMREG,0}, nasm_bytecodes+6146, IF_AMD|IF_SSE5},
+ {I_VFNMADDSS, 3, {XMMREG,RM_XMM|BITS32,XMMREG,0,0}, nasm_bytecodes+6154, IF_AMD|IF_SSE5},
+ {I_VFNMADDSS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS32,0}, nasm_bytecodes+6162, IF_AMD|IF_SSE5},
+ {I_VFNMADDSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+6170, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUB123PD[] = {
- {I_VFNMSUB123PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12310, IF_FMA|IF_FUTURE},
- {I_VFNMSUB123PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12317, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB123PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13062, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB123PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13069, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUB123PS[] = {
- {I_VFNMSUB123PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12296, IF_FMA|IF_FUTURE},
- {I_VFNMSUB123PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12303, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB123PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13048, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB123PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13055, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUB123SD[] = {
- {I_VFNMSUB123SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12499, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB123SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13251, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUB123SS[] = {
- {I_VFNMSUB123SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12492, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB123SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13244, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUB132PD[] = {
- {I_VFNMSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12282, IF_FMA|IF_FUTURE},
- {I_VFNMSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12289, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13034, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13041, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUB132PS[] = {
- {I_VFNMSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12268, IF_FMA|IF_FUTURE},
- {I_VFNMSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12275, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13020, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13027, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUB132SD[] = {
- {I_VFNMSUB132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12485, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13237, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUB132SS[] = {
- {I_VFNMSUB132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12478, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13230, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUB213PD[] = {
- {I_VFNMSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12310, IF_FMA|IF_FUTURE},
- {I_VFNMSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12317, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13062, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13069, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUB213PS[] = {
- {I_VFNMSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12296, IF_FMA|IF_FUTURE},
- {I_VFNMSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12303, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13048, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13055, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUB213SD[] = {
- {I_VFNMSUB213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12499, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13251, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUB213SS[] = {
- {I_VFNMSUB213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12492, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13244, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUB231PD[] = {
- {I_VFNMSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12338, IF_FMA|IF_FUTURE},
- {I_VFNMSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12345, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13090, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13097, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUB231PS[] = {
- {I_VFNMSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12324, IF_FMA|IF_FUTURE},
- {I_VFNMSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12331, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13076, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13083, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUB231SD[] = {
- {I_VFNMSUB231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12513, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13265, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUB231SS[] = {
- {I_VFNMSUB231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12506, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13258, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUB312PD[] = {
- {I_VFNMSUB312PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12282, IF_FMA|IF_FUTURE},
- {I_VFNMSUB312PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12289, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB312PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13034, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB312PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13041, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUB312PS[] = {
- {I_VFNMSUB312PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12268, IF_FMA|IF_FUTURE},
- {I_VFNMSUB312PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12275, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB312PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13020, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB312PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13027, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUB312SD[] = {
- {I_VFNMSUB312SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12485, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB312SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13237, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUB312SS[] = {
- {I_VFNMSUB312SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12478, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB312SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13230, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUB321PD[] = {
- {I_VFNMSUB321PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12338, IF_FMA|IF_FUTURE},
- {I_VFNMSUB321PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12345, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB321PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13090, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB321PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13097, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUB321PS[] = {
- {I_VFNMSUB321PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12324, IF_FMA|IF_FUTURE},
- {I_VFNMSUB321PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12331, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB321PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13076, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB321PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13083, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUB321SD[] = {
- {I_VFNMSUB321SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12513, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB321SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13265, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUB321SS[] = {
- {I_VFNMSUB321SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12506, IF_FMA|IF_FUTURE},
+ {I_VFNMSUB321SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13258, IF_FMA|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUBPD[] = {
- {I_VFNMSUBPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4644, IF_AMD|IF_SSE5},
- {I_VFNMSUBPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4653, IF_AMD|IF_SSE5},
- {I_VFNMSUBPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+4662, IF_AMD|IF_SSE5},
- {I_VFNMSUBPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+4671, IF_AMD|IF_SSE5},
- {I_VFNMSUBPD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+4680, IF_AMD|IF_SSE5},
- {I_VFNMSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+4689, IF_AMD|IF_SSE5},
- {I_VFNMSUBPD, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+4698, IF_AMD|IF_SSE5},
- {I_VFNMSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+4707, IF_AMD|IF_SSE5},
+ {I_VFNMSUBPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6178, IF_AMD|IF_SSE5},
+ {I_VFNMSUBPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6186, IF_AMD|IF_SSE5},
+ {I_VFNMSUBPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+6194, IF_AMD|IF_SSE5},
+ {I_VFNMSUBPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+6202, IF_AMD|IF_SSE5},
+ {I_VFNMSUBPD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+6210, IF_AMD|IF_SSE5},
+ {I_VFNMSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+6218, IF_AMD|IF_SSE5},
+ {I_VFNMSUBPD, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+6226, IF_AMD|IF_SSE5},
+ {I_VFNMSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+6234, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUBPS[] = {
- {I_VFNMSUBPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4716, IF_AMD|IF_SSE5},
- {I_VFNMSUBPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4725, IF_AMD|IF_SSE5},
- {I_VFNMSUBPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+4734, IF_AMD|IF_SSE5},
- {I_VFNMSUBPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+4743, IF_AMD|IF_SSE5},
- {I_VFNMSUBPS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+4752, IF_AMD|IF_SSE5},
- {I_VFNMSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+4761, IF_AMD|IF_SSE5},
- {I_VFNMSUBPS, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+4770, IF_AMD|IF_SSE5},
- {I_VFNMSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+4779, IF_AMD|IF_SSE5},
+ {I_VFNMSUBPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6242, IF_AMD|IF_SSE5},
+ {I_VFNMSUBPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6250, IF_AMD|IF_SSE5},
+ {I_VFNMSUBPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+6258, IF_AMD|IF_SSE5},
+ {I_VFNMSUBPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+6266, IF_AMD|IF_SSE5},
+ {I_VFNMSUBPS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+6274, IF_AMD|IF_SSE5},
+ {I_VFNMSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+6282, IF_AMD|IF_SSE5},
+ {I_VFNMSUBPS, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+6290, IF_AMD|IF_SSE5},
+ {I_VFNMSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+6298, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUBSD[] = {
- {I_VFNMSUBSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,XMMREG,0}, nasm_bytecodes+4788, IF_AMD|IF_SSE5},
- {I_VFNMSUBSD, 3, {XMMREG,RM_XMM|BITS64,XMMREG,0,0}, nasm_bytecodes+4797, IF_AMD|IF_SSE5},
- {I_VFNMSUBSD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS64,0}, nasm_bytecodes+4806, IF_AMD|IF_SSE5},
- {I_VFNMSUBSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+4815, IF_AMD|IF_SSE5},
+ {I_VFNMSUBSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,XMMREG,0}, nasm_bytecodes+6306, IF_AMD|IF_SSE5},
+ {I_VFNMSUBSD, 3, {XMMREG,RM_XMM|BITS64,XMMREG,0,0}, nasm_bytecodes+6314, IF_AMD|IF_SSE5},
+ {I_VFNMSUBSD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS64,0}, nasm_bytecodes+6322, IF_AMD|IF_SSE5},
+ {I_VFNMSUBSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+6330, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VFNMSUBSS[] = {
- {I_VFNMSUBSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,XMMREG,0}, nasm_bytecodes+4824, IF_AMD|IF_SSE5},
- {I_VFNMSUBSS, 3, {XMMREG,RM_XMM|BITS32,XMMREG,0,0}, nasm_bytecodes+4833, IF_AMD|IF_SSE5},
- {I_VFNMSUBSS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS32,0}, nasm_bytecodes+4842, IF_AMD|IF_SSE5},
- {I_VFNMSUBSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+4851, IF_AMD|IF_SSE5},
+ {I_VFNMSUBSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,XMMREG,0}, nasm_bytecodes+6338, IF_AMD|IF_SSE5},
+ {I_VFNMSUBSS, 3, {XMMREG,RM_XMM|BITS32,XMMREG,0,0}, nasm_bytecodes+6346, IF_AMD|IF_SSE5},
+ {I_VFNMSUBSS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS32,0}, nasm_bytecodes+6354, IF_AMD|IF_SSE5},
+ {I_VFNMSUBSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+6362, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VFRCZPD[] = {
- {I_VFRCZPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12590, IF_AMD|IF_SSE5},
- {I_VFRCZPD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12597, IF_AMD|IF_SSE5},
- {I_VFRCZPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12604, IF_AMD|IF_SSE5},
- {I_VFRCZPD, 1, {YMMREG,0,0,0,0}, nasm_bytecodes+12611, IF_AMD|IF_SSE5},
+ {I_VFRCZPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13370, IF_AMD|IF_SSE5},
+ {I_VFRCZPD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13377, IF_AMD|IF_SSE5},
+ {I_VFRCZPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+13384, IF_AMD|IF_SSE5},
+ {I_VFRCZPD, 1, {YMMREG,0,0,0,0}, nasm_bytecodes+13391, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VFRCZPS[] = {
- {I_VFRCZPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12618, IF_AMD|IF_SSE5},
- {I_VFRCZPS, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12625, IF_AMD|IF_SSE5},
- {I_VFRCZPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12632, IF_AMD|IF_SSE5},
- {I_VFRCZPS, 1, {YMMREG,0,0,0,0}, nasm_bytecodes+12639, IF_AMD|IF_SSE5},
+ {I_VFRCZPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13398, IF_AMD|IF_SSE5},
+ {I_VFRCZPS, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13405, IF_AMD|IF_SSE5},
+ {I_VFRCZPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+13412, IF_AMD|IF_SSE5},
+ {I_VFRCZPS, 1, {YMMREG,0,0,0,0}, nasm_bytecodes+13419, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VFRCZSD[] = {
- {I_VFRCZSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+12646, IF_AMD|IF_SSE5},
- {I_VFRCZSD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12653, IF_AMD|IF_SSE5},
+ {I_VFRCZSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+13426, IF_AMD|IF_SSE5},
+ {I_VFRCZSD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13433, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VFRCZSS[] = {
- {I_VFRCZSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+12660, IF_AMD|IF_SSE5},
- {I_VFRCZSS, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12667, IF_AMD|IF_SSE5},
+ {I_VFRCZSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+13440, IF_AMD|IF_SSE5},
+ {I_VFRCZSS, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13447, IF_AMD|IF_SSE5},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGATHERDPD[] = {
+ {I_VGATHERDPD, 3, {XMMREG,MEMORY|BITS64,XMMREG,0,0}, nasm_bytecodes+7178, IF_FUTURE|IF_AVX2},
+ {I_VGATHERDPD, 3, {YMMREG,MEMORY|BITS64,YMMREG,0,0}, nasm_bytecodes+7194, IF_FUTURE|IF_AVX2},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGATHERDPS[] = {
+ {I_VGATHERDPS, 3, {XMMREG,MEMORY|BITS32,XMMREG,0,0}, nasm_bytecodes+7210, IF_FUTURE|IF_AVX2},
+ {I_VGATHERDPS, 3, {YMMREG,MEMORY|BITS32,YMMREG,0,0}, nasm_bytecodes+7226, IF_FUTURE|IF_AVX2},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGATHERQPD[] = {
+ {I_VGATHERQPD, 3, {XMMREG,MEMORY|BITS64,XMMREG,0,0}, nasm_bytecodes+7186, IF_FUTURE|IF_AVX2},
+ {I_VGATHERQPD, 3, {YMMREG,MEMORY|BITS64,YMMREG,0,0}, nasm_bytecodes+7202, IF_FUTURE|IF_AVX2},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VGATHERQPS[] = {
+ {I_VGATHERQPS, 3, {XMMREG,MEMORY|BITS32,XMMREG,0,0}, nasm_bytecodes+7218, IF_FUTURE|IF_AVX2},
+ {I_VGATHERQPS, 3, {XMMREG,MEMORY|BITS32,XMMREG,0,0}, nasm_bytecodes+7234, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VHADDPD[] = {
- {I_VHADDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9125, IF_AVX|IF_SANDYBRIDGE},
- {I_VHADDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9132, IF_AVX|IF_SANDYBRIDGE},
- {I_VHADDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9139, IF_AVX|IF_SANDYBRIDGE},
- {I_VHADDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9146, IF_AVX|IF_SANDYBRIDGE},
+ {I_VHADDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9877, IF_AVX|IF_SANDYBRIDGE},
+ {I_VHADDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9884, IF_AVX|IF_SANDYBRIDGE},
+ {I_VHADDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9891, IF_AVX|IF_SANDYBRIDGE},
+ {I_VHADDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9898, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VHADDPS[] = {
- {I_VHADDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9153, IF_AVX|IF_SANDYBRIDGE},
- {I_VHADDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9160, IF_AVX|IF_SANDYBRIDGE},
- {I_VHADDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9167, IF_AVX|IF_SANDYBRIDGE},
- {I_VHADDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9174, IF_AVX|IF_SANDYBRIDGE},
+ {I_VHADDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9905, IF_AVX|IF_SANDYBRIDGE},
+ {I_VHADDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9912, IF_AVX|IF_SANDYBRIDGE},
+ {I_VHADDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9919, IF_AVX|IF_SANDYBRIDGE},
+ {I_VHADDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9926, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VHSUBPD[] = {
- {I_VHSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9181, IF_AVX|IF_SANDYBRIDGE},
- {I_VHSUBPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9188, IF_AVX|IF_SANDYBRIDGE},
- {I_VHSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9195, IF_AVX|IF_SANDYBRIDGE},
- {I_VHSUBPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9202, IF_AVX|IF_SANDYBRIDGE},
+ {I_VHSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9933, IF_AVX|IF_SANDYBRIDGE},
+ {I_VHSUBPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9940, IF_AVX|IF_SANDYBRIDGE},
+ {I_VHSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9947, IF_AVX|IF_SANDYBRIDGE},
+ {I_VHSUBPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9954, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VHSUBPS[] = {
- {I_VHSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9209, IF_AVX|IF_SANDYBRIDGE},
- {I_VHSUBPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9216, IF_AVX|IF_SANDYBRIDGE},
- {I_VHSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9223, IF_AVX|IF_SANDYBRIDGE},
- {I_VHSUBPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9230, IF_AVX|IF_SANDYBRIDGE},
+ {I_VHSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9961, IF_AVX|IF_SANDYBRIDGE},
+ {I_VHSUBPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9968, IF_AVX|IF_SANDYBRIDGE},
+ {I_VHSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9975, IF_AVX|IF_SANDYBRIDGE},
+ {I_VHSUBPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9982, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VINSERTF128[] = {
- {I_VINSERTF128, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6096, IF_AVX|IF_SANDYBRIDGE},
+ {I_VINSERTF128, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+4666, IF_AVX|IF_SANDYBRIDGE},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VINSERTI128[] = {
+ {I_VINSERTI128, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+7162, IF_FUTURE|IF_AVX2},
+ {I_VINSERTI128, 3, {YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7170, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VINSERTPS[] = {
- {I_VINSERTPS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, nasm_bytecodes+6104, IF_AVX|IF_SANDYBRIDGE},
- {I_VINSERTPS, 3, {XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6112, IF_AVX|IF_SANDYBRIDGE},
+ {I_VINSERTPS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, nasm_bytecodes+4674, IF_AVX|IF_SANDYBRIDGE},
+ {I_VINSERTPS, 3, {XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4682, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VLDDQU[] = {
- {I_VLDDQU, 2, {XMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+9237, IF_AVX|IF_SANDYBRIDGE},
- {I_VLDDQU, 2, {YMMREG,MEMORY|BITS256,0,0,0}, nasm_bytecodes+9244, IF_AVX|IF_SANDYBRIDGE},
+ {I_VLDDQU, 2, {XMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+9989, IF_AVX|IF_SANDYBRIDGE},
+ {I_VLDDQU, 2, {YMMREG,MEMORY|BITS256,0,0,0}, nasm_bytecodes+9996, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VLDMXCSR[] = {
- {I_VLDMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+9251, IF_AVX|IF_SANDYBRIDGE},
+ {I_VLDMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+10003, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VLDQQU[] = {
- {I_VLDQQU, 2, {YMMREG,MEMORY|BITS256,0,0,0}, nasm_bytecodes+9244, IF_AVX|IF_SANDYBRIDGE},
+ {I_VLDQQU, 2, {YMMREG,MEMORY|BITS256,0,0,0}, nasm_bytecodes+9996, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMASKMOVDQU[] = {
- {I_VMASKMOVDQU, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+9258, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMASKMOVDQU, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+10010, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMASKMOVPD[] = {
- {I_VMASKMOVPD, 3, {XMMREG,XMMREG,MEMORY|BITS128,0,0}, nasm_bytecodes+9293, IF_AVX|IF_SANDYBRIDGE},
- {I_VMASKMOVPD, 3, {YMMREG,YMMREG,MEMORY|BITS256,0,0}, nasm_bytecodes+9300, IF_AVX|IF_SANDYBRIDGE},
- {I_VMASKMOVPD, 3, {MEMORY|BITS128,XMMREG,XMMREG,0,0}, nasm_bytecodes+9307, IF_AVX|IF_SANDYBRIDGE},
- {I_VMASKMOVPD, 3, {MEMORY|BITS256,YMMREG,YMMREG,0,0}, nasm_bytecodes+9314, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMASKMOVPD, 3, {XMMREG,XMMREG,MEMORY|BITS128,0,0}, nasm_bytecodes+10045, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMASKMOVPD, 3, {YMMREG,YMMREG,MEMORY|BITS256,0,0}, nasm_bytecodes+10052, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMASKMOVPD, 3, {MEMORY|BITS128,XMMREG,XMMREG,0,0}, nasm_bytecodes+10059, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMASKMOVPD, 3, {MEMORY|BITS256,YMMREG,YMMREG,0,0}, nasm_bytecodes+10066, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMASKMOVPS[] = {
- {I_VMASKMOVPS, 3, {XMMREG,XMMREG,MEMORY|BITS128,0,0}, nasm_bytecodes+9265, IF_AVX|IF_SANDYBRIDGE},
- {I_VMASKMOVPS, 3, {YMMREG,YMMREG,MEMORY|BITS256,0,0}, nasm_bytecodes+9272, IF_AVX|IF_SANDYBRIDGE},
- {I_VMASKMOVPS, 3, {MEMORY|BITS128,XMMREG,XMMREG,0,0}, nasm_bytecodes+9279, IF_AVX|IF_SANDYBRIDGE|IF_SO},
- {I_VMASKMOVPS, 3, {MEMORY|BITS256,YMMREG,YMMREG,0,0}, nasm_bytecodes+9286, IF_AVX|IF_SANDYBRIDGE|IF_SY},
+ {I_VMASKMOVPS, 3, {XMMREG,XMMREG,MEMORY|BITS128,0,0}, nasm_bytecodes+10017, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMASKMOVPS, 3, {YMMREG,YMMREG,MEMORY|BITS256,0,0}, nasm_bytecodes+10024, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMASKMOVPS, 3, {MEMORY|BITS128,XMMREG,XMMREG,0,0}, nasm_bytecodes+10031, IF_AVX|IF_SANDYBRIDGE|IF_SO},
+ {I_VMASKMOVPS, 3, {MEMORY|BITS256,YMMREG,YMMREG,0,0}, nasm_bytecodes+10038, IF_AVX|IF_SANDYBRIDGE|IF_SY},
ITEMPLATE_END
};
static const struct itemplate instrux_VMAXPD[] = {
- {I_VMAXPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9321, IF_AVX|IF_SANDYBRIDGE},
- {I_VMAXPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9328, IF_AVX|IF_SANDYBRIDGE},
- {I_VMAXPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9335, IF_AVX|IF_SANDYBRIDGE},
- {I_VMAXPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9342, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMAXPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10073, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMAXPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10080, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMAXPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10087, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMAXPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10094, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMAXPS[] = {
- {I_VMAXPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9349, IF_AVX|IF_SANDYBRIDGE},
- {I_VMAXPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9356, IF_AVX|IF_SANDYBRIDGE},
- {I_VMAXPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9363, IF_AVX|IF_SANDYBRIDGE},
- {I_VMAXPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9370, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMAXPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10101, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMAXPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10108, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMAXPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10115, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMAXPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10122, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMAXSD[] = {
- {I_VMAXSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+9377, IF_AVX|IF_SANDYBRIDGE},
- {I_VMAXSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9384, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMAXSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+10129, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMAXSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+10136, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMAXSS[] = {
- {I_VMAXSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+9391, IF_AVX|IF_SANDYBRIDGE},
- {I_VMAXSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9398, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMAXSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+10143, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMAXSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+10150, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMCALL[] = {
- {I_VMCALL, 0, {0,0,0,0,0}, nasm_bytecodes+18582, IF_VMX},
+ {I_VMCALL, 0, {0,0,0,0,0}, nasm_bytecodes+21054, IF_VMX},
ITEMPLATE_END
};
static const struct itemplate instrux_VMCLEAR[] = {
- {I_VMCLEAR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+15524, IF_VMX},
+ {I_VMCLEAR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18115, IF_VMX},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VMFUNC[] = {
+ {I_VMFUNC, 0, {0,0,0,0,0}, nasm_bytecodes+21059, IF_VMX},
ITEMPLATE_END
};
static const struct itemplate instrux_VMINPD[] = {
- {I_VMINPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9405, IF_AVX|IF_SANDYBRIDGE},
- {I_VMINPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9412, IF_AVX|IF_SANDYBRIDGE},
- {I_VMINPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9419, IF_AVX|IF_SANDYBRIDGE},
- {I_VMINPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9426, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMINPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10157, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMINPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10164, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMINPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10171, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMINPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10178, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMINPS[] = {
- {I_VMINPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9433, IF_AVX|IF_SANDYBRIDGE},
- {I_VMINPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9440, IF_AVX|IF_SANDYBRIDGE},
- {I_VMINPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9447, IF_AVX|IF_SANDYBRIDGE},
- {I_VMINPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9454, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMINPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10185, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMINPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10192, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMINPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10199, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMINPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10206, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMINSD[] = {
- {I_VMINSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+9461, IF_AVX|IF_SANDYBRIDGE},
- {I_VMINSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9468, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMINSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+10213, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMINSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+10220, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMINSS[] = {
- {I_VMINSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+9475, IF_AVX|IF_SANDYBRIDGE},
- {I_VMINSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9482, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMINSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+10227, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMINSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+10234, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMLAUNCH[] = {
- {I_VMLAUNCH, 0, {0,0,0,0,0}, nasm_bytecodes+18587, IF_VMX},
+ {I_VMLAUNCH, 0, {0,0,0,0,0}, nasm_bytecodes+21064, IF_VMX},
ITEMPLATE_END
};
static const struct itemplate instrux_VMLOAD[] = {
- {I_VMLOAD, 0, {0,0,0,0,0}, nasm_bytecodes+18592, IF_X64|IF_VMX},
+ {I_VMLOAD, 0, {0,0,0,0,0}, nasm_bytecodes+21069, IF_X64|IF_VMX},
ITEMPLATE_END
};
static const struct itemplate instrux_VMMCALL[] = {
- {I_VMMCALL, 0, {0,0,0,0,0}, nasm_bytecodes+18597, IF_X64|IF_VMX},
+ {I_VMMCALL, 0, {0,0,0,0,0}, nasm_bytecodes+21074, IF_X64|IF_VMX},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVAPD[] = {
- {I_VMOVAPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9489, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVAPD, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+9496, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVAPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9503, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVAPD, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+9510, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVAPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10241, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVAPD, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+10248, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVAPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10255, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVAPD, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+10262, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVAPS[] = {
- {I_VMOVAPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9517, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVAPS, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+9524, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVAPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9531, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVAPS, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+9538, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVAPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10269, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVAPS, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+10276, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVAPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10283, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVAPS, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+10290, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVD[] = {
- {I_VMOVD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+9545, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVD, 2, {RM_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+9552, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+10297, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVD, 2, {RM_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+10304, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVDDUP[] = {
- {I_VMOVDDUP, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9587, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVDDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9594, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVDDUP, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+10339, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVDDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10346, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVDQA[] = {
- {I_VMOVDQA, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9601, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVDQA, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+9608, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVDQA, 2, {YMMREG,RM_YMM,0,0,0}, nasm_bytecodes+9615, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVDQA, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+9622, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVDQA, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10353, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVDQA, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+10360, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVDQA, 2, {YMMREG,RM_YMM,0,0,0}, nasm_bytecodes+10367, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVDQA, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+10374, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVDQU[] = {
- {I_VMOVDQU, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9629, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVDQU, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+9636, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVDQU, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9643, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVDQU, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+9650, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVDQU, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10381, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVDQU, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+10388, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVDQU, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10395, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVDQU, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+10402, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVHLPS[] = {
- {I_VMOVHLPS, 3, {XMMREG,XMMREG,XMMREG,0,0}, nasm_bytecodes+9657, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVHLPS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+9664, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVHLPS, 3, {XMMREG,XMMREG,XMMREG,0,0}, nasm_bytecodes+10409, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVHLPS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+10416, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVHPD[] = {
- {I_VMOVHPD, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, nasm_bytecodes+9671, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVHPD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+9678, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVHPD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+9685, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVHPD, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, nasm_bytecodes+10423, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVHPD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+10430, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVHPD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+10437, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVHPS[] = {
- {I_VMOVHPS, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, nasm_bytecodes+9692, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVHPS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+9699, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVHPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+9706, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVHPS, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, nasm_bytecodes+10444, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVHPS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+10451, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVHPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+10458, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVLHPS[] = {
- {I_VMOVLHPS, 3, {XMMREG,XMMREG,XMMREG,0,0}, nasm_bytecodes+9692, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVLHPS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+9699, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVLHPS, 3, {XMMREG,XMMREG,XMMREG,0,0}, nasm_bytecodes+10444, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVLHPS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+10451, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVLPD[] = {
- {I_VMOVLPD, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, nasm_bytecodes+9713, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVLPD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+9720, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVLPD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+9727, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVLPD, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, nasm_bytecodes+10465, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVLPD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+10472, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVLPD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+10479, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVLPS[] = {
- {I_VMOVLPS, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, nasm_bytecodes+9657, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVLPS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+9664, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVLPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+9734, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVLPS, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, nasm_bytecodes+10409, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVLPS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+10416, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVLPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+10486, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVMSKPD[] = {
- {I_VMOVMSKPD, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+9741, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- {I_VMOVMSKPD, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+9741, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVMSKPD, 2, {REG_GPR|BITS64,YMMREG,0,0,0}, nasm_bytecodes+9748, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- {I_VMOVMSKPD, 2, {REG_GPR|BITS32,YMMREG,0,0,0}, nasm_bytecodes+9748, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVMSKPD, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+10493, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ {I_VMOVMSKPD, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+10493, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVMSKPD, 2, {REG_GPR|BITS64,YMMREG,0,0,0}, nasm_bytecodes+10500, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ {I_VMOVMSKPD, 2, {REG_GPR|BITS32,YMMREG,0,0,0}, nasm_bytecodes+10500, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVMSKPS[] = {
- {I_VMOVMSKPS, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+9755, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- {I_VMOVMSKPS, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+9755, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVMSKPS, 2, {REG_GPR|BITS64,YMMREG,0,0,0}, nasm_bytecodes+9762, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- {I_VMOVMSKPS, 2, {REG_GPR|BITS32,YMMREG,0,0,0}, nasm_bytecodes+9762, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVMSKPS, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+10507, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ {I_VMOVMSKPS, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+10507, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVMSKPS, 2, {REG_GPR|BITS64,YMMREG,0,0,0}, nasm_bytecodes+10514, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ {I_VMOVMSKPS, 2, {REG_GPR|BITS32,YMMREG,0,0,0}, nasm_bytecodes+10514, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVNTDQ[] = {
- {I_VMOVNTDQ, 2, {MEMORY|BITS128,XMMREG,0,0,0}, nasm_bytecodes+9769, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVNTDQ, 2, {MEMORY|BITS256,YMMREG,0,0,0}, nasm_bytecodes+9776, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVNTDQ, 2, {MEMORY|BITS128,XMMREG,0,0,0}, nasm_bytecodes+10521, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVNTDQ, 2, {MEMORY|BITS256,YMMREG,0,0,0}, nasm_bytecodes+10528, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVNTDQA[] = {
- {I_VMOVNTDQA, 2, {XMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+9783, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVNTDQA, 2, {XMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+10535, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVNTDQA, 2, {YMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+15260, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVNTPD[] = {
- {I_VMOVNTPD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, nasm_bytecodes+9790, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVNTPD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, nasm_bytecodes+9797, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVNTPD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, nasm_bytecodes+10542, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVNTPD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, nasm_bytecodes+10549, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVNTPS[] = {
- {I_VMOVNTPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, nasm_bytecodes+9804, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVNTPS, 2, {MEMORY|BITS128,YMMREG,0,0,0}, nasm_bytecodes+9811, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVNTPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, nasm_bytecodes+10556, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVNTPS, 2, {MEMORY|BITS128,YMMREG,0,0,0}, nasm_bytecodes+10563, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVNTQQ[] = {
- {I_VMOVNTQQ, 2, {MEMORY|BITS256,YMMREG,0,0,0}, nasm_bytecodes+9776, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVNTQQ, 2, {MEMORY|BITS256,YMMREG,0,0,0}, nasm_bytecodes+10528, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVQ[] = {
- {I_VMOVQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9559, IF_AVX|IF_SANDYBRIDGE|IF_SQ},
- {I_VMOVQ, 2, {RM_XMM|BITS64,XMMREG,0,0,0}, nasm_bytecodes+9566, IF_AVX|IF_SANDYBRIDGE|IF_SQ},
- {I_VMOVQ, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+9573, IF_AVX|IF_SANDYBRIDGE|IF_LONG|IF_SQ},
- {I_VMOVQ, 2, {RM_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+9580, IF_AVX|IF_SANDYBRIDGE|IF_LONG|IF_SQ},
+ {I_VMOVQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+10311, IF_AVX|IF_SANDYBRIDGE|IF_SQ},
+ {I_VMOVQ, 2, {RM_XMM|BITS64,XMMREG,0,0,0}, nasm_bytecodes+10318, IF_AVX|IF_SANDYBRIDGE|IF_SQ},
+ {I_VMOVQ, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+10325, IF_AVX|IF_SANDYBRIDGE|IF_LONG|IF_SQ},
+ {I_VMOVQ, 2, {RM_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+10332, IF_AVX|IF_SANDYBRIDGE|IF_LONG|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVQQA[] = {
- {I_VMOVQQA, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9615, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVQQA, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+9622, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVQQA, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10367, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVQQA, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+10374, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVQQU[] = {
- {I_VMOVQQU, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9643, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVQQU, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+9650, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVQQU, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10395, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVQQU, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+10402, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVSD[] = {
- {I_VMOVSD, 3, {XMMREG,XMMREG,XMMREG,0,0}, nasm_bytecodes+9818, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+9825, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVSD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+9832, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVSD, 3, {XMMREG,XMMREG,XMMREG,0,0}, nasm_bytecodes+9839, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+9846, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVSD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+9853, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVSD, 3, {XMMREG,XMMREG,XMMREG,0,0}, nasm_bytecodes+10570, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+10577, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVSD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+10584, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVSD, 3, {XMMREG,XMMREG,XMMREG,0,0}, nasm_bytecodes+10591, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+10598, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVSD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+10605, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVSHDUP[] = {
- {I_VMOVSHDUP, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9860, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVSHDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9867, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVSHDUP, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10612, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVSHDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10619, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVSLDUP[] = {
- {I_VMOVSLDUP, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9874, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVSLDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9881, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVSLDUP, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10626, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVSLDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10633, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVSS[] = {
- {I_VMOVSS, 3, {XMMREG,XMMREG,XMMREG,0,0}, nasm_bytecodes+9888, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+9895, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVSS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+9902, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVSS, 3, {XMMREG,XMMREG,XMMREG,0,0}, nasm_bytecodes+9909, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+9916, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVSS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+9923, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVSS, 3, {XMMREG,XMMREG,XMMREG,0,0}, nasm_bytecodes+10640, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+10647, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVSS, 2, {XMMREG,MEMORY|BITS32,0,0,0}, nasm_bytecodes+10654, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVSS, 3, {XMMREG,XMMREG,XMMREG,0,0}, nasm_bytecodes+10661, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+10668, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVSS, 2, {MEMORY|BITS32,XMMREG,0,0,0}, nasm_bytecodes+10675, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVUPD[] = {
- {I_VMOVUPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9930, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVUPD, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+9937, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVUPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9944, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVUPD, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+9951, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVUPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10682, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVUPD, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+10689, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVUPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10696, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVUPD, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+10703, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMOVUPS[] = {
- {I_VMOVUPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9958, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVUPS, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+9965, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVUPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9972, IF_AVX|IF_SANDYBRIDGE},
- {I_VMOVUPS, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+9979, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVUPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10710, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVUPS, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+10717, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVUPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10724, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMOVUPS, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+10731, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMPSADBW[] = {
- {I_VMPSADBW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6120, IF_AVX|IF_SANDYBRIDGE},
- {I_VMPSADBW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6128, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMPSADBW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+4690, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMPSADBW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4698, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMPSADBW, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+6850, IF_FUTURE|IF_AVX2},
+ {I_VMPSADBW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6858, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VMPTRLD[] = {
- {I_VMPTRLD, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+15585, IF_VMX},
+ {I_VMPTRLD, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18176, IF_VMX},
ITEMPLATE_END
};
static const struct itemplate instrux_VMPTRST[] = {
- {I_VMPTRST, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18602, IF_VMX},
+ {I_VMPTRST, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18194, IF_VMX},
ITEMPLATE_END
};
static const struct itemplate instrux_VMREAD[] = {
- {I_VMREAD, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7873, IF_VMX|IF_NOLONG|IF_SD},
- {I_VMREAD, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7872, IF_X64|IF_VMX|IF_SQ},
+ {I_VMREAD, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+8625, IF_VMX|IF_NOLONG|IF_SD},
+ {I_VMREAD, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+8624, IF_X64|IF_VMX|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_VMRESUME[] = {
- {I_VMRESUME, 0, {0,0,0,0,0}, nasm_bytecodes+18607, IF_VMX},
+ {I_VMRESUME, 0, {0,0,0,0,0}, nasm_bytecodes+21079, IF_VMX},
ITEMPLATE_END
};
static const struct itemplate instrux_VMRUN[] = {
- {I_VMRUN, 0, {0,0,0,0,0}, nasm_bytecodes+18612, IF_X64|IF_VMX},
+ {I_VMRUN, 0, {0,0,0,0,0}, nasm_bytecodes+21084, IF_X64|IF_VMX},
ITEMPLATE_END
};
static const struct itemplate instrux_VMSAVE[] = {
- {I_VMSAVE, 0, {0,0,0,0,0}, nasm_bytecodes+18617, IF_X64|IF_VMX},
+ {I_VMSAVE, 0, {0,0,0,0,0}, nasm_bytecodes+21089, IF_X64|IF_VMX},
ITEMPLATE_END
};
static const struct itemplate instrux_VMULPD[] = {
- {I_VMULPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9986, IF_AVX|IF_SANDYBRIDGE},
- {I_VMULPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9993, IF_AVX|IF_SANDYBRIDGE},
- {I_VMULPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10000, IF_AVX|IF_SANDYBRIDGE},
- {I_VMULPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10007, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMULPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10738, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMULPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10745, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMULPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10752, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMULPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10759, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMULPS[] = {
- {I_VMULPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10014, IF_AVX|IF_SANDYBRIDGE},
- {I_VMULPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10021, IF_AVX|IF_SANDYBRIDGE},
- {I_VMULPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10028, IF_AVX|IF_SANDYBRIDGE},
- {I_VMULPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10035, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMULPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10766, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMULPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10773, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMULPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10780, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMULPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10787, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMULSD[] = {
- {I_VMULSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+10042, IF_AVX|IF_SANDYBRIDGE},
- {I_VMULSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+10049, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMULSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+10794, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMULSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+10801, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMULSS[] = {
- {I_VMULSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+10056, IF_AVX|IF_SANDYBRIDGE},
- {I_VMULSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+10063, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMULSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+10808, IF_AVX|IF_SANDYBRIDGE},
+ {I_VMULSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+10815, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VMWRITE[] = {
- {I_VMWRITE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+7880, IF_VMX|IF_NOLONG|IF_SD},
- {I_VMWRITE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+7879, IF_X64|IF_VMX|IF_SQ},
+ {I_VMWRITE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+8632, IF_VMX|IF_NOLONG|IF_SD},
+ {I_VMWRITE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+8631, IF_X64|IF_VMX|IF_SQ},
ITEMPLATE_END
};
static const struct itemplate instrux_VMXOFF[] = {
- {I_VMXOFF, 0, {0,0,0,0,0}, nasm_bytecodes+18622, IF_VMX},
+ {I_VMXOFF, 0, {0,0,0,0,0}, nasm_bytecodes+21094, IF_VMX},
ITEMPLATE_END
};
static const struct itemplate instrux_VMXON[] = {
- {I_VMXON, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+15530, IF_VMX},
+ {I_VMXON, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18121, IF_VMX},
ITEMPLATE_END
};
static const struct itemplate instrux_VORPD[] = {
- {I_VORPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10070, IF_AVX|IF_SANDYBRIDGE},
- {I_VORPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10077, IF_AVX|IF_SANDYBRIDGE},
- {I_VORPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10084, IF_AVX|IF_SANDYBRIDGE},
- {I_VORPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10091, IF_AVX|IF_SANDYBRIDGE},
+ {I_VORPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10822, IF_AVX|IF_SANDYBRIDGE},
+ {I_VORPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10829, IF_AVX|IF_SANDYBRIDGE},
+ {I_VORPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10836, IF_AVX|IF_SANDYBRIDGE},
+ {I_VORPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10843, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VORPS[] = {
- {I_VORPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10098, IF_AVX|IF_SANDYBRIDGE},
- {I_VORPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10105, IF_AVX|IF_SANDYBRIDGE},
- {I_VORPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10112, IF_AVX|IF_SANDYBRIDGE},
- {I_VORPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10119, IF_AVX|IF_SANDYBRIDGE},
+ {I_VORPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10850, IF_AVX|IF_SANDYBRIDGE},
+ {I_VORPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10857, IF_AVX|IF_SANDYBRIDGE},
+ {I_VORPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10864, IF_AVX|IF_SANDYBRIDGE},
+ {I_VORPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10871, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VPABSB[] = {
- {I_VPABSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10126, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPABSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10878, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPABSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14000, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPABSD[] = {
- {I_VPABSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10140, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPABSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10892, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPABSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14014, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPABSW[] = {
- {I_VPABSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10133, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPABSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10885, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPABSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14007, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPACKSSDW[] = {
- {I_VPACKSSDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10161, IF_AVX|IF_SANDYBRIDGE},
- {I_VPACKSSDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10168, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPACKSSDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10913, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPACKSSDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10920, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPACKSSDW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14035, IF_FUTURE|IF_AVX2},
+ {I_VPACKSSDW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14042, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPACKSSWB[] = {
- {I_VPACKSSWB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10147, IF_AVX|IF_SANDYBRIDGE},
- {I_VPACKSSWB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10154, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPACKSSWB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10899, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPACKSSWB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10906, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPACKSSWB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14021, IF_FUTURE|IF_AVX2},
+ {I_VPACKSSWB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14028, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPACKUSDW[] = {
- {I_VPACKUSDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10189, IF_AVX|IF_SANDYBRIDGE},
- {I_VPACKUSDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10196, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPACKUSDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10941, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPACKUSDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10948, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPACKUSDW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14049, IF_FUTURE|IF_AVX2},
+ {I_VPACKUSDW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14056, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPACKUSWB[] = {
- {I_VPACKUSWB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10175, IF_AVX|IF_SANDYBRIDGE},
- {I_VPACKUSWB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10182, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPACKUSWB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10927, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPACKUSWB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10934, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPACKUSWB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14063, IF_FUTURE|IF_AVX2},
+ {I_VPACKUSWB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14070, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPADDB[] = {
- {I_VPADDB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10203, IF_AVX|IF_SANDYBRIDGE},
- {I_VPADDB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10210, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPADDB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10955, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPADDB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10962, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPADDB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14077, IF_FUTURE|IF_AVX2},
+ {I_VPADDB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14084, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPADDD[] = {
- {I_VPADDD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10231, IF_AVX|IF_SANDYBRIDGE},
- {I_VPADDD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10238, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPADDD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10983, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPADDD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10990, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPADDD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14105, IF_FUTURE|IF_AVX2},
+ {I_VPADDD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14112, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPADDQ[] = {
- {I_VPADDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10245, IF_AVX|IF_SANDYBRIDGE},
- {I_VPADDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10252, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPADDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10997, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPADDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11004, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPADDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14119, IF_FUTURE|IF_AVX2},
+ {I_VPADDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14126, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPADDSB[] = {
- {I_VPADDSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10259, IF_AVX|IF_SANDYBRIDGE},
- {I_VPADDSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10266, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPADDSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11011, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPADDSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11018, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPADDSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14133, IF_FUTURE|IF_AVX2},
+ {I_VPADDSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14140, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPADDSW[] = {
- {I_VPADDSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10273, IF_AVX|IF_SANDYBRIDGE},
- {I_VPADDSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10280, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPADDSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11025, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPADDSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11032, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPADDSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14147, IF_FUTURE|IF_AVX2},
+ {I_VPADDSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14154, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPADDUSB[] = {
- {I_VPADDUSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10287, IF_AVX|IF_SANDYBRIDGE},
- {I_VPADDUSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10294, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPADDUSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11039, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPADDUSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11046, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPADDUSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14161, IF_FUTURE|IF_AVX2},
+ {I_VPADDUSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14168, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPADDUSW[] = {
- {I_VPADDUSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10301, IF_AVX|IF_SANDYBRIDGE},
- {I_VPADDUSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10308, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPADDUSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11053, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPADDUSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11060, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPADDUSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14175, IF_FUTURE|IF_AVX2},
+ {I_VPADDUSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14182, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPADDW[] = {
- {I_VPADDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10217, IF_AVX|IF_SANDYBRIDGE},
- {I_VPADDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10224, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPADDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10969, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPADDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10976, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPADDW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14091, IF_FUTURE|IF_AVX2},
+ {I_VPADDW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14098, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPALIGNR[] = {
- {I_VPALIGNR, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6136, IF_AVX|IF_SANDYBRIDGE},
- {I_VPALIGNR, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6144, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPALIGNR, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+4706, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPALIGNR, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4714, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPALIGNR, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+6866, IF_FUTURE|IF_AVX2},
+ {I_VPALIGNR, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6874, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPAND[] = {
- {I_VPAND, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10315, IF_AVX|IF_SANDYBRIDGE},
- {I_VPAND, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10322, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPAND, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11067, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPAND, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11074, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPAND, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14189, IF_FUTURE|IF_AVX2},
+ {I_VPAND, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14196, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPANDN[] = {
- {I_VPANDN, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10329, IF_AVX|IF_SANDYBRIDGE},
- {I_VPANDN, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10336, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPANDN, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11081, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPANDN, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11088, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPANDN, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14203, IF_FUTURE|IF_AVX2},
+ {I_VPANDN, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14210, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPAVGB[] = {
- {I_VPAVGB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10343, IF_AVX|IF_SANDYBRIDGE},
- {I_VPAVGB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10350, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPAVGB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11095, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPAVGB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11102, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPAVGB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14217, IF_FUTURE|IF_AVX2},
+ {I_VPAVGB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14224, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPAVGW[] = {
- {I_VPAVGW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10357, IF_AVX|IF_SANDYBRIDGE},
- {I_VPAVGW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10364, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPAVGW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11109, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPAVGW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11116, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPAVGW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14231, IF_FUTURE|IF_AVX2},
+ {I_VPAVGW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14238, IF_FUTURE|IF_AVX2},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPBLENDD[] = {
+ {I_VPBLENDD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+7098, IF_FUTURE|IF_AVX2},
+ {I_VPBLENDD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7106, IF_FUTURE|IF_AVX2},
+ {I_VPBLENDD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+7114, IF_FUTURE|IF_AVX2},
+ {I_VPBLENDD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7122, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPBLENDVB[] = {
- {I_VPBLENDVB, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+3582, IF_AVX|IF_SANDYBRIDGE},
- {I_VPBLENDVB, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+3591, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPBLENDVB, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4722, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPBLENDVB, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4730, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPBLENDVB, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+6882, IF_FUTURE|IF_AVX2},
+ {I_VPBLENDVB, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+6890, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPBLENDW[] = {
- {I_VPBLENDW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6152, IF_AVX|IF_SANDYBRIDGE},
- {I_VPBLENDW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6160, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPBLENDW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+4738, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPBLENDW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4746, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPBLENDW, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+6898, IF_FUTURE|IF_AVX2},
+ {I_VPBLENDW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6906, IF_FUTURE|IF_AVX2},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPBROADCASTB[] = {
+ {I_VPBROADCASTB, 2, {XMMREG,MEMORY|BITS8,0,0,0}, nasm_bytecodes+15274, IF_FUTURE|IF_AVX2},
+ {I_VPBROADCASTB, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+15274, IF_FUTURE|IF_AVX2},
+ {I_VPBROADCASTB, 2, {YMMREG,MEMORY|BITS8,0,0,0}, nasm_bytecodes+15281, IF_FUTURE|IF_AVX2},
+ {I_VPBROADCASTB, 2, {YMMREG,XMMREG,0,0,0}, nasm_bytecodes+15281, IF_FUTURE|IF_AVX2},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPBROADCASTD[] = {
+ {I_VPBROADCASTD, 2, {XMMREG,MEMORY|BITS32,0,0,0}, nasm_bytecodes+15302, IF_FUTURE|IF_AVX2},
+ {I_VPBROADCASTD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+15302, IF_FUTURE|IF_AVX2},
+ {I_VPBROADCASTD, 2, {YMMREG,MEMORY|BITS32,0,0,0}, nasm_bytecodes+15309, IF_FUTURE|IF_AVX2},
+ {I_VPBROADCASTD, 2, {YMMREG,XMMREG,0,0,0}, nasm_bytecodes+15309, IF_FUTURE|IF_AVX2},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPBROADCASTQ[] = {
+ {I_VPBROADCASTQ, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+15316, IF_FUTURE|IF_AVX2},
+ {I_VPBROADCASTQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+15316, IF_FUTURE|IF_AVX2},
+ {I_VPBROADCASTQ, 2, {YMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+15323, IF_FUTURE|IF_AVX2},
+ {I_VPBROADCASTQ, 2, {YMMREG,XMMREG,0,0,0}, nasm_bytecodes+15323, IF_FUTURE|IF_AVX2},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPBROADCASTW[] = {
+ {I_VPBROADCASTW, 2, {XMMREG,MEMORY|BITS16,0,0,0}, nasm_bytecodes+15288, IF_FUTURE|IF_AVX2},
+ {I_VPBROADCASTW, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+15288, IF_FUTURE|IF_AVX2},
+ {I_VPBROADCASTW, 2, {YMMREG,MEMORY|BITS16,0,0,0}, nasm_bytecodes+15295, IF_FUTURE|IF_AVX2},
+ {I_VPBROADCASTW, 2, {YMMREG,XMMREG,0,0,0}, nasm_bytecodes+15295, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCLMULHQHQDQ[] = {
- {I_VPCLMULHQHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+3690, IF_AVX|IF_SANDYBRIDGE},
- {I_VPCLMULHQHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3699, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCLMULHQHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+3600, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCLMULHQHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3609, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCLMULHQLQDQ[] = {
- {I_VPCLMULHQLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+3654, IF_AVX|IF_SANDYBRIDGE},
- {I_VPCLMULHQLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3663, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCLMULHQLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+3564, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCLMULHQLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3573, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCLMULLQHQDQ[] = {
- {I_VPCLMULLQHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+3672, IF_AVX|IF_SANDYBRIDGE},
- {I_VPCLMULLQHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3681, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCLMULLQHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+3582, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCLMULLQHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3591, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCLMULLQLQDQ[] = {
- {I_VPCLMULLQLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+3636, IF_AVX|IF_SANDYBRIDGE},
- {I_VPCLMULLQLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3645, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCLMULLQLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+3546, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCLMULLQLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3555, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCLMULQDQ[] = {
- {I_VPCLMULQDQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6664, IF_AVX|IF_SANDYBRIDGE},
- {I_VPCLMULQDQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6672, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCLMULQDQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+5250, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCLMULQDQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5258, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCMOV[] = {
- {I_VPCMOV, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4860, IF_AMD|IF_SSE5},
- {I_VPCMOV, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4869, IF_AMD|IF_SSE5},
- {I_VPCMOV, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+4878, IF_AMD|IF_SSE5},
- {I_VPCMOV, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+4887, IF_AMD|IF_SSE5},
- {I_VPCMOV, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+4896, IF_AMD|IF_SSE5},
- {I_VPCMOV, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+4905, IF_AMD|IF_SSE5},
- {I_VPCMOV, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+4914, IF_AMD|IF_SSE5},
- {I_VPCMOV, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+4923, IF_AMD|IF_SSE5},
+ {I_VPCMOV, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6370, IF_AMD|IF_SSE5},
+ {I_VPCMOV, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6378, IF_AMD|IF_SSE5},
+ {I_VPCMOV, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+6386, IF_AMD|IF_SSE5},
+ {I_VPCMOV, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+6394, IF_AMD|IF_SSE5},
+ {I_VPCMOV, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+6402, IF_AMD|IF_SSE5},
+ {I_VPCMOV, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+6410, IF_AMD|IF_SSE5},
+ {I_VPCMOV, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+6418, IF_AMD|IF_SSE5},
+ {I_VPCMOV, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+6426, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCMPEQB[] = {
- {I_VPCMPEQB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10371, IF_AVX|IF_SANDYBRIDGE},
- {I_VPCMPEQB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10378, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPEQB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11123, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPEQB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11130, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPEQB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14245, IF_FUTURE|IF_AVX2},
+ {I_VPCMPEQB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14252, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCMPEQD[] = {
- {I_VPCMPEQD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10399, IF_AVX|IF_SANDYBRIDGE},
- {I_VPCMPEQD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10406, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPEQD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11151, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPEQD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11158, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPEQD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14273, IF_FUTURE|IF_AVX2},
+ {I_VPCMPEQD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14280, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCMPEQQ[] = {
- {I_VPCMPEQQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10413, IF_AVX|IF_SANDYBRIDGE},
- {I_VPCMPEQQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10420, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPEQQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11165, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPEQQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11172, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPEQQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14287, IF_FUTURE|IF_AVX2},
+ {I_VPCMPEQQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14294, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCMPEQW[] = {
- {I_VPCMPEQW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10385, IF_AVX|IF_SANDYBRIDGE},
- {I_VPCMPEQW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10392, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPEQW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11137, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPEQW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11144, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPEQW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14259, IF_FUTURE|IF_AVX2},
+ {I_VPCMPEQW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14266, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCMPESTRI[] = {
- {I_VPCMPESTRI, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6168, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPESTRI, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4754, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCMPESTRM[] = {
- {I_VPCMPESTRM, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6176, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPESTRM, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4762, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCMPGTB[] = {
- {I_VPCMPGTB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10427, IF_AVX|IF_SANDYBRIDGE},
- {I_VPCMPGTB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10434, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPGTB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11179, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPGTB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11186, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPGTB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14301, IF_FUTURE|IF_AVX2},
+ {I_VPCMPGTB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14308, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCMPGTD[] = {
- {I_VPCMPGTD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10455, IF_AVX|IF_SANDYBRIDGE},
- {I_VPCMPGTD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10462, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPGTD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11207, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPGTD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11214, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPGTD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14329, IF_FUTURE|IF_AVX2},
+ {I_VPCMPGTD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14336, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCMPGTQ[] = {
- {I_VPCMPGTQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10469, IF_AVX|IF_SANDYBRIDGE},
- {I_VPCMPGTQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10476, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPGTQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11221, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPGTQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11228, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPGTQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14343, IF_FUTURE|IF_AVX2},
+ {I_VPCMPGTQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14350, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCMPGTW[] = {
- {I_VPCMPGTW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10441, IF_AVX|IF_SANDYBRIDGE},
- {I_VPCMPGTW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10448, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPGTW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11193, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPGTW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11200, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPGTW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14315, IF_FUTURE|IF_AVX2},
+ {I_VPCMPGTW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14322, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCMPISTRI[] = {
- {I_VPCMPISTRI, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6184, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPISTRI, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4770, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCMPISTRM[] = {
- {I_VPCMPISTRM, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6192, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPCMPISTRM, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4778, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCOMB[] = {
- {I_VPCOMB, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6728, IF_AMD|IF_SSE5},
- {I_VPCOMB, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6736, IF_AMD|IF_SSE5},
+ {I_VPCOMB, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6434, IF_AMD|IF_SSE5},
+ {I_VPCOMB, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6442, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCOMD[] = {
- {I_VPCOMD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6744, IF_AMD|IF_SSE5},
- {I_VPCOMD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6752, IF_AMD|IF_SSE5},
+ {I_VPCOMD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6450, IF_AMD|IF_SSE5},
+ {I_VPCOMD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6458, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCOMQ[] = {
- {I_VPCOMQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6760, IF_AMD|IF_SSE5},
- {I_VPCOMQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6768, IF_AMD|IF_SSE5},
+ {I_VPCOMQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6466, IF_AMD|IF_SSE5},
+ {I_VPCOMQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6474, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCOMUB[] = {
- {I_VPCOMUB, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6776, IF_AMD|IF_SSE5},
- {I_VPCOMUB, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6784, IF_AMD|IF_SSE5},
+ {I_VPCOMUB, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6482, IF_AMD|IF_SSE5},
+ {I_VPCOMUB, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6490, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCOMUD[] = {
- {I_VPCOMUD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6792, IF_AMD|IF_SSE5},
- {I_VPCOMUD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6800, IF_AMD|IF_SSE5},
+ {I_VPCOMUD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6498, IF_AMD|IF_SSE5},
+ {I_VPCOMUD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6506, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCOMUQ[] = {
- {I_VPCOMUQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6808, IF_AMD|IF_SSE5},
- {I_VPCOMUQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6816, IF_AMD|IF_SSE5},
+ {I_VPCOMUQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6514, IF_AMD|IF_SSE5},
+ {I_VPCOMUQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6522, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCOMUW[] = {
- {I_VPCOMUW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6824, IF_AMD|IF_SSE5},
- {I_VPCOMUW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6832, IF_AMD|IF_SSE5},
+ {I_VPCOMUW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6530, IF_AMD|IF_SSE5},
+ {I_VPCOMUW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6538, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPCOMW[] = {
- {I_VPCOMW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6840, IF_AMD|IF_SSE5},
- {I_VPCOMW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6848, IF_AMD|IF_SSE5},
+ {I_VPCOMW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6546, IF_AMD|IF_SSE5},
+ {I_VPCOMW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6554, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPERM2F128[] = {
- {I_VPERM2F128, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+6232, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPERM2F128, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+4818, IF_AVX|IF_SANDYBRIDGE},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERM2I128[] = {
+ {I_VPERM2I128, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+7146, IF_FUTURE|IF_AVX2},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERMD[] = {
+ {I_VPERMD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15330, IF_FUTURE|IF_AVX2},
+ {I_VPERMD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15337, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPERMILPD[] = {
- {I_VPERMILPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10483, IF_AVX|IF_SANDYBRIDGE},
- {I_VPERMILPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10490, IF_AVX|IF_SANDYBRIDGE},
- {I_VPERMILPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6200, IF_AVX|IF_SANDYBRIDGE},
- {I_VPERMILPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6208, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPERMILPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11235, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPERMILPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11242, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPERMILPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4786, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPERMILPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4794, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VPERMILPS[] = {
- {I_VPERMILPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10497, IF_AVX|IF_SANDYBRIDGE},
- {I_VPERMILPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10504, IF_AVX|IF_SANDYBRIDGE},
- {I_VPERMILPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6216, IF_AVX|IF_SANDYBRIDGE},
- {I_VPERMILPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6224, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPERMILPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11249, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPERMILPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11256, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPERMILPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4802, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPERMILPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4810, IF_AVX|IF_SANDYBRIDGE},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERMPD[] = {
+ {I_VPERMPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7130, IF_FUTURE|IF_AVX2},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERMPS[] = {
+ {I_VPERMPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15344, IF_FUTURE|IF_AVX2},
+ {I_VPERMPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15351, IF_FUTURE|IF_AVX2},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPERMQ[] = {
+ {I_VPERMQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7138, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPEXTRB[] = {
- {I_VPEXTRB, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6240, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- {I_VPEXTRB, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6240, IF_AVX|IF_SANDYBRIDGE},
- {I_VPEXTRB, 3, {MEMORY|BITS8,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6240, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPEXTRB, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4826, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ {I_VPEXTRB, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4826, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPEXTRB, 3, {MEMORY|BITS8,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4826, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VPEXTRD[] = {
- {I_VPEXTRD, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6264, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- {I_VPEXTRD, 3, {RM_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6264, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPEXTRD, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4850, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ {I_VPEXTRD, 3, {RM_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4850, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VPEXTRQ[] = {
- {I_VPEXTRQ, 3, {RM_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6272, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ {I_VPEXTRQ, 3, {RM_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4858, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
ITEMPLATE_END
};
static const struct itemplate instrux_VPEXTRW[] = {
- {I_VPEXTRW, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6248, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- {I_VPEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6248, IF_AVX|IF_SANDYBRIDGE},
- {I_VPEXTRW, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6256, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- {I_VPEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6256, IF_AVX|IF_SANDYBRIDGE},
- {I_VPEXTRW, 3, {MEMORY|BITS16,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6256, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPEXTRW, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4834, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ {I_VPEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4834, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPEXTRW, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4842, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ {I_VPEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4842, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPEXTRW, 3, {MEMORY|BITS16,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4842, IF_AVX|IF_SANDYBRIDGE},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPGATHERDD[] = {
+ {I_VPGATHERDD, 3, {XMMREG,MEMORY|BITS32,XMMREG,0,0}, nasm_bytecodes+7242, IF_FUTURE|IF_AVX2},
+ {I_VPGATHERDD, 3, {YMMREG,MEMORY|BITS32,YMMREG,0,0}, nasm_bytecodes+7258, IF_FUTURE|IF_AVX2},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPGATHERDQ[] = {
+ {I_VPGATHERDQ, 3, {XMMREG,MEMORY|BITS64,XMMREG,0,0}, nasm_bytecodes+7274, IF_FUTURE|IF_AVX2},
+ {I_VPGATHERDQ, 3, {YMMREG,MEMORY|BITS64,YMMREG,0,0}, nasm_bytecodes+7290, IF_FUTURE|IF_AVX2},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPGATHERQD[] = {
+ {I_VPGATHERQD, 3, {XMMREG,MEMORY|BITS32,XMMREG,0,0}, nasm_bytecodes+7250, IF_FUTURE|IF_AVX2},
+ {I_VPGATHERQD, 3, {XMMREG,MEMORY|BITS32,XMMREG,0,0}, nasm_bytecodes+7266, IF_FUTURE|IF_AVX2},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPGATHERQQ[] = {
+ {I_VPGATHERQQ, 3, {XMMREG,MEMORY|BITS64,XMMREG,0,0}, nasm_bytecodes+7282, IF_FUTURE|IF_AVX2},
+ {I_VPGATHERQQ, 3, {YMMREG,MEMORY|BITS64,YMMREG,0,0}, nasm_bytecodes+7298, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPHADDBD[] = {
- {I_VPHADDBD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12674, IF_AMD|IF_SSE5},
- {I_VPHADDBD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12681, IF_AMD|IF_SSE5},
+ {I_VPHADDBD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13454, IF_AMD|IF_SSE5},
+ {I_VPHADDBD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13461, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPHADDBQ[] = {
- {I_VPHADDBQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12688, IF_AMD|IF_SSE5},
- {I_VPHADDBQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12695, IF_AMD|IF_SSE5},
+ {I_VPHADDBQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13468, IF_AMD|IF_SSE5},
+ {I_VPHADDBQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13475, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPHADDBW[] = {
- {I_VPHADDBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12702, IF_AMD|IF_SSE5},
- {I_VPHADDBW, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12709, IF_AMD|IF_SSE5},
+ {I_VPHADDBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13482, IF_AMD|IF_SSE5},
+ {I_VPHADDBW, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13489, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPHADDD[] = {
- {I_VPHADDD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10525, IF_AVX|IF_SANDYBRIDGE},
- {I_VPHADDD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10532, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPHADDD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11277, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPHADDD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11284, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPHADDD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14371, IF_FUTURE|IF_AVX2},
+ {I_VPHADDD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14378, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPHADDDQ[] = {
- {I_VPHADDDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12716, IF_AMD|IF_SSE5},
- {I_VPHADDDQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12723, IF_AMD|IF_SSE5},
+ {I_VPHADDDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13496, IF_AMD|IF_SSE5},
+ {I_VPHADDDQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13503, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPHADDSW[] = {
- {I_VPHADDSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10539, IF_AVX|IF_SANDYBRIDGE},
- {I_VPHADDSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10546, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPHADDSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11291, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPHADDSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11298, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPHADDSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14385, IF_FUTURE|IF_AVX2},
+ {I_VPHADDSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14392, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPHADDUBD[] = {
- {I_VPHADDUBD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12730, IF_AMD|IF_SSE5},
- {I_VPHADDUBD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12737, IF_AMD|IF_SSE5},
+ {I_VPHADDUBD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13510, IF_AMD|IF_SSE5},
+ {I_VPHADDUBD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13517, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPHADDUBQ[] = {
- {I_VPHADDUBQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12744, IF_AMD|IF_SSE5},
- {I_VPHADDUBQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12751, IF_AMD|IF_SSE5},
+ {I_VPHADDUBQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13524, IF_AMD|IF_SSE5},
+ {I_VPHADDUBQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13531, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPHADDUBW[] = {
- {I_VPHADDUBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12758, IF_AMD|IF_SSE5},
- {I_VPHADDUBW, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12765, IF_AMD|IF_SSE5},
+ {I_VPHADDUBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13538, IF_AMD|IF_SSE5},
+ {I_VPHADDUBW, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13545, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPHADDUDQ[] = {
- {I_VPHADDUDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12772, IF_AMD|IF_SSE5},
- {I_VPHADDUDQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12779, IF_AMD|IF_SSE5},
+ {I_VPHADDUDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13552, IF_AMD|IF_SSE5},
+ {I_VPHADDUDQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13559, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPHADDUWD[] = {
- {I_VPHADDUWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12786, IF_AMD|IF_SSE5},
- {I_VPHADDUWD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12793, IF_AMD|IF_SSE5},
+ {I_VPHADDUWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13566, IF_AMD|IF_SSE5},
+ {I_VPHADDUWD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13573, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPHADDUWQ[] = {
- {I_VPHADDUWQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12800, IF_AMD|IF_SSE5},
- {I_VPHADDUWQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12807, IF_AMD|IF_SSE5},
+ {I_VPHADDUWQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13580, IF_AMD|IF_SSE5},
+ {I_VPHADDUWQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13587, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPHADDW[] = {
- {I_VPHADDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10511, IF_AVX|IF_SANDYBRIDGE},
- {I_VPHADDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10518, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPHADDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11263, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPHADDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11270, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPHADDW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14357, IF_FUTURE|IF_AVX2},
+ {I_VPHADDW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14364, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPHADDWD[] = {
- {I_VPHADDWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12814, IF_AMD|IF_SSE5},
- {I_VPHADDWD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12821, IF_AMD|IF_SSE5},
+ {I_VPHADDWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13594, IF_AMD|IF_SSE5},
+ {I_VPHADDWD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13601, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPHADDWQ[] = {
- {I_VPHADDWQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12828, IF_AMD|IF_SSE5},
- {I_VPHADDWQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12835, IF_AMD|IF_SSE5},
+ {I_VPHADDWQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13608, IF_AMD|IF_SSE5},
+ {I_VPHADDWQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13615, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPHMINPOSUW[] = {
- {I_VPHMINPOSUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10553, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPHMINPOSUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11305, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VPHSUBBW[] = {
- {I_VPHSUBBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12842, IF_AMD|IF_SSE5},
- {I_VPHSUBBW, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12849, IF_AMD|IF_SSE5},
+ {I_VPHSUBBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13622, IF_AMD|IF_SSE5},
+ {I_VPHSUBBW, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13629, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPHSUBD[] = {
- {I_VPHSUBD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10574, IF_AVX|IF_SANDYBRIDGE},
- {I_VPHSUBD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10581, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPHSUBD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11326, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPHSUBD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11333, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPHSUBD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14413, IF_FUTURE|IF_AVX2},
+ {I_VPHSUBD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14420, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPHSUBDQ[] = {
- {I_VPHSUBDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12856, IF_AMD|IF_SSE5},
- {I_VPHSUBDQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12863, IF_AMD|IF_SSE5},
+ {I_VPHSUBDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13636, IF_AMD|IF_SSE5},
+ {I_VPHSUBDQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13643, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPHSUBSW[] = {
- {I_VPHSUBSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10588, IF_AVX|IF_SANDYBRIDGE},
- {I_VPHSUBSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10595, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPHSUBSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11340, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPHSUBSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11347, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPHSUBSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14427, IF_FUTURE|IF_AVX2},
+ {I_VPHSUBSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14434, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPHSUBW[] = {
- {I_VPHSUBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10560, IF_AVX|IF_SANDYBRIDGE},
- {I_VPHSUBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10567, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPHSUBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11312, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPHSUBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11319, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPHSUBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14399, IF_FUTURE|IF_AVX2},
+ {I_VPHSUBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14406, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPHSUBWD[] = {
- {I_VPHSUBWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12870, IF_AMD|IF_SSE5},
- {I_VPHSUBWD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12877, IF_AMD|IF_SSE5},
+ {I_VPHSUBWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13650, IF_AMD|IF_SSE5},
+ {I_VPHSUBWD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13657, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPINSRB[] = {
- {I_VPINSRB, 4, {XMMREG,XMMREG,MEMORY|BITS8,IMMEDIATE|BITS8,0}, nasm_bytecodes+6280, IF_AVX|IF_SANDYBRIDGE},
- {I_VPINSRB, 3, {XMMREG,MEMORY|BITS8,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6288, IF_AVX|IF_SANDYBRIDGE},
- {I_VPINSRB, 4, {XMMREG,XMMREG,RM_GPR|BITS8,IMMEDIATE|BITS8,0}, nasm_bytecodes+6280, IF_AVX|IF_SANDYBRIDGE},
- {I_VPINSRB, 3, {XMMREG,RM_GPR|BITS8,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6288, IF_AVX|IF_SANDYBRIDGE},
- {I_VPINSRB, 4, {XMMREG,XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0}, nasm_bytecodes+6280, IF_AVX|IF_SANDYBRIDGE},
- {I_VPINSRB, 3, {XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6288, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPINSRB, 4, {XMMREG,XMMREG,MEMORY|BITS8,IMMEDIATE|BITS8,0}, nasm_bytecodes+4866, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPINSRB, 3, {XMMREG,MEMORY|BITS8,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4874, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPINSRB, 4, {XMMREG,XMMREG,RM_GPR|BITS8,IMMEDIATE|BITS8,0}, nasm_bytecodes+4866, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPINSRB, 3, {XMMREG,RM_GPR|BITS8,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4874, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPINSRB, 4, {XMMREG,XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0}, nasm_bytecodes+4866, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPINSRB, 3, {XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4874, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VPINSRD[] = {
- {I_VPINSRD, 4, {XMMREG,XMMREG,MEMORY|BITS32,IMMEDIATE|BITS8,0}, nasm_bytecodes+6312, IF_AVX|IF_SANDYBRIDGE},
- {I_VPINSRD, 3, {XMMREG,MEMORY|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6320, IF_AVX|IF_SANDYBRIDGE},
- {I_VPINSRD, 4, {XMMREG,XMMREG,RM_GPR|BITS32,IMMEDIATE|BITS8,0}, nasm_bytecodes+6312, IF_AVX|IF_SANDYBRIDGE},
- {I_VPINSRD, 3, {XMMREG,RM_GPR|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6320, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPINSRD, 4, {XMMREG,XMMREG,MEMORY|BITS32,IMMEDIATE|BITS8,0}, nasm_bytecodes+4898, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPINSRD, 3, {XMMREG,MEMORY|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4906, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPINSRD, 4, {XMMREG,XMMREG,RM_GPR|BITS32,IMMEDIATE|BITS8,0}, nasm_bytecodes+4898, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPINSRD, 3, {XMMREG,RM_GPR|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4906, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VPINSRQ[] = {
- {I_VPINSRQ, 4, {XMMREG,XMMREG,MEMORY|BITS64,IMMEDIATE|BITS8,0}, nasm_bytecodes+6328, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- {I_VPINSRQ, 3, {XMMREG,MEMORY|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6336, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- {I_VPINSRQ, 4, {XMMREG,XMMREG,RM_GPR|BITS64,IMMEDIATE|BITS8,0}, nasm_bytecodes+6328, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- {I_VPINSRQ, 3, {XMMREG,RM_GPR|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6336, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ {I_VPINSRQ, 4, {XMMREG,XMMREG,MEMORY|BITS64,IMMEDIATE|BITS8,0}, nasm_bytecodes+4914, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ {I_VPINSRQ, 3, {XMMREG,MEMORY|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4922, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ {I_VPINSRQ, 4, {XMMREG,XMMREG,RM_GPR|BITS64,IMMEDIATE|BITS8,0}, nasm_bytecodes+4914, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ {I_VPINSRQ, 3, {XMMREG,RM_GPR|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4922, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
ITEMPLATE_END
};
static const struct itemplate instrux_VPINSRW[] = {
- {I_VPINSRW, 4, {XMMREG,XMMREG,MEMORY|BITS16,IMMEDIATE|BITS8,0}, nasm_bytecodes+6296, IF_AVX|IF_SANDYBRIDGE},
- {I_VPINSRW, 3, {XMMREG,MEMORY|BITS16,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6304, IF_AVX|IF_SANDYBRIDGE},
- {I_VPINSRW, 4, {XMMREG,XMMREG,RM_GPR|BITS16,IMMEDIATE|BITS8,0}, nasm_bytecodes+6296, IF_AVX|IF_SANDYBRIDGE},
- {I_VPINSRW, 3, {XMMREG,RM_GPR|BITS16,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6304, IF_AVX|IF_SANDYBRIDGE},
- {I_VPINSRW, 4, {XMMREG,XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0}, nasm_bytecodes+6296, IF_AVX|IF_SANDYBRIDGE},
- {I_VPINSRW, 3, {XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6304, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPINSRW, 4, {XMMREG,XMMREG,MEMORY|BITS16,IMMEDIATE|BITS8,0}, nasm_bytecodes+4882, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPINSRW, 3, {XMMREG,MEMORY|BITS16,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4890, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPINSRW, 4, {XMMREG,XMMREG,RM_GPR|BITS16,IMMEDIATE|BITS8,0}, nasm_bytecodes+4882, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPINSRW, 3, {XMMREG,RM_GPR|BITS16,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4890, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPINSRW, 4, {XMMREG,XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0}, nasm_bytecodes+4882, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPINSRW, 3, {XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4890, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMACSDD[] = {
- {I_VPMACSDD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4932, IF_AMD|IF_SSE5},
- {I_VPMACSDD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4941, IF_AMD|IF_SSE5},
+ {I_VPMACSDD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6562, IF_AMD|IF_SSE5},
+ {I_VPMACSDD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6570, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMACSDQH[] = {
- {I_VPMACSDQH, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4950, IF_AMD|IF_SSE5},
- {I_VPMACSDQH, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4959, IF_AMD|IF_SSE5},
+ {I_VPMACSDQH, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6578, IF_AMD|IF_SSE5},
+ {I_VPMACSDQH, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6586, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMACSDQL[] = {
- {I_VPMACSDQL, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4968, IF_AMD|IF_SSE5},
- {I_VPMACSDQL, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4977, IF_AMD|IF_SSE5},
+ {I_VPMACSDQL, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6594, IF_AMD|IF_SSE5},
+ {I_VPMACSDQL, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6602, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMACSSDD[] = {
- {I_VPMACSSDD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4986, IF_AMD|IF_SSE5},
- {I_VPMACSSDD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4995, IF_AMD|IF_SSE5},
+ {I_VPMACSSDD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6610, IF_AMD|IF_SSE5},
+ {I_VPMACSSDD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6618, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMACSSDQH[] = {
- {I_VPMACSSDQH, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5004, IF_AMD|IF_SSE5},
- {I_VPMACSSDQH, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5013, IF_AMD|IF_SSE5},
+ {I_VPMACSSDQH, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6626, IF_AMD|IF_SSE5},
+ {I_VPMACSSDQH, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6634, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMACSSDQL[] = {
- {I_VPMACSSDQL, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5022, IF_AMD|IF_SSE5},
- {I_VPMACSSDQL, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5031, IF_AMD|IF_SSE5},
+ {I_VPMACSSDQL, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6642, IF_AMD|IF_SSE5},
+ {I_VPMACSSDQL, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6650, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMACSSWD[] = {
- {I_VPMACSSWD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5040, IF_AMD|IF_SSE5},
- {I_VPMACSSWD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5049, IF_AMD|IF_SSE5},
+ {I_VPMACSSWD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6658, IF_AMD|IF_SSE5},
+ {I_VPMACSSWD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6666, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMACSSWW[] = {
- {I_VPMACSSWW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5058, IF_AMD|IF_SSE5},
- {I_VPMACSSWW, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5067, IF_AMD|IF_SSE5},
+ {I_VPMACSSWW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6674, IF_AMD|IF_SSE5},
+ {I_VPMACSSWW, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6682, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMACSWD[] = {
- {I_VPMACSWD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5076, IF_AMD|IF_SSE5},
- {I_VPMACSWD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5085, IF_AMD|IF_SSE5},
+ {I_VPMACSWD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6690, IF_AMD|IF_SSE5},
+ {I_VPMACSWD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6698, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMACSWW[] = {
- {I_VPMACSWW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5094, IF_AMD|IF_SSE5},
- {I_VPMACSWW, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5103, IF_AMD|IF_SSE5},
+ {I_VPMACSWW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6706, IF_AMD|IF_SSE5},
+ {I_VPMACSWW, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6714, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMADCSSWD[] = {
- {I_VPMADCSSWD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5112, IF_AMD|IF_SSE5},
- {I_VPMADCSSWD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5121, IF_AMD|IF_SSE5},
+ {I_VPMADCSSWD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6722, IF_AMD|IF_SSE5},
+ {I_VPMADCSSWD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6730, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMADCSWD[] = {
- {I_VPMADCSWD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5130, IF_AMD|IF_SSE5},
- {I_VPMADCSWD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5139, IF_AMD|IF_SSE5},
+ {I_VPMADCSWD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6738, IF_AMD|IF_SSE5},
+ {I_VPMADCSWD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6746, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMADDUBSW[] = {
- {I_VPMADDUBSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10616, IF_AVX|IF_SANDYBRIDGE},
- {I_VPMADDUBSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10623, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMADDUBSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11368, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMADDUBSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11375, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMADDUBSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14441, IF_FUTURE|IF_AVX2},
+ {I_VPMADDUBSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14448, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMADDWD[] = {
- {I_VPMADDWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10602, IF_AVX|IF_SANDYBRIDGE},
- {I_VPMADDWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10609, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMADDWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11354, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMADDWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11361, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMADDWD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14455, IF_FUTURE|IF_AVX2},
+ {I_VPMADDWD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14462, IF_FUTURE|IF_AVX2},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMASKMOVD[] = {
+ {I_VPMASKMOVD, 3, {XMMREG,XMMREG,MEMORY|BITS128,0,0}, nasm_bytecodes+15358, IF_FUTURE|IF_AVX2},
+ {I_VPMASKMOVD, 2, {XMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+15365, IF_FUTURE|IF_AVX2},
+ {I_VPMASKMOVD, 3, {YMMREG,YMMREG,MEMORY|BITS256,0,0}, nasm_bytecodes+15372, IF_FUTURE|IF_AVX2},
+ {I_VPMASKMOVD, 2, {YMMREG,MEMORY|BITS256,0,0,0}, nasm_bytecodes+15379, IF_FUTURE|IF_AVX2},
+ {I_VPMASKMOVD, 3, {MEMORY|BITS128,XMMREG,XMMREG,0,0}, nasm_bytecodes+15414, IF_FUTURE|IF_AVX2},
+ {I_VPMASKMOVD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, nasm_bytecodes+15421, IF_FUTURE|IF_AVX2},
+ {I_VPMASKMOVD, 3, {MEMORY|BITS256,YMMREG,YMMREG,0,0}, nasm_bytecodes+15428, IF_FUTURE|IF_AVX2},
+ {I_VPMASKMOVD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, nasm_bytecodes+15435, IF_FUTURE|IF_AVX2},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPMASKMOVQ[] = {
+ {I_VPMASKMOVQ, 3, {XMMREG,XMMREG,MEMORY|BITS128,0,0}, nasm_bytecodes+15386, IF_FUTURE|IF_AVX2},
+ {I_VPMASKMOVQ, 2, {XMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+15393, IF_FUTURE|IF_AVX2},
+ {I_VPMASKMOVQ, 3, {YMMREG,YMMREG,MEMORY|BITS256,0,0}, nasm_bytecodes+15400, IF_FUTURE|IF_AVX2},
+ {I_VPMASKMOVQ, 2, {YMMREG,MEMORY|BITS256,0,0,0}, nasm_bytecodes+15407, IF_FUTURE|IF_AVX2},
+ {I_VPMASKMOVQ, 3, {MEMORY|BITS128,XMMREG,XMMREG,0,0}, nasm_bytecodes+15442, IF_FUTURE|IF_AVX2},
+ {I_VPMASKMOVQ, 2, {MEMORY|BITS128,XMMREG,0,0,0}, nasm_bytecodes+15449, IF_FUTURE|IF_AVX2},
+ {I_VPMASKMOVQ, 3, {MEMORY|BITS256,YMMREG,YMMREG,0,0}, nasm_bytecodes+15456, IF_FUTURE|IF_AVX2},
+ {I_VPMASKMOVQ, 2, {MEMORY|BITS256,YMMREG,0,0,0}, nasm_bytecodes+15463, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMAXSB[] = {
- {I_VPMAXSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10630, IF_AVX|IF_SANDYBRIDGE},
- {I_VPMAXSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10637, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMAXSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11382, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMAXSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11389, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMAXSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14469, IF_FUTURE|IF_AVX2},
+ {I_VPMAXSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14476, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMAXSD[] = {
- {I_VPMAXSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10658, IF_AVX|IF_SANDYBRIDGE},
- {I_VPMAXSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10665, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMAXSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11410, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMAXSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11417, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMAXSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14497, IF_FUTURE|IF_AVX2},
+ {I_VPMAXSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14504, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMAXSW[] = {
- {I_VPMAXSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10644, IF_AVX|IF_SANDYBRIDGE},
- {I_VPMAXSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10651, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMAXSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11396, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMAXSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11403, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMAXSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14483, IF_FUTURE|IF_AVX2},
+ {I_VPMAXSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14490, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMAXUB[] = {
- {I_VPMAXUB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10672, IF_AVX|IF_SANDYBRIDGE},
- {I_VPMAXUB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10679, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMAXUB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11424, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMAXUB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11431, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMAXUB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14511, IF_FUTURE|IF_AVX2},
+ {I_VPMAXUB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14518, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMAXUD[] = {
- {I_VPMAXUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10700, IF_AVX|IF_SANDYBRIDGE},
- {I_VPMAXUD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10707, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMAXUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11452, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMAXUD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11459, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMAXUD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14539, IF_FUTURE|IF_AVX2},
+ {I_VPMAXUD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14546, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMAXUW[] = {
- {I_VPMAXUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10686, IF_AVX|IF_SANDYBRIDGE},
- {I_VPMAXUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10693, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMAXUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11438, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMAXUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11445, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMAXUW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14525, IF_FUTURE|IF_AVX2},
+ {I_VPMAXUW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14532, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMINSB[] = {
- {I_VPMINSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10714, IF_AVX|IF_SANDYBRIDGE},
- {I_VPMINSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10721, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMINSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11466, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMINSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11473, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMINSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14553, IF_FUTURE|IF_AVX2},
+ {I_VPMINSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14560, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMINSD[] = {
- {I_VPMINSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10742, IF_AVX|IF_SANDYBRIDGE},
- {I_VPMINSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10749, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMINSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11494, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMINSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11501, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMINSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14581, IF_FUTURE|IF_AVX2},
+ {I_VPMINSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14588, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMINSW[] = {
- {I_VPMINSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10728, IF_AVX|IF_SANDYBRIDGE},
- {I_VPMINSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10735, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMINSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11480, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMINSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11487, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMINSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14567, IF_FUTURE|IF_AVX2},
+ {I_VPMINSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14574, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMINUB[] = {
- {I_VPMINUB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10756, IF_AVX|IF_SANDYBRIDGE},
- {I_VPMINUB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10763, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMINUB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11508, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMINUB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11515, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMINUB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14595, IF_FUTURE|IF_AVX2},
+ {I_VPMINUB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14602, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMINUD[] = {
- {I_VPMINUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10784, IF_AVX|IF_SANDYBRIDGE},
- {I_VPMINUD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10791, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMINUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11536, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMINUD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11543, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMINUD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14623, IF_FUTURE|IF_AVX2},
+ {I_VPMINUD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14630, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMINUW[] = {
- {I_VPMINUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10770, IF_AVX|IF_SANDYBRIDGE},
- {I_VPMINUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10777, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMINUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11522, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMINUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11529, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMINUW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14609, IF_FUTURE|IF_AVX2},
+ {I_VPMINUW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14616, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMOVMSKB[] = {
- {I_VPMOVMSKB, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+10798, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- {I_VPMOVMSKB, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+10798, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVMSKB, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+11550, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ {I_VPMOVMSKB, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+11550, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVMSKB, 2, {REG_GPR|BITS32,YMMREG,0,0,0}, nasm_bytecodes+14637, IF_FUTURE|IF_AVX2},
+ {I_VPMOVMSKB, 2, {REG_GPR|BITS64,YMMREG,0,0,0}, nasm_bytecodes+14637, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMOVSXBD[] = {
- {I_VPMOVSXBD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+10812, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVSXBD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+11564, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVSXBD, 2, {YMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+14651, IF_FUTURE|IF_AVX2},
+ {I_VPMOVSXBD, 2, {YMMREG,XMMREG,0,0,0}, nasm_bytecodes+14651, IF_FUTURE|IF_AVX2},
+ {I_VPMOVSXBD, 2, {YMMREG,XMMREG,0,0,0}, nasm_bytecodes+14658, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMOVSXBQ[] = {
- {I_VPMOVSXBQ, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, nasm_bytecodes+10819, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVSXBQ, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, nasm_bytecodes+11571, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVSXBQ, 2, {YMMREG,MEMORY|BITS32,0,0,0}, nasm_bytecodes+14658, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMOVSXBW[] = {
- {I_VPMOVSXBW, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+10805, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVSXBW, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+11557, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVSXBW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+14644, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMOVSXDQ[] = {
- {I_VPMOVSXDQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+10840, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVSXDQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+11592, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVSXDQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+14679, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMOVSXWD[] = {
- {I_VPMOVSXWD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+10826, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVSXWD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+11578, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVSXWD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+14665, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMOVSXWQ[] = {
- {I_VPMOVSXWQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+10833, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVSXWQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+11585, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVSXWQ, 2, {YMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+14672, IF_FUTURE|IF_AVX2},
+ {I_VPMOVSXWQ, 2, {YMMREG,XMMREG,0,0,0}, nasm_bytecodes+14672, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMOVZXBD[] = {
- {I_VPMOVZXBD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+10854, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVZXBD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+11606, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVZXBD, 2, {YMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+14693, IF_FUTURE|IF_AVX2},
+ {I_VPMOVZXBD, 2, {YMMREG,XMMREG,0,0,0}, nasm_bytecodes+14693, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMOVZXBQ[] = {
- {I_VPMOVZXBQ, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, nasm_bytecodes+10861, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVZXBQ, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, nasm_bytecodes+11613, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVZXBQ, 2, {YMMREG,MEMORY|BITS32,0,0,0}, nasm_bytecodes+14700, IF_FUTURE|IF_AVX2},
+ {I_VPMOVZXBQ, 2, {YMMREG,XMMREG,0,0,0}, nasm_bytecodes+14700, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMOVZXBW[] = {
- {I_VPMOVZXBW, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+10847, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVZXBW, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+11599, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVZXBW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+14686, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMOVZXDQ[] = {
- {I_VPMOVZXDQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+10882, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVZXDQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+11634, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVZXDQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+14721, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMOVZXWD[] = {
- {I_VPMOVZXWD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+10868, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVZXWD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+11620, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVZXWD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+14707, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMOVZXWQ[] = {
- {I_VPMOVZXWQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+10875, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVZXWQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+11627, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMOVZXWQ, 2, {YMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+14714, IF_FUTURE|IF_AVX2},
+ {I_VPMOVZXWQ, 2, {YMMREG,XMMREG,0,0,0}, nasm_bytecodes+14714, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMULDQ[] = {
- {I_VPMULDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10973, IF_AVX|IF_SANDYBRIDGE},
- {I_VPMULDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10980, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMULDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11725, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMULDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11732, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMULDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14728, IF_FUTURE|IF_AVX2},
+ {I_VPMULDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14735, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMULHRSW[] = {
- {I_VPMULHRSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10903, IF_AVX|IF_SANDYBRIDGE},
- {I_VPMULHRSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10910, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMULHRSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11655, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMULHRSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11662, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMULHRSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14742, IF_FUTURE|IF_AVX2},
+ {I_VPMULHRSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14749, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMULHUW[] = {
- {I_VPMULHUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10889, IF_AVX|IF_SANDYBRIDGE},
- {I_VPMULHUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10896, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMULHUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11641, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMULHUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11648, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMULHUW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14756, IF_FUTURE|IF_AVX2},
+ {I_VPMULHUW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14763, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMULHW[] = {
- {I_VPMULHW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10917, IF_AVX|IF_SANDYBRIDGE},
- {I_VPMULHW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10924, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMULHW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11669, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMULHW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11676, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMULHW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14770, IF_FUTURE|IF_AVX2},
+ {I_VPMULHW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14777, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMULLD[] = {
- {I_VPMULLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10945, IF_AVX|IF_SANDYBRIDGE},
- {I_VPMULLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10952, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMULLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11697, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMULLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11704, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMULLD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14798, IF_FUTURE|IF_AVX2},
+ {I_VPMULLD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14805, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMULLW[] = {
- {I_VPMULLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10931, IF_AVX|IF_SANDYBRIDGE},
- {I_VPMULLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10938, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMULLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11683, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMULLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11690, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMULLW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14784, IF_FUTURE|IF_AVX2},
+ {I_VPMULLW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14791, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPMULUDQ[] = {
- {I_VPMULUDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10959, IF_AVX|IF_SANDYBRIDGE},
- {I_VPMULUDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10966, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMULUDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11711, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMULUDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11718, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPMULUDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14812, IF_FUTURE|IF_AVX2},
+ {I_VPMULUDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14819, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPOR[] = {
- {I_VPOR, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10987, IF_AVX|IF_SANDYBRIDGE},
- {I_VPOR, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10994, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPOR, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11739, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPOR, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11746, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPOR, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14826, IF_FUTURE|IF_AVX2},
+ {I_VPOR, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14833, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPPERM[] = {
- {I_VPPERM, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+5148, IF_AMD|IF_SSE5},
- {I_VPPERM, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+5157, IF_AMD|IF_SSE5},
- {I_VPPERM, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5166, IF_AMD|IF_SSE5},
- {I_VPPERM, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5175, IF_AMD|IF_SSE5},
+ {I_VPPERM, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+6754, IF_AMD|IF_SSE5},
+ {I_VPPERM, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+6762, IF_AMD|IF_SSE5},
+ {I_VPPERM, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6770, IF_AMD|IF_SSE5},
+ {I_VPPERM, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6778, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPROTB[] = {
- {I_VPROTB, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+12884, IF_AMD|IF_SSE5},
- {I_VPROTB, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+12891, IF_AMD|IF_SSE5},
- {I_VPROTB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12898, IF_AMD|IF_SSE5},
- {I_VPROTB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12905, IF_AMD|IF_SSE5},
- {I_VPROTB, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6856, IF_AMD|IF_SSE5},
- {I_VPROTB, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6864, IF_AMD|IF_SSE5},
+ {I_VPROTB, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13664, IF_AMD|IF_SSE5},
+ {I_VPROTB, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13671, IF_AMD|IF_SSE5},
+ {I_VPROTB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13678, IF_AMD|IF_SSE5},
+ {I_VPROTB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13685, IF_AMD|IF_SSE5},
+ {I_VPROTB, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6786, IF_AMD|IF_SSE5},
+ {I_VPROTB, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6794, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPROTD[] = {
- {I_VPROTD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+12912, IF_AMD|IF_SSE5},
- {I_VPROTD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+12919, IF_AMD|IF_SSE5},
- {I_VPROTD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12926, IF_AMD|IF_SSE5},
- {I_VPROTD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12933, IF_AMD|IF_SSE5},
- {I_VPROTD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6872, IF_AMD|IF_SSE5},
- {I_VPROTD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6880, IF_AMD|IF_SSE5},
+ {I_VPROTD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13692, IF_AMD|IF_SSE5},
+ {I_VPROTD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13699, IF_AMD|IF_SSE5},
+ {I_VPROTD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13706, IF_AMD|IF_SSE5},
+ {I_VPROTD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13713, IF_AMD|IF_SSE5},
+ {I_VPROTD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6802, IF_AMD|IF_SSE5},
+ {I_VPROTD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6810, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPROTQ[] = {
- {I_VPROTQ, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+12940, IF_AMD|IF_SSE5},
- {I_VPROTQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+12947, IF_AMD|IF_SSE5},
- {I_VPROTQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12954, IF_AMD|IF_SSE5},
- {I_VPROTQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12961, IF_AMD|IF_SSE5},
- {I_VPROTQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6888, IF_AMD|IF_SSE5},
- {I_VPROTQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6896, IF_AMD|IF_SSE5},
+ {I_VPROTQ, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13720, IF_AMD|IF_SSE5},
+ {I_VPROTQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13727, IF_AMD|IF_SSE5},
+ {I_VPROTQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13734, IF_AMD|IF_SSE5},
+ {I_VPROTQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13741, IF_AMD|IF_SSE5},
+ {I_VPROTQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6818, IF_AMD|IF_SSE5},
+ {I_VPROTQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6826, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPROTW[] = {
- {I_VPROTW, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+12968, IF_AMD|IF_SSE5},
- {I_VPROTW, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+12975, IF_AMD|IF_SSE5},
- {I_VPROTW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12982, IF_AMD|IF_SSE5},
- {I_VPROTW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12989, IF_AMD|IF_SSE5},
- {I_VPROTW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6904, IF_AMD|IF_SSE5},
- {I_VPROTW, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6912, IF_AMD|IF_SSE5},
+ {I_VPROTW, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13748, IF_AMD|IF_SSE5},
+ {I_VPROTW, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13755, IF_AMD|IF_SSE5},
+ {I_VPROTW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13762, IF_AMD|IF_SSE5},
+ {I_VPROTW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13769, IF_AMD|IF_SSE5},
+ {I_VPROTW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6834, IF_AMD|IF_SSE5},
+ {I_VPROTW, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6842, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSADBW[] = {
- {I_VPSADBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11001, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSADBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11008, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSADBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11753, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSADBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11760, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSADBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14840, IF_FUTURE|IF_AVX2},
+ {I_VPSADBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14847, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSHAB[] = {
- {I_VPSHAB, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+12996, IF_AMD|IF_SSE5},
- {I_VPSHAB, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13003, IF_AMD|IF_SSE5},
- {I_VPSHAB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13010, IF_AMD|IF_SSE5},
- {I_VPSHAB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13017, IF_AMD|IF_SSE5},
+ {I_VPSHAB, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13776, IF_AMD|IF_SSE5},
+ {I_VPSHAB, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13783, IF_AMD|IF_SSE5},
+ {I_VPSHAB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13790, IF_AMD|IF_SSE5},
+ {I_VPSHAB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13797, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSHAD[] = {
- {I_VPSHAD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13024, IF_AMD|IF_SSE5},
- {I_VPSHAD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13031, IF_AMD|IF_SSE5},
- {I_VPSHAD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13038, IF_AMD|IF_SSE5},
- {I_VPSHAD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13045, IF_AMD|IF_SSE5},
+ {I_VPSHAD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13804, IF_AMD|IF_SSE5},
+ {I_VPSHAD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13811, IF_AMD|IF_SSE5},
+ {I_VPSHAD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13818, IF_AMD|IF_SSE5},
+ {I_VPSHAD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13825, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSHAQ[] = {
- {I_VPSHAQ, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13052, IF_AMD|IF_SSE5},
- {I_VPSHAQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13059, IF_AMD|IF_SSE5},
- {I_VPSHAQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13066, IF_AMD|IF_SSE5},
- {I_VPSHAQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13073, IF_AMD|IF_SSE5},
+ {I_VPSHAQ, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13832, IF_AMD|IF_SSE5},
+ {I_VPSHAQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13839, IF_AMD|IF_SSE5},
+ {I_VPSHAQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13846, IF_AMD|IF_SSE5},
+ {I_VPSHAQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13853, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSHAW[] = {
- {I_VPSHAW, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13080, IF_AMD|IF_SSE5},
- {I_VPSHAW, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13087, IF_AMD|IF_SSE5},
- {I_VPSHAW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13094, IF_AMD|IF_SSE5},
- {I_VPSHAW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13101, IF_AMD|IF_SSE5},
+ {I_VPSHAW, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13860, IF_AMD|IF_SSE5},
+ {I_VPSHAW, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13867, IF_AMD|IF_SSE5},
+ {I_VPSHAW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13874, IF_AMD|IF_SSE5},
+ {I_VPSHAW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13881, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSHLB[] = {
- {I_VPSHLB, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13108, IF_AMD|IF_SSE5},
- {I_VPSHLB, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13115, IF_AMD|IF_SSE5},
- {I_VPSHLB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13122, IF_AMD|IF_SSE5},
- {I_VPSHLB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13129, IF_AMD|IF_SSE5},
+ {I_VPSHLB, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13888, IF_AMD|IF_SSE5},
+ {I_VPSHLB, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13895, IF_AMD|IF_SSE5},
+ {I_VPSHLB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13902, IF_AMD|IF_SSE5},
+ {I_VPSHLB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13909, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSHLD[] = {
- {I_VPSHLD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13136, IF_AMD|IF_SSE5},
- {I_VPSHLD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13143, IF_AMD|IF_SSE5},
- {I_VPSHLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13150, IF_AMD|IF_SSE5},
- {I_VPSHLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13157, IF_AMD|IF_SSE5},
+ {I_VPSHLD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13916, IF_AMD|IF_SSE5},
+ {I_VPSHLD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13923, IF_AMD|IF_SSE5},
+ {I_VPSHLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13930, IF_AMD|IF_SSE5},
+ {I_VPSHLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13937, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSHLQ[] = {
- {I_VPSHLQ, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13164, IF_AMD|IF_SSE5},
- {I_VPSHLQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13171, IF_AMD|IF_SSE5},
- {I_VPSHLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13178, IF_AMD|IF_SSE5},
- {I_VPSHLQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13185, IF_AMD|IF_SSE5},
+ {I_VPSHLQ, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13944, IF_AMD|IF_SSE5},
+ {I_VPSHLQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13951, IF_AMD|IF_SSE5},
+ {I_VPSHLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13958, IF_AMD|IF_SSE5},
+ {I_VPSHLQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13965, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSHLW[] = {
- {I_VPSHLW, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13192, IF_AMD|IF_SSE5},
- {I_VPSHLW, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13199, IF_AMD|IF_SSE5},
- {I_VPSHLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13206, IF_AMD|IF_SSE5},
- {I_VPSHLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13213, IF_AMD|IF_SSE5},
+ {I_VPSHLW, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13972, IF_AMD|IF_SSE5},
+ {I_VPSHLW, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13979, IF_AMD|IF_SSE5},
+ {I_VPSHLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13986, IF_AMD|IF_SSE5},
+ {I_VPSHLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13993, IF_AMD|IF_SSE5},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSHUFB[] = {
- {I_VPSHUFB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11015, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSHUFB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11022, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSHUFB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11767, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSHUFB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11774, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSHUFB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14854, IF_FUTURE|IF_AVX2},
+ {I_VPSHUFB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14861, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSHUFD[] = {
- {I_VPSHUFD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6344, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSHUFD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4930, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSHUFD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6914, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSHUFHW[] = {
- {I_VPSHUFHW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6352, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSHUFHW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4938, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSHUFHW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6922, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSHUFLW[] = {
- {I_VPSHUFLW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6360, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSHUFLW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4946, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSHUFLW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6930, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSIGNB[] = {
- {I_VPSIGNB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11029, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSIGNB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11036, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSIGNB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11781, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSIGNB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11788, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSIGNB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14868, IF_FUTURE|IF_AVX2},
+ {I_VPSIGNB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14875, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSIGND[] = {
- {I_VPSIGND, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11057, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSIGND, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11064, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSIGND, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11809, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSIGND, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11816, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSIGND, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14896, IF_FUTURE|IF_AVX2},
+ {I_VPSIGND, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14903, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSIGNW[] = {
- {I_VPSIGNW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11043, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSIGNW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11050, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSIGNW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11795, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSIGNW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11802, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSIGNW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14882, IF_FUTURE|IF_AVX2},
+ {I_VPSIGNW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14889, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSLLD[] = {
- {I_VPSLLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11085, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSLLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11092, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSLLD, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6416, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSLLD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6424, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSLLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11837, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSLLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11844, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSLLD, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5002, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSLLD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+5010, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSLLD, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+14924, IF_FUTURE|IF_AVX2},
+ {I_VPSLLD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+14931, IF_FUTURE|IF_AVX2},
+ {I_VPSLLD, 3, {YMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6970, IF_FUTURE|IF_AVX2},
+ {I_VPSLLD, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6978, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSLLDQ[] = {
- {I_VPSLLDQ, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6368, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSLLDQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6376, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSLLDQ, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4954, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSLLDQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+4962, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSLLDQ, 3, {YMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6938, IF_FUTURE|IF_AVX2},
+ {I_VPSLLDQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6946, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSLLQ[] = {
- {I_VPSLLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11099, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSLLQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11106, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSLLQ, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6432, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSLLQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6440, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSLLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11851, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSLLQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11858, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSLLQ, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5018, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSLLQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+5026, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSLLQ, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+14938, IF_FUTURE|IF_AVX2},
+ {I_VPSLLQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+14945, IF_FUTURE|IF_AVX2},
+ {I_VPSLLQ, 3, {YMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6986, IF_FUTURE|IF_AVX2},
+ {I_VPSLLQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6994, IF_FUTURE|IF_AVX2},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSLLVD[] = {
+ {I_VPSLLVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+15470, IF_FUTURE|IF_AVX2},
+ {I_VPSLLVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+15477, IF_FUTURE|IF_AVX2},
+ {I_VPSLLVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15498, IF_FUTURE|IF_AVX2},
+ {I_VPSLLVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15505, IF_FUTURE|IF_AVX2},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSLLVQ[] = {
+ {I_VPSLLVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+15484, IF_FUTURE|IF_AVX2},
+ {I_VPSLLVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+15491, IF_FUTURE|IF_AVX2},
+ {I_VPSLLVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15512, IF_FUTURE|IF_AVX2},
+ {I_VPSLLVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15519, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSLLW[] = {
- {I_VPSLLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11071, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSLLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11078, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSLLW, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6400, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSLLW, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6408, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSLLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11823, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSLLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11830, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSLLW, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4986, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSLLW, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+4994, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSLLW, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+14910, IF_FUTURE|IF_AVX2},
+ {I_VPSLLW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+14917, IF_FUTURE|IF_AVX2},
+ {I_VPSLLW, 3, {YMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6954, IF_FUTURE|IF_AVX2},
+ {I_VPSLLW, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6962, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSRAD[] = {
- {I_VPSRAD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11127, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSRAD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11134, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSRAD, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6464, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSRAD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6472, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRAD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11879, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRAD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11886, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRAD, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5050, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRAD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+5058, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRAD, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+14966, IF_FUTURE|IF_AVX2},
+ {I_VPSRAD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+14973, IF_FUTURE|IF_AVX2},
+ {I_VPSRAD, 3, {YMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7018, IF_FUTURE|IF_AVX2},
+ {I_VPSRAD, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7026, IF_FUTURE|IF_AVX2},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSRAVD[] = {
+ {I_VPSRAVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+15526, IF_FUTURE|IF_AVX2},
+ {I_VPSRAVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+15533, IF_FUTURE|IF_AVX2},
+ {I_VPSRAVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15540, IF_FUTURE|IF_AVX2},
+ {I_VPSRAVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15547, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSRAW[] = {
- {I_VPSRAW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11113, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSRAW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11120, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSRAW, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6448, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSRAW, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6456, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRAW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11865, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRAW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11872, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRAW, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5034, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRAW, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+5042, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRAW, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+14952, IF_FUTURE|IF_AVX2},
+ {I_VPSRAW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+14959, IF_FUTURE|IF_AVX2},
+ {I_VPSRAW, 3, {YMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7002, IF_FUTURE|IF_AVX2},
+ {I_VPSRAW, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7010, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSRLD[] = {
- {I_VPSRLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11155, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSRLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11162, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSRLD, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6496, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSRLD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6504, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11907, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11914, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRLD, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5082, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRLD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+5090, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRLD, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+14994, IF_FUTURE|IF_AVX2},
+ {I_VPSRLD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+15001, IF_FUTURE|IF_AVX2},
+ {I_VPSRLD, 3, {YMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7066, IF_FUTURE|IF_AVX2},
+ {I_VPSRLD, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7074, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSRLDQ[] = {
- {I_VPSRLDQ, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6384, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSRLDQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6392, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRLDQ, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4970, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRLDQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+4978, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRLDQ, 3, {YMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7034, IF_FUTURE|IF_AVX2},
+ {I_VPSRLDQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7042, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSRLQ[] = {
- {I_VPSRLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11169, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSRLQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11176, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSRLQ, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6512, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSRLQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6520, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11921, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRLQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11928, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRLQ, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5098, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRLQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+5106, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRLQ, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+15008, IF_FUTURE|IF_AVX2},
+ {I_VPSRLQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+15015, IF_FUTURE|IF_AVX2},
+ {I_VPSRLQ, 3, {YMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7082, IF_FUTURE|IF_AVX2},
+ {I_VPSRLQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7090, IF_FUTURE|IF_AVX2},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSRLVD[] = {
+ {I_VPSRLVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+15554, IF_FUTURE|IF_AVX2},
+ {I_VPSRLVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+15561, IF_FUTURE|IF_AVX2},
+ {I_VPSRLVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15582, IF_FUTURE|IF_AVX2},
+ {I_VPSRLVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15589, IF_FUTURE|IF_AVX2},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_VPSRLVQ[] = {
+ {I_VPSRLVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+15568, IF_FUTURE|IF_AVX2},
+ {I_VPSRLVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+15575, IF_FUTURE|IF_AVX2},
+ {I_VPSRLVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15596, IF_FUTURE|IF_AVX2},
+ {I_VPSRLVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15603, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSRLW[] = {
- {I_VPSRLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11141, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSRLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11148, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSRLW, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6480, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSRLW, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6488, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11893, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11900, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRLW, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5066, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRLW, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+5074, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSRLW, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+14980, IF_FUTURE|IF_AVX2},
+ {I_VPSRLW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+14987, IF_FUTURE|IF_AVX2},
+ {I_VPSRLW, 3, {YMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7050, IF_FUTURE|IF_AVX2},
+ {I_VPSRLW, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7058, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSUBB[] = {
- {I_VPSUBB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11197, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSUBB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11204, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSUBB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11949, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSUBB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11956, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSUBB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15022, IF_FUTURE|IF_AVX2},
+ {I_VPSUBB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15029, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSUBD[] = {
- {I_VPSUBD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11225, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSUBD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11232, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSUBD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11977, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSUBD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11984, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSUBD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15050, IF_FUTURE|IF_AVX2},
+ {I_VPSUBD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15057, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSUBQ[] = {
- {I_VPSUBQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11239, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSUBQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11246, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSUBQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11991, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSUBQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11998, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSUBQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15064, IF_FUTURE|IF_AVX2},
+ {I_VPSUBQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15071, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSUBSB[] = {
- {I_VPSUBSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11253, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSUBSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11260, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSUBSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12005, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSUBSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12012, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSUBSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15078, IF_FUTURE|IF_AVX2},
+ {I_VPSUBSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15085, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSUBSW[] = {
- {I_VPSUBSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11267, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSUBSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11274, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSUBSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12019, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSUBSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12026, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSUBSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15092, IF_FUTURE|IF_AVX2},
+ {I_VPSUBSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15099, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSUBUSB[] = {
- {I_VPSUBUSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11281, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSUBUSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11288, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSUBUSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12033, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSUBUSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12040, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSUBUSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15106, IF_FUTURE|IF_AVX2},
+ {I_VPSUBUSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15113, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSUBUSW[] = {
- {I_VPSUBUSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11295, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSUBUSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11302, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSUBUSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12047, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSUBUSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12054, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSUBUSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15120, IF_FUTURE|IF_AVX2},
+ {I_VPSUBUSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15127, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPSUBW[] = {
- {I_VPSUBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11211, IF_AVX|IF_SANDYBRIDGE},
- {I_VPSUBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11218, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSUBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11963, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSUBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11970, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPSUBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15036, IF_FUTURE|IF_AVX2},
+ {I_VPSUBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15043, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPTEST[] = {
- {I_VPTEST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11183, IF_AVX|IF_SANDYBRIDGE},
- {I_VPTEST, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11190, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPTEST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11935, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPTEST, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11942, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VPUNPCKHBW[] = {
- {I_VPUNPCKHBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11309, IF_AVX|IF_SANDYBRIDGE},
- {I_VPUNPCKHBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11316, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPUNPCKHBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12061, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPUNPCKHBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12068, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPUNPCKHBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15134, IF_FUTURE|IF_AVX2},
+ {I_VPUNPCKHBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15141, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPUNPCKHDQ[] = {
- {I_VPUNPCKHDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11337, IF_AVX|IF_SANDYBRIDGE},
- {I_VPUNPCKHDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11344, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPUNPCKHDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12089, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPUNPCKHDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12096, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPUNPCKHDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15162, IF_FUTURE|IF_AVX2},
+ {I_VPUNPCKHDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15169, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPUNPCKHQDQ[] = {
- {I_VPUNPCKHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11351, IF_AVX|IF_SANDYBRIDGE},
- {I_VPUNPCKHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11358, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPUNPCKHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12103, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPUNPCKHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12110, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPUNPCKHQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15176, IF_FUTURE|IF_AVX2},
+ {I_VPUNPCKHQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15183, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPUNPCKHWD[] = {
- {I_VPUNPCKHWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11323, IF_AVX|IF_SANDYBRIDGE},
- {I_VPUNPCKHWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11330, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPUNPCKHWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12075, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPUNPCKHWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12082, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPUNPCKHWD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15148, IF_FUTURE|IF_AVX2},
+ {I_VPUNPCKHWD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15155, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPUNPCKLBW[] = {
- {I_VPUNPCKLBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11365, IF_AVX|IF_SANDYBRIDGE},
- {I_VPUNPCKLBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11372, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPUNPCKLBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12117, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPUNPCKLBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12124, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPUNPCKLBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15190, IF_FUTURE|IF_AVX2},
+ {I_VPUNPCKLBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15197, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPUNPCKLDQ[] = {
- {I_VPUNPCKLDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11393, IF_AVX|IF_SANDYBRIDGE},
- {I_VPUNPCKLDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11400, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPUNPCKLDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12145, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPUNPCKLDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12152, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPUNPCKLDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15218, IF_FUTURE|IF_AVX2},
+ {I_VPUNPCKLDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15225, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPUNPCKLQDQ[] = {
- {I_VPUNPCKLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11407, IF_AVX|IF_SANDYBRIDGE},
- {I_VPUNPCKLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11414, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPUNPCKLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12159, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPUNPCKLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12166, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPUNPCKLQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15232, IF_FUTURE|IF_AVX2},
+ {I_VPUNPCKLQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15239, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPUNPCKLWD[] = {
- {I_VPUNPCKLWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11379, IF_AVX|IF_SANDYBRIDGE},
- {I_VPUNPCKLWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11386, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPUNPCKLWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12131, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPUNPCKLWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12138, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPUNPCKLWD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15204, IF_FUTURE|IF_AVX2},
+ {I_VPUNPCKLWD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15211, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VPXOR[] = {
- {I_VPXOR, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11421, IF_AVX|IF_SANDYBRIDGE},
- {I_VPXOR, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11428, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPXOR, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12173, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPXOR, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12180, IF_AVX|IF_SANDYBRIDGE},
+ {I_VPXOR, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15246, IF_FUTURE|IF_AVX2},
+ {I_VPXOR, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15253, IF_FUTURE|IF_AVX2},
ITEMPLATE_END
};
static const struct itemplate instrux_VRCPPS[] = {
- {I_VRCPPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11435, IF_AVX|IF_SANDYBRIDGE},
- {I_VRCPPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11442, IF_AVX|IF_SANDYBRIDGE},
+ {I_VRCPPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12187, IF_AVX|IF_SANDYBRIDGE},
+ {I_VRCPPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12194, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VRCPSS[] = {
- {I_VRCPSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+11449, IF_AVX|IF_SANDYBRIDGE},
- {I_VRCPSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+11456, IF_AVX|IF_SANDYBRIDGE},
+ {I_VRCPSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12201, IF_AVX|IF_SANDYBRIDGE},
+ {I_VRCPSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+12208, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VROUNDPD[] = {
- {I_VROUNDPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6528, IF_AVX|IF_SANDYBRIDGE},
- {I_VROUNDPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6536, IF_AVX|IF_SANDYBRIDGE},
+ {I_VROUNDPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5114, IF_AVX|IF_SANDYBRIDGE},
+ {I_VROUNDPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5122, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VROUNDPS[] = {
- {I_VROUNDPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6544, IF_AVX|IF_SANDYBRIDGE},
- {I_VROUNDPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6552, IF_AVX|IF_SANDYBRIDGE},
+ {I_VROUNDPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5130, IF_AVX|IF_SANDYBRIDGE},
+ {I_VROUNDPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5138, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VROUNDSD[] = {
- {I_VROUNDSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, nasm_bytecodes+6560, IF_AVX|IF_SANDYBRIDGE},
- {I_VROUNDSD, 3, {XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6568, IF_AVX|IF_SANDYBRIDGE},
+ {I_VROUNDSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, nasm_bytecodes+5146, IF_AVX|IF_SANDYBRIDGE},
+ {I_VROUNDSD, 3, {XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5154, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VROUNDSS[] = {
- {I_VROUNDSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, nasm_bytecodes+6576, IF_AVX|IF_SANDYBRIDGE},
- {I_VROUNDSS, 3, {XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6584, IF_AVX|IF_SANDYBRIDGE},
+ {I_VROUNDSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, nasm_bytecodes+5162, IF_AVX|IF_SANDYBRIDGE},
+ {I_VROUNDSS, 3, {XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5170, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VRSQRTPS[] = {
- {I_VRSQRTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11463, IF_AVX|IF_SANDYBRIDGE},
- {I_VRSQRTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11470, IF_AVX|IF_SANDYBRIDGE},
+ {I_VRSQRTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12215, IF_AVX|IF_SANDYBRIDGE},
+ {I_VRSQRTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12222, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VRSQRTSS[] = {
- {I_VRSQRTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+11477, IF_AVX|IF_SANDYBRIDGE},
- {I_VRSQRTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+11484, IF_AVX|IF_SANDYBRIDGE},
+ {I_VRSQRTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12229, IF_AVX|IF_SANDYBRIDGE},
+ {I_VRSQRTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+12236, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VSHUFPD[] = {
- {I_VSHUFPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6592, IF_AVX|IF_SANDYBRIDGE},
- {I_VSHUFPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6600, IF_AVX|IF_SANDYBRIDGE},
- {I_VSHUFPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+6608, IF_AVX|IF_SANDYBRIDGE},
- {I_VSHUFPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6616, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSHUFPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+5178, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSHUFPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5186, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSHUFPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+5194, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSHUFPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5202, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VSHUFPS[] = {
- {I_VSHUFPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6624, IF_AVX|IF_SANDYBRIDGE},
- {I_VSHUFPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6632, IF_AVX|IF_SANDYBRIDGE},
- {I_VSHUFPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+6640, IF_AVX|IF_SANDYBRIDGE},
- {I_VSHUFPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6648, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSHUFPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+5210, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSHUFPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5218, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSHUFPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+5226, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSHUFPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5234, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VSQRTPD[] = {
- {I_VSQRTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11491, IF_AVX|IF_SANDYBRIDGE},
- {I_VSQRTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11498, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSQRTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12243, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSQRTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12250, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VSQRTPS[] = {
- {I_VSQRTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11505, IF_AVX|IF_SANDYBRIDGE},
- {I_VSQRTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11512, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSQRTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12257, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSQRTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12264, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VSQRTSD[] = {
- {I_VSQRTSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+11519, IF_AVX|IF_SANDYBRIDGE},
- {I_VSQRTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+11526, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSQRTSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12271, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSQRTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+12278, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VSQRTSS[] = {
- {I_VSQRTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+11533, IF_AVX|IF_SANDYBRIDGE},
- {I_VSQRTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+11540, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSQRTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12285, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSQRTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+12292, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VSTMXCSR[] = {
- {I_VSTMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+11547, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSTMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+12299, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VSUBPD[] = {
- {I_VSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11554, IF_AVX|IF_SANDYBRIDGE},
- {I_VSUBPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11561, IF_AVX|IF_SANDYBRIDGE},
- {I_VSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11568, IF_AVX|IF_SANDYBRIDGE},
- {I_VSUBPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11575, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12306, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSUBPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12313, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12320, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSUBPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12327, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VSUBPS[] = {
- {I_VSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11582, IF_AVX|IF_SANDYBRIDGE},
- {I_VSUBPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11589, IF_AVX|IF_SANDYBRIDGE},
- {I_VSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11596, IF_AVX|IF_SANDYBRIDGE},
- {I_VSUBPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11603, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12334, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSUBPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12341, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12348, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSUBPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12355, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VSUBSD[] = {
- {I_VSUBSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+11610, IF_AVX|IF_SANDYBRIDGE},
- {I_VSUBSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+11617, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSUBSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12362, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSUBSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+12369, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VSUBSS[] = {
- {I_VSUBSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+11624, IF_AVX|IF_SANDYBRIDGE},
- {I_VSUBSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+11631, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSUBSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12376, IF_AVX|IF_SANDYBRIDGE},
+ {I_VSUBSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+12383, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VTESTPD[] = {
- {I_VTESTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11652, IF_AVX|IF_SANDYBRIDGE},
- {I_VTESTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11659, IF_AVX|IF_SANDYBRIDGE},
+ {I_VTESTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12404, IF_AVX|IF_SANDYBRIDGE},
+ {I_VTESTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12411, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VTESTPS[] = {
- {I_VTESTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11638, IF_AVX|IF_SANDYBRIDGE},
- {I_VTESTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11645, IF_AVX|IF_SANDYBRIDGE},
+ {I_VTESTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12390, IF_AVX|IF_SANDYBRIDGE},
+ {I_VTESTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12397, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VUCOMISD[] = {
- {I_VUCOMISD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+11666, IF_AVX|IF_SANDYBRIDGE},
+ {I_VUCOMISD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+12418, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VUCOMISS[] = {
- {I_VUCOMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+11673, IF_AVX|IF_SANDYBRIDGE},
+ {I_VUCOMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+12425, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VUNPCKHPD[] = {
- {I_VUNPCKHPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11680, IF_AVX|IF_SANDYBRIDGE},
- {I_VUNPCKHPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11687, IF_AVX|IF_SANDYBRIDGE},
- {I_VUNPCKHPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11694, IF_AVX|IF_SANDYBRIDGE},
- {I_VUNPCKHPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11701, IF_AVX|IF_SANDYBRIDGE},
+ {I_VUNPCKHPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12432, IF_AVX|IF_SANDYBRIDGE},
+ {I_VUNPCKHPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12439, IF_AVX|IF_SANDYBRIDGE},
+ {I_VUNPCKHPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12446, IF_AVX|IF_SANDYBRIDGE},
+ {I_VUNPCKHPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12453, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VUNPCKHPS[] = {
- {I_VUNPCKHPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11708, IF_AVX|IF_SANDYBRIDGE},
- {I_VUNPCKHPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11715, IF_AVX|IF_SANDYBRIDGE},
- {I_VUNPCKHPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11722, IF_AVX|IF_SANDYBRIDGE},
- {I_VUNPCKHPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11729, IF_AVX|IF_SANDYBRIDGE},
+ {I_VUNPCKHPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12460, IF_AVX|IF_SANDYBRIDGE},
+ {I_VUNPCKHPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12467, IF_AVX|IF_SANDYBRIDGE},
+ {I_VUNPCKHPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12474, IF_AVX|IF_SANDYBRIDGE},
+ {I_VUNPCKHPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12481, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VUNPCKLPD[] = {
- {I_VUNPCKLPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11736, IF_AVX|IF_SANDYBRIDGE},
- {I_VUNPCKLPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11743, IF_AVX|IF_SANDYBRIDGE},
- {I_VUNPCKLPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11750, IF_AVX|IF_SANDYBRIDGE},
- {I_VUNPCKLPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11757, IF_AVX|IF_SANDYBRIDGE},
+ {I_VUNPCKLPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12488, IF_AVX|IF_SANDYBRIDGE},
+ {I_VUNPCKLPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12495, IF_AVX|IF_SANDYBRIDGE},
+ {I_VUNPCKLPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12502, IF_AVX|IF_SANDYBRIDGE},
+ {I_VUNPCKLPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12509, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VUNPCKLPS[] = {
- {I_VUNPCKLPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11764, IF_AVX|IF_SANDYBRIDGE},
- {I_VUNPCKLPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11771, IF_AVX|IF_SANDYBRIDGE},
- {I_VUNPCKLPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11778, IF_AVX|IF_SANDYBRIDGE},
- {I_VUNPCKLPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11785, IF_AVX|IF_SANDYBRIDGE},
+ {I_VUNPCKLPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12516, IF_AVX|IF_SANDYBRIDGE},
+ {I_VUNPCKLPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12523, IF_AVX|IF_SANDYBRIDGE},
+ {I_VUNPCKLPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12530, IF_AVX|IF_SANDYBRIDGE},
+ {I_VUNPCKLPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12537, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VXORPD[] = {
- {I_VXORPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11792, IF_AVX|IF_SANDYBRIDGE},
- {I_VXORPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11799, IF_AVX|IF_SANDYBRIDGE},
- {I_VXORPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11806, IF_AVX|IF_SANDYBRIDGE},
- {I_VXORPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11813, IF_AVX|IF_SANDYBRIDGE},
+ {I_VXORPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12544, IF_AVX|IF_SANDYBRIDGE},
+ {I_VXORPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12551, IF_AVX|IF_SANDYBRIDGE},
+ {I_VXORPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12558, IF_AVX|IF_SANDYBRIDGE},
+ {I_VXORPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12565, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VXORPS[] = {
- {I_VXORPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11820, IF_AVX|IF_SANDYBRIDGE},
- {I_VXORPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11827, IF_AVX|IF_SANDYBRIDGE},
- {I_VXORPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11834, IF_AVX|IF_SANDYBRIDGE},
- {I_VXORPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11841, IF_AVX|IF_SANDYBRIDGE},
+ {I_VXORPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12572, IF_AVX|IF_SANDYBRIDGE},
+ {I_VXORPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12579, IF_AVX|IF_SANDYBRIDGE},
+ {I_VXORPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12586, IF_AVX|IF_SANDYBRIDGE},
+ {I_VXORPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12593, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VZEROALL[] = {
- {I_VZEROALL, 0, {0,0,0,0,0}, nasm_bytecodes+15560, IF_AVX|IF_SANDYBRIDGE},
+ {I_VZEROALL, 0, {0,0,0,0,0}, nasm_bytecodes+18151, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_VZEROUPPER[] = {
- {I_VZEROUPPER, 0, {0,0,0,0,0}, nasm_bytecodes+15566, IF_AVX|IF_SANDYBRIDGE},
+ {I_VZEROUPPER, 0, {0,0,0,0,0}, nasm_bytecodes+18157, IF_AVX|IF_SANDYBRIDGE},
ITEMPLATE_END
};
static const struct itemplate instrux_WBINVD[] = {
- {I_WBINVD, 0, {0,0,0,0,0}, nasm_bytecodes+19624, IF_486|IF_PRIV},
+ {I_WBINVD, 0, {0,0,0,0,0}, nasm_bytecodes+22073, IF_486|IF_PRIV},
ITEMPLATE_END
};
static const struct itemplate instrux_WRFSBASE[] = {
- {I_WRFSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+12535, IF_LONG|IF_FUTURE},
- {I_WRFSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+12534, IF_LONG|IF_FUTURE},
+ {I_WRFSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+13300, IF_LONG|IF_FUTURE},
+ {I_WRFSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+13307, IF_LONG|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_WRGSBASE[] = {
- {I_WRGSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+12542, IF_LONG|IF_FUTURE},
- {I_WRGSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+12541, IF_LONG|IF_FUTURE},
+ {I_WRGSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+13314, IF_LONG|IF_FUTURE},
+ {I_WRGSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+13321, IF_LONG|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_WRMSR[] = {
- {I_WRMSR, 0, {0,0,0,0,0}, nasm_bytecodes+19628, IF_PENT|IF_PRIV},
+ {I_WRMSR, 0, {0,0,0,0,0}, nasm_bytecodes+22077, IF_PENT|IF_PRIV},
ITEMPLATE_END
};
static const struct itemplate instrux_WRSHR[] = {
- {I_WRSHR, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+14390, IF_P6|IF_CYRIX|IF_SMM},
+ {I_WRSHR, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16963, IF_P6|IF_CYRIX|IF_SMM},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XABORT[] = {
+ {I_XABORT, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+21114, IF_FUTURE|IF_RTM},
+ {I_XABORT, 1, {IMMEDIATE|BITS8,0,0,0,0}, nasm_bytecodes+21114, IF_FUTURE|IF_RTM},
ITEMPLATE_END
};
static const struct itemplate instrux_XADD[] = {
- {I_XADD, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+18487, IF_486|IF_SM},
- {I_XADD, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+18487, IF_486},
- {I_XADD, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+14396, IF_486|IF_SM},
- {I_XADD, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+14396, IF_486},
- {I_XADD, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+14402, IF_486|IF_SM},
- {I_XADD, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+14402, IF_486},
- {I_XADD, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+14408, IF_X64|IF_SM},
- {I_XADD, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+14408, IF_X64},
+ {I_XADD, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+16969, IF_486|IF_SM|IF_LOCK},
+ {I_XADD, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+16970, IF_486},
+ {I_XADD, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+8190, IF_486|IF_SM|IF_LOCK},
+ {I_XADD, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+8191, IF_486},
+ {I_XADD, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+8197, IF_486|IF_SM|IF_LOCK},
+ {I_XADD, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+8198, IF_486},
+ {I_XADD, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+8204, IF_X64|IF_SM|IF_LOCK},
+ {I_XADD, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+8205, IF_X64},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XBEGIN[] = {
+ {I_XBEGIN, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+18247, IF_FUTURE|IF_RTM},
+ {I_XBEGIN, 1, {IMMEDIATE|NEAR,0,0,0,0}, nasm_bytecodes+18247, IF_FUTURE|IF_RTM},
+ {I_XBEGIN, 1, {IMMEDIATE|BITS16,0,0,0,0}, nasm_bytecodes+18253, IF_FUTURE|IF_RTM},
+ {I_XBEGIN, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, nasm_bytecodes+18253, IF_FUTURE|IF_RTM},
+ {I_XBEGIN, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+18259, IF_FUTURE|IF_RTM},
+ {I_XBEGIN, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, nasm_bytecodes+18259, IF_FUTURE|IF_RTM},
ITEMPLATE_END
};
static const struct itemplate instrux_XBTS[] = {
- {I_XBTS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+14414, IF_386|IF_SW|IF_UNDOC},
- {I_XBTS, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+14414, IF_386|IF_UNDOC},
- {I_XBTS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+14420, IF_386|IF_SD|IF_UNDOC},
- {I_XBTS, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+14420, IF_386|IF_UNDOC},
+ {I_XBTS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16975, IF_386|IF_SW|IF_UNDOC},
+ {I_XBTS, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16975, IF_386|IF_UNDOC},
+ {I_XBTS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+16981, IF_386|IF_SD|IF_UNDOC},
+ {I_XBTS, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16981, IF_386|IF_UNDOC},
ITEMPLATE_END
};
static const struct itemplate instrux_XCHG[] = {
- {I_XCHG, 2, {REG_AX,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+19632, IF_8086},
- {I_XCHG, 2, {REG_EAX,REG32NA,0,0,0}, nasm_bytecodes+19636, IF_386},
- {I_XCHG, 2, {REG_RAX,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+19640, IF_X64},
- {I_XCHG, 2, {REG_GPR|BITS16,REG_AX,0,0,0}, nasm_bytecodes+19644, IF_8086},
- {I_XCHG, 2, {REG32NA,REG_EAX,0,0,0}, nasm_bytecodes+19648, IF_386},
- {I_XCHG, 2, {REG_GPR|BITS64,REG_RAX,0,0,0}, nasm_bytecodes+19652, IF_X64},
- {I_XCHG, 2, {REG_EAX,REG_EAX,0,0,0}, nasm_bytecodes+19656, IF_386|IF_NOLONG},
- {I_XCHG, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+19660, IF_8086|IF_SM},
- {I_XCHG, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19660, IF_8086},
- {I_XCHG, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+18492, IF_8086|IF_SM},
- {I_XCHG, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18492, IF_8086},
- {I_XCHG, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+18497, IF_386|IF_SM},
- {I_XCHG, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18497, IF_386},
- {I_XCHG, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+18502, IF_X64|IF_SM},
- {I_XCHG, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18502, IF_X64},
- {I_XCHG, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19664, IF_8086|IF_SM},
- {I_XCHG, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19664, IF_8086},
- {I_XCHG, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18507, IF_8086|IF_SM},
- {I_XCHG, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18507, IF_8086},
- {I_XCHG, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18512, IF_386|IF_SM},
- {I_XCHG, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18512, IF_386},
- {I_XCHG, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18517, IF_X64|IF_SM},
- {I_XCHG, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18517, IF_X64},
+ {I_XCHG, 2, {REG_AX,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+22081, IF_8086},
+ {I_XCHG, 2, {REG_EAX,REG32NA,0,0,0}, nasm_bytecodes+22085, IF_386},
+ {I_XCHG, 2, {REG_RAX,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+22089, IF_X64},
+ {I_XCHG, 2, {REG_GPR|BITS16,REG_AX,0,0,0}, nasm_bytecodes+22093, IF_8086},
+ {I_XCHG, 2, {REG32NA,REG_EAX,0,0,0}, nasm_bytecodes+22097, IF_386},
+ {I_XCHG, 2, {REG_GPR|BITS64,REG_RAX,0,0,0}, nasm_bytecodes+22101, IF_X64},
+ {I_XCHG, 2, {REG_EAX,REG_EAX,0,0,0}, nasm_bytecodes+22105, IF_386|IF_NOLONG},
+ {I_XCHG, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+20999, IF_8086|IF_SM|IF_LOCK},
+ {I_XCHG, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+21000, IF_8086},
+ {I_XCHG, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16987, IF_8086|IF_SM|IF_LOCK},
+ {I_XCHG, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16988, IF_8086},
+ {I_XCHG, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+16993, IF_386|IF_SM|IF_LOCK},
+ {I_XCHG, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16994, IF_386},
+ {I_XCHG, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+16999, IF_X64|IF_SM|IF_LOCK},
+ {I_XCHG, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17000, IF_X64},
+ {I_XCHG, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+21004, IF_8086|IF_SM|IF_LOCK},
+ {I_XCHG, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+21005, IF_8086},
+ {I_XCHG, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+17005, IF_8086|IF_SM|IF_LOCK},
+ {I_XCHG, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+17006, IF_8086},
+ {I_XCHG, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17011, IF_386|IF_SM|IF_LOCK},
+ {I_XCHG, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17012, IF_386},
+ {I_XCHG, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17017, IF_X64|IF_SM|IF_LOCK},
+ {I_XCHG, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17018, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_XCRYPTCBC[] = {
- {I_XCRYPTCBC, 0, {0,0,0,0,0}, nasm_bytecodes+15596, IF_PENT|IF_CYRIX},
+ {I_XCRYPTCBC, 0, {0,0,0,0,0}, nasm_bytecodes+18205, IF_PENT|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_XCRYPTCFB[] = {
- {I_XCRYPTCFB, 0, {0,0,0,0,0}, nasm_bytecodes+15608, IF_PENT|IF_CYRIX},
+ {I_XCRYPTCFB, 0, {0,0,0,0,0}, nasm_bytecodes+18217, IF_PENT|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_XCRYPTCTR[] = {
- {I_XCRYPTCTR, 0, {0,0,0,0,0}, nasm_bytecodes+15602, IF_PENT|IF_CYRIX},
+ {I_XCRYPTCTR, 0, {0,0,0,0,0}, nasm_bytecodes+18211, IF_PENT|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_XCRYPTECB[] = {
- {I_XCRYPTECB, 0, {0,0,0,0,0}, nasm_bytecodes+15590, IF_PENT|IF_CYRIX},
+ {I_XCRYPTECB, 0, {0,0,0,0,0}, nasm_bytecodes+18199, IF_PENT|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_XCRYPTOFB[] = {
- {I_XCRYPTOFB, 0, {0,0,0,0,0}, nasm_bytecodes+15614, IF_PENT|IF_CYRIX},
+ {I_XCRYPTOFB, 0, {0,0,0,0,0}, nasm_bytecodes+18223, IF_PENT|IF_CYRIX},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XEND[] = {
+ {I_XEND, 0, {0,0,0,0,0}, nasm_bytecodes+21119, IF_FUTURE|IF_RTM},
ITEMPLATE_END
};
static const struct itemplate instrux_XGETBV[] = {
- {I_XGETBV, 0, {0,0,0,0,0}, nasm_bytecodes+14720, IF_NEHALEM},
+ {I_XGETBV, 0, {0,0,0,0,0}, nasm_bytecodes+17311, IF_NEHALEM},
ITEMPLATE_END
};
static const struct itemplate instrux_XLAT[] = {
- {I_XLAT, 0, {0,0,0,0,0}, nasm_bytecodes+19743, IF_8086},
+ {I_XLAT, 0, {0,0,0,0,0}, nasm_bytecodes+22174, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_XLATB[] = {
- {I_XLATB, 0, {0,0,0,0,0}, nasm_bytecodes+19743, IF_8086},
+ {I_XLATB, 0, {0,0,0,0,0}, nasm_bytecodes+22174, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_XOR[] = {
- {I_XOR, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19668, IF_8086|IF_SM},
- {I_XOR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19668, IF_8086},
- {I_XOR, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18522, IF_8086|IF_SM},
- {I_XOR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18522, IF_8086},
- {I_XOR, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18527, IF_386|IF_SM},
- {I_XOR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18527, IF_386},
- {I_XOR, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18532, IF_X64|IF_SM},
- {I_XOR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18532, IF_X64},
- {I_XOR, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+10864, IF_8086|IF_SM},
- {I_XOR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+10864, IF_8086},
- {I_XOR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+18537, IF_8086|IF_SM},
- {I_XOR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18537, IF_8086},
- {I_XOR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+18542, IF_386|IF_SM},
- {I_XOR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18542, IF_386},
- {I_XOR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+18547, IF_X64|IF_SM},
- {I_XOR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18547, IF_X64},
- {I_XOR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+14426, IF_8086},
- {I_XOR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+14432, IF_386},
- {I_XOR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+14438, IF_X64},
- {I_XOR, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+19672, IF_8086|IF_SM},
- {I_XOR, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+14426, IF_8086|IF_SM},
- {I_XOR, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+18552, IF_8086|IF_SM},
- {I_XOR, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+14432, IF_386|IF_SM},
- {I_XOR, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+18557, IF_386|IF_SM},
- {I_XOR, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+14438, IF_X64|IF_SM},
- {I_XOR, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+18562, IF_X64|IF_SM},
- {I_XOR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+18567, IF_8086|IF_SM},
- {I_XOR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+14444, IF_8086|IF_SM},
- {I_XOR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+14450, IF_386|IF_SM},
- {I_XOR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+14456, IF_X64|IF_SM},
- {I_XOR, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+18567, IF_8086|IF_SM},
- {I_XOR, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+14444, IF_8086|IF_SM},
- {I_XOR, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+14450, IF_386|IF_SM},
+ {I_XOR, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+21009, IF_8086|IF_SM|IF_LOCK},
+ {I_XOR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+21010, IF_8086},
+ {I_XOR, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+17023, IF_8086|IF_SM|IF_LOCK},
+ {I_XOR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+17024, IF_8086},
+ {I_XOR, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17029, IF_386|IF_SM|IF_LOCK},
+ {I_XOR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17030, IF_386},
+ {I_XOR, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17035, IF_X64|IF_SM|IF_LOCK},
+ {I_XOR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17036, IF_X64},
+ {I_XOR, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+14703, IF_8086|IF_SM},
+ {I_XOR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+14703, IF_8086},
+ {I_XOR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+21014, IF_8086|IF_SM},
+ {I_XOR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+21014, IF_8086},
+ {I_XOR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+21019, IF_386|IF_SM},
+ {I_XOR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+21019, IF_386},
+ {I_XOR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+21024, IF_X64|IF_SM},
+ {I_XOR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+21024, IF_X64},
+ {I_XOR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+8211, IF_8086|IF_LOCK},
+ {I_XOR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+8218, IF_386|IF_LOCK},
+ {I_XOR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+8225, IF_X64|IF_LOCK},
+ {I_XOR, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+22109, IF_8086|IF_SM},
+ {I_XOR, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+8212, IF_8086|IF_SM},
+ {I_XOR, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+21029, IF_8086|IF_SM},
+ {I_XOR, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+8219, IF_386|IF_SM},
+ {I_XOR, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+21034, IF_386|IF_SM},
+ {I_XOR, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+8226, IF_X64|IF_SM},
+ {I_XOR, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+21039, IF_X64|IF_SM},
+ {I_XOR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+17041, IF_8086|IF_SM|IF_LOCK},
+ {I_XOR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+8232, IF_8086|IF_SM|IF_LOCK},
+ {I_XOR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+8239, IF_386|IF_SM|IF_LOCK},
+ {I_XOR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+8246, IF_X64|IF_SM|IF_LOCK},
+ {I_XOR, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+17041, IF_8086|IF_SM|IF_LOCK},
+ {I_XOR, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+8232, IF_8086|IF_SM|IF_LOCK},
+ {I_XOR, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+8239, IF_386|IF_SM|IF_LOCK},
+ {I_XOR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+17047, IF_8086|IF_SM|IF_LOCK|IF_NOLONG},
ITEMPLATE_END
};
static const struct itemplate instrux_XORPD[] = {
- {I_XORPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15458, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ {I_XORPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+18049, IF_WILLAMETTE|IF_SSE2},
ITEMPLATE_END
};
static const struct itemplate instrux_XORPS[] = {
- {I_XORPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14702, IF_KATMAI|IF_SSE},
+ {I_XORPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17293, IF_KATMAI|IF_SSE},
ITEMPLATE_END
};
static const struct itemplate instrux_XRSTOR[] = {
- {I_XRSTOR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14745, IF_NEHALEM},
+ {I_XRSTOR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17336, IF_NEHALEM},
ITEMPLATE_END
};
static const struct itemplate instrux_XRSTOR64[] = {
- {I_XRSTOR64, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14744, IF_LONG|IF_NEHALEM},
+ {I_XRSTOR64, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17335, IF_LONG|IF_NEHALEM},
ITEMPLATE_END
};
static const struct itemplate instrux_XSAVE[] = {
- {I_XSAVE, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14733, IF_NEHALEM},
+ {I_XSAVE, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17324, IF_NEHALEM},
ITEMPLATE_END
};
static const struct itemplate instrux_XSAVE64[] = {
- {I_XSAVE64, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14732, IF_LONG|IF_NEHALEM},
+ {I_XSAVE64, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17323, IF_LONG|IF_NEHALEM},
ITEMPLATE_END
};
static const struct itemplate instrux_XSAVEOPT[] = {
- {I_XSAVEOPT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14739, IF_FUTURE},
+ {I_XSAVEOPT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17330, IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_XSAVEOPT64[] = {
- {I_XSAVEOPT64, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14738, IF_LONG|IF_FUTURE},
+ {I_XSAVEOPT64, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17329, IF_LONG|IF_FUTURE},
ITEMPLATE_END
};
static const struct itemplate instrux_XSETBV[] = {
- {I_XSETBV, 0, {0,0,0,0,0}, nasm_bytecodes+14726, IF_NEHALEM|IF_PRIV},
+ {I_XSETBV, 0, {0,0,0,0,0}, nasm_bytecodes+17317, IF_NEHALEM|IF_PRIV},
ITEMPLATE_END
};
static const struct itemplate instrux_XSHA1[] = {
- {I_XSHA1, 0, {0,0,0,0,0}, nasm_bytecodes+15626, IF_PENT|IF_CYRIX},
+ {I_XSHA1, 0, {0,0,0,0,0}, nasm_bytecodes+18235, IF_PENT|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_XSHA256[] = {
- {I_XSHA256, 0, {0,0,0,0,0}, nasm_bytecodes+15632, IF_PENT|IF_CYRIX},
+ {I_XSHA256, 0, {0,0,0,0,0}, nasm_bytecodes+18241, IF_PENT|IF_CYRIX},
ITEMPLATE_END
};
static const struct itemplate instrux_XSTORE[] = {
- {I_XSTORE, 0, {0,0,0,0,0}, nasm_bytecodes+18627, IF_PENT|IF_CYRIX},
+ {I_XSTORE, 0, {0,0,0,0,0}, nasm_bytecodes+21109, IF_PENT|IF_CYRIX},
+ ITEMPLATE_END
+};
+
+static const struct itemplate instrux_XTEST[] = {
+ {I_XTEST, 0, {0,0,0,0,0}, nasm_bytecodes+21124, IF_FUTURE|IF_HLE|IF_RTM},
ITEMPLATE_END
};
static const struct itemplate instrux_CMOVcc[] = {
- {I_CMOVcc, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+7501, IF_P6|IF_SM},
- {I_CMOVcc, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+7501, IF_P6},
- {I_CMOVcc, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+7508, IF_P6|IF_SM},
- {I_CMOVcc, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7508, IF_P6},
- {I_CMOVcc, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+7515, IF_X64|IF_SM},
- {I_CMOVcc, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7515, IF_X64},
+ {I_CMOVcc, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+8253, IF_P6|IF_SM},
+ {I_CMOVcc, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+8253, IF_P6},
+ {I_CMOVcc, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+8260, IF_P6|IF_SM},
+ {I_CMOVcc, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+8260, IF_P6},
+ {I_CMOVcc, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+8267, IF_X64|IF_SM},
+ {I_CMOVcc, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+8267, IF_X64},
ITEMPLATE_END
};
static const struct itemplate instrux_Jcc[] = {
- {I_Jcc, 1, {IMMEDIATE|NEAR,0,0,0,0}, nasm_bytecodes+7522, IF_386},
- {I_Jcc, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, nasm_bytecodes+7529, IF_386},
- {I_Jcc, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, nasm_bytecodes+7536, IF_386},
- {I_Jcc, 1, {IMMEDIATE|SHORT,0,0,0,0}, nasm_bytecodes+18573, IF_8086},
- {I_Jcc, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+18572, IF_8086},
- {I_Jcc, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+7537, IF_386},
- {I_Jcc, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+7543, IF_8086},
- {I_Jcc, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+18573, IF_8086},
+ {I_Jcc, 1, {IMMEDIATE|NEAR,0,0,0,0}, nasm_bytecodes+8274, IF_386},
+ {I_Jcc, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, nasm_bytecodes+8281, IF_386},
+ {I_Jcc, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, nasm_bytecodes+8288, IF_386},
+ {I_Jcc, 1, {IMMEDIATE|SHORT,0,0,0,0}, nasm_bytecodes+21045, IF_8086},
+ {I_Jcc, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+21044, IF_8086},
+ {I_Jcc, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+8289, IF_386},
+ {I_Jcc, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+8295, IF_8086},
+ {I_Jcc, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+21045, IF_8086},
ITEMPLATE_END
};
static const struct itemplate instrux_SETcc[] = {
- {I_SETcc, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14462, IF_386|IF_SB},
- {I_SETcc, 1, {REG_GPR|BITS8,0,0,0,0}, nasm_bytecodes+14462, IF_386},
+ {I_SETcc, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17053, IF_386|IF_SB},
+ {I_SETcc, 1, {REG_GPR|BITS8,0,0,0,0}, nasm_bytecodes+17053, IF_386},
ITEMPLATE_END
};
@@ -9470,6 +10046,7 @@ const struct itemplate * const nasm_instructions[] = {
instrux_AAM,
instrux_AAS,
instrux_ADC,
+ instrux_ADCX,
instrux_ADD,
instrux_ADDPD,
instrux_ADDPS,
@@ -9477,6 +10054,7 @@ const struct itemplate * const nasm_instructions[] = {
instrux_ADDSS,
instrux_ADDSUBPD,
instrux_ADDSUBPS,
+ instrux_ADOX,
instrux_AESDEC,
instrux_AESDECLAST,
instrux_AESENC,
@@ -9484,6 +10062,7 @@ const struct itemplate * const nasm_instructions[] = {
instrux_AESIMC,
instrux_AESKEYGENASSIST,
instrux_AND,
+ instrux_ANDN,
instrux_ANDNPD,
instrux_ANDNPS,
instrux_ANDPD,
@@ -9491,10 +10070,14 @@ const struct itemplate * const nasm_instructions[] = {
instrux_ARPL,
instrux_BB0_RESET,
instrux_BB1_RESET,
+ instrux_BEXTR,
instrux_BLENDPD,
instrux_BLENDPS,
instrux_BLENDVPD,
instrux_BLENDVPS,
+ instrux_BLSI,
+ instrux_BLSMSK,
+ instrux_BLSR,
instrux_BOUND,
instrux_BSF,
instrux_BSR,
@@ -9503,10 +10086,12 @@ const struct itemplate * const nasm_instructions[] = {
instrux_BTC,
instrux_BTR,
instrux_BTS,
+ instrux_BZHI,
instrux_CALL,
instrux_CBW,
instrux_CDQ,
instrux_CDQE,
+ instrux_CLAC,
instrux_CLC,
instrux_CLD,
instrux_CLFLUSH,
@@ -9808,6 +10393,7 @@ const struct itemplate * const nasm_instructions[] = {
instrux_INVEPT,
instrux_INVLPG,
instrux_INVLPGA,
+ instrux_INVPCID,
instrux_INVVPID,
instrux_IRET,
instrux_IRETD,
@@ -9909,6 +10495,7 @@ const struct itemplate * const nasm_instructions[] = {
instrux_MULPS,
instrux_MULSD,
instrux_MULSS,
+ instrux_MULX,
instrux_MWAIT,
instrux_NEG,
instrux_NOP,
@@ -9963,7 +10550,9 @@ const struct itemplate * const nasm_instructions[] = {
instrux_PCMPGTW,
instrux_PCMPISTRI,
instrux_PCMPISTRM,
+ instrux_PDEP,
instrux_PDISTIB,
+ instrux_PEXT,
instrux_PEXTRB,
instrux_PEXTRD,
instrux_PEXTRQ,
@@ -10118,6 +10707,7 @@ const struct itemplate * const nasm_instructions[] = {
instrux_RDMSR,
instrux_RDPMC,
instrux_RDRAND,
+ instrux_RDSEED,
instrux_RDSHR,
instrux_RDTSC,
instrux_RDTSCP,
@@ -10133,6 +10723,7 @@ const struct itemplate * const nasm_instructions[] = {
instrux_RETN,
instrux_ROL,
instrux_ROR,
+ instrux_RORX,
instrux_ROUNDPD,
instrux_ROUNDPS,
instrux_ROUNDSD,
@@ -10147,6 +10738,7 @@ const struct itemplate * const nasm_instructions[] = {
instrux_SAL,
instrux_SALC,
instrux_SAR,
+ instrux_SARX,
instrux_SBB,
instrux_SCASB,
instrux_SCASD,
@@ -10156,8 +10748,10 @@ const struct itemplate * const nasm_instructions[] = {
instrux_SGDT,
instrux_SHL,
instrux_SHLD,
+ instrux_SHLX,
instrux_SHR,
instrux_SHRD,
+ instrux_SHRX,
instrux_SHUFPD,
instrux_SHUFPS,
instrux_SIDT,
@@ -10172,6 +10766,7 @@ const struct itemplate * const nasm_instructions[] = {
instrux_SQRTPS,
instrux_SQRTSD,
instrux_SQRTSS,
+ instrux_STAC,
instrux_STC,
instrux_STD,
instrux_STGI,
@@ -10196,6 +10791,7 @@ const struct itemplate * const nasm_instructions[] = {
instrux_SYSEXIT,
instrux_SYSRET,
instrux_TEST,
+ instrux_TZCNT,
instrux_UCOMISD,
instrux_UCOMISS,
instrux_UD0,
@@ -10229,6 +10825,7 @@ const struct itemplate * const nasm_instructions[] = {
instrux_VBLENDVPD,
instrux_VBLENDVPS,
instrux_VBROADCASTF128,
+ instrux_VBROADCASTI128,
instrux_VBROADCASTSD,
instrux_VBROADCASTSS,
instrux_VCMPEQPD,
@@ -10444,6 +11041,7 @@ const struct itemplate * const nasm_instructions[] = {
instrux_VERR,
instrux_VERW,
instrux_VEXTRACTF128,
+ instrux_VEXTRACTI128,
instrux_VEXTRACTPS,
instrux_VFMADD123PD,
instrux_VFMADD123PS,
@@ -10589,11 +11187,16 @@ const struct itemplate * const nasm_instructions[] = {
instrux_VFRCZPS,
instrux_VFRCZSD,
instrux_VFRCZSS,
+ instrux_VGATHERDPD,
+ instrux_VGATHERDPS,
+ instrux_VGATHERQPD,
+ instrux_VGATHERQPS,
instrux_VHADDPD,
instrux_VHADDPS,
instrux_VHSUBPD,
instrux_VHSUBPS,
instrux_VINSERTF128,
+ instrux_VINSERTI128,
instrux_VINSERTPS,
instrux_VLDDQU,
instrux_VLDMXCSR,
@@ -10607,6 +11210,7 @@ const struct itemplate * const nasm_instructions[] = {
instrux_VMAXSS,
instrux_VMCALL,
instrux_VMCLEAR,
+ instrux_VMFUNC,
instrux_VMINPD,
instrux_VMINPS,
instrux_VMINSD,
@@ -10678,8 +11282,13 @@ const struct itemplate * const nasm_instructions[] = {
instrux_VPANDN,
instrux_VPAVGB,
instrux_VPAVGW,
+ instrux_VPBLENDD,
instrux_VPBLENDVB,
instrux_VPBLENDW,
+ instrux_VPBROADCASTB,
+ instrux_VPBROADCASTD,
+ instrux_VPBROADCASTQ,
+ instrux_VPBROADCASTW,
instrux_VPCLMULHQHQDQ,
instrux_VPCLMULHQLQDQ,
instrux_VPCLMULLQHQDQ,
@@ -10707,12 +11316,21 @@ const struct itemplate * const nasm_instructions[] = {
instrux_VPCOMUW,
instrux_VPCOMW,
instrux_VPERM2F128,
+ instrux_VPERM2I128,
+ instrux_VPERMD,
instrux_VPERMILPD,
instrux_VPERMILPS,
+ instrux_VPERMPD,
+ instrux_VPERMPS,
+ instrux_VPERMQ,
instrux_VPEXTRB,
instrux_VPEXTRD,
instrux_VPEXTRQ,
instrux_VPEXTRW,
+ instrux_VPGATHERDD,
+ instrux_VPGATHERDQ,
+ instrux_VPGATHERQD,
+ instrux_VPGATHERQQ,
instrux_VPHADDBD,
instrux_VPHADDBQ,
instrux_VPHADDBW,
@@ -10753,6 +11371,8 @@ const struct itemplate * const nasm_instructions[] = {
instrux_VPMADCSWD,
instrux_VPMADDUBSW,
instrux_VPMADDWD,
+ instrux_VPMASKMOVD,
+ instrux_VPMASKMOVQ,
instrux_VPMAXSB,
instrux_VPMAXSD,
instrux_VPMAXSW,
@@ -10810,12 +11430,17 @@ const struct itemplate * const nasm_instructions[] = {
instrux_VPSLLD,
instrux_VPSLLDQ,
instrux_VPSLLQ,
+ instrux_VPSLLVD,
+ instrux_VPSLLVQ,
instrux_VPSLLW,
instrux_VPSRAD,
+ instrux_VPSRAVD,
instrux_VPSRAW,
instrux_VPSRLD,
instrux_VPSRLDQ,
instrux_VPSRLQ,
+ instrux_VPSRLVD,
+ instrux_VPSRLVQ,
instrux_VPSRLW,
instrux_VPSUBB,
instrux_VPSUBD,
@@ -10871,7 +11496,9 @@ const struct itemplate * const nasm_instructions[] = {
instrux_WRGSBASE,
instrux_WRMSR,
instrux_WRSHR,
+ instrux_XABORT,
instrux_XADD,
+ instrux_XBEGIN,
instrux_XBTS,
instrux_XCHG,
instrux_XCRYPTCBC,
@@ -10879,6 +11506,7 @@ const struct itemplate * const nasm_instructions[] = {
instrux_XCRYPTCTR,
instrux_XCRYPTECB,
instrux_XCRYPTOFB,
+ instrux_XEND,
instrux_XGETBV,
instrux_XLAT,
instrux_XLATB,
@@ -10895,6 +11523,7 @@ const struct itemplate * const nasm_instructions[] = {
instrux_XSHA1,
instrux_XSHA256,
instrux_XSTORE,
+ instrux_XTEST,
instrux_CMOVcc,
instrux_Jcc,
instrux_SETcc,
diff --git a/insnsb.c b/insnsb.c
index 2cf1c30..0e7a86e 100644
--- a/insnsb.c
+++ b/insnsb.c
@@ -3,2983 +3,3331 @@
#include "nasm.h"
#include "insns.h"
-const uint8_t nasm_bytecodes[19746] = {
+const uint8_t nasm_bytecodes[22177] = {
/* 0 */ 0324,0361,03,017,072,027,0101,026,0,
/* 9 */ 0324,0361,03,017,072,024,0101,026,0,
/* 18 */ 0324,0361,03,017,072,026,0101,026,0,
/* 27 */ 0324,0361,03,017,072,025,0101,026,0,
/* 36 */ 0325,0361,03,017,072,040,0110,026,0,
/* 45 */ 0324,0361,03,017,072,042,0110,026,0,
- /* 54 */ 0261,03,01,01,0113,0120,0174,03,0,
- /* 63 */ 0260,03,01,01,0113,0110,0174,02,0,
- /* 72 */ 0261,03,05,01,0113,0120,0174,03,0,
- /* 81 */ 0260,03,05,01,0113,0110,0174,02,0,
- /* 90 */ 0261,03,01,01,0112,0120,0174,03,0,
- /* 99 */ 0260,03,01,01,0112,0110,0174,02,0,
- /* 108 */ 0261,03,05,01,0112,0120,0174,03,0,
- /* 117 */ 0260,03,05,01,0112,0110,0174,02,0,
- /* 126 */ 0261,01,041,01,0302,0120,01,0,0,
- /* 135 */ 0260,01,041,01,0302,0110,01,0,0,
- /* 144 */ 0261,01,045,01,0302,0120,01,0,0,
- /* 153 */ 0260,01,045,01,0302,0110,01,0,0,
- /* 162 */ 0261,01,041,01,0302,0120,01,01,0,
- /* 171 */ 0260,01,041,01,0302,0110,01,01,0,
- /* 180 */ 0261,01,045,01,0302,0120,01,01,0,
- /* 189 */ 0260,01,045,01,0302,0110,01,01,0,
- /* 198 */ 0261,01,041,01,0302,0120,01,02,0,
- /* 207 */ 0260,01,041,01,0302,0110,01,02,0,
- /* 216 */ 0261,01,045,01,0302,0120,01,02,0,
- /* 225 */ 0260,01,045,01,0302,0110,01,02,0,
- /* 234 */ 0261,01,041,01,0302,0120,01,03,0,
- /* 243 */ 0260,01,041,01,0302,0110,01,03,0,
- /* 252 */ 0261,01,045,01,0302,0120,01,03,0,
- /* 261 */ 0260,01,045,01,0302,0110,01,03,0,
- /* 270 */ 0261,01,041,01,0302,0120,01,04,0,
- /* 279 */ 0260,01,041,01,0302,0110,01,04,0,
- /* 288 */ 0261,01,045,01,0302,0120,01,04,0,
- /* 297 */ 0260,01,045,01,0302,0110,01,04,0,
- /* 306 */ 0261,01,041,01,0302,0120,01,05,0,
- /* 315 */ 0260,01,041,01,0302,0110,01,05,0,
- /* 324 */ 0261,01,045,01,0302,0120,01,05,0,
- /* 333 */ 0260,01,045,01,0302,0110,01,05,0,
- /* 342 */ 0261,01,041,01,0302,0120,01,06,0,
- /* 351 */ 0260,01,041,01,0302,0110,01,06,0,
- /* 360 */ 0261,01,045,01,0302,0120,01,06,0,
- /* 369 */ 0260,01,045,01,0302,0110,01,06,0,
- /* 378 */ 0261,01,041,01,0302,0120,01,07,0,
- /* 387 */ 0260,01,041,01,0302,0110,01,07,0,
- /* 396 */ 0261,01,045,01,0302,0120,01,07,0,
- /* 405 */ 0260,01,045,01,0302,0110,01,07,0,
- /* 414 */ 0261,01,041,01,0302,0120,01,010,0,
- /* 423 */ 0260,01,041,01,0302,0110,01,010,0,
- /* 432 */ 0261,01,045,01,0302,0120,01,010,0,
- /* 441 */ 0260,01,045,01,0302,0110,01,010,0,
- /* 450 */ 0261,01,041,01,0302,0120,01,011,0,
- /* 459 */ 0260,01,041,01,0302,0110,01,011,0,
- /* 468 */ 0261,01,045,01,0302,0120,01,011,0,
- /* 477 */ 0260,01,045,01,0302,0110,01,011,0,
- /* 486 */ 0261,01,041,01,0302,0120,01,012,0,
- /* 495 */ 0260,01,041,01,0302,0110,01,012,0,
- /* 504 */ 0261,01,045,01,0302,0120,01,012,0,
- /* 513 */ 0260,01,045,01,0302,0110,01,012,0,
- /* 522 */ 0261,01,041,01,0302,0120,01,013,0,
- /* 531 */ 0260,01,041,01,0302,0110,01,013,0,
- /* 540 */ 0261,01,045,01,0302,0120,01,013,0,
- /* 549 */ 0260,01,045,01,0302,0110,01,013,0,
- /* 558 */ 0261,01,041,01,0302,0120,01,014,0,
- /* 567 */ 0260,01,041,01,0302,0110,01,014,0,
- /* 576 */ 0261,01,045,01,0302,0120,01,014,0,
- /* 585 */ 0260,01,045,01,0302,0110,01,014,0,
- /* 594 */ 0261,01,041,01,0302,0120,01,015,0,
- /* 603 */ 0260,01,041,01,0302,0110,01,015,0,
- /* 612 */ 0261,01,045,01,0302,0120,01,015,0,
- /* 621 */ 0260,01,045,01,0302,0110,01,015,0,
- /* 630 */ 0261,01,041,01,0302,0120,01,016,0,
- /* 639 */ 0260,01,041,01,0302,0110,01,016,0,
- /* 648 */ 0261,01,045,01,0302,0120,01,016,0,
- /* 657 */ 0260,01,045,01,0302,0110,01,016,0,
- /* 666 */ 0261,01,041,01,0302,0120,01,017,0,
- /* 675 */ 0260,01,041,01,0302,0110,01,017,0,
- /* 684 */ 0261,01,045,01,0302,0120,01,017,0,
- /* 693 */ 0260,01,045,01,0302,0110,01,017,0,
- /* 702 */ 0261,01,041,01,0302,0120,01,020,0,
- /* 711 */ 0260,01,041,01,0302,0110,01,020,0,
- /* 720 */ 0261,01,045,01,0302,0120,01,020,0,
- /* 729 */ 0260,01,045,01,0302,0110,01,020,0,
- /* 738 */ 0261,01,041,01,0302,0120,01,021,0,
- /* 747 */ 0260,01,041,01,0302,0110,01,021,0,
- /* 756 */ 0261,01,045,01,0302,0120,01,021,0,
- /* 765 */ 0260,01,045,01,0302,0110,01,021,0,
- /* 774 */ 0261,01,041,01,0302,0120,01,022,0,
- /* 783 */ 0260,01,041,01,0302,0110,01,022,0,
- /* 792 */ 0261,01,045,01,0302,0120,01,022,0,
- /* 801 */ 0260,01,045,01,0302,0110,01,022,0,
- /* 810 */ 0261,01,041,01,0302,0120,01,023,0,
- /* 819 */ 0260,01,041,01,0302,0110,01,023,0,
- /* 828 */ 0261,01,045,01,0302,0120,01,023,0,
- /* 837 */ 0260,01,045,01,0302,0110,01,023,0,
- /* 846 */ 0261,01,041,01,0302,0120,01,024,0,
- /* 855 */ 0260,01,041,01,0302,0110,01,024,0,
- /* 864 */ 0261,01,045,01,0302,0120,01,024,0,
- /* 873 */ 0260,01,045,01,0302,0110,01,024,0,
- /* 882 */ 0261,01,041,01,0302,0120,01,025,0,
- /* 891 */ 0260,01,041,01,0302,0110,01,025,0,
- /* 900 */ 0261,01,045,01,0302,0120,01,025,0,
- /* 909 */ 0260,01,045,01,0302,0110,01,025,0,
- /* 918 */ 0261,01,041,01,0302,0120,01,026,0,
- /* 927 */ 0260,01,041,01,0302,0110,01,026,0,
- /* 936 */ 0261,01,045,01,0302,0120,01,026,0,
- /* 945 */ 0260,01,045,01,0302,0110,01,026,0,
- /* 954 */ 0261,01,041,01,0302,0120,01,027,0,
- /* 963 */ 0260,01,041,01,0302,0110,01,027,0,
- /* 972 */ 0261,01,045,01,0302,0120,01,027,0,
- /* 981 */ 0260,01,045,01,0302,0110,01,027,0,
- /* 990 */ 0261,01,041,01,0302,0120,01,030,0,
- /* 999 */ 0260,01,041,01,0302,0110,01,030,0,
- /* 1008 */ 0261,01,045,01,0302,0120,01,030,0,
- /* 1017 */ 0260,01,045,01,0302,0110,01,030,0,
- /* 1026 */ 0261,01,041,01,0302,0120,01,031,0,
- /* 1035 */ 0260,01,041,01,0302,0110,01,031,0,
- /* 1044 */ 0261,01,045,01,0302,0120,01,031,0,
- /* 1053 */ 0260,01,045,01,0302,0110,01,031,0,
- /* 1062 */ 0261,01,041,01,0302,0120,01,032,0,
- /* 1071 */ 0260,01,041,01,0302,0110,01,032,0,
- /* 1080 */ 0261,01,045,01,0302,0120,01,032,0,
- /* 1089 */ 0260,01,045,01,0302,0110,01,032,0,
- /* 1098 */ 0261,01,041,01,0302,0120,01,033,0,
- /* 1107 */ 0260,01,041,01,0302,0110,01,033,0,
- /* 1116 */ 0261,01,045,01,0302,0120,01,033,0,
- /* 1125 */ 0260,01,045,01,0302,0110,01,033,0,
- /* 1134 */ 0261,01,041,01,0302,0120,01,034,0,
- /* 1143 */ 0260,01,041,01,0302,0110,01,034,0,
- /* 1152 */ 0261,01,045,01,0302,0120,01,034,0,
- /* 1161 */ 0260,01,045,01,0302,0110,01,034,0,
- /* 1170 */ 0261,01,041,01,0302,0120,01,035,0,
- /* 1179 */ 0260,01,041,01,0302,0110,01,035,0,
- /* 1188 */ 0261,01,045,01,0302,0120,01,035,0,
- /* 1197 */ 0260,01,045,01,0302,0110,01,035,0,
- /* 1206 */ 0261,01,041,01,0302,0120,01,036,0,
- /* 1215 */ 0260,01,041,01,0302,0110,01,036,0,
- /* 1224 */ 0261,01,045,01,0302,0120,01,036,0,
- /* 1233 */ 0260,01,045,01,0302,0110,01,036,0,
- /* 1242 */ 0261,01,041,01,0302,0120,01,037,0,
- /* 1251 */ 0260,01,041,01,0302,0110,01,037,0,
- /* 1260 */ 0261,01,045,01,0302,0120,01,037,0,
- /* 1269 */ 0260,01,045,01,0302,0110,01,037,0,
- /* 1278 */ 0261,01,040,01,0302,0120,01,0,0,
- /* 1287 */ 0260,01,040,01,0302,0110,01,0,0,
- /* 1296 */ 0261,01,044,01,0302,0120,01,0,0,
- /* 1305 */ 0260,01,044,01,0302,0110,01,0,0,
- /* 1314 */ 0261,01,040,01,0302,0120,01,01,0,
- /* 1323 */ 0260,01,040,01,0302,0110,01,01,0,
- /* 1332 */ 0261,01,044,01,0302,0120,01,01,0,
- /* 1341 */ 0260,01,044,01,0302,0110,01,01,0,
- /* 1350 */ 0261,01,040,01,0302,0120,01,02,0,
- /* 1359 */ 0260,01,040,01,0302,0110,01,02,0,
- /* 1368 */ 0261,01,044,01,0302,0120,01,02,0,
- /* 1377 */ 0260,01,044,01,0302,0110,01,02,0,
- /* 1386 */ 0261,01,040,01,0302,0120,01,03,0,
- /* 1395 */ 0260,01,040,01,0302,0110,01,03,0,
- /* 1404 */ 0261,01,044,01,0302,0120,01,03,0,
- /* 1413 */ 0260,01,044,01,0302,0110,01,03,0,
- /* 1422 */ 0261,01,040,01,0302,0120,01,04,0,
- /* 1431 */ 0260,01,040,01,0302,0110,01,04,0,
- /* 1440 */ 0261,01,044,01,0302,0120,01,04,0,
- /* 1449 */ 0260,01,044,01,0302,0110,01,04,0,
- /* 1458 */ 0261,01,040,01,0302,0120,01,05,0,
- /* 1467 */ 0260,01,040,01,0302,0110,01,05,0,
- /* 1476 */ 0261,01,044,01,0302,0120,01,05,0,
- /* 1485 */ 0260,01,044,01,0302,0110,01,05,0,
- /* 1494 */ 0261,01,040,01,0302,0120,01,06,0,
- /* 1503 */ 0260,01,040,01,0302,0110,01,06,0,
- /* 1512 */ 0261,01,044,01,0302,0120,01,06,0,
- /* 1521 */ 0260,01,044,01,0302,0110,01,06,0,
- /* 1530 */ 0261,01,040,01,0302,0120,01,07,0,
- /* 1539 */ 0260,01,040,01,0302,0110,01,07,0,
- /* 1548 */ 0261,01,044,01,0302,0120,01,07,0,
- /* 1557 */ 0260,01,044,01,0302,0110,01,07,0,
- /* 1566 */ 0261,01,040,01,0302,0120,01,010,0,
- /* 1575 */ 0260,01,040,01,0302,0110,01,010,0,
- /* 1584 */ 0261,01,044,01,0302,0120,01,010,0,
- /* 1593 */ 0260,01,044,01,0302,0110,01,010,0,
- /* 1602 */ 0261,01,040,01,0302,0120,01,011,0,
- /* 1611 */ 0260,01,040,01,0302,0110,01,011,0,
- /* 1620 */ 0261,01,044,01,0302,0120,01,011,0,
- /* 1629 */ 0260,01,044,01,0302,0110,01,011,0,
- /* 1638 */ 0261,01,040,01,0302,0120,01,012,0,
- /* 1647 */ 0260,01,040,01,0302,0110,01,012,0,
- /* 1656 */ 0261,01,044,01,0302,0120,01,012,0,
- /* 1665 */ 0260,01,044,01,0302,0110,01,012,0,
- /* 1674 */ 0261,01,040,01,0302,0120,01,013,0,
- /* 1683 */ 0260,01,040,01,0302,0110,01,013,0,
- /* 1692 */ 0261,01,044,01,0302,0120,01,013,0,
- /* 1701 */ 0260,01,044,01,0302,0110,01,013,0,
- /* 1710 */ 0261,01,040,01,0302,0120,01,014,0,
- /* 1719 */ 0260,01,040,01,0302,0110,01,014,0,
- /* 1728 */ 0261,01,044,01,0302,0120,01,014,0,
- /* 1737 */ 0260,01,044,01,0302,0110,01,014,0,
- /* 1746 */ 0261,01,040,01,0302,0120,01,015,0,
- /* 1755 */ 0260,01,040,01,0302,0110,01,015,0,
- /* 1764 */ 0261,01,044,01,0302,0120,01,015,0,
- /* 1773 */ 0260,01,044,01,0302,0110,01,015,0,
- /* 1782 */ 0261,01,040,01,0302,0120,01,016,0,
- /* 1791 */ 0260,01,040,01,0302,0110,01,016,0,
- /* 1800 */ 0261,01,044,01,0302,0120,01,016,0,
- /* 1809 */ 0260,01,044,01,0302,0110,01,016,0,
- /* 1818 */ 0261,01,040,01,0302,0120,01,017,0,
- /* 1827 */ 0260,01,040,01,0302,0110,01,017,0,
- /* 1836 */ 0261,01,044,01,0302,0120,01,017,0,
- /* 1845 */ 0260,01,044,01,0302,0110,01,017,0,
- /* 1854 */ 0261,01,040,01,0302,0120,01,020,0,
- /* 1863 */ 0260,01,040,01,0302,0110,01,020,0,
- /* 1872 */ 0261,01,044,01,0302,0120,01,020,0,
- /* 1881 */ 0260,01,044,01,0302,0110,01,020,0,
- /* 1890 */ 0261,01,040,01,0302,0120,01,021,0,
- /* 1899 */ 0260,01,040,01,0302,0110,01,021,0,
- /* 1908 */ 0261,01,044,01,0302,0120,01,021,0,
- /* 1917 */ 0260,01,044,01,0302,0110,01,021,0,
- /* 1926 */ 0261,01,040,01,0302,0120,01,022,0,
- /* 1935 */ 0260,01,040,01,0302,0110,01,022,0,
- /* 1944 */ 0261,01,044,01,0302,0120,01,022,0,
- /* 1953 */ 0260,01,044,01,0302,0110,01,022,0,
- /* 1962 */ 0261,01,040,01,0302,0120,01,023,0,
- /* 1971 */ 0260,01,040,01,0302,0110,01,023,0,
- /* 1980 */ 0261,01,044,01,0302,0120,01,023,0,
- /* 1989 */ 0260,01,044,01,0302,0110,01,023,0,
- /* 1998 */ 0261,01,040,01,0302,0120,01,024,0,
- /* 2007 */ 0260,01,040,01,0302,0110,01,024,0,
- /* 2016 */ 0261,01,044,01,0302,0120,01,024,0,
- /* 2025 */ 0260,01,044,01,0302,0110,01,024,0,
- /* 2034 */ 0261,01,040,01,0302,0120,01,025,0,
- /* 2043 */ 0260,01,040,01,0302,0110,01,025,0,
- /* 2052 */ 0261,01,044,01,0302,0120,01,025,0,
- /* 2061 */ 0260,01,044,01,0302,0110,01,025,0,
- /* 2070 */ 0261,01,040,01,0302,0120,01,026,0,
- /* 2079 */ 0260,01,040,01,0302,0110,01,026,0,
- /* 2088 */ 0261,01,044,01,0302,0120,01,026,0,
- /* 2097 */ 0260,01,044,01,0302,0110,01,026,0,
- /* 2106 */ 0261,01,040,01,0302,0120,01,027,0,
- /* 2115 */ 0260,01,040,01,0302,0110,01,027,0,
- /* 2124 */ 0261,01,044,01,0302,0120,01,027,0,
- /* 2133 */ 0260,01,044,01,0302,0110,01,027,0,
- /* 2142 */ 0261,01,040,01,0302,0120,01,030,0,
- /* 2151 */ 0260,01,040,01,0302,0110,01,030,0,
- /* 2160 */ 0261,01,044,01,0302,0120,01,030,0,
- /* 2169 */ 0260,01,044,01,0302,0110,01,030,0,
- /* 2178 */ 0261,01,040,01,0302,0120,01,031,0,
- /* 2187 */ 0260,01,040,01,0302,0110,01,031,0,
- /* 2196 */ 0261,01,044,01,0302,0120,01,031,0,
- /* 2205 */ 0260,01,044,01,0302,0110,01,031,0,
- /* 2214 */ 0261,01,040,01,0302,0120,01,032,0,
- /* 2223 */ 0260,01,040,01,0302,0110,01,032,0,
- /* 2232 */ 0261,01,044,01,0302,0120,01,032,0,
- /* 2241 */ 0260,01,044,01,0302,0110,01,032,0,
- /* 2250 */ 0261,01,040,01,0302,0120,01,033,0,
- /* 2259 */ 0260,01,040,01,0302,0110,01,033,0,
- /* 2268 */ 0261,01,044,01,0302,0120,01,033,0,
- /* 2277 */ 0260,01,044,01,0302,0110,01,033,0,
- /* 2286 */ 0261,01,040,01,0302,0120,01,034,0,
- /* 2295 */ 0260,01,040,01,0302,0110,01,034,0,
- /* 2304 */ 0261,01,044,01,0302,0120,01,034,0,
- /* 2313 */ 0260,01,044,01,0302,0110,01,034,0,
- /* 2322 */ 0261,01,040,01,0302,0120,01,035,0,
- /* 2331 */ 0260,01,040,01,0302,0110,01,035,0,
- /* 2340 */ 0261,01,044,01,0302,0120,01,035,0,
- /* 2349 */ 0260,01,044,01,0302,0110,01,035,0,
- /* 2358 */ 0261,01,040,01,0302,0120,01,036,0,
- /* 2367 */ 0260,01,040,01,0302,0110,01,036,0,
- /* 2376 */ 0261,01,044,01,0302,0120,01,036,0,
- /* 2385 */ 0260,01,044,01,0302,0110,01,036,0,
- /* 2394 */ 0261,01,040,01,0302,0120,01,037,0,
- /* 2403 */ 0260,01,040,01,0302,0110,01,037,0,
- /* 2412 */ 0261,01,044,01,0302,0120,01,037,0,
- /* 2421 */ 0260,01,044,01,0302,0110,01,037,0,
- /* 2430 */ 0261,01,053,01,0302,0120,01,0,0,
- /* 2439 */ 0260,01,053,01,0302,0110,01,0,0,
- /* 2448 */ 0261,01,053,01,0302,0120,01,01,0,
- /* 2457 */ 0260,01,053,01,0302,0110,01,01,0,
- /* 2466 */ 0261,01,053,01,0302,0120,01,02,0,
- /* 2475 */ 0260,01,053,01,0302,0110,01,02,0,
- /* 2484 */ 0261,01,053,01,0302,0120,01,03,0,
- /* 2493 */ 0260,01,053,01,0302,0110,01,03,0,
- /* 2502 */ 0261,01,053,01,0302,0120,01,04,0,
- /* 2511 */ 0260,01,053,01,0302,0110,01,04,0,
- /* 2520 */ 0261,01,053,01,0302,0120,01,05,0,
- /* 2529 */ 0260,01,053,01,0302,0110,01,05,0,
- /* 2538 */ 0261,01,053,01,0302,0120,01,06,0,
- /* 2547 */ 0260,01,053,01,0302,0110,01,06,0,
- /* 2556 */ 0261,01,053,01,0302,0120,01,07,0,
- /* 2565 */ 0260,01,053,01,0302,0110,01,07,0,
- /* 2574 */ 0261,01,053,01,0302,0120,01,010,0,
- /* 2583 */ 0260,01,053,01,0302,0110,01,010,0,
- /* 2592 */ 0261,01,053,01,0302,0120,01,011,0,
- /* 2601 */ 0260,01,053,01,0302,0110,01,011,0,
- /* 2610 */ 0261,01,053,01,0302,0120,01,012,0,
- /* 2619 */ 0260,01,053,01,0302,0110,01,012,0,
- /* 2628 */ 0261,01,053,01,0302,0120,01,013,0,
- /* 2637 */ 0260,01,053,01,0302,0110,01,013,0,
- /* 2646 */ 0261,01,053,01,0302,0120,01,014,0,
- /* 2655 */ 0260,01,053,01,0302,0110,01,014,0,
- /* 2664 */ 0261,01,053,01,0302,0120,01,015,0,
- /* 2673 */ 0260,01,053,01,0302,0110,01,015,0,
- /* 2682 */ 0261,01,053,01,0302,0120,01,016,0,
- /* 2691 */ 0260,01,053,01,0302,0110,01,016,0,
- /* 2700 */ 0261,01,053,01,0302,0120,01,017,0,
- /* 2709 */ 0260,01,053,01,0302,0110,01,017,0,
- /* 2718 */ 0261,01,053,01,0302,0120,01,020,0,
- /* 2727 */ 0260,01,053,01,0302,0110,01,020,0,
- /* 2736 */ 0261,01,053,01,0302,0120,01,021,0,
- /* 2745 */ 0260,01,053,01,0302,0110,01,021,0,
- /* 2754 */ 0261,01,053,01,0302,0120,01,022,0,
- /* 2763 */ 0260,01,053,01,0302,0110,01,022,0,
- /* 2772 */ 0261,01,053,01,0302,0120,01,023,0,
- /* 2781 */ 0260,01,053,01,0302,0110,01,023,0,
- /* 2790 */ 0261,01,053,01,0302,0120,01,024,0,
- /* 2799 */ 0260,01,053,01,0302,0110,01,024,0,
- /* 2808 */ 0261,01,053,01,0302,0120,01,025,0,
- /* 2817 */ 0260,01,053,01,0302,0110,01,025,0,
- /* 2826 */ 0261,01,053,01,0302,0120,01,026,0,
- /* 2835 */ 0260,01,053,01,0302,0110,01,026,0,
- /* 2844 */ 0261,01,053,01,0302,0120,01,027,0,
- /* 2853 */ 0260,01,053,01,0302,0110,01,027,0,
- /* 2862 */ 0261,01,053,01,0302,0120,01,030,0,
- /* 2871 */ 0260,01,053,01,0302,0110,01,030,0,
- /* 2880 */ 0261,01,053,01,0302,0120,01,031,0,
- /* 2889 */ 0260,01,053,01,0302,0110,01,031,0,
- /* 2898 */ 0261,01,053,01,0302,0120,01,032,0,
- /* 2907 */ 0260,01,053,01,0302,0110,01,032,0,
- /* 2916 */ 0261,01,053,01,0302,0120,01,033,0,
- /* 2925 */ 0260,01,053,01,0302,0110,01,033,0,
- /* 2934 */ 0261,01,053,01,0302,0120,01,034,0,
- /* 2943 */ 0260,01,053,01,0302,0110,01,034,0,
- /* 2952 */ 0261,01,053,01,0302,0120,01,035,0,
- /* 2961 */ 0260,01,053,01,0302,0110,01,035,0,
- /* 2970 */ 0261,01,053,01,0302,0120,01,036,0,
- /* 2979 */ 0260,01,053,01,0302,0110,01,036,0,
- /* 2988 */ 0261,01,053,01,0302,0120,01,037,0,
- /* 2997 */ 0260,01,053,01,0302,0110,01,037,0,
- /* 3006 */ 0261,01,052,01,0302,0120,01,0,0,
- /* 3015 */ 0260,01,052,01,0302,0110,01,0,0,
- /* 3024 */ 0261,01,052,01,0302,0120,01,01,0,
- /* 3033 */ 0260,01,052,01,0302,0110,01,01,0,
- /* 3042 */ 0261,01,052,01,0302,0120,01,02,0,
- /* 3051 */ 0260,01,052,01,0302,0110,01,02,0,
- /* 3060 */ 0261,01,052,01,0302,0120,01,03,0,
- /* 3069 */ 0260,01,052,01,0302,0110,01,03,0,
- /* 3078 */ 0261,01,052,01,0302,0120,01,04,0,
- /* 3087 */ 0260,01,052,01,0302,0110,01,04,0,
- /* 3096 */ 0261,01,052,01,0302,0120,01,05,0,
- /* 3105 */ 0260,01,052,01,0302,0110,01,05,0,
- /* 3114 */ 0261,01,052,01,0302,0120,01,06,0,
- /* 3123 */ 0260,01,052,01,0302,0110,01,06,0,
- /* 3132 */ 0261,01,052,01,0302,0120,01,07,0,
- /* 3141 */ 0260,01,052,01,0302,0110,01,07,0,
- /* 3150 */ 0261,01,052,01,0302,0120,01,010,0,
- /* 3159 */ 0260,01,052,01,0302,0110,01,010,0,
- /* 3168 */ 0261,01,052,01,0302,0120,01,011,0,
- /* 3177 */ 0260,01,052,01,0302,0110,01,011,0,
- /* 3186 */ 0261,01,052,01,0302,0120,01,012,0,
- /* 3195 */ 0260,01,052,01,0302,0110,01,012,0,
- /* 3204 */ 0261,01,052,01,0302,0120,01,013,0,
- /* 3213 */ 0260,01,052,01,0302,0110,01,013,0,
- /* 3222 */ 0261,01,052,01,0302,0120,01,014,0,
- /* 3231 */ 0260,01,052,01,0302,0110,01,014,0,
- /* 3240 */ 0261,01,052,01,0302,0120,01,015,0,
- /* 3249 */ 0260,01,052,01,0302,0110,01,015,0,
- /* 3258 */ 0261,01,052,01,0302,0120,01,016,0,
- /* 3267 */ 0260,01,052,01,0302,0110,01,016,0,
- /* 3276 */ 0261,01,052,01,0302,0120,01,017,0,
- /* 3285 */ 0260,01,052,01,0302,0110,01,017,0,
- /* 3294 */ 0261,01,052,01,0302,0120,01,020,0,
- /* 3303 */ 0260,01,052,01,0302,0110,01,020,0,
- /* 3312 */ 0261,01,052,01,0302,0120,01,021,0,
- /* 3321 */ 0260,01,052,01,0302,0110,01,021,0,
- /* 3330 */ 0261,01,052,01,0302,0120,01,022,0,
- /* 3339 */ 0260,01,052,01,0302,0110,01,022,0,
- /* 3348 */ 0261,01,052,01,0302,0120,01,023,0,
- /* 3357 */ 0260,01,052,01,0302,0110,01,023,0,
- /* 3366 */ 0261,01,052,01,0302,0120,01,024,0,
- /* 3375 */ 0260,01,052,01,0302,0110,01,024,0,
- /* 3384 */ 0261,01,052,01,0302,0120,01,025,0,
- /* 3393 */ 0260,01,052,01,0302,0110,01,025,0,
- /* 3402 */ 0261,01,052,01,0302,0120,01,026,0,
- /* 3411 */ 0260,01,052,01,0302,0110,01,026,0,
- /* 3420 */ 0261,01,052,01,0302,0120,01,027,0,
- /* 3429 */ 0260,01,052,01,0302,0110,01,027,0,
- /* 3438 */ 0261,01,052,01,0302,0120,01,030,0,
- /* 3447 */ 0260,01,052,01,0302,0110,01,030,0,
- /* 3456 */ 0261,01,052,01,0302,0120,01,031,0,
- /* 3465 */ 0260,01,052,01,0302,0110,01,031,0,
- /* 3474 */ 0261,01,052,01,0302,0120,01,032,0,
- /* 3483 */ 0260,01,052,01,0302,0110,01,032,0,
- /* 3492 */ 0261,01,052,01,0302,0120,01,033,0,
- /* 3501 */ 0260,01,052,01,0302,0110,01,033,0,
- /* 3510 */ 0261,01,052,01,0302,0120,01,034,0,
- /* 3519 */ 0260,01,052,01,0302,0110,01,034,0,
- /* 3528 */ 0261,01,052,01,0302,0120,01,035,0,
- /* 3537 */ 0260,01,052,01,0302,0110,01,035,0,
- /* 3546 */ 0261,01,052,01,0302,0120,01,036,0,
- /* 3555 */ 0260,01,052,01,0302,0110,01,036,0,
- /* 3564 */ 0261,01,052,01,0302,0120,01,037,0,
- /* 3573 */ 0260,01,052,01,0302,0110,01,037,0,
- /* 3582 */ 0261,03,01,01,0114,0120,0174,03,0,
- /* 3591 */ 0260,03,01,01,0114,0110,0174,02,0,
- /* 3600 */ 0361,03,017,072,0104,0110,01,0,0,
- /* 3609 */ 0361,03,017,072,0104,0110,01,01,0,
- /* 3618 */ 0361,03,017,072,0104,0110,01,020,0,
- /* 3627 */ 0361,03,017,072,0104,0110,01,021,0,
- /* 3636 */ 0261,03,041,01,0104,0120,01,0,0,
- /* 3645 */ 0260,03,041,01,0104,0110,01,0,0,
- /* 3654 */ 0261,03,041,01,0104,0120,01,01,0,
- /* 3663 */ 0260,03,041,01,0104,0110,01,01,0,
- /* 3672 */ 0261,03,041,01,0104,0120,01,020,0,
- /* 3681 */ 0260,03,041,01,0104,0110,01,020,0,
- /* 3690 */ 0261,03,041,01,0104,0120,01,021,0,
- /* 3699 */ 0260,03,041,01,0104,0110,01,021,0,
- /* 3708 */ 0261,03,01,01,0151,0120,0174,03,0,
- /* 3717 */ 0260,03,01,01,0151,0110,0174,02,0,
- /* 3726 */ 0261,03,05,01,0151,0120,0174,03,0,
- /* 3735 */ 0260,03,05,01,0151,0110,0174,02,0,
- /* 3744 */ 0261,03,021,01,0151,0130,0174,02,0,
- /* 3753 */ 0260,03,021,01,0151,0120,0174,01,0,
- /* 3762 */ 0261,03,025,01,0151,0130,0174,02,0,
- /* 3771 */ 0260,03,025,01,0151,0120,0174,01,0,
- /* 3780 */ 0261,03,01,01,0150,0120,0174,03,0,
- /* 3789 */ 0260,03,01,01,0150,0110,0174,02,0,
- /* 3798 */ 0261,03,05,01,0150,0120,0174,03,0,
- /* 3807 */ 0260,03,05,01,0150,0110,0174,02,0,
- /* 3816 */ 0261,03,021,01,0150,0130,0174,02,0,
- /* 3825 */ 0260,03,021,01,0150,0120,0174,01,0,
- /* 3834 */ 0261,03,025,01,0150,0130,0174,02,0,
- /* 3843 */ 0260,03,025,01,0150,0120,0174,01,0,
- /* 3852 */ 0261,03,01,01,0153,0120,0174,03,0,
- /* 3861 */ 0260,03,01,01,0153,0110,0174,02,0,
- /* 3870 */ 0261,03,021,01,0153,0130,0174,02,0,
- /* 3879 */ 0260,03,021,01,0153,0120,0174,01,0,
- /* 3888 */ 0261,03,01,01,0152,0120,0174,03,0,
- /* 3897 */ 0260,03,01,01,0152,0110,0174,02,0,
- /* 3906 */ 0261,03,021,01,0152,0130,0174,02,0,
- /* 3915 */ 0260,03,021,01,0152,0120,0174,01,0,
- /* 3924 */ 0261,03,01,01,0135,0120,0174,03,0,
- /* 3933 */ 0260,03,01,01,0135,0110,0174,02,0,
- /* 3942 */ 0261,03,05,01,0135,0120,0174,03,0,
- /* 3951 */ 0260,03,05,01,0135,0110,0174,02,0,
- /* 3960 */ 0261,03,021,01,0135,0130,0174,02,0,
- /* 3969 */ 0260,03,021,01,0135,0120,0174,01,0,
- /* 3978 */ 0261,03,025,01,0135,0130,0174,02,0,
- /* 3987 */ 0260,03,025,01,0135,0120,0174,01,0,
- /* 3996 */ 0261,03,01,01,0134,0120,0174,03,0,
- /* 4005 */ 0260,03,01,01,0134,0110,0174,02,0,
- /* 4014 */ 0261,03,05,01,0134,0120,0174,03,0,
- /* 4023 */ 0260,03,05,01,0134,0110,0174,02,0,
- /* 4032 */ 0261,03,021,01,0134,0130,0174,02,0,
- /* 4041 */ 0260,03,021,01,0134,0120,0174,01,0,
- /* 4050 */ 0261,03,025,01,0134,0130,0174,02,0,
- /* 4059 */ 0260,03,025,01,0134,0120,0174,01,0,
- /* 4068 */ 0261,03,01,01,0137,0120,0174,03,0,
- /* 4077 */ 0260,03,01,01,0137,0110,0174,02,0,
- /* 4086 */ 0261,03,05,01,0137,0120,0174,03,0,
- /* 4095 */ 0260,03,05,01,0137,0110,0174,02,0,
- /* 4104 */ 0261,03,021,01,0137,0130,0174,02,0,
- /* 4113 */ 0260,03,021,01,0137,0120,0174,01,0,
- /* 4122 */ 0261,03,025,01,0137,0130,0174,02,0,
- /* 4131 */ 0260,03,025,01,0137,0120,0174,01,0,
- /* 4140 */ 0261,03,01,01,0136,0120,0174,03,0,
- /* 4149 */ 0260,03,01,01,0136,0110,0174,02,0,
- /* 4158 */ 0261,03,05,01,0136,0120,0174,03,0,
- /* 4167 */ 0260,03,05,01,0136,0110,0174,02,0,
- /* 4176 */ 0261,03,021,01,0136,0130,0174,02,0,
- /* 4185 */ 0260,03,021,01,0136,0120,0174,01,0,
- /* 4194 */ 0261,03,025,01,0136,0130,0174,02,0,
- /* 4203 */ 0260,03,025,01,0136,0120,0174,01,0,
- /* 4212 */ 0261,03,01,01,0155,0120,0174,03,0,
- /* 4221 */ 0260,03,01,01,0155,0110,0174,02,0,
- /* 4230 */ 0261,03,05,01,0155,0120,0174,03,0,
- /* 4239 */ 0260,03,05,01,0155,0110,0174,02,0,
- /* 4248 */ 0261,03,021,01,0155,0130,0174,02,0,
- /* 4257 */ 0260,03,021,01,0155,0120,0174,01,0,
- /* 4266 */ 0261,03,025,01,0155,0130,0174,02,0,
- /* 4275 */ 0260,03,025,01,0155,0120,0174,01,0,
- /* 4284 */ 0261,03,01,01,0154,0120,0174,03,0,
- /* 4293 */ 0260,03,01,01,0154,0110,0174,02,0,
- /* 4302 */ 0261,03,05,01,0154,0120,0174,03,0,
- /* 4311 */ 0260,03,05,01,0154,0110,0174,02,0,
- /* 4320 */ 0261,03,021,01,0154,0130,0174,02,0,
- /* 4329 */ 0260,03,021,01,0154,0120,0174,01,0,
- /* 4338 */ 0261,03,025,01,0154,0130,0174,02,0,
- /* 4347 */ 0260,03,025,01,0154,0120,0174,01,0,
- /* 4356 */ 0261,03,01,01,0157,0120,0174,03,0,
- /* 4365 */ 0260,03,01,01,0157,0110,0174,02,0,
- /* 4374 */ 0261,03,021,01,0157,0130,0174,02,0,
- /* 4383 */ 0260,03,021,01,0157,0120,0174,01,0,
- /* 4392 */ 0261,03,01,01,0156,0120,0174,03,0,
- /* 4401 */ 0260,03,01,01,0156,0110,0174,02,0,
- /* 4410 */ 0261,03,021,01,0156,0130,0174,02,0,
- /* 4419 */ 0260,03,021,01,0156,0120,0174,01,0,
- /* 4428 */ 0261,03,01,01,0171,0120,0174,03,0,
- /* 4437 */ 0260,03,01,01,0171,0110,0174,02,0,
- /* 4446 */ 0261,03,05,01,0171,0120,0174,03,0,
- /* 4455 */ 0260,03,05,01,0171,0110,0174,02,0,
- /* 4464 */ 0261,03,021,01,0171,0130,0174,02,0,
- /* 4473 */ 0260,03,021,01,0171,0120,0174,01,0,
- /* 4482 */ 0261,03,025,01,0171,0130,0174,02,0,
- /* 4491 */ 0260,03,025,01,0171,0120,0174,01,0,
- /* 4500 */ 0261,03,01,01,0170,0120,0174,03,0,
- /* 4509 */ 0260,03,01,01,0170,0110,0174,02,0,
- /* 4518 */ 0261,03,05,01,0170,0120,0174,03,0,
- /* 4527 */ 0260,03,05,01,0170,0110,0174,02,0,
- /* 4536 */ 0261,03,021,01,0170,0130,0174,02,0,
- /* 4545 */ 0260,03,021,01,0170,0120,0174,01,0,
- /* 4554 */ 0261,03,025,01,0170,0130,0174,02,0,
- /* 4563 */ 0260,03,025,01,0170,0120,0174,01,0,
- /* 4572 */ 0261,03,01,01,0173,0120,0174,03,0,
- /* 4581 */ 0260,03,01,01,0173,0110,0174,02,0,
- /* 4590 */ 0261,03,021,01,0173,0130,0174,02,0,
- /* 4599 */ 0260,03,021,01,0173,0120,0174,01,0,
- /* 4608 */ 0261,03,01,01,0172,0120,0174,03,0,
- /* 4617 */ 0260,03,01,01,0172,0110,0174,02,0,
- /* 4626 */ 0261,03,021,01,0172,0130,0174,02,0,
- /* 4635 */ 0260,03,021,01,0172,0120,0174,01,0,
- /* 4644 */ 0261,03,01,01,0175,0120,0174,03,0,
- /* 4653 */ 0260,03,01,01,0175,0110,0174,02,0,
- /* 4662 */ 0261,03,05,01,0175,0120,0174,03,0,
- /* 4671 */ 0260,03,05,01,0175,0110,0174,02,0,
- /* 4680 */ 0261,03,021,01,0175,0130,0174,02,0,
- /* 4689 */ 0260,03,021,01,0175,0120,0174,01,0,
- /* 4698 */ 0261,03,025,01,0175,0130,0174,02,0,
- /* 4707 */ 0260,03,025,01,0175,0120,0174,01,0,
- /* 4716 */ 0261,03,01,01,0174,0120,0174,03,0,
- /* 4725 */ 0260,03,01,01,0174,0110,0174,02,0,
- /* 4734 */ 0261,03,05,01,0174,0120,0174,03,0,
- /* 4743 */ 0260,03,05,01,0174,0110,0174,02,0,
- /* 4752 */ 0261,03,021,01,0174,0130,0174,02,0,
- /* 4761 */ 0260,03,021,01,0174,0120,0174,01,0,
- /* 4770 */ 0261,03,025,01,0174,0130,0174,02,0,
- /* 4779 */ 0260,03,025,01,0174,0120,0174,01,0,
- /* 4788 */ 0261,03,01,01,0177,0120,0174,03,0,
- /* 4797 */ 0260,03,01,01,0177,0110,0174,02,0,
- /* 4806 */ 0261,03,021,01,0177,0130,0174,02,0,
- /* 4815 */ 0260,03,021,01,0177,0120,0174,01,0,
- /* 4824 */ 0261,03,01,01,0176,0120,0174,03,0,
- /* 4833 */ 0260,03,01,01,0176,0110,0174,02,0,
- /* 4842 */ 0261,03,021,01,0176,0130,0174,02,0,
- /* 4851 */ 0260,03,021,01,0176,0120,0174,01,0,
- /* 4860 */ 0261,0110,0,01,0242,0120,0174,03,0,
- /* 4869 */ 0260,0110,0,01,0242,0110,0174,02,0,
- /* 4878 */ 0261,0110,04,01,0242,0120,0174,03,0,
- /* 4887 */ 0260,0110,04,01,0242,0110,0174,02,0,
- /* 4896 */ 0261,0110,020,01,0242,0130,0174,02,0,
- /* 4905 */ 0260,0110,020,01,0242,0120,0174,01,0,
- /* 4914 */ 0261,0110,024,01,0242,0130,0174,02,0,
- /* 4923 */ 0260,0110,024,01,0242,0120,0174,01,0,
- /* 4932 */ 0261,0110,0,01,0236,0120,0174,03,0,
- /* 4941 */ 0260,0110,0,01,0236,0110,0174,02,0,
- /* 4950 */ 0261,0110,0,01,0237,0120,0174,03,0,
- /* 4959 */ 0260,0110,0,01,0237,0110,0174,02,0,
- /* 4968 */ 0261,0110,0,01,0227,0120,0174,03,0,
- /* 4977 */ 0260,0110,0,01,0227,0110,0174,02,0,
- /* 4986 */ 0261,0110,0,01,0216,0120,0174,03,0,
- /* 4995 */ 0260,0110,0,01,0216,0110,0174,02,0,
- /* 5004 */ 0261,0110,0,01,0217,0120,0174,03,0,
- /* 5013 */ 0260,0110,0,01,0217,0110,0174,02,0,
- /* 5022 */ 0261,0110,0,01,0207,0120,0174,03,0,
- /* 5031 */ 0260,0110,0,01,0207,0110,0174,02,0,
- /* 5040 */ 0261,0110,0,01,0206,0120,0174,03,0,
- /* 5049 */ 0260,0110,0,01,0206,0110,0174,02,0,
- /* 5058 */ 0261,0110,0,01,0205,0120,0174,03,0,
- /* 5067 */ 0260,0110,0,01,0205,0110,0174,02,0,
- /* 5076 */ 0261,0110,0,01,0226,0120,0174,03,0,
- /* 5085 */ 0260,0110,0,01,0226,0110,0174,02,0,
- /* 5094 */ 0261,0110,0,01,0225,0120,0174,03,0,
- /* 5103 */ 0260,0110,0,01,0225,0110,0174,02,0,
- /* 5112 */ 0261,0110,0,01,0246,0120,0174,03,0,
- /* 5121 */ 0260,0110,0,01,0246,0110,0174,02,0,
- /* 5130 */ 0261,0110,0,01,0266,0120,0174,03,0,
- /* 5139 */ 0260,0110,0,01,0266,0110,0174,02,0,
- /* 5148 */ 0261,0110,020,01,0243,0130,0174,02,0,
- /* 5157 */ 0260,0110,020,01,0243,0120,0174,01,0,
- /* 5166 */ 0261,0110,0,01,0243,0120,0174,03,0,
- /* 5175 */ 0260,0110,0,01,0243,0110,0174,02,0,
- /* 5184 */ 0323,02,017,017,0110,01,0277,0,
- /* 5192 */ 0323,02,017,017,0110,01,035,0,
- /* 5200 */ 0323,02,017,017,0110,01,0256,0,
- /* 5208 */ 0323,02,017,017,0110,01,0236,0,
- /* 5216 */ 0323,02,017,017,0110,01,0260,0,
- /* 5224 */ 0323,02,017,017,0110,01,0220,0,
- /* 5232 */ 0323,02,017,017,0110,01,0240,0,
- /* 5240 */ 0323,02,017,017,0110,01,0244,0,
- /* 5248 */ 0323,02,017,017,0110,01,0224,0,
- /* 5256 */ 0323,02,017,017,0110,01,0264,0,
- /* 5264 */ 0323,02,017,017,0110,01,0226,0,
- /* 5272 */ 0323,02,017,017,0110,01,0246,0,
- /* 5280 */ 0323,02,017,017,0110,01,0266,0,
- /* 5288 */ 0323,02,017,017,0110,01,0247,0,
- /* 5296 */ 0323,02,017,017,0110,01,0227,0,
- /* 5304 */ 0323,02,017,017,0110,01,0232,0,
- /* 5312 */ 0323,02,017,017,0110,01,0252,0,
- /* 5320 */ 0323,02,017,017,0110,01,015,0,
- /* 5328 */ 0323,02,017,017,0110,01,0267,0,
- /* 5336 */ 0360,02,017,0302,0110,01,0,0,
- /* 5344 */ 0363,02,017,0302,0110,01,0,0,
- /* 5352 */ 0360,02,017,0302,0110,01,02,0,
- /* 5360 */ 0363,02,017,0302,0110,01,02,0,
- /* 5368 */ 0360,02,017,0302,0110,01,01,0,
- /* 5376 */ 0363,02,017,0302,0110,01,01,0,
- /* 5384 */ 0360,02,017,0302,0110,01,04,0,
- /* 5392 */ 0363,02,017,0302,0110,01,04,0,
- /* 5400 */ 0360,02,017,0302,0110,01,06,0,
- /* 5408 */ 0363,02,017,0302,0110,01,06,0,
- /* 5416 */ 0360,02,017,0302,0110,01,05,0,
- /* 5424 */ 0363,02,017,0302,0110,01,05,0,
- /* 5432 */ 0360,02,017,0302,0110,01,07,0,
- /* 5440 */ 0363,02,017,0302,0110,01,07,0,
- /* 5448 */ 0360,02,017,0302,0110,01,03,0,
- /* 5456 */ 0363,02,017,0302,0110,01,03,0,
- /* 5464 */ 0360,0323,02,017,0160,0110,022,0,
- /* 5472 */ 0323,02,017,017,0110,01,034,0,
- /* 5480 */ 0323,02,017,017,0110,01,0212,0,
- /* 5488 */ 0323,02,017,017,0110,01,0216,0,
- /* 5496 */ 0323,02,017,017,0110,01,014,0,
- /* 5504 */ 0323,02,017,017,0110,01,0273,0,
- /* 5512 */ 0361,02,017,0302,0110,01,0,0,
- /* 5520 */ 0362,02,017,0302,0110,01,0,0,
- /* 5528 */ 0361,02,017,0302,0110,01,02,0,
- /* 5536 */ 0362,02,017,0302,0110,01,02,0,
- /* 5544 */ 0361,02,017,0302,0110,01,01,0,
- /* 5552 */ 0362,02,017,0302,0110,01,01,0,
- /* 5560 */ 0361,02,017,0302,0110,01,04,0,
- /* 5568 */ 0362,02,017,0302,0110,01,04,0,
- /* 5576 */ 0361,02,017,0302,0110,01,06,0,
- /* 5584 */ 0362,02,017,0302,0110,01,06,0,
- /* 5592 */ 0361,02,017,0302,0110,01,05,0,
- /* 5600 */ 0362,02,017,0302,0110,01,05,0,
- /* 5608 */ 0361,02,017,0302,0110,01,07,0,
- /* 5616 */ 0362,02,017,0302,0110,01,07,0,
- /* 5624 */ 0361,02,017,0302,0110,01,03,0,
- /* 5632 */ 0362,02,017,0302,0110,01,03,0,
- /* 5640 */ 0323,0361,03,017,070,0200,0110,0,
- /* 5648 */ 0323,0361,03,017,070,0201,0110,0,
- /* 5656 */ 0360,03,017,072,017,0110,026,0,
- /* 5664 */ 0361,03,017,072,017,0110,026,0,
- /* 5672 */ 0361,02,017,0170,0200,025,026,0,
- /* 5680 */ 0362,02,017,0170,0110,026,027,0,
- /* 5688 */ 0361,03,017,072,015,0110,026,0,
- /* 5696 */ 0361,03,017,072,014,0110,026,0,
- /* 5704 */ 0361,03,017,072,0101,0110,026,0,
- /* 5712 */ 0361,03,017,072,0100,0110,026,0,
- /* 5720 */ 0361,03,017,072,041,0110,026,0,
- /* 5728 */ 0361,03,017,072,0102,0110,026,0,
- /* 5736 */ 0361,03,017,072,016,0110,026,0,
- /* 5744 */ 0361,03,017,072,011,0110,026,0,
- /* 5752 */ 0361,03,017,072,010,0110,026,0,
- /* 5760 */ 0361,03,017,072,013,0110,026,0,
- /* 5768 */ 0361,03,017,072,012,0110,026,0,
- /* 5776 */ 0320,0332,03,017,070,0361,0110,0,
- /* 5784 */ 0321,0332,03,017,070,0361,0110,0,
- /* 5792 */ 0324,0332,03,017,070,0360,0110,0,
- /* 5800 */ 0324,0332,03,017,070,0361,0110,0,
- /* 5808 */ 0361,03,017,072,0141,0110,026,0,
- /* 5816 */ 0361,03,017,072,0140,0110,026,0,
- /* 5824 */ 0361,03,017,072,0143,0110,026,0,
- /* 5832 */ 0361,03,017,072,0142,0110,026,0,
- /* 5840 */ 0323,02,017,017,0110,01,0206,0,
- /* 5848 */ 0323,02,017,017,0110,01,0207,0,
- /* 5856 */ 0361,03,017,072,0337,0110,022,0,
- /* 5864 */ 0270,03,041,01,0337,0110,022,0,
- /* 5872 */ 0261,03,041,01,015,0120,023,0,
- /* 5880 */ 0260,03,041,01,015,0110,022,0,
- /* 5888 */ 0261,03,045,01,015,0120,023,0,
- /* 5896 */ 0260,03,045,01,015,0110,022,0,
- /* 5904 */ 0261,03,041,01,014,0120,023,0,
- /* 5912 */ 0260,03,041,01,014,0110,022,0,
- /* 5920 */ 0261,03,045,01,014,0120,023,0,
- /* 5928 */ 0260,03,045,01,014,0110,022,0,
- /* 5936 */ 0261,01,041,01,0302,0120,023,0,
- /* 5944 */ 0260,01,041,01,0302,0110,022,0,
- /* 5952 */ 0261,01,045,01,0302,0120,023,0,
- /* 5960 */ 0260,01,045,01,0302,0110,022,0,
- /* 5968 */ 0261,01,040,01,0302,0120,023,0,
- /* 5976 */ 0260,01,040,01,0302,0110,022,0,
- /* 5984 */ 0261,01,044,01,0302,0120,023,0,
- /* 5992 */ 0260,01,044,01,0302,0110,022,0,
- /* 6000 */ 0261,01,053,01,0302,0120,023,0,
- /* 6008 */ 0260,01,053,01,0302,0110,022,0,
- /* 6016 */ 0261,01,052,01,0302,0120,023,0,
- /* 6024 */ 0260,01,052,01,0302,0110,022,0,
- /* 6032 */ 0261,03,041,01,0101,0120,023,0,
- /* 6040 */ 0260,03,041,01,0101,0110,022,0,
- /* 6048 */ 0261,03,041,01,0100,0120,023,0,
- /* 6056 */ 0260,03,041,01,0100,0110,022,0,
- /* 6064 */ 0261,03,045,01,0100,0120,023,0,
- /* 6072 */ 0260,03,045,01,0100,0110,022,0,
- /* 6080 */ 0270,03,05,01,031,0101,022,0,
- /* 6088 */ 0270,03,041,01,027,0101,022,0,
- /* 6096 */ 0261,03,05,01,030,0120,023,0,
- /* 6104 */ 0261,03,041,01,041,0120,023,0,
- /* 6112 */ 0260,03,041,01,041,0110,022,0,
- /* 6120 */ 0261,03,041,01,0102,0120,023,0,
- /* 6128 */ 0260,03,041,01,0102,0110,022,0,
- /* 6136 */ 0261,03,041,01,017,0120,023,0,
- /* 6144 */ 0260,03,041,01,017,0110,022,0,
- /* 6152 */ 0261,03,041,01,016,0120,023,0,
- /* 6160 */ 0260,03,041,01,016,0110,022,0,
- /* 6168 */ 0270,03,041,01,0141,0110,022,0,
- /* 6176 */ 0270,03,041,01,0140,0110,022,0,
- /* 6184 */ 0270,03,041,01,0143,0110,022,0,
- /* 6192 */ 0270,03,041,01,0142,0110,022,0,
- /* 6200 */ 0270,03,01,01,05,0110,022,0,
- /* 6208 */ 0270,03,05,01,05,0110,022,0,
- /* 6216 */ 0270,03,01,01,04,0110,022,0,
- /* 6224 */ 0270,03,05,01,04,0110,022,0,
- /* 6232 */ 0261,03,05,01,06,0120,023,0,
- /* 6240 */ 0270,03,01,01,024,0101,022,0,
- /* 6248 */ 0270,01,01,01,0305,0110,022,0,
- /* 6256 */ 0270,03,01,01,025,0101,022,0,
- /* 6264 */ 0270,03,01,01,026,0101,022,0,
- /* 6272 */ 0270,03,021,01,026,0101,022,0,
- /* 6280 */ 0261,03,041,01,040,0120,023,0,
- /* 6288 */ 0260,03,041,01,040,0110,022,0,
- /* 6296 */ 0261,01,041,01,0304,0120,023,0,
- /* 6304 */ 0260,01,041,01,0304,0110,022,0,
- /* 6312 */ 0261,03,01,01,042,0120,023,0,
- /* 6320 */ 0260,03,01,01,042,0110,022,0,
- /* 6328 */ 0261,03,021,01,042,0120,023,0,
- /* 6336 */ 0260,03,021,01,042,0110,022,0,
- /* 6344 */ 0270,01,041,01,0160,0110,022,0,
- /* 6352 */ 0270,01,042,01,0160,0110,022,0,
- /* 6360 */ 0270,01,043,01,0160,0110,022,0,
- /* 6368 */ 0260,01,041,01,0163,0217,022,0,
- /* 6376 */ 0260,01,041,01,0163,0207,021,0,
- /* 6384 */ 0260,01,041,01,0163,0213,022,0,
- /* 6392 */ 0260,01,041,01,0163,0203,021,0,
- /* 6400 */ 0260,01,041,01,0161,0216,022,0,
- /* 6408 */ 0260,01,041,01,0161,0206,021,0,
- /* 6416 */ 0260,01,041,01,0162,0216,022,0,
- /* 6424 */ 0260,01,041,01,0162,0206,021,0,
- /* 6432 */ 0260,01,041,01,0163,0216,022,0,
- /* 6440 */ 0260,01,041,01,0163,0206,021,0,
- /* 6448 */ 0260,01,041,01,0161,0214,022,0,
- /* 6456 */ 0260,01,041,01,0161,0204,021,0,
- /* 6464 */ 0260,01,041,01,0162,0214,022,0,
- /* 6472 */ 0260,01,041,01,0162,0204,021,0,
- /* 6480 */ 0260,01,041,01,0161,0212,022,0,
- /* 6488 */ 0260,01,041,01,0161,0202,021,0,
- /* 6496 */ 0260,01,041,01,0162,0212,022,0,
- /* 6504 */ 0260,01,041,01,0162,0202,021,0,
- /* 6512 */ 0260,01,041,01,0163,0212,022,0,
- /* 6520 */ 0260,01,041,01,0163,0202,021,0,
- /* 6528 */ 0270,03,041,01,011,0110,022,0,
- /* 6536 */ 0270,03,045,01,011,0110,022,0,
- /* 6544 */ 0270,03,041,01,010,0110,022,0,
- /* 6552 */ 0270,03,045,01,010,0110,022,0,
- /* 6560 */ 0261,03,041,01,013,0120,023,0,
- /* 6568 */ 0260,03,041,01,013,0110,022,0,
- /* 6576 */ 0261,03,041,01,012,0120,023,0,
- /* 6584 */ 0260,03,041,01,012,0110,022,0,
- /* 6592 */ 0261,01,041,01,0306,0120,023,0,
- /* 6600 */ 0260,01,041,01,0306,0110,022,0,
- /* 6608 */ 0261,01,045,01,0306,0120,023,0,
- /* 6616 */ 0260,01,045,01,0306,0110,022,0,
- /* 6624 */ 0261,01,040,01,0306,0120,023,0,
- /* 6632 */ 0260,01,040,01,0306,0110,022,0,
- /* 6640 */ 0261,01,044,01,0306,0120,023,0,
- /* 6648 */ 0260,01,044,01,0306,0110,022,0,
- /* 6656 */ 0361,03,017,072,0104,0110,022,0,
- /* 6664 */ 0261,03,041,01,0104,0120,023,0,
- /* 6672 */ 0260,03,041,01,0104,0110,022,0,
- /* 6680 */ 0270,03,05,01,035,0101,022,0,
- /* 6688 */ 0270,03,01,01,035,0101,022,0,
- /* 6696 */ 0260,0112,0,01,022,0211,042,0,
- /* 6704 */ 0260,0112,020,01,022,0211,042,0,
- /* 6712 */ 0260,0112,0,01,022,0210,042,0,
- /* 6720 */ 0260,0112,020,01,022,0210,042,0,
- /* 6728 */ 0261,0110,0,01,0314,0120,023,0,
- /* 6736 */ 0260,0110,0,01,0314,0110,022,0,
- /* 6744 */ 0261,0110,0,01,0316,0120,023,0,
- /* 6752 */ 0260,0110,0,01,0316,0110,022,0,
- /* 6760 */ 0261,0110,0,01,0317,0120,023,0,
- /* 6768 */ 0260,0110,0,01,0317,0110,022,0,
- /* 6776 */ 0261,0110,0,01,0354,0120,023,0,
- /* 6784 */ 0260,0110,0,01,0354,0110,022,0,
- /* 6792 */ 0261,0110,0,01,0356,0120,023,0,
- /* 6800 */ 0260,0110,0,01,0356,0110,022,0,
- /* 6808 */ 0261,0110,0,01,0357,0120,023,0,
- /* 6816 */ 0260,0110,0,01,0357,0110,022,0,
- /* 6824 */ 0261,0110,0,01,0355,0120,023,0,
- /* 6832 */ 0260,0110,0,01,0355,0110,022,0,
- /* 6840 */ 0261,0110,0,01,0315,0120,023,0,
- /* 6848 */ 0260,0110,0,01,0315,0110,022,0,
- /* 6856 */ 0270,0110,0,01,0300,0110,022,0,
- /* 6864 */ 0270,0110,0,01,0300,0100,021,0,
- /* 6872 */ 0270,0110,0,01,0302,0110,022,0,
- /* 6880 */ 0270,0110,0,01,0302,0100,021,0,
- /* 6888 */ 0270,0110,0,01,0303,0110,022,0,
- /* 6896 */ 0270,0110,0,01,0303,0100,021,0,
- /* 6904 */ 0270,0110,0,01,0301,0110,022,0,
- /* 6912 */ 0270,0110,0,01,0301,0100,021,0,
- /* 6920 */ 0320,02,017,0272,0204,025,0,
- /* 6927 */ 0321,02,017,0272,0204,025,0,
- /* 6934 */ 0324,02,017,0272,0204,025,0,
- /* 6941 */ 0320,02,017,0272,0207,025,0,
- /* 6948 */ 0321,02,017,0272,0207,025,0,
- /* 6955 */ 0324,02,017,0272,0207,025,0,
- /* 6962 */ 0320,02,017,0272,0206,025,0,
- /* 6969 */ 0321,02,017,0272,0206,025,0,
- /* 6976 */ 0324,02,017,0272,0206,025,0,
- /* 6983 */ 0320,02,017,0272,0205,025,0,
- /* 6990 */ 0321,02,017,0272,0205,025,0,
- /* 6997 */ 0324,02,017,0272,0205,025,0,
- /* 7004 */ 0323,0313,03,017,01,0337,0,
- /* 7011 */ 0320,0323,02,017,02,0110,0,
- /* 7018 */ 0321,0323,02,017,02,0110,0,
- /* 7025 */ 0320,0323,02,017,03,0110,0,
- /* 7032 */ 0321,0323,02,017,03,0110,0,
- /* 7039 */ 0360,0320,02,017,0156,0110,0,
- /* 7046 */ 0360,0320,02,017,0176,0101,0,
- /* 7053 */ 0360,0323,02,017,0157,0110,0,
- /* 7060 */ 0360,0323,02,017,0177,0101,0,
- /* 7067 */ 0360,0323,02,017,0153,0110,0,
- /* 7074 */ 0360,0323,02,017,0143,0110,0,
- /* 7081 */ 0360,0323,02,017,0147,0110,0,
- /* 7088 */ 0360,0323,02,017,0374,0110,0,
- /* 7095 */ 0360,0323,02,017,0376,0110,0,
- /* 7102 */ 0360,0323,02,017,0354,0110,0,
- /* 7109 */ 0360,0323,02,017,0355,0110,0,
- /* 7116 */ 0360,0323,02,017,0334,0110,0,
- /* 7123 */ 0360,0323,02,017,0335,0110,0,
- /* 7130 */ 0360,0323,02,017,0375,0110,0,
- /* 7137 */ 0360,0323,02,017,0333,0110,0,
- /* 7144 */ 0360,0323,02,017,0337,0110,0,
- /* 7151 */ 0360,0323,02,017,0164,0110,0,
- /* 7158 */ 0360,0323,02,017,0166,0110,0,
- /* 7165 */ 0360,0323,02,017,0165,0110,0,
- /* 7172 */ 0360,0323,02,017,0144,0110,0,
- /* 7179 */ 0360,0323,02,017,0146,0110,0,
- /* 7186 */ 0360,0323,02,017,0145,0110,0,
- /* 7193 */ 0360,0323,02,017,0365,0110,0,
- /* 7200 */ 0360,0323,02,017,0345,0110,0,
- /* 7207 */ 0360,0323,02,017,0325,0110,0,
- /* 7214 */ 0360,0323,02,017,0353,0110,0,
- /* 7221 */ 0360,0323,02,017,0362,0110,0,
- /* 7228 */ 0360,02,017,0162,0206,025,0,
- /* 7235 */ 0360,0323,02,017,0363,0110,0,
- /* 7242 */ 0360,02,017,0163,0206,025,0,
- /* 7249 */ 0360,0323,02,017,0361,0110,0,
- /* 7256 */ 0360,02,017,0161,0206,025,0,
- /* 7263 */ 0360,0323,02,017,0342,0110,0,
- /* 7270 */ 0360,02,017,0162,0204,025,0,
- /* 7277 */ 0360,0323,02,017,0341,0110,0,
- /* 7284 */ 0360,02,017,0161,0204,025,0,
- /* 7291 */ 0360,0323,02,017,0322,0110,0,
- /* 7298 */ 0360,02,017,0162,0202,025,0,
- /* 7305 */ 0360,0323,02,017,0323,0110,0,
- /* 7312 */ 0360,02,017,0163,0202,025,0,
- /* 7319 */ 0360,0323,02,017,0321,0110,0,
- /* 7326 */ 0360,02,017,0161,0202,025,0,
- /* 7333 */ 0360,0323,02,017,0370,0110,0,
- /* 7340 */ 0360,0323,02,017,0372,0110,0,
- /* 7347 */ 0360,0323,02,017,0350,0110,0,
- /* 7354 */ 0360,0323,02,017,0351,0110,0,
- /* 7361 */ 0360,0323,02,017,0330,0110,0,
- /* 7368 */ 0360,0323,02,017,0331,0110,0,
- /* 7375 */ 0360,0323,02,017,0371,0110,0,
- /* 7382 */ 0360,0323,02,017,0150,0110,0,
- /* 7389 */ 0360,0323,02,017,0152,0110,0,
- /* 7396 */ 0360,0323,02,017,0151,0110,0,
- /* 7403 */ 0360,0323,02,017,0140,0110,0,
- /* 7410 */ 0360,0323,02,017,0142,0110,0,
- /* 7417 */ 0360,0323,02,017,0141,0110,0,
- /* 7424 */ 0360,0323,02,017,0357,0110,0,
- /* 7431 */ 0320,02,017,0244,0101,026,0,
- /* 7438 */ 0321,02,017,0244,0101,026,0,
- /* 7445 */ 0324,02,017,0244,0101,026,0,
- /* 7452 */ 0320,02,017,0254,0101,026,0,
- /* 7459 */ 0321,02,017,0254,0101,026,0,
- /* 7466 */ 0324,02,017,0254,0101,026,0,
- /* 7473 */ 0360,0320,02,017,021,0101,0,
- /* 7480 */ 0360,0321,02,017,021,0101,0,
- /* 7487 */ 0360,0320,02,017,023,0110,0,
- /* 7494 */ 0360,0321,02,017,023,0110,0,
- /* 7501 */ 0320,01,017,0330,0100,0110,0,
- /* 7508 */ 0321,01,017,0330,0100,0110,0,
- /* 7515 */ 0324,01,017,0330,0100,0110,0,
- /* 7522 */ 0322,01,017,0330,0200,064,0,
- /* 7529 */ 0320,01,017,0330,0200,064,0,
- /* 7536 */ 0321,01,017,0330,0200,064,0,
- /* 7543 */ 0330,0161,0373,01,0351,064,0,
- /* 7550 */ 0360,02,017,0302,0110,026,0,
- /* 7557 */ 0363,02,017,0302,0110,026,0,
- /* 7564 */ 0324,0363,02,017,052,0110,0,
- /* 7571 */ 0324,0363,02,017,055,0110,0,
- /* 7578 */ 0324,0363,02,017,054,0110,0,
- /* 7585 */ 0360,0324,02,017,0120,0110,0,
- /* 7592 */ 0360,02,017,0306,0110,026,0,
- /* 7599 */ 0360,0323,02,017,0340,0110,0,
- /* 7606 */ 0360,0323,02,017,0343,0110,0,
- /* 7613 */ 0360,02,017,0305,0110,026,0,
- /* 7620 */ 0360,02,017,0304,0110,026,0,
- /* 7627 */ 0360,0323,02,017,0356,0110,0,
- /* 7634 */ 0360,0323,02,017,0336,0110,0,
- /* 7641 */ 0360,0323,02,017,0352,0110,0,
- /* 7648 */ 0360,0323,02,017,0332,0110,0,
- /* 7655 */ 0360,0323,02,017,0344,0110,0,
- /* 7662 */ 0360,0323,02,017,0366,0110,0,
- /* 7669 */ 0324,0360,02,017,0303,0101,0,
- /* 7676 */ 0361,0317,02,017,0176,0101,0,
- /* 7683 */ 0361,0317,02,017,0156,0110,0,
- /* 7690 */ 0361,0324,02,017,0156,0110,0,
- /* 7697 */ 0361,0324,02,017,0176,0101,0,
- /* 7704 */ 0361,02,017,0305,0110,026,0,
- /* 7711 */ 0361,02,017,0304,0110,026,0,
- /* 7718 */ 0360,0323,02,017,0364,0110,0,
- /* 7725 */ 0361,02,017,0160,0110,022,0,
- /* 7732 */ 0363,02,017,0160,0110,022,0,
- /* 7739 */ 0362,02,017,0160,0110,022,0,
- /* 7746 */ 0361,02,017,0163,0207,025,0,
- /* 7753 */ 0361,02,017,0161,0206,025,0,
- /* 7760 */ 0361,02,017,0162,0206,025,0,
- /* 7767 */ 0361,02,017,0163,0206,025,0,
- /* 7774 */ 0361,02,017,0161,0204,025,0,
- /* 7781 */ 0361,02,017,0162,0204,025,0,
- /* 7788 */ 0361,02,017,0163,0203,025,0,
- /* 7795 */ 0361,02,017,0161,0202,025,0,
- /* 7802 */ 0361,02,017,0162,0202,025,0,
- /* 7809 */ 0361,02,017,0163,0202,025,0,
- /* 7816 */ 0360,0323,02,017,0373,0110,0,
- /* 7823 */ 0361,02,017,0302,0110,026,0,
- /* 7830 */ 0362,02,017,0302,0110,026,0,
- /* 7837 */ 0324,0362,02,017,055,0110,0,
- /* 7844 */ 0324,0362,02,017,052,0110,0,
- /* 7851 */ 0324,0362,02,017,054,0110,0,
- /* 7858 */ 0361,0324,02,017,0120,0110,0,
- /* 7865 */ 0361,02,017,0306,0110,026,0,
- /* 7872 */ 0323,0360,02,017,0170,0101,0,
- /* 7879 */ 0323,0360,02,017,0171,0110,0,
- /* 7886 */ 0360,03,017,070,034,0110,0,
- /* 7893 */ 0361,03,017,070,034,0110,0,
- /* 7900 */ 0360,03,017,070,035,0110,0,
- /* 7907 */ 0361,03,017,070,035,0110,0,
- /* 7914 */ 0360,03,017,070,036,0110,0,
- /* 7921 */ 0361,03,017,070,036,0110,0,
- /* 7928 */ 0360,03,017,070,01,0110,0,
- /* 7935 */ 0361,03,017,070,01,0110,0,
- /* 7942 */ 0360,03,017,070,02,0110,0,
- /* 7949 */ 0361,03,017,070,02,0110,0,
- /* 7956 */ 0360,03,017,070,03,0110,0,
- /* 7963 */ 0361,03,017,070,03,0110,0,
- /* 7970 */ 0360,03,017,070,05,0110,0,
- /* 7977 */ 0361,03,017,070,05,0110,0,
- /* 7984 */ 0360,03,017,070,06,0110,0,
- /* 7991 */ 0361,03,017,070,06,0110,0,
- /* 7998 */ 0360,03,017,070,07,0110,0,
- /* 8005 */ 0361,03,017,070,07,0110,0,
- /* 8012 */ 0360,03,017,070,04,0110,0,
- /* 8019 */ 0361,03,017,070,04,0110,0,
- /* 8026 */ 0360,03,017,070,013,0110,0,
- /* 8033 */ 0361,03,017,070,013,0110,0,
- /* 8040 */ 0360,03,017,070,0,0110,0,
- /* 8047 */ 0361,03,017,070,0,0110,0,
- /* 8054 */ 0360,03,017,070,010,0110,0,
- /* 8061 */ 0361,03,017,070,010,0110,0,
- /* 8068 */ 0360,03,017,070,011,0110,0,
- /* 8075 */ 0361,03,017,070,011,0110,0,
- /* 8082 */ 0360,03,017,070,012,0110,0,
- /* 8089 */ 0361,03,017,070,012,0110,0,
- /* 8096 */ 0320,0333,02,017,0275,0110,0,
- /* 8103 */ 0321,0333,02,017,0275,0110,0,
- /* 8110 */ 0324,0333,02,017,0275,0110,0,
- /* 8117 */ 0361,03,017,070,025,0110,0,
- /* 8124 */ 0361,03,017,070,024,0110,0,
- /* 8131 */ 0361,03,017,070,052,0110,0,
- /* 8138 */ 0361,03,017,070,053,0110,0,
- /* 8145 */ 0361,03,017,070,020,0110,0,
- /* 8152 */ 0361,03,017,070,051,0110,0,
- /* 8159 */ 0361,03,017,070,0101,0110,0,
- /* 8166 */ 0361,03,017,070,074,0110,0,
- /* 8173 */ 0361,03,017,070,075,0110,0,
- /* 8180 */ 0361,03,017,070,077,0110,0,
- /* 8187 */ 0361,03,017,070,076,0110,0,
- /* 8194 */ 0361,03,017,070,070,0110,0,
- /* 8201 */ 0361,03,017,070,071,0110,0,
- /* 8208 */ 0361,03,017,070,073,0110,0,
- /* 8215 */ 0361,03,017,070,072,0110,0,
- /* 8222 */ 0361,03,017,070,040,0110,0,
- /* 8229 */ 0361,03,017,070,041,0110,0,
- /* 8236 */ 0361,03,017,070,042,0110,0,
- /* 8243 */ 0361,03,017,070,043,0110,0,
- /* 8250 */ 0361,03,017,070,044,0110,0,
- /* 8257 */ 0361,03,017,070,045,0110,0,
- /* 8264 */ 0361,03,017,070,060,0110,0,
- /* 8271 */ 0361,03,017,070,061,0110,0,
- /* 8278 */ 0361,03,017,070,062,0110,0,
- /* 8285 */ 0361,03,017,070,063,0110,0,
- /* 8292 */ 0361,03,017,070,064,0110,0,
- /* 8299 */ 0361,03,017,070,065,0110,0,
- /* 8306 */ 0361,03,017,070,050,0110,0,
- /* 8313 */ 0361,03,017,070,0100,0110,0,
- /* 8320 */ 0361,03,017,070,027,0110,0,
- /* 8327 */ 0361,03,017,070,067,0110,0,
- /* 8334 */ 0320,0333,02,017,0270,0110,0,
- /* 8341 */ 0321,0333,02,017,0270,0110,0,
- /* 8348 */ 0324,0333,02,017,0270,0110,0,
- /* 8355 */ 0320,03,017,070,0360,0110,0,
- /* 8362 */ 0321,03,017,070,0360,0110,0,
- /* 8369 */ 0324,03,017,070,0360,0110,0,
- /* 8376 */ 0320,03,017,070,0361,0101,0,
- /* 8383 */ 0321,03,017,070,0361,0101,0,
- /* 8390 */ 0324,03,017,070,0361,0101,0,
- /* 8397 */ 0361,03,017,070,0334,0110,0,
- /* 8404 */ 0361,03,017,070,0335,0110,0,
- /* 8411 */ 0361,03,017,070,0336,0110,0,
- /* 8418 */ 0361,03,017,070,0337,0110,0,
- /* 8425 */ 0361,03,017,070,0333,0110,0,
- /* 8432 */ 0261,02,041,01,0334,0120,0,
- /* 8439 */ 0260,02,041,01,0334,0110,0,
- /* 8446 */ 0261,02,041,01,0335,0120,0,
- /* 8453 */ 0260,02,041,01,0335,0110,0,
- /* 8460 */ 0261,02,041,01,0336,0120,0,
- /* 8467 */ 0260,02,041,01,0336,0110,0,
- /* 8474 */ 0261,02,041,01,0337,0120,0,
- /* 8481 */ 0260,02,041,01,0337,0110,0,
- /* 8488 */ 0270,02,041,01,0333,0110,0,
- /* 8495 */ 0261,01,041,01,0130,0120,0,
- /* 8502 */ 0260,01,041,01,0130,0110,0,
- /* 8509 */ 0261,01,045,01,0130,0120,0,
- /* 8516 */ 0260,01,045,01,0130,0110,0,
- /* 8523 */ 0261,01,040,01,0130,0120,0,
- /* 8530 */ 0260,01,040,01,0130,0110,0,
- /* 8537 */ 0261,01,044,01,0130,0120,0,
- /* 8544 */ 0260,01,044,01,0130,0110,0,
- /* 8551 */ 0261,01,053,01,0130,0120,0,
- /* 8558 */ 0260,01,053,01,0130,0110,0,
- /* 8565 */ 0261,01,052,01,0130,0120,0,
- /* 8572 */ 0260,01,052,01,0130,0110,0,
- /* 8579 */ 0261,01,041,01,0320,0120,0,
- /* 8586 */ 0260,01,041,01,0320,0110,0,
- /* 8593 */ 0261,01,045,01,0320,0120,0,
- /* 8600 */ 0260,01,045,01,0320,0110,0,
- /* 8607 */ 0261,01,043,01,0320,0120,0,
- /* 8614 */ 0260,01,043,01,0320,0110,0,
- /* 8621 */ 0261,01,047,01,0320,0120,0,
- /* 8628 */ 0260,01,047,01,0320,0110,0,
- /* 8635 */ 0261,01,041,01,0124,0120,0,
- /* 8642 */ 0260,01,041,01,0124,0110,0,
- /* 8649 */ 0261,01,045,01,0124,0120,0,
- /* 8656 */ 0260,01,045,01,0124,0110,0,
- /* 8663 */ 0261,01,040,01,0124,0120,0,
- /* 8670 */ 0260,01,040,01,0124,0110,0,
- /* 8677 */ 0261,01,044,01,0124,0120,0,
- /* 8684 */ 0260,01,044,01,0124,0110,0,
- /* 8691 */ 0261,01,041,01,0125,0120,0,
- /* 8698 */ 0260,01,041,01,0125,0110,0,
- /* 8705 */ 0261,01,045,01,0125,0120,0,
- /* 8712 */ 0260,01,045,01,0125,0110,0,
- /* 8719 */ 0261,01,040,01,0125,0120,0,
- /* 8726 */ 0260,01,040,01,0125,0110,0,
- /* 8733 */ 0261,01,044,01,0125,0120,0,
- /* 8740 */ 0260,01,044,01,0125,0110,0,
- /* 8747 */ 0270,02,01,01,030,0110,0,
- /* 8754 */ 0270,02,05,01,030,0110,0,
- /* 8761 */ 0270,02,05,01,031,0110,0,
- /* 8768 */ 0270,02,05,01,032,0110,0,
- /* 8775 */ 0270,01,051,01,057,0110,0,
- /* 8782 */ 0270,01,050,01,057,0110,0,
- /* 8789 */ 0270,01,042,01,0346,0110,0,
- /* 8796 */ 0270,01,046,01,0346,0110,0,
- /* 8803 */ 0270,01,040,01,0133,0110,0,
- /* 8810 */ 0270,01,044,01,0133,0110,0,
- /* 8817 */ 0270,01,043,01,0346,0110,0,
- /* 8824 */ 0270,01,047,01,0346,0110,0,
- /* 8831 */ 0270,01,041,01,0132,0110,0,
- /* 8838 */ 0270,01,045,01,0132,0110,0,
- /* 8845 */ 0270,01,041,01,0133,0110,0,
- /* 8852 */ 0270,01,045,01,0133,0110,0,
- /* 8859 */ 0270,01,040,01,0132,0110,0,
- /* 8866 */ 0270,01,044,01,0132,0110,0,
- /* 8873 */ 0270,01,013,01,055,0110,0,
- /* 8880 */ 0270,01,033,01,055,0110,0,
- /* 8887 */ 0261,01,053,01,0132,0120,0,
- /* 8894 */ 0260,01,053,01,0132,0110,0,
- /* 8901 */ 0261,01,013,01,052,0120,0,
- /* 8908 */ 0260,01,013,01,052,0110,0,
- /* 8915 */ 0261,01,033,01,052,0120,0,
- /* 8922 */ 0260,01,033,01,052,0110,0,
- /* 8929 */ 0261,01,012,01,052,0120,0,
- /* 8936 */ 0260,01,012,01,052,0110,0,
- /* 8943 */ 0261,01,032,01,052,0120,0,
- /* 8950 */ 0260,01,032,01,052,0110,0,
- /* 8957 */ 0261,01,052,01,0132,0120,0,
- /* 8964 */ 0260,01,052,01,0132,0110,0,
- /* 8971 */ 0270,01,012,01,055,0110,0,
- /* 8978 */ 0270,01,032,01,055,0110,0,
- /* 8985 */ 0270,01,041,01,0346,0110,0,
- /* 8992 */ 0270,01,045,01,0346,0110,0,
- /* 8999 */ 0270,01,042,01,0133,0110,0,
- /* 9006 */ 0270,01,046,01,0133,0110,0,
- /* 9013 */ 0270,01,013,01,054,0110,0,
- /* 9020 */ 0270,01,033,01,054,0110,0,
- /* 9027 */ 0270,01,012,01,054,0110,0,
- /* 9034 */ 0270,01,032,01,054,0110,0,
- /* 9041 */ 0261,01,041,01,0136,0120,0,
- /* 9048 */ 0260,01,041,01,0136,0110,0,
- /* 9055 */ 0261,01,045,01,0136,0120,0,
- /* 9062 */ 0260,01,045,01,0136,0110,0,
- /* 9069 */ 0261,01,040,01,0136,0120,0,
- /* 9076 */ 0260,01,040,01,0136,0110,0,
- /* 9083 */ 0261,01,044,01,0136,0120,0,
- /* 9090 */ 0260,01,044,01,0136,0110,0,
- /* 9097 */ 0261,01,053,01,0136,0120,0,
- /* 9104 */ 0260,01,053,01,0136,0110,0,
- /* 9111 */ 0261,01,052,01,0136,0120,0,
- /* 9118 */ 0260,01,052,01,0136,0110,0,
- /* 9125 */ 0261,01,041,01,0174,0120,0,
- /* 9132 */ 0260,01,041,01,0174,0110,0,
- /* 9139 */ 0261,01,045,01,0174,0120,0,
- /* 9146 */ 0260,01,045,01,0174,0110,0,
- /* 9153 */ 0261,01,043,01,0174,0120,0,
- /* 9160 */ 0260,01,043,01,0174,0110,0,
- /* 9167 */ 0261,01,047,01,0174,0120,0,
- /* 9174 */ 0260,01,047,01,0174,0110,0,
- /* 9181 */ 0261,01,041,01,0175,0120,0,
- /* 9188 */ 0260,01,041,01,0175,0110,0,
- /* 9195 */ 0261,01,045,01,0175,0120,0,
- /* 9202 */ 0260,01,045,01,0175,0110,0,
- /* 9209 */ 0261,01,043,01,0175,0120,0,
- /* 9216 */ 0260,01,043,01,0175,0110,0,
- /* 9223 */ 0261,01,047,01,0175,0120,0,
- /* 9230 */ 0260,01,047,01,0175,0110,0,
- /* 9237 */ 0270,01,043,01,0360,0110,0,
- /* 9244 */ 0270,01,047,01,0360,0110,0,
- /* 9251 */ 0270,01,040,01,0256,0202,0,
- /* 9258 */ 0270,01,041,01,0367,0110,0,
- /* 9265 */ 0261,02,01,01,054,0120,0,
- /* 9272 */ 0261,02,05,01,054,0120,0,
- /* 9279 */ 0261,02,01,01,056,0102,0,
- /* 9286 */ 0261,02,05,01,056,0102,0,
- /* 9293 */ 0261,02,01,01,055,0120,0,
- /* 9300 */ 0261,02,05,01,055,0120,0,
- /* 9307 */ 0261,02,01,01,057,0102,0,
- /* 9314 */ 0261,02,05,01,057,0102,0,
- /* 9321 */ 0261,01,041,01,0137,0120,0,
- /* 9328 */ 0260,01,041,01,0137,0110,0,
- /* 9335 */ 0261,01,045,01,0137,0120,0,
- /* 9342 */ 0260,01,045,01,0137,0110,0,
- /* 9349 */ 0261,01,040,01,0137,0120,0,
- /* 9356 */ 0260,01,040,01,0137,0110,0,
- /* 9363 */ 0261,01,044,01,0137,0120,0,
- /* 9370 */ 0260,01,044,01,0137,0110,0,
- /* 9377 */ 0261,01,053,01,0137,0120,0,
- /* 9384 */ 0260,01,053,01,0137,0110,0,
- /* 9391 */ 0261,01,052,01,0137,0120,0,
- /* 9398 */ 0260,01,052,01,0137,0110,0,
- /* 9405 */ 0261,01,041,01,0135,0120,0,
- /* 9412 */ 0260,01,041,01,0135,0110,0,
- /* 9419 */ 0261,01,045,01,0135,0120,0,
- /* 9426 */ 0260,01,045,01,0135,0110,0,
- /* 9433 */ 0261,01,040,01,0135,0120,0,
- /* 9440 */ 0260,01,040,01,0135,0110,0,
- /* 9447 */ 0261,01,044,01,0135,0120,0,
- /* 9454 */ 0260,01,044,01,0135,0110,0,
- /* 9461 */ 0261,01,053,01,0135,0120,0,
- /* 9468 */ 0260,01,053,01,0135,0110,0,
- /* 9475 */ 0261,01,052,01,0135,0120,0,
- /* 9482 */ 0260,01,052,01,0135,0110,0,
- /* 9489 */ 0270,01,041,01,050,0110,0,
- /* 9496 */ 0270,01,041,01,051,0101,0,
- /* 9503 */ 0270,01,045,01,050,0110,0,
- /* 9510 */ 0270,01,045,01,051,0101,0,
- /* 9517 */ 0270,01,040,01,050,0110,0,
- /* 9524 */ 0270,01,040,01,051,0101,0,
- /* 9531 */ 0270,01,044,01,050,0110,0,
- /* 9538 */ 0270,01,044,01,051,0101,0,
- /* 9545 */ 0270,01,01,01,0156,0110,0,
- /* 9552 */ 0270,01,01,01,0176,0101,0,
- /* 9559 */ 0270,01,042,01,0176,0110,0,
- /* 9566 */ 0270,01,041,01,0326,0101,0,
- /* 9573 */ 0270,01,021,01,0156,0110,0,
- /* 9580 */ 0270,01,021,01,0176,0101,0,
- /* 9587 */ 0270,01,043,01,022,0110,0,
- /* 9594 */ 0270,01,047,01,022,0110,0,
- /* 9601 */ 0270,01,041,01,0157,0110,0,
- /* 9608 */ 0270,01,041,01,0177,0101,0,
- /* 9615 */ 0270,01,045,01,0157,0110,0,
- /* 9622 */ 0270,01,045,01,0177,0101,0,
- /* 9629 */ 0270,01,042,01,0157,0110,0,
- /* 9636 */ 0270,01,042,01,0177,0101,0,
- /* 9643 */ 0270,01,046,01,0157,0110,0,
- /* 9650 */ 0270,01,046,01,0177,0101,0,
- /* 9657 */ 0261,01,040,01,022,0120,0,
- /* 9664 */ 0260,01,040,01,022,0110,0,
- /* 9671 */ 0261,01,041,01,026,0120,0,
- /* 9678 */ 0260,01,041,01,026,0110,0,
- /* 9685 */ 0270,01,041,01,027,0101,0,
- /* 9692 */ 0261,01,040,01,026,0120,0,
- /* 9699 */ 0260,01,040,01,026,0110,0,
- /* 9706 */ 0270,01,040,01,027,0101,0,
- /* 9713 */ 0261,01,041,01,022,0120,0,
- /* 9720 */ 0260,01,041,01,022,0110,0,
- /* 9727 */ 0270,01,041,01,023,0101,0,
- /* 9734 */ 0270,01,040,01,023,0101,0,
- /* 9741 */ 0270,01,041,01,0120,0110,0,
- /* 9748 */ 0270,01,045,01,0120,0110,0,
- /* 9755 */ 0270,01,040,01,0120,0110,0,
- /* 9762 */ 0270,01,044,01,0120,0110,0,
- /* 9769 */ 0270,01,041,01,0347,0101,0,
- /* 9776 */ 0270,01,045,01,0347,0101,0,
- /* 9783 */ 0270,02,041,01,052,0110,0,
- /* 9790 */ 0270,01,041,01,053,0101,0,
- /* 9797 */ 0270,01,045,01,053,0101,0,
- /* 9804 */ 0270,01,040,01,053,0101,0,
- /* 9811 */ 0270,01,044,01,053,0101,0,
- /* 9818 */ 0261,01,053,01,020,0120,0,
- /* 9825 */ 0260,01,053,01,020,0110,0,
- /* 9832 */ 0270,01,053,01,020,0110,0,
- /* 9839 */ 0261,01,053,01,021,0102,0,
- /* 9846 */ 0260,01,053,01,021,0101,0,
- /* 9853 */ 0270,01,053,01,021,0101,0,
- /* 9860 */ 0270,01,042,01,026,0110,0,
- /* 9867 */ 0270,01,046,01,026,0110,0,
- /* 9874 */ 0270,01,042,01,022,0110,0,
- /* 9881 */ 0270,01,046,01,022,0110,0,
- /* 9888 */ 0261,01,052,01,020,0120,0,
- /* 9895 */ 0260,01,052,01,020,0110,0,
- /* 9902 */ 0270,01,052,01,020,0110,0,
- /* 9909 */ 0261,01,052,01,021,0102,0,
- /* 9916 */ 0260,01,052,01,021,0101,0,
- /* 9923 */ 0270,01,052,01,021,0101,0,
- /* 9930 */ 0270,01,041,01,020,0110,0,
- /* 9937 */ 0270,01,041,01,021,0101,0,
- /* 9944 */ 0270,01,045,01,020,0110,0,
- /* 9951 */ 0270,01,045,01,021,0101,0,
- /* 9958 */ 0270,01,040,01,020,0110,0,
- /* 9965 */ 0270,01,040,01,021,0101,0,
- /* 9972 */ 0270,01,044,01,020,0110,0,
- /* 9979 */ 0270,01,044,01,021,0101,0,
- /* 9986 */ 0261,01,041,01,0131,0120,0,
- /* 9993 */ 0260,01,041,01,0131,0110,0,
- /* 10000 */ 0261,01,045,01,0131,0120,0,
- /* 10007 */ 0260,01,045,01,0131,0110,0,
- /* 10014 */ 0261,01,040,01,0131,0120,0,
- /* 10021 */ 0260,01,040,01,0131,0110,0,
- /* 10028 */ 0261,01,044,01,0131,0120,0,
- /* 10035 */ 0260,01,044,01,0131,0110,0,
- /* 10042 */ 0261,01,053,01,0131,0120,0,
- /* 10049 */ 0260,01,053,01,0131,0110,0,
- /* 10056 */ 0261,01,052,01,0131,0120,0,
- /* 10063 */ 0260,01,052,01,0131,0110,0,
- /* 10070 */ 0261,01,041,01,0126,0120,0,
- /* 10077 */ 0260,01,041,01,0126,0110,0,
- /* 10084 */ 0261,01,045,01,0126,0120,0,
- /* 10091 */ 0260,01,045,01,0126,0110,0,
- /* 10098 */ 0261,01,040,01,0126,0120,0,
- /* 10105 */ 0260,01,040,01,0126,0110,0,
- /* 10112 */ 0261,01,044,01,0126,0120,0,
- /* 10119 */ 0260,01,044,01,0126,0110,0,
- /* 10126 */ 0270,02,041,01,034,0110,0,
- /* 10133 */ 0270,02,041,01,035,0110,0,
- /* 10140 */ 0270,02,041,01,036,0110,0,
- /* 10147 */ 0261,01,041,01,0143,0120,0,
- /* 10154 */ 0260,01,041,01,0143,0110,0,
- /* 10161 */ 0261,01,041,01,0153,0120,0,
- /* 10168 */ 0260,01,041,01,0153,0110,0,
- /* 10175 */ 0261,01,041,01,0147,0120,0,
- /* 10182 */ 0260,01,041,01,0147,0110,0,
- /* 10189 */ 0261,02,041,01,053,0120,0,
- /* 10196 */ 0260,02,041,01,053,0110,0,
- /* 10203 */ 0261,01,041,01,0374,0120,0,
- /* 10210 */ 0260,01,041,01,0374,0110,0,
- /* 10217 */ 0261,01,041,01,0375,0120,0,
- /* 10224 */ 0260,01,041,01,0375,0110,0,
- /* 10231 */ 0261,01,041,01,0376,0120,0,
- /* 10238 */ 0260,01,041,01,0376,0110,0,
- /* 10245 */ 0261,01,041,01,0324,0120,0,
- /* 10252 */ 0260,01,041,01,0324,0110,0,
- /* 10259 */ 0261,01,041,01,0354,0120,0,
- /* 10266 */ 0260,01,041,01,0354,0110,0,
- /* 10273 */ 0261,01,041,01,0355,0120,0,
- /* 10280 */ 0260,01,041,01,0355,0110,0,
- /* 10287 */ 0261,01,041,01,0334,0120,0,
- /* 10294 */ 0260,01,041,01,0334,0110,0,
- /* 10301 */ 0261,01,041,01,0335,0120,0,
- /* 10308 */ 0260,01,041,01,0335,0110,0,
- /* 10315 */ 0261,01,041,01,0333,0120,0,
- /* 10322 */ 0260,01,041,01,0333,0110,0,
- /* 10329 */ 0261,01,041,01,0337,0120,0,
- /* 10336 */ 0260,01,041,01,0337,0110,0,
- /* 10343 */ 0261,01,041,01,0340,0120,0,
- /* 10350 */ 0260,01,041,01,0340,0110,0,
- /* 10357 */ 0261,01,041,01,0343,0120,0,
- /* 10364 */ 0260,01,041,01,0343,0110,0,
- /* 10371 */ 0261,01,041,01,0164,0120,0,
- /* 10378 */ 0260,01,041,01,0164,0110,0,
- /* 10385 */ 0261,01,041,01,0165,0120,0,
- /* 10392 */ 0260,01,041,01,0165,0110,0,
- /* 10399 */ 0261,01,041,01,0166,0120,0,
- /* 10406 */ 0260,01,041,01,0166,0110,0,
- /* 10413 */ 0261,01,041,01,051,0120,0,
- /* 10420 */ 0260,01,041,01,051,0110,0,
- /* 10427 */ 0261,01,041,01,0144,0120,0,
- /* 10434 */ 0260,01,041,01,0144,0110,0,
- /* 10441 */ 0261,01,041,01,0145,0120,0,
- /* 10448 */ 0260,01,041,01,0145,0110,0,
- /* 10455 */ 0261,01,041,01,0146,0120,0,
- /* 10462 */ 0260,01,041,01,0146,0110,0,
- /* 10469 */ 0261,01,041,01,067,0120,0,
- /* 10476 */ 0260,01,041,01,067,0110,0,
- /* 10483 */ 0261,02,01,01,015,0120,0,
- /* 10490 */ 0261,02,05,01,015,0120,0,
- /* 10497 */ 0261,02,01,01,014,0120,0,
- /* 10504 */ 0261,02,05,01,014,0120,0,
- /* 10511 */ 0261,02,041,01,01,0120,0,
- /* 10518 */ 0260,02,041,01,01,0110,0,
- /* 10525 */ 0261,02,041,01,02,0120,0,
- /* 10532 */ 0260,02,041,01,02,0110,0,
- /* 10539 */ 0261,02,041,01,03,0120,0,
- /* 10546 */ 0260,02,041,01,03,0110,0,
- /* 10553 */ 0270,02,041,01,0101,0110,0,
- /* 10560 */ 0261,02,041,01,05,0120,0,
- /* 10567 */ 0260,02,041,01,05,0110,0,
- /* 10574 */ 0261,02,041,01,06,0120,0,
- /* 10581 */ 0260,02,041,01,06,0110,0,
- /* 10588 */ 0261,02,041,01,07,0120,0,
- /* 10595 */ 0260,02,041,01,07,0110,0,
- /* 10602 */ 0261,01,041,01,0365,0120,0,
- /* 10609 */ 0260,01,041,01,0365,0110,0,
- /* 10616 */ 0261,02,041,01,04,0120,0,
- /* 10623 */ 0260,02,041,01,04,0110,0,
- /* 10630 */ 0261,02,041,01,074,0120,0,
- /* 10637 */ 0260,02,041,01,074,0110,0,
- /* 10644 */ 0261,01,041,01,0356,0120,0,
- /* 10651 */ 0260,01,041,01,0356,0110,0,
- /* 10658 */ 0261,02,041,01,075,0120,0,
- /* 10665 */ 0260,02,041,01,075,0110,0,
- /* 10672 */ 0261,01,041,01,0336,0120,0,
- /* 10679 */ 0260,01,041,01,0336,0110,0,
- /* 10686 */ 0261,02,041,01,076,0120,0,
- /* 10693 */ 0260,02,041,01,076,0110,0,
- /* 10700 */ 0261,02,041,01,077,0120,0,
- /* 10707 */ 0260,02,041,01,077,0110,0,
- /* 10714 */ 0261,02,041,01,070,0120,0,
- /* 10721 */ 0260,02,041,01,070,0110,0,
- /* 10728 */ 0261,01,041,01,0352,0120,0,
- /* 10735 */ 0260,01,041,01,0352,0110,0,
- /* 10742 */ 0261,02,041,01,071,0120,0,
- /* 10749 */ 0260,02,041,01,071,0110,0,
- /* 10756 */ 0261,01,041,01,0332,0120,0,
- /* 10763 */ 0260,01,041,01,0332,0110,0,
- /* 10770 */ 0261,02,041,01,072,0120,0,
- /* 10777 */ 0260,02,041,01,072,0110,0,
- /* 10784 */ 0261,02,041,01,073,0120,0,
- /* 10791 */ 0260,02,041,01,073,0110,0,
- /* 10798 */ 0270,01,041,01,0327,0110,0,
- /* 10805 */ 0270,02,041,01,040,0110,0,
- /* 10812 */ 0270,02,041,01,041,0110,0,
- /* 10819 */ 0270,02,041,01,042,0110,0,
- /* 10826 */ 0270,02,041,01,043,0110,0,
- /* 10833 */ 0270,02,041,01,044,0110,0,
- /* 10840 */ 0270,02,041,01,045,0110,0,
- /* 10847 */ 0270,02,041,01,060,0110,0,
- /* 10854 */ 0270,02,041,01,061,0110,0,
- /* 10861 */ 0270,02,041,01,062,0110,0,
- /* 10868 */ 0270,02,041,01,063,0110,0,
- /* 10875 */ 0270,02,041,01,064,0110,0,
- /* 10882 */ 0270,02,041,01,065,0110,0,
- /* 10889 */ 0261,01,041,01,0344,0120,0,
- /* 10896 */ 0260,01,041,01,0344,0110,0,
- /* 10903 */ 0261,02,041,01,013,0120,0,
- /* 10910 */ 0260,02,041,01,013,0110,0,
- /* 10917 */ 0261,01,041,01,0345,0120,0,
- /* 10924 */ 0260,01,041,01,0345,0110,0,
- /* 10931 */ 0261,01,041,01,0325,0120,0,
- /* 10938 */ 0260,01,041,01,0325,0110,0,
- /* 10945 */ 0261,02,041,01,0100,0120,0,
- /* 10952 */ 0260,02,041,01,0100,0110,0,
- /* 10959 */ 0261,01,041,01,0364,0120,0,
- /* 10966 */ 0260,01,041,01,0364,0110,0,
- /* 10973 */ 0261,02,041,01,050,0120,0,
- /* 10980 */ 0260,02,041,01,050,0110,0,
- /* 10987 */ 0261,01,041,01,0353,0120,0,
- /* 10994 */ 0260,01,041,01,0353,0110,0,
- /* 11001 */ 0261,01,041,01,0366,0120,0,
- /* 11008 */ 0260,01,041,01,0366,0110,0,
- /* 11015 */ 0261,02,041,01,0,0120,0,
- /* 11022 */ 0260,02,041,01,0,0110,0,
- /* 11029 */ 0261,02,041,01,010,0120,0,
- /* 11036 */ 0260,02,041,01,010,0110,0,
- /* 11043 */ 0261,02,041,01,011,0120,0,
- /* 11050 */ 0260,02,041,01,011,0110,0,
- /* 11057 */ 0261,02,041,01,012,0120,0,
- /* 11064 */ 0260,02,041,01,012,0110,0,
- /* 11071 */ 0261,01,041,01,0361,0120,0,
- /* 11078 */ 0260,01,041,01,0361,0110,0,
- /* 11085 */ 0261,01,041,01,0362,0120,0,
- /* 11092 */ 0260,01,041,01,0362,0110,0,
- /* 11099 */ 0261,01,041,01,0363,0120,0,
- /* 11106 */ 0260,01,041,01,0363,0110,0,
- /* 11113 */ 0261,01,041,01,0341,0120,0,
- /* 11120 */ 0260,01,041,01,0341,0110,0,
- /* 11127 */ 0261,01,041,01,0342,0120,0,
- /* 11134 */ 0260,01,041,01,0342,0110,0,
- /* 11141 */ 0261,01,041,01,0321,0120,0,
- /* 11148 */ 0260,01,041,01,0321,0110,0,
- /* 11155 */ 0261,01,041,01,0322,0120,0,
- /* 11162 */ 0260,01,041,01,0322,0110,0,
- /* 11169 */ 0261,01,041,01,0323,0120,0,
- /* 11176 */ 0260,01,041,01,0323,0110,0,
- /* 11183 */ 0270,02,041,01,027,0110,0,
- /* 11190 */ 0270,02,045,01,027,0110,0,
- /* 11197 */ 0261,01,041,01,0370,0120,0,
- /* 11204 */ 0260,01,041,01,0370,0110,0,
- /* 11211 */ 0261,01,041,01,0371,0120,0,
- /* 11218 */ 0260,01,041,01,0371,0110,0,
- /* 11225 */ 0261,01,041,01,0372,0120,0,
- /* 11232 */ 0260,01,041,01,0372,0110,0,
- /* 11239 */ 0261,01,041,01,0373,0120,0,
- /* 11246 */ 0260,01,041,01,0373,0110,0,
- /* 11253 */ 0261,01,041,01,0350,0120,0,
- /* 11260 */ 0260,01,041,01,0350,0110,0,
- /* 11267 */ 0261,01,041,01,0351,0120,0,
- /* 11274 */ 0260,01,041,01,0351,0110,0,
- /* 11281 */ 0261,01,041,01,0330,0120,0,
- /* 11288 */ 0260,01,041,01,0330,0110,0,
- /* 11295 */ 0261,01,041,01,0331,0120,0,
- /* 11302 */ 0260,01,041,01,0331,0110,0,
- /* 11309 */ 0261,01,041,01,0150,0120,0,
- /* 11316 */ 0260,01,041,01,0150,0110,0,
- /* 11323 */ 0261,01,041,01,0151,0120,0,
- /* 11330 */ 0260,01,041,01,0151,0110,0,
- /* 11337 */ 0261,01,041,01,0152,0120,0,
- /* 11344 */ 0260,01,041,01,0152,0110,0,
- /* 11351 */ 0261,01,041,01,0155,0120,0,
- /* 11358 */ 0260,01,041,01,0155,0110,0,
- /* 11365 */ 0261,01,041,01,0140,0120,0,
- /* 11372 */ 0260,01,041,01,0140,0110,0,
- /* 11379 */ 0261,01,041,01,0141,0120,0,
- /* 11386 */ 0260,01,041,01,0141,0110,0,
- /* 11393 */ 0261,01,041,01,0142,0120,0,
- /* 11400 */ 0260,01,041,01,0142,0110,0,
- /* 11407 */ 0261,01,041,01,0154,0120,0,
- /* 11414 */ 0260,01,041,01,0154,0110,0,
- /* 11421 */ 0261,01,041,01,0357,0120,0,
- /* 11428 */ 0260,01,041,01,0357,0110,0,
- /* 11435 */ 0270,01,040,01,0123,0110,0,
- /* 11442 */ 0270,01,044,01,0123,0110,0,
- /* 11449 */ 0261,01,052,01,0123,0120,0,
- /* 11456 */ 0260,01,052,01,0123,0110,0,
- /* 11463 */ 0270,01,040,01,0122,0110,0,
- /* 11470 */ 0270,01,044,01,0122,0110,0,
- /* 11477 */ 0261,01,052,01,0122,0120,0,
- /* 11484 */ 0260,01,052,01,0122,0110,0,
- /* 11491 */ 0270,01,041,01,0121,0110,0,
- /* 11498 */ 0270,01,045,01,0121,0110,0,
- /* 11505 */ 0270,01,040,01,0121,0110,0,
- /* 11512 */ 0270,01,044,01,0121,0110,0,
- /* 11519 */ 0261,01,053,01,0121,0120,0,
- /* 11526 */ 0260,01,053,01,0121,0110,0,
- /* 11533 */ 0261,01,052,01,0121,0120,0,
- /* 11540 */ 0260,01,052,01,0121,0110,0,
- /* 11547 */ 0270,01,040,01,0256,0203,0,
- /* 11554 */ 0261,01,041,01,0134,0120,0,
- /* 11561 */ 0260,01,041,01,0134,0110,0,
- /* 11568 */ 0261,01,045,01,0134,0120,0,
- /* 11575 */ 0260,01,045,01,0134,0110,0,
- /* 11582 */ 0261,01,040,01,0134,0120,0,
- /* 11589 */ 0260,01,040,01,0134,0110,0,
- /* 11596 */ 0261,01,044,01,0134,0120,0,
- /* 11603 */ 0260,01,044,01,0134,0110,0,
- /* 11610 */ 0261,01,053,01,0134,0120,0,
- /* 11617 */ 0260,01,053,01,0134,0110,0,
- /* 11624 */ 0261,01,052,01,0134,0120,0,
- /* 11631 */ 0260,01,052,01,0134,0110,0,
- /* 11638 */ 0270,02,01,01,016,0110,0,
- /* 11645 */ 0270,02,05,01,016,0110,0,
- /* 11652 */ 0270,02,01,01,017,0110,0,
- /* 11659 */ 0270,02,05,01,017,0110,0,
- /* 11666 */ 0270,01,051,01,056,0110,0,
- /* 11673 */ 0270,01,050,01,056,0110,0,
- /* 11680 */ 0261,01,041,01,025,0120,0,
- /* 11687 */ 0260,01,041,01,025,0110,0,
- /* 11694 */ 0261,01,045,01,025,0120,0,
- /* 11701 */ 0260,01,045,01,025,0110,0,
- /* 11708 */ 0261,01,040,01,025,0120,0,
- /* 11715 */ 0260,01,040,01,025,0110,0,
- /* 11722 */ 0261,01,044,01,025,0120,0,
- /* 11729 */ 0260,01,044,01,025,0110,0,
- /* 11736 */ 0261,01,041,01,024,0120,0,
- /* 11743 */ 0260,01,041,01,024,0110,0,
- /* 11750 */ 0261,01,045,01,024,0120,0,
- /* 11757 */ 0260,01,045,01,024,0110,0,
- /* 11764 */ 0261,01,040,01,024,0120,0,
- /* 11771 */ 0260,01,040,01,024,0110,0,
- /* 11778 */ 0261,01,044,01,024,0120,0,
- /* 11785 */ 0260,01,044,01,024,0110,0,
- /* 11792 */ 0261,01,041,01,0127,0120,0,
- /* 11799 */ 0260,01,041,01,0127,0110,0,
- /* 11806 */ 0261,01,045,01,0127,0120,0,
- /* 11813 */ 0260,01,045,01,0127,0110,0,
- /* 11820 */ 0261,01,040,01,0127,0120,0,
- /* 11827 */ 0260,01,040,01,0127,0110,0,
- /* 11834 */ 0261,01,044,01,0127,0120,0,
- /* 11841 */ 0260,01,044,01,0127,0110,0,
- /* 11848 */ 0261,02,01,01,0230,0120,0,
- /* 11855 */ 0261,02,05,01,0230,0120,0,
- /* 11862 */ 0261,02,021,01,0230,0120,0,
- /* 11869 */ 0261,02,025,01,0230,0120,0,
- /* 11876 */ 0261,02,01,01,0250,0120,0,
- /* 11883 */ 0261,02,05,01,0250,0120,0,
- /* 11890 */ 0261,02,021,01,0250,0120,0,
- /* 11897 */ 0261,02,025,01,0250,0120,0,
- /* 11904 */ 0261,02,01,01,0270,0120,0,
- /* 11911 */ 0261,02,05,01,0270,0120,0,
- /* 11918 */ 0261,02,021,01,0270,0120,0,
- /* 11925 */ 0261,02,025,01,0270,0120,0,
- /* 11932 */ 0261,02,01,01,0226,0120,0,
- /* 11939 */ 0261,02,05,01,0226,0120,0,
- /* 11946 */ 0261,02,021,01,0226,0120,0,
- /* 11953 */ 0261,02,025,01,0226,0120,0,
- /* 11960 */ 0261,02,01,01,0246,0120,0,
- /* 11967 */ 0261,02,05,01,0246,0120,0,
- /* 11974 */ 0261,02,021,01,0246,0120,0,
- /* 11981 */ 0261,02,025,01,0246,0120,0,
- /* 11988 */ 0261,02,01,01,0266,0120,0,
- /* 11995 */ 0261,02,05,01,0266,0120,0,
- /* 12002 */ 0261,02,021,01,0266,0120,0,
- /* 12009 */ 0261,02,025,01,0266,0120,0,
- /* 12016 */ 0261,02,01,01,0232,0120,0,
- /* 12023 */ 0261,02,05,01,0232,0120,0,
- /* 12030 */ 0261,02,021,01,0232,0120,0,
- /* 12037 */ 0261,02,025,01,0232,0120,0,
- /* 12044 */ 0261,02,01,01,0252,0120,0,
- /* 12051 */ 0261,02,05,01,0252,0120,0,
- /* 12058 */ 0261,02,021,01,0252,0120,0,
- /* 12065 */ 0261,02,025,01,0252,0120,0,
- /* 12072 */ 0261,02,01,01,0272,0120,0,
- /* 12079 */ 0261,02,05,01,0272,0120,0,
- /* 12086 */ 0261,02,021,01,0272,0120,0,
- /* 12093 */ 0261,02,025,01,0272,0120,0,
- /* 12100 */ 0261,02,01,01,0227,0120,0,
- /* 12107 */ 0261,02,05,01,0227,0120,0,
- /* 12114 */ 0261,02,021,01,0227,0120,0,
- /* 12121 */ 0261,02,025,01,0227,0120,0,
- /* 12128 */ 0261,02,01,01,0247,0120,0,
- /* 12135 */ 0261,02,05,01,0247,0120,0,
- /* 12142 */ 0261,02,021,01,0247,0120,0,
- /* 12149 */ 0261,02,025,01,0247,0120,0,
- /* 12156 */ 0261,02,01,01,0267,0120,0,
- /* 12163 */ 0261,02,05,01,0267,0120,0,
- /* 12170 */ 0261,02,021,01,0267,0120,0,
- /* 12177 */ 0261,02,025,01,0267,0120,0,
- /* 12184 */ 0261,02,01,01,0234,0120,0,
- /* 12191 */ 0261,02,05,01,0234,0120,0,
- /* 12198 */ 0261,02,021,01,0234,0120,0,
- /* 12205 */ 0261,02,025,01,0234,0120,0,
- /* 12212 */ 0261,02,01,01,0254,0120,0,
- /* 12219 */ 0261,02,05,01,0254,0120,0,
- /* 12226 */ 0261,02,021,01,0254,0120,0,
- /* 12233 */ 0261,02,025,01,0254,0120,0,
- /* 12240 */ 0261,02,01,01,0274,0120,0,
- /* 12247 */ 0261,02,05,01,0274,0120,0,
- /* 12254 */ 0261,02,021,01,0274,0120,0,
- /* 12261 */ 0261,02,025,01,0274,0120,0,
- /* 12268 */ 0261,02,01,01,0236,0120,0,
- /* 12275 */ 0261,02,05,01,0236,0120,0,
- /* 12282 */ 0261,02,021,01,0236,0120,0,
- /* 12289 */ 0261,02,025,01,0236,0120,0,
- /* 12296 */ 0261,02,01,01,0256,0120,0,
- /* 12303 */ 0261,02,05,01,0256,0120,0,
- /* 12310 */ 0261,02,021,01,0256,0120,0,
- /* 12317 */ 0261,02,025,01,0256,0120,0,
- /* 12324 */ 0261,02,01,01,0276,0120,0,
- /* 12331 */ 0261,02,05,01,0276,0120,0,
- /* 12338 */ 0261,02,021,01,0276,0120,0,
- /* 12345 */ 0261,02,025,01,0276,0120,0,
- /* 12352 */ 0261,02,01,01,0231,0120,0,
- /* 12359 */ 0261,02,021,01,0231,0120,0,
- /* 12366 */ 0261,02,01,01,0251,0120,0,
- /* 12373 */ 0261,02,021,01,0251,0120,0,
- /* 12380 */ 0261,02,01,01,0271,0120,0,
- /* 12387 */ 0261,02,021,01,0271,0120,0,
- /* 12394 */ 0261,02,01,01,0233,0120,0,
- /* 12401 */ 0261,02,021,01,0233,0120,0,
- /* 12408 */ 0261,02,01,01,0253,0120,0,
- /* 12415 */ 0261,02,021,01,0253,0120,0,
- /* 12422 */ 0261,02,01,01,0273,0120,0,
- /* 12429 */ 0261,02,021,01,0273,0120,0,
- /* 12436 */ 0261,02,01,01,0235,0120,0,
- /* 12443 */ 0261,02,021,01,0235,0120,0,
- /* 12450 */ 0261,02,01,01,0255,0120,0,
- /* 12457 */ 0261,02,021,01,0255,0120,0,
- /* 12464 */ 0261,02,01,01,0275,0120,0,
- /* 12471 */ 0261,02,021,01,0275,0120,0,
- /* 12478 */ 0261,02,01,01,0237,0120,0,
- /* 12485 */ 0261,02,021,01,0237,0120,0,
- /* 12492 */ 0261,02,01,01,0257,0120,0,
- /* 12499 */ 0261,02,021,01,0257,0120,0,
- /* 12506 */ 0261,02,01,01,0277,0120,0,
- /* 12513 */ 0261,02,021,01,0277,0120,0,
- /* 12520 */ 0324,0363,02,017,0256,0200,0,
- /* 12527 */ 0324,0363,02,017,0256,0201,0,
- /* 12534 */ 0324,0363,02,017,0256,0202,0,
- /* 12541 */ 0324,0363,02,017,0256,0203,0,
- /* 12548 */ 0270,02,05,01,023,0110,0,
- /* 12555 */ 0270,02,01,01,023,0110,0,
- /* 12562 */ 0270,0111,0,01,022,0200,0,
- /* 12569 */ 0270,0111,020,01,022,0200,0,
- /* 12576 */ 0270,0111,0,01,022,0201,0,
- /* 12583 */ 0270,0111,020,01,022,0201,0,
- /* 12590 */ 0270,0111,0,01,0201,0110,0,
- /* 12597 */ 0270,0111,0,01,0201,0100,0,
- /* 12604 */ 0270,0111,04,01,0201,0110,0,
- /* 12611 */ 0270,0111,04,01,0201,0100,0,
- /* 12618 */ 0270,0111,0,01,0200,0110,0,
- /* 12625 */ 0270,0111,0,01,0200,0100,0,
- /* 12632 */ 0270,0111,04,01,0200,0110,0,
- /* 12639 */ 0270,0111,04,01,0200,0100,0,
- /* 12646 */ 0270,0111,0,01,0203,0110,0,
- /* 12653 */ 0270,0111,0,01,0203,0100,0,
- /* 12660 */ 0270,0111,0,01,0202,0110,0,
- /* 12667 */ 0270,0111,0,01,0202,0100,0,
- /* 12674 */ 0270,0111,0,01,0302,0110,0,
- /* 12681 */ 0270,0111,0,01,0302,0100,0,
- /* 12688 */ 0270,0111,0,01,0303,0110,0,
- /* 12695 */ 0270,0111,0,01,0303,0100,0,
- /* 12702 */ 0270,0111,0,01,0301,0110,0,
- /* 12709 */ 0270,0111,0,01,0301,0100,0,
- /* 12716 */ 0270,0111,0,01,0313,0110,0,
- /* 12723 */ 0270,0111,0,01,0313,0100,0,
- /* 12730 */ 0270,0111,0,01,0322,0110,0,
- /* 12737 */ 0270,0111,0,01,0322,0100,0,
- /* 12744 */ 0270,0111,0,01,0323,0110,0,
- /* 12751 */ 0270,0111,0,01,0323,0100,0,
- /* 12758 */ 0270,0111,0,01,0321,0110,0,
- /* 12765 */ 0270,0111,0,01,0321,0100,0,
- /* 12772 */ 0270,0111,0,01,0333,0110,0,
- /* 12779 */ 0270,0111,0,01,0333,0100,0,
- /* 12786 */ 0270,0111,0,01,0326,0110,0,
- /* 12793 */ 0270,0111,0,01,0326,0100,0,
- /* 12800 */ 0270,0111,0,01,0327,0110,0,
- /* 12807 */ 0270,0111,0,01,0327,0100,0,
- /* 12814 */ 0270,0111,0,01,0306,0110,0,
- /* 12821 */ 0270,0111,0,01,0306,0100,0,
- /* 12828 */ 0270,0111,0,01,0307,0110,0,
- /* 12835 */ 0270,0111,0,01,0307,0100,0,
- /* 12842 */ 0270,0111,0,01,0341,0110,0,
- /* 12849 */ 0270,0111,0,01,0341,0100,0,
- /* 12856 */ 0270,0111,0,01,0343,0110,0,
- /* 12863 */ 0270,0111,0,01,0343,0100,0,
- /* 12870 */ 0270,0111,0,01,0342,0110,0,
- /* 12877 */ 0270,0111,0,01,0342,0100,0,
- /* 12884 */ 0262,0111,0,01,0220,0110,0,
- /* 12891 */ 0261,0111,0,01,0220,0100,0,
- /* 12898 */ 0261,0111,020,01,0220,0120,0,
- /* 12905 */ 0260,0111,020,01,0220,0110,0,
- /* 12912 */ 0262,0111,0,01,0222,0110,0,
- /* 12919 */ 0261,0111,0,01,0222,0100,0,
- /* 12926 */ 0261,0111,020,01,0222,0120,0,
- /* 12933 */ 0260,0111,020,01,0222,0110,0,
- /* 12940 */ 0262,0111,0,01,0223,0110,0,
- /* 12947 */ 0261,0111,0,01,0223,0100,0,
- /* 12954 */ 0261,0111,020,01,0223,0120,0,
- /* 12961 */ 0260,0111,020,01,0223,0110,0,
- /* 12968 */ 0262,0111,0,01,0221,0110,0,
- /* 12975 */ 0261,0111,0,01,0221,0100,0,
- /* 12982 */ 0261,0111,020,01,0221,0120,0,
- /* 12989 */ 0260,0111,020,01,0221,0110,0,
- /* 12996 */ 0262,0111,0,01,0230,0110,0,
- /* 13003 */ 0261,0111,0,01,0230,0100,0,
- /* 13010 */ 0261,0111,020,01,0230,0120,0,
- /* 13017 */ 0260,0111,020,01,0230,0110,0,
- /* 13024 */ 0262,0111,0,01,0232,0110,0,
- /* 13031 */ 0261,0111,0,01,0232,0100,0,
- /* 13038 */ 0261,0111,020,01,0232,0120,0,
- /* 13045 */ 0260,0111,020,01,0232,0110,0,
- /* 13052 */ 0262,0111,0,01,0233,0110,0,
- /* 13059 */ 0261,0111,0,01,0233,0100,0,
- /* 13066 */ 0261,0111,020,01,0233,0120,0,
- /* 13073 */ 0260,0111,020,01,0233,0110,0,
- /* 13080 */ 0262,0111,0,01,0231,0110,0,
- /* 13087 */ 0261,0111,0,01,0231,0100,0,
- /* 13094 */ 0261,0111,020,01,0231,0120,0,
- /* 13101 */ 0260,0111,020,01,0231,0110,0,
- /* 13108 */ 0262,0111,0,01,0224,0110,0,
- /* 13115 */ 0261,0111,0,01,0224,0100,0,
- /* 13122 */ 0261,0111,020,01,0224,0120,0,
- /* 13129 */ 0260,0111,020,01,0224,0110,0,
- /* 13136 */ 0262,0111,0,01,0226,0110,0,
- /* 13143 */ 0261,0111,0,01,0226,0100,0,
- /* 13150 */ 0261,0111,020,01,0226,0120,0,
- /* 13157 */ 0260,0111,020,01,0226,0110,0,
- /* 13164 */ 0262,0111,0,01,0227,0110,0,
- /* 13171 */ 0261,0111,0,01,0227,0100,0,
- /* 13178 */ 0261,0111,020,01,0227,0120,0,
- /* 13185 */ 0260,0111,020,01,0227,0110,0,
- /* 13192 */ 0262,0111,0,01,0225,0110,0,
- /* 13199 */ 0261,0111,0,01,0225,0100,0,
- /* 13206 */ 0261,0111,020,01,0225,0120,0,
- /* 13213 */ 0260,0111,020,01,0225,0110,0,
- /* 13220 */ 0320,01,0203,0202,0275,0,
- /* 13226 */ 0321,01,0203,0202,0275,0,
- /* 13232 */ 0324,01,0203,0202,0275,0,
- /* 13238 */ 0320,0145,0201,0202,0141,0,
- /* 13244 */ 0321,0155,0201,0202,0151,0,
- /* 13250 */ 0324,0155,0201,0202,0251,0,
- /* 13256 */ 0320,01,0203,0200,0275,0,
- /* 13262 */ 0321,01,0203,0200,0275,0,
- /* 13268 */ 0324,01,0203,0200,0275,0,
- /* 13274 */ 0320,0145,0201,0200,0141,0,
- /* 13280 */ 0321,0155,0201,0200,0151,0,
- /* 13286 */ 0324,0155,0201,0200,0251,0,
- /* 13292 */ 0320,01,0203,0204,0275,0,
- /* 13298 */ 0321,01,0203,0204,0275,0,
- /* 13304 */ 0324,01,0203,0204,0275,0,
- /* 13310 */ 0320,0145,0201,0204,0141,0,
- /* 13316 */ 0321,0155,0201,0204,0151,0,
- /* 13322 */ 0324,0155,0201,0204,0251,0,
- /* 13328 */ 0320,02,017,0274,0110,0,
- /* 13334 */ 0321,02,017,0274,0110,0,
- /* 13340 */ 0324,02,017,0274,0110,0,
- /* 13346 */ 0320,02,017,0275,0110,0,
- /* 13352 */ 0321,02,017,0275,0110,0,
- /* 13358 */ 0324,02,017,0275,0110,0,
- /* 13364 */ 0321,01,017,010,0310,0,
- /* 13370 */ 0324,01,017,010,0310,0,
- /* 13376 */ 0320,02,017,0243,0101,0,
- /* 13382 */ 0321,02,017,0243,0101,0,
- /* 13388 */ 0324,02,017,0243,0101,0,
- /* 13394 */ 0320,02,017,0273,0101,0,
- /* 13400 */ 0321,02,017,0273,0101,0,
- /* 13406 */ 0324,02,017,0273,0101,0,
- /* 13412 */ 0320,02,017,0263,0101,0,
- /* 13418 */ 0321,02,017,0263,0101,0,
- /* 13424 */ 0324,02,017,0263,0101,0,
- /* 13430 */ 0320,02,017,0253,0101,0,
- /* 13436 */ 0321,02,017,0253,0101,0,
- /* 13442 */ 0324,02,017,0253,0101,0,
- /* 13448 */ 0322,01,0232,034,074,0,
- /* 13454 */ 0320,01,0232,034,074,0,
- /* 13460 */ 0321,01,0232,034,074,0,
- /* 13466 */ 0322,01,0232,035,030,0,
- /* 13472 */ 0320,01,0232,031,030,0,
- /* 13478 */ 0321,01,0232,041,030,0,
- /* 13484 */ 0320,01,0203,0207,0275,0,
- /* 13490 */ 0321,01,0203,0207,0275,0,
- /* 13496 */ 0324,01,0203,0207,0275,0,
- /* 13502 */ 0320,0145,0201,0207,0141,0,
- /* 13508 */ 0321,0155,0201,0207,0151,0,
- /* 13514 */ 0324,0155,0201,0207,0251,0,
- /* 13520 */ 0320,02,017,0261,0101,0,
- /* 13526 */ 0321,02,017,0261,0101,0,
- /* 13532 */ 0324,02,017,0261,0101,0,
- /* 13538 */ 0320,02,017,0247,0101,0,
- /* 13544 */ 0321,02,017,0247,0101,0,
- /* 13550 */ 0324,02,017,0307,0201,0,
- /* 13556 */ 0320,02,017,0257,0110,0,
- /* 13562 */ 0321,02,017,0257,0110,0,
- /* 13568 */ 0324,02,017,0257,0110,0,
- /* 13574 */ 0320,01,0153,0110,016,0,
- /* 13580 */ 0320,01,0151,0110,032,0,
- /* 13586 */ 0320,0146,0151,0110,0142,0,
- /* 13592 */ 0321,01,0153,0110,016,0,
- /* 13598 */ 0321,01,0151,0110,042,0,
- /* 13604 */ 0321,0156,0151,0110,0152,0,
- /* 13610 */ 0324,01,0153,0110,016,0,
- /* 13616 */ 0324,01,0151,0110,042,0,
- /* 13622 */ 0324,0156,0151,0110,0252,0,
- /* 13628 */ 0320,01,0153,0100,015,0,
- /* 13634 */ 0320,01,0151,0100,031,0,
- /* 13640 */ 0320,0145,0151,0100,0141,0,
- /* 13646 */ 0321,01,0153,0100,015,0,
- /* 13652 */ 0321,01,0151,0100,041,0,
- /* 13658 */ 0321,0155,0151,0100,0151,0,
- /* 13664 */ 0324,01,0153,0100,015,0,
- /* 13670 */ 0324,01,0151,0100,0255,0,
- /* 13676 */ 0324,0155,0151,0100,0251,0,
- /* 13682 */ 0310,03,017,01,0337,0,
- /* 13688 */ 0311,03,017,01,0337,0,
- /* 13694 */ 0322,01,0352,034,074,0,
- /* 13700 */ 0320,01,0352,034,074,0,
- /* 13706 */ 0321,01,0352,034,074,0,
- /* 13712 */ 0322,01,0352,035,030,0,
- /* 13718 */ 0320,01,0352,031,030,0,
- /* 13724 */ 0321,01,0352,041,030,0,
- /* 13730 */ 0322,02,017,0270,064,0,
- /* 13736 */ 0320,02,017,0270,064,0,
- /* 13742 */ 0321,02,017,0270,064,0,
- /* 13748 */ 0320,02,017,0,0206,0,
- /* 13754 */ 0321,02,017,0,0206,0,
- /* 13760 */ 0320,02,017,02,0110,0,
- /* 13766 */ 0321,02,017,02,0110,0,
- /* 13772 */ 0324,02,017,02,0110,0,
- /* 13778 */ 0320,02,017,0264,0110,0,
- /* 13784 */ 0321,02,017,0264,0110,0,
- /* 13790 */ 0324,02,017,0264,0110,0,
- /* 13796 */ 0320,02,017,0265,0110,0,
- /* 13802 */ 0321,02,017,0265,0110,0,
- /* 13808 */ 0324,02,017,0265,0110,0,
- /* 13814 */ 0320,02,017,03,0110,0,
- /* 13820 */ 0321,02,017,03,0110,0,
- /* 13826 */ 0324,02,017,03,0110,0,
- /* 13832 */ 0320,02,017,0262,0110,0,
- /* 13838 */ 0321,02,017,0262,0110,0,
- /* 13844 */ 0324,02,017,0262,0110,0,
- /* 13850 */ 0334,02,017,040,0101,0,
- /* 13856 */ 0323,02,017,040,0101,0,
- /* 13862 */ 0334,02,017,042,0110,0,
- /* 13868 */ 0323,02,017,042,0110,0,
- /* 13874 */ 0323,02,017,041,0101,0,
- /* 13880 */ 0323,02,017,043,0110,0,
- /* 13886 */ 0320,01,0307,0200,031,0,
- /* 13892 */ 0321,01,0307,0200,041,0,
- /* 13898 */ 0324,01,0307,0200,0255,0,
- /* 13904 */ 0360,02,017,0156,0110,0,
- /* 13910 */ 0360,02,017,0176,0101,0,
- /* 13916 */ 0320,02,017,0276,0110,0,
- /* 13922 */ 0321,02,017,0276,0110,0,
- /* 13928 */ 0321,02,017,0277,0110,0,
- /* 13934 */ 0324,02,017,0276,0110,0,
- /* 13940 */ 0324,02,017,0277,0110,0,
- /* 13946 */ 0320,02,017,0266,0110,0,
- /* 13952 */ 0321,02,017,0266,0110,0,
- /* 13958 */ 0321,02,017,0267,0110,0,
- /* 13964 */ 0324,02,017,0266,0110,0,
- /* 13970 */ 0324,02,017,0267,0110,0,
- /* 13976 */ 0320,02,017,037,0200,0,
- /* 13982 */ 0321,02,017,037,0200,0,
- /* 13988 */ 0324,02,017,037,0200,0,
- /* 13994 */ 0320,01,0203,0201,0275,0,
- /* 14000 */ 0321,01,0203,0201,0275,0,
- /* 14006 */ 0324,01,0203,0201,0275,0,
- /* 14012 */ 0320,0145,0201,0201,0141,0,
- /* 14018 */ 0321,0155,0201,0201,0151,0,
- /* 14024 */ 0324,0155,0201,0201,0251,0,
- /* 14030 */ 0323,02,017,0121,0110,0,
- /* 14036 */ 0323,02,017,0120,0110,0,
- /* 14042 */ 0323,02,017,0122,0110,0,
- /* 14048 */ 0323,02,017,0135,0110,0,
- /* 14054 */ 0323,02,017,0131,0110,0,
- /* 14060 */ 0323,02,017,0125,0110,0,
- /* 14066 */ 0320,01,0301,0202,025,0,
- /* 14072 */ 0321,01,0301,0202,025,0,
- /* 14078 */ 0324,01,0301,0202,025,0,
- /* 14084 */ 0320,01,0301,0203,025,0,
- /* 14090 */ 0321,01,0301,0203,025,0,
- /* 14096 */ 0324,01,0301,0203,025,0,
- /* 14102 */ 0321,02,017,066,0200,0,
- /* 14108 */ 0320,01,0301,0200,025,0,
- /* 14114 */ 0321,01,0301,0200,025,0,
- /* 14120 */ 0324,01,0301,0200,025,0,
- /* 14126 */ 0320,01,0301,0201,025,0,
- /* 14132 */ 0321,01,0301,0201,025,0,
- /* 14138 */ 0324,01,0301,0201,025,0,
- /* 14144 */ 0320,01,0301,0204,025,0,
- /* 14150 */ 0321,01,0301,0204,025,0,
- /* 14156 */ 0324,01,0301,0204,025,0,
- /* 14162 */ 0320,01,0301,0207,025,0,
- /* 14168 */ 0321,01,0301,0207,025,0,
- /* 14174 */ 0324,01,0301,0207,025,0,
- /* 14180 */ 0320,01,0203,0203,0275,0,
- /* 14186 */ 0321,01,0203,0203,0275,0,
- /* 14192 */ 0324,01,0203,0203,0275,0,
- /* 14198 */ 0320,0145,0201,0203,0141,0,
- /* 14204 */ 0321,0155,0201,0203,0151,0,
- /* 14210 */ 0324,0155,0201,0203,0251,0,
- /* 14216 */ 0320,02,017,0245,0101,0,
- /* 14222 */ 0321,02,017,0245,0101,0,
- /* 14228 */ 0324,02,017,0245,0101,0,
- /* 14234 */ 0320,01,0301,0205,025,0,
- /* 14240 */ 0321,01,0301,0205,025,0,
- /* 14246 */ 0324,01,0301,0205,025,0,
- /* 14252 */ 0320,02,017,0255,0101,0,
- /* 14258 */ 0321,02,017,0255,0101,0,
- /* 14264 */ 0324,02,017,0255,0101,0,
- /* 14270 */ 0320,02,017,0,0200,0,
- /* 14276 */ 0321,02,017,0,0200,0,
- /* 14282 */ 0323,02,017,0,0200,0,
- /* 14288 */ 0324,02,017,0,0200,0,
- /* 14294 */ 0320,02,017,01,0204,0,
- /* 14300 */ 0321,02,017,01,0204,0,
- /* 14306 */ 0320,02,017,0,0201,0,
- /* 14312 */ 0321,02,017,0,0201,0,
- /* 14318 */ 0324,02,017,0,0201,0,
- /* 14324 */ 0320,01,0203,0205,0275,0,
- /* 14330 */ 0321,01,0203,0205,0275,0,
- /* 14336 */ 0324,01,0203,0205,0275,0,
- /* 14342 */ 0320,0145,0201,0205,0141,0,
- /* 14348 */ 0321,0155,0201,0205,0151,0,
- /* 14354 */ 0324,0155,0201,0205,0251,0,
- /* 14360 */ 0320,01,0367,0200,031,0,
- /* 14366 */ 0321,01,0367,0200,041,0,
- /* 14372 */ 0324,01,0367,0200,0255,0,
- /* 14378 */ 0360,02,017,020,0101,0,
- /* 14384 */ 0360,02,017,022,0110,0,
- /* 14390 */ 0321,02,017,067,0200,0,
- /* 14396 */ 0320,02,017,0301,0101,0,
- /* 14402 */ 0321,02,017,0301,0101,0,
- /* 14408 */ 0324,02,017,0301,0101,0,
- /* 14414 */ 0320,02,017,0246,0110,0,
- /* 14420 */ 0321,02,017,0246,0110,0,
- /* 14426 */ 0320,01,0203,0206,0275,0,
- /* 14432 */ 0321,01,0203,0206,0275,0,
- /* 14438 */ 0324,01,0203,0206,0275,0,
- /* 14444 */ 0320,0145,0201,0206,0141,0,
- /* 14450 */ 0321,0155,0201,0206,0151,0,
- /* 14456 */ 0324,0155,0201,0206,0251,0,
- /* 14462 */ 01,017,0330,0220,0200,0,
- /* 14468 */ 0360,02,017,0130,0110,0,
- /* 14474 */ 0363,02,017,0130,0110,0,
- /* 14480 */ 0360,02,017,0125,0110,0,
- /* 14486 */ 0360,02,017,0124,0110,0,
- /* 14492 */ 0360,02,017,057,0110,0,
- /* 14498 */ 0360,02,017,052,0110,0,
- /* 14504 */ 0360,02,017,055,0110,0,
- /* 14510 */ 0360,02,017,054,0110,0,
- /* 14516 */ 0360,02,017,0136,0110,0,
- /* 14522 */ 0363,02,017,0136,0110,0,
- /* 14528 */ 0360,02,017,0137,0110,0,
- /* 14534 */ 0363,02,017,0137,0110,0,
- /* 14540 */ 0360,02,017,0135,0110,0,
- /* 14546 */ 0363,02,017,0135,0110,0,
- /* 14552 */ 0360,02,017,050,0110,0,
- /* 14558 */ 0360,02,017,051,0101,0,
- /* 14564 */ 0360,02,017,026,0110,0,
- /* 14570 */ 0360,02,017,027,0101,0,
- /* 14576 */ 0360,02,017,023,0101,0,
- /* 14582 */ 0360,02,017,0120,0110,0,
- /* 14588 */ 0360,02,017,053,0101,0,
- /* 14594 */ 0363,02,017,020,0110,0,
- /* 14600 */ 0363,02,017,021,0101,0,
- /* 14606 */ 0360,02,017,020,0110,0,
- /* 14612 */ 0360,02,017,021,0101,0,
- /* 14618 */ 0360,02,017,0131,0110,0,
- /* 14624 */ 0363,02,017,0131,0110,0,
- /* 14630 */ 0360,02,017,0126,0110,0,
- /* 14636 */ 0360,02,017,0123,0110,0,
- /* 14642 */ 0363,02,017,0123,0110,0,
- /* 14648 */ 0360,02,017,0122,0110,0,
- /* 14654 */ 0363,02,017,0122,0110,0,
- /* 14660 */ 0360,02,017,0121,0110,0,
- /* 14666 */ 0363,02,017,0121,0110,0,
- /* 14672 */ 0360,02,017,0134,0110,0,
- /* 14678 */ 0363,02,017,0134,0110,0,
- /* 14684 */ 0360,02,017,056,0110,0,
- /* 14690 */ 0360,02,017,025,0110,0,
- /* 14696 */ 0360,02,017,024,0110,0,
- /* 14702 */ 0360,02,017,0127,0110,0,
- /* 14708 */ 0324,02,017,0256,0201,0,
- /* 14714 */ 0324,02,017,0256,0200,0,
- /* 14720 */ 0360,03,017,01,0320,0,
- /* 14726 */ 0360,03,017,01,0321,0,
- /* 14732 */ 0324,02,017,0256,0204,0,
- /* 14738 */ 0324,02,017,0256,0206,0,
- /* 14744 */ 0324,02,017,0256,0205,0,
- /* 14750 */ 0360,02,017,0367,0110,0,
- /* 14756 */ 0360,02,017,0347,0101,0,
- /* 14762 */ 0360,02,017,0327,0110,0,
- /* 14768 */ 0361,02,017,0367,0110,0,
- /* 14774 */ 0361,02,017,0347,0101,0,
- /* 14780 */ 0361,02,017,053,0101,0,
- /* 14786 */ 0361,02,017,0157,0110,0,
- /* 14792 */ 0361,02,017,0177,0101,0,
- /* 14798 */ 0363,02,017,0157,0110,0,
- /* 14804 */ 0363,02,017,0177,0101,0,
- /* 14810 */ 0362,02,017,0326,0110,0,
- /* 14816 */ 0363,02,017,0176,0110,0,
- /* 14822 */ 0361,02,017,0326,0101,0,
- /* 14828 */ 0363,02,017,0326,0110,0,
- /* 14834 */ 0361,02,017,0143,0110,0,
- /* 14840 */ 0361,02,017,0153,0110,0,
- /* 14846 */ 0361,02,017,0147,0110,0,
- /* 14852 */ 0361,02,017,0374,0110,0,
- /* 14858 */ 0361,02,017,0375,0110,0,
- /* 14864 */ 0361,02,017,0376,0110,0,
- /* 14870 */ 0360,02,017,0324,0110,0,
- /* 14876 */ 0361,02,017,0324,0110,0,
- /* 14882 */ 0361,02,017,0354,0110,0,
- /* 14888 */ 0361,02,017,0355,0110,0,
- /* 14894 */ 0361,02,017,0334,0110,0,
- /* 14900 */ 0361,02,017,0335,0110,0,
- /* 14906 */ 0361,02,017,0333,0110,0,
- /* 14912 */ 0361,02,017,0337,0110,0,
- /* 14918 */ 0361,02,017,0340,0110,0,
- /* 14924 */ 0361,02,017,0343,0110,0,
- /* 14930 */ 0361,02,017,0164,0110,0,
- /* 14936 */ 0361,02,017,0165,0110,0,
- /* 14942 */ 0361,02,017,0166,0110,0,
- /* 14948 */ 0361,02,017,0144,0110,0,
- /* 14954 */ 0361,02,017,0145,0110,0,
- /* 14960 */ 0361,02,017,0146,0110,0,
- /* 14966 */ 0361,02,017,0365,0110,0,
- /* 14972 */ 0361,02,017,0356,0110,0,
- /* 14978 */ 0361,02,017,0336,0110,0,
- /* 14984 */ 0361,02,017,0352,0110,0,
- /* 14990 */ 0361,02,017,0332,0110,0,
- /* 14996 */ 0361,02,017,0327,0110,0,
- /* 15002 */ 0361,02,017,0344,0110,0,
- /* 15008 */ 0361,02,017,0345,0110,0,
- /* 15014 */ 0361,02,017,0325,0110,0,
- /* 15020 */ 0361,02,017,0364,0110,0,
- /* 15026 */ 0361,02,017,0353,0110,0,
- /* 15032 */ 0361,02,017,0366,0110,0,
- /* 15038 */ 0361,02,017,0361,0110,0,
- /* 15044 */ 0361,02,017,0362,0110,0,
- /* 15050 */ 0361,02,017,0363,0110,0,
- /* 15056 */ 0361,02,017,0341,0110,0,
- /* 15062 */ 0361,02,017,0342,0110,0,
- /* 15068 */ 0361,02,017,0321,0110,0,
- /* 15074 */ 0361,02,017,0322,0110,0,
- /* 15080 */ 0361,02,017,0323,0110,0,
- /* 15086 */ 0361,02,017,0370,0110,0,
- /* 15092 */ 0361,02,017,0371,0110,0,
- /* 15098 */ 0361,02,017,0372,0110,0,
- /* 15104 */ 0361,02,017,0373,0110,0,
- /* 15110 */ 0361,02,017,0350,0110,0,
- /* 15116 */ 0361,02,017,0351,0110,0,
- /* 15122 */ 0361,02,017,0330,0110,0,
- /* 15128 */ 0361,02,017,0331,0110,0,
- /* 15134 */ 0361,02,017,0150,0110,0,
- /* 15140 */ 0361,02,017,0151,0110,0,
- /* 15146 */ 0361,02,017,0152,0110,0,
- /* 15152 */ 0361,02,017,0155,0110,0,
- /* 15158 */ 0361,02,017,0140,0110,0,
- /* 15164 */ 0361,02,017,0141,0110,0,
- /* 15170 */ 0361,02,017,0142,0110,0,
- /* 15176 */ 0361,02,017,0154,0110,0,
- /* 15182 */ 0361,02,017,0357,0110,0,
- /* 15188 */ 0361,02,017,0130,0110,0,
- /* 15194 */ 0362,02,017,0130,0110,0,
- /* 15200 */ 0361,02,017,0125,0110,0,
- /* 15206 */ 0361,02,017,0124,0110,0,
- /* 15212 */ 0361,02,017,057,0110,0,
- /* 15218 */ 0363,02,017,0346,0110,0,
- /* 15224 */ 0360,02,017,0133,0110,0,
- /* 15230 */ 0362,02,017,0346,0110,0,
- /* 15236 */ 0361,02,017,055,0110,0,
- /* 15242 */ 0361,02,017,0132,0110,0,
- /* 15248 */ 0361,02,017,052,0110,0,
- /* 15254 */ 0361,02,017,0133,0110,0,
- /* 15260 */ 0360,02,017,0132,0110,0,
- /* 15266 */ 0362,02,017,0132,0110,0,
- /* 15272 */ 0363,02,017,0132,0110,0,
- /* 15278 */ 0361,02,017,054,0110,0,
- /* 15284 */ 0361,02,017,0346,0110,0,
- /* 15290 */ 0363,02,017,0133,0110,0,
- /* 15296 */ 0361,02,017,0136,0110,0,
- /* 15302 */ 0362,02,017,0136,0110,0,
- /* 15308 */ 0361,02,017,0137,0110,0,
- /* 15314 */ 0362,02,017,0137,0110,0,
- /* 15320 */ 0361,02,017,0135,0110,0,
- /* 15326 */ 0362,02,017,0135,0110,0,
- /* 15332 */ 0361,02,017,050,0110,0,
- /* 15338 */ 0361,02,017,051,0101,0,
- /* 15344 */ 0361,02,017,027,0101,0,
- /* 15350 */ 0361,02,017,026,0110,0,
- /* 15356 */ 0361,02,017,023,0101,0,
- /* 15362 */ 0361,02,017,022,0110,0,
- /* 15368 */ 0361,02,017,0120,0110,0,
- /* 15374 */ 0362,02,017,020,0110,0,
- /* 15380 */ 0362,02,017,021,0101,0,
- /* 15386 */ 0361,02,017,020,0110,0,
- /* 15392 */ 0361,02,017,021,0101,0,
- /* 15398 */ 0361,02,017,0131,0110,0,
- /* 15404 */ 0362,02,017,0131,0110,0,
- /* 15410 */ 0361,02,017,0126,0110,0,
- /* 15416 */ 0361,02,017,0121,0110,0,
- /* 15422 */ 0362,02,017,0121,0110,0,
- /* 15428 */ 0361,02,017,0134,0110,0,
- /* 15434 */ 0362,02,017,0134,0110,0,
- /* 15440 */ 0361,02,017,056,0110,0,
- /* 15446 */ 0361,02,017,025,0110,0,
- /* 15452 */ 0361,02,017,024,0110,0,
- /* 15458 */ 0361,02,017,0127,0110,0,
- /* 15464 */ 0361,02,017,0320,0110,0,
- /* 15470 */ 0362,02,017,0320,0110,0,
- /* 15476 */ 0361,02,017,0174,0110,0,
- /* 15482 */ 0362,02,017,0174,0110,0,
- /* 15488 */ 0361,02,017,0175,0110,0,
- /* 15494 */ 0362,02,017,0175,0110,0,
- /* 15500 */ 0362,02,017,0360,0110,0,
- /* 15506 */ 0362,02,017,022,0110,0,
- /* 15512 */ 0363,02,017,026,0110,0,
- /* 15518 */ 0363,02,017,022,0110,0,
- /* 15524 */ 0361,02,017,0307,0206,0,
- /* 15530 */ 0363,02,017,0307,0206,0,
- /* 15536 */ 0361,02,017,0171,0110,0,
- /* 15542 */ 0362,02,017,0171,0110,0,
- /* 15548 */ 0362,02,017,053,0101,0,
- /* 15554 */ 0363,02,017,053,0101,0,
- /* 15560 */ 0270,01,04,01,0167,0,
- /* 15566 */ 0270,01,0,01,0167,0,
- /* 15572 */ 0320,02,017,0307,0206,0,
- /* 15578 */ 0321,02,017,0307,0206,0,
- /* 15584 */ 0324,02,017,0307,0206,0,
- /* 15590 */ 0336,03,017,0247,0310,0,
- /* 15596 */ 0336,03,017,0247,0320,0,
- /* 15602 */ 0336,03,017,0247,0330,0,
- /* 15608 */ 0336,03,017,0247,0340,0,
- /* 15614 */ 0336,03,017,0247,0350,0,
- /* 15620 */ 0336,03,017,0246,0300,0,
- /* 15626 */ 0336,03,017,0246,0310,0,
- /* 15632 */ 0336,03,017,0246,0320,0,
- /* 15638 */ 0320,02,017,030,0200,0,
- /* 15644 */ 0321,02,017,030,0200,0,
- /* 15650 */ 0324,02,017,030,0200,0,
- /* 15656 */ 0320,02,017,030,0201,0,
- /* 15662 */ 0321,02,017,030,0201,0,
- /* 15668 */ 0324,02,017,030,0201,0,
- /* 15674 */ 0320,02,017,030,0202,0,
- /* 15680 */ 0321,02,017,030,0202,0,
- /* 15686 */ 0324,02,017,030,0202,0,
- /* 15692 */ 0320,02,017,030,0203,0,
- /* 15698 */ 0321,02,017,030,0203,0,
- /* 15704 */ 0324,02,017,030,0203,0,
- /* 15710 */ 0320,02,017,030,0204,0,
- /* 15716 */ 0321,02,017,030,0204,0,
- /* 15722 */ 0324,02,017,030,0204,0,
- /* 15728 */ 0320,02,017,030,0205,0,
- /* 15734 */ 0321,02,017,030,0205,0,
- /* 15740 */ 0324,02,017,030,0205,0,
- /* 15746 */ 0320,02,017,030,0206,0,
- /* 15752 */ 0321,02,017,030,0206,0,
- /* 15758 */ 0324,02,017,030,0206,0,
- /* 15764 */ 0320,02,017,030,0207,0,
- /* 15770 */ 0321,02,017,030,0207,0,
- /* 15776 */ 0324,02,017,030,0207,0,
- /* 15782 */ 0320,02,017,031,0200,0,
- /* 15788 */ 0321,02,017,031,0200,0,
- /* 15794 */ 0324,02,017,031,0200,0,
- /* 15800 */ 0320,02,017,031,0201,0,
- /* 15806 */ 0321,02,017,031,0201,0,
- /* 15812 */ 0324,02,017,031,0201,0,
- /* 15818 */ 0320,02,017,031,0202,0,
- /* 15824 */ 0321,02,017,031,0202,0,
- /* 15830 */ 0324,02,017,031,0202,0,
- /* 15836 */ 0320,02,017,031,0203,0,
- /* 15842 */ 0321,02,017,031,0203,0,
- /* 15848 */ 0324,02,017,031,0203,0,
- /* 15854 */ 0320,02,017,031,0204,0,
- /* 15860 */ 0321,02,017,031,0204,0,
- /* 15866 */ 0324,02,017,031,0204,0,
- /* 15872 */ 0320,02,017,031,0205,0,
- /* 15878 */ 0321,02,017,031,0205,0,
- /* 15884 */ 0324,02,017,031,0205,0,
- /* 15890 */ 0320,02,017,031,0206,0,
- /* 15896 */ 0321,02,017,031,0206,0,
- /* 15902 */ 0324,02,017,031,0206,0,
- /* 15908 */ 0320,02,017,031,0207,0,
- /* 15914 */ 0321,02,017,031,0207,0,
- /* 15920 */ 0324,02,017,031,0207,0,
- /* 15926 */ 0320,02,017,032,0200,0,
- /* 15932 */ 0321,02,017,032,0200,0,
- /* 15938 */ 0324,02,017,032,0200,0,
- /* 15944 */ 0320,02,017,032,0201,0,
- /* 15950 */ 0321,02,017,032,0201,0,
- /* 15956 */ 0324,02,017,032,0201,0,
- /* 15962 */ 0320,02,017,032,0202,0,
- /* 15968 */ 0321,02,017,032,0202,0,
- /* 15974 */ 0324,02,017,032,0202,0,
- /* 15980 */ 0320,02,017,032,0203,0,
- /* 15986 */ 0321,02,017,032,0203,0,
- /* 15992 */ 0324,02,017,032,0203,0,
- /* 15998 */ 0320,02,017,032,0204,0,
- /* 16004 */ 0321,02,017,032,0204,0,
- /* 16010 */ 0324,02,017,032,0204,0,
- /* 16016 */ 0320,02,017,032,0205,0,
- /* 16022 */ 0321,02,017,032,0205,0,
- /* 16028 */ 0324,02,017,032,0205,0,
- /* 16034 */ 0320,02,017,032,0206,0,
- /* 16040 */ 0321,02,017,032,0206,0,
- /* 16046 */ 0324,02,017,032,0206,0,
- /* 16052 */ 0320,02,017,032,0207,0,
- /* 16058 */ 0321,02,017,032,0207,0,
- /* 16064 */ 0324,02,017,032,0207,0,
- /* 16070 */ 0320,02,017,033,0200,0,
- /* 16076 */ 0321,02,017,033,0200,0,
- /* 16082 */ 0324,02,017,033,0200,0,
- /* 16088 */ 0320,02,017,033,0201,0,
- /* 16094 */ 0321,02,017,033,0201,0,
- /* 16100 */ 0324,02,017,033,0201,0,
- /* 16106 */ 0320,02,017,033,0202,0,
- /* 16112 */ 0321,02,017,033,0202,0,
- /* 16118 */ 0324,02,017,033,0202,0,
- /* 16124 */ 0320,02,017,033,0203,0,
- /* 16130 */ 0321,02,017,033,0203,0,
- /* 16136 */ 0324,02,017,033,0203,0,
- /* 16142 */ 0320,02,017,033,0204,0,
- /* 16148 */ 0321,02,017,033,0204,0,
- /* 16154 */ 0324,02,017,033,0204,0,
- /* 16160 */ 0320,02,017,033,0205,0,
- /* 16166 */ 0321,02,017,033,0205,0,
- /* 16172 */ 0324,02,017,033,0205,0,
- /* 16178 */ 0320,02,017,033,0206,0,
- /* 16184 */ 0321,02,017,033,0206,0,
- /* 16190 */ 0324,02,017,033,0206,0,
- /* 16196 */ 0320,02,017,033,0207,0,
- /* 16202 */ 0321,02,017,033,0207,0,
- /* 16208 */ 0324,02,017,033,0207,0,
- /* 16214 */ 0320,02,017,034,0200,0,
- /* 16220 */ 0321,02,017,034,0200,0,
- /* 16226 */ 0324,02,017,034,0200,0,
- /* 16232 */ 0320,02,017,034,0201,0,
- /* 16238 */ 0321,02,017,034,0201,0,
- /* 16244 */ 0324,02,017,034,0201,0,
- /* 16250 */ 0320,02,017,034,0202,0,
- /* 16256 */ 0321,02,017,034,0202,0,
- /* 16262 */ 0324,02,017,034,0202,0,
- /* 16268 */ 0320,02,017,034,0203,0,
- /* 16274 */ 0321,02,017,034,0203,0,
- /* 16280 */ 0324,02,017,034,0203,0,
- /* 16286 */ 0320,02,017,034,0204,0,
- /* 16292 */ 0321,02,017,034,0204,0,
- /* 16298 */ 0324,02,017,034,0204,0,
- /* 16304 */ 0320,02,017,034,0205,0,
- /* 16310 */ 0321,02,017,034,0205,0,
- /* 16316 */ 0324,02,017,034,0205,0,
- /* 16322 */ 0320,02,017,034,0206,0,
- /* 16328 */ 0321,02,017,034,0206,0,
- /* 16334 */ 0324,02,017,034,0206,0,
- /* 16340 */ 0320,02,017,034,0207,0,
- /* 16346 */ 0321,02,017,034,0207,0,
- /* 16352 */ 0324,02,017,034,0207,0,
- /* 16358 */ 0320,02,017,035,0200,0,
- /* 16364 */ 0321,02,017,035,0200,0,
- /* 16370 */ 0324,02,017,035,0200,0,
- /* 16376 */ 0320,02,017,035,0201,0,
- /* 16382 */ 0321,02,017,035,0201,0,
- /* 16388 */ 0324,02,017,035,0201,0,
- /* 16394 */ 0320,02,017,035,0202,0,
- /* 16400 */ 0321,02,017,035,0202,0,
- /* 16406 */ 0324,02,017,035,0202,0,
- /* 16412 */ 0320,02,017,035,0203,0,
- /* 16418 */ 0321,02,017,035,0203,0,
- /* 16424 */ 0324,02,017,035,0203,0,
- /* 16430 */ 0320,02,017,035,0204,0,
- /* 16436 */ 0321,02,017,035,0204,0,
- /* 16442 */ 0324,02,017,035,0204,0,
- /* 16448 */ 0320,02,017,035,0205,0,
- /* 16454 */ 0321,02,017,035,0205,0,
- /* 16460 */ 0324,02,017,035,0205,0,
- /* 16466 */ 0320,02,017,035,0206,0,
- /* 16472 */ 0321,02,017,035,0206,0,
- /* 16478 */ 0324,02,017,035,0206,0,
- /* 16484 */ 0320,02,017,035,0207,0,
- /* 16490 */ 0321,02,017,035,0207,0,
- /* 16496 */ 0324,02,017,035,0207,0,
- /* 16502 */ 0320,02,017,036,0200,0,
- /* 16508 */ 0321,02,017,036,0200,0,
- /* 16514 */ 0324,02,017,036,0200,0,
- /* 16520 */ 0320,02,017,036,0201,0,
- /* 16526 */ 0321,02,017,036,0201,0,
- /* 16532 */ 0324,02,017,036,0201,0,
- /* 16538 */ 0320,02,017,036,0202,0,
- /* 16544 */ 0321,02,017,036,0202,0,
- /* 16550 */ 0324,02,017,036,0202,0,
- /* 16556 */ 0320,02,017,036,0203,0,
- /* 16562 */ 0321,02,017,036,0203,0,
- /* 16568 */ 0324,02,017,036,0203,0,
- /* 16574 */ 0320,02,017,036,0204,0,
- /* 16580 */ 0321,02,017,036,0204,0,
- /* 16586 */ 0324,02,017,036,0204,0,
- /* 16592 */ 0320,02,017,036,0205,0,
- /* 16598 */ 0321,02,017,036,0205,0,
- /* 16604 */ 0324,02,017,036,0205,0,
- /* 16610 */ 0320,02,017,036,0206,0,
- /* 16616 */ 0321,02,017,036,0206,0,
- /* 16622 */ 0324,02,017,036,0206,0,
- /* 16628 */ 0320,02,017,036,0207,0,
- /* 16634 */ 0321,02,017,036,0207,0,
- /* 16640 */ 0324,02,017,036,0207,0,
- /* 16646 */ 0320,02,017,037,0201,0,
- /* 16652 */ 0321,02,017,037,0201,0,
- /* 16658 */ 0324,02,017,037,0201,0,
- /* 16664 */ 0320,02,017,037,0202,0,
- /* 16670 */ 0321,02,017,037,0202,0,
- /* 16676 */ 0324,02,017,037,0202,0,
- /* 16682 */ 0320,02,017,037,0203,0,
- /* 16688 */ 0321,02,017,037,0203,0,
- /* 16694 */ 0324,02,017,037,0203,0,
- /* 16700 */ 0320,02,017,037,0204,0,
- /* 16706 */ 0321,02,017,037,0204,0,
- /* 16712 */ 0324,02,017,037,0204,0,
- /* 16718 */ 0320,02,017,037,0205,0,
- /* 16724 */ 0321,02,017,037,0205,0,
- /* 16730 */ 0324,02,017,037,0205,0,
- /* 16736 */ 0320,02,017,037,0206,0,
- /* 16742 */ 0321,02,017,037,0206,0,
- /* 16748 */ 0324,02,017,037,0206,0,
- /* 16754 */ 0320,02,017,037,0207,0,
- /* 16760 */ 0321,02,017,037,0207,0,
- /* 16766 */ 0324,02,017,037,0207,0,
- /* 16772 */ 0320,01,021,0101,0,
- /* 16777 */ 0321,01,021,0101,0,
- /* 16782 */ 0324,01,021,0101,0,
- /* 16787 */ 0320,01,023,0110,0,
- /* 16792 */ 0321,01,023,0110,0,
- /* 16797 */ 0324,01,023,0110,0,
- /* 16802 */ 0320,01,025,031,0,
- /* 16807 */ 0321,01,025,041,0,
- /* 16812 */ 0324,01,025,0255,0,
- /* 16817 */ 01,0200,0202,021,0,
- /* 16822 */ 0320,01,01,0101,0,
- /* 16827 */ 0321,01,01,0101,0,
- /* 16832 */ 0324,01,01,0101,0,
- /* 16837 */ 0320,01,03,0110,0,
- /* 16842 */ 0321,01,03,0110,0,
- /* 16847 */ 0324,01,03,0110,0,
- /* 16852 */ 0320,01,05,031,0,
- /* 16857 */ 0321,01,05,041,0,
- /* 16862 */ 0324,01,05,0255,0,
- /* 16867 */ 01,0200,0200,021,0,
- /* 16872 */ 0320,01,041,0101,0,
- /* 16877 */ 0321,01,041,0101,0,
- /* 16882 */ 0324,01,041,0101,0,
- /* 16887 */ 0320,01,043,0110,0,
- /* 16892 */ 0321,01,043,0110,0,
- /* 16897 */ 0324,01,043,0110,0,
- /* 16902 */ 0320,01,045,031,0,
- /* 16907 */ 0321,01,045,041,0,
- /* 16912 */ 0324,01,045,0255,0,
- /* 16917 */ 01,0200,0204,021,0,
- /* 16922 */ 0320,01,0142,0110,0,
- /* 16927 */ 0321,01,0142,0110,0,
- /* 16932 */ 0322,01,0350,064,0,
- /* 16937 */ 0320,01,0350,064,0,
- /* 16942 */ 0321,01,0350,064,0,
- /* 16947 */ 0322,01,0377,0203,0,
- /* 16952 */ 0324,01,0377,0203,0,
- /* 16957 */ 0320,01,0377,0203,0,
- /* 16962 */ 0321,01,0377,0203,0,
- /* 16967 */ 0322,01,0377,0202,0,
- /* 16972 */ 0320,01,0377,0202,0,
- /* 16977 */ 0321,01,0377,0202,0,
- /* 16982 */ 0324,01,0377,0202,0,
- /* 16987 */ 0323,01,0377,0202,0,
- /* 16992 */ 03,017,01,0335,0,
- /* 16997 */ 0320,01,071,0101,0,
- /* 17002 */ 0321,01,071,0101,0,
- /* 17007 */ 0324,01,071,0101,0,
- /* 17012 */ 0320,01,073,0110,0,
- /* 17017 */ 0321,01,073,0110,0,
- /* 17022 */ 0324,01,073,0110,0,
- /* 17027 */ 0320,01,075,031,0,
- /* 17032 */ 0321,01,075,041,0,
- /* 17037 */ 0324,01,075,0255,0,
- /* 17042 */ 01,0200,0207,021,0,
- /* 17047 */ 0335,0321,01,0247,0,
- /* 17052 */ 0335,0324,01,0247,0,
- /* 17057 */ 0335,0320,01,0247,0,
- /* 17062 */ 02,017,0260,0101,0,
- /* 17067 */ 02,017,0246,0101,0,
- /* 17072 */ 0320,01,0377,0201,0,
- /* 17077 */ 0321,01,0377,0201,0,
- /* 17082 */ 0324,01,0377,0201,0,
- /* 17087 */ 0320,01,0367,0206,0,
- /* 17092 */ 0321,01,0367,0206,0,
- /* 17097 */ 0324,01,0367,0206,0,
- /* 17102 */ 01,0310,030,025,0,
- /* 17107 */ 01,0334,010,0300,0,
- /* 17112 */ 01,0330,010,0300,0,
- /* 17117 */ 01,0330,011,0300,0,
- /* 17122 */ 01,0336,010,0300,0,
- /* 17127 */ 0341,02,0333,0342,0,
- /* 17132 */ 01,0332,010,0300,0,
- /* 17137 */ 01,0332,011,0300,0,
- /* 17142 */ 01,0332,010,0320,0,
- /* 17147 */ 01,0332,011,0320,0,
- /* 17152 */ 01,0332,010,0310,0,
- /* 17157 */ 01,0332,011,0310,0,
- /* 17162 */ 01,0333,010,0300,0,
- /* 17167 */ 01,0333,011,0300,0,
- /* 17172 */ 01,0333,010,0320,0,
- /* 17177 */ 01,0333,011,0320,0,
- /* 17182 */ 01,0333,010,0310,0,
- /* 17187 */ 01,0333,011,0310,0,
- /* 17192 */ 01,0333,010,0330,0,
- /* 17197 */ 01,0333,011,0330,0,
- /* 17202 */ 01,0332,010,0330,0,
- /* 17207 */ 01,0332,011,0330,0,
- /* 17212 */ 01,0330,010,0320,0,
- /* 17217 */ 01,0330,011,0320,0,
- /* 17222 */ 01,0333,010,0360,0,
- /* 17227 */ 01,0333,011,0360,0,
- /* 17232 */ 01,0337,010,0360,0,
- /* 17237 */ 01,0337,011,0360,0,
- /* 17242 */ 01,0330,010,0330,0,
- /* 17247 */ 01,0330,011,0330,0,
- /* 17252 */ 0341,02,0333,0341,0,
- /* 17257 */ 01,0334,010,0370,0,
- /* 17262 */ 01,0330,010,0360,0,
- /* 17267 */ 01,0330,011,0360,0,
- /* 17272 */ 01,0336,010,0370,0,
- /* 17277 */ 01,0334,010,0360,0,
- /* 17282 */ 01,0330,010,0370,0,
- /* 17287 */ 01,0330,011,0370,0,
- /* 17292 */ 01,0336,010,0360,0,
- /* 17297 */ 0341,02,0333,0340,0,
- /* 17302 */ 01,0335,010,0300,0,
- /* 17307 */ 01,0337,010,0300,0,
- /* 17312 */ 0341,02,0333,0343,0,
- /* 17317 */ 01,0331,010,0300,0,
- /* 17322 */ 01,0334,010,0310,0,
- /* 17327 */ 01,0330,010,0310,0,
- /* 17332 */ 01,0330,011,0310,0,
- /* 17337 */ 01,0336,010,0310,0,
- /* 17342 */ 0341,01,0335,0206,0,
- /* 17347 */ 01,0335,010,0320,0,
- /* 17352 */ 0341,01,0331,0207,0,
- /* 17357 */ 0341,01,0331,0206,0,
- /* 17362 */ 01,0335,010,0330,0,
- /* 17367 */ 0341,01,0335,0207,0,
- /* 17372 */ 0341,02,0337,0340,0,
- /* 17377 */ 01,0334,010,0350,0,
- /* 17382 */ 01,0330,010,0340,0,
- /* 17387 */ 01,0330,011,0340,0,
- /* 17392 */ 01,0336,010,0350,0,
- /* 17397 */ 01,0334,010,0340,0,
- /* 17402 */ 01,0330,010,0350,0,
- /* 17407 */ 01,0330,011,0350,0,
- /* 17412 */ 01,0336,010,0340,0,
- /* 17417 */ 01,0335,010,0340,0,
- /* 17422 */ 01,0335,011,0340,0,
- /* 17427 */ 01,0333,010,0350,0,
- /* 17432 */ 01,0333,011,0350,0,
- /* 17437 */ 01,0337,010,0350,0,
- /* 17442 */ 01,0337,011,0350,0,
- /* 17447 */ 01,0335,010,0350,0,
- /* 17452 */ 01,0335,011,0350,0,
- /* 17457 */ 01,0331,010,0310,0,
- /* 17462 */ 01,0331,011,0310,0,
- /* 17467 */ 0320,01,0367,0207,0,
- /* 17472 */ 0321,01,0367,0207,0,
- /* 17477 */ 0324,01,0367,0207,0,
- /* 17482 */ 0320,01,0367,0205,0,
- /* 17487 */ 0321,01,0367,0205,0,
- /* 17492 */ 0324,01,0367,0205,0,
- /* 17497 */ 0320,01,0345,025,0,
- /* 17502 */ 0321,01,0345,025,0,
- /* 17507 */ 0320,01,0377,0200,0,
- /* 17512 */ 0321,01,0377,0200,0,
- /* 17517 */ 0324,01,0377,0200,0,
- /* 17522 */ 02,017,01,0207,0,
- /* 17527 */ 0310,01,0343,050,0,
- /* 17532 */ 0311,01,0343,050,0,
- /* 17537 */ 0313,01,0343,050,0,
- /* 17542 */ 0371,01,0353,050,0,
- /* 17547 */ 0322,01,0351,064,0,
- /* 17552 */ 0320,01,0351,064,0,
- /* 17557 */ 0321,01,0351,064,0,
- /* 17562 */ 0322,01,0377,0205,0,
- /* 17567 */ 0324,01,0377,0205,0,
- /* 17572 */ 0320,01,0377,0205,0,
- /* 17577 */ 0321,01,0377,0205,0,
- /* 17582 */ 0322,01,0377,0204,0,
- /* 17587 */ 0320,01,0377,0204,0,
- /* 17592 */ 0321,01,0377,0204,0,
- /* 17597 */ 0323,01,0377,0204,0,
- /* 17602 */ 0320,01,0305,0110,0,
- /* 17607 */ 0321,01,0305,0110,0,
- /* 17612 */ 0320,01,0215,0110,0,
- /* 17617 */ 0321,01,0215,0110,0,
- /* 17622 */ 0324,01,0215,0110,0,
- /* 17627 */ 0320,01,0304,0110,0,
- /* 17632 */ 0321,01,0304,0110,0,
- /* 17637 */ 03,017,0256,0350,0,
- /* 17642 */ 02,017,01,0202,0,
- /* 17647 */ 02,017,01,0203,0,
- /* 17652 */ 02,017,0,0202,0,
- /* 17657 */ 02,017,01,0206,0,
- /* 17662 */ 0312,01,0342,050,0,
- /* 17667 */ 0310,01,0342,050,0,
- /* 17672 */ 0311,01,0342,050,0,
- /* 17677 */ 0313,01,0342,050,0,
- /* 17682 */ 0312,01,0341,050,0,
- /* 17687 */ 0310,01,0341,050,0,
- /* 17692 */ 0311,01,0341,050,0,
- /* 17697 */ 0313,01,0341,050,0,
- /* 17702 */ 0312,01,0340,050,0,
- /* 17707 */ 0310,01,0340,050,0,
- /* 17712 */ 0311,01,0340,050,0,
- /* 17717 */ 0313,01,0340,050,0,
- /* 17722 */ 02,017,0,0203,0,
- /* 17727 */ 03,017,0256,0360,0,
- /* 17732 */ 03,017,01,0310,0,
- /* 17737 */ 0320,01,0214,0101,0,
- /* 17742 */ 0321,01,0214,0101,0,
- /* 17747 */ 0320,01,0241,045,0,
- /* 17752 */ 0321,01,0241,045,0,
- /* 17757 */ 0324,01,0241,045,0,
- /* 17762 */ 0320,01,0243,044,0,
- /* 17767 */ 0321,01,0243,044,0,
- /* 17772 */ 0324,01,0243,044,0,
- /* 17777 */ 02,017,044,0101,0,
- /* 17782 */ 02,017,046,0110,0,
- /* 17787 */ 0320,01,0211,0101,0,
- /* 17792 */ 0321,01,0211,0101,0,
- /* 17797 */ 0324,01,0211,0101,0,
- /* 17802 */ 0320,01,0213,0110,0,
- /* 17807 */ 0321,01,0213,0110,0,
- /* 17812 */ 0324,01,0213,0110,0,
- /* 17817 */ 0320,010,0270,031,0,
- /* 17822 */ 0321,010,0270,041,0,
- /* 17827 */ 0324,010,0270,055,0,
- /* 17832 */ 01,0306,0200,021,0,
- /* 17837 */ 0324,01,0143,0110,0,
- /* 17842 */ 0320,01,0367,0204,0,
- /* 17847 */ 0321,01,0367,0204,0,
- /* 17852 */ 0324,01,0367,0204,0,
- /* 17857 */ 03,017,01,0311,0,
- /* 17862 */ 0320,01,0367,0203,0,
- /* 17867 */ 0321,01,0367,0203,0,
- /* 17872 */ 0324,01,0367,0203,0,
- /* 17877 */ 0320,01,0367,0202,0,
- /* 17882 */ 0321,01,0367,0202,0,
- /* 17887 */ 0324,01,0367,0202,0,
- /* 17892 */ 0320,01,011,0101,0,
- /* 17897 */ 0321,01,011,0101,0,
- /* 17902 */ 0324,01,011,0101,0,
- /* 17907 */ 0320,01,013,0110,0,
- /* 17912 */ 0321,01,013,0110,0,
- /* 17917 */ 0324,01,013,0110,0,
- /* 17922 */ 0320,01,015,031,0,
- /* 17927 */ 0321,01,015,041,0,
- /* 17932 */ 0324,01,015,0255,0,
- /* 17937 */ 01,0200,0201,021,0,
- /* 17942 */ 0320,01,0347,024,0,
- /* 17947 */ 0321,01,0347,024,0,
- /* 17952 */ 0314,0333,01,0220,0,
- /* 17957 */ 0320,01,0217,0200,0,
- /* 17962 */ 0321,01,0217,0200,0,
- /* 17967 */ 0323,01,0217,0200,0,
- /* 17972 */ 02,017,015,0200,0,
- /* 17977 */ 02,017,015,0201,0,
- /* 17982 */ 0320,01,0377,0206,0,
- /* 17987 */ 0321,01,0377,0206,0,
- /* 17992 */ 0323,01,0377,0206,0,
- /* 17997 */ 0320,0144,0150,0140,0,
- /* 18002 */ 0321,0154,0150,0150,0,
- /* 18007 */ 0323,0154,0150,0250,0,
- /* 18012 */ 01,0300,0202,025,0,
- /* 18017 */ 0320,01,0321,0202,0,
- /* 18022 */ 0320,01,0323,0202,0,
- /* 18027 */ 0321,01,0321,0202,0,
- /* 18032 */ 0321,01,0323,0202,0,
- /* 18037 */ 0324,01,0321,0202,0,
- /* 18042 */ 0324,01,0323,0202,0,
- /* 18047 */ 01,0300,0203,025,0,
- /* 18052 */ 0320,01,0321,0203,0,
- /* 18057 */ 0320,01,0323,0203,0,
- /* 18062 */ 0321,01,0321,0203,0,
- /* 18067 */ 0321,01,0323,0203,0,
- /* 18072 */ 0324,01,0321,0203,0,
- /* 18077 */ 0324,01,0323,0203,0,
- /* 18082 */ 03,017,01,0371,0,
- /* 18087 */ 01,0300,0200,025,0,
- /* 18092 */ 0320,01,0321,0200,0,
- /* 18097 */ 0320,01,0323,0200,0,
- /* 18102 */ 0321,01,0321,0200,0,
- /* 18107 */ 0321,01,0323,0200,0,
- /* 18112 */ 0324,01,0321,0200,0,
- /* 18117 */ 0324,01,0323,0200,0,
- /* 18122 */ 01,0300,0201,025,0,
- /* 18127 */ 0320,01,0321,0201,0,
- /* 18132 */ 0320,01,0323,0201,0,
- /* 18137 */ 0321,01,0321,0201,0,
- /* 18142 */ 0321,01,0323,0201,0,
- /* 18147 */ 0324,01,0321,0201,0,
- /* 18152 */ 0324,01,0323,0201,0,
- /* 18157 */ 02,017,0173,0200,0,
- /* 18162 */ 02,017,0175,0200,0,
- /* 18167 */ 01,0300,0204,025,0,
- /* 18172 */ 0320,01,0321,0204,0,
- /* 18177 */ 0320,01,0323,0204,0,
- /* 18182 */ 0321,01,0321,0204,0,
- /* 18187 */ 0321,01,0323,0204,0,
- /* 18192 */ 0324,01,0321,0204,0,
- /* 18197 */ 0324,01,0323,0204,0,
- /* 18202 */ 01,0300,0207,025,0,
- /* 18207 */ 0320,01,0321,0207,0,
- /* 18212 */ 0320,01,0323,0207,0,
- /* 18217 */ 0321,01,0321,0207,0,
- /* 18222 */ 0321,01,0323,0207,0,
- /* 18227 */ 0324,01,0321,0207,0,
- /* 18232 */ 0324,01,0323,0207,0,
- /* 18237 */ 0320,01,031,0101,0,
- /* 18242 */ 0321,01,031,0101,0,
- /* 18247 */ 0324,01,031,0101,0,
- /* 18252 */ 0320,01,033,0110,0,
- /* 18257 */ 0321,01,033,0110,0,
- /* 18262 */ 0324,01,033,0110,0,
- /* 18267 */ 0320,01,035,031,0,
- /* 18272 */ 0321,01,035,041,0,
- /* 18277 */ 0324,01,035,0255,0,
- /* 18282 */ 01,0200,0203,021,0,
- /* 18287 */ 0335,0321,01,0257,0,
- /* 18292 */ 0335,0324,01,0257,0,
- /* 18297 */ 0335,0320,01,0257,0,
- /* 18302 */ 03,017,0256,0370,0,
- /* 18307 */ 02,017,01,0200,0,
- /* 18312 */ 01,0300,0205,025,0,
- /* 18317 */ 0320,01,0321,0205,0,
- /* 18322 */ 0320,01,0323,0205,0,
- /* 18327 */ 0321,01,0321,0205,0,
- /* 18332 */ 0321,01,0323,0205,0,
- /* 18337 */ 0324,01,0321,0205,0,
- /* 18342 */ 0324,01,0323,0205,0,
- /* 18347 */ 02,017,01,0201,0,
- /* 18352 */ 03,017,01,0336,0,
- /* 18357 */ 03,017,01,0334,0,
- /* 18362 */ 0320,01,051,0101,0,
- /* 18367 */ 0321,01,051,0101,0,
- /* 18372 */ 0324,01,051,0101,0,
- /* 18377 */ 0320,01,053,0110,0,
- /* 18382 */ 0321,01,053,0110,0,
- /* 18387 */ 0324,01,053,0110,0,
- /* 18392 */ 0320,01,055,031,0,
- /* 18397 */ 0321,01,055,041,0,
- /* 18402 */ 0324,01,055,0255,0,
- /* 18407 */ 01,0200,0205,021,0,
- /* 18412 */ 02,017,0172,0200,0,
- /* 18417 */ 02,017,0174,0200,0,
- /* 18422 */ 03,017,01,0370,0,
- /* 18427 */ 0320,01,0205,0101,0,
- /* 18432 */ 0321,01,0205,0101,0,
- /* 18437 */ 0324,01,0205,0101,0,
- /* 18442 */ 0320,01,0205,0110,0,
- /* 18447 */ 0321,01,0205,0110,0,
- /* 18452 */ 0324,01,0205,0110,0,
- /* 18457 */ 0320,01,0251,031,0,
- /* 18462 */ 0321,01,0251,041,0,
- /* 18467 */ 0324,01,0251,0255,0,
- /* 18472 */ 01,0366,0200,021,0,
- /* 18477 */ 02,017,0,0204,0,
- /* 18482 */ 02,017,0,0205,0,
- /* 18487 */ 02,017,0300,0101,0,
- /* 18492 */ 0320,01,0207,0110,0,
- /* 18497 */ 0321,01,0207,0110,0,
- /* 18502 */ 0324,01,0207,0110,0,
- /* 18507 */ 0320,01,0207,0101,0,
- /* 18512 */ 0321,01,0207,0101,0,
- /* 18517 */ 0324,01,0207,0101,0,
- /* 18522 */ 0320,01,061,0101,0,
- /* 18527 */ 0321,01,061,0101,0,
- /* 18532 */ 0324,01,061,0101,0,
- /* 18537 */ 0320,01,063,0110,0,
- /* 18542 */ 0321,01,063,0110,0,
- /* 18547 */ 0324,01,063,0110,0,
- /* 18552 */ 0320,01,065,031,0,
- /* 18557 */ 0321,01,065,041,0,
- /* 18562 */ 0324,01,065,0255,0,
- /* 18567 */ 01,0200,0206,021,0,
- /* 18572 */ 0370,0330,0160,050,0,
- /* 18577 */ 02,017,0256,0207,0,
- /* 18582 */ 03,017,01,0301,0,
- /* 18587 */ 03,017,01,0302,0,
- /* 18592 */ 03,017,01,0332,0,
- /* 18597 */ 03,017,01,0331,0,
- /* 18602 */ 02,017,0307,0207,0,
- /* 18607 */ 03,017,01,0303,0,
- /* 18612 */ 03,017,01,0330,0,
- /* 18617 */ 03,017,01,0333,0,
- /* 18622 */ 03,017,01,0304,0,
- /* 18627 */ 03,017,0247,0300,0,
- /* 18632 */ 02,0325,012,0,
- /* 18636 */ 01,0325,024,0,
- /* 18640 */ 02,0324,012,0,
- /* 18644 */ 01,0324,024,0,
- /* 18648 */ 01,020,0101,0,
- /* 18652 */ 01,024,021,0,
- /* 18656 */ 01,0,0101,0,
- /* 18660 */ 01,04,021,0,
- /* 18664 */ 01,040,0101,0,
- /* 18668 */ 01,044,021,0,
- /* 18672 */ 01,0143,0101,0,
- /* 18676 */ 02,017,072,0,
- /* 18680 */ 02,017,073,0,
- /* 18684 */ 0320,01,0230,0,
- /* 18688 */ 0321,01,0231,0,
- /* 18692 */ 0324,01,0230,0,
- /* 18696 */ 02,017,06,0,
- /* 18700 */ 01,070,0101,0,
- /* 18704 */ 01,074,021,0,
- /* 18708 */ 0335,01,0246,0,
- /* 18712 */ 02,017,0242,0,
- /* 18716 */ 02,017,075,0,
- /* 18720 */ 02,017,074,0,
- /* 18724 */ 0324,01,0231,0,
- /* 18728 */ 0320,01,0231,0,
- /* 18732 */ 0321,01,0230,0,
- /* 18736 */ 0320,010,0110,0,
- /* 18740 */ 0321,010,0110,0,
- /* 18744 */ 01,0376,0201,0,
- /* 18748 */ 01,0366,0206,0,
- /* 18752 */ 02,017,071,0,
- /* 18756 */ 02,017,0167,0,
- /* 18760 */ 02,0331,0360,0,
- /* 18764 */ 02,0331,0341,0,
- /* 18768 */ 01,0330,0200,0,
- /* 18772 */ 01,0334,0200,0,
- /* 18776 */ 02,0336,0301,0,
- /* 18780 */ 01,0337,0204,0,
- /* 18784 */ 01,0337,0206,0,
- /* 18788 */ 02,0331,0340,0,
- /* 18792 */ 02,0332,0301,0,
- /* 18796 */ 02,0332,0321,0,
- /* 18800 */ 02,0332,0311,0,
- /* 18804 */ 02,0333,0301,0,
- /* 18808 */ 02,0333,0321,0,
- /* 18812 */ 02,0333,0311,0,
- /* 18816 */ 02,0333,0331,0,
- /* 18820 */ 02,0332,0331,0,
- /* 18824 */ 01,0330,0202,0,
- /* 18828 */ 01,0334,0202,0,
- /* 18832 */ 02,0330,0321,0,
- /* 18836 */ 02,0333,0361,0,
- /* 18840 */ 02,0337,0361,0,
- /* 18844 */ 01,0330,0203,0,
- /* 18848 */ 01,0334,0203,0,
- /* 18852 */ 02,0330,0331,0,
- /* 18856 */ 02,0336,0331,0,
- /* 18860 */ 02,0331,0377,0,
- /* 18864 */ 02,0331,0366,0,
- /* 18868 */ 01,0330,0206,0,
- /* 18872 */ 01,0334,0206,0,
- /* 18876 */ 02,0336,0371,0,
- /* 18880 */ 01,0330,0207,0,
- /* 18884 */ 01,0334,0207,0,
- /* 18888 */ 02,0336,0361,0,
- /* 18892 */ 02,017,016,0,
- /* 18896 */ 02,0335,0301,0,
- /* 18900 */ 02,0337,0301,0,
- /* 18904 */ 01,0332,0200,0,
- /* 18908 */ 01,0336,0200,0,
- /* 18912 */ 01,0332,0202,0,
- /* 18916 */ 01,0336,0202,0,
- /* 18920 */ 01,0332,0203,0,
- /* 18924 */ 01,0336,0203,0,
- /* 18928 */ 01,0332,0206,0,
- /* 18932 */ 01,0336,0206,0,
- /* 18936 */ 01,0332,0207,0,
- /* 18940 */ 01,0336,0207,0,
- /* 18944 */ 01,0333,0200,0,
- /* 18948 */ 01,0337,0200,0,
- /* 18952 */ 01,0337,0205,0,
- /* 18956 */ 01,0332,0201,0,
- /* 18960 */ 01,0336,0201,0,
- /* 18964 */ 02,0331,0367,0,
- /* 18968 */ 01,0333,0202,0,
- /* 18972 */ 01,0337,0202,0,
- /* 18976 */ 01,0333,0203,0,
- /* 18980 */ 01,0337,0203,0,
- /* 18984 */ 01,0337,0207,0,
- /* 18988 */ 01,0337,0201,0,
- /* 18992 */ 01,0333,0201,0,
- /* 18996 */ 01,0335,0201,0,
- /* 19000 */ 01,0332,0204,0,
- /* 19004 */ 01,0336,0204,0,
- /* 19008 */ 01,0332,0205,0,
- /* 19012 */ 01,0336,0205,0,
- /* 19016 */ 01,0331,0200,0,
- /* 19020 */ 01,0335,0200,0,
- /* 19024 */ 01,0333,0205,0,
- /* 19028 */ 02,0331,0301,0,
- /* 19032 */ 02,0331,0350,0,
- /* 19036 */ 01,0331,0205,0,
- /* 19040 */ 01,0331,0204,0,
- /* 19044 */ 02,0331,0352,0,
- /* 19048 */ 02,0331,0351,0,
- /* 19052 */ 02,0331,0354,0,
- /* 19056 */ 02,0331,0355,0,
- /* 19060 */ 02,0331,0353,0,
- /* 19064 */ 02,0331,0356,0,
- /* 19068 */ 01,0330,0201,0,
- /* 19072 */ 01,0334,0201,0,
- /* 19076 */ 02,0336,0311,0,
- /* 19080 */ 02,0331,0320,0,
- /* 19084 */ 02,0331,0363,0,
- /* 19088 */ 02,0331,0370,0,
- /* 19092 */ 02,0331,0365,0,
- /* 19096 */ 02,0331,0362,0,
- /* 19100 */ 02,0331,0374,0,
- /* 19104 */ 01,0335,0204,0,
- /* 19108 */ 02,0331,0375,0,
- /* 19112 */ 02,0333,0344,0,
- /* 19116 */ 02,0331,0376,0,
- /* 19120 */ 02,0331,0373,0,
- /* 19124 */ 02,0331,0372,0,
- /* 19128 */ 01,0331,0202,0,
- /* 19132 */ 01,0335,0202,0,
- /* 19136 */ 02,0335,0321,0,
- /* 19140 */ 01,0331,0203,0,
- /* 19144 */ 01,0335,0203,0,
- /* 19148 */ 01,0333,0207,0,
- /* 19152 */ 02,0335,0331,0,
- /* 19156 */ 01,0330,0204,0,
- /* 19160 */ 01,0334,0204,0,
- /* 19164 */ 02,0336,0351,0,
- /* 19168 */ 01,0330,0205,0,
- /* 19172 */ 01,0334,0205,0,
- /* 19176 */ 02,0336,0341,0,
- /* 19180 */ 02,0331,0344,0,
- /* 19184 */ 02,0335,0341,0,
- /* 19188 */ 02,0333,0351,0,
- /* 19192 */ 02,0337,0351,0,
- /* 19196 */ 02,0335,0351,0,
- /* 19200 */ 02,0332,0351,0,
- /* 19204 */ 02,0331,0345,0,
- /* 19208 */ 02,0331,0311,0,
- /* 19212 */ 02,0331,0364,0,
- /* 19216 */ 02,0331,0361,0,
- /* 19220 */ 02,0331,0371,0,
- /* 19224 */ 01,0366,0207,0,
- /* 19228 */ 01,0366,0205,0,
- /* 19232 */ 01,0344,025,0,
- /* 19236 */ 0320,01,0355,0,
- /* 19240 */ 0321,01,0355,0,
- /* 19244 */ 0320,010,0100,0,
- /* 19248 */ 0321,010,0100,0,
- /* 19252 */ 01,0376,0200,0,
- /* 19256 */ 0321,01,0155,0,
- /* 19260 */ 0320,01,0155,0,
- /* 19264 */ 01,0315,024,0,
- /* 19268 */ 02,017,010,0,
- /* 19272 */ 0322,01,0317,0,
- /* 19276 */ 0321,01,0317,0,
- /* 19280 */ 0324,01,0317,0,
- /* 19284 */ 0320,01,0317,0,
- /* 19288 */ 02,017,07,0,
- /* 19292 */ 02,017,05,0,
- /* 19296 */ 0321,01,0255,0,
- /* 19300 */ 0324,01,0255,0,
- /* 19304 */ 0320,01,0255,0,
- /* 19308 */ 01,0216,0110,0,
- /* 19312 */ 01,0240,045,0,
- /* 19316 */ 01,0242,044,0,
- /* 19320 */ 01,0210,0101,0,
- /* 19324 */ 01,0212,0110,0,
- /* 19328 */ 010,0260,021,0,
- /* 19332 */ 0321,01,0245,0,
- /* 19336 */ 0324,01,0245,0,
- /* 19340 */ 0320,01,0245,0,
- /* 19344 */ 01,0366,0204,0,
- /* 19348 */ 01,0366,0203,0,
- /* 19352 */ 0314,01,0220,0,
- /* 19356 */ 01,0366,0202,0,
- /* 19360 */ 01,010,0101,0,
- /* 19364 */ 01,014,021,0,
- /* 19368 */ 01,0346,024,0,
- /* 19372 */ 0320,01,0357,0,
- /* 19376 */ 0321,01,0357,0,
- /* 19380 */ 0321,01,0157,0,
- /* 19384 */ 0320,01,0157,0,
- /* 19388 */ 0320,010,0130,0,
- /* 19392 */ 0321,010,0130,0,
- /* 19396 */ 0323,010,0130,0,
- /* 19400 */ 01,017,0347,0,
- /* 19404 */ 0322,01,0141,0,
- /* 19408 */ 0321,01,0141,0,
- /* 19412 */ 0320,01,0141,0,
- /* 19416 */ 0322,01,0235,0,
- /* 19420 */ 0321,01,0235,0,
- /* 19424 */ 0320,01,0235,0,
- /* 19428 */ 0320,010,0120,0,
- /* 19432 */ 0321,010,0120,0,
- /* 19436 */ 0323,010,0120,0,
- /* 19440 */ 01,017,0346,0,
- /* 19444 */ 01,0152,0274,0,
- /* 19448 */ 0322,01,0140,0,
- /* 19452 */ 0321,01,0140,0,
- /* 19456 */ 0320,01,0140,0,
- /* 19460 */ 0322,01,0234,0,
- /* 19464 */ 0321,01,0234,0,
- /* 19468 */ 0320,01,0234,0,
- /* 19472 */ 01,0320,0202,0,
- /* 19476 */ 01,0322,0202,0,
- /* 19480 */ 01,0320,0203,0,
- /* 19484 */ 01,0322,0203,0,
- /* 19488 */ 02,017,062,0,
- /* 19492 */ 02,017,063,0,
- /* 19496 */ 02,017,061,0,
- /* 19500 */ 01,0302,030,0,
- /* 19504 */ 01,0312,030,0,
- /* 19508 */ 01,0320,0200,0,
- /* 19512 */ 01,0322,0200,0,
- /* 19516 */ 01,0320,0201,0,
- /* 19520 */ 01,0322,0201,0,
- /* 19524 */ 02,017,0252,0,
- /* 19528 */ 01,0320,0204,0,
- /* 19532 */ 01,0322,0204,0,
- /* 19536 */ 01,0320,0207,0,
- /* 19540 */ 01,0322,0207,0,
- /* 19544 */ 01,030,0101,0,
- /* 19548 */ 01,034,021,0,
- /* 19552 */ 0335,01,0256,0,
- /* 19556 */ 01,0320,0205,0,
- /* 19560 */ 01,0322,0205,0,
- /* 19564 */ 02,017,070,0,
- /* 19568 */ 02,017,0176,0,
- /* 19572 */ 0321,01,0253,0,
- /* 19576 */ 0324,01,0253,0,
- /* 19580 */ 0320,01,0253,0,
- /* 19584 */ 01,050,0101,0,
- /* 19588 */ 01,054,021,0,
- /* 19592 */ 02,017,064,0,
- /* 19596 */ 02,017,065,0,
- /* 19600 */ 01,0204,0101,0,
- /* 19604 */ 01,0204,0110,0,
- /* 19608 */ 01,0250,021,0,
- /* 19612 */ 02,017,0377,0,
- /* 19616 */ 02,017,0271,0,
- /* 19620 */ 02,017,013,0,
- /* 19624 */ 02,017,011,0,
- /* 19628 */ 02,017,060,0,
- /* 19632 */ 0320,011,0220,0,
- /* 19636 */ 0321,011,0220,0,
- /* 19640 */ 0324,011,0220,0,
- /* 19644 */ 0320,010,0220,0,
- /* 19648 */ 0321,010,0220,0,
- /* 19652 */ 0324,010,0220,0,
- /* 19656 */ 0321,01,0220,0,
- /* 19660 */ 01,0206,0110,0,
- /* 19664 */ 01,0206,0101,0,
- /* 19668 */ 01,060,0101,0,
- /* 19672 */ 01,064,021,0,
- /* 19676 */ 02,017,067,0,
- /* 19680 */ 01,067,0,
- /* 19683 */ 01,077,0,
- /* 19686 */ 01,0374,0,
- /* 19689 */ 01,0372,0,
- /* 19692 */ 01,0365,0,
- /* 19695 */ 01,047,0,
- /* 19698 */ 01,057,0,
- /* 19701 */ 01,0364,0,
- /* 19704 */ 01,0361,0,
- /* 19707 */ 01,0354,0,
- /* 19710 */ 01,0154,0,
- /* 19713 */ 01,0314,0,
- /* 19716 */ 01,0316,0,
- /* 19719 */ 01,0237,0,
- /* 19722 */ 01,0254,0,
- /* 19725 */ 01,0356,0,
- /* 19728 */ 01,0156,0,
- /* 19731 */ 01,0313,0,
- /* 19734 */ 01,0326,0,
- /* 19737 */ 01,0375,0,
- /* 19740 */ 01,0373,0,
- /* 19743 */ 01,0327,0,
+ /* 54 */ 0261,01,041,01,0302,0120,01,020,0,
+ /* 63 */ 0260,01,041,01,0302,0110,01,020,0,
+ /* 72 */ 0261,01,045,01,0302,0120,01,020,0,
+ /* 81 */ 0260,01,045,01,0302,0110,01,020,0,
+ /* 90 */ 0261,01,041,01,0302,0120,01,0,0,
+ /* 99 */ 0260,01,041,01,0302,0110,01,0,0,
+ /* 108 */ 0261,01,045,01,0302,0120,01,0,0,
+ /* 117 */ 0260,01,045,01,0302,0110,01,0,0,
+ /* 126 */ 0261,01,041,01,0302,0120,01,01,0,
+ /* 135 */ 0260,01,041,01,0302,0110,01,01,0,
+ /* 144 */ 0261,01,045,01,0302,0120,01,01,0,
+ /* 153 */ 0260,01,045,01,0302,0110,01,01,0,
+ /* 162 */ 0261,01,041,01,0302,0120,01,02,0,
+ /* 171 */ 0260,01,041,01,0302,0110,01,02,0,
+ /* 180 */ 0261,01,045,01,0302,0120,01,02,0,
+ /* 189 */ 0260,01,045,01,0302,0110,01,02,0,
+ /* 198 */ 0261,01,041,01,0302,0120,01,03,0,
+ /* 207 */ 0260,01,041,01,0302,0110,01,03,0,
+ /* 216 */ 0261,01,045,01,0302,0120,01,03,0,
+ /* 225 */ 0260,01,045,01,0302,0110,01,03,0,
+ /* 234 */ 0261,01,041,01,0302,0120,01,04,0,
+ /* 243 */ 0260,01,041,01,0302,0110,01,04,0,
+ /* 252 */ 0261,01,045,01,0302,0120,01,04,0,
+ /* 261 */ 0260,01,045,01,0302,0110,01,04,0,
+ /* 270 */ 0261,01,041,01,0302,0120,01,05,0,
+ /* 279 */ 0260,01,041,01,0302,0110,01,05,0,
+ /* 288 */ 0261,01,045,01,0302,0120,01,05,0,
+ /* 297 */ 0260,01,045,01,0302,0110,01,05,0,
+ /* 306 */ 0261,01,041,01,0302,0120,01,06,0,
+ /* 315 */ 0260,01,041,01,0302,0110,01,06,0,
+ /* 324 */ 0261,01,045,01,0302,0120,01,06,0,
+ /* 333 */ 0260,01,045,01,0302,0110,01,06,0,
+ /* 342 */ 0261,01,041,01,0302,0120,01,07,0,
+ /* 351 */ 0260,01,041,01,0302,0110,01,07,0,
+ /* 360 */ 0261,01,045,01,0302,0120,01,07,0,
+ /* 369 */ 0260,01,045,01,0302,0110,01,07,0,
+ /* 378 */ 0261,01,041,01,0302,0120,01,010,0,
+ /* 387 */ 0260,01,041,01,0302,0110,01,010,0,
+ /* 396 */ 0261,01,045,01,0302,0120,01,010,0,
+ /* 405 */ 0260,01,045,01,0302,0110,01,010,0,
+ /* 414 */ 0261,01,041,01,0302,0120,01,011,0,
+ /* 423 */ 0260,01,041,01,0302,0110,01,011,0,
+ /* 432 */ 0261,01,045,01,0302,0120,01,011,0,
+ /* 441 */ 0260,01,045,01,0302,0110,01,011,0,
+ /* 450 */ 0261,01,041,01,0302,0120,01,012,0,
+ /* 459 */ 0260,01,041,01,0302,0110,01,012,0,
+ /* 468 */ 0261,01,045,01,0302,0120,01,012,0,
+ /* 477 */ 0260,01,045,01,0302,0110,01,012,0,
+ /* 486 */ 0261,01,041,01,0302,0120,01,013,0,
+ /* 495 */ 0260,01,041,01,0302,0110,01,013,0,
+ /* 504 */ 0261,01,045,01,0302,0120,01,013,0,
+ /* 513 */ 0260,01,045,01,0302,0110,01,013,0,
+ /* 522 */ 0261,01,041,01,0302,0120,01,014,0,
+ /* 531 */ 0260,01,041,01,0302,0110,01,014,0,
+ /* 540 */ 0261,01,045,01,0302,0120,01,014,0,
+ /* 549 */ 0260,01,045,01,0302,0110,01,014,0,
+ /* 558 */ 0261,01,041,01,0302,0120,01,015,0,
+ /* 567 */ 0260,01,041,01,0302,0110,01,015,0,
+ /* 576 */ 0261,01,045,01,0302,0120,01,015,0,
+ /* 585 */ 0260,01,045,01,0302,0110,01,015,0,
+ /* 594 */ 0261,01,041,01,0302,0120,01,016,0,
+ /* 603 */ 0260,01,041,01,0302,0110,01,016,0,
+ /* 612 */ 0261,01,045,01,0302,0120,01,016,0,
+ /* 621 */ 0260,01,045,01,0302,0110,01,016,0,
+ /* 630 */ 0261,01,041,01,0302,0120,01,017,0,
+ /* 639 */ 0260,01,041,01,0302,0110,01,017,0,
+ /* 648 */ 0261,01,045,01,0302,0120,01,017,0,
+ /* 657 */ 0260,01,045,01,0302,0110,01,017,0,
+ /* 666 */ 0261,01,041,01,0302,0120,01,021,0,
+ /* 675 */ 0260,01,041,01,0302,0110,01,021,0,
+ /* 684 */ 0261,01,045,01,0302,0120,01,021,0,
+ /* 693 */ 0260,01,045,01,0302,0110,01,021,0,
+ /* 702 */ 0261,01,041,01,0302,0120,01,022,0,
+ /* 711 */ 0260,01,041,01,0302,0110,01,022,0,
+ /* 720 */ 0261,01,045,01,0302,0120,01,022,0,
+ /* 729 */ 0260,01,045,01,0302,0110,01,022,0,
+ /* 738 */ 0261,01,041,01,0302,0120,01,023,0,
+ /* 747 */ 0260,01,041,01,0302,0110,01,023,0,
+ /* 756 */ 0261,01,045,01,0302,0120,01,023,0,
+ /* 765 */ 0260,01,045,01,0302,0110,01,023,0,
+ /* 774 */ 0261,01,041,01,0302,0120,01,024,0,
+ /* 783 */ 0260,01,041,01,0302,0110,01,024,0,
+ /* 792 */ 0261,01,045,01,0302,0120,01,024,0,
+ /* 801 */ 0260,01,045,01,0302,0110,01,024,0,
+ /* 810 */ 0261,01,041,01,0302,0120,01,025,0,
+ /* 819 */ 0260,01,041,01,0302,0110,01,025,0,
+ /* 828 */ 0261,01,045,01,0302,0120,01,025,0,
+ /* 837 */ 0260,01,045,01,0302,0110,01,025,0,
+ /* 846 */ 0261,01,041,01,0302,0120,01,026,0,
+ /* 855 */ 0260,01,041,01,0302,0110,01,026,0,
+ /* 864 */ 0261,01,045,01,0302,0120,01,026,0,
+ /* 873 */ 0260,01,045,01,0302,0110,01,026,0,
+ /* 882 */ 0261,01,041,01,0302,0120,01,027,0,
+ /* 891 */ 0260,01,041,01,0302,0110,01,027,0,
+ /* 900 */ 0261,01,045,01,0302,0120,01,027,0,
+ /* 909 */ 0260,01,045,01,0302,0110,01,027,0,
+ /* 918 */ 0261,01,041,01,0302,0120,01,030,0,
+ /* 927 */ 0260,01,041,01,0302,0110,01,030,0,
+ /* 936 */ 0261,01,045,01,0302,0120,01,030,0,
+ /* 945 */ 0260,01,045,01,0302,0110,01,030,0,
+ /* 954 */ 0261,01,041,01,0302,0120,01,031,0,
+ /* 963 */ 0260,01,041,01,0302,0110,01,031,0,
+ /* 972 */ 0261,01,045,01,0302,0120,01,031,0,
+ /* 981 */ 0260,01,045,01,0302,0110,01,031,0,
+ /* 990 */ 0261,01,041,01,0302,0120,01,032,0,
+ /* 999 */ 0260,01,041,01,0302,0110,01,032,0,
+ /* 1008 */ 0261,01,045,01,0302,0120,01,032,0,
+ /* 1017 */ 0260,01,045,01,0302,0110,01,032,0,
+ /* 1026 */ 0261,01,041,01,0302,0120,01,033,0,
+ /* 1035 */ 0260,01,041,01,0302,0110,01,033,0,
+ /* 1044 */ 0261,01,045,01,0302,0120,01,033,0,
+ /* 1053 */ 0260,01,045,01,0302,0110,01,033,0,
+ /* 1062 */ 0261,01,041,01,0302,0120,01,034,0,
+ /* 1071 */ 0260,01,041,01,0302,0110,01,034,0,
+ /* 1080 */ 0261,01,045,01,0302,0120,01,034,0,
+ /* 1089 */ 0260,01,045,01,0302,0110,01,034,0,
+ /* 1098 */ 0261,01,041,01,0302,0120,01,035,0,
+ /* 1107 */ 0260,01,041,01,0302,0110,01,035,0,
+ /* 1116 */ 0261,01,045,01,0302,0120,01,035,0,
+ /* 1125 */ 0260,01,045,01,0302,0110,01,035,0,
+ /* 1134 */ 0261,01,041,01,0302,0120,01,036,0,
+ /* 1143 */ 0260,01,041,01,0302,0110,01,036,0,
+ /* 1152 */ 0261,01,045,01,0302,0120,01,036,0,
+ /* 1161 */ 0260,01,045,01,0302,0110,01,036,0,
+ /* 1170 */ 0261,01,041,01,0302,0120,01,037,0,
+ /* 1179 */ 0260,01,041,01,0302,0110,01,037,0,
+ /* 1188 */ 0261,01,045,01,0302,0120,01,037,0,
+ /* 1197 */ 0260,01,045,01,0302,0110,01,037,0,
+ /* 1206 */ 0261,01,040,01,0302,0120,01,020,0,
+ /* 1215 */ 0260,01,040,01,0302,0110,01,020,0,
+ /* 1224 */ 0261,01,044,01,0302,0120,01,020,0,
+ /* 1233 */ 0260,01,044,01,0302,0110,01,020,0,
+ /* 1242 */ 0261,01,040,01,0302,0120,01,0,0,
+ /* 1251 */ 0260,01,040,01,0302,0110,01,0,0,
+ /* 1260 */ 0261,01,044,01,0302,0120,01,0,0,
+ /* 1269 */ 0260,01,044,01,0302,0110,01,0,0,
+ /* 1278 */ 0261,01,040,01,0302,0120,01,01,0,
+ /* 1287 */ 0260,01,040,01,0302,0110,01,01,0,
+ /* 1296 */ 0261,01,044,01,0302,0120,01,01,0,
+ /* 1305 */ 0260,01,044,01,0302,0110,01,01,0,
+ /* 1314 */ 0261,01,040,01,0302,0120,01,02,0,
+ /* 1323 */ 0260,01,040,01,0302,0110,01,02,0,
+ /* 1332 */ 0261,01,044,01,0302,0120,01,02,0,
+ /* 1341 */ 0260,01,044,01,0302,0110,01,02,0,
+ /* 1350 */ 0261,01,040,01,0302,0120,01,03,0,
+ /* 1359 */ 0260,01,040,01,0302,0110,01,03,0,
+ /* 1368 */ 0261,01,044,01,0302,0120,01,03,0,
+ /* 1377 */ 0260,01,044,01,0302,0110,01,03,0,
+ /* 1386 */ 0261,01,040,01,0302,0120,01,04,0,
+ /* 1395 */ 0260,01,040,01,0302,0110,01,04,0,
+ /* 1404 */ 0261,01,044,01,0302,0120,01,04,0,
+ /* 1413 */ 0260,01,044,01,0302,0110,01,04,0,
+ /* 1422 */ 0261,01,040,01,0302,0120,01,05,0,
+ /* 1431 */ 0260,01,040,01,0302,0110,01,05,0,
+ /* 1440 */ 0261,01,044,01,0302,0120,01,05,0,
+ /* 1449 */ 0260,01,044,01,0302,0110,01,05,0,
+ /* 1458 */ 0261,01,040,01,0302,0120,01,06,0,
+ /* 1467 */ 0260,01,040,01,0302,0110,01,06,0,
+ /* 1476 */ 0261,01,044,01,0302,0120,01,06,0,
+ /* 1485 */ 0260,01,044,01,0302,0110,01,06,0,
+ /* 1494 */ 0261,01,040,01,0302,0120,01,07,0,
+ /* 1503 */ 0260,01,040,01,0302,0110,01,07,0,
+ /* 1512 */ 0261,01,044,01,0302,0120,01,07,0,
+ /* 1521 */ 0260,01,044,01,0302,0110,01,07,0,
+ /* 1530 */ 0261,01,040,01,0302,0120,01,010,0,
+ /* 1539 */ 0260,01,040,01,0302,0110,01,010,0,
+ /* 1548 */ 0261,01,044,01,0302,0120,01,010,0,
+ /* 1557 */ 0260,01,044,01,0302,0110,01,010,0,
+ /* 1566 */ 0261,01,040,01,0302,0120,01,011,0,
+ /* 1575 */ 0260,01,040,01,0302,0110,01,011,0,
+ /* 1584 */ 0261,01,044,01,0302,0120,01,011,0,
+ /* 1593 */ 0260,01,044,01,0302,0110,01,011,0,
+ /* 1602 */ 0261,01,040,01,0302,0120,01,012,0,
+ /* 1611 */ 0260,01,040,01,0302,0110,01,012,0,
+ /* 1620 */ 0261,01,044,01,0302,0120,01,012,0,
+ /* 1629 */ 0260,01,044,01,0302,0110,01,012,0,
+ /* 1638 */ 0261,01,040,01,0302,0120,01,013,0,
+ /* 1647 */ 0260,01,040,01,0302,0110,01,013,0,
+ /* 1656 */ 0261,01,044,01,0302,0120,01,013,0,
+ /* 1665 */ 0260,01,044,01,0302,0110,01,013,0,
+ /* 1674 */ 0261,01,040,01,0302,0120,01,014,0,
+ /* 1683 */ 0260,01,040,01,0302,0110,01,014,0,
+ /* 1692 */ 0261,01,044,01,0302,0120,01,014,0,
+ /* 1701 */ 0260,01,044,01,0302,0110,01,014,0,
+ /* 1710 */ 0261,01,040,01,0302,0120,01,015,0,
+ /* 1719 */ 0260,01,040,01,0302,0110,01,015,0,
+ /* 1728 */ 0261,01,044,01,0302,0120,01,015,0,
+ /* 1737 */ 0260,01,044,01,0302,0110,01,015,0,
+ /* 1746 */ 0261,01,040,01,0302,0120,01,016,0,
+ /* 1755 */ 0260,01,040,01,0302,0110,01,016,0,
+ /* 1764 */ 0261,01,044,01,0302,0120,01,016,0,
+ /* 1773 */ 0260,01,044,01,0302,0110,01,016,0,
+ /* 1782 */ 0261,01,040,01,0302,0120,01,017,0,
+ /* 1791 */ 0260,01,040,01,0302,0110,01,017,0,
+ /* 1800 */ 0261,01,044,01,0302,0120,01,017,0,
+ /* 1809 */ 0260,01,044,01,0302,0110,01,017,0,
+ /* 1818 */ 0261,01,040,01,0302,0120,01,021,0,
+ /* 1827 */ 0260,01,040,01,0302,0110,01,021,0,
+ /* 1836 */ 0261,01,044,01,0302,0120,01,021,0,
+ /* 1845 */ 0260,01,044,01,0302,0110,01,021,0,
+ /* 1854 */ 0261,01,040,01,0302,0120,01,022,0,
+ /* 1863 */ 0260,01,040,01,0302,0110,01,022,0,
+ /* 1872 */ 0261,01,044,01,0302,0120,01,022,0,
+ /* 1881 */ 0260,01,044,01,0302,0110,01,022,0,
+ /* 1890 */ 0261,01,040,01,0302,0120,01,023,0,
+ /* 1899 */ 0260,01,040,01,0302,0110,01,023,0,
+ /* 1908 */ 0261,01,044,01,0302,0120,01,023,0,
+ /* 1917 */ 0260,01,044,01,0302,0110,01,023,0,
+ /* 1926 */ 0261,01,040,01,0302,0120,01,024,0,
+ /* 1935 */ 0260,01,040,01,0302,0110,01,024,0,
+ /* 1944 */ 0261,01,044,01,0302,0120,01,024,0,
+ /* 1953 */ 0260,01,044,01,0302,0110,01,024,0,
+ /* 1962 */ 0261,01,040,01,0302,0120,01,025,0,
+ /* 1971 */ 0260,01,040,01,0302,0110,01,025,0,
+ /* 1980 */ 0261,01,044,01,0302,0120,01,025,0,
+ /* 1989 */ 0260,01,044,01,0302,0110,01,025,0,
+ /* 1998 */ 0261,01,040,01,0302,0120,01,026,0,
+ /* 2007 */ 0260,01,040,01,0302,0110,01,026,0,
+ /* 2016 */ 0261,01,044,01,0302,0120,01,026,0,
+ /* 2025 */ 0260,01,044,01,0302,0110,01,026,0,
+ /* 2034 */ 0261,01,040,01,0302,0120,01,027,0,
+ /* 2043 */ 0260,01,040,01,0302,0110,01,027,0,
+ /* 2052 */ 0261,01,044,01,0302,0120,01,027,0,
+ /* 2061 */ 0260,01,044,01,0302,0110,01,027,0,
+ /* 2070 */ 0261,01,040,01,0302,0120,01,030,0,
+ /* 2079 */ 0260,01,040,01,0302,0110,01,030,0,
+ /* 2088 */ 0261,01,044,01,0302,0120,01,030,0,
+ /* 2097 */ 0260,01,044,01,0302,0110,01,030,0,
+ /* 2106 */ 0261,01,040,01,0302,0120,01,031,0,
+ /* 2115 */ 0260,01,040,01,0302,0110,01,031,0,
+ /* 2124 */ 0261,01,044,01,0302,0120,01,031,0,
+ /* 2133 */ 0260,01,044,01,0302,0110,01,031,0,
+ /* 2142 */ 0261,01,040,01,0302,0120,01,032,0,
+ /* 2151 */ 0260,01,040,01,0302,0110,01,032,0,
+ /* 2160 */ 0261,01,044,01,0302,0120,01,032,0,
+ /* 2169 */ 0260,01,044,01,0302,0110,01,032,0,
+ /* 2178 */ 0261,01,040,01,0302,0120,01,033,0,
+ /* 2187 */ 0260,01,040,01,0302,0110,01,033,0,
+ /* 2196 */ 0261,01,044,01,0302,0120,01,033,0,
+ /* 2205 */ 0260,01,044,01,0302,0110,01,033,0,
+ /* 2214 */ 0261,01,040,01,0302,0120,01,034,0,
+ /* 2223 */ 0260,01,040,01,0302,0110,01,034,0,
+ /* 2232 */ 0261,01,044,01,0302,0120,01,034,0,
+ /* 2241 */ 0260,01,044,01,0302,0110,01,034,0,
+ /* 2250 */ 0261,01,040,01,0302,0120,01,035,0,
+ /* 2259 */ 0260,01,040,01,0302,0110,01,035,0,
+ /* 2268 */ 0261,01,044,01,0302,0120,01,035,0,
+ /* 2277 */ 0260,01,044,01,0302,0110,01,035,0,
+ /* 2286 */ 0261,01,040,01,0302,0120,01,036,0,
+ /* 2295 */ 0260,01,040,01,0302,0110,01,036,0,
+ /* 2304 */ 0261,01,044,01,0302,0120,01,036,0,
+ /* 2313 */ 0260,01,044,01,0302,0110,01,036,0,
+ /* 2322 */ 0261,01,040,01,0302,0120,01,037,0,
+ /* 2331 */ 0260,01,040,01,0302,0110,01,037,0,
+ /* 2340 */ 0261,01,044,01,0302,0120,01,037,0,
+ /* 2349 */ 0260,01,044,01,0302,0110,01,037,0,
+ /* 2358 */ 0261,01,053,01,0302,0120,01,020,0,
+ /* 2367 */ 0260,01,053,01,0302,0110,01,020,0,
+ /* 2376 */ 0261,01,053,01,0302,0120,01,0,0,
+ /* 2385 */ 0260,01,053,01,0302,0110,01,0,0,
+ /* 2394 */ 0261,01,053,01,0302,0120,01,01,0,
+ /* 2403 */ 0260,01,053,01,0302,0110,01,01,0,
+ /* 2412 */ 0261,01,053,01,0302,0120,01,02,0,
+ /* 2421 */ 0260,01,053,01,0302,0110,01,02,0,
+ /* 2430 */ 0261,01,053,01,0302,0120,01,03,0,
+ /* 2439 */ 0260,01,053,01,0302,0110,01,03,0,
+ /* 2448 */ 0261,01,053,01,0302,0120,01,04,0,
+ /* 2457 */ 0260,01,053,01,0302,0110,01,04,0,
+ /* 2466 */ 0261,01,053,01,0302,0120,01,05,0,
+ /* 2475 */ 0260,01,053,01,0302,0110,01,05,0,
+ /* 2484 */ 0261,01,053,01,0302,0120,01,06,0,
+ /* 2493 */ 0260,01,053,01,0302,0110,01,06,0,
+ /* 2502 */ 0261,01,053,01,0302,0120,01,07,0,
+ /* 2511 */ 0260,01,053,01,0302,0110,01,07,0,
+ /* 2520 */ 0261,01,053,01,0302,0120,01,010,0,
+ /* 2529 */ 0260,01,053,01,0302,0110,01,010,0,
+ /* 2538 */ 0261,01,053,01,0302,0120,01,011,0,
+ /* 2547 */ 0260,01,053,01,0302,0110,01,011,0,
+ /* 2556 */ 0261,01,053,01,0302,0120,01,012,0,
+ /* 2565 */ 0260,01,053,01,0302,0110,01,012,0,
+ /* 2574 */ 0261,01,053,01,0302,0120,01,013,0,
+ /* 2583 */ 0260,01,053,01,0302,0110,01,013,0,
+ /* 2592 */ 0261,01,053,01,0302,0120,01,014,0,
+ /* 2601 */ 0260,01,053,01,0302,0110,01,014,0,
+ /* 2610 */ 0261,01,053,01,0302,0120,01,015,0,
+ /* 2619 */ 0260,01,053,01,0302,0110,01,015,0,
+ /* 2628 */ 0261,01,053,01,0302,0120,01,016,0,
+ /* 2637 */ 0260,01,053,01,0302,0110,01,016,0,
+ /* 2646 */ 0261,01,053,01,0302,0120,01,017,0,
+ /* 2655 */ 0260,01,053,01,0302,0110,01,017,0,
+ /* 2664 */ 0261,01,053,01,0302,0120,01,021,0,
+ /* 2673 */ 0260,01,053,01,0302,0110,01,021,0,
+ /* 2682 */ 0261,01,053,01,0302,0120,01,022,0,
+ /* 2691 */ 0260,01,053,01,0302,0110,01,022,0,
+ /* 2700 */ 0261,01,053,01,0302,0120,01,023,0,
+ /* 2709 */ 0260,01,053,01,0302,0110,01,023,0,
+ /* 2718 */ 0261,01,053,01,0302,0120,01,024,0,
+ /* 2727 */ 0260,01,053,01,0302,0110,01,024,0,
+ /* 2736 */ 0261,01,053,01,0302,0120,01,025,0,
+ /* 2745 */ 0260,01,053,01,0302,0110,01,025,0,
+ /* 2754 */ 0261,01,053,01,0302,0120,01,026,0,
+ /* 2763 */ 0260,01,053,01,0302,0110,01,026,0,
+ /* 2772 */ 0261,01,053,01,0302,0120,01,027,0,
+ /* 2781 */ 0260,01,053,01,0302,0110,01,027,0,
+ /* 2790 */ 0261,01,053,01,0302,0120,01,030,0,
+ /* 2799 */ 0260,01,053,01,0302,0110,01,030,0,
+ /* 2808 */ 0261,01,053,01,0302,0120,01,031,0,
+ /* 2817 */ 0260,01,053,01,0302,0110,01,031,0,
+ /* 2826 */ 0261,01,053,01,0302,0120,01,032,0,
+ /* 2835 */ 0260,01,053,01,0302,0110,01,032,0,
+ /* 2844 */ 0261,01,053,01,0302,0120,01,033,0,
+ /* 2853 */ 0260,01,053,01,0302,0110,01,033,0,
+ /* 2862 */ 0261,01,053,01,0302,0120,01,034,0,
+ /* 2871 */ 0260,01,053,01,0302,0110,01,034,0,
+ /* 2880 */ 0261,01,053,01,0302,0120,01,035,0,
+ /* 2889 */ 0260,01,053,01,0302,0110,01,035,0,
+ /* 2898 */ 0261,01,053,01,0302,0120,01,036,0,
+ /* 2907 */ 0260,01,053,01,0302,0110,01,036,0,
+ /* 2916 */ 0261,01,053,01,0302,0120,01,037,0,
+ /* 2925 */ 0260,01,053,01,0302,0110,01,037,0,
+ /* 2934 */ 0261,01,052,01,0302,0120,01,020,0,
+ /* 2943 */ 0260,01,052,01,0302,0110,01,020,0,
+ /* 2952 */ 0261,01,052,01,0302,0120,01,0,0,
+ /* 2961 */ 0260,01,052,01,0302,0110,01,0,0,
+ /* 2970 */ 0261,01,052,01,0302,0120,01,01,0,
+ /* 2979 */ 0260,01,052,01,0302,0110,01,01,0,
+ /* 2988 */ 0261,01,052,01,0302,0120,01,02,0,
+ /* 2997 */ 0260,01,052,01,0302,0110,01,02,0,
+ /* 3006 */ 0261,01,052,01,0302,0120,01,03,0,
+ /* 3015 */ 0260,01,052,01,0302,0110,01,03,0,
+ /* 3024 */ 0261,01,052,01,0302,0120,01,04,0,
+ /* 3033 */ 0260,01,052,01,0302,0110,01,04,0,
+ /* 3042 */ 0261,01,052,01,0302,0120,01,05,0,
+ /* 3051 */ 0260,01,052,01,0302,0110,01,05,0,
+ /* 3060 */ 0261,01,052,01,0302,0120,01,06,0,
+ /* 3069 */ 0260,01,052,01,0302,0110,01,06,0,
+ /* 3078 */ 0261,01,052,01,0302,0120,01,07,0,
+ /* 3087 */ 0260,01,052,01,0302,0110,01,07,0,
+ /* 3096 */ 0261,01,052,01,0302,0120,01,010,0,
+ /* 3105 */ 0260,01,052,01,0302,0110,01,010,0,
+ /* 3114 */ 0261,01,052,01,0302,0120,01,011,0,
+ /* 3123 */ 0260,01,052,01,0302,0110,01,011,0,
+ /* 3132 */ 0261,01,052,01,0302,0120,01,012,0,
+ /* 3141 */ 0260,01,052,01,0302,0110,01,012,0,
+ /* 3150 */ 0261,01,052,01,0302,0120,01,013,0,
+ /* 3159 */ 0260,01,052,01,0302,0110,01,013,0,
+ /* 3168 */ 0261,01,052,01,0302,0120,01,014,0,
+ /* 3177 */ 0260,01,052,01,0302,0110,01,014,0,
+ /* 3186 */ 0261,01,052,01,0302,0120,01,015,0,
+ /* 3195 */ 0260,01,052,01,0302,0110,01,015,0,
+ /* 3204 */ 0261,01,052,01,0302,0120,01,016,0,
+ /* 3213 */ 0260,01,052,01,0302,0110,01,016,0,
+ /* 3222 */ 0261,01,052,01,0302,0120,01,017,0,
+ /* 3231 */ 0260,01,052,01,0302,0110,01,017,0,
+ /* 3240 */ 0261,01,052,01,0302,0120,01,021,0,
+ /* 3249 */ 0260,01,052,01,0302,0110,01,021,0,
+ /* 3258 */ 0261,01,052,01,0302,0120,01,022,0,
+ /* 3267 */ 0260,01,052,01,0302,0110,01,022,0,
+ /* 3276 */ 0261,01,052,01,0302,0120,01,023,0,
+ /* 3285 */ 0260,01,052,01,0302,0110,01,023,0,
+ /* 3294 */ 0261,01,052,01,0302,0120,01,024,0,
+ /* 3303 */ 0260,01,052,01,0302,0110,01,024,0,
+ /* 3312 */ 0261,01,052,01,0302,0120,01,025,0,
+ /* 3321 */ 0260,01,052,01,0302,0110,01,025,0,
+ /* 3330 */ 0261,01,052,01,0302,0120,01,026,0,
+ /* 3339 */ 0260,01,052,01,0302,0110,01,026,0,
+ /* 3348 */ 0261,01,052,01,0302,0120,01,027,0,
+ /* 3357 */ 0260,01,052,01,0302,0110,01,027,0,
+ /* 3366 */ 0261,01,052,01,0302,0120,01,030,0,
+ /* 3375 */ 0260,01,052,01,0302,0110,01,030,0,
+ /* 3384 */ 0261,01,052,01,0302,0120,01,031,0,
+ /* 3393 */ 0260,01,052,01,0302,0110,01,031,0,
+ /* 3402 */ 0261,01,052,01,0302,0120,01,032,0,
+ /* 3411 */ 0260,01,052,01,0302,0110,01,032,0,
+ /* 3420 */ 0261,01,052,01,0302,0120,01,033,0,
+ /* 3429 */ 0260,01,052,01,0302,0110,01,033,0,
+ /* 3438 */ 0261,01,052,01,0302,0120,01,034,0,
+ /* 3447 */ 0260,01,052,01,0302,0110,01,034,0,
+ /* 3456 */ 0261,01,052,01,0302,0120,01,035,0,
+ /* 3465 */ 0260,01,052,01,0302,0110,01,035,0,
+ /* 3474 */ 0261,01,052,01,0302,0120,01,036,0,
+ /* 3483 */ 0260,01,052,01,0302,0110,01,036,0,
+ /* 3492 */ 0261,01,052,01,0302,0120,01,037,0,
+ /* 3501 */ 0260,01,052,01,0302,0110,01,037,0,
+ /* 3510 */ 0361,03,017,072,0104,0110,01,0,0,
+ /* 3519 */ 0361,03,017,072,0104,0110,01,01,0,
+ /* 3528 */ 0361,03,017,072,0104,0110,01,020,0,
+ /* 3537 */ 0361,03,017,072,0104,0110,01,021,0,
+ /* 3546 */ 0261,03,041,01,0104,0120,01,0,0,
+ /* 3555 */ 0260,03,041,01,0104,0110,01,0,0,
+ /* 3564 */ 0261,03,041,01,0104,0120,01,01,0,
+ /* 3573 */ 0260,03,041,01,0104,0110,01,01,0,
+ /* 3582 */ 0261,03,041,01,0104,0120,01,020,0,
+ /* 3591 */ 0260,03,041,01,0104,0110,01,020,0,
+ /* 3600 */ 0261,03,041,01,0104,0120,01,021,0,
+ /* 3609 */ 0260,03,041,01,0104,0110,01,021,0,
+ /* 3618 */ 0273,0320,02,017,0272,0207,025,0,
+ /* 3626 */ 0273,0321,02,017,0272,0207,025,0,
+ /* 3634 */ 0273,0324,02,017,0272,0207,025,0,
+ /* 3642 */ 0273,0320,02,017,0272,0206,025,0,
+ /* 3650 */ 0273,0321,02,017,0272,0206,025,0,
+ /* 3658 */ 0273,0324,02,017,0272,0206,025,0,
+ /* 3666 */ 0273,0320,02,017,0272,0205,025,0,
+ /* 3674 */ 0273,0321,02,017,0272,0205,025,0,
+ /* 3682 */ 0273,0324,02,017,0272,0205,025,0,
+ /* 3690 */ 0323,02,017,017,0110,01,0277,0,
+ /* 3698 */ 0323,02,017,017,0110,01,035,0,
+ /* 3706 */ 0323,02,017,017,0110,01,0256,0,
+ /* 3714 */ 0323,02,017,017,0110,01,0236,0,
+ /* 3722 */ 0323,02,017,017,0110,01,0260,0,
+ /* 3730 */ 0323,02,017,017,0110,01,0220,0,
+ /* 3738 */ 0323,02,017,017,0110,01,0240,0,
+ /* 3746 */ 0323,02,017,017,0110,01,0244,0,
+ /* 3754 */ 0323,02,017,017,0110,01,0224,0,
+ /* 3762 */ 0323,02,017,017,0110,01,0264,0,
+ /* 3770 */ 0323,02,017,017,0110,01,0226,0,
+ /* 3778 */ 0323,02,017,017,0110,01,0246,0,
+ /* 3786 */ 0323,02,017,017,0110,01,0266,0,
+ /* 3794 */ 0323,02,017,017,0110,01,0247,0,
+ /* 3802 */ 0323,02,017,017,0110,01,0227,0,
+ /* 3810 */ 0323,02,017,017,0110,01,0232,0,
+ /* 3818 */ 0323,02,017,017,0110,01,0252,0,
+ /* 3826 */ 0323,02,017,017,0110,01,015,0,
+ /* 3834 */ 0323,02,017,017,0110,01,0267,0,
+ /* 3842 */ 0360,02,017,0302,0110,01,0,0,
+ /* 3850 */ 0363,02,017,0302,0110,01,0,0,
+ /* 3858 */ 0360,02,017,0302,0110,01,02,0,
+ /* 3866 */ 0363,02,017,0302,0110,01,02,0,
+ /* 3874 */ 0360,02,017,0302,0110,01,01,0,
+ /* 3882 */ 0363,02,017,0302,0110,01,01,0,
+ /* 3890 */ 0360,02,017,0302,0110,01,04,0,
+ /* 3898 */ 0363,02,017,0302,0110,01,04,0,
+ /* 3906 */ 0360,02,017,0302,0110,01,06,0,
+ /* 3914 */ 0363,02,017,0302,0110,01,06,0,
+ /* 3922 */ 0360,02,017,0302,0110,01,05,0,
+ /* 3930 */ 0363,02,017,0302,0110,01,05,0,
+ /* 3938 */ 0360,02,017,0302,0110,01,07,0,
+ /* 3946 */ 0363,02,017,0302,0110,01,07,0,
+ /* 3954 */ 0360,02,017,0302,0110,01,03,0,
+ /* 3962 */ 0363,02,017,0302,0110,01,03,0,
+ /* 3970 */ 0360,0323,02,017,0160,0110,022,0,
+ /* 3978 */ 0323,02,017,017,0110,01,034,0,
+ /* 3986 */ 0323,02,017,017,0110,01,0212,0,
+ /* 3994 */ 0323,02,017,017,0110,01,0216,0,
+ /* 4002 */ 0323,02,017,017,0110,01,014,0,
+ /* 4010 */ 0323,02,017,017,0110,01,0273,0,
+ /* 4018 */ 0361,02,017,0302,0110,01,0,0,
+ /* 4026 */ 0362,02,017,0302,0110,01,0,0,
+ /* 4034 */ 0361,02,017,0302,0110,01,02,0,
+ /* 4042 */ 0362,02,017,0302,0110,01,02,0,
+ /* 4050 */ 0361,02,017,0302,0110,01,01,0,
+ /* 4058 */ 0362,02,017,0302,0110,01,01,0,
+ /* 4066 */ 0361,02,017,0302,0110,01,04,0,
+ /* 4074 */ 0362,02,017,0302,0110,01,04,0,
+ /* 4082 */ 0361,02,017,0302,0110,01,06,0,
+ /* 4090 */ 0362,02,017,0302,0110,01,06,0,
+ /* 4098 */ 0361,02,017,0302,0110,01,05,0,
+ /* 4106 */ 0362,02,017,0302,0110,01,05,0,
+ /* 4114 */ 0361,02,017,0302,0110,01,07,0,
+ /* 4122 */ 0362,02,017,0302,0110,01,07,0,
+ /* 4130 */ 0361,02,017,0302,0110,01,03,0,
+ /* 4138 */ 0362,02,017,0302,0110,01,03,0,
+ /* 4146 */ 0323,0361,03,017,070,0200,0110,0,
+ /* 4154 */ 0323,0361,03,017,070,0201,0110,0,
+ /* 4162 */ 0360,03,017,072,017,0110,026,0,
+ /* 4170 */ 0361,03,017,072,017,0110,026,0,
+ /* 4178 */ 0361,02,017,0170,0200,025,026,0,
+ /* 4186 */ 0362,02,017,0170,0110,026,027,0,
+ /* 4194 */ 0361,03,017,072,015,0110,026,0,
+ /* 4202 */ 0361,03,017,072,014,0110,026,0,
+ /* 4210 */ 0361,03,017,072,0101,0110,026,0,
+ /* 4218 */ 0361,03,017,072,0100,0110,026,0,
+ /* 4226 */ 0361,03,017,072,041,0110,026,0,
+ /* 4234 */ 0361,03,017,072,0102,0110,026,0,
+ /* 4242 */ 0361,03,017,072,016,0110,026,0,
+ /* 4250 */ 0361,03,017,072,011,0110,026,0,
+ /* 4258 */ 0361,03,017,072,010,0110,026,0,
+ /* 4266 */ 0361,03,017,072,013,0110,026,0,
+ /* 4274 */ 0361,03,017,072,012,0110,026,0,
+ /* 4282 */ 0320,0332,03,017,070,0361,0110,0,
+ /* 4290 */ 0321,0332,03,017,070,0361,0110,0,
+ /* 4298 */ 0324,0332,03,017,070,0360,0110,0,
+ /* 4306 */ 0324,0332,03,017,070,0361,0110,0,
+ /* 4314 */ 0361,03,017,072,0141,0110,026,0,
+ /* 4322 */ 0361,03,017,072,0140,0110,026,0,
+ /* 4330 */ 0361,03,017,072,0143,0110,026,0,
+ /* 4338 */ 0361,03,017,072,0142,0110,026,0,
+ /* 4346 */ 0323,02,017,017,0110,01,0206,0,
+ /* 4354 */ 0323,02,017,017,0110,01,0207,0,
+ /* 4362 */ 0361,03,017,072,0337,0110,022,0,
+ /* 4370 */ 0270,03,041,01,0337,0110,022,0,
+ /* 4378 */ 0261,03,041,01,015,0120,023,0,
+ /* 4386 */ 0260,03,041,01,015,0110,022,0,
+ /* 4394 */ 0261,03,045,01,015,0120,023,0,
+ /* 4402 */ 0260,03,045,01,015,0110,022,0,
+ /* 4410 */ 0261,03,041,01,014,0120,023,0,
+ /* 4418 */ 0260,03,041,01,014,0110,022,0,
+ /* 4426 */ 0261,03,045,01,014,0120,023,0,
+ /* 4434 */ 0260,03,045,01,014,0110,022,0,
+ /* 4442 */ 0261,03,01,01,0113,0120,0177,0,
+ /* 4450 */ 0260,03,01,01,0113,0110,0176,0,
+ /* 4458 */ 0261,03,05,01,0113,0120,0177,0,
+ /* 4466 */ 0260,03,05,01,0113,0110,0176,0,
+ /* 4474 */ 0261,03,01,01,0112,0120,0177,0,
+ /* 4482 */ 0260,03,01,01,0112,0110,0176,0,
+ /* 4490 */ 0261,03,05,01,0112,0120,0177,0,
+ /* 4498 */ 0260,03,05,01,0112,0110,0176,0,
+ /* 4506 */ 0261,01,041,01,0302,0120,023,0,
+ /* 4514 */ 0260,01,041,01,0302,0110,022,0,
+ /* 4522 */ 0261,01,045,01,0302,0120,023,0,
+ /* 4530 */ 0260,01,045,01,0302,0110,022,0,
+ /* 4538 */ 0261,01,040,01,0302,0120,023,0,
+ /* 4546 */ 0260,01,040,01,0302,0110,022,0,
+ /* 4554 */ 0261,01,044,01,0302,0120,023,0,
+ /* 4562 */ 0260,01,044,01,0302,0110,022,0,
+ /* 4570 */ 0261,01,053,01,0302,0120,023,0,
+ /* 4578 */ 0260,01,053,01,0302,0110,022,0,
+ /* 4586 */ 0261,01,052,01,0302,0120,023,0,
+ /* 4594 */ 0260,01,052,01,0302,0110,022,0,
+ /* 4602 */ 0261,03,041,01,0101,0120,023,0,
+ /* 4610 */ 0260,03,041,01,0101,0110,022,0,
+ /* 4618 */ 0261,03,041,01,0100,0120,023,0,
+ /* 4626 */ 0260,03,041,01,0100,0110,022,0,
+ /* 4634 */ 0261,03,045,01,0100,0120,023,0,
+ /* 4642 */ 0260,03,045,01,0100,0110,022,0,
+ /* 4650 */ 0270,03,05,01,031,0101,022,0,
+ /* 4658 */ 0270,03,041,01,027,0101,022,0,
+ /* 4666 */ 0261,03,05,01,030,0120,023,0,
+ /* 4674 */ 0261,03,041,01,041,0120,023,0,
+ /* 4682 */ 0260,03,041,01,041,0110,022,0,
+ /* 4690 */ 0261,03,041,01,0102,0120,023,0,
+ /* 4698 */ 0260,03,041,01,0102,0110,022,0,
+ /* 4706 */ 0261,03,041,01,017,0120,023,0,
+ /* 4714 */ 0260,03,041,01,017,0110,022,0,
+ /* 4722 */ 0261,03,01,01,0114,0120,0177,0,
+ /* 4730 */ 0260,03,01,01,0114,0110,0176,0,
+ /* 4738 */ 0261,03,041,01,016,0120,023,0,
+ /* 4746 */ 0260,03,041,01,016,0110,022,0,
+ /* 4754 */ 0270,03,041,01,0141,0110,022,0,
+ /* 4762 */ 0270,03,041,01,0140,0110,022,0,
+ /* 4770 */ 0270,03,041,01,0143,0110,022,0,
+ /* 4778 */ 0270,03,041,01,0142,0110,022,0,
+ /* 4786 */ 0270,03,01,01,05,0110,022,0,
+ /* 4794 */ 0270,03,05,01,05,0110,022,0,
+ /* 4802 */ 0270,03,01,01,04,0110,022,0,
+ /* 4810 */ 0270,03,05,01,04,0110,022,0,
+ /* 4818 */ 0261,03,05,01,06,0120,023,0,
+ /* 4826 */ 0270,03,01,01,024,0101,022,0,
+ /* 4834 */ 0270,01,01,01,0305,0110,022,0,
+ /* 4842 */ 0270,03,01,01,025,0101,022,0,
+ /* 4850 */ 0270,03,01,01,026,0101,022,0,
+ /* 4858 */ 0270,03,021,01,026,0101,022,0,
+ /* 4866 */ 0261,03,041,01,040,0120,023,0,
+ /* 4874 */ 0260,03,041,01,040,0110,022,0,
+ /* 4882 */ 0261,01,041,01,0304,0120,023,0,
+ /* 4890 */ 0260,01,041,01,0304,0110,022,0,
+ /* 4898 */ 0261,03,01,01,042,0120,023,0,
+ /* 4906 */ 0260,03,01,01,042,0110,022,0,
+ /* 4914 */ 0261,03,021,01,042,0120,023,0,
+ /* 4922 */ 0260,03,021,01,042,0110,022,0,
+ /* 4930 */ 0270,01,041,01,0160,0110,022,0,
+ /* 4938 */ 0270,01,042,01,0160,0110,022,0,
+ /* 4946 */ 0270,01,043,01,0160,0110,022,0,
+ /* 4954 */ 0260,01,041,01,0163,0217,022,0,
+ /* 4962 */ 0260,01,041,01,0163,0207,021,0,
+ /* 4970 */ 0260,01,041,01,0163,0213,022,0,
+ /* 4978 */ 0260,01,041,01,0163,0203,021,0,
+ /* 4986 */ 0260,01,041,01,0161,0216,022,0,
+ /* 4994 */ 0260,01,041,01,0161,0206,021,0,
+ /* 5002 */ 0260,01,041,01,0162,0216,022,0,
+ /* 5010 */ 0260,01,041,01,0162,0206,021,0,
+ /* 5018 */ 0260,01,041,01,0163,0216,022,0,
+ /* 5026 */ 0260,01,041,01,0163,0206,021,0,
+ /* 5034 */ 0260,01,041,01,0161,0214,022,0,
+ /* 5042 */ 0260,01,041,01,0161,0204,021,0,
+ /* 5050 */ 0260,01,041,01,0162,0214,022,0,
+ /* 5058 */ 0260,01,041,01,0162,0204,021,0,
+ /* 5066 */ 0260,01,041,01,0161,0212,022,0,
+ /* 5074 */ 0260,01,041,01,0161,0202,021,0,
+ /* 5082 */ 0260,01,041,01,0162,0212,022,0,
+ /* 5090 */ 0260,01,041,01,0162,0202,021,0,
+ /* 5098 */ 0260,01,041,01,0163,0212,022,0,
+ /* 5106 */ 0260,01,041,01,0163,0202,021,0,
+ /* 5114 */ 0270,03,041,01,011,0110,022,0,
+ /* 5122 */ 0270,03,045,01,011,0110,022,0,
+ /* 5130 */ 0270,03,041,01,010,0110,022,0,
+ /* 5138 */ 0270,03,045,01,010,0110,022,0,
+ /* 5146 */ 0261,03,041,01,013,0120,023,0,
+ /* 5154 */ 0260,03,041,01,013,0110,022,0,
+ /* 5162 */ 0261,03,041,01,012,0120,023,0,
+ /* 5170 */ 0260,03,041,01,012,0110,022,0,
+ /* 5178 */ 0261,01,041,01,0306,0120,023,0,
+ /* 5186 */ 0260,01,041,01,0306,0110,022,0,
+ /* 5194 */ 0261,01,045,01,0306,0120,023,0,
+ /* 5202 */ 0260,01,045,01,0306,0110,022,0,
+ /* 5210 */ 0261,01,040,01,0306,0120,023,0,
+ /* 5218 */ 0260,01,040,01,0306,0110,022,0,
+ /* 5226 */ 0261,01,044,01,0306,0120,023,0,
+ /* 5234 */ 0260,01,044,01,0306,0110,022,0,
+ /* 5242 */ 0361,03,017,072,0104,0110,022,0,
+ /* 5250 */ 0261,03,041,01,0104,0120,023,0,
+ /* 5258 */ 0260,03,041,01,0104,0110,022,0,
+ /* 5266 */ 0270,03,05,01,035,0101,022,0,
+ /* 5274 */ 0270,03,01,01,035,0101,022,0,
+ /* 5282 */ 0317,0361,03,017,070,0366,0110,0,
+ /* 5290 */ 0324,0361,03,017,070,0366,0110,0,
+ /* 5298 */ 0317,0363,03,017,070,0366,0110,0,
+ /* 5306 */ 0324,0363,03,017,070,0366,0110,0,
+ /* 5314 */ 0260,0112,0,01,022,0211,042,0,
+ /* 5322 */ 0260,0112,020,01,022,0211,042,0,
+ /* 5330 */ 0260,0112,0,01,022,0210,042,0,
+ /* 5338 */ 0260,0112,020,01,022,0210,042,0,
+ /* 5346 */ 0261,03,01,01,0151,0120,0177,0,
+ /* 5354 */ 0260,03,01,01,0151,0110,0176,0,
+ /* 5362 */ 0261,03,05,01,0151,0120,0177,0,
+ /* 5370 */ 0260,03,05,01,0151,0110,0176,0,
+ /* 5378 */ 0261,03,021,01,0151,0130,0176,0,
+ /* 5386 */ 0260,03,021,01,0151,0120,0175,0,
+ /* 5394 */ 0261,03,025,01,0151,0130,0176,0,
+ /* 5402 */ 0260,03,025,01,0151,0120,0175,0,
+ /* 5410 */ 0261,03,01,01,0150,0120,0177,0,
+ /* 5418 */ 0260,03,01,01,0150,0110,0176,0,
+ /* 5426 */ 0261,03,05,01,0150,0120,0177,0,
+ /* 5434 */ 0260,03,05,01,0150,0110,0176,0,
+ /* 5442 */ 0261,03,021,01,0150,0130,0176,0,
+ /* 5450 */ 0260,03,021,01,0150,0120,0175,0,
+ /* 5458 */ 0261,03,025,01,0150,0130,0176,0,
+ /* 5466 */ 0260,03,025,01,0150,0120,0175,0,
+ /* 5474 */ 0261,03,01,01,0153,0120,0177,0,
+ /* 5482 */ 0260,03,01,01,0153,0110,0176,0,
+ /* 5490 */ 0261,03,021,01,0153,0130,0176,0,
+ /* 5498 */ 0260,03,021,01,0153,0120,0175,0,
+ /* 5506 */ 0261,03,01,01,0152,0120,0177,0,
+ /* 5514 */ 0260,03,01,01,0152,0110,0176,0,
+ /* 5522 */ 0261,03,021,01,0152,0130,0176,0,
+ /* 5530 */ 0260,03,021,01,0152,0120,0175,0,
+ /* 5538 */ 0261,03,01,01,0135,0120,0177,0,
+ /* 5546 */ 0260,03,01,01,0135,0110,0176,0,
+ /* 5554 */ 0261,03,05,01,0135,0120,0177,0,
+ /* 5562 */ 0260,03,05,01,0135,0110,0176,0,
+ /* 5570 */ 0261,03,021,01,0135,0130,0176,0,
+ /* 5578 */ 0260,03,021,01,0135,0120,0175,0,
+ /* 5586 */ 0261,03,025,01,0135,0130,0176,0,
+ /* 5594 */ 0260,03,025,01,0135,0120,0175,0,
+ /* 5602 */ 0261,03,01,01,0134,0120,0177,0,
+ /* 5610 */ 0260,03,01,01,0134,0110,0176,0,
+ /* 5618 */ 0261,03,05,01,0134,0120,0177,0,
+ /* 5626 */ 0260,03,05,01,0134,0110,0176,0,
+ /* 5634 */ 0261,03,021,01,0134,0130,0176,0,
+ /* 5642 */ 0260,03,021,01,0134,0120,0175,0,
+ /* 5650 */ 0261,03,025,01,0134,0130,0176,0,
+ /* 5658 */ 0260,03,025,01,0134,0120,0175,0,
+ /* 5666 */ 0261,03,01,01,0137,0120,0177,0,
+ /* 5674 */ 0260,03,01,01,0137,0110,0176,0,
+ /* 5682 */ 0261,03,05,01,0137,0120,0177,0,
+ /* 5690 */ 0260,03,05,01,0137,0110,0176,0,
+ /* 5698 */ 0261,03,021,01,0137,0130,0176,0,
+ /* 5706 */ 0260,03,021,01,0137,0120,0175,0,
+ /* 5714 */ 0261,03,025,01,0137,0130,0176,0,
+ /* 5722 */ 0260,03,025,01,0137,0120,0175,0,
+ /* 5730 */ 0261,03,01,01,0136,0120,0177,0,
+ /* 5738 */ 0260,03,01,01,0136,0110,0176,0,
+ /* 5746 */ 0261,03,05,01,0136,0120,0177,0,
+ /* 5754 */ 0260,03,05,01,0136,0110,0176,0,
+ /* 5762 */ 0261,03,021,01,0136,0130,0176,0,
+ /* 5770 */ 0260,03,021,01,0136,0120,0175,0,
+ /* 5778 */ 0261,03,025,01,0136,0130,0176,0,
+ /* 5786 */ 0260,03,025,01,0136,0120,0175,0,
+ /* 5794 */ 0261,03,01,01,0155,0120,0177,0,
+ /* 5802 */ 0260,03,01,01,0155,0110,0176,0,
+ /* 5810 */ 0261,03,05,01,0155,0120,0177,0,
+ /* 5818 */ 0260,03,05,01,0155,0110,0176,0,
+ /* 5826 */ 0261,03,021,01,0155,0130,0176,0,
+ /* 5834 */ 0260,03,021,01,0155,0120,0175,0,
+ /* 5842 */ 0261,03,025,01,0155,0130,0176,0,
+ /* 5850 */ 0260,03,025,01,0155,0120,0175,0,
+ /* 5858 */ 0261,03,01,01,0154,0120,0177,0,
+ /* 5866 */ 0260,03,01,01,0154,0110,0176,0,
+ /* 5874 */ 0261,03,05,01,0154,0120,0177,0,
+ /* 5882 */ 0260,03,05,01,0154,0110,0176,0,
+ /* 5890 */ 0261,03,021,01,0154,0130,0176,0,
+ /* 5898 */ 0260,03,021,01,0154,0120,0175,0,
+ /* 5906 */ 0261,03,025,01,0154,0130,0176,0,
+ /* 5914 */ 0260,03,025,01,0154,0120,0175,0,
+ /* 5922 */ 0261,03,01,01,0157,0120,0177,0,
+ /* 5930 */ 0260,03,01,01,0157,0110,0176,0,
+ /* 5938 */ 0261,03,021,01,0157,0130,0176,0,
+ /* 5946 */ 0260,03,021,01,0157,0120,0175,0,
+ /* 5954 */ 0261,03,01,01,0156,0120,0177,0,
+ /* 5962 */ 0260,03,01,01,0156,0110,0176,0,
+ /* 5970 */ 0261,03,021,01,0156,0130,0176,0,
+ /* 5978 */ 0260,03,021,01,0156,0120,0175,0,
+ /* 5986 */ 0261,03,01,01,0171,0120,0177,0,
+ /* 5994 */ 0260,03,01,01,0171,0110,0176,0,
+ /* 6002 */ 0261,03,05,01,0171,0120,0177,0,
+ /* 6010 */ 0260,03,05,01,0171,0110,0176,0,
+ /* 6018 */ 0261,03,021,01,0171,0130,0176,0,
+ /* 6026 */ 0260,03,021,01,0171,0120,0175,0,
+ /* 6034 */ 0261,03,025,01,0171,0130,0176,0,
+ /* 6042 */ 0260,03,025,01,0171,0120,0175,0,
+ /* 6050 */ 0261,03,01,01,0170,0120,0177,0,
+ /* 6058 */ 0260,03,01,01,0170,0110,0176,0,
+ /* 6066 */ 0261,03,05,01,0170,0120,0177,0,
+ /* 6074 */ 0260,03,05,01,0170,0110,0176,0,
+ /* 6082 */ 0261,03,021,01,0170,0130,0176,0,
+ /* 6090 */ 0260,03,021,01,0170,0120,0175,0,
+ /* 6098 */ 0261,03,025,01,0170,0130,0176,0,
+ /* 6106 */ 0260,03,025,01,0170,0120,0175,0,
+ /* 6114 */ 0261,03,01,01,0173,0120,0177,0,
+ /* 6122 */ 0260,03,01,01,0173,0110,0176,0,
+ /* 6130 */ 0261,03,021,01,0173,0130,0176,0,
+ /* 6138 */ 0260,03,021,01,0173,0120,0175,0,
+ /* 6146 */ 0261,03,01,01,0172,0120,0177,0,
+ /* 6154 */ 0260,03,01,01,0172,0110,0176,0,
+ /* 6162 */ 0261,03,021,01,0172,0130,0176,0,
+ /* 6170 */ 0260,03,021,01,0172,0120,0175,0,
+ /* 6178 */ 0261,03,01,01,0175,0120,0177,0,
+ /* 6186 */ 0260,03,01,01,0175,0110,0176,0,
+ /* 6194 */ 0261,03,05,01,0175,0120,0177,0,
+ /* 6202 */ 0260,03,05,01,0175,0110,0176,0,
+ /* 6210 */ 0261,03,021,01,0175,0130,0176,0,
+ /* 6218 */ 0260,03,021,01,0175,0120,0175,0,
+ /* 6226 */ 0261,03,025,01,0175,0130,0176,0,
+ /* 6234 */ 0260,03,025,01,0175,0120,0175,0,
+ /* 6242 */ 0261,03,01,01,0174,0120,0177,0,
+ /* 6250 */ 0260,03,01,01,0174,0110,0176,0,
+ /* 6258 */ 0261,03,05,01,0174,0120,0177,0,
+ /* 6266 */ 0260,03,05,01,0174,0110,0176,0,
+ /* 6274 */ 0261,03,021,01,0174,0130,0176,0,
+ /* 6282 */ 0260,03,021,01,0174,0120,0175,0,
+ /* 6290 */ 0261,03,025,01,0174,0130,0176,0,
+ /* 6298 */ 0260,03,025,01,0174,0120,0175,0,
+ /* 6306 */ 0261,03,01,01,0177,0120,0177,0,
+ /* 6314 */ 0260,03,01,01,0177,0110,0176,0,
+ /* 6322 */ 0261,03,021,01,0177,0130,0176,0,
+ /* 6330 */ 0260,03,021,01,0177,0120,0175,0,
+ /* 6338 */ 0261,03,01,01,0176,0120,0177,0,
+ /* 6346 */ 0260,03,01,01,0176,0110,0176,0,
+ /* 6354 */ 0261,03,021,01,0176,0130,0176,0,
+ /* 6362 */ 0260,03,021,01,0176,0120,0175,0,
+ /* 6370 */ 0261,0110,0,01,0242,0120,0177,0,
+ /* 6378 */ 0260,0110,0,01,0242,0110,0176,0,
+ /* 6386 */ 0261,0110,04,01,0242,0120,0177,0,
+ /* 6394 */ 0260,0110,04,01,0242,0110,0176,0,
+ /* 6402 */ 0261,0110,020,01,0242,0130,0176,0,
+ /* 6410 */ 0260,0110,020,01,0242,0120,0175,0,
+ /* 6418 */ 0261,0110,024,01,0242,0130,0176,0,
+ /* 6426 */ 0260,0110,024,01,0242,0120,0175,0,
+ /* 6434 */ 0261,0110,0,01,0314,0120,023,0,
+ /* 6442 */ 0260,0110,0,01,0314,0110,022,0,
+ /* 6450 */ 0261,0110,0,01,0316,0120,023,0,
+ /* 6458 */ 0260,0110,0,01,0316,0110,022,0,
+ /* 6466 */ 0261,0110,0,01,0317,0120,023,0,
+ /* 6474 */ 0260,0110,0,01,0317,0110,022,0,
+ /* 6482 */ 0261,0110,0,01,0354,0120,023,0,
+ /* 6490 */ 0260,0110,0,01,0354,0110,022,0,
+ /* 6498 */ 0261,0110,0,01,0356,0120,023,0,
+ /* 6506 */ 0260,0110,0,01,0356,0110,022,0,
+ /* 6514 */ 0261,0110,0,01,0357,0120,023,0,
+ /* 6522 */ 0260,0110,0,01,0357,0110,022,0,
+ /* 6530 */ 0261,0110,0,01,0355,0120,023,0,
+ /* 6538 */ 0260,0110,0,01,0355,0110,022,0,
+ /* 6546 */ 0261,0110,0,01,0315,0120,023,0,
+ /* 6554 */ 0260,0110,0,01,0315,0110,022,0,
+ /* 6562 */ 0261,0110,0,01,0236,0120,0177,0,
+ /* 6570 */ 0260,0110,0,01,0236,0110,0176,0,
+ /* 6578 */ 0261,0110,0,01,0237,0120,0177,0,
+ /* 6586 */ 0260,0110,0,01,0237,0110,0176,0,
+ /* 6594 */ 0261,0110,0,01,0227,0120,0177,0,
+ /* 6602 */ 0260,0110,0,01,0227,0110,0176,0,
+ /* 6610 */ 0261,0110,0,01,0216,0120,0177,0,
+ /* 6618 */ 0260,0110,0,01,0216,0110,0176,0,
+ /* 6626 */ 0261,0110,0,01,0217,0120,0177,0,
+ /* 6634 */ 0260,0110,0,01,0217,0110,0176,0,
+ /* 6642 */ 0261,0110,0,01,0207,0120,0177,0,
+ /* 6650 */ 0260,0110,0,01,0207,0110,0176,0,
+ /* 6658 */ 0261,0110,0,01,0206,0120,0177,0,
+ /* 6666 */ 0260,0110,0,01,0206,0110,0176,0,
+ /* 6674 */ 0261,0110,0,01,0205,0120,0177,0,
+ /* 6682 */ 0260,0110,0,01,0205,0110,0176,0,
+ /* 6690 */ 0261,0110,0,01,0226,0120,0177,0,
+ /* 6698 */ 0260,0110,0,01,0226,0110,0176,0,
+ /* 6706 */ 0261,0110,0,01,0225,0120,0177,0,
+ /* 6714 */ 0260,0110,0,01,0225,0110,0176,0,
+ /* 6722 */ 0261,0110,0,01,0246,0120,0177,0,
+ /* 6730 */ 0260,0110,0,01,0246,0110,0176,0,
+ /* 6738 */ 0261,0110,0,01,0266,0120,0177,0,
+ /* 6746 */ 0260,0110,0,01,0266,0110,0176,0,
+ /* 6754 */ 0261,0110,020,01,0243,0130,0176,0,
+ /* 6762 */ 0260,0110,020,01,0243,0120,0175,0,
+ /* 6770 */ 0261,0110,0,01,0243,0120,0177,0,
+ /* 6778 */ 0260,0110,0,01,0243,0110,0176,0,
+ /* 6786 */ 0270,0110,0,01,0300,0110,022,0,
+ /* 6794 */ 0270,0110,0,01,0300,0100,021,0,
+ /* 6802 */ 0270,0110,0,01,0302,0110,022,0,
+ /* 6810 */ 0270,0110,0,01,0302,0100,021,0,
+ /* 6818 */ 0270,0110,0,01,0303,0110,022,0,
+ /* 6826 */ 0270,0110,0,01,0303,0100,021,0,
+ /* 6834 */ 0270,0110,0,01,0301,0110,022,0,
+ /* 6842 */ 0270,0110,0,01,0301,0100,021,0,
+ /* 6850 */ 0261,03,045,01,0102,0120,023,0,
+ /* 6858 */ 0260,03,045,01,0102,0110,022,0,
+ /* 6866 */ 0261,03,045,01,017,0120,023,0,
+ /* 6874 */ 0260,03,045,01,017,0110,022,0,
+ /* 6882 */ 0261,03,045,01,0114,0120,0177,0,
+ /* 6890 */ 0260,03,045,01,0114,0110,0176,0,
+ /* 6898 */ 0261,03,045,01,016,0120,023,0,
+ /* 6906 */ 0260,03,045,01,016,0110,022,0,
+ /* 6914 */ 0270,01,045,01,0160,0110,022,0,
+ /* 6922 */ 0270,01,046,01,0160,0110,022,0,
+ /* 6930 */ 0270,01,047,01,0160,0110,022,0,
+ /* 6938 */ 0260,01,045,01,0163,0217,022,0,
+ /* 6946 */ 0260,01,045,01,0163,0207,021,0,
+ /* 6954 */ 0260,01,045,01,0161,0216,022,0,
+ /* 6962 */ 0260,01,045,01,0161,0206,021,0,
+ /* 6970 */ 0260,01,045,01,0162,0216,022,0,
+ /* 6978 */ 0260,01,045,01,0162,0206,021,0,
+ /* 6986 */ 0260,01,045,01,0163,0216,022,0,
+ /* 6994 */ 0260,01,045,01,0163,0206,021,0,
+ /* 7002 */ 0260,01,045,01,0161,0214,022,0,
+ /* 7010 */ 0260,01,045,01,0161,0204,021,0,
+ /* 7018 */ 0260,01,045,01,0162,0214,022,0,
+ /* 7026 */ 0260,01,045,01,0162,0204,021,0,
+ /* 7034 */ 0260,01,045,01,0163,0213,022,0,
+ /* 7042 */ 0260,01,045,01,0163,0203,021,0,
+ /* 7050 */ 0260,01,045,01,0161,0212,022,0,
+ /* 7058 */ 0260,01,045,01,0161,0202,021,0,
+ /* 7066 */ 0260,01,045,01,0162,0212,022,0,
+ /* 7074 */ 0260,01,045,01,0162,0202,021,0,
+ /* 7082 */ 0260,01,045,01,0163,0212,022,0,
+ /* 7090 */ 0260,01,045,01,0163,0202,021,0,
+ /* 7098 */ 0261,03,01,01,02,0120,023,0,
+ /* 7106 */ 0260,03,01,01,02,0110,022,0,
+ /* 7114 */ 0261,03,05,01,02,0120,023,0,
+ /* 7122 */ 0260,03,05,01,02,0110,022,0,
+ /* 7130 */ 0270,03,025,01,01,0110,022,0,
+ /* 7138 */ 0270,03,025,01,0,0110,022,0,
+ /* 7146 */ 0261,03,05,01,0106,0120,023,0,
+ /* 7154 */ 0270,03,05,01,071,0101,022,0,
+ /* 7162 */ 0261,03,05,01,070,0120,023,0,
+ /* 7170 */ 0260,03,05,01,070,0110,022,0,
+ /* 7178 */ 0374,0262,02,021,01,0222,0110,0,
+ /* 7186 */ 0374,0262,02,021,01,0223,0110,0,
+ /* 7194 */ 0374,0262,02,025,01,0222,0110,0,
+ /* 7202 */ 0375,0262,02,025,01,0222,0110,0,
+ /* 7210 */ 0374,0262,02,01,01,0222,0110,0,
+ /* 7218 */ 0374,0262,02,01,01,0223,0110,0,
+ /* 7226 */ 0375,0262,02,05,01,0222,0110,0,
+ /* 7234 */ 0375,0262,02,05,01,0223,0110,0,
+ /* 7242 */ 0374,0262,02,01,01,0220,0110,0,
+ /* 7250 */ 0374,0262,02,01,01,0221,0110,0,
+ /* 7258 */ 0375,0262,02,05,01,0220,0110,0,
+ /* 7266 */ 0375,0262,02,05,01,0221,0110,0,
+ /* 7274 */ 0374,0262,02,021,01,0220,0110,0,
+ /* 7282 */ 0374,0262,02,021,01,0221,0110,0,
+ /* 7290 */ 0374,0262,02,025,01,0220,0110,0,
+ /* 7298 */ 0375,0262,02,025,01,0221,0110,0,
+ /* 7306 */ 0270,03,03,01,0360,0110,022,0,
+ /* 7314 */ 0270,03,023,01,0360,0110,022,0,
+ /* 7322 */ 0273,0320,01,0203,0202,0275,0,
+ /* 7329 */ 0273,0321,01,0203,0202,0275,0,
+ /* 7336 */ 0273,0324,01,0203,0202,0275,0,
+ /* 7343 */ 0273,0320,0145,0201,0202,0141,0,
+ /* 7350 */ 0273,0321,0155,0201,0202,0151,0,
+ /* 7357 */ 0273,0324,0155,0201,0202,0251,0,
+ /* 7364 */ 0273,0320,01,0203,0200,0275,0,
+ /* 7371 */ 0273,0321,01,0203,0200,0275,0,
+ /* 7378 */ 0273,0324,01,0203,0200,0275,0,
+ /* 7385 */ 0273,0320,0145,0201,0200,0141,0,
+ /* 7392 */ 0273,0321,0155,0201,0200,0151,0,
+ /* 7399 */ 0273,0324,0155,0201,0200,0251,0,
+ /* 7406 */ 0273,0320,01,0203,0204,0275,0,
+ /* 7413 */ 0273,0321,01,0203,0204,0275,0,
+ /* 7420 */ 0273,0324,01,0203,0204,0275,0,
+ /* 7427 */ 0273,0320,0145,0201,0204,0141,0,
+ /* 7434 */ 0273,0321,0155,0201,0204,0151,0,
+ /* 7441 */ 0273,0324,0155,0201,0204,0251,0,
+ /* 7448 */ 0320,02,017,0272,0204,025,0,
+ /* 7455 */ 0321,02,017,0272,0204,025,0,
+ /* 7462 */ 0324,02,017,0272,0204,025,0,
+ /* 7469 */ 0273,0320,02,017,0273,0101,0,
+ /* 7476 */ 0273,0321,02,017,0273,0101,0,
+ /* 7483 */ 0273,0324,02,017,0273,0101,0,
+ /* 7490 */ 0273,0320,02,017,0263,0101,0,
+ /* 7497 */ 0273,0321,02,017,0263,0101,0,
+ /* 7504 */ 0273,0324,02,017,0263,0101,0,
+ /* 7511 */ 0273,0320,02,017,0253,0101,0,
+ /* 7518 */ 0273,0321,02,017,0253,0101,0,
+ /* 7525 */ 0273,0324,02,017,0253,0101,0,
+ /* 7532 */ 0273,0320,02,017,0261,0101,0,
+ /* 7539 */ 0273,0321,02,017,0261,0101,0,
+ /* 7546 */ 0273,0324,02,017,0261,0101,0,
+ /* 7553 */ 0361,03,017,070,0202,0110,0,
+ /* 7560 */ 0323,0313,03,017,01,0337,0,
+ /* 7567 */ 0320,0323,02,017,02,0110,0,
+ /* 7574 */ 0321,0323,02,017,02,0110,0,
+ /* 7581 */ 0320,0323,02,017,03,0110,0,
+ /* 7588 */ 0321,0323,02,017,03,0110,0,
+ /* 7595 */ 0271,0320,01,0307,0200,031,0,
+ /* 7602 */ 0271,0321,01,0307,0200,041,0,
+ /* 7609 */ 0271,0324,01,0307,0200,0255,0,
+ /* 7616 */ 0360,0324,02,017,0156,0110,0,
+ /* 7623 */ 0360,0324,02,017,0176,0101,0,
+ /* 7630 */ 0273,0320,01,0203,0201,0275,0,
+ /* 7637 */ 0273,0321,01,0203,0201,0275,0,
+ /* 7644 */ 0273,0324,01,0203,0201,0275,0,
+ /* 7651 */ 0273,0320,0145,0201,0201,0141,0,
+ /* 7658 */ 0273,0321,0155,0201,0201,0151,0,
+ /* 7665 */ 0273,0324,0155,0201,0201,0251,0,
+ /* 7672 */ 0360,0323,02,017,0153,0110,0,
+ /* 7679 */ 0360,0323,02,017,0143,0110,0,
+ /* 7686 */ 0360,0323,02,017,0147,0110,0,
+ /* 7693 */ 0360,0323,02,017,0374,0110,0,
+ /* 7700 */ 0360,0323,02,017,0376,0110,0,
+ /* 7707 */ 0360,0323,02,017,0354,0110,0,
+ /* 7714 */ 0360,0323,02,017,0355,0110,0,
+ /* 7721 */ 0360,0323,02,017,0334,0110,0,
+ /* 7728 */ 0360,0323,02,017,0335,0110,0,
+ /* 7735 */ 0360,0323,02,017,0375,0110,0,
+ /* 7742 */ 0360,0323,02,017,0333,0110,0,
+ /* 7749 */ 0360,0323,02,017,0337,0110,0,
+ /* 7756 */ 0360,0323,02,017,0164,0110,0,
+ /* 7763 */ 0360,0323,02,017,0166,0110,0,
+ /* 7770 */ 0360,0323,02,017,0165,0110,0,
+ /* 7777 */ 0360,0323,02,017,0144,0110,0,
+ /* 7784 */ 0360,0323,02,017,0146,0110,0,
+ /* 7791 */ 0360,0323,02,017,0145,0110,0,
+ /* 7798 */ 0360,0323,02,017,0365,0110,0,
+ /* 7805 */ 0360,0323,02,017,0345,0110,0,
+ /* 7812 */ 0360,0323,02,017,0325,0110,0,
+ /* 7819 */ 0360,0323,02,017,0353,0110,0,
+ /* 7826 */ 0360,0323,02,017,0362,0110,0,
+ /* 7833 */ 0360,02,017,0162,0206,025,0,
+ /* 7840 */ 0360,0323,02,017,0363,0110,0,
+ /* 7847 */ 0360,02,017,0163,0206,025,0,
+ /* 7854 */ 0360,0323,02,017,0361,0110,0,
+ /* 7861 */ 0360,02,017,0161,0206,025,0,
+ /* 7868 */ 0360,0323,02,017,0342,0110,0,
+ /* 7875 */ 0360,02,017,0162,0204,025,0,
+ /* 7882 */ 0360,0323,02,017,0341,0110,0,
+ /* 7889 */ 0360,02,017,0161,0204,025,0,
+ /* 7896 */ 0360,0323,02,017,0322,0110,0,
+ /* 7903 */ 0360,02,017,0162,0202,025,0,
+ /* 7910 */ 0360,0323,02,017,0323,0110,0,
+ /* 7917 */ 0360,02,017,0163,0202,025,0,
+ /* 7924 */ 0360,0323,02,017,0321,0110,0,
+ /* 7931 */ 0360,02,017,0161,0202,025,0,
+ /* 7938 */ 0360,0323,02,017,0370,0110,0,
+ /* 7945 */ 0360,0323,02,017,0372,0110,0,
+ /* 7952 */ 0360,0323,02,017,0350,0110,0,
+ /* 7959 */ 0360,0323,02,017,0351,0110,0,
+ /* 7966 */ 0360,0323,02,017,0330,0110,0,
+ /* 7973 */ 0360,0323,02,017,0331,0110,0,
+ /* 7980 */ 0360,0323,02,017,0371,0110,0,
+ /* 7987 */ 0360,0323,02,017,0150,0110,0,
+ /* 7994 */ 0360,0323,02,017,0152,0110,0,
+ /* 8001 */ 0360,0323,02,017,0151,0110,0,
+ /* 8008 */ 0360,0323,02,017,0140,0110,0,
+ /* 8015 */ 0360,0323,02,017,0142,0110,0,
+ /* 8022 */ 0360,0323,02,017,0141,0110,0,
+ /* 8029 */ 0360,0323,02,017,0357,0110,0,
+ /* 8036 */ 0273,0320,01,0203,0203,0275,0,
+ /* 8043 */ 0273,0321,01,0203,0203,0275,0,
+ /* 8050 */ 0273,0324,01,0203,0203,0275,0,
+ /* 8057 */ 0273,0320,0145,0201,0203,0141,0,
+ /* 8064 */ 0273,0321,0155,0201,0203,0151,0,
+ /* 8071 */ 0273,0324,0155,0201,0203,0251,0,
+ /* 8078 */ 0320,02,017,0244,0101,026,0,
+ /* 8085 */ 0321,02,017,0244,0101,026,0,
+ /* 8092 */ 0324,02,017,0244,0101,026,0,
+ /* 8099 */ 0320,02,017,0254,0101,026,0,
+ /* 8106 */ 0321,02,017,0254,0101,026,0,
+ /* 8113 */ 0324,02,017,0254,0101,026,0,
+ /* 8120 */ 0273,0320,01,0203,0205,0275,0,
+ /* 8127 */ 0273,0321,01,0203,0205,0275,0,
+ /* 8134 */ 0273,0324,01,0203,0205,0275,0,
+ /* 8141 */ 0273,0320,0145,0201,0205,0141,0,
+ /* 8148 */ 0273,0321,0155,0201,0205,0151,0,
+ /* 8155 */ 0273,0324,0155,0201,0205,0251,0,
+ /* 8162 */ 0360,0320,02,017,021,0101,0,
+ /* 8169 */ 0360,0321,02,017,021,0101,0,
+ /* 8176 */ 0360,0320,02,017,023,0110,0,
+ /* 8183 */ 0360,0321,02,017,023,0110,0,
+ /* 8190 */ 0273,0320,02,017,0301,0101,0,
+ /* 8197 */ 0273,0321,02,017,0301,0101,0,
+ /* 8204 */ 0273,0324,02,017,0301,0101,0,
+ /* 8211 */ 0273,0320,01,0203,0206,0275,0,
+ /* 8218 */ 0273,0321,01,0203,0206,0275,0,
+ /* 8225 */ 0273,0324,01,0203,0206,0275,0,
+ /* 8232 */ 0273,0320,0145,0201,0206,0141,0,
+ /* 8239 */ 0273,0321,0155,0201,0206,0151,0,
+ /* 8246 */ 0273,0324,0155,0201,0206,0251,0,
+ /* 8253 */ 0320,01,017,0330,0100,0110,0,
+ /* 8260 */ 0321,01,017,0330,0100,0110,0,
+ /* 8267 */ 0324,01,017,0330,0100,0110,0,
+ /* 8274 */ 0322,01,017,0330,0200,064,0,
+ /* 8281 */ 0320,01,017,0330,0200,064,0,
+ /* 8288 */ 0321,01,017,0330,0200,064,0,
+ /* 8295 */ 0330,0161,0373,01,0351,064,0,
+ /* 8302 */ 0360,02,017,0302,0110,026,0,
+ /* 8309 */ 0363,02,017,0302,0110,026,0,
+ /* 8316 */ 0324,0363,02,017,052,0110,0,
+ /* 8323 */ 0324,0363,02,017,055,0110,0,
+ /* 8330 */ 0324,0363,02,017,054,0110,0,
+ /* 8337 */ 0360,0324,02,017,0120,0110,0,
+ /* 8344 */ 0360,02,017,0306,0110,026,0,
+ /* 8351 */ 0360,0323,02,017,0340,0110,0,
+ /* 8358 */ 0360,0323,02,017,0343,0110,0,
+ /* 8365 */ 0360,02,017,0305,0110,026,0,
+ /* 8372 */ 0360,02,017,0304,0110,026,0,
+ /* 8379 */ 0360,0323,02,017,0356,0110,0,
+ /* 8386 */ 0360,0323,02,017,0336,0110,0,
+ /* 8393 */ 0360,0323,02,017,0352,0110,0,
+ /* 8400 */ 0360,0323,02,017,0332,0110,0,
+ /* 8407 */ 0360,0323,02,017,0344,0110,0,
+ /* 8414 */ 0360,0323,02,017,0366,0110,0,
+ /* 8421 */ 0324,0360,02,017,0303,0101,0,
+ /* 8428 */ 0361,0317,02,017,0176,0101,0,
+ /* 8435 */ 0361,0317,02,017,0156,0110,0,
+ /* 8442 */ 0361,0324,02,017,0156,0110,0,
+ /* 8449 */ 0361,0324,02,017,0176,0101,0,
+ /* 8456 */ 0361,02,017,0305,0110,026,0,
+ /* 8463 */ 0361,02,017,0304,0110,026,0,
+ /* 8470 */ 0360,0323,02,017,0364,0110,0,
+ /* 8477 */ 0361,02,017,0160,0110,022,0,
+ /* 8484 */ 0363,02,017,0160,0110,022,0,
+ /* 8491 */ 0362,02,017,0160,0110,022,0,
+ /* 8498 */ 0361,02,017,0163,0207,025,0,
+ /* 8505 */ 0361,02,017,0161,0206,025,0,
+ /* 8512 */ 0361,02,017,0162,0206,025,0,
+ /* 8519 */ 0361,02,017,0163,0206,025,0,
+ /* 8526 */ 0361,02,017,0161,0204,025,0,
+ /* 8533 */ 0361,02,017,0162,0204,025,0,
+ /* 8540 */ 0361,02,017,0163,0203,025,0,
+ /* 8547 */ 0361,02,017,0161,0202,025,0,
+ /* 8554 */ 0361,02,017,0162,0202,025,0,
+ /* 8561 */ 0361,02,017,0163,0202,025,0,
+ /* 8568 */ 0360,0323,02,017,0373,0110,0,
+ /* 8575 */ 0361,02,017,0302,0110,026,0,
+ /* 8582 */ 0362,02,017,0302,0110,026,0,
+ /* 8589 */ 0324,0362,02,017,055,0110,0,
+ /* 8596 */ 0324,0362,02,017,052,0110,0,
+ /* 8603 */ 0324,0362,02,017,054,0110,0,
+ /* 8610 */ 0361,0324,02,017,0120,0110,0,
+ /* 8617 */ 0361,02,017,0306,0110,026,0,
+ /* 8624 */ 0323,0360,02,017,0170,0101,0,
+ /* 8631 */ 0323,0360,02,017,0171,0110,0,
+ /* 8638 */ 0360,03,017,070,034,0110,0,
+ /* 8645 */ 0361,03,017,070,034,0110,0,
+ /* 8652 */ 0360,03,017,070,035,0110,0,
+ /* 8659 */ 0361,03,017,070,035,0110,0,
+ /* 8666 */ 0360,03,017,070,036,0110,0,
+ /* 8673 */ 0361,03,017,070,036,0110,0,
+ /* 8680 */ 0360,03,017,070,01,0110,0,
+ /* 8687 */ 0361,03,017,070,01,0110,0,
+ /* 8694 */ 0360,03,017,070,02,0110,0,
+ /* 8701 */ 0361,03,017,070,02,0110,0,
+ /* 8708 */ 0360,03,017,070,03,0110,0,
+ /* 8715 */ 0361,03,017,070,03,0110,0,
+ /* 8722 */ 0360,03,017,070,05,0110,0,
+ /* 8729 */ 0361,03,017,070,05,0110,0,
+ /* 8736 */ 0360,03,017,070,06,0110,0,
+ /* 8743 */ 0361,03,017,070,06,0110,0,
+ /* 8750 */ 0360,03,017,070,07,0110,0,
+ /* 8757 */ 0361,03,017,070,07,0110,0,
+ /* 8764 */ 0360,03,017,070,04,0110,0,
+ /* 8771 */ 0361,03,017,070,04,0110,0,
+ /* 8778 */ 0360,03,017,070,013,0110,0,
+ /* 8785 */ 0361,03,017,070,013,0110,0,
+ /* 8792 */ 0360,03,017,070,0,0110,0,
+ /* 8799 */ 0361,03,017,070,0,0110,0,
+ /* 8806 */ 0360,03,017,070,010,0110,0,
+ /* 8813 */ 0361,03,017,070,010,0110,0,
+ /* 8820 */ 0360,03,017,070,011,0110,0,
+ /* 8827 */ 0361,03,017,070,011,0110,0,
+ /* 8834 */ 0360,03,017,070,012,0110,0,
+ /* 8841 */ 0361,03,017,070,012,0110,0,
+ /* 8848 */ 0320,0333,02,017,0275,0110,0,
+ /* 8855 */ 0321,0333,02,017,0275,0110,0,
+ /* 8862 */ 0324,0333,02,017,0275,0110,0,
+ /* 8869 */ 0361,03,017,070,025,0110,0,
+ /* 8876 */ 0361,03,017,070,024,0110,0,
+ /* 8883 */ 0361,03,017,070,052,0110,0,
+ /* 8890 */ 0361,03,017,070,053,0110,0,
+ /* 8897 */ 0361,03,017,070,020,0110,0,
+ /* 8904 */ 0361,03,017,070,051,0110,0,
+ /* 8911 */ 0361,03,017,070,0101,0110,0,
+ /* 8918 */ 0361,03,017,070,074,0110,0,
+ /* 8925 */ 0361,03,017,070,075,0110,0,
+ /* 8932 */ 0361,03,017,070,077,0110,0,
+ /* 8939 */ 0361,03,017,070,076,0110,0,
+ /* 8946 */ 0361,03,017,070,070,0110,0,
+ /* 8953 */ 0361,03,017,070,071,0110,0,
+ /* 8960 */ 0361,03,017,070,073,0110,0,
+ /* 8967 */ 0361,03,017,070,072,0110,0,
+ /* 8974 */ 0361,03,017,070,040,0110,0,
+ /* 8981 */ 0361,03,017,070,041,0110,0,
+ /* 8988 */ 0361,03,017,070,042,0110,0,
+ /* 8995 */ 0361,03,017,070,043,0110,0,
+ /* 9002 */ 0361,03,017,070,044,0110,0,
+ /* 9009 */ 0361,03,017,070,045,0110,0,
+ /* 9016 */ 0361,03,017,070,060,0110,0,
+ /* 9023 */ 0361,03,017,070,061,0110,0,
+ /* 9030 */ 0361,03,017,070,062,0110,0,
+ /* 9037 */ 0361,03,017,070,063,0110,0,
+ /* 9044 */ 0361,03,017,070,064,0110,0,
+ /* 9051 */ 0361,03,017,070,065,0110,0,
+ /* 9058 */ 0361,03,017,070,050,0110,0,
+ /* 9065 */ 0361,03,017,070,0100,0110,0,
+ /* 9072 */ 0361,03,017,070,027,0110,0,
+ /* 9079 */ 0361,03,017,070,067,0110,0,
+ /* 9086 */ 0320,0333,02,017,0270,0110,0,
+ /* 9093 */ 0321,0333,02,017,0270,0110,0,
+ /* 9100 */ 0324,0333,02,017,0270,0110,0,
+ /* 9107 */ 0320,03,017,070,0360,0110,0,
+ /* 9114 */ 0321,03,017,070,0360,0110,0,
+ /* 9121 */ 0324,03,017,070,0360,0110,0,
+ /* 9128 */ 0320,03,017,070,0361,0101,0,
+ /* 9135 */ 0321,03,017,070,0361,0101,0,
+ /* 9142 */ 0324,03,017,070,0361,0101,0,
+ /* 9149 */ 0361,03,017,070,0334,0110,0,
+ /* 9156 */ 0361,03,017,070,0335,0110,0,
+ /* 9163 */ 0361,03,017,070,0336,0110,0,
+ /* 9170 */ 0361,03,017,070,0337,0110,0,
+ /* 9177 */ 0361,03,017,070,0333,0110,0,
+ /* 9184 */ 0261,02,041,01,0334,0120,0,
+ /* 9191 */ 0260,02,041,01,0334,0110,0,
+ /* 9198 */ 0261,02,041,01,0335,0120,0,
+ /* 9205 */ 0260,02,041,01,0335,0110,0,
+ /* 9212 */ 0261,02,041,01,0336,0120,0,
+ /* 9219 */ 0260,02,041,01,0336,0110,0,
+ /* 9226 */ 0261,02,041,01,0337,0120,0,
+ /* 9233 */ 0260,02,041,01,0337,0110,0,
+ /* 9240 */ 0270,02,041,01,0333,0110,0,
+ /* 9247 */ 0261,01,041,01,0130,0120,0,
+ /* 9254 */ 0260,01,041,01,0130,0110,0,
+ /* 9261 */ 0261,01,045,01,0130,0120,0,
+ /* 9268 */ 0260,01,045,01,0130,0110,0,
+ /* 9275 */ 0261,01,040,01,0130,0120,0,
+ /* 9282 */ 0260,01,040,01,0130,0110,0,
+ /* 9289 */ 0261,01,044,01,0130,0120,0,
+ /* 9296 */ 0260,01,044,01,0130,0110,0,
+ /* 9303 */ 0261,01,053,01,0130,0120,0,
+ /* 9310 */ 0260,01,053,01,0130,0110,0,
+ /* 9317 */ 0261,01,052,01,0130,0120,0,
+ /* 9324 */ 0260,01,052,01,0130,0110,0,
+ /* 9331 */ 0261,01,041,01,0320,0120,0,
+ /* 9338 */ 0260,01,041,01,0320,0110,0,
+ /* 9345 */ 0261,01,045,01,0320,0120,0,
+ /* 9352 */ 0260,01,045,01,0320,0110,0,
+ /* 9359 */ 0261,01,043,01,0320,0120,0,
+ /* 9366 */ 0260,01,043,01,0320,0110,0,
+ /* 9373 */ 0261,01,047,01,0320,0120,0,
+ /* 9380 */ 0260,01,047,01,0320,0110,0,
+ /* 9387 */ 0261,01,041,01,0124,0120,0,
+ /* 9394 */ 0260,01,041,01,0124,0110,0,
+ /* 9401 */ 0261,01,045,01,0124,0120,0,
+ /* 9408 */ 0260,01,045,01,0124,0110,0,
+ /* 9415 */ 0261,01,040,01,0124,0120,0,
+ /* 9422 */ 0260,01,040,01,0124,0110,0,
+ /* 9429 */ 0261,01,044,01,0124,0120,0,
+ /* 9436 */ 0260,01,044,01,0124,0110,0,
+ /* 9443 */ 0261,01,041,01,0125,0120,0,
+ /* 9450 */ 0260,01,041,01,0125,0110,0,
+ /* 9457 */ 0261,01,045,01,0125,0120,0,
+ /* 9464 */ 0260,01,045,01,0125,0110,0,
+ /* 9471 */ 0261,01,040,01,0125,0120,0,
+ /* 9478 */ 0260,01,040,01,0125,0110,0,
+ /* 9485 */ 0261,01,044,01,0125,0120,0,
+ /* 9492 */ 0260,01,044,01,0125,0110,0,
+ /* 9499 */ 0270,02,01,01,030,0110,0,
+ /* 9506 */ 0270,02,05,01,030,0110,0,
+ /* 9513 */ 0270,02,05,01,031,0110,0,
+ /* 9520 */ 0270,02,05,01,032,0110,0,
+ /* 9527 */ 0270,01,051,01,057,0110,0,
+ /* 9534 */ 0270,01,050,01,057,0110,0,
+ /* 9541 */ 0270,01,042,01,0346,0110,0,
+ /* 9548 */ 0270,01,046,01,0346,0110,0,
+ /* 9555 */ 0270,01,040,01,0133,0110,0,
+ /* 9562 */ 0270,01,044,01,0133,0110,0,
+ /* 9569 */ 0270,01,043,01,0346,0110,0,
+ /* 9576 */ 0270,01,047,01,0346,0110,0,
+ /* 9583 */ 0270,01,041,01,0132,0110,0,
+ /* 9590 */ 0270,01,045,01,0132,0110,0,
+ /* 9597 */ 0270,01,041,01,0133,0110,0,
+ /* 9604 */ 0270,01,045,01,0133,0110,0,
+ /* 9611 */ 0270,01,040,01,0132,0110,0,
+ /* 9618 */ 0270,01,044,01,0132,0110,0,
+ /* 9625 */ 0270,01,013,01,055,0110,0,
+ /* 9632 */ 0270,01,033,01,055,0110,0,
+ /* 9639 */ 0261,01,053,01,0132,0120,0,
+ /* 9646 */ 0260,01,053,01,0132,0110,0,
+ /* 9653 */ 0261,01,013,01,052,0120,0,
+ /* 9660 */ 0260,01,013,01,052,0110,0,
+ /* 9667 */ 0261,01,033,01,052,0120,0,
+ /* 9674 */ 0260,01,033,01,052,0110,0,
+ /* 9681 */ 0261,01,012,01,052,0120,0,
+ /* 9688 */ 0260,01,012,01,052,0110,0,
+ /* 9695 */ 0261,01,032,01,052,0120,0,
+ /* 9702 */ 0260,01,032,01,052,0110,0,
+ /* 9709 */ 0261,01,052,01,0132,0120,0,
+ /* 9716 */ 0260,01,052,01,0132,0110,0,
+ /* 9723 */ 0270,01,012,01,055,0110,0,
+ /* 9730 */ 0270,01,032,01,055,0110,0,
+ /* 9737 */ 0270,01,041,01,0346,0110,0,
+ /* 9744 */ 0270,01,045,01,0346,0110,0,
+ /* 9751 */ 0270,01,042,01,0133,0110,0,
+ /* 9758 */ 0270,01,046,01,0133,0110,0,
+ /* 9765 */ 0270,01,013,01,054,0110,0,
+ /* 9772 */ 0270,01,033,01,054,0110,0,
+ /* 9779 */ 0270,01,012,01,054,0110,0,
+ /* 9786 */ 0270,01,032,01,054,0110,0,
+ /* 9793 */ 0261,01,041,01,0136,0120,0,
+ /* 9800 */ 0260,01,041,01,0136,0110,0,
+ /* 9807 */ 0261,01,045,01,0136,0120,0,
+ /* 9814 */ 0260,01,045,01,0136,0110,0,
+ /* 9821 */ 0261,01,040,01,0136,0120,0,
+ /* 9828 */ 0260,01,040,01,0136,0110,0,
+ /* 9835 */ 0261,01,044,01,0136,0120,0,
+ /* 9842 */ 0260,01,044,01,0136,0110,0,
+ /* 9849 */ 0261,01,053,01,0136,0120,0,
+ /* 9856 */ 0260,01,053,01,0136,0110,0,
+ /* 9863 */ 0261,01,052,01,0136,0120,0,
+ /* 9870 */ 0260,01,052,01,0136,0110,0,
+ /* 9877 */ 0261,01,041,01,0174,0120,0,
+ /* 9884 */ 0260,01,041,01,0174,0110,0,
+ /* 9891 */ 0261,01,045,01,0174,0120,0,
+ /* 9898 */ 0260,01,045,01,0174,0110,0,
+ /* 9905 */ 0261,01,043,01,0174,0120,0,
+ /* 9912 */ 0260,01,043,01,0174,0110,0,
+ /* 9919 */ 0261,01,047,01,0174,0120,0,
+ /* 9926 */ 0260,01,047,01,0174,0110,0,
+ /* 9933 */ 0261,01,041,01,0175,0120,0,
+ /* 9940 */ 0260,01,041,01,0175,0110,0,
+ /* 9947 */ 0261,01,045,01,0175,0120,0,
+ /* 9954 */ 0260,01,045,01,0175,0110,0,
+ /* 9961 */ 0261,01,043,01,0175,0120,0,
+ /* 9968 */ 0260,01,043,01,0175,0110,0,
+ /* 9975 */ 0261,01,047,01,0175,0120,0,
+ /* 9982 */ 0260,01,047,01,0175,0110,0,
+ /* 9989 */ 0270,01,043,01,0360,0110,0,
+ /* 9996 */ 0270,01,047,01,0360,0110,0,
+ /* 10003 */ 0270,01,040,01,0256,0202,0,
+ /* 10010 */ 0270,01,041,01,0367,0110,0,
+ /* 10017 */ 0261,02,01,01,054,0120,0,
+ /* 10024 */ 0261,02,05,01,054,0120,0,
+ /* 10031 */ 0261,02,01,01,056,0102,0,
+ /* 10038 */ 0261,02,05,01,056,0102,0,
+ /* 10045 */ 0261,02,01,01,055,0120,0,
+ /* 10052 */ 0261,02,05,01,055,0120,0,
+ /* 10059 */ 0261,02,01,01,057,0102,0,
+ /* 10066 */ 0261,02,05,01,057,0102,0,
+ /* 10073 */ 0261,01,041,01,0137,0120,0,
+ /* 10080 */ 0260,01,041,01,0137,0110,0,
+ /* 10087 */ 0261,01,045,01,0137,0120,0,
+ /* 10094 */ 0260,01,045,01,0137,0110,0,
+ /* 10101 */ 0261,01,040,01,0137,0120,0,
+ /* 10108 */ 0260,01,040,01,0137,0110,0,
+ /* 10115 */ 0261,01,044,01,0137,0120,0,
+ /* 10122 */ 0260,01,044,01,0137,0110,0,
+ /* 10129 */ 0261,01,053,01,0137,0120,0,
+ /* 10136 */ 0260,01,053,01,0137,0110,0,
+ /* 10143 */ 0261,01,052,01,0137,0120,0,
+ /* 10150 */ 0260,01,052,01,0137,0110,0,
+ /* 10157 */ 0261,01,041,01,0135,0120,0,
+ /* 10164 */ 0260,01,041,01,0135,0110,0,
+ /* 10171 */ 0261,01,045,01,0135,0120,0,
+ /* 10178 */ 0260,01,045,01,0135,0110,0,
+ /* 10185 */ 0261,01,040,01,0135,0120,0,
+ /* 10192 */ 0260,01,040,01,0135,0110,0,
+ /* 10199 */ 0261,01,044,01,0135,0120,0,
+ /* 10206 */ 0260,01,044,01,0135,0110,0,
+ /* 10213 */ 0261,01,053,01,0135,0120,0,
+ /* 10220 */ 0260,01,053,01,0135,0110,0,
+ /* 10227 */ 0261,01,052,01,0135,0120,0,
+ /* 10234 */ 0260,01,052,01,0135,0110,0,
+ /* 10241 */ 0270,01,041,01,050,0110,0,
+ /* 10248 */ 0270,01,041,01,051,0101,0,
+ /* 10255 */ 0270,01,045,01,050,0110,0,
+ /* 10262 */ 0270,01,045,01,051,0101,0,
+ /* 10269 */ 0270,01,040,01,050,0110,0,
+ /* 10276 */ 0270,01,040,01,051,0101,0,
+ /* 10283 */ 0270,01,044,01,050,0110,0,
+ /* 10290 */ 0270,01,044,01,051,0101,0,
+ /* 10297 */ 0270,01,01,01,0156,0110,0,
+ /* 10304 */ 0270,01,01,01,0176,0101,0,
+ /* 10311 */ 0270,01,042,01,0176,0110,0,
+ /* 10318 */ 0270,01,041,01,0326,0101,0,
+ /* 10325 */ 0270,01,021,01,0156,0110,0,
+ /* 10332 */ 0270,01,021,01,0176,0101,0,
+ /* 10339 */ 0270,01,043,01,022,0110,0,
+ /* 10346 */ 0270,01,047,01,022,0110,0,
+ /* 10353 */ 0270,01,041,01,0157,0110,0,
+ /* 10360 */ 0270,01,041,01,0177,0101,0,
+ /* 10367 */ 0270,01,045,01,0157,0110,0,
+ /* 10374 */ 0270,01,045,01,0177,0101,0,
+ /* 10381 */ 0270,01,042,01,0157,0110,0,
+ /* 10388 */ 0270,01,042,01,0177,0101,0,
+ /* 10395 */ 0270,01,046,01,0157,0110,0,
+ /* 10402 */ 0270,01,046,01,0177,0101,0,
+ /* 10409 */ 0261,01,040,01,022,0120,0,
+ /* 10416 */ 0260,01,040,01,022,0110,0,
+ /* 10423 */ 0261,01,041,01,026,0120,0,
+ /* 10430 */ 0260,01,041,01,026,0110,0,
+ /* 10437 */ 0270,01,041,01,027,0101,0,
+ /* 10444 */ 0261,01,040,01,026,0120,0,
+ /* 10451 */ 0260,01,040,01,026,0110,0,
+ /* 10458 */ 0270,01,040,01,027,0101,0,
+ /* 10465 */ 0261,01,041,01,022,0120,0,
+ /* 10472 */ 0260,01,041,01,022,0110,0,
+ /* 10479 */ 0270,01,041,01,023,0101,0,
+ /* 10486 */ 0270,01,040,01,023,0101,0,
+ /* 10493 */ 0270,01,041,01,0120,0110,0,
+ /* 10500 */ 0270,01,045,01,0120,0110,0,
+ /* 10507 */ 0270,01,040,01,0120,0110,0,
+ /* 10514 */ 0270,01,044,01,0120,0110,0,
+ /* 10521 */ 0270,01,041,01,0347,0101,0,
+ /* 10528 */ 0270,01,045,01,0347,0101,0,
+ /* 10535 */ 0270,02,041,01,052,0110,0,
+ /* 10542 */ 0270,01,041,01,053,0101,0,
+ /* 10549 */ 0270,01,045,01,053,0101,0,
+ /* 10556 */ 0270,01,040,01,053,0101,0,
+ /* 10563 */ 0270,01,044,01,053,0101,0,
+ /* 10570 */ 0261,01,053,01,020,0120,0,
+ /* 10577 */ 0260,01,053,01,020,0110,0,
+ /* 10584 */ 0270,01,053,01,020,0110,0,
+ /* 10591 */ 0261,01,053,01,021,0102,0,
+ /* 10598 */ 0260,01,053,01,021,0101,0,
+ /* 10605 */ 0270,01,053,01,021,0101,0,
+ /* 10612 */ 0270,01,042,01,026,0110,0,
+ /* 10619 */ 0270,01,046,01,026,0110,0,
+ /* 10626 */ 0270,01,042,01,022,0110,0,
+ /* 10633 */ 0270,01,046,01,022,0110,0,
+ /* 10640 */ 0261,01,052,01,020,0120,0,
+ /* 10647 */ 0260,01,052,01,020,0110,0,
+ /* 10654 */ 0270,01,052,01,020,0110,0,
+ /* 10661 */ 0261,01,052,01,021,0102,0,
+ /* 10668 */ 0260,01,052,01,021,0101,0,
+ /* 10675 */ 0270,01,052,01,021,0101,0,
+ /* 10682 */ 0270,01,041,01,020,0110,0,
+ /* 10689 */ 0270,01,041,01,021,0101,0,
+ /* 10696 */ 0270,01,045,01,020,0110,0,
+ /* 10703 */ 0270,01,045,01,021,0101,0,
+ /* 10710 */ 0270,01,040,01,020,0110,0,
+ /* 10717 */ 0270,01,040,01,021,0101,0,
+ /* 10724 */ 0270,01,044,01,020,0110,0,
+ /* 10731 */ 0270,01,044,01,021,0101,0,
+ /* 10738 */ 0261,01,041,01,0131,0120,0,
+ /* 10745 */ 0260,01,041,01,0131,0110,0,
+ /* 10752 */ 0261,01,045,01,0131,0120,0,
+ /* 10759 */ 0260,01,045,01,0131,0110,0,
+ /* 10766 */ 0261,01,040,01,0131,0120,0,
+ /* 10773 */ 0260,01,040,01,0131,0110,0,
+ /* 10780 */ 0261,01,044,01,0131,0120,0,
+ /* 10787 */ 0260,01,044,01,0131,0110,0,
+ /* 10794 */ 0261,01,053,01,0131,0120,0,
+ /* 10801 */ 0260,01,053,01,0131,0110,0,
+ /* 10808 */ 0261,01,052,01,0131,0120,0,
+ /* 10815 */ 0260,01,052,01,0131,0110,0,
+ /* 10822 */ 0261,01,041,01,0126,0120,0,
+ /* 10829 */ 0260,01,041,01,0126,0110,0,
+ /* 10836 */ 0261,01,045,01,0126,0120,0,
+ /* 10843 */ 0260,01,045,01,0126,0110,0,
+ /* 10850 */ 0261,01,040,01,0126,0120,0,
+ /* 10857 */ 0260,01,040,01,0126,0110,0,
+ /* 10864 */ 0261,01,044,01,0126,0120,0,
+ /* 10871 */ 0260,01,044,01,0126,0110,0,
+ /* 10878 */ 0270,02,041,01,034,0110,0,
+ /* 10885 */ 0270,02,041,01,035,0110,0,
+ /* 10892 */ 0270,02,041,01,036,0110,0,
+ /* 10899 */ 0261,01,041,01,0143,0120,0,
+ /* 10906 */ 0260,01,041,01,0143,0110,0,
+ /* 10913 */ 0261,01,041,01,0153,0120,0,
+ /* 10920 */ 0260,01,041,01,0153,0110,0,
+ /* 10927 */ 0261,01,041,01,0147,0120,0,
+ /* 10934 */ 0260,01,041,01,0147,0110,0,
+ /* 10941 */ 0261,02,041,01,053,0120,0,
+ /* 10948 */ 0260,02,041,01,053,0110,0,
+ /* 10955 */ 0261,01,041,01,0374,0120,0,
+ /* 10962 */ 0260,01,041,01,0374,0110,0,
+ /* 10969 */ 0261,01,041,01,0375,0120,0,
+ /* 10976 */ 0260,01,041,01,0375,0110,0,
+ /* 10983 */ 0261,01,041,01,0376,0120,0,
+ /* 10990 */ 0260,01,041,01,0376,0110,0,
+ /* 10997 */ 0261,01,041,01,0324,0120,0,
+ /* 11004 */ 0260,01,041,01,0324,0110,0,
+ /* 11011 */ 0261,01,041,01,0354,0120,0,
+ /* 11018 */ 0260,01,041,01,0354,0110,0,
+ /* 11025 */ 0261,01,041,01,0355,0120,0,
+ /* 11032 */ 0260,01,041,01,0355,0110,0,
+ /* 11039 */ 0261,01,041,01,0334,0120,0,
+ /* 11046 */ 0260,01,041,01,0334,0110,0,
+ /* 11053 */ 0261,01,041,01,0335,0120,0,
+ /* 11060 */ 0260,01,041,01,0335,0110,0,
+ /* 11067 */ 0261,01,041,01,0333,0120,0,
+ /* 11074 */ 0260,01,041,01,0333,0110,0,
+ /* 11081 */ 0261,01,041,01,0337,0120,0,
+ /* 11088 */ 0260,01,041,01,0337,0110,0,
+ /* 11095 */ 0261,01,041,01,0340,0120,0,
+ /* 11102 */ 0260,01,041,01,0340,0110,0,
+ /* 11109 */ 0261,01,041,01,0343,0120,0,
+ /* 11116 */ 0260,01,041,01,0343,0110,0,
+ /* 11123 */ 0261,01,041,01,0164,0120,0,
+ /* 11130 */ 0260,01,041,01,0164,0110,0,
+ /* 11137 */ 0261,01,041,01,0165,0120,0,
+ /* 11144 */ 0260,01,041,01,0165,0110,0,
+ /* 11151 */ 0261,01,041,01,0166,0120,0,
+ /* 11158 */ 0260,01,041,01,0166,0110,0,
+ /* 11165 */ 0261,02,041,01,051,0120,0,
+ /* 11172 */ 0260,02,041,01,051,0110,0,
+ /* 11179 */ 0261,01,041,01,0144,0120,0,
+ /* 11186 */ 0260,01,041,01,0144,0110,0,
+ /* 11193 */ 0261,01,041,01,0145,0120,0,
+ /* 11200 */ 0260,01,041,01,0145,0110,0,
+ /* 11207 */ 0261,01,041,01,0146,0120,0,
+ /* 11214 */ 0260,01,041,01,0146,0110,0,
+ /* 11221 */ 0261,02,041,01,067,0120,0,
+ /* 11228 */ 0260,02,041,01,067,0110,0,
+ /* 11235 */ 0261,02,01,01,015,0120,0,
+ /* 11242 */ 0261,02,05,01,015,0120,0,
+ /* 11249 */ 0261,02,01,01,014,0120,0,
+ /* 11256 */ 0261,02,05,01,014,0120,0,
+ /* 11263 */ 0261,02,041,01,01,0120,0,
+ /* 11270 */ 0260,02,041,01,01,0110,0,
+ /* 11277 */ 0261,02,041,01,02,0120,0,
+ /* 11284 */ 0260,02,041,01,02,0110,0,
+ /* 11291 */ 0261,02,041,01,03,0120,0,
+ /* 11298 */ 0260,02,041,01,03,0110,0,
+ /* 11305 */ 0270,02,041,01,0101,0110,0,
+ /* 11312 */ 0261,02,041,01,05,0120,0,
+ /* 11319 */ 0260,02,041,01,05,0110,0,
+ /* 11326 */ 0261,02,041,01,06,0120,0,
+ /* 11333 */ 0260,02,041,01,06,0110,0,
+ /* 11340 */ 0261,02,041,01,07,0120,0,
+ /* 11347 */ 0260,02,041,01,07,0110,0,
+ /* 11354 */ 0261,01,041,01,0365,0120,0,
+ /* 11361 */ 0260,01,041,01,0365,0110,0,
+ /* 11368 */ 0261,02,041,01,04,0120,0,
+ /* 11375 */ 0260,02,041,01,04,0110,0,
+ /* 11382 */ 0261,02,041,01,074,0120,0,
+ /* 11389 */ 0260,02,041,01,074,0110,0,
+ /* 11396 */ 0261,01,041,01,0356,0120,0,
+ /* 11403 */ 0260,01,041,01,0356,0110,0,
+ /* 11410 */ 0261,02,041,01,075,0120,0,
+ /* 11417 */ 0260,02,041,01,075,0110,0,
+ /* 11424 */ 0261,01,041,01,0336,0120,0,
+ /* 11431 */ 0260,01,041,01,0336,0110,0,
+ /* 11438 */ 0261,02,041,01,076,0120,0,
+ /* 11445 */ 0260,02,041,01,076,0110,0,
+ /* 11452 */ 0261,02,041,01,077,0120,0,
+ /* 11459 */ 0260,02,041,01,077,0110,0,
+ /* 11466 */ 0261,02,041,01,070,0120,0,
+ /* 11473 */ 0260,02,041,01,070,0110,0,
+ /* 11480 */ 0261,01,041,01,0352,0120,0,
+ /* 11487 */ 0260,01,041,01,0352,0110,0,
+ /* 11494 */ 0261,02,041,01,071,0120,0,
+ /* 11501 */ 0260,02,041,01,071,0110,0,
+ /* 11508 */ 0261,01,041,01,0332,0120,0,
+ /* 11515 */ 0260,01,041,01,0332,0110,0,
+ /* 11522 */ 0261,02,041,01,072,0120,0,
+ /* 11529 */ 0260,02,041,01,072,0110,0,
+ /* 11536 */ 0261,02,041,01,073,0120,0,
+ /* 11543 */ 0260,02,041,01,073,0110,0,
+ /* 11550 */ 0270,01,041,01,0327,0110,0,
+ /* 11557 */ 0270,02,041,01,040,0110,0,
+ /* 11564 */ 0270,02,041,01,041,0110,0,
+ /* 11571 */ 0270,02,041,01,042,0110,0,
+ /* 11578 */ 0270,02,041,01,043,0110,0,
+ /* 11585 */ 0270,02,041,01,044,0110,0,
+ /* 11592 */ 0270,02,041,01,045,0110,0,
+ /* 11599 */ 0270,02,041,01,060,0110,0,
+ /* 11606 */ 0270,02,041,01,061,0110,0,
+ /* 11613 */ 0270,02,041,01,062,0110,0,
+ /* 11620 */ 0270,02,041,01,063,0110,0,
+ /* 11627 */ 0270,02,041,01,064,0110,0,
+ /* 11634 */ 0270,02,041,01,065,0110,0,
+ /* 11641 */ 0261,01,041,01,0344,0120,0,
+ /* 11648 */ 0260,01,041,01,0344,0110,0,
+ /* 11655 */ 0261,02,041,01,013,0120,0,
+ /* 11662 */ 0260,02,041,01,013,0110,0,
+ /* 11669 */ 0261,01,041,01,0345,0120,0,
+ /* 11676 */ 0260,01,041,01,0345,0110,0,
+ /* 11683 */ 0261,01,041,01,0325,0120,0,
+ /* 11690 */ 0260,01,041,01,0325,0110,0,
+ /* 11697 */ 0261,02,041,01,0100,0120,0,
+ /* 11704 */ 0260,02,041,01,0100,0110,0,
+ /* 11711 */ 0261,01,041,01,0364,0120,0,
+ /* 11718 */ 0260,01,041,01,0364,0110,0,
+ /* 11725 */ 0261,02,041,01,050,0120,0,
+ /* 11732 */ 0260,02,041,01,050,0110,0,
+ /* 11739 */ 0261,01,041,01,0353,0120,0,
+ /* 11746 */ 0260,01,041,01,0353,0110,0,
+ /* 11753 */ 0261,01,041,01,0366,0120,0,
+ /* 11760 */ 0260,01,041,01,0366,0110,0,
+ /* 11767 */ 0261,02,041,01,0,0120,0,
+ /* 11774 */ 0260,02,041,01,0,0110,0,
+ /* 11781 */ 0261,02,041,01,010,0120,0,
+ /* 11788 */ 0260,02,041,01,010,0110,0,
+ /* 11795 */ 0261,02,041,01,011,0120,0,
+ /* 11802 */ 0260,02,041,01,011,0110,0,
+ /* 11809 */ 0261,02,041,01,012,0120,0,
+ /* 11816 */ 0260,02,041,01,012,0110,0,
+ /* 11823 */ 0261,01,041,01,0361,0120,0,
+ /* 11830 */ 0260,01,041,01,0361,0110,0,
+ /* 11837 */ 0261,01,041,01,0362,0120,0,
+ /* 11844 */ 0260,01,041,01,0362,0110,0,
+ /* 11851 */ 0261,01,041,01,0363,0120,0,
+ /* 11858 */ 0260,01,041,01,0363,0110,0,
+ /* 11865 */ 0261,01,041,01,0341,0120,0,
+ /* 11872 */ 0260,01,041,01,0341,0110,0,
+ /* 11879 */ 0261,01,041,01,0342,0120,0,
+ /* 11886 */ 0260,01,041,01,0342,0110,0,
+ /* 11893 */ 0261,01,041,01,0321,0120,0,
+ /* 11900 */ 0260,01,041,01,0321,0110,0,
+ /* 11907 */ 0261,01,041,01,0322,0120,0,
+ /* 11914 */ 0260,01,041,01,0322,0110,0,
+ /* 11921 */ 0261,01,041,01,0323,0120,0,
+ /* 11928 */ 0260,01,041,01,0323,0110,0,
+ /* 11935 */ 0270,02,041,01,027,0110,0,
+ /* 11942 */ 0270,02,045,01,027,0110,0,
+ /* 11949 */ 0261,01,041,01,0370,0120,0,
+ /* 11956 */ 0260,01,041,01,0370,0110,0,
+ /* 11963 */ 0261,01,041,01,0371,0120,0,
+ /* 11970 */ 0260,01,041,01,0371,0110,0,
+ /* 11977 */ 0261,01,041,01,0372,0120,0,
+ /* 11984 */ 0260,01,041,01,0372,0110,0,
+ /* 11991 */ 0261,01,041,01,0373,0120,0,
+ /* 11998 */ 0260,01,041,01,0373,0110,0,
+ /* 12005 */ 0261,01,041,01,0350,0120,0,
+ /* 12012 */ 0260,01,041,01,0350,0110,0,
+ /* 12019 */ 0261,01,041,01,0351,0120,0,
+ /* 12026 */ 0260,01,041,01,0351,0110,0,
+ /* 12033 */ 0261,01,041,01,0330,0120,0,
+ /* 12040 */ 0260,01,041,01,0330,0110,0,
+ /* 12047 */ 0261,01,041,01,0331,0120,0,
+ /* 12054 */ 0260,01,041,01,0331,0110,0,
+ /* 12061 */ 0261,01,041,01,0150,0120,0,
+ /* 12068 */ 0260,01,041,01,0150,0110,0,
+ /* 12075 */ 0261,01,041,01,0151,0120,0,
+ /* 12082 */ 0260,01,041,01,0151,0110,0,
+ /* 12089 */ 0261,01,041,01,0152,0120,0,
+ /* 12096 */ 0260,01,041,01,0152,0110,0,
+ /* 12103 */ 0261,01,041,01,0155,0120,0,
+ /* 12110 */ 0260,01,041,01,0155,0110,0,
+ /* 12117 */ 0261,01,041,01,0140,0120,0,
+ /* 12124 */ 0260,01,041,01,0140,0110,0,
+ /* 12131 */ 0261,01,041,01,0141,0120,0,
+ /* 12138 */ 0260,01,041,01,0141,0110,0,
+ /* 12145 */ 0261,01,041,01,0142,0120,0,
+ /* 12152 */ 0260,01,041,01,0142,0110,0,
+ /* 12159 */ 0261,01,041,01,0154,0120,0,
+ /* 12166 */ 0260,01,041,01,0154,0110,0,
+ /* 12173 */ 0261,01,041,01,0357,0120,0,
+ /* 12180 */ 0260,01,041,01,0357,0110,0,
+ /* 12187 */ 0270,01,040,01,0123,0110,0,
+ /* 12194 */ 0270,01,044,01,0123,0110,0,
+ /* 12201 */ 0261,01,052,01,0123,0120,0,
+ /* 12208 */ 0260,01,052,01,0123,0110,0,
+ /* 12215 */ 0270,01,040,01,0122,0110,0,
+ /* 12222 */ 0270,01,044,01,0122,0110,0,
+ /* 12229 */ 0261,01,052,01,0122,0120,0,
+ /* 12236 */ 0260,01,052,01,0122,0110,0,
+ /* 12243 */ 0270,01,041,01,0121,0110,0,
+ /* 12250 */ 0270,01,045,01,0121,0110,0,
+ /* 12257 */ 0270,01,040,01,0121,0110,0,
+ /* 12264 */ 0270,01,044,01,0121,0110,0,
+ /* 12271 */ 0261,01,053,01,0121,0120,0,
+ /* 12278 */ 0260,01,053,01,0121,0110,0,
+ /* 12285 */ 0261,01,052,01,0121,0120,0,
+ /* 12292 */ 0260,01,052,01,0121,0110,0,
+ /* 12299 */ 0270,01,040,01,0256,0203,0,
+ /* 12306 */ 0261,01,041,01,0134,0120,0,
+ /* 12313 */ 0260,01,041,01,0134,0110,0,
+ /* 12320 */ 0261,01,045,01,0134,0120,0,
+ /* 12327 */ 0260,01,045,01,0134,0110,0,
+ /* 12334 */ 0261,01,040,01,0134,0120,0,
+ /* 12341 */ 0260,01,040,01,0134,0110,0,
+ /* 12348 */ 0261,01,044,01,0134,0120,0,
+ /* 12355 */ 0260,01,044,01,0134,0110,0,
+ /* 12362 */ 0261,01,053,01,0134,0120,0,
+ /* 12369 */ 0260,01,053,01,0134,0110,0,
+ /* 12376 */ 0261,01,052,01,0134,0120,0,
+ /* 12383 */ 0260,01,052,01,0134,0110,0,
+ /* 12390 */ 0270,02,01,01,016,0110,0,
+ /* 12397 */ 0270,02,05,01,016,0110,0,
+ /* 12404 */ 0270,02,01,01,017,0110,0,
+ /* 12411 */ 0270,02,05,01,017,0110,0,
+ /* 12418 */ 0270,01,051,01,056,0110,0,
+ /* 12425 */ 0270,01,050,01,056,0110,0,
+ /* 12432 */ 0261,01,041,01,025,0120,0,
+ /* 12439 */ 0260,01,041,01,025,0110,0,
+ /* 12446 */ 0261,01,045,01,025,0120,0,
+ /* 12453 */ 0260,01,045,01,025,0110,0,
+ /* 12460 */ 0261,01,040,01,025,0120,0,
+ /* 12467 */ 0260,01,040,01,025,0110,0,
+ /* 12474 */ 0261,01,044,01,025,0120,0,
+ /* 12481 */ 0260,01,044,01,025,0110,0,
+ /* 12488 */ 0261,01,041,01,024,0120,0,
+ /* 12495 */ 0260,01,041,01,024,0110,0,
+ /* 12502 */ 0261,01,045,01,024,0120,0,
+ /* 12509 */ 0260,01,045,01,024,0110,0,
+ /* 12516 */ 0261,01,040,01,024,0120,0,
+ /* 12523 */ 0260,01,040,01,024,0110,0,
+ /* 12530 */ 0261,01,044,01,024,0120,0,
+ /* 12537 */ 0260,01,044,01,024,0110,0,
+ /* 12544 */ 0261,01,041,01,0127,0120,0,
+ /* 12551 */ 0260,01,041,01,0127,0110,0,
+ /* 12558 */ 0261,01,045,01,0127,0120,0,
+ /* 12565 */ 0260,01,045,01,0127,0110,0,
+ /* 12572 */ 0261,01,040,01,0127,0120,0,
+ /* 12579 */ 0260,01,040,01,0127,0110,0,
+ /* 12586 */ 0261,01,044,01,0127,0120,0,
+ /* 12593 */ 0260,01,044,01,0127,0110,0,
+ /* 12600 */ 0261,02,01,01,0230,0120,0,
+ /* 12607 */ 0261,02,05,01,0230,0120,0,
+ /* 12614 */ 0261,02,021,01,0230,0120,0,
+ /* 12621 */ 0261,02,025,01,0230,0120,0,
+ /* 12628 */ 0261,02,01,01,0250,0120,0,
+ /* 12635 */ 0261,02,05,01,0250,0120,0,
+ /* 12642 */ 0261,02,021,01,0250,0120,0,
+ /* 12649 */ 0261,02,025,01,0250,0120,0,
+ /* 12656 */ 0261,02,01,01,0270,0120,0,
+ /* 12663 */ 0261,02,05,01,0270,0120,0,
+ /* 12670 */ 0261,02,021,01,0270,0120,0,
+ /* 12677 */ 0261,02,025,01,0270,0120,0,
+ /* 12684 */ 0261,02,01,01,0226,0120,0,
+ /* 12691 */ 0261,02,05,01,0226,0120,0,
+ /* 12698 */ 0261,02,021,01,0226,0120,0,
+ /* 12705 */ 0261,02,025,01,0226,0120,0,
+ /* 12712 */ 0261,02,01,01,0246,0120,0,
+ /* 12719 */ 0261,02,05,01,0246,0120,0,
+ /* 12726 */ 0261,02,021,01,0246,0120,0,
+ /* 12733 */ 0261,02,025,01,0246,0120,0,
+ /* 12740 */ 0261,02,01,01,0266,0120,0,
+ /* 12747 */ 0261,02,05,01,0266,0120,0,
+ /* 12754 */ 0261,02,021,01,0266,0120,0,
+ /* 12761 */ 0261,02,025,01,0266,0120,0,
+ /* 12768 */ 0261,02,01,01,0232,0120,0,
+ /* 12775 */ 0261,02,05,01,0232,0120,0,
+ /* 12782 */ 0261,02,021,01,0232,0120,0,
+ /* 12789 */ 0261,02,025,01,0232,0120,0,
+ /* 12796 */ 0261,02,01,01,0252,0120,0,
+ /* 12803 */ 0261,02,05,01,0252,0120,0,
+ /* 12810 */ 0261,02,021,01,0252,0120,0,
+ /* 12817 */ 0261,02,025,01,0252,0120,0,
+ /* 12824 */ 0261,02,01,01,0272,0120,0,
+ /* 12831 */ 0261,02,05,01,0272,0120,0,
+ /* 12838 */ 0261,02,021,01,0272,0120,0,
+ /* 12845 */ 0261,02,025,01,0272,0120,0,
+ /* 12852 */ 0261,02,01,01,0227,0120,0,
+ /* 12859 */ 0261,02,05,01,0227,0120,0,
+ /* 12866 */ 0261,02,021,01,0227,0120,0,
+ /* 12873 */ 0261,02,025,01,0227,0120,0,
+ /* 12880 */ 0261,02,01,01,0247,0120,0,
+ /* 12887 */ 0261,02,05,01,0247,0120,0,
+ /* 12894 */ 0261,02,021,01,0247,0120,0,
+ /* 12901 */ 0261,02,025,01,0247,0120,0,
+ /* 12908 */ 0261,02,01,01,0267,0120,0,
+ /* 12915 */ 0261,02,05,01,0267,0120,0,
+ /* 12922 */ 0261,02,021,01,0267,0120,0,
+ /* 12929 */ 0261,02,025,01,0267,0120,0,
+ /* 12936 */ 0261,02,01,01,0234,0120,0,
+ /* 12943 */ 0261,02,05,01,0234,0120,0,
+ /* 12950 */ 0261,02,021,01,0234,0120,0,
+ /* 12957 */ 0261,02,025,01,0234,0120,0,
+ /* 12964 */ 0261,02,01,01,0254,0120,0,
+ /* 12971 */ 0261,02,05,01,0254,0120,0,
+ /* 12978 */ 0261,02,021,01,0254,0120,0,
+ /* 12985 */ 0261,02,025,01,0254,0120,0,
+ /* 12992 */ 0261,02,01,01,0274,0120,0,
+ /* 12999 */ 0261,02,05,01,0274,0120,0,
+ /* 13006 */ 0261,02,021,01,0274,0120,0,
+ /* 13013 */ 0261,02,025,01,0274,0120,0,
+ /* 13020 */ 0261,02,01,01,0236,0120,0,
+ /* 13027 */ 0261,02,05,01,0236,0120,0,
+ /* 13034 */ 0261,02,021,01,0236,0120,0,
+ /* 13041 */ 0261,02,025,01,0236,0120,0,
+ /* 13048 */ 0261,02,01,01,0256,0120,0,
+ /* 13055 */ 0261,02,05,01,0256,0120,0,
+ /* 13062 */ 0261,02,021,01,0256,0120,0,
+ /* 13069 */ 0261,02,025,01,0256,0120,0,
+ /* 13076 */ 0261,02,01,01,0276,0120,0,
+ /* 13083 */ 0261,02,05,01,0276,0120,0,
+ /* 13090 */ 0261,02,021,01,0276,0120,0,
+ /* 13097 */ 0261,02,025,01,0276,0120,0,
+ /* 13104 */ 0261,02,01,01,0231,0120,0,
+ /* 13111 */ 0261,02,021,01,0231,0120,0,
+ /* 13118 */ 0261,02,01,01,0251,0120,0,
+ /* 13125 */ 0261,02,021,01,0251,0120,0,
+ /* 13132 */ 0261,02,01,01,0271,0120,0,
+ /* 13139 */ 0261,02,021,01,0271,0120,0,
+ /* 13146 */ 0261,02,01,01,0233,0120,0,
+ /* 13153 */ 0261,02,021,01,0233,0120,0,
+ /* 13160 */ 0261,02,01,01,0253,0120,0,
+ /* 13167 */ 0261,02,021,01,0253,0120,0,
+ /* 13174 */ 0261,02,01,01,0273,0120,0,
+ /* 13181 */ 0261,02,021,01,0273,0120,0,
+ /* 13188 */ 0261,02,01,01,0235,0120,0,
+ /* 13195 */ 0261,02,021,01,0235,0120,0,
+ /* 13202 */ 0261,02,01,01,0255,0120,0,
+ /* 13209 */ 0261,02,021,01,0255,0120,0,
+ /* 13216 */ 0261,02,01,01,0275,0120,0,
+ /* 13223 */ 0261,02,021,01,0275,0120,0,
+ /* 13230 */ 0261,02,01,01,0237,0120,0,
+ /* 13237 */ 0261,02,021,01,0237,0120,0,
+ /* 13244 */ 0261,02,01,01,0257,0120,0,
+ /* 13251 */ 0261,02,021,01,0257,0120,0,
+ /* 13258 */ 0261,02,01,01,0277,0120,0,
+ /* 13265 */ 0261,02,021,01,0277,0120,0,
+ /* 13272 */ 0317,0363,02,017,0256,0200,0,
+ /* 13279 */ 0324,0363,02,017,0256,0200,0,
+ /* 13286 */ 0317,0363,02,017,0256,0201,0,
+ /* 13293 */ 0324,0363,02,017,0256,0201,0,
+ /* 13300 */ 0317,0363,02,017,0256,0202,0,
+ /* 13307 */ 0324,0363,02,017,0256,0202,0,
+ /* 13314 */ 0317,0363,02,017,0256,0203,0,
+ /* 13321 */ 0324,0363,02,017,0256,0203,0,
+ /* 13328 */ 0270,02,05,01,023,0110,0,
+ /* 13335 */ 0270,02,01,01,023,0110,0,
+ /* 13342 */ 0270,0111,0,01,022,0200,0,
+ /* 13349 */ 0270,0111,020,01,022,0200,0,
+ /* 13356 */ 0270,0111,0,01,022,0201,0,
+ /* 13363 */ 0270,0111,020,01,022,0201,0,
+ /* 13370 */ 0270,0111,0,01,0201,0110,0,
+ /* 13377 */ 0270,0111,0,01,0201,0100,0,
+ /* 13384 */ 0270,0111,04,01,0201,0110,0,
+ /* 13391 */ 0270,0111,04,01,0201,0100,0,
+ /* 13398 */ 0270,0111,0,01,0200,0110,0,
+ /* 13405 */ 0270,0111,0,01,0200,0100,0,
+ /* 13412 */ 0270,0111,04,01,0200,0110,0,
+ /* 13419 */ 0270,0111,04,01,0200,0100,0,
+ /* 13426 */ 0270,0111,0,01,0203,0110,0,
+ /* 13433 */ 0270,0111,0,01,0203,0100,0,
+ /* 13440 */ 0270,0111,0,01,0202,0110,0,
+ /* 13447 */ 0270,0111,0,01,0202,0100,0,
+ /* 13454 */ 0270,0111,0,01,0302,0110,0,
+ /* 13461 */ 0270,0111,0,01,0302,0100,0,
+ /* 13468 */ 0270,0111,0,01,0303,0110,0,
+ /* 13475 */ 0270,0111,0,01,0303,0100,0,
+ /* 13482 */ 0270,0111,0,01,0301,0110,0,
+ /* 13489 */ 0270,0111,0,01,0301,0100,0,
+ /* 13496 */ 0270,0111,0,01,0313,0110,0,
+ /* 13503 */ 0270,0111,0,01,0313,0100,0,
+ /* 13510 */ 0270,0111,0,01,0322,0110,0,
+ /* 13517 */ 0270,0111,0,01,0322,0100,0,
+ /* 13524 */ 0270,0111,0,01,0323,0110,0,
+ /* 13531 */ 0270,0111,0,01,0323,0100,0,
+ /* 13538 */ 0270,0111,0,01,0321,0110,0,
+ /* 13545 */ 0270,0111,0,01,0321,0100,0,
+ /* 13552 */ 0270,0111,0,01,0333,0110,0,
+ /* 13559 */ 0270,0111,0,01,0333,0100,0,
+ /* 13566 */ 0270,0111,0,01,0326,0110,0,
+ /* 13573 */ 0270,0111,0,01,0326,0100,0,
+ /* 13580 */ 0270,0111,0,01,0327,0110,0,
+ /* 13587 */ 0270,0111,0,01,0327,0100,0,
+ /* 13594 */ 0270,0111,0,01,0306,0110,0,
+ /* 13601 */ 0270,0111,0,01,0306,0100,0,
+ /* 13608 */ 0270,0111,0,01,0307,0110,0,
+ /* 13615 */ 0270,0111,0,01,0307,0100,0,
+ /* 13622 */ 0270,0111,0,01,0341,0110,0,
+ /* 13629 */ 0270,0111,0,01,0341,0100,0,
+ /* 13636 */ 0270,0111,0,01,0343,0110,0,
+ /* 13643 */ 0270,0111,0,01,0343,0100,0,
+ /* 13650 */ 0270,0111,0,01,0342,0110,0,
+ /* 13657 */ 0270,0111,0,01,0342,0100,0,
+ /* 13664 */ 0262,0111,0,01,0220,0110,0,
+ /* 13671 */ 0261,0111,0,01,0220,0100,0,
+ /* 13678 */ 0261,0111,020,01,0220,0120,0,
+ /* 13685 */ 0260,0111,020,01,0220,0110,0,
+ /* 13692 */ 0262,0111,0,01,0222,0110,0,
+ /* 13699 */ 0261,0111,0,01,0222,0100,0,
+ /* 13706 */ 0261,0111,020,01,0222,0120,0,
+ /* 13713 */ 0260,0111,020,01,0222,0110,0,
+ /* 13720 */ 0262,0111,0,01,0223,0110,0,
+ /* 13727 */ 0261,0111,0,01,0223,0100,0,
+ /* 13734 */ 0261,0111,020,01,0223,0120,0,
+ /* 13741 */ 0260,0111,020,01,0223,0110,0,
+ /* 13748 */ 0262,0111,0,01,0221,0110,0,
+ /* 13755 */ 0261,0111,0,01,0221,0100,0,
+ /* 13762 */ 0261,0111,020,01,0221,0120,0,
+ /* 13769 */ 0260,0111,020,01,0221,0110,0,
+ /* 13776 */ 0262,0111,0,01,0230,0110,0,
+ /* 13783 */ 0261,0111,0,01,0230,0100,0,
+ /* 13790 */ 0261,0111,020,01,0230,0120,0,
+ /* 13797 */ 0260,0111,020,01,0230,0110,0,
+ /* 13804 */ 0262,0111,0,01,0232,0110,0,
+ /* 13811 */ 0261,0111,0,01,0232,0100,0,
+ /* 13818 */ 0261,0111,020,01,0232,0120,0,
+ /* 13825 */ 0260,0111,020,01,0232,0110,0,
+ /* 13832 */ 0262,0111,0,01,0233,0110,0,
+ /* 13839 */ 0261,0111,0,01,0233,0100,0,
+ /* 13846 */ 0261,0111,020,01,0233,0120,0,
+ /* 13853 */ 0260,0111,020,01,0233,0110,0,
+ /* 13860 */ 0262,0111,0,01,0231,0110,0,
+ /* 13867 */ 0261,0111,0,01,0231,0100,0,
+ /* 13874 */ 0261,0111,020,01,0231,0120,0,
+ /* 13881 */ 0260,0111,020,01,0231,0110,0,
+ /* 13888 */ 0262,0111,0,01,0224,0110,0,
+ /* 13895 */ 0261,0111,0,01,0224,0100,0,
+ /* 13902 */ 0261,0111,020,01,0224,0120,0,
+ /* 13909 */ 0260,0111,020,01,0224,0110,0,
+ /* 13916 */ 0262,0111,0,01,0226,0110,0,
+ /* 13923 */ 0261,0111,0,01,0226,0100,0,
+ /* 13930 */ 0261,0111,020,01,0226,0120,0,
+ /* 13937 */ 0260,0111,020,01,0226,0110,0,
+ /* 13944 */ 0262,0111,0,01,0227,0110,0,
+ /* 13951 */ 0261,0111,0,01,0227,0100,0,
+ /* 13958 */ 0261,0111,020,01,0227,0120,0,
+ /* 13965 */ 0260,0111,020,01,0227,0110,0,
+ /* 13972 */ 0262,0111,0,01,0225,0110,0,
+ /* 13979 */ 0261,0111,0,01,0225,0100,0,
+ /* 13986 */ 0261,0111,020,01,0225,0120,0,
+ /* 13993 */ 0260,0111,020,01,0225,0110,0,
+ /* 14000 */ 0270,02,045,01,034,0110,0,
+ /* 14007 */ 0270,02,045,01,035,0110,0,
+ /* 14014 */ 0270,02,045,01,036,0110,0,
+ /* 14021 */ 0261,01,045,01,0143,0120,0,
+ /* 14028 */ 0260,01,045,01,0143,0110,0,
+ /* 14035 */ 0261,01,045,01,0153,0120,0,
+ /* 14042 */ 0260,01,045,01,0153,0110,0,
+ /* 14049 */ 0261,02,045,01,053,0120,0,
+ /* 14056 */ 0260,02,045,01,053,0110,0,
+ /* 14063 */ 0261,01,045,01,0147,0120,0,
+ /* 14070 */ 0260,01,045,01,0147,0110,0,
+ /* 14077 */ 0261,01,045,01,0374,0120,0,
+ /* 14084 */ 0260,01,045,01,0374,0110,0,
+ /* 14091 */ 0261,01,045,01,0375,0120,0,
+ /* 14098 */ 0260,01,045,01,0375,0110,0,
+ /* 14105 */ 0261,01,045,01,0376,0120,0,
+ /* 14112 */ 0260,01,045,01,0376,0110,0,
+ /* 14119 */ 0261,01,045,01,0324,0120,0,
+ /* 14126 */ 0260,01,045,01,0324,0110,0,
+ /* 14133 */ 0261,01,045,01,0354,0120,0,
+ /* 14140 */ 0260,01,045,01,0354,0110,0,
+ /* 14147 */ 0261,01,045,01,0355,0120,0,
+ /* 14154 */ 0260,01,045,01,0355,0110,0,
+ /* 14161 */ 0261,01,045,01,0334,0120,0,
+ /* 14168 */ 0260,01,045,01,0334,0110,0,
+ /* 14175 */ 0261,01,045,01,0335,0120,0,
+ /* 14182 */ 0260,01,045,01,0335,0110,0,
+ /* 14189 */ 0261,01,045,01,0333,0120,0,
+ /* 14196 */ 0260,01,045,01,0333,0110,0,
+ /* 14203 */ 0261,01,045,01,0337,0120,0,
+ /* 14210 */ 0260,01,045,01,0337,0110,0,
+ /* 14217 */ 0261,01,045,01,0340,0120,0,
+ /* 14224 */ 0260,01,045,01,0340,0110,0,
+ /* 14231 */ 0261,01,045,01,0343,0120,0,
+ /* 14238 */ 0260,01,045,01,0343,0110,0,
+ /* 14245 */ 0261,01,045,01,0164,0120,0,
+ /* 14252 */ 0260,01,045,01,0164,0110,0,
+ /* 14259 */ 0261,01,045,01,0165,0120,0,
+ /* 14266 */ 0260,01,045,01,0165,0110,0,
+ /* 14273 */ 0261,01,045,01,0166,0120,0,
+ /* 14280 */ 0260,01,045,01,0166,0110,0,
+ /* 14287 */ 0261,02,045,01,051,0120,0,
+ /* 14294 */ 0260,02,045,01,051,0110,0,
+ /* 14301 */ 0261,01,045,01,0144,0120,0,
+ /* 14308 */ 0260,01,045,01,0144,0110,0,
+ /* 14315 */ 0261,01,045,01,0145,0120,0,
+ /* 14322 */ 0260,01,045,01,0145,0110,0,
+ /* 14329 */ 0261,01,045,01,0146,0120,0,
+ /* 14336 */ 0260,01,045,01,0146,0110,0,
+ /* 14343 */ 0261,02,045,01,067,0120,0,
+ /* 14350 */ 0260,02,045,01,067,0110,0,
+ /* 14357 */ 0261,02,045,01,01,0120,0,
+ /* 14364 */ 0260,02,045,01,01,0110,0,
+ /* 14371 */ 0261,02,045,01,02,0120,0,
+ /* 14378 */ 0260,02,045,01,02,0110,0,
+ /* 14385 */ 0261,02,045,01,03,0120,0,
+ /* 14392 */ 0260,02,045,01,03,0110,0,
+ /* 14399 */ 0261,02,045,01,05,0120,0,
+ /* 14406 */ 0260,02,045,01,05,0110,0,
+ /* 14413 */ 0261,02,045,01,06,0120,0,
+ /* 14420 */ 0260,02,045,01,06,0110,0,
+ /* 14427 */ 0261,02,045,01,07,0120,0,
+ /* 14434 */ 0260,02,045,01,07,0110,0,
+ /* 14441 */ 0261,02,045,01,04,0120,0,
+ /* 14448 */ 0260,02,045,01,04,0110,0,
+ /* 14455 */ 0261,01,045,01,0365,0120,0,
+ /* 14462 */ 0260,01,045,01,0365,0110,0,
+ /* 14469 */ 0261,02,045,01,074,0120,0,
+ /* 14476 */ 0260,02,045,01,074,0110,0,
+ /* 14483 */ 0261,01,045,01,0356,0120,0,
+ /* 14490 */ 0260,01,045,01,0356,0110,0,
+ /* 14497 */ 0261,02,045,01,075,0120,0,
+ /* 14504 */ 0260,02,045,01,075,0110,0,
+ /* 14511 */ 0261,01,045,01,0336,0120,0,
+ /* 14518 */ 0260,01,045,01,0336,0110,0,
+ /* 14525 */ 0261,02,045,01,076,0120,0,
+ /* 14532 */ 0260,02,045,01,076,0110,0,
+ /* 14539 */ 0261,02,045,01,077,0120,0,
+ /* 14546 */ 0260,02,045,01,077,0110,0,
+ /* 14553 */ 0261,02,045,01,070,0120,0,
+ /* 14560 */ 0260,02,045,01,070,0110,0,
+ /* 14567 */ 0261,01,045,01,0352,0120,0,
+ /* 14574 */ 0260,01,045,01,0352,0110,0,
+ /* 14581 */ 0261,02,045,01,071,0120,0,
+ /* 14588 */ 0260,02,045,01,071,0110,0,
+ /* 14595 */ 0261,01,045,01,0332,0120,0,
+ /* 14602 */ 0260,01,045,01,0332,0110,0,
+ /* 14609 */ 0261,02,045,01,072,0120,0,
+ /* 14616 */ 0260,02,045,01,072,0110,0,
+ /* 14623 */ 0261,02,045,01,073,0120,0,
+ /* 14630 */ 0260,02,045,01,073,0110,0,
+ /* 14637 */ 0270,01,045,01,0327,0110,0,
+ /* 14644 */ 0270,02,045,01,040,0110,0,
+ /* 14651 */ 0270,02,045,01,041,0110,0,
+ /* 14658 */ 0270,02,045,01,042,0110,0,
+ /* 14665 */ 0270,02,045,01,043,0110,0,
+ /* 14672 */ 0270,02,045,01,044,0110,0,
+ /* 14679 */ 0270,02,045,01,045,0110,0,
+ /* 14686 */ 0270,02,045,01,060,0110,0,
+ /* 14693 */ 0270,02,045,01,061,0110,0,
+ /* 14700 */ 0270,02,045,01,062,0110,0,
+ /* 14707 */ 0270,02,045,01,063,0110,0,
+ /* 14714 */ 0270,02,045,01,064,0110,0,
+ /* 14721 */ 0270,02,045,01,065,0110,0,
+ /* 14728 */ 0261,02,045,01,050,0120,0,
+ /* 14735 */ 0260,02,045,01,050,0110,0,
+ /* 14742 */ 0261,02,045,01,013,0120,0,
+ /* 14749 */ 0260,02,045,01,013,0110,0,
+ /* 14756 */ 0261,01,045,01,0344,0120,0,
+ /* 14763 */ 0260,01,045,01,0344,0110,0,
+ /* 14770 */ 0261,01,045,01,0345,0120,0,
+ /* 14777 */ 0260,01,045,01,0345,0110,0,
+ /* 14784 */ 0261,01,045,01,0325,0120,0,
+ /* 14791 */ 0260,01,045,01,0325,0110,0,
+ /* 14798 */ 0261,02,045,01,0100,0120,0,
+ /* 14805 */ 0260,02,045,01,0100,0110,0,
+ /* 14812 */ 0261,01,045,01,0364,0120,0,
+ /* 14819 */ 0260,01,045,01,0364,0110,0,
+ /* 14826 */ 0261,01,045,01,0353,0120,0,
+ /* 14833 */ 0260,01,045,01,0353,0110,0,
+ /* 14840 */ 0261,01,045,01,0366,0120,0,
+ /* 14847 */ 0260,01,045,01,0366,0110,0,
+ /* 14854 */ 0261,02,045,01,0,0120,0,
+ /* 14861 */ 0260,02,045,01,0,0110,0,
+ /* 14868 */ 0261,02,045,01,010,0120,0,
+ /* 14875 */ 0260,02,045,01,010,0110,0,
+ /* 14882 */ 0261,02,045,01,011,0120,0,
+ /* 14889 */ 0260,02,045,01,011,0110,0,
+ /* 14896 */ 0261,02,045,01,012,0120,0,
+ /* 14903 */ 0260,02,045,01,012,0110,0,
+ /* 14910 */ 0260,01,045,01,0361,0121,0,
+ /* 14917 */ 0260,01,045,01,0361,0110,0,
+ /* 14924 */ 0261,01,045,01,0362,0120,0,
+ /* 14931 */ 0260,01,045,01,0362,0110,0,
+ /* 14938 */ 0261,01,045,01,0363,0120,0,
+ /* 14945 */ 0260,01,045,01,0363,0110,0,
+ /* 14952 */ 0261,01,045,01,0341,0120,0,
+ /* 14959 */ 0260,01,045,01,0341,0110,0,
+ /* 14966 */ 0261,01,045,01,0342,0120,0,
+ /* 14973 */ 0260,01,045,01,0342,0110,0,
+ /* 14980 */ 0261,01,045,01,0321,0120,0,
+ /* 14987 */ 0260,01,045,01,0321,0110,0,
+ /* 14994 */ 0261,01,045,01,0322,0120,0,
+ /* 15001 */ 0260,01,045,01,0322,0110,0,
+ /* 15008 */ 0261,01,045,01,0323,0120,0,
+ /* 15015 */ 0260,01,045,01,0323,0110,0,
+ /* 15022 */ 0261,01,045,01,0370,0120,0,
+ /* 15029 */ 0260,01,045,01,0370,0110,0,
+ /* 15036 */ 0261,01,045,01,0371,0120,0,
+ /* 15043 */ 0260,01,045,01,0371,0110,0,
+ /* 15050 */ 0261,01,045,01,0372,0120,0,
+ /* 15057 */ 0260,01,045,01,0372,0110,0,
+ /* 15064 */ 0261,01,045,01,0373,0120,0,
+ /* 15071 */ 0260,01,045,01,0373,0110,0,
+ /* 15078 */ 0261,01,045,01,0350,0120,0,
+ /* 15085 */ 0260,01,045,01,0350,0110,0,
+ /* 15092 */ 0261,01,045,01,0351,0120,0,
+ /* 15099 */ 0260,01,045,01,0351,0110,0,
+ /* 15106 */ 0261,01,045,01,0330,0120,0,
+ /* 15113 */ 0260,01,045,01,0330,0110,0,
+ /* 15120 */ 0261,01,045,01,0331,0120,0,
+ /* 15127 */ 0260,01,045,01,0331,0110,0,
+ /* 15134 */ 0261,01,045,01,0150,0120,0,
+ /* 15141 */ 0260,01,045,01,0150,0110,0,
+ /* 15148 */ 0261,01,045,01,0151,0120,0,
+ /* 15155 */ 0260,01,045,01,0151,0110,0,
+ /* 15162 */ 0261,01,045,01,0152,0120,0,
+ /* 15169 */ 0260,01,045,01,0152,0110,0,
+ /* 15176 */ 0261,01,045,01,0155,0120,0,
+ /* 15183 */ 0260,01,045,01,0155,0110,0,
+ /* 15190 */ 0261,01,045,01,0140,0120,0,
+ /* 15197 */ 0260,01,045,01,0140,0110,0,
+ /* 15204 */ 0261,01,045,01,0141,0120,0,
+ /* 15211 */ 0260,01,045,01,0141,0110,0,
+ /* 15218 */ 0261,01,045,01,0142,0120,0,
+ /* 15225 */ 0260,01,045,01,0142,0110,0,
+ /* 15232 */ 0261,01,045,01,0154,0120,0,
+ /* 15239 */ 0260,01,045,01,0154,0110,0,
+ /* 15246 */ 0261,01,045,01,0357,0120,0,
+ /* 15253 */ 0260,01,045,01,0357,0110,0,
+ /* 15260 */ 0270,02,045,01,052,0110,0,
+ /* 15267 */ 0270,02,05,01,0132,0110,0,
+ /* 15274 */ 0270,02,01,01,0170,0110,0,
+ /* 15281 */ 0270,02,05,01,0170,0110,0,
+ /* 15288 */ 0270,02,01,01,0171,0110,0,
+ /* 15295 */ 0270,02,05,01,0171,0110,0,
+ /* 15302 */ 0270,02,01,01,0130,0110,0,
+ /* 15309 */ 0270,02,05,01,0130,0110,0,
+ /* 15316 */ 0270,02,01,01,0131,0110,0,
+ /* 15323 */ 0270,02,05,01,0131,0110,0,
+ /* 15330 */ 0261,02,05,01,066,0120,0,
+ /* 15337 */ 0260,02,05,01,066,0110,0,
+ /* 15344 */ 0261,02,05,01,026,0120,0,
+ /* 15351 */ 0260,02,05,01,026,0110,0,
+ /* 15358 */ 0261,02,01,01,0214,0120,0,
+ /* 15365 */ 0260,02,01,01,0214,0110,0,
+ /* 15372 */ 0261,02,05,01,0214,0120,0,
+ /* 15379 */ 0260,02,05,01,0214,0110,0,
+ /* 15386 */ 0261,02,021,01,0214,0120,0,
+ /* 15393 */ 0260,02,021,01,0214,0110,0,
+ /* 15400 */ 0261,02,025,01,0214,0120,0,
+ /* 15407 */ 0260,02,025,01,0214,0110,0,
+ /* 15414 */ 0261,02,01,01,0216,0102,0,
+ /* 15421 */ 0260,02,01,01,0216,0101,0,
+ /* 15428 */ 0261,02,05,01,0216,0102,0,
+ /* 15435 */ 0260,02,05,01,0216,0101,0,
+ /* 15442 */ 0261,02,021,01,0216,0102,0,
+ /* 15449 */ 0260,02,021,01,0216,0101,0,
+ /* 15456 */ 0261,02,025,01,0216,0102,0,
+ /* 15463 */ 0260,02,025,01,0216,0101,0,
+ /* 15470 */ 0261,02,01,01,0107,0120,0,
+ /* 15477 */ 0260,02,01,01,0107,0110,0,
+ /* 15484 */ 0261,02,021,01,0107,0120,0,
+ /* 15491 */ 0260,02,021,01,0107,0110,0,
+ /* 15498 */ 0261,02,05,01,0107,0120,0,
+ /* 15505 */ 0260,02,05,01,0107,0110,0,
+ /* 15512 */ 0261,02,025,01,0107,0120,0,
+ /* 15519 */ 0260,02,025,01,0107,0110,0,
+ /* 15526 */ 0261,02,01,01,0106,0120,0,
+ /* 15533 */ 0260,02,01,01,0106,0110,0,
+ /* 15540 */ 0261,02,05,01,0106,0120,0,
+ /* 15547 */ 0260,02,05,01,0106,0110,0,
+ /* 15554 */ 0261,02,01,01,0105,0120,0,
+ /* 15561 */ 0260,02,01,01,0105,0110,0,
+ /* 15568 */ 0261,02,021,01,0105,0120,0,
+ /* 15575 */ 0260,02,021,01,0105,0110,0,
+ /* 15582 */ 0261,02,05,01,0105,0120,0,
+ /* 15589 */ 0260,02,05,01,0105,0110,0,
+ /* 15596 */ 0261,02,025,01,0105,0120,0,
+ /* 15603 */ 0260,02,025,01,0105,0110,0,
+ /* 15610 */ 0320,0363,02,017,0274,0110,0,
+ /* 15617 */ 0321,0363,02,017,0274,0110,0,
+ /* 15624 */ 0324,0363,02,017,0274,0110,0,
+ /* 15631 */ 0261,02,0,01,0362,0120,0,
+ /* 15638 */ 0261,02,020,01,0362,0120,0,
+ /* 15645 */ 0262,02,0,01,0367,0110,0,
+ /* 15652 */ 0262,02,020,01,0367,0110,0,
+ /* 15659 */ 0260,02,0,01,0363,0213,0,
+ /* 15666 */ 0260,02,020,01,0363,0213,0,
+ /* 15673 */ 0260,02,0,01,0363,0212,0,
+ /* 15680 */ 0260,02,020,01,0363,0212,0,
+ /* 15687 */ 0260,02,0,01,0363,0211,0,
+ /* 15694 */ 0260,02,020,01,0363,0211,0,
+ /* 15701 */ 0262,02,0,01,0365,0110,0,
+ /* 15708 */ 0262,02,020,01,0365,0110,0,
+ /* 15715 */ 0261,02,03,01,0366,0120,0,
+ /* 15722 */ 0261,02,023,01,0366,0120,0,
+ /* 15729 */ 0261,02,03,01,0365,0120,0,
+ /* 15736 */ 0261,02,023,01,0365,0120,0,
+ /* 15743 */ 0261,02,02,01,0365,0120,0,
+ /* 15750 */ 0261,02,022,01,0365,0120,0,
+ /* 15757 */ 0262,02,02,01,0367,0110,0,
+ /* 15764 */ 0262,02,022,01,0367,0110,0,
+ /* 15771 */ 0262,02,01,01,0367,0110,0,
+ /* 15778 */ 0262,02,021,01,0367,0110,0,
+ /* 15785 */ 0262,02,03,01,0367,0110,0,
+ /* 15792 */ 0262,02,023,01,0367,0110,0,
+ /* 15799 */ 0273,0320,01,021,0101,0,
+ /* 15805 */ 0273,0321,01,021,0101,0,
+ /* 15811 */ 0273,0324,01,021,0101,0,
+ /* 15817 */ 0273,01,0200,0202,021,0,
+ /* 15823 */ 0273,01,0202,0202,021,0,
+ /* 15829 */ 0273,0320,01,01,0101,0,
+ /* 15835 */ 0273,0321,01,01,0101,0,
+ /* 15841 */ 0273,0324,01,01,0101,0,
+ /* 15847 */ 0273,01,0200,0200,021,0,
+ /* 15853 */ 0273,01,0202,0200,021,0,
+ /* 15859 */ 0273,0320,01,041,0101,0,
+ /* 15865 */ 0273,0321,01,041,0101,0,
+ /* 15871 */ 0273,0324,01,041,0101,0,
+ /* 15877 */ 0273,01,0200,0204,021,0,
+ /* 15883 */ 0273,01,0202,0204,021,0,
+ /* 15889 */ 0320,02,017,0274,0110,0,
+ /* 15895 */ 0321,02,017,0274,0110,0,
+ /* 15901 */ 0324,02,017,0274,0110,0,
+ /* 15907 */ 0320,02,017,0275,0110,0,
+ /* 15913 */ 0321,02,017,0275,0110,0,
+ /* 15919 */ 0324,02,017,0275,0110,0,
+ /* 15925 */ 0321,01,017,010,0310,0,
+ /* 15931 */ 0324,01,017,010,0310,0,
+ /* 15937 */ 0320,02,017,0243,0101,0,
+ /* 15943 */ 0321,02,017,0243,0101,0,
+ /* 15949 */ 0324,02,017,0243,0101,0,
+ /* 15955 */ 0322,01,0232,034,074,0,
+ /* 15961 */ 0320,01,0232,034,074,0,
+ /* 15967 */ 0321,01,0232,034,074,0,
+ /* 15973 */ 0322,01,0232,035,030,0,
+ /* 15979 */ 0320,01,0232,031,030,0,
+ /* 15985 */ 0321,01,0232,041,030,0,
+ /* 15991 */ 0320,01,0203,0207,0275,0,
+ /* 15997 */ 0321,01,0203,0207,0275,0,
+ /* 16003 */ 0324,01,0203,0207,0275,0,
+ /* 16009 */ 0320,0145,0201,0207,0141,0,
+ /* 16015 */ 0321,0155,0201,0207,0151,0,
+ /* 16021 */ 0324,0155,0201,0207,0251,0,
+ /* 16027 */ 0273,02,017,0260,0101,0,
+ /* 16033 */ 0320,02,017,0247,0101,0,
+ /* 16039 */ 0321,02,017,0247,0101,0,
+ /* 16045 */ 0273,02,017,0307,0201,0,
+ /* 16051 */ 0324,02,017,0307,0201,0,
+ /* 16057 */ 0273,0320,01,0377,0201,0,
+ /* 16063 */ 0273,0321,01,0377,0201,0,
+ /* 16069 */ 0273,0324,01,0377,0201,0,
+ /* 16075 */ 0320,02,017,0257,0110,0,
+ /* 16081 */ 0321,02,017,0257,0110,0,
+ /* 16087 */ 0324,02,017,0257,0110,0,
+ /* 16093 */ 0320,01,0153,0110,016,0,
+ /* 16099 */ 0320,01,0151,0110,032,0,
+ /* 16105 */ 0320,0146,0151,0110,0142,0,
+ /* 16111 */ 0321,01,0153,0110,016,0,
+ /* 16117 */ 0321,01,0151,0110,042,0,
+ /* 16123 */ 0321,0156,0151,0110,0152,0,
+ /* 16129 */ 0324,01,0153,0110,016,0,
+ /* 16135 */ 0324,01,0151,0110,042,0,
+ /* 16141 */ 0324,0156,0151,0110,0252,0,
+ /* 16147 */ 0320,01,0153,0100,015,0,
+ /* 16153 */ 0320,01,0151,0100,031,0,
+ /* 16159 */ 0320,0145,0151,0100,0141,0,
+ /* 16165 */ 0321,01,0153,0100,015,0,
+ /* 16171 */ 0321,01,0151,0100,041,0,
+ /* 16177 */ 0321,0155,0151,0100,0151,0,
+ /* 16183 */ 0324,01,0153,0100,015,0,
+ /* 16189 */ 0324,01,0151,0100,0255,0,
+ /* 16195 */ 0324,0155,0151,0100,0251,0,
+ /* 16201 */ 0273,0320,01,0377,0200,0,
+ /* 16207 */ 0273,0321,01,0377,0200,0,
+ /* 16213 */ 0273,0324,01,0377,0200,0,
+ /* 16219 */ 0310,03,017,01,0337,0,
+ /* 16225 */ 0311,03,017,01,0337,0,
+ /* 16231 */ 0322,01,0352,034,074,0,
+ /* 16237 */ 0320,01,0352,034,074,0,
+ /* 16243 */ 0321,01,0352,034,074,0,
+ /* 16249 */ 0322,01,0352,035,030,0,
+ /* 16255 */ 0320,01,0352,031,030,0,
+ /* 16261 */ 0321,01,0352,041,030,0,
+ /* 16267 */ 0322,02,017,0270,064,0,
+ /* 16273 */ 0320,02,017,0270,064,0,
+ /* 16279 */ 0321,02,017,0270,064,0,
+ /* 16285 */ 0320,02,017,0,0206,0,
+ /* 16291 */ 0321,02,017,0,0206,0,
+ /* 16297 */ 0320,02,017,02,0110,0,
+ /* 16303 */ 0321,02,017,02,0110,0,
+ /* 16309 */ 0324,02,017,02,0110,0,
+ /* 16315 */ 0320,02,017,0264,0110,0,
+ /* 16321 */ 0321,02,017,0264,0110,0,
+ /* 16327 */ 0324,02,017,0264,0110,0,
+ /* 16333 */ 0320,02,017,0265,0110,0,
+ /* 16339 */ 0321,02,017,0265,0110,0,
+ /* 16345 */ 0324,02,017,0265,0110,0,
+ /* 16351 */ 0320,02,017,03,0110,0,
+ /* 16357 */ 0321,02,017,03,0110,0,
+ /* 16363 */ 0324,02,017,03,0110,0,
+ /* 16369 */ 0320,02,017,0262,0110,0,
+ /* 16375 */ 0321,02,017,0262,0110,0,
+ /* 16381 */ 0324,02,017,0262,0110,0,
+ /* 16387 */ 0334,02,017,040,0101,0,
+ /* 16393 */ 0323,02,017,040,0101,0,
+ /* 16399 */ 0334,02,017,042,0110,0,
+ /* 16405 */ 0323,02,017,042,0110,0,
+ /* 16411 */ 0323,02,017,041,0101,0,
+ /* 16417 */ 0323,02,017,043,0110,0,
+ /* 16423 */ 0271,0320,01,0211,0101,0,
+ /* 16429 */ 0271,0321,01,0211,0101,0,
+ /* 16435 */ 0271,0324,01,0211,0101,0,
+ /* 16441 */ 0271,01,0306,0200,021,0,
+ /* 16447 */ 0360,02,017,0156,0110,0,
+ /* 16453 */ 0360,02,017,0176,0101,0,
+ /* 16459 */ 0360,02,017,0157,0110,0,
+ /* 16465 */ 0360,02,017,0177,0101,0,
+ /* 16471 */ 0320,02,017,0276,0110,0,
+ /* 16477 */ 0321,02,017,0276,0110,0,
+ /* 16483 */ 0321,02,017,0277,0110,0,
+ /* 16489 */ 0324,02,017,0276,0110,0,
+ /* 16495 */ 0324,02,017,0277,0110,0,
+ /* 16501 */ 0320,02,017,0266,0110,0,
+ /* 16507 */ 0321,02,017,0266,0110,0,
+ /* 16513 */ 0321,02,017,0267,0110,0,
+ /* 16519 */ 0324,02,017,0266,0110,0,
+ /* 16525 */ 0324,02,017,0267,0110,0,
+ /* 16531 */ 0273,0320,01,0367,0203,0,
+ /* 16537 */ 0273,0321,01,0367,0203,0,
+ /* 16543 */ 0273,0324,01,0367,0203,0,
+ /* 16549 */ 0320,02,017,037,0200,0,
+ /* 16555 */ 0321,02,017,037,0200,0,
+ /* 16561 */ 0324,02,017,037,0200,0,
+ /* 16567 */ 0273,0320,01,0367,0202,0,
+ /* 16573 */ 0273,0321,01,0367,0202,0,
+ /* 16579 */ 0273,0324,01,0367,0202,0,
+ /* 16585 */ 0273,0320,01,011,0101,0,
+ /* 16591 */ 0273,0321,01,011,0101,0,
+ /* 16597 */ 0273,0324,01,011,0101,0,
+ /* 16603 */ 0273,01,0200,0201,021,0,
+ /* 16609 */ 0273,01,0202,0201,021,0,
+ /* 16615 */ 0323,02,017,0121,0110,0,
+ /* 16621 */ 0323,02,017,0120,0110,0,
+ /* 16627 */ 0323,02,017,0122,0110,0,
+ /* 16633 */ 0323,02,017,0135,0110,0,
+ /* 16639 */ 0323,02,017,0131,0110,0,
+ /* 16645 */ 0323,02,017,0125,0110,0,
+ /* 16651 */ 0320,01,0301,0202,025,0,
+ /* 16657 */ 0321,01,0301,0202,025,0,
+ /* 16663 */ 0324,01,0301,0202,025,0,
+ /* 16669 */ 0320,01,0301,0203,025,0,
+ /* 16675 */ 0321,01,0301,0203,025,0,
+ /* 16681 */ 0324,01,0301,0203,025,0,
+ /* 16687 */ 0321,02,017,066,0200,0,
+ /* 16693 */ 0320,01,0301,0200,025,0,
+ /* 16699 */ 0321,01,0301,0200,025,0,
+ /* 16705 */ 0324,01,0301,0200,025,0,
+ /* 16711 */ 0320,01,0301,0201,025,0,
+ /* 16717 */ 0321,01,0301,0201,025,0,
+ /* 16723 */ 0324,01,0301,0201,025,0,
+ /* 16729 */ 0320,01,0301,0204,025,0,
+ /* 16735 */ 0321,01,0301,0204,025,0,
+ /* 16741 */ 0324,01,0301,0204,025,0,
+ /* 16747 */ 0320,01,0301,0207,025,0,
+ /* 16753 */ 0321,01,0301,0207,025,0,
+ /* 16759 */ 0324,01,0301,0207,025,0,
+ /* 16765 */ 0273,0320,01,031,0101,0,
+ /* 16771 */ 0273,0321,01,031,0101,0,
+ /* 16777 */ 0273,0324,01,031,0101,0,
+ /* 16783 */ 0273,01,0200,0203,021,0,
+ /* 16789 */ 0273,01,0202,0203,021,0,
+ /* 16795 */ 0320,02,017,0245,0101,0,
+ /* 16801 */ 0321,02,017,0245,0101,0,
+ /* 16807 */ 0324,02,017,0245,0101,0,
+ /* 16813 */ 0320,01,0301,0205,025,0,
+ /* 16819 */ 0321,01,0301,0205,025,0,
+ /* 16825 */ 0324,01,0301,0205,025,0,
+ /* 16831 */ 0320,02,017,0255,0101,0,
+ /* 16837 */ 0321,02,017,0255,0101,0,
+ /* 16843 */ 0324,02,017,0255,0101,0,
+ /* 16849 */ 0320,02,017,0,0200,0,
+ /* 16855 */ 0321,02,017,0,0200,0,
+ /* 16861 */ 0323,02,017,0,0200,0,
+ /* 16867 */ 0324,02,017,0,0200,0,
+ /* 16873 */ 0320,02,017,01,0204,0,
+ /* 16879 */ 0321,02,017,01,0204,0,
+ /* 16885 */ 0320,02,017,0,0201,0,
+ /* 16891 */ 0321,02,017,0,0201,0,
+ /* 16897 */ 0324,02,017,0,0201,0,
+ /* 16903 */ 0273,0320,01,051,0101,0,
+ /* 16909 */ 0273,0321,01,051,0101,0,
+ /* 16915 */ 0273,0324,01,051,0101,0,
+ /* 16921 */ 0273,01,0200,0205,021,0,
+ /* 16927 */ 0273,01,0202,0205,021,0,
+ /* 16933 */ 0320,01,0367,0200,031,0,
+ /* 16939 */ 0321,01,0367,0200,041,0,
+ /* 16945 */ 0324,01,0367,0200,0255,0,
+ /* 16951 */ 0360,02,017,020,0101,0,
+ /* 16957 */ 0360,02,017,022,0110,0,
+ /* 16963 */ 0321,02,017,067,0200,0,
+ /* 16969 */ 0273,02,017,0300,0101,0,
+ /* 16975 */ 0320,02,017,0246,0110,0,
+ /* 16981 */ 0321,02,017,0246,0110,0,
+ /* 16987 */ 0272,0320,01,0207,0110,0,
+ /* 16993 */ 0272,0321,01,0207,0110,0,
+ /* 16999 */ 0272,0324,01,0207,0110,0,
+ /* 17005 */ 0272,0320,01,0207,0101,0,
+ /* 17011 */ 0272,0321,01,0207,0101,0,
+ /* 17017 */ 0272,0324,01,0207,0101,0,
+ /* 17023 */ 0273,0320,01,061,0101,0,
+ /* 17029 */ 0273,0321,01,061,0101,0,
+ /* 17035 */ 0273,0324,01,061,0101,0,
+ /* 17041 */ 0273,01,0200,0206,021,0,
+ /* 17047 */ 0273,01,0202,0206,021,0,
+ /* 17053 */ 01,017,0330,0220,0200,0,
+ /* 17059 */ 0360,02,017,0130,0110,0,
+ /* 17065 */ 0363,02,017,0130,0110,0,
+ /* 17071 */ 0360,02,017,0125,0110,0,
+ /* 17077 */ 0360,02,017,0124,0110,0,
+ /* 17083 */ 0360,02,017,057,0110,0,
+ /* 17089 */ 0360,02,017,052,0110,0,
+ /* 17095 */ 0360,02,017,055,0110,0,
+ /* 17101 */ 0360,02,017,054,0110,0,
+ /* 17107 */ 0360,02,017,0136,0110,0,
+ /* 17113 */ 0363,02,017,0136,0110,0,
+ /* 17119 */ 0360,02,017,0137,0110,0,
+ /* 17125 */ 0363,02,017,0137,0110,0,
+ /* 17131 */ 0360,02,017,0135,0110,0,
+ /* 17137 */ 0363,02,017,0135,0110,0,
+ /* 17143 */ 0360,02,017,050,0110,0,
+ /* 17149 */ 0360,02,017,051,0101,0,
+ /* 17155 */ 0360,02,017,026,0110,0,
+ /* 17161 */ 0360,02,017,027,0101,0,
+ /* 17167 */ 0360,02,017,023,0101,0,
+ /* 17173 */ 0360,02,017,0120,0110,0,
+ /* 17179 */ 0360,02,017,053,0101,0,
+ /* 17185 */ 0363,02,017,020,0110,0,
+ /* 17191 */ 0363,02,017,021,0101,0,
+ /* 17197 */ 0360,02,017,020,0110,0,
+ /* 17203 */ 0360,02,017,021,0101,0,
+ /* 17209 */ 0360,02,017,0131,0110,0,
+ /* 17215 */ 0363,02,017,0131,0110,0,
+ /* 17221 */ 0360,02,017,0126,0110,0,
+ /* 17227 */ 0360,02,017,0123,0110,0,
+ /* 17233 */ 0363,02,017,0123,0110,0,
+ /* 17239 */ 0360,02,017,0122,0110,0,
+ /* 17245 */ 0363,02,017,0122,0110,0,
+ /* 17251 */ 0360,02,017,0121,0110,0,
+ /* 17257 */ 0363,02,017,0121,0110,0,
+ /* 17263 */ 0360,02,017,0134,0110,0,
+ /* 17269 */ 0363,02,017,0134,0110,0,
+ /* 17275 */ 0360,02,017,056,0110,0,
+ /* 17281 */ 0360,02,017,025,0110,0,
+ /* 17287 */ 0360,02,017,024,0110,0,
+ /* 17293 */ 0360,02,017,0127,0110,0,
+ /* 17299 */ 0324,02,017,0256,0201,0,
+ /* 17305 */ 0324,02,017,0256,0200,0,
+ /* 17311 */ 0360,03,017,01,0320,0,
+ /* 17317 */ 0360,03,017,01,0321,0,
+ /* 17323 */ 0324,02,017,0256,0204,0,
+ /* 17329 */ 0324,02,017,0256,0206,0,
+ /* 17335 */ 0324,02,017,0256,0205,0,
+ /* 17341 */ 0360,02,017,0367,0110,0,
+ /* 17347 */ 0360,02,017,0347,0101,0,
+ /* 17353 */ 0360,02,017,0327,0110,0,
+ /* 17359 */ 0361,02,017,0367,0110,0,
+ /* 17365 */ 0361,02,017,0347,0101,0,
+ /* 17371 */ 0361,02,017,053,0101,0,
+ /* 17377 */ 0361,02,017,0157,0110,0,
+ /* 17383 */ 0361,02,017,0177,0101,0,
+ /* 17389 */ 0363,02,017,0157,0110,0,
+ /* 17395 */ 0363,02,017,0177,0101,0,
+ /* 17401 */ 0362,02,017,0326,0110,0,
+ /* 17407 */ 0363,02,017,0176,0110,0,
+ /* 17413 */ 0361,02,017,0326,0101,0,
+ /* 17419 */ 0363,02,017,0326,0110,0,
+ /* 17425 */ 0361,02,017,0143,0110,0,
+ /* 17431 */ 0361,02,017,0153,0110,0,
+ /* 17437 */ 0361,02,017,0147,0110,0,
+ /* 17443 */ 0361,02,017,0374,0110,0,
+ /* 17449 */ 0361,02,017,0375,0110,0,
+ /* 17455 */ 0361,02,017,0376,0110,0,
+ /* 17461 */ 0360,02,017,0324,0110,0,
+ /* 17467 */ 0361,02,017,0324,0110,0,
+ /* 17473 */ 0361,02,017,0354,0110,0,
+ /* 17479 */ 0361,02,017,0355,0110,0,
+ /* 17485 */ 0361,02,017,0334,0110,0,
+ /* 17491 */ 0361,02,017,0335,0110,0,
+ /* 17497 */ 0361,02,017,0333,0110,0,
+ /* 17503 */ 0361,02,017,0337,0110,0,
+ /* 17509 */ 0361,02,017,0340,0110,0,
+ /* 17515 */ 0361,02,017,0343,0110,0,
+ /* 17521 */ 0361,02,017,0164,0110,0,
+ /* 17527 */ 0361,02,017,0165,0110,0,
+ /* 17533 */ 0361,02,017,0166,0110,0,
+ /* 17539 */ 0361,02,017,0144,0110,0,
+ /* 17545 */ 0361,02,017,0145,0110,0,
+ /* 17551 */ 0361,02,017,0146,0110,0,
+ /* 17557 */ 0361,02,017,0365,0110,0,
+ /* 17563 */ 0361,02,017,0356,0110,0,
+ /* 17569 */ 0361,02,017,0336,0110,0,
+ /* 17575 */ 0361,02,017,0352,0110,0,
+ /* 17581 */ 0361,02,017,0332,0110,0,
+ /* 17587 */ 0361,02,017,0327,0110,0,
+ /* 17593 */ 0361,02,017,0344,0110,0,
+ /* 17599 */ 0361,02,017,0345,0110,0,
+ /* 17605 */ 0361,02,017,0325,0110,0,
+ /* 17611 */ 0361,02,017,0364,0110,0,
+ /* 17617 */ 0361,02,017,0353,0110,0,
+ /* 17623 */ 0361,02,017,0366,0110,0,
+ /* 17629 */ 0361,02,017,0361,0110,0,
+ /* 17635 */ 0361,02,017,0362,0110,0,
+ /* 17641 */ 0361,02,017,0363,0110,0,
+ /* 17647 */ 0361,02,017,0341,0110,0,
+ /* 17653 */ 0361,02,017,0342,0110,0,
+ /* 17659 */ 0361,02,017,0321,0110,0,
+ /* 17665 */ 0361,02,017,0322,0110,0,
+ /* 17671 */ 0361,02,017,0323,0110,0,
+ /* 17677 */ 0361,02,017,0370,0110,0,
+ /* 17683 */ 0361,02,017,0371,0110,0,
+ /* 17689 */ 0361,02,017,0372,0110,0,
+ /* 17695 */ 0361,02,017,0373,0110,0,
+ /* 17701 */ 0361,02,017,0350,0110,0,
+ /* 17707 */ 0361,02,017,0351,0110,0,
+ /* 17713 */ 0361,02,017,0330,0110,0,
+ /* 17719 */ 0361,02,017,0331,0110,0,
+ /* 17725 */ 0361,02,017,0150,0110,0,
+ /* 17731 */ 0361,02,017,0151,0110,0,
+ /* 17737 */ 0361,02,017,0152,0110,0,
+ /* 17743 */ 0361,02,017,0155,0110,0,
+ /* 17749 */ 0361,02,017,0140,0110,0,
+ /* 17755 */ 0361,02,017,0141,0110,0,
+ /* 17761 */ 0361,02,017,0142,0110,0,
+ /* 17767 */ 0361,02,017,0154,0110,0,
+ /* 17773 */ 0361,02,017,0357,0110,0,
+ /* 17779 */ 0361,02,017,0130,0110,0,
+ /* 17785 */ 0362,02,017,0130,0110,0,
+ /* 17791 */ 0361,02,017,0125,0110,0,
+ /* 17797 */ 0361,02,017,0124,0110,0,
+ /* 17803 */ 0361,02,017,057,0110,0,
+ /* 17809 */ 0363,02,017,0346,0110,0,
+ /* 17815 */ 0360,02,017,0133,0110,0,
+ /* 17821 */ 0362,02,017,0346,0110,0,
+ /* 17827 */ 0361,02,017,055,0110,0,
+ /* 17833 */ 0361,02,017,0132,0110,0,
+ /* 17839 */ 0361,02,017,052,0110,0,
+ /* 17845 */ 0361,02,017,0133,0110,0,
+ /* 17851 */ 0360,02,017,0132,0110,0,
+ /* 17857 */ 0362,02,017,0132,0110,0,
+ /* 17863 */ 0363,02,017,0132,0110,0,
+ /* 17869 */ 0361,02,017,054,0110,0,
+ /* 17875 */ 0361,02,017,0346,0110,0,
+ /* 17881 */ 0363,02,017,0133,0110,0,
+ /* 17887 */ 0361,02,017,0136,0110,0,
+ /* 17893 */ 0362,02,017,0136,0110,0,
+ /* 17899 */ 0361,02,017,0137,0110,0,
+ /* 17905 */ 0362,02,017,0137,0110,0,
+ /* 17911 */ 0361,02,017,0135,0110,0,
+ /* 17917 */ 0362,02,017,0135,0110,0,
+ /* 17923 */ 0361,02,017,050,0110,0,
+ /* 17929 */ 0361,02,017,051,0101,0,
+ /* 17935 */ 0361,02,017,027,0101,0,
+ /* 17941 */ 0361,02,017,026,0110,0,
+ /* 17947 */ 0361,02,017,023,0101,0,
+ /* 17953 */ 0361,02,017,022,0110,0,
+ /* 17959 */ 0361,02,017,0120,0110,0,
+ /* 17965 */ 0362,02,017,020,0110,0,
+ /* 17971 */ 0362,02,017,021,0101,0,
+ /* 17977 */ 0361,02,017,020,0110,0,
+ /* 17983 */ 0361,02,017,021,0101,0,
+ /* 17989 */ 0361,02,017,0131,0110,0,
+ /* 17995 */ 0362,02,017,0131,0110,0,
+ /* 18001 */ 0361,02,017,0126,0110,0,
+ /* 18007 */ 0361,02,017,0121,0110,0,
+ /* 18013 */ 0362,02,017,0121,0110,0,
+ /* 18019 */ 0361,02,017,0134,0110,0,
+ /* 18025 */ 0362,02,017,0134,0110,0,
+ /* 18031 */ 0361,02,017,056,0110,0,
+ /* 18037 */ 0361,02,017,025,0110,0,
+ /* 18043 */ 0361,02,017,024,0110,0,
+ /* 18049 */ 0361,02,017,0127,0110,0,
+ /* 18055 */ 0361,02,017,0320,0110,0,
+ /* 18061 */ 0362,02,017,0320,0110,0,
+ /* 18067 */ 0361,02,017,0174,0110,0,
+ /* 18073 */ 0362,02,017,0174,0110,0,
+ /* 18079 */ 0361,02,017,0175,0110,0,
+ /* 18085 */ 0362,02,017,0175,0110,0,
+ /* 18091 */ 0362,02,017,0360,0110,0,
+ /* 18097 */ 0362,02,017,022,0110,0,
+ /* 18103 */ 0363,02,017,026,0110,0,
+ /* 18109 */ 0363,02,017,022,0110,0,
+ /* 18115 */ 0361,02,017,0307,0206,0,
+ /* 18121 */ 0363,02,017,0307,0206,0,
+ /* 18127 */ 0361,02,017,0171,0110,0,
+ /* 18133 */ 0362,02,017,0171,0110,0,
+ /* 18139 */ 0362,02,017,053,0101,0,
+ /* 18145 */ 0363,02,017,053,0101,0,
+ /* 18151 */ 0270,01,04,01,0167,0,
+ /* 18157 */ 0270,01,0,01,0167,0,
+ /* 18163 */ 0320,02,017,0307,0206,0,
+ /* 18169 */ 0321,02,017,0307,0206,0,
+ /* 18175 */ 0324,02,017,0307,0206,0,
+ /* 18181 */ 0320,02,017,0307,0207,0,
+ /* 18187 */ 0321,02,017,0307,0207,0,
+ /* 18193 */ 0324,02,017,0307,0207,0,
+ /* 18199 */ 0336,03,017,0247,0310,0,
+ /* 18205 */ 0336,03,017,0247,0320,0,
+ /* 18211 */ 0336,03,017,0247,0330,0,
+ /* 18217 */ 0336,03,017,0247,0340,0,
+ /* 18223 */ 0336,03,017,0247,0350,0,
+ /* 18229 */ 0336,03,017,0246,0300,0,
+ /* 18235 */ 0336,03,017,0246,0310,0,
+ /* 18241 */ 0336,03,017,0246,0320,0,
+ /* 18247 */ 0322,02,0307,0370,064,0,
+ /* 18253 */ 0320,02,0307,0370,064,0,
+ /* 18259 */ 0321,02,0307,0370,064,0,
+ /* 18265 */ 0320,02,017,030,0200,0,
+ /* 18271 */ 0321,02,017,030,0200,0,
+ /* 18277 */ 0324,02,017,030,0200,0,
+ /* 18283 */ 0320,02,017,030,0201,0,
+ /* 18289 */ 0321,02,017,030,0201,0,
+ /* 18295 */ 0324,02,017,030,0201,0,
+ /* 18301 */ 0320,02,017,030,0202,0,
+ /* 18307 */ 0321,02,017,030,0202,0,
+ /* 18313 */ 0324,02,017,030,0202,0,
+ /* 18319 */ 0320,02,017,030,0203,0,
+ /* 18325 */ 0321,02,017,030,0203,0,
+ /* 18331 */ 0324,02,017,030,0203,0,
+ /* 18337 */ 0320,02,017,030,0204,0,
+ /* 18343 */ 0321,02,017,030,0204,0,
+ /* 18349 */ 0324,02,017,030,0204,0,
+ /* 18355 */ 0320,02,017,030,0205,0,
+ /* 18361 */ 0321,02,017,030,0205,0,
+ /* 18367 */ 0324,02,017,030,0205,0,
+ /* 18373 */ 0320,02,017,030,0206,0,
+ /* 18379 */ 0321,02,017,030,0206,0,
+ /* 18385 */ 0324,02,017,030,0206,0,
+ /* 18391 */ 0320,02,017,030,0207,0,
+ /* 18397 */ 0321,02,017,030,0207,0,
+ /* 18403 */ 0324,02,017,030,0207,0,
+ /* 18409 */ 0320,02,017,031,0200,0,
+ /* 18415 */ 0321,02,017,031,0200,0,
+ /* 18421 */ 0324,02,017,031,0200,0,
+ /* 18427 */ 0320,02,017,031,0201,0,
+ /* 18433 */ 0321,02,017,031,0201,0,
+ /* 18439 */ 0324,02,017,031,0201,0,
+ /* 18445 */ 0320,02,017,031,0202,0,
+ /* 18451 */ 0321,02,017,031,0202,0,
+ /* 18457 */ 0324,02,017,031,0202,0,
+ /* 18463 */ 0320,02,017,031,0203,0,
+ /* 18469 */ 0321,02,017,031,0203,0,
+ /* 18475 */ 0324,02,017,031,0203,0,
+ /* 18481 */ 0320,02,017,031,0204,0,
+ /* 18487 */ 0321,02,017,031,0204,0,
+ /* 18493 */ 0324,02,017,031,0204,0,
+ /* 18499 */ 0320,02,017,031,0205,0,
+ /* 18505 */ 0321,02,017,031,0205,0,
+ /* 18511 */ 0324,02,017,031,0205,0,
+ /* 18517 */ 0320,02,017,031,0206,0,
+ /* 18523 */ 0321,02,017,031,0206,0,
+ /* 18529 */ 0324,02,017,031,0206,0,
+ /* 18535 */ 0320,02,017,031,0207,0,
+ /* 18541 */ 0321,02,017,031,0207,0,
+ /* 18547 */ 0324,02,017,031,0207,0,
+ /* 18553 */ 0320,02,017,032,0200,0,
+ /* 18559 */ 0321,02,017,032,0200,0,
+ /* 18565 */ 0324,02,017,032,0200,0,
+ /* 18571 */ 0320,02,017,032,0201,0,
+ /* 18577 */ 0321,02,017,032,0201,0,
+ /* 18583 */ 0324,02,017,032,0201,0,
+ /* 18589 */ 0320,02,017,032,0202,0,
+ /* 18595 */ 0321,02,017,032,0202,0,
+ /* 18601 */ 0324,02,017,032,0202,0,
+ /* 18607 */ 0320,02,017,032,0203,0,
+ /* 18613 */ 0321,02,017,032,0203,0,
+ /* 18619 */ 0324,02,017,032,0203,0,
+ /* 18625 */ 0320,02,017,032,0204,0,
+ /* 18631 */ 0321,02,017,032,0204,0,
+ /* 18637 */ 0324,02,017,032,0204,0,
+ /* 18643 */ 0320,02,017,032,0205,0,
+ /* 18649 */ 0321,02,017,032,0205,0,
+ /* 18655 */ 0324,02,017,032,0205,0,
+ /* 18661 */ 0320,02,017,032,0206,0,
+ /* 18667 */ 0321,02,017,032,0206,0,
+ /* 18673 */ 0324,02,017,032,0206,0,
+ /* 18679 */ 0320,02,017,032,0207,0,
+ /* 18685 */ 0321,02,017,032,0207,0,
+ /* 18691 */ 0324,02,017,032,0207,0,
+ /* 18697 */ 0320,02,017,033,0200,0,
+ /* 18703 */ 0321,02,017,033,0200,0,
+ /* 18709 */ 0324,02,017,033,0200,0,
+ /* 18715 */ 0320,02,017,033,0201,0,
+ /* 18721 */ 0321,02,017,033,0201,0,
+ /* 18727 */ 0324,02,017,033,0201,0,
+ /* 18733 */ 0320,02,017,033,0202,0,
+ /* 18739 */ 0321,02,017,033,0202,0,
+ /* 18745 */ 0324,02,017,033,0202,0,
+ /* 18751 */ 0320,02,017,033,0203,0,
+ /* 18757 */ 0321,02,017,033,0203,0,
+ /* 18763 */ 0324,02,017,033,0203,0,
+ /* 18769 */ 0320,02,017,033,0204,0,
+ /* 18775 */ 0321,02,017,033,0204,0,
+ /* 18781 */ 0324,02,017,033,0204,0,
+ /* 18787 */ 0320,02,017,033,0205,0,
+ /* 18793 */ 0321,02,017,033,0205,0,
+ /* 18799 */ 0324,02,017,033,0205,0,
+ /* 18805 */ 0320,02,017,033,0206,0,
+ /* 18811 */ 0321,02,017,033,0206,0,
+ /* 18817 */ 0324,02,017,033,0206,0,
+ /* 18823 */ 0320,02,017,033,0207,0,
+ /* 18829 */ 0321,02,017,033,0207,0,
+ /* 18835 */ 0324,02,017,033,0207,0,
+ /* 18841 */ 0320,02,017,034,0200,0,
+ /* 18847 */ 0321,02,017,034,0200,0,
+ /* 18853 */ 0324,02,017,034,0200,0,
+ /* 18859 */ 0320,02,017,034,0201,0,
+ /* 18865 */ 0321,02,017,034,0201,0,
+ /* 18871 */ 0324,02,017,034,0201,0,
+ /* 18877 */ 0320,02,017,034,0202,0,
+ /* 18883 */ 0321,02,017,034,0202,0,
+ /* 18889 */ 0324,02,017,034,0202,0,
+ /* 18895 */ 0320,02,017,034,0203,0,
+ /* 18901 */ 0321,02,017,034,0203,0,
+ /* 18907 */ 0324,02,017,034,0203,0,
+ /* 18913 */ 0320,02,017,034,0204,0,
+ /* 18919 */ 0321,02,017,034,0204,0,
+ /* 18925 */ 0324,02,017,034,0204,0,
+ /* 18931 */ 0320,02,017,034,0205,0,
+ /* 18937 */ 0321,02,017,034,0205,0,
+ /* 18943 */ 0324,02,017,034,0205,0,
+ /* 18949 */ 0320,02,017,034,0206,0,
+ /* 18955 */ 0321,02,017,034,0206,0,
+ /* 18961 */ 0324,02,017,034,0206,0,
+ /* 18967 */ 0320,02,017,034,0207,0,
+ /* 18973 */ 0321,02,017,034,0207,0,
+ /* 18979 */ 0324,02,017,034,0207,0,
+ /* 18985 */ 0320,02,017,035,0200,0,
+ /* 18991 */ 0321,02,017,035,0200,0,
+ /* 18997 */ 0324,02,017,035,0200,0,
+ /* 19003 */ 0320,02,017,035,0201,0,
+ /* 19009 */ 0321,02,017,035,0201,0,
+ /* 19015 */ 0324,02,017,035,0201,0,
+ /* 19021 */ 0320,02,017,035,0202,0,
+ /* 19027 */ 0321,02,017,035,0202,0,
+ /* 19033 */ 0324,02,017,035,0202,0,
+ /* 19039 */ 0320,02,017,035,0203,0,
+ /* 19045 */ 0321,02,017,035,0203,0,
+ /* 19051 */ 0324,02,017,035,0203,0,
+ /* 19057 */ 0320,02,017,035,0204,0,
+ /* 19063 */ 0321,02,017,035,0204,0,
+ /* 19069 */ 0324,02,017,035,0204,0,
+ /* 19075 */ 0320,02,017,035,0205,0,
+ /* 19081 */ 0321,02,017,035,0205,0,
+ /* 19087 */ 0324,02,017,035,0205,0,
+ /* 19093 */ 0320,02,017,035,0206,0,
+ /* 19099 */ 0321,02,017,035,0206,0,
+ /* 19105 */ 0324,02,017,035,0206,0,
+ /* 19111 */ 0320,02,017,035,0207,0,
+ /* 19117 */ 0321,02,017,035,0207,0,
+ /* 19123 */ 0324,02,017,035,0207,0,
+ /* 19129 */ 0320,02,017,036,0200,0,
+ /* 19135 */ 0321,02,017,036,0200,0,
+ /* 19141 */ 0324,02,017,036,0200,0,
+ /* 19147 */ 0320,02,017,036,0201,0,
+ /* 19153 */ 0321,02,017,036,0201,0,
+ /* 19159 */ 0324,02,017,036,0201,0,
+ /* 19165 */ 0320,02,017,036,0202,0,
+ /* 19171 */ 0321,02,017,036,0202,0,
+ /* 19177 */ 0324,02,017,036,0202,0,
+ /* 19183 */ 0320,02,017,036,0203,0,
+ /* 19189 */ 0321,02,017,036,0203,0,
+ /* 19195 */ 0324,02,017,036,0203,0,
+ /* 19201 */ 0320,02,017,036,0204,0,
+ /* 19207 */ 0321,02,017,036,0204,0,
+ /* 19213 */ 0324,02,017,036,0204,0,
+ /* 19219 */ 0320,02,017,036,0205,0,
+ /* 19225 */ 0321,02,017,036,0205,0,
+ /* 19231 */ 0324,02,017,036,0205,0,
+ /* 19237 */ 0320,02,017,036,0206,0,
+ /* 19243 */ 0321,02,017,036,0206,0,
+ /* 19249 */ 0324,02,017,036,0206,0,
+ /* 19255 */ 0320,02,017,036,0207,0,
+ /* 19261 */ 0321,02,017,036,0207,0,
+ /* 19267 */ 0324,02,017,036,0207,0,
+ /* 19273 */ 0320,02,017,037,0201,0,
+ /* 19279 */ 0321,02,017,037,0201,0,
+ /* 19285 */ 0324,02,017,037,0201,0,
+ /* 19291 */ 0320,02,017,037,0202,0,
+ /* 19297 */ 0321,02,017,037,0202,0,
+ /* 19303 */ 0324,02,017,037,0202,0,
+ /* 19309 */ 0320,02,017,037,0203,0,
+ /* 19315 */ 0321,02,017,037,0203,0,
+ /* 19321 */ 0324,02,017,037,0203,0,
+ /* 19327 */ 0320,02,017,037,0204,0,
+ /* 19333 */ 0321,02,017,037,0204,0,
+ /* 19339 */ 0324,02,017,037,0204,0,
+ /* 19345 */ 0320,02,017,037,0205,0,
+ /* 19351 */ 0321,02,017,037,0205,0,
+ /* 19357 */ 0324,02,017,037,0205,0,
+ /* 19363 */ 0320,02,017,037,0206,0,
+ /* 19369 */ 0321,02,017,037,0206,0,
+ /* 19375 */ 0324,02,017,037,0206,0,
+ /* 19381 */ 0320,02,017,037,0207,0,
+ /* 19387 */ 0321,02,017,037,0207,0,
+ /* 19393 */ 0324,02,017,037,0207,0,
+ /* 19399 */ 0273,01,020,0101,0,
+ /* 19404 */ 0320,01,023,0110,0,
+ /* 19409 */ 0321,01,023,0110,0,
+ /* 19414 */ 0324,01,023,0110,0,
+ /* 19419 */ 0320,01,025,031,0,
+ /* 19424 */ 0321,01,025,041,0,
+ /* 19429 */ 0324,01,025,0255,0,
+ /* 19434 */ 0273,01,0,0101,0,
+ /* 19439 */ 0320,01,03,0110,0,
+ /* 19444 */ 0321,01,03,0110,0,
+ /* 19449 */ 0324,01,03,0110,0,
+ /* 19454 */ 0320,01,05,031,0,
+ /* 19459 */ 0321,01,05,041,0,
+ /* 19464 */ 0324,01,05,0255,0,
+ /* 19469 */ 0273,01,040,0101,0,
+ /* 19474 */ 0320,01,043,0110,0,
+ /* 19479 */ 0321,01,043,0110,0,
+ /* 19484 */ 0324,01,043,0110,0,
+ /* 19489 */ 0320,01,045,031,0,
+ /* 19494 */ 0321,01,045,041,0,
+ /* 19499 */ 0324,01,045,0255,0,
+ /* 19504 */ 0320,01,0142,0110,0,
+ /* 19509 */ 0321,01,0142,0110,0,
+ /* 19514 */ 0322,01,0350,064,0,
+ /* 19519 */ 0320,01,0350,064,0,
+ /* 19524 */ 0321,01,0350,064,0,
+ /* 19529 */ 0322,01,0377,0203,0,
+ /* 19534 */ 0324,01,0377,0203,0,
+ /* 19539 */ 0320,01,0377,0203,0,
+ /* 19544 */ 0321,01,0377,0203,0,
+ /* 19549 */ 0322,01,0377,0202,0,
+ /* 19554 */ 0320,01,0377,0202,0,
+ /* 19559 */ 0321,01,0377,0202,0,
+ /* 19564 */ 0323,01,0377,0202,0,
+ /* 19569 */ 03,017,01,0335,0,
+ /* 19574 */ 0320,01,071,0101,0,
+ /* 19579 */ 0321,01,071,0101,0,
+ /* 19584 */ 0324,01,071,0101,0,
+ /* 19589 */ 0320,01,073,0110,0,
+ /* 19594 */ 0321,01,073,0110,0,
+ /* 19599 */ 0324,01,073,0110,0,
+ /* 19604 */ 0320,01,075,031,0,
+ /* 19609 */ 0321,01,075,041,0,
+ /* 19614 */ 0324,01,075,0255,0,
+ /* 19619 */ 01,0200,0207,021,0,
+ /* 19624 */ 01,0202,0207,021,0,
+ /* 19629 */ 0335,0321,01,0247,0,
+ /* 19634 */ 0335,0324,01,0247,0,
+ /* 19639 */ 0335,0320,01,0247,0,
+ /* 19644 */ 02,017,0246,0101,0,
+ /* 19649 */ 0273,01,0376,0201,0,
+ /* 19654 */ 0320,01,0367,0206,0,
+ /* 19659 */ 0321,01,0367,0206,0,
+ /* 19664 */ 0324,01,0367,0206,0,
+ /* 19669 */ 01,0310,030,025,0,
+ /* 19674 */ 01,0334,010,0300,0,
+ /* 19679 */ 01,0330,010,0300,0,
+ /* 19684 */ 01,0330,011,0300,0,
+ /* 19689 */ 01,0336,010,0300,0,
+ /* 19694 */ 0341,02,0333,0342,0,
+ /* 19699 */ 01,0332,010,0300,0,
+ /* 19704 */ 01,0332,011,0300,0,
+ /* 19709 */ 01,0332,010,0320,0,
+ /* 19714 */ 01,0332,011,0320,0,
+ /* 19719 */ 01,0332,010,0310,0,
+ /* 19724 */ 01,0332,011,0310,0,
+ /* 19729 */ 01,0333,010,0300,0,
+ /* 19734 */ 01,0333,011,0300,0,
+ /* 19739 */ 01,0333,010,0320,0,
+ /* 19744 */ 01,0333,011,0320,0,
+ /* 19749 */ 01,0333,010,0310,0,
+ /* 19754 */ 01,0333,011,0310,0,
+ /* 19759 */ 01,0333,010,0330,0,
+ /* 19764 */ 01,0333,011,0330,0,
+ /* 19769 */ 01,0332,010,0330,0,
+ /* 19774 */ 01,0332,011,0330,0,
+ /* 19779 */ 01,0330,010,0320,0,
+ /* 19784 */ 01,0330,011,0320,0,
+ /* 19789 */ 01,0333,010,0360,0,
+ /* 19794 */ 01,0333,011,0360,0,
+ /* 19799 */ 01,0337,010,0360,0,
+ /* 19804 */ 01,0337,011,0360,0,
+ /* 19809 */ 01,0330,010,0330,0,
+ /* 19814 */ 01,0330,011,0330,0,
+ /* 19819 */ 0341,02,0333,0341,0,
+ /* 19824 */ 01,0334,010,0370,0,
+ /* 19829 */ 01,0330,010,0360,0,
+ /* 19834 */ 01,0330,011,0360,0,
+ /* 19839 */ 01,0336,010,0370,0,
+ /* 19844 */ 01,0334,010,0360,0,
+ /* 19849 */ 01,0330,010,0370,0,
+ /* 19854 */ 01,0330,011,0370,0,
+ /* 19859 */ 01,0336,010,0360,0,
+ /* 19864 */ 0341,02,0333,0340,0,
+ /* 19869 */ 01,0335,010,0300,0,
+ /* 19874 */ 01,0337,010,0300,0,
+ /* 19879 */ 0341,02,0333,0343,0,
+ /* 19884 */ 01,0331,010,0300,0,
+ /* 19889 */ 01,0334,010,0310,0,
+ /* 19894 */ 01,0330,010,0310,0,
+ /* 19899 */ 01,0330,011,0310,0,
+ /* 19904 */ 01,0336,010,0310,0,
+ /* 19909 */ 0341,01,0335,0206,0,
+ /* 19914 */ 01,0335,010,0320,0,
+ /* 19919 */ 0341,01,0331,0207,0,
+ /* 19924 */ 0341,01,0331,0206,0,
+ /* 19929 */ 01,0335,010,0330,0,
+ /* 19934 */ 0341,01,0335,0207,0,
+ /* 19939 */ 0341,02,0337,0340,0,
+ /* 19944 */ 01,0334,010,0350,0,
+ /* 19949 */ 01,0330,010,0340,0,
+ /* 19954 */ 01,0330,011,0340,0,
+ /* 19959 */ 01,0336,010,0350,0,
+ /* 19964 */ 01,0334,010,0340,0,
+ /* 19969 */ 01,0330,010,0350,0,
+ /* 19974 */ 01,0330,011,0350,0,
+ /* 19979 */ 01,0336,010,0340,0,
+ /* 19984 */ 01,0335,010,0340,0,
+ /* 19989 */ 01,0335,011,0340,0,
+ /* 19994 */ 01,0333,010,0350,0,
+ /* 19999 */ 01,0333,011,0350,0,
+ /* 20004 */ 01,0337,010,0350,0,
+ /* 20009 */ 01,0337,011,0350,0,
+ /* 20014 */ 01,0335,010,0350,0,
+ /* 20019 */ 01,0335,011,0350,0,
+ /* 20024 */ 01,0331,010,0310,0,
+ /* 20029 */ 01,0331,011,0310,0,
+ /* 20034 */ 0320,01,0367,0207,0,
+ /* 20039 */ 0321,01,0367,0207,0,
+ /* 20044 */ 0324,01,0367,0207,0,
+ /* 20049 */ 0320,01,0367,0205,0,
+ /* 20054 */ 0321,01,0367,0205,0,
+ /* 20059 */ 0324,01,0367,0205,0,
+ /* 20064 */ 0320,01,0345,025,0,
+ /* 20069 */ 0321,01,0345,025,0,
+ /* 20074 */ 0273,01,0376,0200,0,
+ /* 20079 */ 02,017,01,0207,0,
+ /* 20084 */ 0310,01,0343,050,0,
+ /* 20089 */ 0311,01,0343,050,0,
+ /* 20094 */ 0313,01,0343,050,0,
+ /* 20099 */ 0371,01,0353,050,0,
+ /* 20104 */ 0322,01,0351,064,0,
+ /* 20109 */ 0320,01,0351,064,0,
+ /* 20114 */ 0321,01,0351,064,0,
+ /* 20119 */ 0322,01,0377,0205,0,
+ /* 20124 */ 0324,01,0377,0205,0,
+ /* 20129 */ 0320,01,0377,0205,0,
+ /* 20134 */ 0321,01,0377,0205,0,
+ /* 20139 */ 0322,01,0377,0204,0,
+ /* 20144 */ 0320,01,0377,0204,0,
+ /* 20149 */ 0321,01,0377,0204,0,
+ /* 20154 */ 0323,01,0377,0204,0,
+ /* 20159 */ 0320,01,0305,0110,0,
+ /* 20164 */ 0321,01,0305,0110,0,
+ /* 20169 */ 0320,01,0215,0110,0,
+ /* 20174 */ 0321,01,0215,0110,0,
+ /* 20179 */ 0324,01,0215,0110,0,
+ /* 20184 */ 0320,01,0304,0110,0,
+ /* 20189 */ 0321,01,0304,0110,0,
+ /* 20194 */ 03,017,0256,0350,0,
+ /* 20199 */ 02,017,01,0202,0,
+ /* 20204 */ 02,017,01,0203,0,
+ /* 20209 */ 02,017,0,0202,0,
+ /* 20214 */ 02,017,01,0206,0,
+ /* 20219 */ 0312,01,0342,050,0,
+ /* 20224 */ 0310,01,0342,050,0,
+ /* 20229 */ 0311,01,0342,050,0,
+ /* 20234 */ 0313,01,0342,050,0,
+ /* 20239 */ 0312,01,0341,050,0,
+ /* 20244 */ 0310,01,0341,050,0,
+ /* 20249 */ 0311,01,0341,050,0,
+ /* 20254 */ 0313,01,0341,050,0,
+ /* 20259 */ 0312,01,0340,050,0,
+ /* 20264 */ 0310,01,0340,050,0,
+ /* 20269 */ 0311,01,0340,050,0,
+ /* 20274 */ 0313,01,0340,050,0,
+ /* 20279 */ 02,017,0,0203,0,
+ /* 20284 */ 03,017,0256,0360,0,
+ /* 20289 */ 03,017,01,0310,0,
+ /* 20294 */ 0320,01,0214,0101,0,
+ /* 20299 */ 0321,01,0214,0101,0,
+ /* 20304 */ 0323,01,0214,0101,0,
+ /* 20309 */ 0324,01,0214,0101,0,
+ /* 20314 */ 0323,01,0216,0110,0,
+ /* 20319 */ 0320,01,0216,0110,0,
+ /* 20324 */ 0321,01,0216,0110,0,
+ /* 20329 */ 0324,01,0216,0110,0,
+ /* 20334 */ 0320,01,0241,045,0,
+ /* 20339 */ 0321,01,0241,045,0,
+ /* 20344 */ 0324,01,0241,045,0,
+ /* 20349 */ 0320,01,0243,044,0,
+ /* 20354 */ 0321,01,0243,044,0,
+ /* 20359 */ 0324,01,0243,044,0,
+ /* 20364 */ 02,017,044,0101,0,
+ /* 20369 */ 02,017,046,0110,0,
+ /* 20374 */ 0271,01,0210,0101,0,
+ /* 20379 */ 0320,01,0213,0110,0,
+ /* 20384 */ 0321,01,0213,0110,0,
+ /* 20389 */ 0324,01,0213,0110,0,
+ /* 20394 */ 0320,010,0270,031,0,
+ /* 20399 */ 0321,010,0270,041,0,
+ /* 20404 */ 0323,010,0270,041,0,
+ /* 20409 */ 0324,010,0270,055,0,
+ /* 20414 */ 0324,01,0143,0110,0,
+ /* 20419 */ 0320,01,0367,0204,0,
+ /* 20424 */ 0321,01,0367,0204,0,
+ /* 20429 */ 0324,01,0367,0204,0,
+ /* 20434 */ 03,017,01,0311,0,
+ /* 20439 */ 0273,01,0366,0203,0,
+ /* 20444 */ 0273,01,0366,0202,0,
+ /* 20449 */ 0273,01,010,0101,0,
+ /* 20454 */ 0320,01,013,0110,0,
+ /* 20459 */ 0321,01,013,0110,0,
+ /* 20464 */ 0324,01,013,0110,0,
+ /* 20469 */ 0320,01,015,031,0,
+ /* 20474 */ 0321,01,015,041,0,
+ /* 20479 */ 0324,01,015,0255,0,
+ /* 20484 */ 0320,01,0347,024,0,
+ /* 20489 */ 0321,01,0347,024,0,
+ /* 20494 */ 0314,0333,01,0220,0,
+ /* 20499 */ 0320,01,0217,0200,0,
+ /* 20504 */ 0321,01,0217,0200,0,
+ /* 20509 */ 0323,01,0217,0200,0,
+ /* 20514 */ 02,017,015,0200,0,
+ /* 20519 */ 02,017,015,0201,0,
+ /* 20524 */ 0320,01,0377,0206,0,
+ /* 20529 */ 0321,01,0377,0206,0,
+ /* 20534 */ 0323,01,0377,0206,0,
+ /* 20539 */ 0320,0144,0150,0140,0,
+ /* 20544 */ 0321,0154,0150,0150,0,
+ /* 20549 */ 0323,0154,0150,0250,0,
+ /* 20554 */ 01,0300,0202,025,0,
+ /* 20559 */ 0320,01,0321,0202,0,
+ /* 20564 */ 0320,01,0323,0202,0,
+ /* 20569 */ 0321,01,0321,0202,0,
+ /* 20574 */ 0321,01,0323,0202,0,
+ /* 20579 */ 0324,01,0321,0202,0,
+ /* 20584 */ 0324,01,0323,0202,0,
+ /* 20589 */ 01,0300,0203,025,0,
+ /* 20594 */ 0320,01,0321,0203,0,
+ /* 20599 */ 0320,01,0323,0203,0,
+ /* 20604 */ 0321,01,0321,0203,0,
+ /* 20609 */ 0321,01,0323,0203,0,
+ /* 20614 */ 0324,01,0321,0203,0,
+ /* 20619 */ 0324,01,0323,0203,0,
+ /* 20624 */ 03,017,01,0371,0,
+ /* 20629 */ 01,0300,0200,025,0,
+ /* 20634 */ 0320,01,0321,0200,0,
+ /* 20639 */ 0320,01,0323,0200,0,
+ /* 20644 */ 0321,01,0321,0200,0,
+ /* 20649 */ 0321,01,0323,0200,0,
+ /* 20654 */ 0324,01,0321,0200,0,
+ /* 20659 */ 0324,01,0323,0200,0,
+ /* 20664 */ 01,0300,0201,025,0,
+ /* 20669 */ 0320,01,0321,0201,0,
+ /* 20674 */ 0320,01,0323,0201,0,
+ /* 20679 */ 0321,01,0321,0201,0,
+ /* 20684 */ 0321,01,0323,0201,0,
+ /* 20689 */ 0324,01,0321,0201,0,
+ /* 20694 */ 0324,01,0323,0201,0,
+ /* 20699 */ 02,017,0173,0200,0,
+ /* 20704 */ 02,017,0175,0200,0,
+ /* 20709 */ 01,0300,0204,025,0,
+ /* 20714 */ 0320,01,0321,0204,0,
+ /* 20719 */ 0320,01,0323,0204,0,
+ /* 20724 */ 0321,01,0321,0204,0,
+ /* 20729 */ 0321,01,0323,0204,0,
+ /* 20734 */ 0324,01,0321,0204,0,
+ /* 20739 */ 0324,01,0323,0204,0,
+ /* 20744 */ 01,0300,0207,025,0,
+ /* 20749 */ 0320,01,0321,0207,0,
+ /* 20754 */ 0320,01,0323,0207,0,
+ /* 20759 */ 0321,01,0321,0207,0,
+ /* 20764 */ 0321,01,0323,0207,0,
+ /* 20769 */ 0324,01,0321,0207,0,
+ /* 20774 */ 0324,01,0323,0207,0,
+ /* 20779 */ 0273,01,030,0101,0,
+ /* 20784 */ 0320,01,033,0110,0,
+ /* 20789 */ 0321,01,033,0110,0,
+ /* 20794 */ 0324,01,033,0110,0,
+ /* 20799 */ 0320,01,035,031,0,
+ /* 20804 */ 0321,01,035,041,0,
+ /* 20809 */ 0324,01,035,0255,0,
+ /* 20814 */ 0335,0321,01,0257,0,
+ /* 20819 */ 0335,0324,01,0257,0,
+ /* 20824 */ 0335,0320,01,0257,0,
+ /* 20829 */ 03,017,0256,0370,0,
+ /* 20834 */ 02,017,01,0200,0,
+ /* 20839 */ 01,0300,0205,025,0,
+ /* 20844 */ 0320,01,0321,0205,0,
+ /* 20849 */ 0320,01,0323,0205,0,
+ /* 20854 */ 0321,01,0321,0205,0,
+ /* 20859 */ 0321,01,0323,0205,0,
+ /* 20864 */ 0324,01,0321,0205,0,
+ /* 20869 */ 0324,01,0323,0205,0,
+ /* 20874 */ 02,017,01,0201,0,
+ /* 20879 */ 03,017,01,0336,0,
+ /* 20884 */ 03,017,01,0334,0,
+ /* 20889 */ 0273,01,050,0101,0,
+ /* 20894 */ 0320,01,053,0110,0,
+ /* 20899 */ 0321,01,053,0110,0,
+ /* 20904 */ 0324,01,053,0110,0,
+ /* 20909 */ 0320,01,055,031,0,
+ /* 20914 */ 0321,01,055,041,0,
+ /* 20919 */ 0324,01,055,0255,0,
+ /* 20924 */ 02,017,0172,0200,0,
+ /* 20929 */ 02,017,0174,0200,0,
+ /* 20934 */ 03,017,01,0370,0,
+ /* 20939 */ 0320,01,0205,0101,0,
+ /* 20944 */ 0321,01,0205,0101,0,
+ /* 20949 */ 0324,01,0205,0101,0,
+ /* 20954 */ 0320,01,0205,0110,0,
+ /* 20959 */ 0321,01,0205,0110,0,
+ /* 20964 */ 0324,01,0205,0110,0,
+ /* 20969 */ 0320,01,0251,031,0,
+ /* 20974 */ 0321,01,0251,041,0,
+ /* 20979 */ 0324,01,0251,0255,0,
+ /* 20984 */ 01,0366,0200,021,0,
+ /* 20989 */ 02,017,0,0204,0,
+ /* 20994 */ 02,017,0,0205,0,
+ /* 20999 */ 0272,01,0206,0110,0,
+ /* 21004 */ 0272,01,0206,0101,0,
+ /* 21009 */ 0273,01,060,0101,0,
+ /* 21014 */ 0320,01,063,0110,0,
+ /* 21019 */ 0321,01,063,0110,0,
+ /* 21024 */ 0324,01,063,0110,0,
+ /* 21029 */ 0320,01,065,031,0,
+ /* 21034 */ 0321,01,065,041,0,
+ /* 21039 */ 0324,01,065,0255,0,
+ /* 21044 */ 0370,0330,0160,050,0,
+ /* 21049 */ 02,017,0256,0207,0,
+ /* 21054 */ 03,017,01,0301,0,
+ /* 21059 */ 03,017,01,0324,0,
+ /* 21064 */ 03,017,01,0302,0,
+ /* 21069 */ 03,017,01,0332,0,
+ /* 21074 */ 03,017,01,0331,0,
+ /* 21079 */ 03,017,01,0303,0,
+ /* 21084 */ 03,017,01,0330,0,
+ /* 21089 */ 03,017,01,0333,0,
+ /* 21094 */ 03,017,01,0304,0,
+ /* 21099 */ 03,017,01,0312,0,
+ /* 21104 */ 03,017,01,0313,0,
+ /* 21109 */ 03,017,0247,0300,0,
+ /* 21114 */ 02,0306,0370,020,0,
+ /* 21119 */ 03,017,01,0325,0,
+ /* 21124 */ 03,017,01,0326,0,
+ /* 21129 */ 02,0325,012,0,
+ /* 21133 */ 01,0325,024,0,
+ /* 21137 */ 02,0324,012,0,
+ /* 21141 */ 01,0324,024,0,
+ /* 21145 */ 01,024,021,0,
+ /* 21149 */ 01,04,021,0,
+ /* 21153 */ 01,044,021,0,
+ /* 21157 */ 01,0143,0101,0,
+ /* 21161 */ 02,017,072,0,
+ /* 21165 */ 02,017,073,0,
+ /* 21169 */ 0320,01,0230,0,
+ /* 21173 */ 0321,01,0231,0,
+ /* 21177 */ 0324,01,0230,0,
+ /* 21181 */ 02,017,06,0,
+ /* 21185 */ 01,070,0101,0,
+ /* 21189 */ 01,074,021,0,
+ /* 21193 */ 0335,01,0246,0,
+ /* 21197 */ 02,017,0242,0,
+ /* 21201 */ 02,017,075,0,
+ /* 21205 */ 02,017,074,0,
+ /* 21209 */ 0324,01,0231,0,
+ /* 21213 */ 0320,01,0231,0,
+ /* 21217 */ 0321,01,0230,0,
+ /* 21221 */ 0320,010,0110,0,
+ /* 21225 */ 0321,010,0110,0,
+ /* 21229 */ 01,0366,0206,0,
+ /* 21233 */ 02,017,071,0,
+ /* 21237 */ 02,017,0167,0,
+ /* 21241 */ 02,0331,0360,0,
+ /* 21245 */ 02,0331,0341,0,
+ /* 21249 */ 01,0330,0200,0,
+ /* 21253 */ 01,0334,0200,0,
+ /* 21257 */ 02,0336,0301,0,
+ /* 21261 */ 01,0337,0204,0,
+ /* 21265 */ 01,0337,0206,0,
+ /* 21269 */ 02,0331,0340,0,
+ /* 21273 */ 02,0332,0301,0,
+ /* 21277 */ 02,0332,0321,0,
+ /* 21281 */ 02,0332,0311,0,
+ /* 21285 */ 02,0333,0301,0,
+ /* 21289 */ 02,0333,0321,0,
+ /* 21293 */ 02,0333,0311,0,
+ /* 21297 */ 02,0333,0331,0,
+ /* 21301 */ 02,0332,0331,0,
+ /* 21305 */ 01,0330,0202,0,
+ /* 21309 */ 01,0334,0202,0,
+ /* 21313 */ 02,0330,0321,0,
+ /* 21317 */ 02,0333,0361,0,
+ /* 21321 */ 02,0337,0361,0,
+ /* 21325 */ 01,0330,0203,0,
+ /* 21329 */ 01,0334,0203,0,
+ /* 21333 */ 02,0330,0331,0,
+ /* 21337 */ 02,0336,0331,0,
+ /* 21341 */ 02,0331,0377,0,
+ /* 21345 */ 02,0331,0366,0,
+ /* 21349 */ 01,0330,0206,0,
+ /* 21353 */ 01,0334,0206,0,
+ /* 21357 */ 02,0336,0371,0,
+ /* 21361 */ 01,0330,0207,0,
+ /* 21365 */ 01,0334,0207,0,
+ /* 21369 */ 02,0336,0361,0,
+ /* 21373 */ 02,017,016,0,
+ /* 21377 */ 02,0335,0301,0,
+ /* 21381 */ 02,0337,0301,0,
+ /* 21385 */ 01,0332,0200,0,
+ /* 21389 */ 01,0336,0200,0,
+ /* 21393 */ 01,0332,0202,0,
+ /* 21397 */ 01,0336,0202,0,
+ /* 21401 */ 01,0332,0203,0,
+ /* 21405 */ 01,0336,0203,0,
+ /* 21409 */ 01,0332,0206,0,
+ /* 21413 */ 01,0336,0206,0,
+ /* 21417 */ 01,0332,0207,0,
+ /* 21421 */ 01,0336,0207,0,
+ /* 21425 */ 01,0333,0200,0,
+ /* 21429 */ 01,0337,0200,0,
+ /* 21433 */ 01,0337,0205,0,
+ /* 21437 */ 01,0332,0201,0,
+ /* 21441 */ 01,0336,0201,0,
+ /* 21445 */ 02,0331,0367,0,
+ /* 21449 */ 01,0333,0202,0,
+ /* 21453 */ 01,0337,0202,0,
+ /* 21457 */ 01,0333,0203,0,
+ /* 21461 */ 01,0337,0203,0,
+ /* 21465 */ 01,0337,0207,0,
+ /* 21469 */ 01,0337,0201,0,
+ /* 21473 */ 01,0333,0201,0,
+ /* 21477 */ 01,0335,0201,0,
+ /* 21481 */ 01,0332,0204,0,
+ /* 21485 */ 01,0336,0204,0,
+ /* 21489 */ 01,0332,0205,0,
+ /* 21493 */ 01,0336,0205,0,
+ /* 21497 */ 01,0331,0200,0,
+ /* 21501 */ 01,0335,0200,0,
+ /* 21505 */ 01,0333,0205,0,
+ /* 21509 */ 02,0331,0301,0,
+ /* 21513 */ 02,0331,0350,0,
+ /* 21517 */ 01,0331,0205,0,
+ /* 21521 */ 01,0331,0204,0,
+ /* 21525 */ 02,0331,0352,0,
+ /* 21529 */ 02,0331,0351,0,
+ /* 21533 */ 02,0331,0354,0,
+ /* 21537 */ 02,0331,0355,0,
+ /* 21541 */ 02,0331,0353,0,
+ /* 21545 */ 02,0331,0356,0,
+ /* 21549 */ 01,0330,0201,0,
+ /* 21553 */ 01,0334,0201,0,
+ /* 21557 */ 02,0336,0311,0,
+ /* 21561 */ 02,0331,0320,0,
+ /* 21565 */ 02,0331,0363,0,
+ /* 21569 */ 02,0331,0370,0,
+ /* 21573 */ 02,0331,0365,0,
+ /* 21577 */ 02,0331,0362,0,
+ /* 21581 */ 02,0331,0374,0,
+ /* 21585 */ 01,0335,0204,0,
+ /* 21589 */ 02,0331,0375,0,
+ /* 21593 */ 02,0333,0344,0,
+ /* 21597 */ 02,0331,0376,0,
+ /* 21601 */ 02,0331,0373,0,
+ /* 21605 */ 02,0331,0372,0,
+ /* 21609 */ 01,0331,0202,0,
+ /* 21613 */ 01,0335,0202,0,
+ /* 21617 */ 02,0335,0321,0,
+ /* 21621 */ 01,0331,0203,0,
+ /* 21625 */ 01,0335,0203,0,
+ /* 21629 */ 01,0333,0207,0,
+ /* 21633 */ 02,0335,0331,0,
+ /* 21637 */ 01,0330,0204,0,
+ /* 21641 */ 01,0334,0204,0,
+ /* 21645 */ 02,0336,0351,0,
+ /* 21649 */ 01,0330,0205,0,
+ /* 21653 */ 01,0334,0205,0,
+ /* 21657 */ 02,0336,0341,0,
+ /* 21661 */ 02,0331,0344,0,
+ /* 21665 */ 02,0335,0341,0,
+ /* 21669 */ 02,0333,0351,0,
+ /* 21673 */ 02,0337,0351,0,
+ /* 21677 */ 02,0335,0351,0,
+ /* 21681 */ 02,0332,0351,0,
+ /* 21685 */ 02,0331,0345,0,
+ /* 21689 */ 02,0331,0311,0,
+ /* 21693 */ 02,0331,0364,0,
+ /* 21697 */ 02,0331,0361,0,
+ /* 21701 */ 02,0331,0371,0,
+ /* 21705 */ 01,0366,0207,0,
+ /* 21709 */ 01,0366,0205,0,
+ /* 21713 */ 01,0344,025,0,
+ /* 21717 */ 0320,01,0355,0,
+ /* 21721 */ 0321,01,0355,0,
+ /* 21725 */ 0320,010,0100,0,
+ /* 21729 */ 0321,010,0100,0,
+ /* 21733 */ 0321,01,0155,0,
+ /* 21737 */ 0320,01,0155,0,
+ /* 21741 */ 01,0315,024,0,
+ /* 21745 */ 02,017,010,0,
+ /* 21749 */ 0322,01,0317,0,
+ /* 21753 */ 0321,01,0317,0,
+ /* 21757 */ 0324,01,0317,0,
+ /* 21761 */ 0320,01,0317,0,
+ /* 21765 */ 02,017,07,0,
+ /* 21769 */ 02,017,05,0,
+ /* 21773 */ 0321,01,0255,0,
+ /* 21777 */ 0324,01,0255,0,
+ /* 21781 */ 0320,01,0255,0,
+ /* 21785 */ 01,0240,045,0,
+ /* 21789 */ 01,0242,044,0,
+ /* 21793 */ 01,0212,0110,0,
+ /* 21797 */ 010,0260,021,0,
+ /* 21801 */ 0321,01,0245,0,
+ /* 21805 */ 0324,01,0245,0,
+ /* 21809 */ 0320,01,0245,0,
+ /* 21813 */ 01,0366,0204,0,
+ /* 21817 */ 0314,01,0220,0,
+ /* 21821 */ 01,014,021,0,
+ /* 21825 */ 01,0346,024,0,
+ /* 21829 */ 0320,01,0357,0,
+ /* 21833 */ 0321,01,0357,0,
+ /* 21837 */ 0321,01,0157,0,
+ /* 21841 */ 0320,01,0157,0,
+ /* 21845 */ 0320,010,0130,0,
+ /* 21849 */ 0321,010,0130,0,
+ /* 21853 */ 0323,010,0130,0,
+ /* 21857 */ 01,017,0347,0,
+ /* 21861 */ 0322,01,0141,0,
+ /* 21865 */ 0321,01,0141,0,
+ /* 21869 */ 0320,01,0141,0,
+ /* 21873 */ 0322,01,0235,0,
+ /* 21877 */ 0321,01,0235,0,
+ /* 21881 */ 0320,01,0235,0,
+ /* 21885 */ 0320,010,0120,0,
+ /* 21889 */ 0321,010,0120,0,
+ /* 21893 */ 0323,010,0120,0,
+ /* 21897 */ 01,017,0346,0,
+ /* 21901 */ 01,0152,0274,0,
+ /* 21905 */ 0322,01,0140,0,
+ /* 21909 */ 0321,01,0140,0,
+ /* 21913 */ 0320,01,0140,0,
+ /* 21917 */ 0322,01,0234,0,
+ /* 21921 */ 0321,01,0234,0,
+ /* 21925 */ 0320,01,0234,0,
+ /* 21929 */ 01,0320,0202,0,
+ /* 21933 */ 01,0322,0202,0,
+ /* 21937 */ 01,0320,0203,0,
+ /* 21941 */ 01,0322,0203,0,
+ /* 21945 */ 02,017,062,0,
+ /* 21949 */ 02,017,063,0,
+ /* 21953 */ 02,017,061,0,
+ /* 21957 */ 01,0302,030,0,
+ /* 21961 */ 01,0312,030,0,
+ /* 21965 */ 01,0320,0200,0,
+ /* 21969 */ 01,0322,0200,0,
+ /* 21973 */ 01,0320,0201,0,
+ /* 21977 */ 01,0322,0201,0,
+ /* 21981 */ 02,017,0252,0,
+ /* 21985 */ 01,0320,0204,0,
+ /* 21989 */ 01,0322,0204,0,
+ /* 21993 */ 01,0320,0207,0,
+ /* 21997 */ 01,0322,0207,0,
+ /* 22001 */ 01,034,021,0,
+ /* 22005 */ 0335,01,0256,0,
+ /* 22009 */ 01,0320,0205,0,
+ /* 22013 */ 01,0322,0205,0,
+ /* 22017 */ 02,017,070,0,
+ /* 22021 */ 02,017,0176,0,
+ /* 22025 */ 0321,01,0253,0,
+ /* 22029 */ 0324,01,0253,0,
+ /* 22033 */ 0320,01,0253,0,
+ /* 22037 */ 01,054,021,0,
+ /* 22041 */ 02,017,064,0,
+ /* 22045 */ 02,017,065,0,
+ /* 22049 */ 01,0204,0101,0,
+ /* 22053 */ 01,0204,0110,0,
+ /* 22057 */ 01,0250,021,0,
+ /* 22061 */ 02,017,0377,0,
+ /* 22065 */ 02,017,0271,0,
+ /* 22069 */ 02,017,013,0,
+ /* 22073 */ 02,017,011,0,
+ /* 22077 */ 02,017,060,0,
+ /* 22081 */ 0320,011,0220,0,
+ /* 22085 */ 0321,011,0220,0,
+ /* 22089 */ 0324,011,0220,0,
+ /* 22093 */ 0320,010,0220,0,
+ /* 22097 */ 0321,010,0220,0,
+ /* 22101 */ 0324,010,0220,0,
+ /* 22105 */ 0321,01,0220,0,
+ /* 22109 */ 01,064,021,0,
+ /* 22113 */ 02,017,067,0,
+ /* 22117 */ 01,067,0,
+ /* 22120 */ 01,077,0,
+ /* 22123 */ 01,0374,0,
+ /* 22126 */ 01,0372,0,
+ /* 22129 */ 01,0365,0,
+ /* 22132 */ 01,047,0,
+ /* 22135 */ 01,057,0,
+ /* 22138 */ 01,0364,0,
+ /* 22141 */ 01,0361,0,
+ /* 22144 */ 01,0354,0,
+ /* 22147 */ 01,0154,0,
+ /* 22150 */ 01,0314,0,
+ /* 22153 */ 01,0316,0,
+ /* 22156 */ 01,0237,0,
+ /* 22159 */ 01,0254,0,
+ /* 22162 */ 01,0356,0,
+ /* 22165 */ 01,0156,0,
+ /* 22168 */ 01,0375,0,
+ /* 22171 */ 01,0373,0,
+ /* 22174 */ 01,0327,0,
};
/*
* Bytecode frequencies (including reuse):
*
- * 0:3557 | 40: 0 | 100: 49 | 140: 1 | 200: 106 | 240: 0 | 300: 0 | 340: 1
- * 1:3164 | 41: 19 | 101: 278 | 141: 17 | 201: 76 | 241: 0 | 301: 0 | 341: 10
- * 2:1065 | 42: 8 | 102: 6 | 142: 2 | 202: 90 | 242: 0 | 302: 0 | 342: 0
- * 3: 212 | 43: 0 | 103: 0 | 143: 0 | 203: 77 | 243: 0 | 303: 0 | 343: 0
- * 4: 0 | 44: 4 | 104: 0 | 144: 1 | 204: 102 | 244: 0 | 304: 0 | 344: 2
- * 5: 0 | 45: 4 | 105: 0 | 145: 17 | 205: 73 | 245: 0 | 305: 0 | 345: 1
- * 6: 0 | 46: 0 | 106: 0 | 146: 2 | 206: 79 | 246: 0 | 306: 0 | 346: 1
- * 7: 0 | 47: 0 | 107: 0 | 147: 0 | 207: 71 | 247: 0 | 307: 0 | 347: 1
- * 10: 72 | 50: 28 | 110:1401 | 150: 2 | 210: 2 | 250: 2 | 310: 7 | 350: 0
- * 11: 26 | 51: 0 | 111: 0 | 151: 17 | 211: 2 | 251: 9 | 311: 7 | 351: 0
- * 12: 0 | 52: 0 | 112: 0 | 152: 2 | 212: 3 | 252: 2 | 312: 5 | 352: 0
- * 13: 0 | 53: 0 | 113: 0 | 153: 0 | 213: 1 | 253: 0 | 313: 7 | 353: 0
- * 14: 0 | 54: 0 | 114: 0 | 154: 4 | 214: 2 | 254: 0 | 314: 2 | 354: 0
- * 15: 6 | 55: 1 | 115: 0 | 155: 26 | 215: 0 | 255: 13 | 315: 0 | 355: 0
- * 16: 12 | 56: 0 | 116: 0 | 156: 4 | 216: 3 | 256: 0 | 316: 0 | 356: 0
- * 17: 0 | 57: 0 | 117: 0 | 157: 0 | 217: 1 | 257: 0 | 317: 4 | 357: 0
- * 20: 0 | 60: 0 | 120: 801 | 160: 0 | 220: 0 | 260: 625 | 320: 323 | 360: 170
- * 21: 44 | 61: 0 | 121: 0 | 161: 0 | 221: 0 | 261: 819 | 321: 326 | 361: 236
- * 22: 96 | 62: 0 | 122: 0 | 162: 0 | 222: 0 | 262: 12 | 322: 21 | 362: 44
- * 23: 44 | 63: 0 | 123: 0 | 163: 0 | 223: 0 | 263: 0 | 323: 114 | 363: 56
- * 24: 6 | 64: 20 | 124: 0 | 164: 0 | 224: 0 | 264: 0 | 324: 296 | 364: 0
+ * 0:4093 | 40: 0 | 100: 49 | 140: 1 | 200: 108 | 240: 0 | 300: 0 | 340: 1
+ * 1:3477 | 41: 20 | 101: 280 | 141: 17 | 201: 77 | 241: 0 | 301: 0 | 341: 10
+ * 2: 982 | 42: 8 | 102: 10 | 142: 2 | 202: 95 | 242: 0 | 302: 0 | 342: 0
+ * 3: 171 | 43: 0 | 103: 0 | 143: 0 | 203: 79 | 243: 0 | 303: 0 | 343: 0
+ * 4: 0 | 44: 4 | 104: 0 | 144: 1 | 204: 106 | 244: 0 | 304: 0 | 344: 2
+ * 5: 0 | 45: 4 | 105: 0 | 145: 17 | 205: 74 | 245: 0 | 305: 0 | 345: 1
+ * 6: 0 | 46: 0 | 106: 0 | 146: 2 | 206: 83 | 246: 0 | 306: 0 | 346: 1
+ * 7: 0 | 47: 0 | 107: 0 | 147: 0 | 207: 76 | 247: 0 | 307: 0 | 347: 1
+ * 10: 73 | 50: 28 | 110:1591 | 150: 2 | 210: 2 | 250: 2 | 310: 7 | 350: 0
+ * 11: 26 | 51: 0 | 111: 0 | 151: 17 | 211: 4 | 251: 9 | 311: 7 | 351: 0
+ * 12: 0 | 52: 0 | 112: 0 | 152: 2 | 212: 8 | 252: 2 | 312: 5 | 352: 0
+ * 13: 0 | 53: 0 | 113: 0 | 153: 0 | 213: 4 | 253: 0 | 313: 7 | 353: 0
+ * 14: 0 | 54: 0 | 114: 0 | 154: 4 | 214: 4 | 254: 0 | 314: 2 | 354: 0
+ * 15: 6 | 55: 1 | 115: 0 | 155: 26 | 215: 0 | 255: 14 | 315: 0 | 355: 0
+ * 16: 12 | 56: 0 | 116: 0 | 156: 4 | 216: 6 | 256: 0 | 316: 0 | 356: 0
+ * 17: 0 | 57: 0 | 117: 0 | 157: 0 | 217: 2 | 257: 0 | 317: 10 | 357: 0
+ * 20: 2 | 60: 0 | 120: 914 | 160: 0 | 220: 0 | 260: 761 | 320: 324 | 360: 161
+ * 21: 62 | 61: 0 | 121: 1 | 161: 0 | 221: 0 | 261: 936 | 321: 331 | 361: 240
+ * 22: 120 | 62: 0 | 122: 0 | 162: 0 | 222: 0 | 262: 38 | 322: 23 | 362: 44
+ * 23: 51 | 63: 0 | 123: 0 | 163: 0 | 223: 0 | 263: 0 | 323: 118 | 363: 60
+ * 24: 6 | 64: 26 | 124: 0 | 164: 0 | 224: 0 | 264: 0 | 324: 306 | 364: 0
* 25: 67 | 65: 0 | 125: 0 | 165: 0 | 225: 0 | 265: 0 | 325: 1 | 365: 0
- * 26: 67 | 66: 0 | 126: 0 | 166: 0 | 226: 0 | 266: 0 | 326: 0 | 366: 0
+ * 26: 66 | 66: 0 | 126: 0 | 166: 0 | 226: 0 | 266: 0 | 326: 0 | 366: 0
* 27: 1 | 67: 0 | 127: 0 | 167: 0 | 227: 0 | 267: 0 | 327: 0 | 367: 0
- * 30: 14 | 70: 0 | 130: 35 | 170: 0 | 230: 0 | 270: 230 | 330: 16 | 370: 1
- * 31: 19 | 71: 0 | 131: 0 | 171: 0 | 231: 0 | 271: 0 | 331: 0 | 371: 1
- * 32: 2 | 72: 0 | 132: 0 | 172: 0 | 232: 0 | 272: 0 | 332: 5 | 372: 0
- * 33: 0 | 73: 0 | 133: 0 | 173: 0 | 233: 0 | 273: 0 | 333: 7 | 373: 1
- * 34: 6 | 74: 6 | 134: 0 | 174: 174 | 234: 0 | 274: 1 | 334: 2 | 374: 0
- * 35: 2 | 75: 0 | 135: 0 | 175: 0 | 235: 0 | 275: 48 | 335: 8 | 375: 0
- * 36: 0 | 76: 0 | 136: 0 | 176: 0 | 236: 0 | 276: 0 | 336: 8 | 376: 0
- * 37: 0 | 77: 0 | 137: 0 | 177: 0 | 237: 0 | 277: 0 | 337: 0 | 377: 0
+ * 30: 14 | 70: 0 | 130: 35 | 170: 0 | 230: 0 | 270: 282 | 330: 16 | 370: 1
+ * 31: 19 | 71: 0 | 131: 0 | 171: 0 | 231: 0 | 271: 12 | 331: 0 | 371: 1
+ * 32: 2 | 72: 0 | 132: 0 | 172: 0 | 232: 0 | 272: 8 | 332: 5 | 372: 0
+ * 33: 0 | 73: 0 | 133: 0 | 173: 0 | 233: 0 | 273: 148 | 333: 7 | 373: 1
+ * 34: 6 | 74: 6 | 134: 0 | 174: 0 | 234: 0 | 274: 1 | 334: 2 | 374: 10
+ * 35: 2 | 75: 0 | 135: 0 | 175: 35 | 235: 0 | 275: 48 | 335: 8 | 375: 6
+ * 36: 0 | 76: 0 | 136: 0 | 176: 88 | 236: 0 | 276: 0 | 336: 8 | 376: 0
+ * 37: 0 | 77: 0 | 137: 0 | 177: 53 | 237: 0 | 277: 0 | 337: 0 | 377: 0
*/
diff --git a/insnsd.c b/insnsd.c
index 006fedb..03c7dc5 100644
--- a/insnsd.c
+++ b/insnsd.c
@@ -4,3603 +4,3943 @@
#include "insns.h"
static const struct itemplate instrux[] = {
- /* 0 */ {I_RESB, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+18790, IF_8086},
- /* 1 */ {I_AAA, 0, {0,0,0,0,0}, nasm_bytecodes+19680, IF_8086|IF_NOLONG},
- /* 2 */ {I_AAD, 0, {0,0,0,0,0}, nasm_bytecodes+18632, IF_8086|IF_NOLONG},
- /* 3 */ {I_AAD, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+18636, IF_8086|IF_SB|IF_NOLONG},
- /* 4 */ {I_AAM, 0, {0,0,0,0,0}, nasm_bytecodes+18640, IF_8086|IF_NOLONG},
- /* 5 */ {I_AAM, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+18644, IF_8086|IF_SB|IF_NOLONG},
- /* 6 */ {I_AAS, 0, {0,0,0,0,0}, nasm_bytecodes+19683, IF_8086|IF_NOLONG},
- /* 7 */ {I_ADC, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+18648, IF_8086|IF_SM},
- /* 8 */ {I_ADC, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+18648, IF_8086},
- /* 9 */ {I_ADC, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16772, IF_8086|IF_SM},
- /* 10 */ {I_ADC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16772, IF_8086},
- /* 11 */ {I_ADC, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16777, IF_386|IF_SM},
- /* 12 */ {I_ADC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16777, IF_386},
- /* 13 */ {I_ADC, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16782, IF_X64|IF_SM},
- /* 14 */ {I_ADC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16782, IF_X64},
- /* 15 */ {I_ADC, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+9884, IF_8086|IF_SM},
- /* 16 */ {I_ADC, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+9884, IF_8086},
- /* 17 */ {I_ADC, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16787, IF_8086|IF_SM},
- /* 18 */ {I_ADC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16787, IF_8086},
- /* 19 */ {I_ADC, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+16792, IF_386|IF_SM},
- /* 20 */ {I_ADC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16792, IF_386},
- /* 21 */ {I_ADC, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+16797, IF_X64|IF_SM},
- /* 22 */ {I_ADC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16797, IF_X64},
- /* 23 */ {I_ADC, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13220, IF_8086},
- /* 24 */ {I_ADC, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13226, IF_386},
- /* 25 */ {I_ADC, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13232, IF_X64},
- /* 26 */ {I_ADC, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+18652, IF_8086|IF_SM},
- /* 27 */ {I_ADC, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+13220, IF_8086|IF_SM},
- /* 28 */ {I_ADC, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+16802, IF_8086|IF_SM},
- /* 29 */ {I_ADC, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+13226, IF_386|IF_SM},
- /* 30 */ {I_ADC, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+16807, IF_386|IF_SM},
- /* 31 */ {I_ADC, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+13232, IF_X64|IF_SM},
- /* 32 */ {I_ADC, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+16812, IF_X64|IF_SM},
- /* 33 */ {I_ADC, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+16817, IF_8086|IF_SM},
- /* 34 */ {I_ADC, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+13238, IF_8086|IF_SM},
- /* 35 */ {I_ADC, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+13244, IF_386|IF_SM},
- /* 36 */ {I_ADC, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+13250, IF_X64|IF_SM},
- /* 37 */ {I_ADC, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16817, IF_8086|IF_SM},
- /* 38 */ {I_ADC, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+13238, IF_8086|IF_SM},
- /* 39 */ {I_ADC, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+13244, IF_386|IF_SM},
- /* 40 */ {I_ADD, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+18656, IF_8086|IF_SM},
- /* 41 */ {I_ADD, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+18656, IF_8086},
- /* 42 */ {I_ADD, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16822, IF_8086|IF_SM},
- /* 43 */ {I_ADD, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16822, IF_8086},
- /* 44 */ {I_ADD, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16827, IF_386|IF_SM},
- /* 45 */ {I_ADD, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16827, IF_386},
- /* 46 */ {I_ADD, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16832, IF_X64|IF_SM},
- /* 47 */ {I_ADD, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16832, IF_X64},
- /* 48 */ {I_ADD, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+10535, IF_8086|IF_SM},
- /* 49 */ {I_ADD, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+10535, IF_8086},
- /* 50 */ {I_ADD, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16837, IF_8086|IF_SM},
- /* 51 */ {I_ADD, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16837, IF_8086},
- /* 52 */ {I_ADD, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+16842, IF_386|IF_SM},
- /* 53 */ {I_ADD, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16842, IF_386},
- /* 54 */ {I_ADD, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+16847, IF_X64|IF_SM},
- /* 55 */ {I_ADD, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16847, IF_X64},
- /* 56 */ {I_ADD, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13256, IF_8086},
- /* 57 */ {I_ADD, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13262, IF_386},
- /* 58 */ {I_ADD, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13268, IF_X64},
- /* 59 */ {I_ADD, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+18660, IF_8086|IF_SM},
- /* 60 */ {I_ADD, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+13256, IF_8086|IF_SM},
- /* 61 */ {I_ADD, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+16852, IF_8086|IF_SM},
- /* 62 */ {I_ADD, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+13262, IF_386|IF_SM},
- /* 63 */ {I_ADD, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+16857, IF_386|IF_SM},
- /* 64 */ {I_ADD, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+13268, IF_X64|IF_SM},
- /* 65 */ {I_ADD, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+16862, IF_X64|IF_SM},
- /* 66 */ {I_ADD, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+16867, IF_8086|IF_SM},
- /* 67 */ {I_ADD, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+13274, IF_8086|IF_SM},
- /* 68 */ {I_ADD, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+13280, IF_386|IF_SM},
- /* 69 */ {I_ADD, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+13286, IF_X64|IF_SM},
- /* 70 */ {I_ADD, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16867, IF_8086|IF_SM},
- /* 71 */ {I_ADD, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+13274, IF_8086|IF_SM},
- /* 72 */ {I_ADD, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+13280, IF_386|IF_SM},
- /* 73 */ {I_AND, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+18664, IF_8086|IF_SM},
- /* 74 */ {I_AND, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+18664, IF_8086},
- /* 75 */ {I_AND, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16872, IF_8086|IF_SM},
- /* 76 */ {I_AND, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16872, IF_8086},
- /* 77 */ {I_AND, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16877, IF_386|IF_SM},
- /* 78 */ {I_AND, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16877, IF_386},
- /* 79 */ {I_AND, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16882, IF_X64|IF_SM},
- /* 80 */ {I_AND, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16882, IF_X64},
- /* 81 */ {I_AND, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+10822, IF_8086|IF_SM},
- /* 82 */ {I_AND, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+10822, IF_8086},
- /* 83 */ {I_AND, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16887, IF_8086|IF_SM},
- /* 84 */ {I_AND, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16887, IF_8086},
- /* 85 */ {I_AND, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+16892, IF_386|IF_SM},
- /* 86 */ {I_AND, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16892, IF_386},
- /* 87 */ {I_AND, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+16897, IF_X64|IF_SM},
- /* 88 */ {I_AND, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16897, IF_X64},
- /* 89 */ {I_AND, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13292, IF_8086},
- /* 90 */ {I_AND, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13298, IF_386},
- /* 91 */ {I_AND, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13304, IF_X64},
- /* 92 */ {I_AND, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+18668, IF_8086|IF_SM},
- /* 93 */ {I_AND, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+13292, IF_8086|IF_SM},
- /* 94 */ {I_AND, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+16902, IF_8086|IF_SM},
- /* 95 */ {I_AND, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+13298, IF_386|IF_SM},
- /* 96 */ {I_AND, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+16907, IF_386|IF_SM},
- /* 97 */ {I_AND, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+13304, IF_X64|IF_SM},
- /* 98 */ {I_AND, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+16912, IF_X64|IF_SM},
- /* 99 */ {I_AND, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+16917, IF_8086|IF_SM},
- /* 100 */ {I_AND, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+13310, IF_8086|IF_SM},
- /* 101 */ {I_AND, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+13316, IF_386|IF_SM},
- /* 102 */ {I_AND, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+13322, IF_X64|IF_SM},
- /* 103 */ {I_AND, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16917, IF_8086|IF_SM},
- /* 104 */ {I_AND, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+13310, IF_8086|IF_SM},
- /* 105 */ {I_AND, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+13316, IF_386|IF_SM},
- /* 106 */ {I_ARPL, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18672, IF_286|IF_PROT|IF_SM|IF_NOLONG},
- /* 107 */ {I_ARPL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18672, IF_286|IF_PROT|IF_NOLONG},
- /* 108 */ {I_BOUND, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16922, IF_186|IF_NOLONG},
- /* 109 */ {I_BOUND, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+16927, IF_386|IF_NOLONG},
- /* 110 */ {I_BSF, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+13328, IF_386|IF_SM},
- /* 111 */ {I_BSF, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13328, IF_386},
- /* 112 */ {I_BSF, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+13334, IF_386|IF_SM},
- /* 113 */ {I_BSF, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13334, IF_386},
- /* 114 */ {I_BSF, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+13340, IF_X64|IF_SM},
- /* 115 */ {I_BSF, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13340, IF_X64},
- /* 116 */ {I_BSR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+13346, IF_386|IF_SM},
- /* 117 */ {I_BSR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13346, IF_386},
- /* 118 */ {I_BSR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+13352, IF_386|IF_SM},
- /* 119 */ {I_BSR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13352, IF_386},
- /* 120 */ {I_BSR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+13358, IF_X64|IF_SM},
- /* 121 */ {I_BSR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13358, IF_X64},
- /* 122 */ {I_BSWAP, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+13364, IF_486},
- /* 123 */ {I_BSWAP, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+13370, IF_X64},
- /* 124 */ {I_BT, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13376, IF_386|IF_SM},
- /* 125 */ {I_BT, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13376, IF_386},
- /* 126 */ {I_BT, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13382, IF_386|IF_SM},
- /* 127 */ {I_BT, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13382, IF_386},
- /* 128 */ {I_BT, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13388, IF_X64|IF_SM},
- /* 129 */ {I_BT, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13388, IF_X64},
- /* 130 */ {I_BT, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+6920, IF_386|IF_SB},
- /* 131 */ {I_BT, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+6927, IF_386|IF_SB},
- /* 132 */ {I_BT, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+6934, IF_X64|IF_SB},
- /* 133 */ {I_BTC, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13394, IF_386|IF_SM},
- /* 134 */ {I_BTC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13394, IF_386},
- /* 135 */ {I_BTC, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13400, IF_386|IF_SM},
- /* 136 */ {I_BTC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13400, IF_386},
- /* 137 */ {I_BTC, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13406, IF_X64|IF_SM},
- /* 138 */ {I_BTC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13406, IF_X64},
- /* 139 */ {I_BTC, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+6941, IF_386|IF_SB},
- /* 140 */ {I_BTC, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+6948, IF_386|IF_SB},
- /* 141 */ {I_BTC, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+6955, IF_X64|IF_SB},
- /* 142 */ {I_BTR, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13412, IF_386|IF_SM},
- /* 143 */ {I_BTR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13412, IF_386},
- /* 144 */ {I_BTR, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13418, IF_386|IF_SM},
- /* 145 */ {I_BTR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13418, IF_386},
- /* 146 */ {I_BTR, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13424, IF_X64|IF_SM},
- /* 147 */ {I_BTR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13424, IF_X64},
- /* 148 */ {I_BTR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+6962, IF_386|IF_SB},
- /* 149 */ {I_BTR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+6969, IF_386|IF_SB},
- /* 150 */ {I_BTR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+6976, IF_X64|IF_SB},
- /* 151 */ {I_BTS, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13430, IF_386|IF_SM},
- /* 152 */ {I_BTS, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13430, IF_386},
- /* 153 */ {I_BTS, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13436, IF_386|IF_SM},
- /* 154 */ {I_BTS, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13436, IF_386},
- /* 155 */ {I_BTS, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13442, IF_X64|IF_SM},
- /* 156 */ {I_BTS, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13442, IF_X64},
- /* 157 */ {I_BTS, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+6983, IF_386|IF_SB},
- /* 158 */ {I_BTS, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+6990, IF_386|IF_SB},
- /* 159 */ {I_BTS, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+6997, IF_X64|IF_SB},
- /* 160 */ {I_CALL, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+16932, IF_8086},
- /* 161 */ {I_CALL, 1, {IMMEDIATE|NEAR,0,0,0,0}, nasm_bytecodes+16932, IF_8086},
- /* 162 */ {I_CALL, 1, {IMMEDIATE|BITS16,0,0,0,0}, nasm_bytecodes+16937, IF_8086},
- /* 163 */ {I_CALL, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, nasm_bytecodes+16937, IF_8086},
- /* 164 */ {I_CALL, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+16942, IF_386},
- /* 165 */ {I_CALL, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, nasm_bytecodes+16942, IF_386},
- /* 166 */ {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+13466, IF_8086|IF_NOLONG},
- /* 167 */ {I_CALL, 2, {IMMEDIATE|BITS16|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+13472, IF_8086|IF_NOLONG},
- /* 168 */ {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+13472, IF_8086|IF_NOLONG},
- /* 169 */ {I_CALL, 2, {IMMEDIATE|BITS32|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+13478, IF_386|IF_NOLONG},
- /* 170 */ {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+13478, IF_386|IF_NOLONG},
- /* 171 */ {I_CALL, 1, {MEMORY|FAR,0,0,0,0}, nasm_bytecodes+16947, IF_8086|IF_NOLONG},
- /* 172 */ {I_CALL, 1, {MEMORY|FAR,0,0,0,0}, nasm_bytecodes+16952, IF_X64},
- /* 173 */ {I_CALL, 1, {MEMORY|BITS16|FAR,0,0,0,0}, nasm_bytecodes+16957, IF_8086},
- /* 174 */ {I_CALL, 1, {MEMORY|BITS32|FAR,0,0,0,0}, nasm_bytecodes+16962, IF_386},
- /* 175 */ {I_CALL, 1, {MEMORY|BITS64|FAR,0,0,0,0}, nasm_bytecodes+16952, IF_X64},
- /* 176 */ {I_CALL, 1, {MEMORY|NEAR,0,0,0,0}, nasm_bytecodes+16967, IF_8086},
- /* 177 */ {I_CALL, 1, {MEMORY|BITS16|NEAR,0,0,0,0}, nasm_bytecodes+16972, IF_8086},
- /* 178 */ {I_CALL, 1, {MEMORY|BITS32|NEAR,0,0,0,0}, nasm_bytecodes+16977, IF_386|IF_NOLONG},
- /* 179 */ {I_CALL, 1, {MEMORY|BITS64|NEAR,0,0,0,0}, nasm_bytecodes+16982, IF_X64},
- /* 180 */ {I_CALL, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16972, IF_8086},
- /* 181 */ {I_CALL, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16977, IF_386|IF_NOLONG},
- /* 182 */ {I_CALL, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16987, IF_X64},
- /* 183 */ {I_CALL, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+16967, IF_8086},
- /* 184 */ {I_CALL, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+16972, IF_8086},
- /* 185 */ {I_CALL, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+16977, IF_386|IF_NOLONG},
- /* 186 */ {I_CALL, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+16987, IF_X64},
- /* 187 */ {I_CBW, 0, {0,0,0,0,0}, nasm_bytecodes+18684, IF_8086},
- /* 188 */ {I_CDQ, 0, {0,0,0,0,0}, nasm_bytecodes+18688, IF_386},
- /* 189 */ {I_CDQE, 0, {0,0,0,0,0}, nasm_bytecodes+18692, IF_X64},
- /* 190 */ {I_CLC, 0, {0,0,0,0,0}, nasm_bytecodes+18424, IF_8086},
- /* 191 */ {I_CLD, 0, {0,0,0,0,0}, nasm_bytecodes+19686, IF_8086},
- /* 192 */ {I_CLGI, 0, {0,0,0,0,0}, nasm_bytecodes+16992, IF_X64|IF_AMD},
- /* 193 */ {I_CLI, 0, {0,0,0,0,0}, nasm_bytecodes+19689, IF_8086},
- /* 194 */ {I_CLTS, 0, {0,0,0,0,0}, nasm_bytecodes+18696, IF_286|IF_PRIV},
- /* 195 */ {I_CMC, 0, {0,0,0,0,0}, nasm_bytecodes+19692, IF_8086},
- /* 196 */ {I_CMP, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+18700, IF_8086|IF_SM},
- /* 197 */ {I_CMP, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+18700, IF_8086},
- /* 198 */ {I_CMP, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16997, IF_8086|IF_SM},
- /* 199 */ {I_CMP, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16997, IF_8086},
- /* 200 */ {I_CMP, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17002, IF_386|IF_SM},
- /* 201 */ {I_CMP, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17002, IF_386},
- /* 202 */ {I_CMP, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17007, IF_X64|IF_SM},
- /* 203 */ {I_CMP, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17007, IF_X64},
- /* 204 */ {I_CMP, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+10780, IF_8086|IF_SM},
- /* 205 */ {I_CMP, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+10780, IF_8086},
- /* 206 */ {I_CMP, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+17012, IF_8086|IF_SM},
- /* 207 */ {I_CMP, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+17012, IF_8086},
- /* 208 */ {I_CMP, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+17017, IF_386|IF_SM},
- /* 209 */ {I_CMP, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17017, IF_386},
- /* 210 */ {I_CMP, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+17022, IF_X64|IF_SM},
- /* 211 */ {I_CMP, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17022, IF_X64},
- /* 212 */ {I_CMP, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13484, IF_8086},
- /* 213 */ {I_CMP, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13490, IF_386},
- /* 214 */ {I_CMP, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13496, IF_X64},
- /* 215 */ {I_CMP, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+18704, IF_8086|IF_SM},
- /* 216 */ {I_CMP, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+13484, IF_8086|IF_SM},
- /* 217 */ {I_CMP, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+17027, IF_8086|IF_SM},
- /* 218 */ {I_CMP, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+13490, IF_386|IF_SM},
- /* 219 */ {I_CMP, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+17032, IF_386|IF_SM},
- /* 220 */ {I_CMP, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+13496, IF_X64|IF_SM},
- /* 221 */ {I_CMP, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+17037, IF_X64|IF_SM},
- /* 222 */ {I_CMP, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+17042, IF_8086|IF_SM},
- /* 223 */ {I_CMP, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+13502, IF_8086|IF_SM},
- /* 224 */ {I_CMP, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+13508, IF_386|IF_SM},
- /* 225 */ {I_CMP, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+13514, IF_X64|IF_SM},
- /* 226 */ {I_CMP, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+17042, IF_8086|IF_SM},
- /* 227 */ {I_CMP, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+13502, IF_8086|IF_SM},
- /* 228 */ {I_CMP, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+13508, IF_386|IF_SM},
- /* 229 */ {I_CMPSB, 0, {0,0,0,0,0}, nasm_bytecodes+18708, IF_8086},
- /* 230 */ {I_CMPSD, 0, {0,0,0,0,0}, nasm_bytecodes+17047, IF_386},
- /* 231 */ {I_CMPSQ, 0, {0,0,0,0,0}, nasm_bytecodes+17052, IF_X64},
- /* 232 */ {I_CMPSW, 0, {0,0,0,0,0}, nasm_bytecodes+17057, IF_8086},
- /* 233 */ {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+17062, IF_PENT|IF_SM},
- /* 234 */ {I_CMPXCHG, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+17062, IF_PENT},
- /* 235 */ {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13520, IF_PENT|IF_SM},
- /* 236 */ {I_CMPXCHG, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13520, IF_PENT},
- /* 237 */ {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13526, IF_PENT|IF_SM},
- /* 238 */ {I_CMPXCHG, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13526, IF_PENT},
- /* 239 */ {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13532, IF_X64|IF_SM},
- /* 240 */ {I_CMPXCHG, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13532, IF_X64},
- /* 241 */ {I_CMPXCHG8B, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+13551, IF_PENT},
- /* 242 */ {I_CMPXCHG16B, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+13550, IF_X64},
- /* 243 */ {I_CPUID, 0, {0,0,0,0,0}, nasm_bytecodes+18712, IF_PENT},
- /* 244 */ {I_CPU_READ, 0, {0,0,0,0,0}, nasm_bytecodes+18716, IF_PENT|IF_CYRIX},
- /* 245 */ {I_CPU_WRITE, 0, {0,0,0,0,0}, nasm_bytecodes+18720, IF_PENT|IF_CYRIX},
- /* 246 */ {I_CQO, 0, {0,0,0,0,0}, nasm_bytecodes+18724, IF_X64},
- /* 247 */ {I_CWD, 0, {0,0,0,0,0}, nasm_bytecodes+18728, IF_8086},
- /* 248 */ {I_CWDE, 0, {0,0,0,0,0}, nasm_bytecodes+18732, IF_386},
- /* 249 */ {I_DAA, 0, {0,0,0,0,0}, nasm_bytecodes+19695, IF_8086|IF_NOLONG},
- /* 250 */ {I_DAS, 0, {0,0,0,0,0}, nasm_bytecodes+19698, IF_8086|IF_NOLONG},
- /* 251 */ {I_DEC, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18736, IF_8086|IF_NOLONG},
- /* 252 */ {I_DEC, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18740, IF_386|IF_NOLONG},
- /* 253 */ {I_DEC, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+18744, IF_8086},
- /* 254 */ {I_DEC, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17072, IF_8086},
- /* 255 */ {I_DEC, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+17077, IF_386},
- /* 256 */ {I_DEC, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+17082, IF_X64},
- /* 257 */ {I_DIV, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+18748, IF_8086},
- /* 258 */ {I_DIV, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17087, IF_8086},
- /* 259 */ {I_DIV, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+17092, IF_386},
- /* 260 */ {I_DIV, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+17097, IF_X64},
- /* 261 */ {I_DMINT, 0, {0,0,0,0,0}, nasm_bytecodes+18752, IF_P6|IF_CYRIX},
- /* 262 */ {I_EMMS, 0, {0,0,0,0,0}, nasm_bytecodes+18756, IF_PENT|IF_MMX},
- /* 263 */ {I_ENTER, 2, {IMMEDIATE,IMMEDIATE,0,0,0}, nasm_bytecodes+17102, IF_186},
- /* 264 */ {I_EQU, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+5526, IF_8086},
- /* 265 */ {I_EQU, 2, {IMMEDIATE|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+5526, IF_8086},
- /* 266 */ {I_F2XM1, 0, {0,0,0,0,0}, nasm_bytecodes+18760, IF_8086|IF_FPU},
- /* 267 */ {I_FABS, 0, {0,0,0,0,0}, nasm_bytecodes+18764, IF_8086|IF_FPU},
- /* 268 */ {I_FADD, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18768, IF_8086|IF_FPU},
- /* 269 */ {I_FADD, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+18772, IF_8086|IF_FPU},
- /* 270 */ {I_FADD, 1, {FPUREG|TO,0,0,0,0}, nasm_bytecodes+17107, IF_8086|IF_FPU},
- /* 271 */ {I_FADD, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17112, IF_8086|IF_FPU},
- /* 272 */ {I_FADD, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17107, IF_8086|IF_FPU},
- /* 273 */ {I_FADD, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17117, IF_8086|IF_FPU},
- /* 274 */ {I_FADDP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17122, IF_8086|IF_FPU},
- /* 275 */ {I_FADDP, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17122, IF_8086|IF_FPU},
- /* 276 */ {I_FBLD, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+18780, IF_8086|IF_FPU},
- /* 277 */ {I_FBLD, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18780, IF_8086|IF_FPU},
- /* 278 */ {I_FBSTP, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+18784, IF_8086|IF_FPU},
- /* 279 */ {I_FBSTP, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18784, IF_8086|IF_FPU},
- /* 280 */ {I_FCHS, 0, {0,0,0,0,0}, nasm_bytecodes+18788, IF_8086|IF_FPU},
- /* 281 */ {I_FCLEX, 0, {0,0,0,0,0}, nasm_bytecodes+17127, IF_8086|IF_FPU},
- /* 282 */ {I_FCMOVB, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17132, IF_P6|IF_FPU},
- /* 283 */ {I_FCMOVB, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17137, IF_P6|IF_FPU},
- /* 284 */ {I_FCMOVBE, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17142, IF_P6|IF_FPU},
- /* 285 */ {I_FCMOVBE, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17147, IF_P6|IF_FPU},
- /* 286 */ {I_FCMOVE, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17152, IF_P6|IF_FPU},
- /* 287 */ {I_FCMOVE, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17157, IF_P6|IF_FPU},
- /* 288 */ {I_FCMOVNB, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17162, IF_P6|IF_FPU},
- /* 289 */ {I_FCMOVNB, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17167, IF_P6|IF_FPU},
- /* 290 */ {I_FCMOVNBE, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17172, IF_P6|IF_FPU},
- /* 291 */ {I_FCMOVNBE, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17177, IF_P6|IF_FPU},
- /* 292 */ {I_FCMOVNE, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17182, IF_P6|IF_FPU},
- /* 293 */ {I_FCMOVNE, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17187, IF_P6|IF_FPU},
- /* 294 */ {I_FCMOVNU, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17192, IF_P6|IF_FPU},
- /* 295 */ {I_FCMOVNU, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17197, IF_P6|IF_FPU},
- /* 296 */ {I_FCMOVU, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17202, IF_P6|IF_FPU},
- /* 297 */ {I_FCMOVU, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17207, IF_P6|IF_FPU},
- /* 298 */ {I_FCOM, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18824, IF_8086|IF_FPU},
- /* 299 */ {I_FCOM, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+18828, IF_8086|IF_FPU},
- /* 300 */ {I_FCOM, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17212, IF_8086|IF_FPU},
- /* 301 */ {I_FCOM, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17217, IF_8086|IF_FPU},
- /* 302 */ {I_FCOMI, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17222, IF_P6|IF_FPU},
- /* 303 */ {I_FCOMI, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17227, IF_P6|IF_FPU},
- /* 304 */ {I_FCOMIP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17232, IF_P6|IF_FPU},
- /* 305 */ {I_FCOMIP, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17237, IF_P6|IF_FPU},
- /* 306 */ {I_FCOMP, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18844, IF_8086|IF_FPU},
- /* 307 */ {I_FCOMP, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+18848, IF_8086|IF_FPU},
- /* 308 */ {I_FCOMP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17242, IF_8086|IF_FPU},
- /* 309 */ {I_FCOMP, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17247, IF_8086|IF_FPU},
- /* 310 */ {I_FCOMPP, 0, {0,0,0,0,0}, nasm_bytecodes+18856, IF_8086|IF_FPU},
- /* 311 */ {I_FCOS, 0, {0,0,0,0,0}, nasm_bytecodes+18860, IF_386|IF_FPU},
- /* 312 */ {I_FDECSTP, 0, {0,0,0,0,0}, nasm_bytecodes+18864, IF_8086|IF_FPU},
- /* 313 */ {I_FDISI, 0, {0,0,0,0,0}, nasm_bytecodes+17252, IF_8086|IF_FPU},
- /* 314 */ {I_FDIV, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18868, IF_8086|IF_FPU},
- /* 315 */ {I_FDIV, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+18872, IF_8086|IF_FPU},
- /* 316 */ {I_FDIV, 1, {FPUREG|TO,0,0,0,0}, nasm_bytecodes+17257, IF_8086|IF_FPU},
- /* 317 */ {I_FDIV, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17262, IF_8086|IF_FPU},
- /* 318 */ {I_FDIV, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17257, IF_8086|IF_FPU},
- /* 319 */ {I_FDIV, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17267, IF_8086|IF_FPU},
- /* 320 */ {I_FDIVP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17272, IF_8086|IF_FPU},
- /* 321 */ {I_FDIVP, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17272, IF_8086|IF_FPU},
- /* 322 */ {I_FDIVR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18880, IF_8086|IF_FPU},
- /* 323 */ {I_FDIVR, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+18884, IF_8086|IF_FPU},
- /* 324 */ {I_FDIVR, 1, {FPUREG|TO,0,0,0,0}, nasm_bytecodes+17277, IF_8086|IF_FPU},
- /* 325 */ {I_FDIVR, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17277, IF_8086|IF_FPU},
- /* 326 */ {I_FDIVR, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17282, IF_8086|IF_FPU},
- /* 327 */ {I_FDIVR, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17287, IF_8086|IF_FPU},
- /* 328 */ {I_FDIVRP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17292, IF_8086|IF_FPU},
- /* 329 */ {I_FDIVRP, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17292, IF_8086|IF_FPU},
- /* 330 */ {I_FEMMS, 0, {0,0,0,0,0}, nasm_bytecodes+18892, IF_PENT|IF_3DNOW},
- /* 331 */ {I_FENI, 0, {0,0,0,0,0}, nasm_bytecodes+17297, IF_8086|IF_FPU},
- /* 332 */ {I_FFREE, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17302, IF_8086|IF_FPU},
- /* 333 */ {I_FFREE, 0, {0,0,0,0,0}, nasm_bytecodes+18896, IF_8086|IF_FPU},
- /* 334 */ {I_FFREEP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17307, IF_286|IF_FPU|IF_UNDOC},
- /* 335 */ {I_FFREEP, 0, {0,0,0,0,0}, nasm_bytecodes+18900, IF_286|IF_FPU|IF_UNDOC},
- /* 336 */ {I_FIADD, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18904, IF_8086|IF_FPU},
- /* 337 */ {I_FIADD, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+18908, IF_8086|IF_FPU},
- /* 338 */ {I_FICOM, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18912, IF_8086|IF_FPU},
- /* 339 */ {I_FICOM, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+18916, IF_8086|IF_FPU},
- /* 340 */ {I_FICOMP, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18920, IF_8086|IF_FPU},
- /* 341 */ {I_FICOMP, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+18924, IF_8086|IF_FPU},
- /* 342 */ {I_FIDIV, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18928, IF_8086|IF_FPU},
- /* 343 */ {I_FIDIV, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+18932, IF_8086|IF_FPU},
- /* 344 */ {I_FIDIVR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18936, IF_8086|IF_FPU},
- /* 345 */ {I_FIDIVR, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+18940, IF_8086|IF_FPU},
- /* 346 */ {I_FILD, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18944, IF_8086|IF_FPU},
- /* 347 */ {I_FILD, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+18948, IF_8086|IF_FPU},
- /* 348 */ {I_FILD, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+18952, IF_8086|IF_FPU},
- /* 349 */ {I_FIMUL, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18956, IF_8086|IF_FPU},
- /* 350 */ {I_FIMUL, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+18960, IF_8086|IF_FPU},
- /* 351 */ {I_FINCSTP, 0, {0,0,0,0,0}, nasm_bytecodes+18964, IF_8086|IF_FPU},
- /* 352 */ {I_FINIT, 0, {0,0,0,0,0}, nasm_bytecodes+17312, IF_8086|IF_FPU},
- /* 353 */ {I_FIST, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18968, IF_8086|IF_FPU},
- /* 354 */ {I_FIST, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+18972, IF_8086|IF_FPU},
- /* 355 */ {I_FISTP, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18976, IF_8086|IF_FPU},
- /* 356 */ {I_FISTP, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+18980, IF_8086|IF_FPU},
- /* 357 */ {I_FISTP, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+18984, IF_8086|IF_FPU},
- /* 358 */ {I_FISTTP, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+18988, IF_PRESCOTT|IF_FPU},
- /* 359 */ {I_FISTTP, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+18992, IF_PRESCOTT|IF_FPU},
- /* 360 */ {I_FISTTP, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+18996, IF_PRESCOTT|IF_FPU},
- /* 361 */ {I_FISUB, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+19000, IF_8086|IF_FPU},
- /* 362 */ {I_FISUB, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+19004, IF_8086|IF_FPU},
- /* 363 */ {I_FISUBR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+19008, IF_8086|IF_FPU},
- /* 364 */ {I_FISUBR, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+19012, IF_8086|IF_FPU},
- /* 365 */ {I_FLD, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+19016, IF_8086|IF_FPU},
- /* 366 */ {I_FLD, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+19020, IF_8086|IF_FPU},
- /* 367 */ {I_FLD, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+19024, IF_8086|IF_FPU},
- /* 368 */ {I_FLD, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17317, IF_8086|IF_FPU},
- /* 369 */ {I_FLD1, 0, {0,0,0,0,0}, nasm_bytecodes+19032, IF_8086|IF_FPU},
- /* 370 */ {I_FLDCW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19036, IF_8086|IF_FPU|IF_SW},
- /* 371 */ {I_FLDENV, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19040, IF_8086|IF_FPU},
- /* 372 */ {I_FLDL2E, 0, {0,0,0,0,0}, nasm_bytecodes+19044, IF_8086|IF_FPU},
- /* 373 */ {I_FLDL2T, 0, {0,0,0,0,0}, nasm_bytecodes+19048, IF_8086|IF_FPU},
- /* 374 */ {I_FLDLG2, 0, {0,0,0,0,0}, nasm_bytecodes+19052, IF_8086|IF_FPU},
- /* 375 */ {I_FLDLN2, 0, {0,0,0,0,0}, nasm_bytecodes+19056, IF_8086|IF_FPU},
- /* 376 */ {I_FLDPI, 0, {0,0,0,0,0}, nasm_bytecodes+19060, IF_8086|IF_FPU},
- /* 377 */ {I_FLDZ, 0, {0,0,0,0,0}, nasm_bytecodes+19064, IF_8086|IF_FPU},
- /* 378 */ {I_FMUL, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+19068, IF_8086|IF_FPU},
- /* 379 */ {I_FMUL, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+19072, IF_8086|IF_FPU},
- /* 380 */ {I_FMUL, 1, {FPUREG|TO,0,0,0,0}, nasm_bytecodes+17322, IF_8086|IF_FPU},
- /* 381 */ {I_FMUL, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17322, IF_8086|IF_FPU},
- /* 382 */ {I_FMUL, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17327, IF_8086|IF_FPU},
- /* 383 */ {I_FMUL, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17332, IF_8086|IF_FPU},
- /* 384 */ {I_FMULP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17337, IF_8086|IF_FPU},
- /* 385 */ {I_FMULP, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17337, IF_8086|IF_FPU},
- /* 386 */ {I_FNCLEX, 0, {0,0,0,0,0}, nasm_bytecodes+17128, IF_8086|IF_FPU},
- /* 387 */ {I_FNDISI, 0, {0,0,0,0,0}, nasm_bytecodes+17253, IF_8086|IF_FPU},
- /* 388 */ {I_FNENI, 0, {0,0,0,0,0}, nasm_bytecodes+17298, IF_8086|IF_FPU},
- /* 389 */ {I_FNINIT, 0, {0,0,0,0,0}, nasm_bytecodes+17313, IF_8086|IF_FPU},
- /* 390 */ {I_FNOP, 0, {0,0,0,0,0}, nasm_bytecodes+19080, IF_8086|IF_FPU},
- /* 391 */ {I_FNSAVE, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17343, IF_8086|IF_FPU},
- /* 392 */ {I_FNSTCW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17353, IF_8086|IF_FPU|IF_SW},
- /* 393 */ {I_FNSTENV, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17358, IF_8086|IF_FPU},
- /* 394 */ {I_FNSTSW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17368, IF_8086|IF_FPU|IF_SW},
- /* 395 */ {I_FNSTSW, 1, {REG_AX,0,0,0,0}, nasm_bytecodes+17373, IF_286|IF_FPU},
- /* 396 */ {I_FPATAN, 0, {0,0,0,0,0}, nasm_bytecodes+19084, IF_8086|IF_FPU},
- /* 397 */ {I_FPREM, 0, {0,0,0,0,0}, nasm_bytecodes+19088, IF_8086|IF_FPU},
- /* 398 */ {I_FPREM1, 0, {0,0,0,0,0}, nasm_bytecodes+19092, IF_386|IF_FPU},
- /* 399 */ {I_FPTAN, 0, {0,0,0,0,0}, nasm_bytecodes+19096, IF_8086|IF_FPU},
- /* 400 */ {I_FRNDINT, 0, {0,0,0,0,0}, nasm_bytecodes+19100, IF_8086|IF_FPU},
- /* 401 */ {I_FRSTOR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19104, IF_8086|IF_FPU},
- /* 402 */ {I_FSAVE, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17342, IF_8086|IF_FPU},
- /* 403 */ {I_FSCALE, 0, {0,0,0,0,0}, nasm_bytecodes+19108, IF_8086|IF_FPU},
- /* 404 */ {I_FSETPM, 0, {0,0,0,0,0}, nasm_bytecodes+19112, IF_286|IF_FPU},
- /* 405 */ {I_FSIN, 0, {0,0,0,0,0}, nasm_bytecodes+19116, IF_386|IF_FPU},
- /* 406 */ {I_FSINCOS, 0, {0,0,0,0,0}, nasm_bytecodes+19120, IF_386|IF_FPU},
- /* 407 */ {I_FSQRT, 0, {0,0,0,0,0}, nasm_bytecodes+19124, IF_8086|IF_FPU},
- /* 408 */ {I_FST, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+19128, IF_8086|IF_FPU},
- /* 409 */ {I_FST, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+19132, IF_8086|IF_FPU},
- /* 410 */ {I_FST, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17347, IF_8086|IF_FPU},
- /* 411 */ {I_FSTCW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17352, IF_8086|IF_FPU|IF_SW},
- /* 412 */ {I_FSTENV, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17357, IF_8086|IF_FPU},
- /* 413 */ {I_FSTP, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+19140, IF_8086|IF_FPU},
- /* 414 */ {I_FSTP, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+19144, IF_8086|IF_FPU},
- /* 415 */ {I_FSTP, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+19148, IF_8086|IF_FPU},
- /* 416 */ {I_FSTP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17362, IF_8086|IF_FPU},
- /* 417 */ {I_FSTSW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17367, IF_8086|IF_FPU|IF_SW},
- /* 418 */ {I_FSTSW, 1, {REG_AX,0,0,0,0}, nasm_bytecodes+17372, IF_286|IF_FPU},
- /* 419 */ {I_FSUB, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+19156, IF_8086|IF_FPU},
- /* 420 */ {I_FSUB, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+19160, IF_8086|IF_FPU},
- /* 421 */ {I_FSUB, 1, {FPUREG|TO,0,0,0,0}, nasm_bytecodes+17377, IF_8086|IF_FPU},
- /* 422 */ {I_FSUB, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17377, IF_8086|IF_FPU},
- /* 423 */ {I_FSUB, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17382, IF_8086|IF_FPU},
- /* 424 */ {I_FSUB, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17387, IF_8086|IF_FPU},
- /* 425 */ {I_FSUBP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17392, IF_8086|IF_FPU},
- /* 426 */ {I_FSUBP, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17392, IF_8086|IF_FPU},
- /* 427 */ {I_FSUBR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+19168, IF_8086|IF_FPU},
- /* 428 */ {I_FSUBR, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+19172, IF_8086|IF_FPU},
- /* 429 */ {I_FSUBR, 1, {FPUREG|TO,0,0,0,0}, nasm_bytecodes+17397, IF_8086|IF_FPU},
- /* 430 */ {I_FSUBR, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17397, IF_8086|IF_FPU},
- /* 431 */ {I_FSUBR, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17402, IF_8086|IF_FPU},
- /* 432 */ {I_FSUBR, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17407, IF_8086|IF_FPU},
- /* 433 */ {I_FSUBRP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17412, IF_8086|IF_FPU},
- /* 434 */ {I_FSUBRP, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17412, IF_8086|IF_FPU},
- /* 435 */ {I_FTST, 0, {0,0,0,0,0}, nasm_bytecodes+19180, IF_8086|IF_FPU},
- /* 436 */ {I_FUCOM, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17417, IF_386|IF_FPU},
- /* 437 */ {I_FUCOM, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17422, IF_386|IF_FPU},
- /* 438 */ {I_FUCOMI, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17427, IF_P6|IF_FPU},
- /* 439 */ {I_FUCOMI, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17432, IF_P6|IF_FPU},
- /* 440 */ {I_FUCOMIP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17437, IF_P6|IF_FPU},
- /* 441 */ {I_FUCOMIP, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17442, IF_P6|IF_FPU},
- /* 442 */ {I_FUCOMP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17447, IF_386|IF_FPU},
- /* 443 */ {I_FUCOMP, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17452, IF_386|IF_FPU},
- /* 444 */ {I_FUCOMPP, 0, {0,0,0,0,0}, nasm_bytecodes+19200, IF_386|IF_FPU},
- /* 445 */ {I_FXAM, 0, {0,0,0,0,0}, nasm_bytecodes+19204, IF_8086|IF_FPU},
- /* 446 */ {I_FXCH, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+17457, IF_8086|IF_FPU},
- /* 447 */ {I_FXCH, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+17457, IF_8086|IF_FPU},
- /* 448 */ {I_FXCH, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+17462, IF_8086|IF_FPU},
- /* 449 */ {I_FXTRACT, 0, {0,0,0,0,0}, nasm_bytecodes+19212, IF_8086|IF_FPU},
- /* 450 */ {I_FYL2X, 0, {0,0,0,0,0}, nasm_bytecodes+19216, IF_8086|IF_FPU},
- /* 451 */ {I_FYL2XP1, 0, {0,0,0,0,0}, nasm_bytecodes+19220, IF_8086|IF_FPU},
- /* 452 */ {I_HLT, 0, {0,0,0,0,0}, nasm_bytecodes+19701, IF_8086|IF_PRIV},
- /* 453 */ {I_IDIV, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+19224, IF_8086},
- /* 454 */ {I_IDIV, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17467, IF_8086},
- /* 455 */ {I_IDIV, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+17472, IF_386},
- /* 456 */ {I_IDIV, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+17477, IF_X64},
- /* 457 */ {I_IMUL, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+19228, IF_8086},
- /* 458 */ {I_IMUL, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17482, IF_8086},
- /* 459 */ {I_IMUL, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+17487, IF_386},
- /* 460 */ {I_IMUL, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+17492, IF_X64},
- /* 461 */ {I_IMUL, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+13556, IF_386|IF_SM},
- /* 462 */ {I_IMUL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13556, IF_386},
- /* 463 */ {I_IMUL, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+13562, IF_386|IF_SM},
- /* 464 */ {I_IMUL, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13562, IF_386},
- /* 465 */ {I_IMUL, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+13568, IF_X64|IF_SM},
- /* 466 */ {I_IMUL, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13568, IF_X64},
- /* 467 */ {I_IMUL, 3, {REG_GPR|BITS16,MEMORY,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+13574, IF_186|IF_SM},
- /* 468 */ {I_IMUL, 3, {REG_GPR|BITS16,MEMORY,IMMEDIATE|BITS16,0,0}, nasm_bytecodes+13580, IF_186|IF_SM},
- /* 469 */ {I_IMUL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+13574, IF_186},
- /* 470 */ {I_IMUL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE|BITS16,0,0}, nasm_bytecodes+13580, IF_186},
- /* 471 */ {I_IMUL, 3, {REG_GPR|BITS32,MEMORY,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+13592, IF_386|IF_SM},
- /* 472 */ {I_IMUL, 3, {REG_GPR|BITS32,MEMORY,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+13598, IF_386|IF_SM},
- /* 473 */ {I_IMUL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+13592, IF_386},
- /* 474 */ {I_IMUL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+13598, IF_386},
- /* 475 */ {I_IMUL, 3, {REG_GPR|BITS64,MEMORY,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+13610, IF_X64|IF_SM},
- /* 476 */ {I_IMUL, 3, {REG_GPR|BITS64,MEMORY,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+13616, IF_X64|IF_SM},
- /* 477 */ {I_IMUL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+13610, IF_X64},
- /* 478 */ {I_IMUL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+13616, IF_X64},
- /* 479 */ {I_IMUL, 2, {REG_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13628, IF_186},
- /* 480 */ {I_IMUL, 2, {REG_GPR|BITS16,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+13634, IF_186},
- /* 481 */ {I_IMUL, 2, {REG_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13646, IF_386},
- /* 482 */ {I_IMUL, 2, {REG_GPR|BITS32,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+13652, IF_386},
- /* 483 */ {I_IMUL, 2, {REG_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13664, IF_X64},
- /* 484 */ {I_IMUL, 2, {REG_GPR|BITS64,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+13670, IF_X64},
- /* 485 */ {I_IN, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+19232, IF_8086|IF_SB},
- /* 486 */ {I_IN, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+17497, IF_8086|IF_SB},
- /* 487 */ {I_IN, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+17502, IF_386|IF_SB},
- /* 488 */ {I_IN, 2, {REG_AL,REG_DX,0,0,0}, nasm_bytecodes+19707, IF_8086},
- /* 489 */ {I_IN, 2, {REG_AX,REG_DX,0,0,0}, nasm_bytecodes+19236, IF_8086},
- /* 490 */ {I_IN, 2, {REG_EAX,REG_DX,0,0,0}, nasm_bytecodes+19240, IF_386},
- /* 491 */ {I_INC, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19244, IF_8086|IF_NOLONG},
- /* 492 */ {I_INC, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19248, IF_386|IF_NOLONG},
- /* 493 */ {I_INC, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+19252, IF_8086},
- /* 494 */ {I_INC, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17507, IF_8086},
- /* 495 */ {I_INC, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+17512, IF_386},
- /* 496 */ {I_INC, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+17517, IF_X64},
- /* 497 */ {I_INSB, 0, {0,0,0,0,0}, nasm_bytecodes+19710, IF_186},
- /* 498 */ {I_INSD, 0, {0,0,0,0,0}, nasm_bytecodes+19256, IF_386},
- /* 499 */ {I_INSW, 0, {0,0,0,0,0}, nasm_bytecodes+19260, IF_186},
- /* 500 */ {I_INT, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+19264, IF_8086|IF_SB},
- /* 501 */ {I_INT1, 0, {0,0,0,0,0}, nasm_bytecodes+19704, IF_386},
- /* 502 */ {I_INT3, 0, {0,0,0,0,0}, nasm_bytecodes+19713, IF_8086},
- /* 503 */ {I_INTO, 0, {0,0,0,0,0}, nasm_bytecodes+19716, IF_8086|IF_NOLONG},
- /* 504 */ {I_INVD, 0, {0,0,0,0,0}, nasm_bytecodes+19268, IF_486|IF_PRIV},
- /* 505 */ {I_INVLPG, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17522, IF_486|IF_PRIV},
- /* 506 */ {I_INVLPGA, 2, {REG_AX,REG_ECX,0,0,0}, nasm_bytecodes+13682, IF_X86_64|IF_AMD|IF_NOLONG},
- /* 507 */ {I_INVLPGA, 2, {REG_EAX,REG_ECX,0,0,0}, nasm_bytecodes+13688, IF_X86_64|IF_AMD},
- /* 508 */ {I_INVLPGA, 2, {REG_RAX,REG_ECX,0,0,0}, nasm_bytecodes+7004, IF_X64|IF_AMD},
- /* 509 */ {I_INVLPGA, 0, {0,0,0,0,0}, nasm_bytecodes+13689, IF_X86_64|IF_AMD},
- /* 510 */ {I_IRET, 0, {0,0,0,0,0}, nasm_bytecodes+19272, IF_8086},
- /* 511 */ {I_IRETD, 0, {0,0,0,0,0}, nasm_bytecodes+19276, IF_386},
- /* 512 */ {I_IRETQ, 0, {0,0,0,0,0}, nasm_bytecodes+19280, IF_X64},
- /* 513 */ {I_IRETW, 0, {0,0,0,0,0}, nasm_bytecodes+19284, IF_8086},
- /* 514 */ {I_JCXZ, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+17527, IF_8086|IF_NOLONG},
- /* 515 */ {I_JECXZ, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+17532, IF_386},
- /* 516 */ {I_JRCXZ, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+17537, IF_X64},
- /* 517 */ {I_JMP, 1, {IMMEDIATE|SHORT,0,0,0,0}, nasm_bytecodes+17543, IF_8086},
- /* 518 */ {I_JMP, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+17547, IF_8086},
- /* 519 */ {I_JMP, 1, {IMMEDIATE|BITS16,0,0,0,0}, nasm_bytecodes+17552, IF_8086},
- /* 520 */ {I_JMP, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+17557, IF_386},
- /* 521 */ {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+13712, IF_8086|IF_NOLONG},
- /* 522 */ {I_JMP, 2, {IMMEDIATE|BITS16|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+13718, IF_8086|IF_NOLONG},
- /* 523 */ {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+13718, IF_8086|IF_NOLONG},
- /* 524 */ {I_JMP, 2, {IMMEDIATE|BITS32|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+13724, IF_386|IF_NOLONG},
- /* 525 */ {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+13724, IF_386|IF_NOLONG},
- /* 526 */ {I_JMP, 1, {MEMORY|FAR,0,0,0,0}, nasm_bytecodes+17562, IF_8086|IF_NOLONG},
- /* 527 */ {I_JMP, 1, {MEMORY|FAR,0,0,0,0}, nasm_bytecodes+17567, IF_X64},
- /* 528 */ {I_JMP, 1, {MEMORY|BITS16|FAR,0,0,0,0}, nasm_bytecodes+17572, IF_8086},
- /* 529 */ {I_JMP, 1, {MEMORY|BITS32|FAR,0,0,0,0}, nasm_bytecodes+17577, IF_386},
- /* 530 */ {I_JMP, 1, {MEMORY|BITS64|FAR,0,0,0,0}, nasm_bytecodes+17567, IF_X64},
- /* 531 */ {I_JMP, 1, {MEMORY|NEAR,0,0,0,0}, nasm_bytecodes+17582, IF_8086},
- /* 532 */ {I_JMP, 1, {MEMORY|BITS16|NEAR,0,0,0,0}, nasm_bytecodes+17587, IF_8086},
- /* 533 */ {I_JMP, 1, {MEMORY|BITS32|NEAR,0,0,0,0}, nasm_bytecodes+17592, IF_386|IF_NOLONG},
- /* 534 */ {I_JMP, 1, {MEMORY|BITS64|NEAR,0,0,0,0}, nasm_bytecodes+17597, IF_X64},
- /* 535 */ {I_JMP, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17587, IF_8086},
- /* 536 */ {I_JMP, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+17592, IF_386|IF_NOLONG},
- /* 537 */ {I_JMP, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+17597, IF_X64},
- /* 538 */ {I_JMP, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17582, IF_8086},
- /* 539 */ {I_JMP, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+17587, IF_8086},
- /* 540 */ {I_JMP, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+17592, IF_386|IF_NOLONG},
- /* 541 */ {I_JMP, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+17597, IF_X64},
- /* 542 */ {I_JMPE, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+13730, IF_IA64},
- /* 543 */ {I_JMPE, 1, {IMMEDIATE|BITS16,0,0,0,0}, nasm_bytecodes+13736, IF_IA64},
- /* 544 */ {I_JMPE, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+13742, IF_IA64},
- /* 545 */ {I_JMPE, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+13748, IF_IA64},
- /* 546 */ {I_JMPE, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+13754, IF_IA64},
- /* 547 */ {I_LAHF, 0, {0,0,0,0,0}, nasm_bytecodes+19719, IF_8086},
- /* 548 */ {I_LAR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+13760, IF_286|IF_PROT|IF_SW},
- /* 549 */ {I_LAR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13760, IF_286|IF_PROT},
- /* 550 */ {I_LAR, 2, {REG_GPR|BITS16,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13760, IF_386|IF_PROT},
- /* 551 */ {I_LAR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+13766, IF_386|IF_PROT|IF_SW},
- /* 552 */ {I_LAR, 2, {REG_GPR|BITS32,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13766, IF_386|IF_PROT},
- /* 553 */ {I_LAR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13766, IF_386|IF_PROT},
- /* 554 */ {I_LAR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+13772, IF_X64|IF_PROT|IF_SW},
- /* 555 */ {I_LAR, 2, {REG_GPR|BITS64,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13772, IF_X64|IF_PROT},
- /* 556 */ {I_LAR, 2, {REG_GPR|BITS64,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13772, IF_X64|IF_PROT},
- /* 557 */ {I_LAR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13772, IF_X64|IF_PROT},
- /* 558 */ {I_LDS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+17602, IF_8086|IF_NOLONG},
- /* 559 */ {I_LDS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+17607, IF_386|IF_NOLONG},
- /* 560 */ {I_LEA, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+17612, IF_8086},
- /* 561 */ {I_LEA, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+17617, IF_386},
- /* 562 */ {I_LEA, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+17622, IF_X64},
- /* 563 */ {I_LEAVE, 0, {0,0,0,0,0}, nasm_bytecodes+17859, IF_186},
- /* 564 */ {I_LES, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+17627, IF_8086|IF_NOLONG},
- /* 565 */ {I_LES, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+17632, IF_386|IF_NOLONG},
- /* 566 */ {I_LFENCE, 0, {0,0,0,0,0}, nasm_bytecodes+17637, IF_X64|IF_AMD},
- /* 567 */ {I_LFS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+13778, IF_386},
- /* 568 */ {I_LFS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+13784, IF_386},
- /* 569 */ {I_LFS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+13790, IF_X64},
- /* 570 */ {I_LGDT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17642, IF_286|IF_PRIV},
- /* 571 */ {I_LGS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+13796, IF_386},
- /* 572 */ {I_LGS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+13802, IF_386},
- /* 573 */ {I_LGS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+13808, IF_X64},
- /* 574 */ {I_LIDT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17647, IF_286|IF_PRIV},
- /* 575 */ {I_LLDT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17652, IF_286|IF_PROT|IF_PRIV},
- /* 576 */ {I_LLDT, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+17652, IF_286|IF_PROT|IF_PRIV},
- /* 577 */ {I_LLDT, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17652, IF_286|IF_PROT|IF_PRIV},
- /* 578 */ {I_LMSW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17657, IF_286|IF_PRIV},
- /* 579 */ {I_LMSW, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+17657, IF_286|IF_PRIV},
- /* 580 */ {I_LMSW, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17657, IF_286|IF_PRIV},
- /* 581 */ {I_LOADALL, 0, {0,0,0,0,0}, nasm_bytecodes+19288, IF_386|IF_UNDOC},
- /* 582 */ {I_LOADALL286, 0, {0,0,0,0,0}, nasm_bytecodes+19292, IF_286|IF_UNDOC},
- /* 583 */ {I_LODSB, 0, {0,0,0,0,0}, nasm_bytecodes+19722, IF_8086},
- /* 584 */ {I_LODSD, 0, {0,0,0,0,0}, nasm_bytecodes+19296, IF_386},
- /* 585 */ {I_LODSQ, 0, {0,0,0,0,0}, nasm_bytecodes+19300, IF_X64},
- /* 586 */ {I_LODSW, 0, {0,0,0,0,0}, nasm_bytecodes+19304, IF_8086},
- /* 587 */ {I_LOOP, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+17662, IF_8086},
- /* 588 */ {I_LOOP, 2, {IMMEDIATE,REG_CX,0,0,0}, nasm_bytecodes+17667, IF_8086|IF_NOLONG},
- /* 589 */ {I_LOOP, 2, {IMMEDIATE,REG_ECX,0,0,0}, nasm_bytecodes+17672, IF_386},
- /* 590 */ {I_LOOP, 2, {IMMEDIATE,REG_RCX,0,0,0}, nasm_bytecodes+17677, IF_X64},
- /* 591 */ {I_LOOPE, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+17682, IF_8086},
- /* 592 */ {I_LOOPE, 2, {IMMEDIATE,REG_CX,0,0,0}, nasm_bytecodes+17687, IF_8086|IF_NOLONG},
- /* 593 */ {I_LOOPE, 2, {IMMEDIATE,REG_ECX,0,0,0}, nasm_bytecodes+17692, IF_386},
- /* 594 */ {I_LOOPE, 2, {IMMEDIATE,REG_RCX,0,0,0}, nasm_bytecodes+17697, IF_X64},
- /* 595 */ {I_LOOPNE, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+17702, IF_8086},
- /* 596 */ {I_LOOPNE, 2, {IMMEDIATE,REG_CX,0,0,0}, nasm_bytecodes+17707, IF_8086|IF_NOLONG},
- /* 597 */ {I_LOOPNE, 2, {IMMEDIATE,REG_ECX,0,0,0}, nasm_bytecodes+17712, IF_386},
- /* 598 */ {I_LOOPNE, 2, {IMMEDIATE,REG_RCX,0,0,0}, nasm_bytecodes+17717, IF_X64},
- /* 599 */ {I_LOOPNZ, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+17702, IF_8086},
- /* 600 */ {I_LOOPNZ, 2, {IMMEDIATE,REG_CX,0,0,0}, nasm_bytecodes+17707, IF_8086|IF_NOLONG},
- /* 601 */ {I_LOOPNZ, 2, {IMMEDIATE,REG_ECX,0,0,0}, nasm_bytecodes+17712, IF_386},
- /* 602 */ {I_LOOPNZ, 2, {IMMEDIATE,REG_RCX,0,0,0}, nasm_bytecodes+17717, IF_X64},
- /* 603 */ {I_LOOPZ, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+17682, IF_8086},
- /* 604 */ {I_LOOPZ, 2, {IMMEDIATE,REG_CX,0,0,0}, nasm_bytecodes+17687, IF_8086|IF_NOLONG},
- /* 605 */ {I_LOOPZ, 2, {IMMEDIATE,REG_ECX,0,0,0}, nasm_bytecodes+17692, IF_386},
- /* 606 */ {I_LOOPZ, 2, {IMMEDIATE,REG_RCX,0,0,0}, nasm_bytecodes+17697, IF_X64},
- /* 607 */ {I_LSL, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+13814, IF_286|IF_PROT|IF_SW},
- /* 608 */ {I_LSL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13814, IF_286|IF_PROT},
- /* 609 */ {I_LSL, 2, {REG_GPR|BITS16,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13814, IF_386|IF_PROT},
- /* 610 */ {I_LSL, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+13820, IF_386|IF_PROT|IF_SW},
- /* 611 */ {I_LSL, 2, {REG_GPR|BITS32,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13820, IF_386|IF_PROT},
- /* 612 */ {I_LSL, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13820, IF_386|IF_PROT},
- /* 613 */ {I_LSL, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+13826, IF_X64|IF_PROT|IF_SW},
- /* 614 */ {I_LSL, 2, {REG_GPR|BITS64,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+13826, IF_X64|IF_PROT},
- /* 615 */ {I_LSL, 2, {REG_GPR|BITS64,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13826, IF_X64|IF_PROT},
- /* 616 */ {I_LSL, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13826, IF_X64|IF_PROT},
- /* 617 */ {I_LSS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+13832, IF_386},
- /* 618 */ {I_LSS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+13838, IF_386},
- /* 619 */ {I_LSS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+13844, IF_X64},
- /* 620 */ {I_LTR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17722, IF_286|IF_PROT|IF_PRIV},
- /* 621 */ {I_LTR, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+17722, IF_286|IF_PROT|IF_PRIV},
- /* 622 */ {I_LTR, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17722, IF_286|IF_PROT|IF_PRIV},
- /* 623 */ {I_MFENCE, 0, {0,0,0,0,0}, nasm_bytecodes+17727, IF_X64|IF_AMD},
- /* 624 */ {I_MONITOR, 0, {0,0,0,0,0}, nasm_bytecodes+17732, IF_PRESCOTT},
- /* 625 */ {I_MOV, 2, {MEMORY,REG_SREG,0,0,0}, nasm_bytecodes+17743, IF_8086|IF_SM},
- /* 626 */ {I_MOV, 2, {REG_GPR|BITS16,REG_SREG,0,0,0}, nasm_bytecodes+17737, IF_8086},
- /* 627 */ {I_MOV, 2, {REG_GPR|BITS32,REG_SREG,0,0,0}, nasm_bytecodes+17742, IF_386},
- /* 628 */ {I_MOV, 2, {REG_SREG,MEMORY,0,0,0}, nasm_bytecodes+19308, IF_8086|IF_SM},
- /* 629 */ {I_MOV, 2, {REG_SREG,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+19308, IF_8086},
- /* 630 */ {I_MOV, 2, {REG_SREG,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+19308, IF_386},
- /* 631 */ {I_MOV, 2, {REG_AL,MEM_OFFS,0,0,0}, nasm_bytecodes+19312, IF_8086|IF_SM},
- /* 632 */ {I_MOV, 2, {REG_AX,MEM_OFFS,0,0,0}, nasm_bytecodes+17747, IF_8086|IF_SM},
- /* 633 */ {I_MOV, 2, {REG_EAX,MEM_OFFS,0,0,0}, nasm_bytecodes+17752, IF_386|IF_SM},
- /* 634 */ {I_MOV, 2, {REG_RAX,MEM_OFFS,0,0,0}, nasm_bytecodes+17757, IF_X64|IF_SM},
- /* 635 */ {I_MOV, 2, {MEM_OFFS,REG_AL,0,0,0}, nasm_bytecodes+19316, IF_8086|IF_SM},
- /* 636 */ {I_MOV, 2, {MEM_OFFS,REG_AX,0,0,0}, nasm_bytecodes+17762, IF_8086|IF_SM},
- /* 637 */ {I_MOV, 2, {MEM_OFFS,REG_EAX,0,0,0}, nasm_bytecodes+17767, IF_386|IF_SM},
- /* 638 */ {I_MOV, 2, {MEM_OFFS,REG_RAX,0,0,0}, nasm_bytecodes+17772, IF_X64|IF_SM},
- /* 639 */ {I_MOV, 2, {REG_GPR|BITS32,REG_CREG,0,0,0}, nasm_bytecodes+13850, IF_386|IF_PRIV|IF_NOLONG},
- /* 640 */ {I_MOV, 2, {REG_GPR|BITS64,REG_CREG,0,0,0}, nasm_bytecodes+13856, IF_X64|IF_PRIV},
- /* 641 */ {I_MOV, 2, {REG_CREG,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13862, IF_386|IF_PRIV|IF_NOLONG},
- /* 642 */ {I_MOV, 2, {REG_CREG,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13868, IF_X64|IF_PRIV},
- /* 643 */ {I_MOV, 2, {REG_GPR|BITS32,REG_DREG,0,0,0}, nasm_bytecodes+13875, IF_386|IF_PRIV|IF_NOLONG},
- /* 644 */ {I_MOV, 2, {REG_GPR|BITS64,REG_DREG,0,0,0}, nasm_bytecodes+13874, IF_X64|IF_PRIV},
- /* 645 */ {I_MOV, 2, {REG_DREG,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13881, IF_386|IF_PRIV|IF_NOLONG},
- /* 646 */ {I_MOV, 2, {REG_DREG,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+13880, IF_X64|IF_PRIV},
- /* 647 */ {I_MOV, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19320, IF_8086|IF_SM},
- /* 648 */ {I_MOV, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19320, IF_8086},
- /* 649 */ {I_MOV, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+17787, IF_8086|IF_SM},
- /* 650 */ {I_MOV, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+17787, IF_8086},
- /* 651 */ {I_MOV, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17792, IF_386|IF_SM},
- /* 652 */ {I_MOV, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17792, IF_386},
- /* 653 */ {I_MOV, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17797, IF_X64|IF_SM},
- /* 654 */ {I_MOV, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17797, IF_X64},
- /* 655 */ {I_MOV, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+19324, IF_8086|IF_SM},
- /* 656 */ {I_MOV, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19324, IF_8086},
- /* 657 */ {I_MOV, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+17802, IF_8086|IF_SM},
- /* 658 */ {I_MOV, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+17802, IF_8086},
- /* 659 */ {I_MOV, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+17807, IF_386|IF_SM},
- /* 660 */ {I_MOV, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17807, IF_386},
- /* 661 */ {I_MOV, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+17812, IF_X64|IF_SM},
- /* 662 */ {I_MOV, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17812, IF_X64},
- /* 663 */ {I_MOV, 2, {REG_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+19328, IF_8086|IF_SM},
- /* 664 */ {I_MOV, 2, {REG_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+17817, IF_8086|IF_SM},
- /* 665 */ {I_MOV, 2, {REG_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+17822, IF_386|IF_SM},
- /* 666 */ {I_MOV, 2, {REG_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+17827, IF_X64|IF_SM},
- /* 667 */ {I_MOV, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+17832, IF_8086|IF_SM},
- /* 668 */ {I_MOV, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+13886, IF_8086|IF_SM},
- /* 669 */ {I_MOV, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+13892, IF_386|IF_SM},
- /* 670 */ {I_MOV, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+13898, IF_X64|IF_SM},
- /* 671 */ {I_MOV, 2, {RM_GPR|BITS64,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+13898, IF_X64},
- /* 672 */ {I_MOV, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+17832, IF_8086|IF_SM},
- /* 673 */ {I_MOV, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+13886, IF_8086|IF_SM},
- /* 674 */ {I_MOV, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+13892, IF_386|IF_SM},
- /* 675 */ {I_MOVD, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+13904, IF_PENT|IF_MMX|IF_SD},
- /* 676 */ {I_MOVD, 2, {MMXREG,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+13904, IF_PENT|IF_MMX},
- /* 677 */ {I_MOVD, 2, {MEMORY,MMXREG,0,0,0}, nasm_bytecodes+13910, IF_PENT|IF_MMX|IF_SD},
- /* 678 */ {I_MOVD, 2, {REG_GPR|BITS32,MMXREG,0,0,0}, nasm_bytecodes+13910, IF_PENT|IF_MMX},
- /* 679 */ {I_MOVD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+7039, IF_X64|IF_SD},
- /* 680 */ {I_MOVD, 2, {XMMREG,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7039, IF_X64},
- /* 681 */ {I_MOVD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+7046, IF_X64|IF_SD},
- /* 682 */ {I_MOVD, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+7046, IF_X64|IF_SSE},
- /* 683 */ {I_MOVQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7053, IF_PENT|IF_MMX|IF_SQ},
- /* 684 */ {I_MOVQ, 2, {RM_MMX,MMXREG,0,0,0}, nasm_bytecodes+7060, IF_PENT|IF_MMX|IF_SQ},
- /* 685 */ {I_MOVQ, 2, {MMXREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+13904, IF_X64|IF_MMX},
- /* 686 */ {I_MOVQ, 2, {RM_GPR|BITS64,MMXREG,0,0,0}, nasm_bytecodes+13910, IF_X64|IF_MMX},
- /* 687 */ {I_MOVSB, 0, {0,0,0,0,0}, nasm_bytecodes+5245, IF_8086},
- /* 688 */ {I_MOVSD, 0, {0,0,0,0,0}, nasm_bytecodes+19332, IF_386},
- /* 689 */ {I_MOVSQ, 0, {0,0,0,0,0}, nasm_bytecodes+19336, IF_X64},
- /* 690 */ {I_MOVSW, 0, {0,0,0,0,0}, nasm_bytecodes+19340, IF_8086},
- /* 691 */ {I_MOVSX, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+13916, IF_386|IF_SB},
- /* 692 */ {I_MOVSX, 2, {REG_GPR|BITS16,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+13916, IF_386},
- /* 693 */ {I_MOVSX, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, nasm_bytecodes+13922, IF_386},
- /* 694 */ {I_MOVSX, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+13928, IF_386},
- /* 695 */ {I_MOVSX, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, nasm_bytecodes+13934, IF_X64},
- /* 696 */ {I_MOVSX, 2, {REG_GPR|BITS64,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+13940, IF_X64},
- /* 697 */ {I_MOVSXD, 2, {REG_GPR|BITS64,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+17837, IF_X64},
- /* 698 */ {I_MOVZX, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+13946, IF_386|IF_SB},
- /* 699 */ {I_MOVZX, 2, {REG_GPR|BITS16,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+13946, IF_386},
- /* 700 */ {I_MOVZX, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, nasm_bytecodes+13952, IF_386},
- /* 701 */ {I_MOVZX, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+13958, IF_386},
- /* 702 */ {I_MOVZX, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, nasm_bytecodes+13964, IF_X64},
- /* 703 */ {I_MOVZX, 2, {REG_GPR|BITS64,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+13970, IF_X64},
- /* 704 */ {I_MUL, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+19344, IF_8086},
- /* 705 */ {I_MUL, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17842, IF_8086},
- /* 706 */ {I_MUL, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+17847, IF_386},
- /* 707 */ {I_MUL, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+17852, IF_X64},
- /* 708 */ {I_MWAIT, 0, {0,0,0,0,0}, nasm_bytecodes+17857, IF_PRESCOTT},
- /* 709 */ {I_NEG, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+19348, IF_8086},
- /* 710 */ {I_NEG, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17862, IF_8086},
- /* 711 */ {I_NEG, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+17867, IF_386},
- /* 712 */ {I_NEG, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+17872, IF_X64},
- /* 713 */ {I_NOP, 0, {0,0,0,0,0}, nasm_bytecodes+19352, IF_8086},
- /* 714 */ {I_NOP, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+13976, IF_P6},
- /* 715 */ {I_NOP, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+13982, IF_P6},
- /* 716 */ {I_NOP, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+13988, IF_X64},
- /* 717 */ {I_NOT, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+19356, IF_8086},
- /* 718 */ {I_NOT, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17877, IF_8086},
- /* 719 */ {I_NOT, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+17882, IF_386},
- /* 720 */ {I_NOT, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+17887, IF_X64},
- /* 721 */ {I_OR, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19360, IF_8086|IF_SM},
- /* 722 */ {I_OR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19360, IF_8086},
- /* 723 */ {I_OR, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+17892, IF_8086|IF_SM},
- /* 724 */ {I_OR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+17892, IF_8086},
- /* 725 */ {I_OR, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17897, IF_386|IF_SM},
- /* 726 */ {I_OR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17897, IF_386},
- /* 727 */ {I_OR, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17902, IF_X64|IF_SM},
- /* 728 */ {I_OR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17902, IF_X64},
- /* 729 */ {I_OR, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+11067, IF_8086|IF_SM},
- /* 730 */ {I_OR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+11067, IF_8086},
- /* 731 */ {I_OR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+17907, IF_8086|IF_SM},
- /* 732 */ {I_OR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+17907, IF_8086},
- /* 733 */ {I_OR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+17912, IF_386|IF_SM},
- /* 734 */ {I_OR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17912, IF_386},
- /* 735 */ {I_OR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+17917, IF_X64|IF_SM},
- /* 736 */ {I_OR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17917, IF_X64},
- /* 737 */ {I_OR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+13994, IF_8086},
- /* 738 */ {I_OR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+14000, IF_386},
- /* 739 */ {I_OR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+14006, IF_X64},
- /* 740 */ {I_OR, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+19364, IF_8086|IF_SM},
- /* 741 */ {I_OR, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+13994, IF_8086|IF_SM},
- /* 742 */ {I_OR, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+17922, IF_8086|IF_SM},
- /* 743 */ {I_OR, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+14000, IF_386|IF_SM},
- /* 744 */ {I_OR, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+17927, IF_386|IF_SM},
- /* 745 */ {I_OR, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+14006, IF_X64|IF_SM},
- /* 746 */ {I_OR, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+17932, IF_X64|IF_SM},
- /* 747 */ {I_OR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+17937, IF_8086|IF_SM},
- /* 748 */ {I_OR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+14012, IF_8086|IF_SM},
- /* 749 */ {I_OR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+14018, IF_386|IF_SM},
- /* 750 */ {I_OR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+14024, IF_X64|IF_SM},
- /* 751 */ {I_OR, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+17937, IF_8086|IF_SM},
- /* 752 */ {I_OR, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+14012, IF_8086|IF_SM},
- /* 753 */ {I_OR, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+14018, IF_386|IF_SM},
- /* 754 */ {I_OUT, 2, {IMMEDIATE,REG_AL,0,0,0}, nasm_bytecodes+19368, IF_8086|IF_SB},
- /* 755 */ {I_OUT, 2, {IMMEDIATE,REG_AX,0,0,0}, nasm_bytecodes+17942, IF_8086|IF_SB},
- /* 756 */ {I_OUT, 2, {IMMEDIATE,REG_EAX,0,0,0}, nasm_bytecodes+17947, IF_386|IF_SB},
- /* 757 */ {I_OUT, 2, {REG_DX,REG_AL,0,0,0}, nasm_bytecodes+19725, IF_8086},
- /* 758 */ {I_OUT, 2, {REG_DX,REG_AX,0,0,0}, nasm_bytecodes+19372, IF_8086},
- /* 759 */ {I_OUT, 2, {REG_DX,REG_EAX,0,0,0}, nasm_bytecodes+19376, IF_386},
- /* 760 */ {I_OUTSB, 0, {0,0,0,0,0}, nasm_bytecodes+19728, IF_186},
- /* 761 */ {I_OUTSD, 0, {0,0,0,0,0}, nasm_bytecodes+19380, IF_386},
- /* 762 */ {I_OUTSW, 0, {0,0,0,0,0}, nasm_bytecodes+19384, IF_186},
- /* 763 */ {I_PACKSSDW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7067, IF_PENT|IF_MMX|IF_SQ},
- /* 764 */ {I_PACKSSWB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7074, IF_PENT|IF_MMX|IF_SQ},
- /* 765 */ {I_PACKUSWB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7081, IF_PENT|IF_MMX|IF_SQ},
- /* 766 */ {I_PADDB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7088, IF_PENT|IF_MMX|IF_SQ},
- /* 767 */ {I_PADDD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7095, IF_PENT|IF_MMX|IF_SQ},
- /* 768 */ {I_PADDSB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7102, IF_PENT|IF_MMX|IF_SQ},
- /* 769 */ {I_PADDSIW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+14030, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
- /* 770 */ {I_PADDSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7109, IF_PENT|IF_MMX|IF_SQ},
- /* 771 */ {I_PADDUSB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7116, IF_PENT|IF_MMX|IF_SQ},
- /* 772 */ {I_PADDUSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7123, IF_PENT|IF_MMX|IF_SQ},
- /* 773 */ {I_PADDW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7130, IF_PENT|IF_MMX|IF_SQ},
- /* 774 */ {I_PAND, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7137, IF_PENT|IF_MMX|IF_SQ},
- /* 775 */ {I_PANDN, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7144, IF_PENT|IF_MMX|IF_SQ},
- /* 776 */ {I_PAUSE, 0, {0,0,0,0,0}, nasm_bytecodes+17952, IF_8086},
- /* 777 */ {I_PAVEB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+14036, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
- /* 778 */ {I_PAVGUSB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5184, IF_PENT|IF_3DNOW|IF_SQ},
- /* 779 */ {I_PCMPEQB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7151, IF_PENT|IF_MMX|IF_SQ},
- /* 780 */ {I_PCMPEQD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7158, IF_PENT|IF_MMX|IF_SQ},
- /* 781 */ {I_PCMPEQW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7165, IF_PENT|IF_MMX|IF_SQ},
- /* 782 */ {I_PCMPGTB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7172, IF_PENT|IF_MMX|IF_SQ},
- /* 783 */ {I_PCMPGTD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7179, IF_PENT|IF_MMX|IF_SQ},
- /* 784 */ {I_PCMPGTW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7186, IF_PENT|IF_MMX|IF_SQ},
- /* 785 */ {I_PDISTIB, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+15207, IF_PENT|IF_MMX|IF_SM|IF_CYRIX},
- /* 786 */ {I_PF2ID, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5192, IF_PENT|IF_3DNOW|IF_SQ},
- /* 787 */ {I_PFACC, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5200, IF_PENT|IF_3DNOW|IF_SQ},
- /* 788 */ {I_PFADD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5208, IF_PENT|IF_3DNOW|IF_SQ},
- /* 789 */ {I_PFCMPEQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5216, IF_PENT|IF_3DNOW|IF_SQ},
- /* 790 */ {I_PFCMPGE, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5224, IF_PENT|IF_3DNOW|IF_SQ},
- /* 791 */ {I_PFCMPGT, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5232, IF_PENT|IF_3DNOW|IF_SQ},
- /* 792 */ {I_PFMAX, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5240, IF_PENT|IF_3DNOW|IF_SQ},
- /* 793 */ {I_PFMIN, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5248, IF_PENT|IF_3DNOW|IF_SQ},
- /* 794 */ {I_PFMUL, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5256, IF_PENT|IF_3DNOW|IF_SQ},
- /* 795 */ {I_PFRCP, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5264, IF_PENT|IF_3DNOW|IF_SQ},
- /* 796 */ {I_PFRCPIT1, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5272, IF_PENT|IF_3DNOW|IF_SQ},
- /* 797 */ {I_PFRCPIT2, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5280, IF_PENT|IF_3DNOW|IF_SQ},
- /* 798 */ {I_PFRSQIT1, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5288, IF_PENT|IF_3DNOW|IF_SQ},
- /* 799 */ {I_PFRSQRT, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5296, IF_PENT|IF_3DNOW|IF_SQ},
- /* 800 */ {I_PFSUB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5304, IF_PENT|IF_3DNOW|IF_SQ},
- /* 801 */ {I_PFSUBR, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5312, IF_PENT|IF_3DNOW|IF_SQ},
- /* 802 */ {I_PI2FD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5320, IF_PENT|IF_3DNOW|IF_SQ},
- /* 803 */ {I_PMACHRIW, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+15303, IF_PENT|IF_MMX|IF_SM|IF_CYRIX},
- /* 804 */ {I_PMADDWD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7193, IF_PENT|IF_MMX|IF_SQ},
- /* 805 */ {I_PMAGW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+14042, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
- /* 806 */ {I_PMULHRIW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+14048, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
- /* 807 */ {I_PMULHRWA, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5328, IF_PENT|IF_3DNOW|IF_SQ},
- /* 808 */ {I_PMULHRWC, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+14054, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
- /* 809 */ {I_PMULHW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7200, IF_PENT|IF_MMX|IF_SQ},
- /* 810 */ {I_PMULLW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7207, IF_PENT|IF_MMX|IF_SQ},
- /* 811 */ {I_PMVGEZB, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+15435, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
- /* 812 */ {I_PMVLZB, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+15291, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
- /* 813 */ {I_PMVNZB, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+15273, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
- /* 814 */ {I_PMVZB, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+15195, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
- /* 815 */ {I_POP, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19388, IF_8086},
- /* 816 */ {I_POP, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19392, IF_386|IF_NOLONG},
- /* 817 */ {I_POP, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19396, IF_X64},
- /* 818 */ {I_POP, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17957, IF_8086},
- /* 819 */ {I_POP, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+17962, IF_386|IF_NOLONG},
- /* 820 */ {I_POP, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+17967, IF_X64},
- /* 821 */ {I_POP, 1, {REG_DESS,0,0,0,0}, nasm_bytecodes+19206, IF_8086|IF_NOLONG},
- /* 822 */ {I_POP, 1, {REG_FSGS,0,0,0,0}, nasm_bytecodes+19400, IF_386},
- /* 823 */ {I_POPA, 0, {0,0,0,0,0}, nasm_bytecodes+19404, IF_186|IF_NOLONG},
- /* 824 */ {I_POPAD, 0, {0,0,0,0,0}, nasm_bytecodes+19408, IF_386|IF_NOLONG},
- /* 825 */ {I_POPAW, 0, {0,0,0,0,0}, nasm_bytecodes+19412, IF_186|IF_NOLONG},
- /* 826 */ {I_POPF, 0, {0,0,0,0,0}, nasm_bytecodes+19416, IF_8086},
- /* 827 */ {I_POPFD, 0, {0,0,0,0,0}, nasm_bytecodes+19420, IF_386|IF_NOLONG},
- /* 828 */ {I_POPFQ, 0, {0,0,0,0,0}, nasm_bytecodes+19420, IF_X64},
- /* 829 */ {I_POPFW, 0, {0,0,0,0,0}, nasm_bytecodes+19424, IF_8086},
- /* 830 */ {I_POR, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7214, IF_PENT|IF_MMX|IF_SQ},
- /* 831 */ {I_PREFETCH, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17972, IF_PENT|IF_3DNOW|IF_SQ},
- /* 832 */ {I_PREFETCHW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17977, IF_PENT|IF_3DNOW|IF_SQ},
- /* 833 */ {I_PSLLD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7221, IF_PENT|IF_MMX|IF_SQ},
- /* 834 */ {I_PSLLD, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7228, IF_PENT|IF_MMX},
- /* 835 */ {I_PSLLQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7235, IF_PENT|IF_MMX|IF_SQ},
- /* 836 */ {I_PSLLQ, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7242, IF_PENT|IF_MMX},
- /* 837 */ {I_PSLLW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7249, IF_PENT|IF_MMX|IF_SQ},
- /* 838 */ {I_PSLLW, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7256, IF_PENT|IF_MMX},
- /* 839 */ {I_PSRAD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7263, IF_PENT|IF_MMX|IF_SQ},
- /* 840 */ {I_PSRAD, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7270, IF_PENT|IF_MMX},
- /* 841 */ {I_PSRAW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7277, IF_PENT|IF_MMX|IF_SQ},
- /* 842 */ {I_PSRAW, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7284, IF_PENT|IF_MMX},
- /* 843 */ {I_PSRLD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7291, IF_PENT|IF_MMX|IF_SQ},
- /* 844 */ {I_PSRLD, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7298, IF_PENT|IF_MMX},
- /* 845 */ {I_PSRLQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7305, IF_PENT|IF_MMX|IF_SQ},
- /* 846 */ {I_PSRLQ, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7312, IF_PENT|IF_MMX},
- /* 847 */ {I_PSRLW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7319, IF_PENT|IF_MMX|IF_SQ},
- /* 848 */ {I_PSRLW, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7326, IF_PENT|IF_MMX},
- /* 849 */ {I_PSUBB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7333, IF_PENT|IF_MMX|IF_SQ},
- /* 850 */ {I_PSUBD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7340, IF_PENT|IF_MMX|IF_SQ},
- /* 851 */ {I_PSUBSB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7347, IF_PENT|IF_MMX|IF_SQ},
- /* 852 */ {I_PSUBSIW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+14060, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
- /* 853 */ {I_PSUBSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7354, IF_PENT|IF_MMX|IF_SQ},
- /* 854 */ {I_PSUBUSB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7361, IF_PENT|IF_MMX|IF_SQ},
- /* 855 */ {I_PSUBUSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7368, IF_PENT|IF_MMX|IF_SQ},
- /* 856 */ {I_PSUBW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7375, IF_PENT|IF_MMX|IF_SQ},
- /* 857 */ {I_PUNPCKHBW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7382, IF_PENT|IF_MMX|IF_SQ},
- /* 858 */ {I_PUNPCKHDQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7389, IF_PENT|IF_MMX|IF_SQ},
- /* 859 */ {I_PUNPCKHWD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7396, IF_PENT|IF_MMX|IF_SQ},
- /* 860 */ {I_PUNPCKLBW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7403, IF_PENT|IF_MMX|IF_SQ},
- /* 861 */ {I_PUNPCKLDQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7410, IF_PENT|IF_MMX|IF_SQ},
- /* 862 */ {I_PUNPCKLWD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7417, IF_PENT|IF_MMX|IF_SQ},
- /* 863 */ {I_PUSH, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19428, IF_8086},
- /* 864 */ {I_PUSH, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19432, IF_386|IF_NOLONG},
- /* 865 */ {I_PUSH, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19436, IF_X64},
- /* 866 */ {I_PUSH, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+17982, IF_8086},
- /* 867 */ {I_PUSH, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+17987, IF_386|IF_NOLONG},
- /* 868 */ {I_PUSH, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+17992, IF_X64},
- /* 869 */ {I_PUSH, 1, {REG_CS,0,0,0,0}, nasm_bytecodes+19182, IF_8086|IF_NOLONG},
- /* 870 */ {I_PUSH, 1, {REG_DESS,0,0,0,0}, nasm_bytecodes+19182, IF_8086|IF_NOLONG},
- /* 871 */ {I_PUSH, 1, {REG_FSGS,0,0,0,0}, nasm_bytecodes+19440, IF_386},
- /* 872 */ {I_PUSH, 1, {IMMEDIATE|BITS8,0,0,0,0}, nasm_bytecodes+19444, IF_186},
- /* 873 */ {I_PUSH, 1, {IMMEDIATE|BITS16,0,0,0,0}, nasm_bytecodes+17997, IF_186|IF_AR0|IF_SZ},
- /* 874 */ {I_PUSH, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+18002, IF_386|IF_NOLONG|IF_AR0|IF_SZ},
- /* 875 */ {I_PUSH, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+18002, IF_386|IF_NOLONG|IF_SD},
- /* 876 */ {I_PUSH, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+18007, IF_X64|IF_AR0|IF_SZ},
- /* 877 */ {I_PUSH, 1, {IMMEDIATE|BITS64,0,0,0,0}, nasm_bytecodes+18007, IF_X64|IF_AR0|IF_SZ},
- /* 878 */ {I_PUSHA, 0, {0,0,0,0,0}, nasm_bytecodes+19448, IF_186|IF_NOLONG},
- /* 879 */ {I_PUSHAD, 0, {0,0,0,0,0}, nasm_bytecodes+19452, IF_386|IF_NOLONG},
- /* 880 */ {I_PUSHAW, 0, {0,0,0,0,0}, nasm_bytecodes+19456, IF_186|IF_NOLONG},
- /* 881 */ {I_PUSHF, 0, {0,0,0,0,0}, nasm_bytecodes+19460, IF_8086},
- /* 882 */ {I_PUSHFD, 0, {0,0,0,0,0}, nasm_bytecodes+19464, IF_386|IF_NOLONG},
- /* 883 */ {I_PUSHFQ, 0, {0,0,0,0,0}, nasm_bytecodes+19464, IF_X64},
- /* 884 */ {I_PUSHFW, 0, {0,0,0,0,0}, nasm_bytecodes+19468, IF_8086},
- /* 885 */ {I_PXOR, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7424, IF_PENT|IF_MMX|IF_SQ},
- /* 886 */ {I_RCL, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+19472, IF_8086},
- /* 887 */ {I_RCL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+19476, IF_8086},
- /* 888 */ {I_RCL, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+18012, IF_186|IF_SB},
- /* 889 */ {I_RCL, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+18017, IF_8086},
- /* 890 */ {I_RCL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+18022, IF_8086},
- /* 891 */ {I_RCL, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+14066, IF_186|IF_SB},
- /* 892 */ {I_RCL, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+18027, IF_386},
- /* 893 */ {I_RCL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+18032, IF_386},
- /* 894 */ {I_RCL, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+14072, IF_386|IF_SB},
- /* 895 */ {I_RCL, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+18037, IF_X64},
- /* 896 */ {I_RCL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+18042, IF_X64},
- /* 897 */ {I_RCL, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+14078, IF_X64|IF_SB},
- /* 898 */ {I_RCR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+19480, IF_8086},
- /* 899 */ {I_RCR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+19484, IF_8086},
- /* 900 */ {I_RCR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+18047, IF_186|IF_SB},
- /* 901 */ {I_RCR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+18052, IF_8086},
- /* 902 */ {I_RCR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+18057, IF_8086},
- /* 903 */ {I_RCR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+14084, IF_186|IF_SB},
- /* 904 */ {I_RCR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+18062, IF_386},
- /* 905 */ {I_RCR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+18067, IF_386},
- /* 906 */ {I_RCR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+14090, IF_386|IF_SB},
- /* 907 */ {I_RCR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+18072, IF_X64},
- /* 908 */ {I_RCR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+18077, IF_X64},
- /* 909 */ {I_RCR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+14096, IF_X64|IF_SB},
- /* 910 */ {I_RDSHR, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+14102, IF_P6|IF_CYRIX|IF_SMM},
- /* 911 */ {I_RDMSR, 0, {0,0,0,0,0}, nasm_bytecodes+19488, IF_PENT|IF_PRIV},
- /* 912 */ {I_RDPMC, 0, {0,0,0,0,0}, nasm_bytecodes+19492, IF_P6},
- /* 913 */ {I_RDTSC, 0, {0,0,0,0,0}, nasm_bytecodes+19496, IF_PENT},
- /* 914 */ {I_RDTSCP, 0, {0,0,0,0,0}, nasm_bytecodes+18082, IF_X86_64},
- /* 915 */ {I_RET, 0, {0,0,0,0,0}, nasm_bytecodes+18609, IF_8086},
- /* 916 */ {I_RET, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+19500, IF_8086|IF_SW},
- /* 917 */ {I_RETF, 0, {0,0,0,0,0}, nasm_bytecodes+19731, IF_8086},
- /* 918 */ {I_RETF, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+19504, IF_8086|IF_SW},
- /* 919 */ {I_RETN, 0, {0,0,0,0,0}, nasm_bytecodes+18609, IF_8086},
- /* 920 */ {I_RETN, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+19500, IF_8086|IF_SW},
- /* 921 */ {I_ROL, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+19508, IF_8086},
- /* 922 */ {I_ROL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+19512, IF_8086},
- /* 923 */ {I_ROL, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+18087, IF_186|IF_SB},
- /* 924 */ {I_ROL, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+18092, IF_8086},
- /* 925 */ {I_ROL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+18097, IF_8086},
- /* 926 */ {I_ROL, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+14108, IF_186|IF_SB},
- /* 927 */ {I_ROL, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+18102, IF_386},
- /* 928 */ {I_ROL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+18107, IF_386},
- /* 929 */ {I_ROL, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+14114, IF_386|IF_SB},
- /* 930 */ {I_ROL, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+18112, IF_X64},
- /* 931 */ {I_ROL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+18117, IF_X64},
- /* 932 */ {I_ROL, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+14120, IF_X64|IF_SB},
- /* 933 */ {I_ROR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+19516, IF_8086},
- /* 934 */ {I_ROR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+19520, IF_8086},
- /* 935 */ {I_ROR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+18122, IF_186|IF_SB},
- /* 936 */ {I_ROR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+18127, IF_8086},
- /* 937 */ {I_ROR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+18132, IF_8086},
- /* 938 */ {I_ROR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+14126, IF_186|IF_SB},
- /* 939 */ {I_ROR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+18137, IF_386},
- /* 940 */ {I_ROR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+18142, IF_386},
- /* 941 */ {I_ROR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+14132, IF_386|IF_SB},
- /* 942 */ {I_ROR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+18147, IF_X64},
- /* 943 */ {I_ROR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+18152, IF_X64},
- /* 944 */ {I_ROR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+14138, IF_X64|IF_SB},
- /* 945 */ {I_RSDC, 2, {REG_SREG,MEMORY|BITS80,0,0,0}, nasm_bytecodes+15543, IF_486|IF_CYRIX|IF_SMM},
- /* 946 */ {I_RSLDT, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+18157, IF_486|IF_CYRIX|IF_SMM},
- /* 947 */ {I_RSM, 0, {0,0,0,0,0}, nasm_bytecodes+19524, IF_PENT|IF_SMM},
- /* 948 */ {I_RSTS, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+18162, IF_486|IF_CYRIX|IF_SMM},
- /* 949 */ {I_SAHF, 0, {0,0,0,0,0}, nasm_bytecodes+5213, IF_8086},
- /* 950 */ {I_SALC, 0, {0,0,0,0,0}, nasm_bytecodes+19734, IF_8086|IF_UNDOC},
- /* 951 */ {I_SAR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+19536, IF_8086},
- /* 952 */ {I_SAR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+19540, IF_8086},
- /* 953 */ {I_SAR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+18202, IF_186|IF_SB},
- /* 954 */ {I_SAR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+18207, IF_8086},
- /* 955 */ {I_SAR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+18212, IF_8086},
- /* 956 */ {I_SAR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+14162, IF_186|IF_SB},
- /* 957 */ {I_SAR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+18217, IF_386},
- /* 958 */ {I_SAR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+18222, IF_386},
- /* 959 */ {I_SAR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+14168, IF_386|IF_SB},
- /* 960 */ {I_SAR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+18227, IF_X64},
- /* 961 */ {I_SAR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+18232, IF_X64},
- /* 962 */ {I_SAR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+14174, IF_X64|IF_SB},
- /* 963 */ {I_SBB, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19544, IF_8086|IF_SM},
- /* 964 */ {I_SBB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19544, IF_8086},
- /* 965 */ {I_SBB, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18237, IF_8086|IF_SM},
- /* 966 */ {I_SBB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18237, IF_8086},
- /* 967 */ {I_SBB, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18242, IF_386|IF_SM},
- /* 968 */ {I_SBB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18242, IF_386},
- /* 969 */ {I_SBB, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18247, IF_X64|IF_SM},
- /* 970 */ {I_SBB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18247, IF_X64},
- /* 971 */ {I_SBB, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+8771, IF_8086|IF_SM},
- /* 972 */ {I_SBB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+8771, IF_8086},
- /* 973 */ {I_SBB, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+18252, IF_8086|IF_SM},
- /* 974 */ {I_SBB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18252, IF_8086},
- /* 975 */ {I_SBB, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+18257, IF_386|IF_SM},
- /* 976 */ {I_SBB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18257, IF_386},
- /* 977 */ {I_SBB, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+18262, IF_X64|IF_SM},
- /* 978 */ {I_SBB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18262, IF_X64},
- /* 979 */ {I_SBB, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+14180, IF_8086},
- /* 980 */ {I_SBB, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+14186, IF_386},
- /* 981 */ {I_SBB, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+14192, IF_X64},
- /* 982 */ {I_SBB, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+19548, IF_8086|IF_SM},
- /* 983 */ {I_SBB, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+14180, IF_8086|IF_SM},
- /* 984 */ {I_SBB, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+18267, IF_8086|IF_SM},
- /* 985 */ {I_SBB, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+14186, IF_386|IF_SM},
- /* 986 */ {I_SBB, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+18272, IF_386|IF_SM},
- /* 987 */ {I_SBB, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+14192, IF_X64|IF_SM},
- /* 988 */ {I_SBB, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+18277, IF_X64|IF_SM},
- /* 989 */ {I_SBB, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+18282, IF_8086|IF_SM},
- /* 990 */ {I_SBB, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+14198, IF_8086|IF_SM},
- /* 991 */ {I_SBB, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+14204, IF_386|IF_SM},
- /* 992 */ {I_SBB, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+14210, IF_X64|IF_SM},
- /* 993 */ {I_SBB, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+18282, IF_8086|IF_SM},
- /* 994 */ {I_SBB, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+14198, IF_8086|IF_SM},
- /* 995 */ {I_SBB, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+14204, IF_386|IF_SM},
- /* 996 */ {I_SCASB, 0, {0,0,0,0,0}, nasm_bytecodes+19552, IF_8086},
- /* 997 */ {I_SCASD, 0, {0,0,0,0,0}, nasm_bytecodes+18287, IF_386},
- /* 998 */ {I_SCASQ, 0, {0,0,0,0,0}, nasm_bytecodes+18292, IF_X64},
- /* 999 */ {I_SCASW, 0, {0,0,0,0,0}, nasm_bytecodes+18297, IF_8086},
- /* 1000 */ {I_SFENCE, 0, {0,0,0,0,0}, nasm_bytecodes+18302, IF_X64|IF_AMD},
- /* 1001 */ {I_SGDT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18307, IF_286},
- /* 1002 */ {I_SHL, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+19528, IF_8086},
- /* 1003 */ {I_SHL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+19532, IF_8086},
- /* 1004 */ {I_SHL, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+18167, IF_186|IF_SB},
- /* 1005 */ {I_SHL, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+18172, IF_8086},
- /* 1006 */ {I_SHL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+18177, IF_8086},
- /* 1007 */ {I_SHL, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+14144, IF_186|IF_SB},
- /* 1008 */ {I_SHL, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+18182, IF_386},
- /* 1009 */ {I_SHL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+18187, IF_386},
- /* 1010 */ {I_SHL, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+14150, IF_386|IF_SB},
- /* 1011 */ {I_SHL, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+18192, IF_X64},
- /* 1012 */ {I_SHL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+18197, IF_X64},
- /* 1013 */ {I_SHL, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+14156, IF_X64|IF_SB},
- /* 1014 */ {I_SHLD, 3, {MEMORY,REG_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+7431, IF_386|IF_SM2|IF_SB|IF_AR2},
- /* 1015 */ {I_SHLD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+7431, IF_386|IF_SM2|IF_SB|IF_AR2},
- /* 1016 */ {I_SHLD, 3, {MEMORY,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+7438, IF_386|IF_SM2|IF_SB|IF_AR2},
- /* 1017 */ {I_SHLD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+7438, IF_386|IF_SM2|IF_SB|IF_AR2},
- /* 1018 */ {I_SHLD, 3, {MEMORY,REG_GPR|BITS64,IMMEDIATE,0,0}, nasm_bytecodes+7445, IF_X64|IF_SM2|IF_SB|IF_AR2},
- /* 1019 */ {I_SHLD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE,0,0}, nasm_bytecodes+7445, IF_X64|IF_SM2|IF_SB|IF_AR2},
- /* 1020 */ {I_SHLD, 3, {MEMORY,REG_GPR|BITS16,REG_CL,0,0}, nasm_bytecodes+14216, IF_386|IF_SM},
- /* 1021 */ {I_SHLD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,REG_CL,0,0}, nasm_bytecodes+14216, IF_386},
- /* 1022 */ {I_SHLD, 3, {MEMORY,REG_GPR|BITS32,REG_CL,0,0}, nasm_bytecodes+14222, IF_386|IF_SM},
- /* 1023 */ {I_SHLD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,REG_CL,0,0}, nasm_bytecodes+14222, IF_386},
- /* 1024 */ {I_SHLD, 3, {MEMORY,REG_GPR|BITS64,REG_CL,0,0}, nasm_bytecodes+14228, IF_X64|IF_SM},
- /* 1025 */ {I_SHLD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,REG_CL,0,0}, nasm_bytecodes+14228, IF_X64},
- /* 1026 */ {I_SHR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+19556, IF_8086},
- /* 1027 */ {I_SHR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+19560, IF_8086},
- /* 1028 */ {I_SHR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+18312, IF_186|IF_SB},
- /* 1029 */ {I_SHR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+18317, IF_8086},
- /* 1030 */ {I_SHR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+18322, IF_8086},
- /* 1031 */ {I_SHR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+14234, IF_186|IF_SB},
- /* 1032 */ {I_SHR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+18327, IF_386},
- /* 1033 */ {I_SHR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+18332, IF_386},
- /* 1034 */ {I_SHR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+14240, IF_386|IF_SB},
- /* 1035 */ {I_SHR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+18337, IF_X64},
- /* 1036 */ {I_SHR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+18342, IF_X64},
- /* 1037 */ {I_SHR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+14246, IF_X64|IF_SB},
- /* 1038 */ {I_SHRD, 3, {MEMORY,REG_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+7452, IF_386|IF_SM2|IF_SB|IF_AR2},
- /* 1039 */ {I_SHRD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+7452, IF_386|IF_SM2|IF_SB|IF_AR2},
- /* 1040 */ {I_SHRD, 3, {MEMORY,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+7459, IF_386|IF_SM2|IF_SB|IF_AR2},
- /* 1041 */ {I_SHRD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+7459, IF_386|IF_SM2|IF_SB|IF_AR2},
- /* 1042 */ {I_SHRD, 3, {MEMORY,REG_GPR|BITS64,IMMEDIATE,0,0}, nasm_bytecodes+7466, IF_X64|IF_SM2|IF_SB|IF_AR2},
- /* 1043 */ {I_SHRD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE,0,0}, nasm_bytecodes+7466, IF_X64|IF_SM2|IF_SB|IF_AR2},
- /* 1044 */ {I_SHRD, 3, {MEMORY,REG_GPR|BITS16,REG_CL,0,0}, nasm_bytecodes+14252, IF_386|IF_SM},
- /* 1045 */ {I_SHRD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,REG_CL,0,0}, nasm_bytecodes+14252, IF_386},
- /* 1046 */ {I_SHRD, 3, {MEMORY,REG_GPR|BITS32,REG_CL,0,0}, nasm_bytecodes+14258, IF_386|IF_SM},
- /* 1047 */ {I_SHRD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,REG_CL,0,0}, nasm_bytecodes+14258, IF_386},
- /* 1048 */ {I_SHRD, 3, {MEMORY,REG_GPR|BITS64,REG_CL,0,0}, nasm_bytecodes+14264, IF_X64|IF_SM},
- /* 1049 */ {I_SHRD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,REG_CL,0,0}, nasm_bytecodes+14264, IF_X64},
- /* 1050 */ {I_SIDT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18347, IF_286},
- /* 1051 */ {I_SLDT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14289, IF_286},
- /* 1052 */ {I_SLDT, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+14289, IF_286},
- /* 1053 */ {I_SLDT, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+14270, IF_286},
- /* 1054 */ {I_SLDT, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+14276, IF_386},
- /* 1055 */ {I_SLDT, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+14288, IF_X64},
- /* 1056 */ {I_SKINIT, 0, {0,0,0,0,0}, nasm_bytecodes+18352, IF_X64},
- /* 1057 */ {I_SMI, 0, {0,0,0,0,0}, nasm_bytecodes+19704, IF_386|IF_UNDOC},
- /* 1058 */ {I_SMSW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14301, IF_286},
- /* 1059 */ {I_SMSW, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+14301, IF_286},
- /* 1060 */ {I_SMSW, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+14294, IF_286},
- /* 1061 */ {I_SMSW, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+14300, IF_386},
- /* 1062 */ {I_STC, 0, {0,0,0,0,0}, nasm_bytecodes+18084, IF_8086},
- /* 1063 */ {I_STD, 0, {0,0,0,0,0}, nasm_bytecodes+19737, IF_8086},
- /* 1064 */ {I_STGI, 0, {0,0,0,0,0}, nasm_bytecodes+18357, IF_X64},
- /* 1065 */ {I_STI, 0, {0,0,0,0,0}, nasm_bytecodes+19740, IF_8086},
- /* 1066 */ {I_STOSB, 0, {0,0,0,0,0}, nasm_bytecodes+5317, IF_8086},
- /* 1067 */ {I_STOSD, 0, {0,0,0,0,0}, nasm_bytecodes+19572, IF_386},
- /* 1068 */ {I_STOSQ, 0, {0,0,0,0,0}, nasm_bytecodes+19576, IF_X64},
- /* 1069 */ {I_STOSW, 0, {0,0,0,0,0}, nasm_bytecodes+19580, IF_8086},
- /* 1070 */ {I_STR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14319, IF_286|IF_PROT},
- /* 1071 */ {I_STR, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+14319, IF_286|IF_PROT},
- /* 1072 */ {I_STR, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+14306, IF_286|IF_PROT},
- /* 1073 */ {I_STR, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+14312, IF_386|IF_PROT},
- /* 1074 */ {I_STR, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+14318, IF_X64},
- /* 1075 */ {I_SUB, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19584, IF_8086|IF_SM},
- /* 1076 */ {I_SUB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19584, IF_8086},
- /* 1077 */ {I_SUB, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18362, IF_8086|IF_SM},
- /* 1078 */ {I_SUB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18362, IF_8086},
- /* 1079 */ {I_SUB, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18367, IF_386|IF_SM},
- /* 1080 */ {I_SUB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18367, IF_386},
- /* 1081 */ {I_SUB, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18372, IF_X64|IF_SM},
- /* 1082 */ {I_SUB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18372, IF_X64},
- /* 1083 */ {I_SUB, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+9786, IF_8086|IF_SM},
- /* 1084 */ {I_SUB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+9786, IF_8086},
- /* 1085 */ {I_SUB, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+18377, IF_8086|IF_SM},
- /* 1086 */ {I_SUB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18377, IF_8086},
- /* 1087 */ {I_SUB, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+18382, IF_386|IF_SM},
- /* 1088 */ {I_SUB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18382, IF_386},
- /* 1089 */ {I_SUB, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+18387, IF_X64|IF_SM},
- /* 1090 */ {I_SUB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18387, IF_X64},
- /* 1091 */ {I_SUB, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+14324, IF_8086},
- /* 1092 */ {I_SUB, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+14330, IF_386},
- /* 1093 */ {I_SUB, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+14336, IF_X64},
- /* 1094 */ {I_SUB, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+19588, IF_8086|IF_SM},
- /* 1095 */ {I_SUB, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+14324, IF_8086|IF_SM},
- /* 1096 */ {I_SUB, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+18392, IF_8086|IF_SM},
- /* 1097 */ {I_SUB, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+14330, IF_386|IF_SM},
- /* 1098 */ {I_SUB, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+18397, IF_386|IF_SM},
- /* 1099 */ {I_SUB, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+14336, IF_X64|IF_SM},
- /* 1100 */ {I_SUB, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+18402, IF_X64|IF_SM},
- /* 1101 */ {I_SUB, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+18407, IF_8086|IF_SM},
- /* 1102 */ {I_SUB, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+14342, IF_8086|IF_SM},
- /* 1103 */ {I_SUB, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+14348, IF_386|IF_SM},
- /* 1104 */ {I_SUB, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+14354, IF_X64|IF_SM},
- /* 1105 */ {I_SUB, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+18407, IF_8086|IF_SM},
- /* 1106 */ {I_SUB, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+14342, IF_8086|IF_SM},
- /* 1107 */ {I_SUB, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+14348, IF_386|IF_SM},
- /* 1108 */ {I_SVDC, 2, {MEMORY|BITS80,REG_SREG,0,0,0}, nasm_bytecodes+7874, IF_486|IF_CYRIX|IF_SMM},
- /* 1109 */ {I_SVTS, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+18417, IF_486|IF_CYRIX|IF_SMM},
- /* 1110 */ {I_SWAPGS, 0, {0,0,0,0,0}, nasm_bytecodes+18422, IF_X64},
- /* 1111 */ {I_SYSCALL, 0, {0,0,0,0,0}, nasm_bytecodes+19292, IF_P6|IF_AMD},
- /* 1112 */ {I_SYSENTER, 0, {0,0,0,0,0}, nasm_bytecodes+19592, IF_P6},
- /* 1113 */ {I_SYSEXIT, 0, {0,0,0,0,0}, nasm_bytecodes+19596, IF_P6|IF_PRIV},
- /* 1114 */ {I_SYSRET, 0, {0,0,0,0,0}, nasm_bytecodes+19288, IF_P6|IF_PRIV|IF_AMD},
- /* 1115 */ {I_TEST, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19600, IF_8086|IF_SM},
- /* 1116 */ {I_TEST, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19600, IF_8086},
- /* 1117 */ {I_TEST, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18427, IF_8086|IF_SM},
- /* 1118 */ {I_TEST, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18427, IF_8086},
- /* 1119 */ {I_TEST, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18432, IF_386|IF_SM},
- /* 1120 */ {I_TEST, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18432, IF_386},
- /* 1121 */ {I_TEST, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18437, IF_X64|IF_SM},
- /* 1122 */ {I_TEST, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18437, IF_X64},
- /* 1123 */ {I_TEST, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+19604, IF_8086|IF_SM},
- /* 1124 */ {I_TEST, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+18442, IF_8086|IF_SM},
- /* 1125 */ {I_TEST, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+18447, IF_386|IF_SM},
- /* 1126 */ {I_TEST, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+18452, IF_X64|IF_SM},
- /* 1127 */ {I_TEST, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+19608, IF_8086|IF_SM},
- /* 1128 */ {I_TEST, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+18457, IF_8086|IF_SM},
- /* 1129 */ {I_TEST, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+18462, IF_386|IF_SM},
- /* 1130 */ {I_TEST, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+18467, IF_X64|IF_SM},
- /* 1131 */ {I_TEST, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+18472, IF_8086|IF_SM},
- /* 1132 */ {I_TEST, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+14360, IF_8086|IF_SM},
- /* 1133 */ {I_TEST, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+14366, IF_386|IF_SM},
- /* 1134 */ {I_TEST, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+14372, IF_X64|IF_SM},
- /* 1135 */ {I_TEST, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+18472, IF_8086|IF_SM},
- /* 1136 */ {I_TEST, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+14360, IF_8086|IF_SM},
- /* 1137 */ {I_TEST, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+14366, IF_386|IF_SM},
- /* 1138 */ {I_UD0, 0, {0,0,0,0,0}, nasm_bytecodes+19612, IF_186|IF_UNDOC},
- /* 1139 */ {I_UD1, 0, {0,0,0,0,0}, nasm_bytecodes+19616, IF_186|IF_UNDOC},
- /* 1140 */ {I_UD2, 0, {0,0,0,0,0}, nasm_bytecodes+19620, IF_186},
- /* 1141 */ {I_VERR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18477, IF_286|IF_PROT},
- /* 1142 */ {I_VERR, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+18477, IF_286|IF_PROT},
- /* 1143 */ {I_VERR, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18477, IF_286|IF_PROT},
- /* 1144 */ {I_VERW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18482, IF_286|IF_PROT},
- /* 1145 */ {I_VERW, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+18482, IF_286|IF_PROT},
- /* 1146 */ {I_VERW, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18482, IF_286|IF_PROT},
- /* 1147 */ {I_FWAIT, 0, {0,0,0,0,0}, nasm_bytecodes+19186, IF_8086},
- /* 1148 */ {I_WBINVD, 0, {0,0,0,0,0}, nasm_bytecodes+19624, IF_486|IF_PRIV},
- /* 1149 */ {I_WRSHR, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+14390, IF_P6|IF_CYRIX|IF_SMM},
- /* 1150 */ {I_WRMSR, 0, {0,0,0,0,0}, nasm_bytecodes+19628, IF_PENT|IF_PRIV},
- /* 1151 */ {I_XADD, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+18487, IF_486|IF_SM},
- /* 1152 */ {I_XADD, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+18487, IF_486},
- /* 1153 */ {I_XADD, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+14396, IF_486|IF_SM},
- /* 1154 */ {I_XADD, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+14396, IF_486},
- /* 1155 */ {I_XADD, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+14402, IF_486|IF_SM},
- /* 1156 */ {I_XADD, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+14402, IF_486},
- /* 1157 */ {I_XADD, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+14408, IF_X64|IF_SM},
- /* 1158 */ {I_XADD, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+14408, IF_X64},
- /* 1159 */ {I_XCHG, 2, {REG_AX,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+19632, IF_8086},
- /* 1160 */ {I_XCHG, 2, {REG_EAX,REG32NA,0,0,0}, nasm_bytecodes+19636, IF_386},
- /* 1161 */ {I_XCHG, 2, {REG_RAX,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+19640, IF_X64},
- /* 1162 */ {I_XCHG, 2, {REG_GPR|BITS16,REG_AX,0,0,0}, nasm_bytecodes+19644, IF_8086},
- /* 1163 */ {I_XCHG, 2, {REG32NA,REG_EAX,0,0,0}, nasm_bytecodes+19648, IF_386},
- /* 1164 */ {I_XCHG, 2, {REG_GPR|BITS64,REG_RAX,0,0,0}, nasm_bytecodes+19652, IF_X64},
- /* 1165 */ {I_XCHG, 2, {REG_EAX,REG_EAX,0,0,0}, nasm_bytecodes+19656, IF_386|IF_NOLONG},
- /* 1166 */ {I_XCHG, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+19660, IF_8086|IF_SM},
- /* 1167 */ {I_XCHG, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19660, IF_8086},
- /* 1168 */ {I_XCHG, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+18492, IF_8086|IF_SM},
- /* 1169 */ {I_XCHG, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18492, IF_8086},
- /* 1170 */ {I_XCHG, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+18497, IF_386|IF_SM},
- /* 1171 */ {I_XCHG, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18497, IF_386},
- /* 1172 */ {I_XCHG, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+18502, IF_X64|IF_SM},
- /* 1173 */ {I_XCHG, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18502, IF_X64},
- /* 1174 */ {I_XCHG, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19664, IF_8086|IF_SM},
- /* 1175 */ {I_XCHG, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19664, IF_8086},
- /* 1176 */ {I_XCHG, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18507, IF_8086|IF_SM},
- /* 1177 */ {I_XCHG, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18507, IF_8086},
- /* 1178 */ {I_XCHG, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18512, IF_386|IF_SM},
- /* 1179 */ {I_XCHG, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18512, IF_386},
- /* 1180 */ {I_XCHG, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18517, IF_X64|IF_SM},
- /* 1181 */ {I_XCHG, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18517, IF_X64},
- /* 1182 */ {I_XLATB, 0, {0,0,0,0,0}, nasm_bytecodes+19743, IF_8086},
- /* 1183 */ {I_XLAT, 0, {0,0,0,0,0}, nasm_bytecodes+19743, IF_8086},
- /* 1184 */ {I_XOR, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19668, IF_8086|IF_SM},
- /* 1185 */ {I_XOR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19668, IF_8086},
- /* 1186 */ {I_XOR, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18522, IF_8086|IF_SM},
- /* 1187 */ {I_XOR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18522, IF_8086},
- /* 1188 */ {I_XOR, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18527, IF_386|IF_SM},
- /* 1189 */ {I_XOR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18527, IF_386},
- /* 1190 */ {I_XOR, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18532, IF_X64|IF_SM},
- /* 1191 */ {I_XOR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18532, IF_X64},
- /* 1192 */ {I_XOR, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+10864, IF_8086|IF_SM},
- /* 1193 */ {I_XOR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+10864, IF_8086},
- /* 1194 */ {I_XOR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+18537, IF_8086|IF_SM},
- /* 1195 */ {I_XOR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+18537, IF_8086},
- /* 1196 */ {I_XOR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+18542, IF_386|IF_SM},
- /* 1197 */ {I_XOR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+18542, IF_386},
- /* 1198 */ {I_XOR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+18547, IF_X64|IF_SM},
- /* 1199 */ {I_XOR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+18547, IF_X64},
- /* 1200 */ {I_XOR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+14426, IF_8086},
- /* 1201 */ {I_XOR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+14432, IF_386},
- /* 1202 */ {I_XOR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+14438, IF_X64},
- /* 1203 */ {I_XOR, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+19672, IF_8086|IF_SM},
- /* 1204 */ {I_XOR, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+14426, IF_8086|IF_SM},
- /* 1205 */ {I_XOR, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+18552, IF_8086|IF_SM},
- /* 1206 */ {I_XOR, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+14432, IF_386|IF_SM},
- /* 1207 */ {I_XOR, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+18557, IF_386|IF_SM},
- /* 1208 */ {I_XOR, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+14438, IF_X64|IF_SM},
- /* 1209 */ {I_XOR, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+18562, IF_X64|IF_SM},
- /* 1210 */ {I_XOR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+18567, IF_8086|IF_SM},
- /* 1211 */ {I_XOR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+14444, IF_8086|IF_SM},
- /* 1212 */ {I_XOR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+14450, IF_386|IF_SM},
- /* 1213 */ {I_XOR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+14456, IF_X64|IF_SM},
- /* 1214 */ {I_XOR, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+18567, IF_8086|IF_SM},
- /* 1215 */ {I_XOR, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+14444, IF_8086|IF_SM},
- /* 1216 */ {I_XOR, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+14450, IF_386|IF_SM},
- /* 1217 */ {I_CMOVcc, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+7501, IF_P6|IF_SM},
- /* 1218 */ {I_CMOVcc, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+7501, IF_P6},
- /* 1219 */ {I_CMOVcc, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+7508, IF_P6|IF_SM},
- /* 1220 */ {I_CMOVcc, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7508, IF_P6},
- /* 1221 */ {I_CMOVcc, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+7515, IF_X64|IF_SM},
- /* 1222 */ {I_CMOVcc, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7515, IF_X64},
- /* 1223 */ {I_Jcc, 1, {IMMEDIATE|NEAR,0,0,0,0}, nasm_bytecodes+7522, IF_386},
- /* 1224 */ {I_Jcc, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, nasm_bytecodes+7529, IF_386},
- /* 1225 */ {I_Jcc, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, nasm_bytecodes+7536, IF_386},
- /* 1226 */ {I_Jcc, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+18573, IF_8086},
- /* 1227 */ {I_SETcc, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14462, IF_386|IF_SB},
- /* 1228 */ {I_SETcc, 1, {REG_GPR|BITS8,0,0,0,0}, nasm_bytecodes+14462, IF_386},
- /* 1229 */ {I_ADDPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14468, IF_KATMAI|IF_SSE},
- /* 1230 */ {I_ADDSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14474, IF_KATMAI|IF_SSE|IF_SD},
- /* 1231 */ {I_ANDNPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14480, IF_KATMAI|IF_SSE},
- /* 1232 */ {I_ANDPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14486, IF_KATMAI|IF_SSE},
- /* 1233 */ {I_CMPEQPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5336, IF_KATMAI|IF_SSE},
- /* 1234 */ {I_CMPEQSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5344, IF_KATMAI|IF_SSE},
- /* 1235 */ {I_CMPLEPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5352, IF_KATMAI|IF_SSE},
- /* 1236 */ {I_CMPLESS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5360, IF_KATMAI|IF_SSE},
- /* 1237 */ {I_CMPLTPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5368, IF_KATMAI|IF_SSE},
- /* 1238 */ {I_CMPLTSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5376, IF_KATMAI|IF_SSE},
- /* 1239 */ {I_CMPNEQPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5384, IF_KATMAI|IF_SSE},
- /* 1240 */ {I_CMPNEQSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5392, IF_KATMAI|IF_SSE},
- /* 1241 */ {I_CMPNLEPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5400, IF_KATMAI|IF_SSE},
- /* 1242 */ {I_CMPNLESS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5408, IF_KATMAI|IF_SSE},
- /* 1243 */ {I_CMPNLTPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5416, IF_KATMAI|IF_SSE},
- /* 1244 */ {I_CMPNLTSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5424, IF_KATMAI|IF_SSE},
- /* 1245 */ {I_CMPORDPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5432, IF_KATMAI|IF_SSE},
- /* 1246 */ {I_CMPORDSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5440, IF_KATMAI|IF_SSE},
- /* 1247 */ {I_CMPUNORDPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5448, IF_KATMAI|IF_SSE},
- /* 1248 */ {I_CMPUNORDSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5456, IF_KATMAI|IF_SSE},
- /* 1249 */ {I_CMPPS, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+7550, IF_KATMAI|IF_SSE|IF_SB|IF_AR2},
- /* 1250 */ {I_CMPPS, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+7550, IF_KATMAI|IF_SSE|IF_SB|IF_AR2},
- /* 1251 */ {I_CMPSS, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+7557, IF_KATMAI|IF_SSE|IF_SB|IF_AR2},
- /* 1252 */ {I_CMPSS, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+7557, IF_KATMAI|IF_SSE|IF_SB|IF_AR2},
- /* 1253 */ {I_COMISS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14492, IF_KATMAI|IF_SSE},
- /* 1254 */ {I_CVTPI2PS, 2, {XMMREG,RM_MMX,0,0,0}, nasm_bytecodes+14498, IF_KATMAI|IF_SSE|IF_MMX|IF_SQ},
- /* 1255 */ {I_CVTPS2PI, 2, {MMXREG,RM_XMM,0,0,0}, nasm_bytecodes+14504, IF_KATMAI|IF_SSE|IF_MMX|IF_SQ},
- /* 1256 */ {I_CVTSI2SS, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+7565, IF_KATMAI|IF_SSE|IF_SD|IF_AR1},
- /* 1257 */ {I_CVTSI2SS, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+7564, IF_X64|IF_SSE|IF_SQ|IF_AR1},
- /* 1258 */ {I_CVTSS2SI, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+7572, IF_KATMAI|IF_SSE|IF_SD|IF_AR1},
- /* 1259 */ {I_CVTSS2SI, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+7572, IF_KATMAI|IF_SSE|IF_SD|IF_AR1},
- /* 1260 */ {I_CVTSS2SI, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+7571, IF_X64|IF_SSE|IF_SD|IF_AR1},
- /* 1261 */ {I_CVTSS2SI, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+7571, IF_X64|IF_SSE|IF_SD|IF_AR1},
- /* 1262 */ {I_CVTTPS2PI, 2, {MMXREG,RM_XMM,0,0,0}, nasm_bytecodes+14510, IF_KATMAI|IF_SSE|IF_MMX|IF_SQ},
- /* 1263 */ {I_CVTTSS2SI, 2, {REG_GPR|BITS32,RM_XMM,0,0,0}, nasm_bytecodes+7579, IF_KATMAI|IF_SSE|IF_SD|IF_AR1},
- /* 1264 */ {I_CVTTSS2SI, 2, {REG_GPR|BITS64,RM_XMM,0,0,0}, nasm_bytecodes+7578, IF_X64|IF_SSE|IF_SD|IF_AR1},
- /* 1265 */ {I_DIVPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14516, IF_KATMAI|IF_SSE},
- /* 1266 */ {I_DIVSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14522, IF_KATMAI|IF_SSE},
- /* 1267 */ {I_LDMXCSR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+12536, IF_KATMAI|IF_SSE|IF_SD},
- /* 1268 */ {I_MAXPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14528, IF_KATMAI|IF_SSE},
- /* 1269 */ {I_MAXSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14534, IF_KATMAI|IF_SSE},
- /* 1270 */ {I_MINPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14540, IF_KATMAI|IF_SSE},
- /* 1271 */ {I_MINSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14546, IF_KATMAI|IF_SSE},
- /* 1272 */ {I_MOVAPS, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+14552, IF_KATMAI|IF_SSE},
- /* 1273 */ {I_MOVAPS, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+14558, IF_KATMAI|IF_SSE},
- /* 1274 */ {I_MOVAPS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14552, IF_KATMAI|IF_SSE},
- /* 1275 */ {I_MOVAPS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14558, IF_KATMAI|IF_SSE},
- /* 1276 */ {I_MOVHPS, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+14564, IF_KATMAI|IF_SSE},
- /* 1277 */ {I_MOVHPS, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+14570, IF_KATMAI|IF_SSE},
- /* 1278 */ {I_MOVLHPS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14564, IF_KATMAI|IF_SSE},
- /* 1279 */ {I_MOVLPS, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+14384, IF_KATMAI|IF_SSE},
- /* 1280 */ {I_MOVLPS, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+14576, IF_KATMAI|IF_SSE},
- /* 1281 */ {I_MOVHLPS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14384, IF_KATMAI|IF_SSE},
- /* 1282 */ {I_MOVMSKPS, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+14582, IF_KATMAI|IF_SSE},
- /* 1283 */ {I_MOVMSKPS, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+7585, IF_X64|IF_SSE},
- /* 1284 */ {I_MOVNTPS, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+14588, IF_KATMAI|IF_SSE},
- /* 1285 */ {I_MOVSS, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+14594, IF_KATMAI|IF_SSE},
- /* 1286 */ {I_MOVSS, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+14600, IF_KATMAI|IF_SSE},
- /* 1287 */ {I_MOVSS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14594, IF_KATMAI|IF_SSE},
- /* 1288 */ {I_MOVSS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14600, IF_KATMAI|IF_SSE},
- /* 1289 */ {I_MOVUPS, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+14606, IF_KATMAI|IF_SSE},
- /* 1290 */ {I_MOVUPS, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+14612, IF_KATMAI|IF_SSE},
- /* 1291 */ {I_MOVUPS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14606, IF_KATMAI|IF_SSE},
- /* 1292 */ {I_MOVUPS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14612, IF_KATMAI|IF_SSE},
- /* 1293 */ {I_MULPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14618, IF_KATMAI|IF_SSE},
- /* 1294 */ {I_MULSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14624, IF_KATMAI|IF_SSE},
- /* 1295 */ {I_ORPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14630, IF_KATMAI|IF_SSE},
- /* 1296 */ {I_RCPPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14636, IF_KATMAI|IF_SSE},
- /* 1297 */ {I_RCPSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14642, IF_KATMAI|IF_SSE},
- /* 1298 */ {I_RSQRTPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14648, IF_KATMAI|IF_SSE},
- /* 1299 */ {I_RSQRTSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14654, IF_KATMAI|IF_SSE},
- /* 1300 */ {I_SHUFPS, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+7592, IF_KATMAI|IF_SSE|IF_SB|IF_AR2},
- /* 1301 */ {I_SHUFPS, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+7592, IF_KATMAI|IF_SSE|IF_SB|IF_AR2},
- /* 1302 */ {I_SQRTPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14660, IF_KATMAI|IF_SSE},
- /* 1303 */ {I_SQRTSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14666, IF_KATMAI|IF_SSE},
- /* 1304 */ {I_STMXCSR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+12543, IF_KATMAI|IF_SSE|IF_SD},
- /* 1305 */ {I_SUBPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14672, IF_KATMAI|IF_SSE},
- /* 1306 */ {I_SUBSS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14678, IF_KATMAI|IF_SSE},
- /* 1307 */ {I_UCOMISS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14684, IF_KATMAI|IF_SSE},
- /* 1308 */ {I_UNPCKHPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14690, IF_KATMAI|IF_SSE},
- /* 1309 */ {I_UNPCKLPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14696, IF_KATMAI|IF_SSE},
- /* 1310 */ {I_XORPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14702, IF_KATMAI|IF_SSE},
- /* 1311 */ {I_FXRSTOR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14709, IF_P6|IF_SSE|IF_FPU},
- /* 1312 */ {I_FXRSTOR64, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14708, IF_X64|IF_SSE|IF_FPU},
- /* 1313 */ {I_FXSAVE, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14715, IF_P6|IF_SSE|IF_FPU},
- /* 1314 */ {I_FXSAVE64, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14714, IF_X64|IF_SSE|IF_FPU},
- /* 1315 */ {I_XGETBV, 0, {0,0,0,0,0}, nasm_bytecodes+14720, IF_NEHALEM},
- /* 1316 */ {I_XSETBV, 0, {0,0,0,0,0}, nasm_bytecodes+14726, IF_NEHALEM|IF_PRIV},
- /* 1317 */ {I_XSAVE, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14733, IF_NEHALEM},
- /* 1318 */ {I_XSAVE64, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14732, IF_LONG|IF_NEHALEM},
- /* 1319 */ {I_XSAVEOPT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14739, IF_FUTURE},
- /* 1320 */ {I_XSAVEOPT64, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14738, IF_LONG|IF_FUTURE},
- /* 1321 */ {I_XRSTOR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14745, IF_NEHALEM},
- /* 1322 */ {I_XRSTOR64, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+14744, IF_LONG|IF_NEHALEM},
- /* 1323 */ {I_PREFETCHNTA, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+15651, IF_KATMAI},
- /* 1324 */ {I_PREFETCHT0, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+15669, IF_KATMAI},
- /* 1325 */ {I_PREFETCHT1, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+15687, IF_KATMAI},
- /* 1326 */ {I_PREFETCHT2, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+15705, IF_KATMAI},
- /* 1327 */ {I_SFENCE, 0, {0,0,0,0,0}, nasm_bytecodes+18302, IF_KATMAI},
- /* 1328 */ {I_MASKMOVQ, 2, {MMXREG,MMXREG,0,0,0}, nasm_bytecodes+14750, IF_KATMAI|IF_MMX},
- /* 1329 */ {I_MOVNTQ, 2, {MEMORY,MMXREG,0,0,0}, nasm_bytecodes+14756, IF_KATMAI|IF_MMX|IF_SQ},
- /* 1330 */ {I_PAVGB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7599, IF_KATMAI|IF_MMX|IF_SQ},
- /* 1331 */ {I_PAVGW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7606, IF_KATMAI|IF_MMX|IF_SQ},
- /* 1332 */ {I_PEXTRW, 3, {REG_GPR|BITS32,MMXREG,IMMEDIATE,0,0}, nasm_bytecodes+7613, IF_KATMAI|IF_MMX|IF_SB|IF_AR2},
- /* 1333 */ {I_PINSRW, 3, {MMXREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+7620, IF_KATMAI|IF_MMX|IF_SB|IF_AR2},
- /* 1334 */ {I_PINSRW, 3, {MMXREG,RM_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+7620, IF_KATMAI|IF_MMX|IF_SB|IF_AR2},
- /* 1335 */ {I_PINSRW, 3, {MMXREG,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+7620, IF_KATMAI|IF_MMX|IF_SB|IF_AR2},
- /* 1336 */ {I_PMAXSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7627, IF_KATMAI|IF_MMX|IF_SQ},
- /* 1337 */ {I_PMAXUB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7634, IF_KATMAI|IF_MMX|IF_SQ},
- /* 1338 */ {I_PMINSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7641, IF_KATMAI|IF_MMX|IF_SQ},
- /* 1339 */ {I_PMINUB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7648, IF_KATMAI|IF_MMX|IF_SQ},
- /* 1340 */ {I_PMOVMSKB, 2, {REG_GPR|BITS32,MMXREG,0,0,0}, nasm_bytecodes+14762, IF_KATMAI|IF_MMX},
- /* 1341 */ {I_PMULHUW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7655, IF_KATMAI|IF_MMX|IF_SQ},
- /* 1342 */ {I_PSADBW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7662, IF_KATMAI|IF_MMX|IF_SQ},
- /* 1343 */ {I_PSHUFW, 3, {MMXREG,RM_MMX,IMMEDIATE,0,0}, nasm_bytecodes+5464, IF_KATMAI|IF_MMX|IF_SM2|IF_SB|IF_AR2},
- /* 1344 */ {I_PF2IW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5472, IF_PENT|IF_3DNOW|IF_SQ},
- /* 1345 */ {I_PFNACC, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5480, IF_PENT|IF_3DNOW|IF_SQ},
- /* 1346 */ {I_PFPNACC, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5488, IF_PENT|IF_3DNOW|IF_SQ},
- /* 1347 */ {I_PI2FW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5496, IF_PENT|IF_3DNOW|IF_SQ},
- /* 1348 */ {I_PSWAPD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5504, IF_PENT|IF_3DNOW|IF_SQ},
- /* 1349 */ {I_MASKMOVDQU, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14768, IF_WILLAMETTE|IF_SSE2},
- /* 1350 */ {I_CLFLUSH, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18577, IF_WILLAMETTE|IF_SSE2},
- /* 1351 */ {I_MOVNTDQ, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+14774, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1352 */ {I_MOVNTI, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7670, IF_WILLAMETTE|IF_SD},
- /* 1353 */ {I_MOVNTI, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7669, IF_X64|IF_SQ},
- /* 1354 */ {I_MOVNTPD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+14780, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1355 */ {I_LFENCE, 0, {0,0,0,0,0}, nasm_bytecodes+17637, IF_WILLAMETTE|IF_SSE2},
- /* 1356 */ {I_MFENCE, 0, {0,0,0,0,0}, nasm_bytecodes+17727, IF_WILLAMETTE|IF_SSE2},
- /* 1357 */ {I_MOVD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+7676, IF_WILLAMETTE|IF_SSE2|IF_SD},
- /* 1358 */ {I_MOVD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+7683, IF_WILLAMETTE|IF_SSE2|IF_SD},
- /* 1359 */ {I_MOVD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+7683, IF_WILLAMETTE|IF_SSE2},
- /* 1360 */ {I_MOVD, 2, {RM_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+7676, IF_WILLAMETTE|IF_SSE2},
- /* 1361 */ {I_MOVDQA, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14786, IF_WILLAMETTE|IF_SSE2},
- /* 1362 */ {I_MOVDQA, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+14792, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1363 */ {I_MOVDQA, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+14786, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1364 */ {I_MOVDQA, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14792, IF_WILLAMETTE|IF_SSE2},
- /* 1365 */ {I_MOVDQU, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14798, IF_WILLAMETTE|IF_SSE2},
- /* 1366 */ {I_MOVDQU, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+14804, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1367 */ {I_MOVDQU, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+14798, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1368 */ {I_MOVDQU, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14804, IF_WILLAMETTE|IF_SSE2},
- /* 1369 */ {I_MOVDQ2Q, 2, {MMXREG,XMMREG,0,0,0}, nasm_bytecodes+14810, IF_WILLAMETTE|IF_SSE2},
- /* 1370 */ {I_MOVQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14816, IF_WILLAMETTE|IF_SSE2},
- /* 1371 */ {I_MOVQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+14822, IF_WILLAMETTE|IF_SSE2},
- /* 1372 */ {I_MOVQ, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+14822, IF_WILLAMETTE|IF_SSE2|IF_SQ},
- /* 1373 */ {I_MOVQ, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+14816, IF_WILLAMETTE|IF_SSE2|IF_SQ},
- /* 1374 */ {I_MOVQ, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+7690, IF_X64|IF_SSE2},
- /* 1375 */ {I_MOVQ, 2, {RM_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+7697, IF_X64|IF_SSE2},
- /* 1376 */ {I_MOVQ2DQ, 2, {XMMREG,MMXREG,0,0,0}, nasm_bytecodes+14828, IF_WILLAMETTE|IF_SSE2},
- /* 1377 */ {I_PACKSSWB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14834, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1378 */ {I_PACKSSDW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14840, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1379 */ {I_PACKUSWB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14846, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1380 */ {I_PADDB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14852, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1381 */ {I_PADDW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14858, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1382 */ {I_PADDD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14864, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1383 */ {I_PADDQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+14870, IF_WILLAMETTE|IF_MMX|IF_SQ},
- /* 1384 */ {I_PADDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14876, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1385 */ {I_PADDSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14882, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1386 */ {I_PADDSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14888, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1387 */ {I_PADDUSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14894, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1388 */ {I_PADDUSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14900, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1389 */ {I_PAND, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14906, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1390 */ {I_PANDN, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14912, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1391 */ {I_PAVGB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14918, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1392 */ {I_PAVGW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14924, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1393 */ {I_PCMPEQB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14930, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1394 */ {I_PCMPEQW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14936, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1395 */ {I_PCMPEQD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14942, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1396 */ {I_PCMPGTB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14948, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1397 */ {I_PCMPGTW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14954, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1398 */ {I_PCMPGTD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14960, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1399 */ {I_PEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+7704, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
- /* 1400 */ {I_PINSRW, 3, {XMMREG,REG_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+7711, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
- /* 1401 */ {I_PINSRW, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+7711, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
- /* 1402 */ {I_PINSRW, 3, {XMMREG,MEMORY|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+7711, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
- /* 1403 */ {I_PMADDWD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14966, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1404 */ {I_PMAXSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14972, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1405 */ {I_PMAXUB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14978, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1406 */ {I_PMINSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14984, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1407 */ {I_PMINUB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+14990, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1408 */ {I_PMOVMSKB, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+14996, IF_WILLAMETTE|IF_SSE2},
- /* 1409 */ {I_PMULHUW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15002, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1410 */ {I_PMULHW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15008, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1411 */ {I_PMULLW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15014, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1412 */ {I_PMULUDQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7718, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1413 */ {I_PMULUDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15020, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1414 */ {I_POR, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15026, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1415 */ {I_PSADBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15032, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1416 */ {I_PSHUFD, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+7725, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
- /* 1417 */ {I_PSHUFD, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+7725, IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},
- /* 1418 */ {I_PSHUFHW, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+7732, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
- /* 1419 */ {I_PSHUFHW, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+7732, IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},
- /* 1420 */ {I_PSHUFLW, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+7739, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
- /* 1421 */ {I_PSHUFLW, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+7739, IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},
- /* 1422 */ {I_PSLLDQ, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7746, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
- /* 1423 */ {I_PSLLW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15038, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1424 */ {I_PSLLW, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7753, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
- /* 1425 */ {I_PSLLD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15044, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1426 */ {I_PSLLD, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7760, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
- /* 1427 */ {I_PSLLQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15050, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1428 */ {I_PSLLQ, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7767, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
- /* 1429 */ {I_PSRAW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15056, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1430 */ {I_PSRAW, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7774, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
- /* 1431 */ {I_PSRAD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15062, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1432 */ {I_PSRAD, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7781, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
- /* 1433 */ {I_PSRLDQ, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7788, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
- /* 1434 */ {I_PSRLW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15068, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1435 */ {I_PSRLW, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7795, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
- /* 1436 */ {I_PSRLD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15074, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1437 */ {I_PSRLD, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7802, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
- /* 1438 */ {I_PSRLQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15080, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1439 */ {I_PSRLQ, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7809, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
- /* 1440 */ {I_PSUBB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15086, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1441 */ {I_PSUBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15092, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1442 */ {I_PSUBD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15098, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1443 */ {I_PSUBQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7816, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1444 */ {I_PSUBQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15104, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1445 */ {I_PSUBSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15110, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1446 */ {I_PSUBSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15116, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1447 */ {I_PSUBUSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15122, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1448 */ {I_PSUBUSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15128, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1449 */ {I_PUNPCKHBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15134, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1450 */ {I_PUNPCKHWD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15140, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1451 */ {I_PUNPCKHDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15146, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1452 */ {I_PUNPCKHQDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15152, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1453 */ {I_PUNPCKLBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15158, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1454 */ {I_PUNPCKLWD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15164, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1455 */ {I_PUNPCKLDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15170, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1456 */ {I_PUNPCKLQDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15176, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1457 */ {I_PXOR, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15182, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1458 */ {I_ADDPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15188, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1459 */ {I_ADDSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15194, IF_WILLAMETTE|IF_SSE2|IF_SQ},
- /* 1460 */ {I_ANDNPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15200, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1461 */ {I_ANDPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15206, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1462 */ {I_CMPEQPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5512, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1463 */ {I_CMPEQSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5520, IF_WILLAMETTE|IF_SSE2},
- /* 1464 */ {I_CMPLEPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5528, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1465 */ {I_CMPLESD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5536, IF_WILLAMETTE|IF_SSE2},
- /* 1466 */ {I_CMPLTPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5544, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1467 */ {I_CMPLTSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5552, IF_WILLAMETTE|IF_SSE2},
- /* 1468 */ {I_CMPNEQPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5560, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1469 */ {I_CMPNEQSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5568, IF_WILLAMETTE|IF_SSE2},
- /* 1470 */ {I_CMPNLEPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5576, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1471 */ {I_CMPNLESD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5584, IF_WILLAMETTE|IF_SSE2},
- /* 1472 */ {I_CMPNLTPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5592, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1473 */ {I_CMPNLTSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5600, IF_WILLAMETTE|IF_SSE2},
- /* 1474 */ {I_CMPORDPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5608, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1475 */ {I_CMPORDSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5616, IF_WILLAMETTE|IF_SSE2},
- /* 1476 */ {I_CMPUNORDPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5624, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1477 */ {I_CMPUNORDSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+5632, IF_WILLAMETTE|IF_SSE2},
- /* 1478 */ {I_CMPPD, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+7823, IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},
- /* 1479 */ {I_CMPSD, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+7830, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
- /* 1480 */ {I_COMISD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15212, IF_WILLAMETTE|IF_SSE2},
- /* 1481 */ {I_CVTDQ2PD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15218, IF_WILLAMETTE|IF_SSE2|IF_SQ},
- /* 1482 */ {I_CVTDQ2PS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15224, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1483 */ {I_CVTPD2DQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15230, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1484 */ {I_CVTPD2PI, 2, {MMXREG,RM_XMM,0,0,0}, nasm_bytecodes+15236, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1485 */ {I_CVTPD2PS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15242, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1486 */ {I_CVTPI2PD, 2, {XMMREG,RM_MMX,0,0,0}, nasm_bytecodes+15248, IF_WILLAMETTE|IF_SSE2|IF_SQ},
- /* 1487 */ {I_CVTPS2DQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15254, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1488 */ {I_CVTPS2PD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15260, IF_WILLAMETTE|IF_SSE2|IF_SQ},
- /* 1489 */ {I_CVTSD2SI, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+7838, IF_WILLAMETTE|IF_SSE2|IF_SQ|IF_AR1},
- /* 1490 */ {I_CVTSD2SI, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+7838, IF_WILLAMETTE|IF_SSE2|IF_SQ|IF_AR1},
- /* 1491 */ {I_CVTSD2SI, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+7837, IF_X64|IF_SSE2|IF_SQ|IF_AR1},
- /* 1492 */ {I_CVTSD2SI, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+7837, IF_X64|IF_SSE2|IF_SQ|IF_AR1},
- /* 1493 */ {I_CVTSD2SS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15266, IF_WILLAMETTE|IF_SSE2|IF_SQ},
- /* 1494 */ {I_CVTSI2SD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+7845, IF_WILLAMETTE|IF_SSE2|IF_SD|IF_AR1},
- /* 1495 */ {I_CVTSI2SD, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+7844, IF_X64|IF_SSE2|IF_SQ|IF_AR1},
- /* 1496 */ {I_CVTSS2SD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15272, IF_WILLAMETTE|IF_SSE2|IF_SD},
- /* 1497 */ {I_CVTTPD2PI, 2, {MMXREG,RM_XMM,0,0,0}, nasm_bytecodes+15278, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1498 */ {I_CVTTPD2DQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15284, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1499 */ {I_CVTTPS2DQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15290, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1500 */ {I_CVTTSD2SI, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+7852, IF_WILLAMETTE|IF_SSE2|IF_SQ|IF_AR1},
- /* 1501 */ {I_CVTTSD2SI, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+7852, IF_WILLAMETTE|IF_SSE2|IF_SQ|IF_AR1},
- /* 1502 */ {I_CVTTSD2SI, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+7851, IF_X64|IF_SSE2|IF_SQ|IF_AR1},
- /* 1503 */ {I_CVTTSD2SI, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+7851, IF_X64|IF_SSE2|IF_SQ|IF_AR1},
- /* 1504 */ {I_DIVPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15296, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1505 */ {I_DIVSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15302, IF_WILLAMETTE|IF_SSE2},
- /* 1506 */ {I_MAXPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15308, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1507 */ {I_MAXSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15314, IF_WILLAMETTE|IF_SSE2},
- /* 1508 */ {I_MINPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15320, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1509 */ {I_MINSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15326, IF_WILLAMETTE|IF_SSE2},
- /* 1510 */ {I_MOVAPD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+15332, IF_WILLAMETTE|IF_SSE2},
- /* 1511 */ {I_MOVAPD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+15338, IF_WILLAMETTE|IF_SSE2},
- /* 1512 */ {I_MOVAPD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+15338, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1513 */ {I_MOVAPD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+15332, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1514 */ {I_MOVHPD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+15344, IF_WILLAMETTE|IF_SSE2},
- /* 1515 */ {I_MOVHPD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+15350, IF_WILLAMETTE|IF_SSE2},
- /* 1516 */ {I_MOVLPD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+15356, IF_WILLAMETTE|IF_SSE2},
- /* 1517 */ {I_MOVLPD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+15362, IF_WILLAMETTE|IF_SSE2},
- /* 1518 */ {I_MOVMSKPD, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+15368, IF_WILLAMETTE|IF_SSE2},
- /* 1519 */ {I_MOVMSKPD, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+7858, IF_X64|IF_SSE2},
- /* 1520 */ {I_MOVSD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+15374, IF_WILLAMETTE|IF_SSE2},
- /* 1521 */ {I_MOVSD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+15380, IF_WILLAMETTE|IF_SSE2},
- /* 1522 */ {I_MOVSD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+15380, IF_WILLAMETTE|IF_SSE2},
- /* 1523 */ {I_MOVSD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+15374, IF_WILLAMETTE|IF_SSE2},
- /* 1524 */ {I_MOVUPD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+15386, IF_WILLAMETTE|IF_SSE2},
- /* 1525 */ {I_MOVUPD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+15392, IF_WILLAMETTE|IF_SSE2},
- /* 1526 */ {I_MOVUPD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+15392, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1527 */ {I_MOVUPD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+15386, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1528 */ {I_MULPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15398, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1529 */ {I_MULSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15404, IF_WILLAMETTE|IF_SSE2},
- /* 1530 */ {I_ORPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15410, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1531 */ {I_SHUFPD, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+7865, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
- /* 1532 */ {I_SHUFPD, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+7865, IF_WILLAMETTE|IF_SSE2|IF_SM|IF_SB|IF_AR2},
- /* 1533 */ {I_SQRTPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15416, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1534 */ {I_SQRTSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15422, IF_WILLAMETTE|IF_SSE2},
- /* 1535 */ {I_SUBPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15428, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1536 */ {I_SUBSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15434, IF_WILLAMETTE|IF_SSE2},
- /* 1537 */ {I_UCOMISD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15440, IF_WILLAMETTE|IF_SSE2},
- /* 1538 */ {I_UNPCKHPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15446, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1539 */ {I_UNPCKLPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15452, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1540 */ {I_XORPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15458, IF_WILLAMETTE|IF_SSE2|IF_SO},
- /* 1541 */ {I_ADDSUBPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15464, IF_PRESCOTT|IF_SSE3|IF_SO},
- /* 1542 */ {I_ADDSUBPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15470, IF_PRESCOTT|IF_SSE3|IF_SO},
- /* 1543 */ {I_HADDPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15476, IF_PRESCOTT|IF_SSE3|IF_SO},
- /* 1544 */ {I_HADDPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15482, IF_PRESCOTT|IF_SSE3|IF_SO},
- /* 1545 */ {I_HSUBPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15488, IF_PRESCOTT|IF_SSE3|IF_SO},
- /* 1546 */ {I_HSUBPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15494, IF_PRESCOTT|IF_SSE3|IF_SO},
- /* 1547 */ {I_LDDQU, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+15500, IF_PRESCOTT|IF_SSE3|IF_SO},
- /* 1548 */ {I_MOVDDUP, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15506, IF_PRESCOTT|IF_SSE3},
- /* 1549 */ {I_MOVSHDUP, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15512, IF_PRESCOTT|IF_SSE3},
- /* 1550 */ {I_MOVSLDUP, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+15518, IF_PRESCOTT|IF_SSE3},
- /* 1551 */ {I_VMCALL, 0, {0,0,0,0,0}, nasm_bytecodes+18582, IF_VMX},
- /* 1552 */ {I_VMCLEAR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+15524, IF_VMX},
- /* 1553 */ {I_VMLAUNCH, 0, {0,0,0,0,0}, nasm_bytecodes+18587, IF_VMX},
- /* 1554 */ {I_VMLOAD, 0, {0,0,0,0,0}, nasm_bytecodes+18592, IF_X64|IF_VMX},
- /* 1555 */ {I_VMMCALL, 0, {0,0,0,0,0}, nasm_bytecodes+18597, IF_X64|IF_VMX},
- /* 1556 */ {I_VMPTRLD, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+15585, IF_VMX},
- /* 1557 */ {I_VMPTRST, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18602, IF_VMX},
- /* 1558 */ {I_VMREAD, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7873, IF_VMX|IF_NOLONG|IF_SD},
- /* 1559 */ {I_VMREAD, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7872, IF_X64|IF_VMX|IF_SQ},
- /* 1560 */ {I_VMRESUME, 0, {0,0,0,0,0}, nasm_bytecodes+18607, IF_VMX},
- /* 1561 */ {I_VMRUN, 0, {0,0,0,0,0}, nasm_bytecodes+18612, IF_X64|IF_VMX},
- /* 1562 */ {I_VMSAVE, 0, {0,0,0,0,0}, nasm_bytecodes+18617, IF_X64|IF_VMX},
- /* 1563 */ {I_VMWRITE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+7880, IF_VMX|IF_NOLONG|IF_SD},
- /* 1564 */ {I_VMWRITE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+7879, IF_X64|IF_VMX|IF_SQ},
- /* 1565 */ {I_VMXOFF, 0, {0,0,0,0,0}, nasm_bytecodes+18622, IF_VMX},
- /* 1566 */ {I_VMXON, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+15530, IF_VMX},
- /* 1567 */ {I_INVEPT, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+5641, IF_VMX|IF_SO|IF_NOLONG},
- /* 1568 */ {I_INVEPT, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+5640, IF_VMX|IF_SO|IF_LONG},
- /* 1569 */ {I_INVVPID, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+5649, IF_VMX|IF_SO|IF_NOLONG},
- /* 1570 */ {I_INVVPID, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+5648, IF_VMX|IF_SO|IF_LONG},
- /* 1571 */ {I_PABSB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7886, IF_SSSE3|IF_MMX|IF_SQ},
- /* 1572 */ {I_PABSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+7893, IF_SSSE3},
- /* 1573 */ {I_PABSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7900, IF_SSSE3|IF_MMX|IF_SQ},
- /* 1574 */ {I_PABSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+7907, IF_SSSE3},
- /* 1575 */ {I_PABSD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7914, IF_SSSE3|IF_MMX|IF_SQ},
- /* 1576 */ {I_PABSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+7921, IF_SSSE3},
- /* 1577 */ {I_PALIGNR, 3, {MMXREG,RM_MMX,IMMEDIATE,0,0}, nasm_bytecodes+5656, IF_SSSE3|IF_MMX|IF_SQ},
- /* 1578 */ {I_PALIGNR, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5664, IF_SSSE3},
- /* 1579 */ {I_PHADDW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7928, IF_SSSE3|IF_MMX|IF_SQ},
- /* 1580 */ {I_PHADDW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+7935, IF_SSSE3},
- /* 1581 */ {I_PHADDD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7942, IF_SSSE3|IF_MMX|IF_SQ},
- /* 1582 */ {I_PHADDD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+7949, IF_SSSE3},
- /* 1583 */ {I_PHADDSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7956, IF_SSSE3|IF_MMX|IF_SQ},
- /* 1584 */ {I_PHADDSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+7963, IF_SSSE3},
- /* 1585 */ {I_PHSUBW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7970, IF_SSSE3|IF_MMX|IF_SQ},
- /* 1586 */ {I_PHSUBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+7977, IF_SSSE3},
- /* 1587 */ {I_PHSUBD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7984, IF_SSSE3|IF_MMX|IF_SQ},
- /* 1588 */ {I_PHSUBD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+7991, IF_SSSE3},
- /* 1589 */ {I_PHSUBSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7998, IF_SSSE3|IF_MMX|IF_SQ},
- /* 1590 */ {I_PHSUBSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8005, IF_SSSE3},
- /* 1591 */ {I_PMADDUBSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8012, IF_SSSE3|IF_MMX|IF_SQ},
- /* 1592 */ {I_PMADDUBSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8019, IF_SSSE3},
- /* 1593 */ {I_PMULHRSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8026, IF_SSSE3|IF_MMX|IF_SQ},
- /* 1594 */ {I_PMULHRSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8033, IF_SSSE3},
- /* 1595 */ {I_PSHUFB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8040, IF_SSSE3|IF_MMX|IF_SQ},
- /* 1596 */ {I_PSHUFB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8047, IF_SSSE3},
- /* 1597 */ {I_PSIGNB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8054, IF_SSSE3|IF_MMX|IF_SQ},
- /* 1598 */ {I_PSIGNB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8061, IF_SSSE3},
- /* 1599 */ {I_PSIGNW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8068, IF_SSSE3|IF_MMX|IF_SQ},
- /* 1600 */ {I_PSIGNW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8075, IF_SSSE3},
- /* 1601 */ {I_PSIGND, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8082, IF_SSSE3|IF_MMX|IF_SQ},
- /* 1602 */ {I_PSIGND, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8089, IF_SSSE3},
- /* 1603 */ {I_EXTRQ, 3, {XMMREG,IMMEDIATE,IMMEDIATE,0,0}, nasm_bytecodes+5672, IF_SSE4A|IF_AMD},
- /* 1604 */ {I_EXTRQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+15536, IF_SSE4A|IF_AMD},
- /* 1605 */ {I_INSERTQ, 4, {XMMREG,XMMREG,IMMEDIATE,IMMEDIATE,0}, nasm_bytecodes+5680, IF_SSE4A|IF_AMD},
- /* 1606 */ {I_INSERTQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+15542, IF_SSE4A|IF_AMD},
- /* 1607 */ {I_MOVNTSD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+15548, IF_SSE4A|IF_AMD|IF_SQ},
- /* 1608 */ {I_MOVNTSS, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+15554, IF_SSE4A|IF_AMD|IF_SD},
- /* 1609 */ {I_LZCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+8096, IF_P6|IF_AMD},
- /* 1610 */ {I_LZCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+8103, IF_P6|IF_AMD},
- /* 1611 */ {I_LZCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+8110, IF_X64|IF_AMD},
- /* 1612 */ {I_BLENDPD, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5688, IF_SSE41},
- /* 1613 */ {I_BLENDPS, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5696, IF_SSE41},
- /* 1614 */ {I_BLENDVPD, 3, {XMMREG,RM_XMM,XMM0,0,0}, nasm_bytecodes+8117, IF_SSE41},
- /* 1615 */ {I_BLENDVPS, 3, {XMMREG,RM_XMM,XMM0,0,0}, nasm_bytecodes+8124, IF_SSE41},
- /* 1616 */ {I_DPPD, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5704, IF_SSE41},
- /* 1617 */ {I_DPPS, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5712, IF_SSE41},
- /* 1618 */ {I_EXTRACTPS, 3, {RM_GPR|BITS32,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+1, IF_SSE41},
- /* 1619 */ {I_EXTRACTPS, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+0, IF_SSE41|IF_X64},
- /* 1620 */ {I_INSERTPS, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5720, IF_SSE41|IF_SD},
- /* 1621 */ {I_MOVNTDQA, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+8131, IF_SSE41},
- /* 1622 */ {I_MPSADBW, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5728, IF_SSE41},
- /* 1623 */ {I_PACKUSDW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8138, IF_SSE41},
- /* 1624 */ {I_PBLENDVB, 3, {XMMREG,RM_XMM,XMM0,0,0}, nasm_bytecodes+8145, IF_SSE41},
- /* 1625 */ {I_PBLENDW, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5736, IF_SSE41},
- /* 1626 */ {I_PCMPEQQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8152, IF_SSE41},
- /* 1627 */ {I_PEXTRB, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+10, IF_SSE41},
- /* 1628 */ {I_PEXTRB, 3, {MEMORY|BITS8,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+10, IF_SSE41},
- /* 1629 */ {I_PEXTRB, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+9, IF_SSE41|IF_X64},
- /* 1630 */ {I_PEXTRD, 3, {RM_GPR|BITS32,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+19, IF_SSE41},
- /* 1631 */ {I_PEXTRQ, 3, {RM_GPR|BITS64,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+18, IF_SSE41|IF_X64},
- /* 1632 */ {I_PEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+28, IF_SSE41},
- /* 1633 */ {I_PEXTRW, 3, {MEMORY|BITS16,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+28, IF_SSE41},
- /* 1634 */ {I_PEXTRW, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+27, IF_SSE41|IF_X64},
- /* 1635 */ {I_PHMINPOSUW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8159, IF_SSE41},
- /* 1636 */ {I_PINSRB, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+37, IF_SSE41|IF_SB|IF_AR2},
- /* 1637 */ {I_PINSRB, 3, {XMMREG,RM_GPR|BITS8,IMMEDIATE,0,0}, nasm_bytecodes+36, IF_SSE41|IF_SB|IF_AR2},
- /* 1638 */ {I_PINSRB, 3, {XMMREG,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+37, IF_SSE41|IF_SB|IF_AR2},
- /* 1639 */ {I_PINSRD, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+46, IF_SSE41|IF_SB|IF_AR2},
- /* 1640 */ {I_PINSRD, 3, {XMMREG,RM_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+46, IF_SSE41|IF_SB|IF_AR2},
- /* 1641 */ {I_PINSRQ, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+45, IF_SSE41|IF_X64|IF_SB|IF_AR2},
- /* 1642 */ {I_PINSRQ, 3, {XMMREG,RM_GPR|BITS64,IMMEDIATE,0,0}, nasm_bytecodes+45, IF_SSE41|IF_X64|IF_SB|IF_AR2},
- /* 1643 */ {I_PMAXSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8166, IF_SSE41},
- /* 1644 */ {I_PMAXSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8173, IF_SSE41},
- /* 1645 */ {I_PMAXUD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8180, IF_SSE41},
- /* 1646 */ {I_PMAXUW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8187, IF_SSE41},
- /* 1647 */ {I_PMINSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8194, IF_SSE41},
- /* 1648 */ {I_PMINSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8201, IF_SSE41},
- /* 1649 */ {I_PMINUD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8208, IF_SSE41},
- /* 1650 */ {I_PMINUW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8215, IF_SSE41},
- /* 1651 */ {I_PMOVSXBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8222, IF_SSE41|IF_SQ},
- /* 1652 */ {I_PMOVSXBD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8229, IF_SSE41|IF_SD},
- /* 1653 */ {I_PMOVSXBQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8236, IF_SSE41|IF_SW},
- /* 1654 */ {I_PMOVSXWD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8243, IF_SSE41|IF_SQ},
- /* 1655 */ {I_PMOVSXWQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8250, IF_SSE41|IF_SD},
- /* 1656 */ {I_PMOVSXDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8257, IF_SSE41|IF_SQ},
- /* 1657 */ {I_PMOVZXBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8264, IF_SSE41|IF_SQ},
- /* 1658 */ {I_PMOVZXBD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8271, IF_SSE41|IF_SD},
- /* 1659 */ {I_PMOVZXBQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8278, IF_SSE41|IF_SW},
- /* 1660 */ {I_PMOVZXWD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8285, IF_SSE41|IF_SQ},
- /* 1661 */ {I_PMOVZXWQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8292, IF_SSE41|IF_SD},
- /* 1662 */ {I_PMOVZXDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8299, IF_SSE41|IF_SQ},
- /* 1663 */ {I_PMULDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8306, IF_SSE41},
- /* 1664 */ {I_PMULLD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8313, IF_SSE41},
- /* 1665 */ {I_PTEST, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8320, IF_SSE41},
- /* 1666 */ {I_ROUNDPD, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5744, IF_SSE41},
- /* 1667 */ {I_ROUNDPS, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5752, IF_SSE41},
- /* 1668 */ {I_ROUNDSD, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5760, IF_SSE41},
- /* 1669 */ {I_ROUNDSS, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5768, IF_SSE41},
- /* 1670 */ {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, nasm_bytecodes+5793, IF_SSE42},
- /* 1671 */ {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+5776, IF_SSE42},
- /* 1672 */ {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+5784, IF_SSE42},
- /* 1673 */ {I_CRC32, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, nasm_bytecodes+5792, IF_SSE42|IF_X64},
- /* 1674 */ {I_CRC32, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+5800, IF_SSE42|IF_X64},
- /* 1675 */ {I_PCMPESTRI, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5808, IF_SSE42},
- /* 1676 */ {I_PCMPESTRM, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5816, IF_SSE42},
- /* 1677 */ {I_PCMPISTRI, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5824, IF_SSE42},
- /* 1678 */ {I_PCMPISTRM, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+5832, IF_SSE42},
- /* 1679 */ {I_PCMPGTQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8327, IF_SSE42},
- /* 1680 */ {I_POPCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+8334, IF_NEHALEM|IF_SW},
- /* 1681 */ {I_POPCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+8341, IF_NEHALEM|IF_SD},
- /* 1682 */ {I_POPCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+8348, IF_NEHALEM|IF_SQ|IF_X64},
- /* 1683 */ {I_GETSEC, 0, {0,0,0,0,0}, nasm_bytecodes+19676, IF_KATMAI},
- /* 1684 */ {I_PFRCPV, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5840, IF_PENT|IF_3DNOW|IF_SQ|IF_CYRIX},
- /* 1685 */ {I_PFRSQRTV, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+5848, IF_PENT|IF_3DNOW|IF_SQ|IF_CYRIX},
- /* 1686 */ {I_MOVBE, 2, {REG_GPR|BITS16,MEMORY|BITS16,0,0,0}, nasm_bytecodes+8355, IF_NEHALEM|IF_SM},
- /* 1687 */ {I_MOVBE, 2, {REG_GPR|BITS32,MEMORY|BITS32,0,0,0}, nasm_bytecodes+8362, IF_NEHALEM|IF_SM},
- /* 1688 */ {I_MOVBE, 2, {REG_GPR|BITS64,MEMORY|BITS64,0,0,0}, nasm_bytecodes+8369, IF_NEHALEM|IF_SM},
- /* 1689 */ {I_MOVBE, 2, {MEMORY|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+8376, IF_NEHALEM|IF_SM},
- /* 1690 */ {I_MOVBE, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+8383, IF_NEHALEM|IF_SM},
- /* 1691 */ {I_MOVBE, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+8390, IF_NEHALEM|IF_SM},
- /* 1692 */ {I_AESENC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8397, IF_SSE|IF_WESTMERE},
- /* 1693 */ {I_AESENCLAST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8404, IF_SSE|IF_WESTMERE},
- /* 1694 */ {I_AESDEC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8411, IF_SSE|IF_WESTMERE},
- /* 1695 */ {I_AESDECLAST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8418, IF_SSE|IF_WESTMERE},
- /* 1696 */ {I_AESIMC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8425, IF_SSE|IF_WESTMERE},
- /* 1697 */ {I_AESKEYGENASSIST, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5856, IF_SSE|IF_WESTMERE},
- /* 1698 */ {I_VAESENC, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+8432, IF_AVX|IF_SANDYBRIDGE},
- /* 1699 */ {I_VAESENC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8439, IF_AVX|IF_SANDYBRIDGE},
- /* 1700 */ {I_VAESENCLAST, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+8446, IF_AVX|IF_SANDYBRIDGE},
- /* 1701 */ {I_VAESENCLAST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8453, IF_AVX|IF_SANDYBRIDGE},
- /* 1702 */ {I_VAESDEC, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+8460, IF_AVX|IF_SANDYBRIDGE},
- /* 1703 */ {I_VAESDEC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8467, IF_AVX|IF_SANDYBRIDGE},
- /* 1704 */ {I_VAESDECLAST, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+8474, IF_AVX|IF_SANDYBRIDGE},
- /* 1705 */ {I_VAESDECLAST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8481, IF_AVX|IF_SANDYBRIDGE},
- /* 1706 */ {I_VAESIMC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8488, IF_AVX|IF_SANDYBRIDGE},
- /* 1707 */ {I_VAESKEYGENASSIST, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5864, IF_AVX|IF_SANDYBRIDGE},
- /* 1708 */ {I_VADDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+8495, IF_AVX|IF_SANDYBRIDGE},
- /* 1709 */ {I_VADDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8502, IF_AVX|IF_SANDYBRIDGE},
- /* 1710 */ {I_VADDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+8509, IF_AVX|IF_SANDYBRIDGE},
- /* 1711 */ {I_VADDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+8516, IF_AVX|IF_SANDYBRIDGE},
- /* 1712 */ {I_VADDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+8523, IF_AVX|IF_SANDYBRIDGE},
- /* 1713 */ {I_VADDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8530, IF_AVX|IF_SANDYBRIDGE},
- /* 1714 */ {I_VADDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+8537, IF_AVX|IF_SANDYBRIDGE},
- /* 1715 */ {I_VADDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+8544, IF_AVX|IF_SANDYBRIDGE},
- /* 1716 */ {I_VADDSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+8551, IF_AVX|IF_SANDYBRIDGE},
- /* 1717 */ {I_VADDSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+8558, IF_AVX|IF_SANDYBRIDGE},
- /* 1718 */ {I_VADDSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+8565, IF_AVX|IF_SANDYBRIDGE},
- /* 1719 */ {I_VADDSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+8572, IF_AVX|IF_SANDYBRIDGE},
- /* 1720 */ {I_VADDSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+8579, IF_AVX|IF_SANDYBRIDGE},
- /* 1721 */ {I_VADDSUBPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8586, IF_AVX|IF_SANDYBRIDGE},
- /* 1722 */ {I_VADDSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+8593, IF_AVX|IF_SANDYBRIDGE},
- /* 1723 */ {I_VADDSUBPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+8600, IF_AVX|IF_SANDYBRIDGE},
- /* 1724 */ {I_VADDSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+8607, IF_AVX|IF_SANDYBRIDGE},
- /* 1725 */ {I_VADDSUBPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8614, IF_AVX|IF_SANDYBRIDGE},
- /* 1726 */ {I_VADDSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+8621, IF_AVX|IF_SANDYBRIDGE},
- /* 1727 */ {I_VADDSUBPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+8628, IF_AVX|IF_SANDYBRIDGE},
- /* 1728 */ {I_VANDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+8635, IF_AVX|IF_SANDYBRIDGE},
- /* 1729 */ {I_VANDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8642, IF_AVX|IF_SANDYBRIDGE},
- /* 1730 */ {I_VANDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+8649, IF_AVX|IF_SANDYBRIDGE},
- /* 1731 */ {I_VANDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+8656, IF_AVX|IF_SANDYBRIDGE},
- /* 1732 */ {I_VANDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+8663, IF_AVX|IF_SANDYBRIDGE},
- /* 1733 */ {I_VANDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8670, IF_AVX|IF_SANDYBRIDGE},
- /* 1734 */ {I_VANDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+8677, IF_AVX|IF_SANDYBRIDGE},
- /* 1735 */ {I_VANDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+8684, IF_AVX|IF_SANDYBRIDGE},
- /* 1736 */ {I_VANDNPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+8691, IF_AVX|IF_SANDYBRIDGE},
- /* 1737 */ {I_VANDNPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8698, IF_AVX|IF_SANDYBRIDGE},
- /* 1738 */ {I_VANDNPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+8705, IF_AVX|IF_SANDYBRIDGE},
- /* 1739 */ {I_VANDNPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+8712, IF_AVX|IF_SANDYBRIDGE},
- /* 1740 */ {I_VANDNPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+8719, IF_AVX|IF_SANDYBRIDGE},
- /* 1741 */ {I_VANDNPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8726, IF_AVX|IF_SANDYBRIDGE},
- /* 1742 */ {I_VANDNPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+8733, IF_AVX|IF_SANDYBRIDGE},
- /* 1743 */ {I_VANDNPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+8740, IF_AVX|IF_SANDYBRIDGE},
- /* 1744 */ {I_VBLENDPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+5872, IF_AVX|IF_SANDYBRIDGE},
- /* 1745 */ {I_VBLENDPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5880, IF_AVX|IF_SANDYBRIDGE},
- /* 1746 */ {I_VBLENDPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+5888, IF_AVX|IF_SANDYBRIDGE},
- /* 1747 */ {I_VBLENDPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5896, IF_AVX|IF_SANDYBRIDGE},
- /* 1748 */ {I_VBLENDPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+5904, IF_AVX|IF_SANDYBRIDGE},
- /* 1749 */ {I_VBLENDPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5912, IF_AVX|IF_SANDYBRIDGE},
- /* 1750 */ {I_VBLENDPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+5920, IF_AVX|IF_SANDYBRIDGE},
- /* 1751 */ {I_VBLENDPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5928, IF_AVX|IF_SANDYBRIDGE},
- /* 1752 */ {I_VBLENDVPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+54, IF_AVX|IF_SANDYBRIDGE},
- /* 1753 */ {I_VBLENDVPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+63, IF_AVX|IF_SANDYBRIDGE},
- /* 1754 */ {I_VBLENDVPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+72, IF_AVX|IF_SANDYBRIDGE},
- /* 1755 */ {I_VBLENDVPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+81, IF_AVX|IF_SANDYBRIDGE},
- /* 1756 */ {I_VBLENDVPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+90, IF_AVX|IF_SANDYBRIDGE},
- /* 1757 */ {I_VBLENDVPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+99, IF_AVX|IF_SANDYBRIDGE},
- /* 1758 */ {I_VBLENDVPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+108, IF_AVX|IF_SANDYBRIDGE},
- /* 1759 */ {I_VBLENDVPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+117, IF_AVX|IF_SANDYBRIDGE},
- /* 1760 */ {I_VBROADCASTSS, 2, {XMMREG,MEMORY|BITS32,0,0,0}, nasm_bytecodes+8747, IF_AVX|IF_SANDYBRIDGE},
- /* 1761 */ {I_VBROADCASTSS, 2, {YMMREG,MEMORY|BITS32,0,0,0}, nasm_bytecodes+8754, IF_AVX|IF_SANDYBRIDGE},
- /* 1762 */ {I_VBROADCASTSD, 2, {YMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+8761, IF_AVX|IF_SANDYBRIDGE},
- /* 1763 */ {I_VBROADCASTF128, 2, {YMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+8768, IF_AVX|IF_SANDYBRIDGE},
- /* 1764 */ {I_VCMPEQ_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+126, IF_AVX|IF_SANDYBRIDGE},
- /* 1765 */ {I_VCMPEQ_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+135, IF_AVX|IF_SANDYBRIDGE},
- /* 1766 */ {I_VCMPEQ_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+144, IF_AVX|IF_SANDYBRIDGE},
- /* 1767 */ {I_VCMPEQ_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+153, IF_AVX|IF_SANDYBRIDGE},
- /* 1768 */ {I_VCMPEQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+126, IF_AVX|IF_SANDYBRIDGE},
- /* 1769 */ {I_VCMPEQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+135, IF_AVX|IF_SANDYBRIDGE},
- /* 1770 */ {I_VCMPEQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+144, IF_AVX|IF_SANDYBRIDGE},
- /* 1771 */ {I_VCMPEQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+153, IF_AVX|IF_SANDYBRIDGE},
- /* 1772 */ {I_VCMPLT_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+162, IF_AVX|IF_SANDYBRIDGE},
- /* 1773 */ {I_VCMPLT_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+171, IF_AVX|IF_SANDYBRIDGE},
- /* 1774 */ {I_VCMPLT_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+180, IF_AVX|IF_SANDYBRIDGE},
- /* 1775 */ {I_VCMPLT_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+189, IF_AVX|IF_SANDYBRIDGE},
- /* 1776 */ {I_VCMPLTPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+162, IF_AVX|IF_SANDYBRIDGE},
- /* 1777 */ {I_VCMPLTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+171, IF_AVX|IF_SANDYBRIDGE},
- /* 1778 */ {I_VCMPLTPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+180, IF_AVX|IF_SANDYBRIDGE},
- /* 1779 */ {I_VCMPLTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+189, IF_AVX|IF_SANDYBRIDGE},
- /* 1780 */ {I_VCMPLE_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+198, IF_AVX|IF_SANDYBRIDGE},
- /* 1781 */ {I_VCMPLE_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+207, IF_AVX|IF_SANDYBRIDGE},
- /* 1782 */ {I_VCMPLE_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+216, IF_AVX|IF_SANDYBRIDGE},
- /* 1783 */ {I_VCMPLE_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+225, IF_AVX|IF_SANDYBRIDGE},
- /* 1784 */ {I_VCMPLEPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+198, IF_AVX|IF_SANDYBRIDGE},
- /* 1785 */ {I_VCMPLEPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+207, IF_AVX|IF_SANDYBRIDGE},
- /* 1786 */ {I_VCMPLEPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+216, IF_AVX|IF_SANDYBRIDGE},
- /* 1787 */ {I_VCMPLEPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+225, IF_AVX|IF_SANDYBRIDGE},
- /* 1788 */ {I_VCMPUNORD_QPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+234, IF_AVX|IF_SANDYBRIDGE},
- /* 1789 */ {I_VCMPUNORD_QPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+243, IF_AVX|IF_SANDYBRIDGE},
- /* 1790 */ {I_VCMPUNORD_QPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+252, IF_AVX|IF_SANDYBRIDGE},
- /* 1791 */ {I_VCMPUNORD_QPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+261, IF_AVX|IF_SANDYBRIDGE},
- /* 1792 */ {I_VCMPUNORDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+234, IF_AVX|IF_SANDYBRIDGE},
- /* 1793 */ {I_VCMPUNORDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+243, IF_AVX|IF_SANDYBRIDGE},
- /* 1794 */ {I_VCMPUNORDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+252, IF_AVX|IF_SANDYBRIDGE},
- /* 1795 */ {I_VCMPUNORDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+261, IF_AVX|IF_SANDYBRIDGE},
- /* 1796 */ {I_VCMPNEQ_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+270, IF_AVX|IF_SANDYBRIDGE},
- /* 1797 */ {I_VCMPNEQ_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+279, IF_AVX|IF_SANDYBRIDGE},
- /* 1798 */ {I_VCMPNEQ_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+288, IF_AVX|IF_SANDYBRIDGE},
- /* 1799 */ {I_VCMPNEQ_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+297, IF_AVX|IF_SANDYBRIDGE},
- /* 1800 */ {I_VCMPNEQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+270, IF_AVX|IF_SANDYBRIDGE},
- /* 1801 */ {I_VCMPNEQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+279, IF_AVX|IF_SANDYBRIDGE},
- /* 1802 */ {I_VCMPNEQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+288, IF_AVX|IF_SANDYBRIDGE},
- /* 1803 */ {I_VCMPNEQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+297, IF_AVX|IF_SANDYBRIDGE},
- /* 1804 */ {I_VCMPNLT_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+306, IF_AVX|IF_SANDYBRIDGE},
- /* 1805 */ {I_VCMPNLT_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+315, IF_AVX|IF_SANDYBRIDGE},
- /* 1806 */ {I_VCMPNLT_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+324, IF_AVX|IF_SANDYBRIDGE},
- /* 1807 */ {I_VCMPNLT_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+333, IF_AVX|IF_SANDYBRIDGE},
- /* 1808 */ {I_VCMPNLTPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+306, IF_AVX|IF_SANDYBRIDGE},
- /* 1809 */ {I_VCMPNLTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+315, IF_AVX|IF_SANDYBRIDGE},
- /* 1810 */ {I_VCMPNLTPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+324, IF_AVX|IF_SANDYBRIDGE},
- /* 1811 */ {I_VCMPNLTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+333, IF_AVX|IF_SANDYBRIDGE},
- /* 1812 */ {I_VCMPNLE_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+342, IF_AVX|IF_SANDYBRIDGE},
- /* 1813 */ {I_VCMPNLE_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+351, IF_AVX|IF_SANDYBRIDGE},
- /* 1814 */ {I_VCMPNLE_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+360, IF_AVX|IF_SANDYBRIDGE},
- /* 1815 */ {I_VCMPNLE_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+369, IF_AVX|IF_SANDYBRIDGE},
- /* 1816 */ {I_VCMPNLEPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+342, IF_AVX|IF_SANDYBRIDGE},
- /* 1817 */ {I_VCMPNLEPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+351, IF_AVX|IF_SANDYBRIDGE},
- /* 1818 */ {I_VCMPNLEPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+360, IF_AVX|IF_SANDYBRIDGE},
- /* 1819 */ {I_VCMPNLEPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+369, IF_AVX|IF_SANDYBRIDGE},
- /* 1820 */ {I_VCMPORD_QPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+378, IF_AVX|IF_SANDYBRIDGE},
- /* 1821 */ {I_VCMPORD_QPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+387, IF_AVX|IF_SANDYBRIDGE},
- /* 1822 */ {I_VCMPORD_QPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+396, IF_AVX|IF_SANDYBRIDGE},
- /* 1823 */ {I_VCMPORD_QPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+405, IF_AVX|IF_SANDYBRIDGE},
- /* 1824 */ {I_VCMPORDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+378, IF_AVX|IF_SANDYBRIDGE},
- /* 1825 */ {I_VCMPORDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+387, IF_AVX|IF_SANDYBRIDGE},
- /* 1826 */ {I_VCMPORDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+396, IF_AVX|IF_SANDYBRIDGE},
- /* 1827 */ {I_VCMPORDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+405, IF_AVX|IF_SANDYBRIDGE},
- /* 1828 */ {I_VCMPEQ_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+414, IF_AVX|IF_SANDYBRIDGE},
- /* 1829 */ {I_VCMPEQ_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+423, IF_AVX|IF_SANDYBRIDGE},
- /* 1830 */ {I_VCMPEQ_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+432, IF_AVX|IF_SANDYBRIDGE},
- /* 1831 */ {I_VCMPEQ_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+441, IF_AVX|IF_SANDYBRIDGE},
- /* 1832 */ {I_VCMPNGE_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+450, IF_AVX|IF_SANDYBRIDGE},
- /* 1833 */ {I_VCMPNGE_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+459, IF_AVX|IF_SANDYBRIDGE},
- /* 1834 */ {I_VCMPNGE_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+468, IF_AVX|IF_SANDYBRIDGE},
- /* 1835 */ {I_VCMPNGE_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+477, IF_AVX|IF_SANDYBRIDGE},
- /* 1836 */ {I_VCMPNGEPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+450, IF_AVX|IF_SANDYBRIDGE},
- /* 1837 */ {I_VCMPNGEPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+459, IF_AVX|IF_SANDYBRIDGE},
- /* 1838 */ {I_VCMPNGEPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+468, IF_AVX|IF_SANDYBRIDGE},
- /* 1839 */ {I_VCMPNGEPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+477, IF_AVX|IF_SANDYBRIDGE},
- /* 1840 */ {I_VCMPNGT_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+486, IF_AVX|IF_SANDYBRIDGE},
- /* 1841 */ {I_VCMPNGT_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+495, IF_AVX|IF_SANDYBRIDGE},
- /* 1842 */ {I_VCMPNGT_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+504, IF_AVX|IF_SANDYBRIDGE},
- /* 1843 */ {I_VCMPNGT_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+513, IF_AVX|IF_SANDYBRIDGE},
- /* 1844 */ {I_VCMPNGTPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+486, IF_AVX|IF_SANDYBRIDGE},
- /* 1845 */ {I_VCMPNGTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+495, IF_AVX|IF_SANDYBRIDGE},
- /* 1846 */ {I_VCMPNGTPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+504, IF_AVX|IF_SANDYBRIDGE},
- /* 1847 */ {I_VCMPNGTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+513, IF_AVX|IF_SANDYBRIDGE},
- /* 1848 */ {I_VCMPFALSE_OQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+522, IF_AVX|IF_SANDYBRIDGE},
- /* 1849 */ {I_VCMPFALSE_OQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+531, IF_AVX|IF_SANDYBRIDGE},
- /* 1850 */ {I_VCMPFALSE_OQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+540, IF_AVX|IF_SANDYBRIDGE},
- /* 1851 */ {I_VCMPFALSE_OQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+549, IF_AVX|IF_SANDYBRIDGE},
- /* 1852 */ {I_VCMPFALSEPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+522, IF_AVX|IF_SANDYBRIDGE},
- /* 1853 */ {I_VCMPFALSEPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+531, IF_AVX|IF_SANDYBRIDGE},
- /* 1854 */ {I_VCMPFALSEPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+540, IF_AVX|IF_SANDYBRIDGE},
- /* 1855 */ {I_VCMPFALSEPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+549, IF_AVX|IF_SANDYBRIDGE},
- /* 1856 */ {I_VCMPNEQ_OQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+558, IF_AVX|IF_SANDYBRIDGE},
- /* 1857 */ {I_VCMPNEQ_OQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+567, IF_AVX|IF_SANDYBRIDGE},
- /* 1858 */ {I_VCMPNEQ_OQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+576, IF_AVX|IF_SANDYBRIDGE},
- /* 1859 */ {I_VCMPNEQ_OQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+585, IF_AVX|IF_SANDYBRIDGE},
- /* 1860 */ {I_VCMPGE_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+594, IF_AVX|IF_SANDYBRIDGE},
- /* 1861 */ {I_VCMPGE_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+603, IF_AVX|IF_SANDYBRIDGE},
- /* 1862 */ {I_VCMPGE_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+612, IF_AVX|IF_SANDYBRIDGE},
- /* 1863 */ {I_VCMPGE_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+621, IF_AVX|IF_SANDYBRIDGE},
- /* 1864 */ {I_VCMPGEPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+594, IF_AVX|IF_SANDYBRIDGE},
- /* 1865 */ {I_VCMPGEPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+603, IF_AVX|IF_SANDYBRIDGE},
- /* 1866 */ {I_VCMPGEPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+612, IF_AVX|IF_SANDYBRIDGE},
- /* 1867 */ {I_VCMPGEPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+621, IF_AVX|IF_SANDYBRIDGE},
- /* 1868 */ {I_VCMPGT_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+630, IF_AVX|IF_SANDYBRIDGE},
- /* 1869 */ {I_VCMPGT_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+639, IF_AVX|IF_SANDYBRIDGE},
- /* 1870 */ {I_VCMPGT_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+648, IF_AVX|IF_SANDYBRIDGE},
- /* 1871 */ {I_VCMPGT_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+657, IF_AVX|IF_SANDYBRIDGE},
- /* 1872 */ {I_VCMPGTPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+630, IF_AVX|IF_SANDYBRIDGE},
- /* 1873 */ {I_VCMPGTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+639, IF_AVX|IF_SANDYBRIDGE},
- /* 1874 */ {I_VCMPGTPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+648, IF_AVX|IF_SANDYBRIDGE},
- /* 1875 */ {I_VCMPGTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+657, IF_AVX|IF_SANDYBRIDGE},
- /* 1876 */ {I_VCMPTRUE_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+666, IF_AVX|IF_SANDYBRIDGE},
- /* 1877 */ {I_VCMPTRUE_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+675, IF_AVX|IF_SANDYBRIDGE},
- /* 1878 */ {I_VCMPTRUE_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+684, IF_AVX|IF_SANDYBRIDGE},
- /* 1879 */ {I_VCMPTRUE_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+693, IF_AVX|IF_SANDYBRIDGE},
- /* 1880 */ {I_VCMPTRUEPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+666, IF_AVX|IF_SANDYBRIDGE},
- /* 1881 */ {I_VCMPTRUEPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+675, IF_AVX|IF_SANDYBRIDGE},
- /* 1882 */ {I_VCMPTRUEPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+684, IF_AVX|IF_SANDYBRIDGE},
- /* 1883 */ {I_VCMPTRUEPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+693, IF_AVX|IF_SANDYBRIDGE},
- /* 1884 */ {I_VCMPEQ_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+702, IF_AVX|IF_SANDYBRIDGE},
- /* 1885 */ {I_VCMPEQ_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+711, IF_AVX|IF_SANDYBRIDGE},
- /* 1886 */ {I_VCMPEQ_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+720, IF_AVX|IF_SANDYBRIDGE},
- /* 1887 */ {I_VCMPEQ_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+729, IF_AVX|IF_SANDYBRIDGE},
- /* 1888 */ {I_VCMPLT_OQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+738, IF_AVX|IF_SANDYBRIDGE},
- /* 1889 */ {I_VCMPLT_OQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+747, IF_AVX|IF_SANDYBRIDGE},
- /* 1890 */ {I_VCMPLT_OQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+756, IF_AVX|IF_SANDYBRIDGE},
- /* 1891 */ {I_VCMPLT_OQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+765, IF_AVX|IF_SANDYBRIDGE},
- /* 1892 */ {I_VCMPLE_OQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+774, IF_AVX|IF_SANDYBRIDGE},
- /* 1893 */ {I_VCMPLE_OQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+783, IF_AVX|IF_SANDYBRIDGE},
- /* 1894 */ {I_VCMPLE_OQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+792, IF_AVX|IF_SANDYBRIDGE},
- /* 1895 */ {I_VCMPLE_OQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+801, IF_AVX|IF_SANDYBRIDGE},
- /* 1896 */ {I_VCMPUNORD_SPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+810, IF_AVX|IF_SANDYBRIDGE},
- /* 1897 */ {I_VCMPUNORD_SPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+819, IF_AVX|IF_SANDYBRIDGE},
- /* 1898 */ {I_VCMPUNORD_SPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+828, IF_AVX|IF_SANDYBRIDGE},
- /* 1899 */ {I_VCMPUNORD_SPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+837, IF_AVX|IF_SANDYBRIDGE},
- /* 1900 */ {I_VCMPNEQ_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+846, IF_AVX|IF_SANDYBRIDGE},
- /* 1901 */ {I_VCMPNEQ_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+855, IF_AVX|IF_SANDYBRIDGE},
- /* 1902 */ {I_VCMPNEQ_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+864, IF_AVX|IF_SANDYBRIDGE},
- /* 1903 */ {I_VCMPNEQ_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+873, IF_AVX|IF_SANDYBRIDGE},
- /* 1904 */ {I_VCMPNLT_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+882, IF_AVX|IF_SANDYBRIDGE},
- /* 1905 */ {I_VCMPNLT_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+891, IF_AVX|IF_SANDYBRIDGE},
- /* 1906 */ {I_VCMPNLT_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+900, IF_AVX|IF_SANDYBRIDGE},
- /* 1907 */ {I_VCMPNLT_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+909, IF_AVX|IF_SANDYBRIDGE},
- /* 1908 */ {I_VCMPNLE_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+918, IF_AVX|IF_SANDYBRIDGE},
- /* 1909 */ {I_VCMPNLE_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+927, IF_AVX|IF_SANDYBRIDGE},
- /* 1910 */ {I_VCMPNLE_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+936, IF_AVX|IF_SANDYBRIDGE},
- /* 1911 */ {I_VCMPNLE_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+945, IF_AVX|IF_SANDYBRIDGE},
- /* 1912 */ {I_VCMPORD_SPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+954, IF_AVX|IF_SANDYBRIDGE},
- /* 1913 */ {I_VCMPORD_SPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+963, IF_AVX|IF_SANDYBRIDGE},
- /* 1914 */ {I_VCMPORD_SPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+972, IF_AVX|IF_SANDYBRIDGE},
- /* 1915 */ {I_VCMPORD_SPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+981, IF_AVX|IF_SANDYBRIDGE},
- /* 1916 */ {I_VCMPEQ_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+990, IF_AVX|IF_SANDYBRIDGE},
- /* 1917 */ {I_VCMPEQ_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+999, IF_AVX|IF_SANDYBRIDGE},
- /* 1918 */ {I_VCMPEQ_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1008, IF_AVX|IF_SANDYBRIDGE},
- /* 1919 */ {I_VCMPEQ_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1017, IF_AVX|IF_SANDYBRIDGE},
- /* 1920 */ {I_VCMPNGE_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1026, IF_AVX|IF_SANDYBRIDGE},
- /* 1921 */ {I_VCMPNGE_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1035, IF_AVX|IF_SANDYBRIDGE},
- /* 1922 */ {I_VCMPNGE_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1044, IF_AVX|IF_SANDYBRIDGE},
- /* 1923 */ {I_VCMPNGE_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1053, IF_AVX|IF_SANDYBRIDGE},
- /* 1924 */ {I_VCMPNGT_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1062, IF_AVX|IF_SANDYBRIDGE},
- /* 1925 */ {I_VCMPNGT_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1071, IF_AVX|IF_SANDYBRIDGE},
- /* 1926 */ {I_VCMPNGT_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1080, IF_AVX|IF_SANDYBRIDGE},
- /* 1927 */ {I_VCMPNGT_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1089, IF_AVX|IF_SANDYBRIDGE},
- /* 1928 */ {I_VCMPFALSE_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1098, IF_AVX|IF_SANDYBRIDGE},
- /* 1929 */ {I_VCMPFALSE_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1107, IF_AVX|IF_SANDYBRIDGE},
- /* 1930 */ {I_VCMPFALSE_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1116, IF_AVX|IF_SANDYBRIDGE},
- /* 1931 */ {I_VCMPFALSE_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1125, IF_AVX|IF_SANDYBRIDGE},
- /* 1932 */ {I_VCMPNEQ_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1134, IF_AVX|IF_SANDYBRIDGE},
- /* 1933 */ {I_VCMPNEQ_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1143, IF_AVX|IF_SANDYBRIDGE},
- /* 1934 */ {I_VCMPNEQ_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1152, IF_AVX|IF_SANDYBRIDGE},
- /* 1935 */ {I_VCMPNEQ_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1161, IF_AVX|IF_SANDYBRIDGE},
- /* 1936 */ {I_VCMPGE_OQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1170, IF_AVX|IF_SANDYBRIDGE},
- /* 1937 */ {I_VCMPGE_OQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1179, IF_AVX|IF_SANDYBRIDGE},
- /* 1938 */ {I_VCMPGE_OQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1188, IF_AVX|IF_SANDYBRIDGE},
- /* 1939 */ {I_VCMPGE_OQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1197, IF_AVX|IF_SANDYBRIDGE},
- /* 1940 */ {I_VCMPGT_OQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1206, IF_AVX|IF_SANDYBRIDGE},
- /* 1941 */ {I_VCMPGT_OQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1215, IF_AVX|IF_SANDYBRIDGE},
- /* 1942 */ {I_VCMPGT_OQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1224, IF_AVX|IF_SANDYBRIDGE},
- /* 1943 */ {I_VCMPGT_OQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1233, IF_AVX|IF_SANDYBRIDGE},
- /* 1944 */ {I_VCMPTRUE_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1242, IF_AVX|IF_SANDYBRIDGE},
- /* 1945 */ {I_VCMPTRUE_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1251, IF_AVX|IF_SANDYBRIDGE},
- /* 1946 */ {I_VCMPTRUE_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1260, IF_AVX|IF_SANDYBRIDGE},
- /* 1947 */ {I_VCMPTRUE_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1269, IF_AVX|IF_SANDYBRIDGE},
- /* 1948 */ {I_VCMPPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+5936, IF_AVX|IF_SANDYBRIDGE},
- /* 1949 */ {I_VCMPPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5944, IF_AVX|IF_SANDYBRIDGE},
- /* 1950 */ {I_VCMPPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+5952, IF_AVX|IF_SANDYBRIDGE},
- /* 1951 */ {I_VCMPPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5960, IF_AVX|IF_SANDYBRIDGE},
- /* 1952 */ {I_VCMPEQ_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1278, IF_AVX|IF_SANDYBRIDGE},
- /* 1953 */ {I_VCMPEQ_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1287, IF_AVX|IF_SANDYBRIDGE},
- /* 1954 */ {I_VCMPEQ_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1296, IF_AVX|IF_SANDYBRIDGE},
- /* 1955 */ {I_VCMPEQ_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1305, IF_AVX|IF_SANDYBRIDGE},
- /* 1956 */ {I_VCMPEQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1278, IF_AVX|IF_SANDYBRIDGE},
- /* 1957 */ {I_VCMPEQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1287, IF_AVX|IF_SANDYBRIDGE},
- /* 1958 */ {I_VCMPEQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1296, IF_AVX|IF_SANDYBRIDGE},
- /* 1959 */ {I_VCMPEQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1305, IF_AVX|IF_SANDYBRIDGE},
- /* 1960 */ {I_VCMPLT_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1314, IF_AVX|IF_SANDYBRIDGE},
- /* 1961 */ {I_VCMPLT_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1323, IF_AVX|IF_SANDYBRIDGE},
- /* 1962 */ {I_VCMPLT_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1332, IF_AVX|IF_SANDYBRIDGE},
- /* 1963 */ {I_VCMPLT_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1341, IF_AVX|IF_SANDYBRIDGE},
- /* 1964 */ {I_VCMPLTPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1314, IF_AVX|IF_SANDYBRIDGE},
- /* 1965 */ {I_VCMPLTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1323, IF_AVX|IF_SANDYBRIDGE},
- /* 1966 */ {I_VCMPLTPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1332, IF_AVX|IF_SANDYBRIDGE},
- /* 1967 */ {I_VCMPLTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1341, IF_AVX|IF_SANDYBRIDGE},
- /* 1968 */ {I_VCMPLE_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1350, IF_AVX|IF_SANDYBRIDGE},
- /* 1969 */ {I_VCMPLE_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1359, IF_AVX|IF_SANDYBRIDGE},
- /* 1970 */ {I_VCMPLE_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1368, IF_AVX|IF_SANDYBRIDGE},
- /* 1971 */ {I_VCMPLE_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1377, IF_AVX|IF_SANDYBRIDGE},
- /* 1972 */ {I_VCMPLEPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1350, IF_AVX|IF_SANDYBRIDGE},
- /* 1973 */ {I_VCMPLEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1359, IF_AVX|IF_SANDYBRIDGE},
- /* 1974 */ {I_VCMPLEPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1368, IF_AVX|IF_SANDYBRIDGE},
- /* 1975 */ {I_VCMPLEPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1377, IF_AVX|IF_SANDYBRIDGE},
- /* 1976 */ {I_VCMPUNORD_QPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1386, IF_AVX|IF_SANDYBRIDGE},
- /* 1977 */ {I_VCMPUNORD_QPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1395, IF_AVX|IF_SANDYBRIDGE},
- /* 1978 */ {I_VCMPUNORD_QPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1404, IF_AVX|IF_SANDYBRIDGE},
- /* 1979 */ {I_VCMPUNORD_QPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1413, IF_AVX|IF_SANDYBRIDGE},
- /* 1980 */ {I_VCMPUNORDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1386, IF_AVX|IF_SANDYBRIDGE},
- /* 1981 */ {I_VCMPUNORDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1395, IF_AVX|IF_SANDYBRIDGE},
- /* 1982 */ {I_VCMPUNORDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1404, IF_AVX|IF_SANDYBRIDGE},
- /* 1983 */ {I_VCMPUNORDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1413, IF_AVX|IF_SANDYBRIDGE},
- /* 1984 */ {I_VCMPNEQ_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1422, IF_AVX|IF_SANDYBRIDGE},
- /* 1985 */ {I_VCMPNEQ_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1431, IF_AVX|IF_SANDYBRIDGE},
- /* 1986 */ {I_VCMPNEQ_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1440, IF_AVX|IF_SANDYBRIDGE},
- /* 1987 */ {I_VCMPNEQ_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1449, IF_AVX|IF_SANDYBRIDGE},
- /* 1988 */ {I_VCMPNEQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1422, IF_AVX|IF_SANDYBRIDGE},
- /* 1989 */ {I_VCMPNEQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1431, IF_AVX|IF_SANDYBRIDGE},
- /* 1990 */ {I_VCMPNEQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1440, IF_AVX|IF_SANDYBRIDGE},
- /* 1991 */ {I_VCMPNEQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1449, IF_AVX|IF_SANDYBRIDGE},
- /* 1992 */ {I_VCMPNLT_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1458, IF_AVX|IF_SANDYBRIDGE},
- /* 1993 */ {I_VCMPNLT_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1467, IF_AVX|IF_SANDYBRIDGE},
- /* 1994 */ {I_VCMPNLT_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1476, IF_AVX|IF_SANDYBRIDGE},
- /* 1995 */ {I_VCMPNLT_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1485, IF_AVX|IF_SANDYBRIDGE},
- /* 1996 */ {I_VCMPNLTPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1458, IF_AVX|IF_SANDYBRIDGE},
- /* 1997 */ {I_VCMPNLTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1467, IF_AVX|IF_SANDYBRIDGE},
- /* 1998 */ {I_VCMPNLTPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1476, IF_AVX|IF_SANDYBRIDGE},
- /* 1999 */ {I_VCMPNLTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1485, IF_AVX|IF_SANDYBRIDGE},
- /* 2000 */ {I_VCMPNLE_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1494, IF_AVX|IF_SANDYBRIDGE},
- /* 2001 */ {I_VCMPNLE_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1503, IF_AVX|IF_SANDYBRIDGE},
- /* 2002 */ {I_VCMPNLE_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1512, IF_AVX|IF_SANDYBRIDGE},
- /* 2003 */ {I_VCMPNLE_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1521, IF_AVX|IF_SANDYBRIDGE},
- /* 2004 */ {I_VCMPNLEPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1494, IF_AVX|IF_SANDYBRIDGE},
- /* 2005 */ {I_VCMPNLEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1503, IF_AVX|IF_SANDYBRIDGE},
- /* 2006 */ {I_VCMPNLEPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1512, IF_AVX|IF_SANDYBRIDGE},
- /* 2007 */ {I_VCMPNLEPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1521, IF_AVX|IF_SANDYBRIDGE},
- /* 2008 */ {I_VCMPORD_QPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1530, IF_AVX|IF_SANDYBRIDGE},
- /* 2009 */ {I_VCMPORD_QPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1539, IF_AVX|IF_SANDYBRIDGE},
- /* 2010 */ {I_VCMPORD_QPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1548, IF_AVX|IF_SANDYBRIDGE},
- /* 2011 */ {I_VCMPORD_QPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1557, IF_AVX|IF_SANDYBRIDGE},
- /* 2012 */ {I_VCMPORDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1530, IF_AVX|IF_SANDYBRIDGE},
- /* 2013 */ {I_VCMPORDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1539, IF_AVX|IF_SANDYBRIDGE},
- /* 2014 */ {I_VCMPORDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1548, IF_AVX|IF_SANDYBRIDGE},
- /* 2015 */ {I_VCMPORDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1557, IF_AVX|IF_SANDYBRIDGE},
- /* 2016 */ {I_VCMPEQ_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1566, IF_AVX|IF_SANDYBRIDGE},
- /* 2017 */ {I_VCMPEQ_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1575, IF_AVX|IF_SANDYBRIDGE},
- /* 2018 */ {I_VCMPEQ_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1584, IF_AVX|IF_SANDYBRIDGE},
- /* 2019 */ {I_VCMPEQ_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1593, IF_AVX|IF_SANDYBRIDGE},
- /* 2020 */ {I_VCMPNGE_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1602, IF_AVX|IF_SANDYBRIDGE},
- /* 2021 */ {I_VCMPNGE_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1611, IF_AVX|IF_SANDYBRIDGE},
- /* 2022 */ {I_VCMPNGE_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1620, IF_AVX|IF_SANDYBRIDGE},
- /* 2023 */ {I_VCMPNGE_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1629, IF_AVX|IF_SANDYBRIDGE},
- /* 2024 */ {I_VCMPNGEPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1602, IF_AVX|IF_SANDYBRIDGE},
- /* 2025 */ {I_VCMPNGEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1611, IF_AVX|IF_SANDYBRIDGE},
- /* 2026 */ {I_VCMPNGEPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1620, IF_AVX|IF_SANDYBRIDGE},
- /* 2027 */ {I_VCMPNGEPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1629, IF_AVX|IF_SANDYBRIDGE},
- /* 2028 */ {I_VCMPNGT_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1638, IF_AVX|IF_SANDYBRIDGE},
- /* 2029 */ {I_VCMPNGT_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1647, IF_AVX|IF_SANDYBRIDGE},
- /* 2030 */ {I_VCMPNGT_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1656, IF_AVX|IF_SANDYBRIDGE},
- /* 2031 */ {I_VCMPNGT_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1665, IF_AVX|IF_SANDYBRIDGE},
- /* 2032 */ {I_VCMPNGTPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1638, IF_AVX|IF_SANDYBRIDGE},
- /* 2033 */ {I_VCMPNGTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1647, IF_AVX|IF_SANDYBRIDGE},
- /* 2034 */ {I_VCMPNGTPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1656, IF_AVX|IF_SANDYBRIDGE},
- /* 2035 */ {I_VCMPNGTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1665, IF_AVX|IF_SANDYBRIDGE},
- /* 2036 */ {I_VCMPFALSE_OQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1674, IF_AVX|IF_SANDYBRIDGE},
- /* 2037 */ {I_VCMPFALSE_OQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1683, IF_AVX|IF_SANDYBRIDGE},
- /* 2038 */ {I_VCMPFALSE_OQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1692, IF_AVX|IF_SANDYBRIDGE},
- /* 2039 */ {I_VCMPFALSE_OQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1701, IF_AVX|IF_SANDYBRIDGE},
- /* 2040 */ {I_VCMPFALSEPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1674, IF_AVX|IF_SANDYBRIDGE},
- /* 2041 */ {I_VCMPFALSEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1683, IF_AVX|IF_SANDYBRIDGE},
- /* 2042 */ {I_VCMPFALSEPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1692, IF_AVX|IF_SANDYBRIDGE},
- /* 2043 */ {I_VCMPFALSEPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1701, IF_AVX|IF_SANDYBRIDGE},
- /* 2044 */ {I_VCMPNEQ_OQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1710, IF_AVX|IF_SANDYBRIDGE},
- /* 2045 */ {I_VCMPNEQ_OQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1719, IF_AVX|IF_SANDYBRIDGE},
- /* 2046 */ {I_VCMPNEQ_OQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1728, IF_AVX|IF_SANDYBRIDGE},
- /* 2047 */ {I_VCMPNEQ_OQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1737, IF_AVX|IF_SANDYBRIDGE},
- /* 2048 */ {I_VCMPGE_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1746, IF_AVX|IF_SANDYBRIDGE},
- /* 2049 */ {I_VCMPGE_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1755, IF_AVX|IF_SANDYBRIDGE},
- /* 2050 */ {I_VCMPGE_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1764, IF_AVX|IF_SANDYBRIDGE},
- /* 2051 */ {I_VCMPGE_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1773, IF_AVX|IF_SANDYBRIDGE},
- /* 2052 */ {I_VCMPGEPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1746, IF_AVX|IF_SANDYBRIDGE},
- /* 2053 */ {I_VCMPGEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1755, IF_AVX|IF_SANDYBRIDGE},
- /* 2054 */ {I_VCMPGEPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1764, IF_AVX|IF_SANDYBRIDGE},
- /* 2055 */ {I_VCMPGEPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1773, IF_AVX|IF_SANDYBRIDGE},
- /* 2056 */ {I_VCMPGT_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1782, IF_AVX|IF_SANDYBRIDGE},
- /* 2057 */ {I_VCMPGT_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1791, IF_AVX|IF_SANDYBRIDGE},
- /* 2058 */ {I_VCMPGT_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1800, IF_AVX|IF_SANDYBRIDGE},
- /* 2059 */ {I_VCMPGT_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1809, IF_AVX|IF_SANDYBRIDGE},
- /* 2060 */ {I_VCMPGTPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1782, IF_AVX|IF_SANDYBRIDGE},
- /* 2061 */ {I_VCMPGTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1791, IF_AVX|IF_SANDYBRIDGE},
- /* 2062 */ {I_VCMPGTPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1800, IF_AVX|IF_SANDYBRIDGE},
- /* 2063 */ {I_VCMPGTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1809, IF_AVX|IF_SANDYBRIDGE},
- /* 2064 */ {I_VCMPTRUE_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1818, IF_AVX|IF_SANDYBRIDGE},
- /* 2065 */ {I_VCMPTRUE_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1827, IF_AVX|IF_SANDYBRIDGE},
- /* 2066 */ {I_VCMPTRUE_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1836, IF_AVX|IF_SANDYBRIDGE},
- /* 2067 */ {I_VCMPTRUE_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1845, IF_AVX|IF_SANDYBRIDGE},
- /* 2068 */ {I_VCMPTRUEPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1818, IF_AVX|IF_SANDYBRIDGE},
- /* 2069 */ {I_VCMPTRUEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1827, IF_AVX|IF_SANDYBRIDGE},
- /* 2070 */ {I_VCMPTRUEPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1836, IF_AVX|IF_SANDYBRIDGE},
- /* 2071 */ {I_VCMPTRUEPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1845, IF_AVX|IF_SANDYBRIDGE},
- /* 2072 */ {I_VCMPEQ_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1854, IF_AVX|IF_SANDYBRIDGE},
- /* 2073 */ {I_VCMPEQ_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1863, IF_AVX|IF_SANDYBRIDGE},
- /* 2074 */ {I_VCMPEQ_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1872, IF_AVX|IF_SANDYBRIDGE},
- /* 2075 */ {I_VCMPEQ_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1881, IF_AVX|IF_SANDYBRIDGE},
- /* 2076 */ {I_VCMPLT_OQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1890, IF_AVX|IF_SANDYBRIDGE},
- /* 2077 */ {I_VCMPLT_OQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1899, IF_AVX|IF_SANDYBRIDGE},
- /* 2078 */ {I_VCMPLT_OQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1908, IF_AVX|IF_SANDYBRIDGE},
- /* 2079 */ {I_VCMPLT_OQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1917, IF_AVX|IF_SANDYBRIDGE},
- /* 2080 */ {I_VCMPLE_OQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1926, IF_AVX|IF_SANDYBRIDGE},
- /* 2081 */ {I_VCMPLE_OQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1935, IF_AVX|IF_SANDYBRIDGE},
- /* 2082 */ {I_VCMPLE_OQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1944, IF_AVX|IF_SANDYBRIDGE},
- /* 2083 */ {I_VCMPLE_OQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1953, IF_AVX|IF_SANDYBRIDGE},
- /* 2084 */ {I_VCMPUNORD_SPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1962, IF_AVX|IF_SANDYBRIDGE},
- /* 2085 */ {I_VCMPUNORD_SPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1971, IF_AVX|IF_SANDYBRIDGE},
- /* 2086 */ {I_VCMPUNORD_SPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1980, IF_AVX|IF_SANDYBRIDGE},
- /* 2087 */ {I_VCMPUNORD_SPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1989, IF_AVX|IF_SANDYBRIDGE},
- /* 2088 */ {I_VCMPNEQ_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1998, IF_AVX|IF_SANDYBRIDGE},
- /* 2089 */ {I_VCMPNEQ_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2007, IF_AVX|IF_SANDYBRIDGE},
- /* 2090 */ {I_VCMPNEQ_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2016, IF_AVX|IF_SANDYBRIDGE},
- /* 2091 */ {I_VCMPNEQ_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2025, IF_AVX|IF_SANDYBRIDGE},
- /* 2092 */ {I_VCMPNLT_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2034, IF_AVX|IF_SANDYBRIDGE},
- /* 2093 */ {I_VCMPNLT_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2043, IF_AVX|IF_SANDYBRIDGE},
- /* 2094 */ {I_VCMPNLT_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2052, IF_AVX|IF_SANDYBRIDGE},
- /* 2095 */ {I_VCMPNLT_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2061, IF_AVX|IF_SANDYBRIDGE},
- /* 2096 */ {I_VCMPNLE_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2070, IF_AVX|IF_SANDYBRIDGE},
- /* 2097 */ {I_VCMPNLE_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2079, IF_AVX|IF_SANDYBRIDGE},
- /* 2098 */ {I_VCMPNLE_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2088, IF_AVX|IF_SANDYBRIDGE},
- /* 2099 */ {I_VCMPNLE_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2097, IF_AVX|IF_SANDYBRIDGE},
- /* 2100 */ {I_VCMPORD_SPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2106, IF_AVX|IF_SANDYBRIDGE},
- /* 2101 */ {I_VCMPORD_SPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2115, IF_AVX|IF_SANDYBRIDGE},
- /* 2102 */ {I_VCMPORD_SPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2124, IF_AVX|IF_SANDYBRIDGE},
- /* 2103 */ {I_VCMPORD_SPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2133, IF_AVX|IF_SANDYBRIDGE},
- /* 2104 */ {I_VCMPEQ_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2142, IF_AVX|IF_SANDYBRIDGE},
- /* 2105 */ {I_VCMPEQ_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2151, IF_AVX|IF_SANDYBRIDGE},
- /* 2106 */ {I_VCMPEQ_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2160, IF_AVX|IF_SANDYBRIDGE},
- /* 2107 */ {I_VCMPEQ_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2169, IF_AVX|IF_SANDYBRIDGE},
- /* 2108 */ {I_VCMPNGE_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2178, IF_AVX|IF_SANDYBRIDGE},
- /* 2109 */ {I_VCMPNGE_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2187, IF_AVX|IF_SANDYBRIDGE},
- /* 2110 */ {I_VCMPNGE_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2196, IF_AVX|IF_SANDYBRIDGE},
- /* 2111 */ {I_VCMPNGE_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2205, IF_AVX|IF_SANDYBRIDGE},
- /* 2112 */ {I_VCMPNGT_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2214, IF_AVX|IF_SANDYBRIDGE},
- /* 2113 */ {I_VCMPNGT_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2223, IF_AVX|IF_SANDYBRIDGE},
- /* 2114 */ {I_VCMPNGT_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2232, IF_AVX|IF_SANDYBRIDGE},
- /* 2115 */ {I_VCMPNGT_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2241, IF_AVX|IF_SANDYBRIDGE},
- /* 2116 */ {I_VCMPFALSE_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2250, IF_AVX|IF_SANDYBRIDGE},
- /* 2117 */ {I_VCMPFALSE_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2259, IF_AVX|IF_SANDYBRIDGE},
- /* 2118 */ {I_VCMPFALSE_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2268, IF_AVX|IF_SANDYBRIDGE},
- /* 2119 */ {I_VCMPFALSE_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2277, IF_AVX|IF_SANDYBRIDGE},
- /* 2120 */ {I_VCMPNEQ_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2286, IF_AVX|IF_SANDYBRIDGE},
- /* 2121 */ {I_VCMPNEQ_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2295, IF_AVX|IF_SANDYBRIDGE},
- /* 2122 */ {I_VCMPNEQ_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2304, IF_AVX|IF_SANDYBRIDGE},
- /* 2123 */ {I_VCMPNEQ_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2313, IF_AVX|IF_SANDYBRIDGE},
- /* 2124 */ {I_VCMPGE_OQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2322, IF_AVX|IF_SANDYBRIDGE},
- /* 2125 */ {I_VCMPGE_OQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2331, IF_AVX|IF_SANDYBRIDGE},
- /* 2126 */ {I_VCMPGE_OQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2340, IF_AVX|IF_SANDYBRIDGE},
- /* 2127 */ {I_VCMPGE_OQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2349, IF_AVX|IF_SANDYBRIDGE},
- /* 2128 */ {I_VCMPGT_OQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2358, IF_AVX|IF_SANDYBRIDGE},
- /* 2129 */ {I_VCMPGT_OQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2367, IF_AVX|IF_SANDYBRIDGE},
- /* 2130 */ {I_VCMPGT_OQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2376, IF_AVX|IF_SANDYBRIDGE},
- /* 2131 */ {I_VCMPGT_OQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2385, IF_AVX|IF_SANDYBRIDGE},
- /* 2132 */ {I_VCMPTRUE_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2394, IF_AVX|IF_SANDYBRIDGE},
- /* 2133 */ {I_VCMPTRUE_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2403, IF_AVX|IF_SANDYBRIDGE},
- /* 2134 */ {I_VCMPTRUE_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2412, IF_AVX|IF_SANDYBRIDGE},
- /* 2135 */ {I_VCMPTRUE_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2421, IF_AVX|IF_SANDYBRIDGE},
- /* 2136 */ {I_VCMPPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+5968, IF_AVX|IF_SANDYBRIDGE},
- /* 2137 */ {I_VCMPPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5976, IF_AVX|IF_SANDYBRIDGE},
- /* 2138 */ {I_VCMPPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+5984, IF_AVX|IF_SANDYBRIDGE},
- /* 2139 */ {I_VCMPPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5992, IF_AVX|IF_SANDYBRIDGE},
- /* 2140 */ {I_VCMPEQ_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2430, IF_AVX|IF_SANDYBRIDGE},
- /* 2141 */ {I_VCMPEQ_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2439, IF_AVX|IF_SANDYBRIDGE},
- /* 2142 */ {I_VCMPEQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2430, IF_AVX|IF_SANDYBRIDGE},
- /* 2143 */ {I_VCMPEQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2439, IF_AVX|IF_SANDYBRIDGE},
- /* 2144 */ {I_VCMPLT_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2448, IF_AVX|IF_SANDYBRIDGE},
- /* 2145 */ {I_VCMPLT_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2457, IF_AVX|IF_SANDYBRIDGE},
- /* 2146 */ {I_VCMPLTSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2448, IF_AVX|IF_SANDYBRIDGE},
- /* 2147 */ {I_VCMPLTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2457, IF_AVX|IF_SANDYBRIDGE},
- /* 2148 */ {I_VCMPLE_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2466, IF_AVX|IF_SANDYBRIDGE},
- /* 2149 */ {I_VCMPLE_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2475, IF_AVX|IF_SANDYBRIDGE},
- /* 2150 */ {I_VCMPLESD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2466, IF_AVX|IF_SANDYBRIDGE},
- /* 2151 */ {I_VCMPLESD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2475, IF_AVX|IF_SANDYBRIDGE},
- /* 2152 */ {I_VCMPUNORD_QSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2484, IF_AVX|IF_SANDYBRIDGE},
- /* 2153 */ {I_VCMPUNORD_QSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2493, IF_AVX|IF_SANDYBRIDGE},
- /* 2154 */ {I_VCMPUNORDSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2484, IF_AVX|IF_SANDYBRIDGE},
- /* 2155 */ {I_VCMPUNORDSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2493, IF_AVX|IF_SANDYBRIDGE},
- /* 2156 */ {I_VCMPNEQ_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2502, IF_AVX|IF_SANDYBRIDGE},
- /* 2157 */ {I_VCMPNEQ_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2511, IF_AVX|IF_SANDYBRIDGE},
- /* 2158 */ {I_VCMPNEQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2502, IF_AVX|IF_SANDYBRIDGE},
- /* 2159 */ {I_VCMPNEQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2511, IF_AVX|IF_SANDYBRIDGE},
- /* 2160 */ {I_VCMPNLT_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2520, IF_AVX|IF_SANDYBRIDGE},
- /* 2161 */ {I_VCMPNLT_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2529, IF_AVX|IF_SANDYBRIDGE},
- /* 2162 */ {I_VCMPNLTSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2520, IF_AVX|IF_SANDYBRIDGE},
- /* 2163 */ {I_VCMPNLTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2529, IF_AVX|IF_SANDYBRIDGE},
- /* 2164 */ {I_VCMPNLE_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2538, IF_AVX|IF_SANDYBRIDGE},
- /* 2165 */ {I_VCMPNLE_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2547, IF_AVX|IF_SANDYBRIDGE},
- /* 2166 */ {I_VCMPNLESD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2538, IF_AVX|IF_SANDYBRIDGE},
- /* 2167 */ {I_VCMPNLESD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2547, IF_AVX|IF_SANDYBRIDGE},
- /* 2168 */ {I_VCMPORD_QSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2556, IF_AVX|IF_SANDYBRIDGE},
- /* 2169 */ {I_VCMPORD_QSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2565, IF_AVX|IF_SANDYBRIDGE},
- /* 2170 */ {I_VCMPORDSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2556, IF_AVX|IF_SANDYBRIDGE},
- /* 2171 */ {I_VCMPORDSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2565, IF_AVX|IF_SANDYBRIDGE},
- /* 2172 */ {I_VCMPEQ_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2574, IF_AVX|IF_SANDYBRIDGE},
- /* 2173 */ {I_VCMPEQ_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2583, IF_AVX|IF_SANDYBRIDGE},
- /* 2174 */ {I_VCMPNGE_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2592, IF_AVX|IF_SANDYBRIDGE},
- /* 2175 */ {I_VCMPNGE_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2601, IF_AVX|IF_SANDYBRIDGE},
- /* 2176 */ {I_VCMPNGESD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2592, IF_AVX|IF_SANDYBRIDGE},
- /* 2177 */ {I_VCMPNGESD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2601, IF_AVX|IF_SANDYBRIDGE},
- /* 2178 */ {I_VCMPNGT_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2610, IF_AVX|IF_SANDYBRIDGE},
- /* 2179 */ {I_VCMPNGT_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2619, IF_AVX|IF_SANDYBRIDGE},
- /* 2180 */ {I_VCMPNGTSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2610, IF_AVX|IF_SANDYBRIDGE},
- /* 2181 */ {I_VCMPNGTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2619, IF_AVX|IF_SANDYBRIDGE},
- /* 2182 */ {I_VCMPFALSE_OQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2628, IF_AVX|IF_SANDYBRIDGE},
- /* 2183 */ {I_VCMPFALSE_OQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2637, IF_AVX|IF_SANDYBRIDGE},
- /* 2184 */ {I_VCMPFALSESD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2628, IF_AVX|IF_SANDYBRIDGE},
- /* 2185 */ {I_VCMPFALSESD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2637, IF_AVX|IF_SANDYBRIDGE},
- /* 2186 */ {I_VCMPNEQ_OQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2646, IF_AVX|IF_SANDYBRIDGE},
- /* 2187 */ {I_VCMPNEQ_OQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2655, IF_AVX|IF_SANDYBRIDGE},
- /* 2188 */ {I_VCMPGE_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2664, IF_AVX|IF_SANDYBRIDGE},
- /* 2189 */ {I_VCMPGE_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2673, IF_AVX|IF_SANDYBRIDGE},
- /* 2190 */ {I_VCMPGESD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2664, IF_AVX|IF_SANDYBRIDGE},
- /* 2191 */ {I_VCMPGESD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2673, IF_AVX|IF_SANDYBRIDGE},
- /* 2192 */ {I_VCMPGT_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2682, IF_AVX|IF_SANDYBRIDGE},
- /* 2193 */ {I_VCMPGT_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2691, IF_AVX|IF_SANDYBRIDGE},
- /* 2194 */ {I_VCMPGTSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2682, IF_AVX|IF_SANDYBRIDGE},
- /* 2195 */ {I_VCMPGTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2691, IF_AVX|IF_SANDYBRIDGE},
- /* 2196 */ {I_VCMPTRUE_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2700, IF_AVX|IF_SANDYBRIDGE},
- /* 2197 */ {I_VCMPTRUE_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2709, IF_AVX|IF_SANDYBRIDGE},
- /* 2198 */ {I_VCMPTRUESD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2700, IF_AVX|IF_SANDYBRIDGE},
- /* 2199 */ {I_VCMPTRUESD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2709, IF_AVX|IF_SANDYBRIDGE},
- /* 2200 */ {I_VCMPEQ_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2718, IF_AVX|IF_SANDYBRIDGE},
- /* 2201 */ {I_VCMPEQ_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2727, IF_AVX|IF_SANDYBRIDGE},
- /* 2202 */ {I_VCMPLT_OQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2736, IF_AVX|IF_SANDYBRIDGE},
- /* 2203 */ {I_VCMPLT_OQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2745, IF_AVX|IF_SANDYBRIDGE},
- /* 2204 */ {I_VCMPLE_OQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2754, IF_AVX|IF_SANDYBRIDGE},
- /* 2205 */ {I_VCMPLE_OQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2763, IF_AVX|IF_SANDYBRIDGE},
- /* 2206 */ {I_VCMPUNORD_SSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2772, IF_AVX|IF_SANDYBRIDGE},
- /* 2207 */ {I_VCMPUNORD_SSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2781, IF_AVX|IF_SANDYBRIDGE},
- /* 2208 */ {I_VCMPNEQ_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2790, IF_AVX|IF_SANDYBRIDGE},
- /* 2209 */ {I_VCMPNEQ_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2799, IF_AVX|IF_SANDYBRIDGE},
- /* 2210 */ {I_VCMPNLT_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2808, IF_AVX|IF_SANDYBRIDGE},
- /* 2211 */ {I_VCMPNLT_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2817, IF_AVX|IF_SANDYBRIDGE},
- /* 2212 */ {I_VCMPNLE_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2826, IF_AVX|IF_SANDYBRIDGE},
- /* 2213 */ {I_VCMPNLE_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2835, IF_AVX|IF_SANDYBRIDGE},
- /* 2214 */ {I_VCMPORD_SSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2844, IF_AVX|IF_SANDYBRIDGE},
- /* 2215 */ {I_VCMPORD_SSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2853, IF_AVX|IF_SANDYBRIDGE},
- /* 2216 */ {I_VCMPEQ_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2862, IF_AVX|IF_SANDYBRIDGE},
- /* 2217 */ {I_VCMPEQ_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2871, IF_AVX|IF_SANDYBRIDGE},
- /* 2218 */ {I_VCMPNGE_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2880, IF_AVX|IF_SANDYBRIDGE},
- /* 2219 */ {I_VCMPNGE_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2889, IF_AVX|IF_SANDYBRIDGE},
- /* 2220 */ {I_VCMPNGT_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2898, IF_AVX|IF_SANDYBRIDGE},
- /* 2221 */ {I_VCMPNGT_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2907, IF_AVX|IF_SANDYBRIDGE},
- /* 2222 */ {I_VCMPFALSE_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2916, IF_AVX|IF_SANDYBRIDGE},
- /* 2223 */ {I_VCMPFALSE_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2925, IF_AVX|IF_SANDYBRIDGE},
- /* 2224 */ {I_VCMPNEQ_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2934, IF_AVX|IF_SANDYBRIDGE},
- /* 2225 */ {I_VCMPNEQ_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2943, IF_AVX|IF_SANDYBRIDGE},
- /* 2226 */ {I_VCMPGE_OQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2952, IF_AVX|IF_SANDYBRIDGE},
- /* 2227 */ {I_VCMPGE_OQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2961, IF_AVX|IF_SANDYBRIDGE},
- /* 2228 */ {I_VCMPGT_OQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2970, IF_AVX|IF_SANDYBRIDGE},
- /* 2229 */ {I_VCMPGT_OQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2979, IF_AVX|IF_SANDYBRIDGE},
- /* 2230 */ {I_VCMPTRUE_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2988, IF_AVX|IF_SANDYBRIDGE},
- /* 2231 */ {I_VCMPTRUE_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2997, IF_AVX|IF_SANDYBRIDGE},
- /* 2232 */ {I_VCMPSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, nasm_bytecodes+6000, IF_AVX|IF_SANDYBRIDGE},
- /* 2233 */ {I_VCMPSD, 3, {XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6008, IF_AVX|IF_SANDYBRIDGE},
- /* 2234 */ {I_VCMPEQ_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3006, IF_AVX|IF_SANDYBRIDGE},
- /* 2235 */ {I_VCMPEQ_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3015, IF_AVX|IF_SANDYBRIDGE},
- /* 2236 */ {I_VCMPEQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3006, IF_AVX|IF_SANDYBRIDGE},
- /* 2237 */ {I_VCMPEQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3015, IF_AVX|IF_SANDYBRIDGE},
- /* 2238 */ {I_VCMPLT_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3024, IF_AVX|IF_SANDYBRIDGE},
- /* 2239 */ {I_VCMPLT_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3033, IF_AVX|IF_SANDYBRIDGE},
- /* 2240 */ {I_VCMPLTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3024, IF_AVX|IF_SANDYBRIDGE},
- /* 2241 */ {I_VCMPLTSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3033, IF_AVX|IF_SANDYBRIDGE},
- /* 2242 */ {I_VCMPLE_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3042, IF_AVX|IF_SANDYBRIDGE},
- /* 2243 */ {I_VCMPLE_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3051, IF_AVX|IF_SANDYBRIDGE},
- /* 2244 */ {I_VCMPLESS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3042, IF_AVX|IF_SANDYBRIDGE},
- /* 2245 */ {I_VCMPLESS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3051, IF_AVX|IF_SANDYBRIDGE},
- /* 2246 */ {I_VCMPUNORD_QSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3060, IF_AVX|IF_SANDYBRIDGE},
- /* 2247 */ {I_VCMPUNORD_QSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3069, IF_AVX|IF_SANDYBRIDGE},
- /* 2248 */ {I_VCMPUNORDSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3060, IF_AVX|IF_SANDYBRIDGE},
- /* 2249 */ {I_VCMPUNORDSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3069, IF_AVX|IF_SANDYBRIDGE},
- /* 2250 */ {I_VCMPNEQ_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3078, IF_AVX|IF_SANDYBRIDGE},
- /* 2251 */ {I_VCMPNEQ_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3087, IF_AVX|IF_SANDYBRIDGE},
- /* 2252 */ {I_VCMPNEQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3078, IF_AVX|IF_SANDYBRIDGE},
- /* 2253 */ {I_VCMPNEQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3087, IF_AVX|IF_SANDYBRIDGE},
- /* 2254 */ {I_VCMPNLT_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3096, IF_AVX|IF_SANDYBRIDGE},
- /* 2255 */ {I_VCMPNLT_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3105, IF_AVX|IF_SANDYBRIDGE},
- /* 2256 */ {I_VCMPNLTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3096, IF_AVX|IF_SANDYBRIDGE},
- /* 2257 */ {I_VCMPNLTSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3105, IF_AVX|IF_SANDYBRIDGE},
- /* 2258 */ {I_VCMPNLE_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3114, IF_AVX|IF_SANDYBRIDGE},
- /* 2259 */ {I_VCMPNLE_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3123, IF_AVX|IF_SANDYBRIDGE},
- /* 2260 */ {I_VCMPNLESS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3114, IF_AVX|IF_SANDYBRIDGE},
- /* 2261 */ {I_VCMPNLESS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3123, IF_AVX|IF_SANDYBRIDGE},
- /* 2262 */ {I_VCMPORD_QSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3132, IF_AVX|IF_SANDYBRIDGE},
- /* 2263 */ {I_VCMPORD_QSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3141, IF_AVX|IF_SANDYBRIDGE},
- /* 2264 */ {I_VCMPORDSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3132, IF_AVX|IF_SANDYBRIDGE},
- /* 2265 */ {I_VCMPORDSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3141, IF_AVX|IF_SANDYBRIDGE},
- /* 2266 */ {I_VCMPEQ_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3150, IF_AVX|IF_SANDYBRIDGE},
- /* 2267 */ {I_VCMPEQ_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3159, IF_AVX|IF_SANDYBRIDGE},
- /* 2268 */ {I_VCMPNGE_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3168, IF_AVX|IF_SANDYBRIDGE},
- /* 2269 */ {I_VCMPNGE_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3177, IF_AVX|IF_SANDYBRIDGE},
- /* 2270 */ {I_VCMPNGESS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3168, IF_AVX|IF_SANDYBRIDGE},
- /* 2271 */ {I_VCMPNGESS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3177, IF_AVX|IF_SANDYBRIDGE},
- /* 2272 */ {I_VCMPNGT_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3186, IF_AVX|IF_SANDYBRIDGE},
- /* 2273 */ {I_VCMPNGT_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3195, IF_AVX|IF_SANDYBRIDGE},
- /* 2274 */ {I_VCMPNGTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3186, IF_AVX|IF_SANDYBRIDGE},
- /* 2275 */ {I_VCMPNGTSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3195, IF_AVX|IF_SANDYBRIDGE},
- /* 2276 */ {I_VCMPFALSE_OQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3204, IF_AVX|IF_SANDYBRIDGE},
- /* 2277 */ {I_VCMPFALSE_OQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3213, IF_AVX|IF_SANDYBRIDGE},
- /* 2278 */ {I_VCMPFALSESS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3204, IF_AVX|IF_SANDYBRIDGE},
- /* 2279 */ {I_VCMPFALSESS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3213, IF_AVX|IF_SANDYBRIDGE},
- /* 2280 */ {I_VCMPNEQ_OQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3222, IF_AVX|IF_SANDYBRIDGE},
- /* 2281 */ {I_VCMPNEQ_OQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3231, IF_AVX|IF_SANDYBRIDGE},
- /* 2282 */ {I_VCMPGE_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3240, IF_AVX|IF_SANDYBRIDGE},
- /* 2283 */ {I_VCMPGE_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3249, IF_AVX|IF_SANDYBRIDGE},
- /* 2284 */ {I_VCMPGESS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3240, IF_AVX|IF_SANDYBRIDGE},
- /* 2285 */ {I_VCMPGESS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3249, IF_AVX|IF_SANDYBRIDGE},
- /* 2286 */ {I_VCMPGT_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3258, IF_AVX|IF_SANDYBRIDGE},
- /* 2287 */ {I_VCMPGT_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3267, IF_AVX|IF_SANDYBRIDGE},
- /* 2288 */ {I_VCMPGTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3258, IF_AVX|IF_SANDYBRIDGE},
- /* 2289 */ {I_VCMPGTSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3267, IF_AVX|IF_SANDYBRIDGE},
- /* 2290 */ {I_VCMPTRUE_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3276, IF_AVX|IF_SANDYBRIDGE},
- /* 2291 */ {I_VCMPTRUE_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3285, IF_AVX|IF_SANDYBRIDGE},
- /* 2292 */ {I_VCMPTRUESS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3276, IF_AVX|IF_SANDYBRIDGE},
- /* 2293 */ {I_VCMPTRUESS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3285, IF_AVX|IF_SANDYBRIDGE},
- /* 2294 */ {I_VCMPEQ_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3294, IF_AVX|IF_SANDYBRIDGE},
- /* 2295 */ {I_VCMPEQ_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3303, IF_AVX|IF_SANDYBRIDGE},
- /* 2296 */ {I_VCMPLT_OQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3312, IF_AVX|IF_SANDYBRIDGE},
- /* 2297 */ {I_VCMPLT_OQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3321, IF_AVX|IF_SANDYBRIDGE},
- /* 2298 */ {I_VCMPLE_OQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3330, IF_AVX|IF_SANDYBRIDGE},
- /* 2299 */ {I_VCMPLE_OQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3339, IF_AVX|IF_SANDYBRIDGE},
- /* 2300 */ {I_VCMPUNORD_SSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3348, IF_AVX|IF_SANDYBRIDGE},
- /* 2301 */ {I_VCMPUNORD_SSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3357, IF_AVX|IF_SANDYBRIDGE},
- /* 2302 */ {I_VCMPNEQ_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3366, IF_AVX|IF_SANDYBRIDGE},
- /* 2303 */ {I_VCMPNEQ_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3375, IF_AVX|IF_SANDYBRIDGE},
- /* 2304 */ {I_VCMPNLT_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3384, IF_AVX|IF_SANDYBRIDGE},
- /* 2305 */ {I_VCMPNLT_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3393, IF_AVX|IF_SANDYBRIDGE},
- /* 2306 */ {I_VCMPNLE_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3402, IF_AVX|IF_SANDYBRIDGE},
- /* 2307 */ {I_VCMPNLE_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3411, IF_AVX|IF_SANDYBRIDGE},
- /* 2308 */ {I_VCMPORD_SSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3420, IF_AVX|IF_SANDYBRIDGE},
- /* 2309 */ {I_VCMPORD_SSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3429, IF_AVX|IF_SANDYBRIDGE},
- /* 2310 */ {I_VCMPEQ_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3438, IF_AVX|IF_SANDYBRIDGE},
- /* 2311 */ {I_VCMPEQ_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3447, IF_AVX|IF_SANDYBRIDGE},
- /* 2312 */ {I_VCMPNGE_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3456, IF_AVX|IF_SANDYBRIDGE},
- /* 2313 */ {I_VCMPNGE_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3465, IF_AVX|IF_SANDYBRIDGE},
- /* 2314 */ {I_VCMPNGT_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3474, IF_AVX|IF_SANDYBRIDGE},
- /* 2315 */ {I_VCMPNGT_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3483, IF_AVX|IF_SANDYBRIDGE},
- /* 2316 */ {I_VCMPFALSE_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3492, IF_AVX|IF_SANDYBRIDGE},
- /* 2317 */ {I_VCMPFALSE_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3501, IF_AVX|IF_SANDYBRIDGE},
- /* 2318 */ {I_VCMPNEQ_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3510, IF_AVX|IF_SANDYBRIDGE},
- /* 2319 */ {I_VCMPNEQ_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3519, IF_AVX|IF_SANDYBRIDGE},
- /* 2320 */ {I_VCMPGE_OQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3528, IF_AVX|IF_SANDYBRIDGE},
- /* 2321 */ {I_VCMPGE_OQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3537, IF_AVX|IF_SANDYBRIDGE},
- /* 2322 */ {I_VCMPGT_OQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3546, IF_AVX|IF_SANDYBRIDGE},
- /* 2323 */ {I_VCMPGT_OQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3555, IF_AVX|IF_SANDYBRIDGE},
- /* 2324 */ {I_VCMPTRUE_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3564, IF_AVX|IF_SANDYBRIDGE},
- /* 2325 */ {I_VCMPTRUE_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3573, IF_AVX|IF_SANDYBRIDGE},
- /* 2326 */ {I_VCMPSS, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, nasm_bytecodes+6016, IF_AVX|IF_SANDYBRIDGE},
- /* 2327 */ {I_VCMPSS, 3, {XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6024, IF_AVX|IF_SANDYBRIDGE},
- /* 2328 */ {I_VCOMISD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+8775, IF_AVX|IF_SANDYBRIDGE},
- /* 2329 */ {I_VCOMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+8782, IF_AVX|IF_SANDYBRIDGE},
- /* 2330 */ {I_VCVTDQ2PD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+8789, IF_AVX|IF_SANDYBRIDGE},
- /* 2331 */ {I_VCVTDQ2PD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8796, IF_AVX|IF_SANDYBRIDGE},
- /* 2332 */ {I_VCVTDQ2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8803, IF_AVX|IF_SANDYBRIDGE},
- /* 2333 */ {I_VCVTDQ2PS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+8810, IF_AVX|IF_SANDYBRIDGE},
- /* 2334 */ {I_VCVTPD2DQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+8817, IF_AVX|IF_SANDYBRIDGE},
- /* 2335 */ {I_VCVTPD2DQ, 2, {XMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+8817, IF_AVX|IF_SANDYBRIDGE|IF_SO},
- /* 2336 */ {I_VCVTPD2DQ, 2, {XMMREG,YMMREG,0,0,0}, nasm_bytecodes+8824, IF_AVX|IF_SANDYBRIDGE},
- /* 2337 */ {I_VCVTPD2DQ, 2, {XMMREG,MEMORY|BITS256,0,0,0}, nasm_bytecodes+8824, IF_AVX|IF_SANDYBRIDGE|IF_SY},
- /* 2338 */ {I_VCVTPD2PS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+8831, IF_AVX|IF_SANDYBRIDGE},
- /* 2339 */ {I_VCVTPD2PS, 2, {XMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+8831, IF_AVX|IF_SANDYBRIDGE|IF_SO},
- /* 2340 */ {I_VCVTPD2PS, 2, {XMMREG,YMMREG,0,0,0}, nasm_bytecodes+8838, IF_AVX|IF_SANDYBRIDGE},
- /* 2341 */ {I_VCVTPD2PS, 2, {XMMREG,MEMORY|BITS256,0,0,0}, nasm_bytecodes+8838, IF_AVX|IF_SANDYBRIDGE|IF_SY},
- /* 2342 */ {I_VCVTPS2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8845, IF_AVX|IF_SANDYBRIDGE},
- /* 2343 */ {I_VCVTPS2DQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+8852, IF_AVX|IF_SANDYBRIDGE},
- /* 2344 */ {I_VCVTPS2PD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+8859, IF_AVX|IF_SANDYBRIDGE},
- /* 2345 */ {I_VCVTPS2PD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8866, IF_AVX|IF_SANDYBRIDGE},
- /* 2346 */ {I_VCVTSD2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+8873, IF_AVX|IF_SANDYBRIDGE},
- /* 2347 */ {I_VCVTSD2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+8880, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- /* 2348 */ {I_VCVTSD2SS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+8887, IF_AVX|IF_SANDYBRIDGE},
- /* 2349 */ {I_VCVTSD2SS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+8894, IF_AVX|IF_SANDYBRIDGE},
- /* 2350 */ {I_VCVTSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, nasm_bytecodes+8901, IF_AVX|IF_SANDYBRIDGE|IF_SD},
- /* 2351 */ {I_VCVTSI2SD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+8908, IF_AVX|IF_SANDYBRIDGE|IF_SD},
- /* 2352 */ {I_VCVTSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, nasm_bytecodes+8915, IF_AVX|IF_SANDYBRIDGE|IF_LONG|IF_SQ},
- /* 2353 */ {I_VCVTSI2SD, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+8922, IF_AVX|IF_SANDYBRIDGE|IF_LONG|IF_SQ},
- /* 2354 */ {I_VCVTSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, nasm_bytecodes+8929, IF_AVX|IF_SANDYBRIDGE|IF_SD},
- /* 2355 */ {I_VCVTSI2SS, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+8936, IF_AVX|IF_SANDYBRIDGE|IF_SD},
- /* 2356 */ {I_VCVTSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, nasm_bytecodes+8943, IF_AVX|IF_SANDYBRIDGE|IF_LONG|IF_SQ},
- /* 2357 */ {I_VCVTSI2SS, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+8950, IF_AVX|IF_SANDYBRIDGE|IF_LONG|IF_SQ},
- /* 2358 */ {I_VCVTSS2SD, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+8957, IF_AVX|IF_SANDYBRIDGE},
- /* 2359 */ {I_VCVTSS2SD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+8964, IF_AVX|IF_SANDYBRIDGE},
- /* 2360 */ {I_VCVTSS2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+8971, IF_AVX|IF_SANDYBRIDGE},
- /* 2361 */ {I_VCVTSS2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+8978, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- /* 2362 */ {I_VCVTTPD2DQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+8985, IF_AVX|IF_SANDYBRIDGE},
- /* 2363 */ {I_VCVTTPD2DQ, 2, {XMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+8985, IF_AVX|IF_SANDYBRIDGE|IF_SO},
- /* 2364 */ {I_VCVTTPD2DQ, 2, {XMMREG,YMMREG,0,0,0}, nasm_bytecodes+8992, IF_AVX|IF_SANDYBRIDGE},
- /* 2365 */ {I_VCVTTPD2DQ, 2, {XMMREG,MEMORY|BITS256,0,0,0}, nasm_bytecodes+8992, IF_AVX|IF_SANDYBRIDGE|IF_SY},
- /* 2366 */ {I_VCVTTPS2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+8999, IF_AVX|IF_SANDYBRIDGE},
- /* 2367 */ {I_VCVTTPS2DQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9006, IF_AVX|IF_SANDYBRIDGE},
- /* 2368 */ {I_VCVTTSD2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9013, IF_AVX|IF_SANDYBRIDGE},
- /* 2369 */ {I_VCVTTSD2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9020, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- /* 2370 */ {I_VCVTTSS2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9027, IF_AVX|IF_SANDYBRIDGE},
- /* 2371 */ {I_VCVTTSS2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9034, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- /* 2372 */ {I_VDIVPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9041, IF_AVX|IF_SANDYBRIDGE},
- /* 2373 */ {I_VDIVPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9048, IF_AVX|IF_SANDYBRIDGE},
- /* 2374 */ {I_VDIVPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9055, IF_AVX|IF_SANDYBRIDGE},
- /* 2375 */ {I_VDIVPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9062, IF_AVX|IF_SANDYBRIDGE},
- /* 2376 */ {I_VDIVPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9069, IF_AVX|IF_SANDYBRIDGE},
- /* 2377 */ {I_VDIVPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9076, IF_AVX|IF_SANDYBRIDGE},
- /* 2378 */ {I_VDIVPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9083, IF_AVX|IF_SANDYBRIDGE},
- /* 2379 */ {I_VDIVPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9090, IF_AVX|IF_SANDYBRIDGE},
- /* 2380 */ {I_VDIVSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+9097, IF_AVX|IF_SANDYBRIDGE},
- /* 2381 */ {I_VDIVSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9104, IF_AVX|IF_SANDYBRIDGE},
- /* 2382 */ {I_VDIVSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+9111, IF_AVX|IF_SANDYBRIDGE},
- /* 2383 */ {I_VDIVSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9118, IF_AVX|IF_SANDYBRIDGE},
- /* 2384 */ {I_VDPPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6032, IF_AVX|IF_SANDYBRIDGE},
- /* 2385 */ {I_VDPPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6040, IF_AVX|IF_SANDYBRIDGE},
- /* 2386 */ {I_VDPPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6048, IF_AVX|IF_SANDYBRIDGE},
- /* 2387 */ {I_VDPPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6056, IF_AVX|IF_SANDYBRIDGE},
- /* 2388 */ {I_VDPPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+6064, IF_AVX|IF_SANDYBRIDGE},
- /* 2389 */ {I_VDPPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6072, IF_AVX|IF_SANDYBRIDGE},
- /* 2390 */ {I_VEXTRACTF128, 3, {RM_XMM|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6080, IF_AVX|IF_SANDYBRIDGE},
- /* 2391 */ {I_VEXTRACTPS, 3, {RM_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6088, IF_AVX|IF_SANDYBRIDGE},
- /* 2392 */ {I_VHADDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9125, IF_AVX|IF_SANDYBRIDGE},
- /* 2393 */ {I_VHADDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9132, IF_AVX|IF_SANDYBRIDGE},
- /* 2394 */ {I_VHADDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9139, IF_AVX|IF_SANDYBRIDGE},
- /* 2395 */ {I_VHADDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9146, IF_AVX|IF_SANDYBRIDGE},
- /* 2396 */ {I_VHADDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9153, IF_AVX|IF_SANDYBRIDGE},
- /* 2397 */ {I_VHADDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9160, IF_AVX|IF_SANDYBRIDGE},
- /* 2398 */ {I_VHADDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9167, IF_AVX|IF_SANDYBRIDGE},
- /* 2399 */ {I_VHADDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9174, IF_AVX|IF_SANDYBRIDGE},
- /* 2400 */ {I_VHSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9181, IF_AVX|IF_SANDYBRIDGE},
- /* 2401 */ {I_VHSUBPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9188, IF_AVX|IF_SANDYBRIDGE},
- /* 2402 */ {I_VHSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9195, IF_AVX|IF_SANDYBRIDGE},
- /* 2403 */ {I_VHSUBPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9202, IF_AVX|IF_SANDYBRIDGE},
- /* 2404 */ {I_VHSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9209, IF_AVX|IF_SANDYBRIDGE},
- /* 2405 */ {I_VHSUBPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9216, IF_AVX|IF_SANDYBRIDGE},
- /* 2406 */ {I_VHSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9223, IF_AVX|IF_SANDYBRIDGE},
- /* 2407 */ {I_VHSUBPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9230, IF_AVX|IF_SANDYBRIDGE},
- /* 2408 */ {I_VINSERTF128, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6096, IF_AVX|IF_SANDYBRIDGE},
- /* 2409 */ {I_VINSERTPS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, nasm_bytecodes+6104, IF_AVX|IF_SANDYBRIDGE},
- /* 2410 */ {I_VINSERTPS, 3, {XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6112, IF_AVX|IF_SANDYBRIDGE},
- /* 2411 */ {I_VLDDQU, 2, {XMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+9237, IF_AVX|IF_SANDYBRIDGE},
- /* 2412 */ {I_VLDQQU, 2, {YMMREG,MEMORY|BITS256,0,0,0}, nasm_bytecodes+9244, IF_AVX|IF_SANDYBRIDGE},
- /* 2413 */ {I_VLDDQU, 2, {YMMREG,MEMORY|BITS256,0,0,0}, nasm_bytecodes+9244, IF_AVX|IF_SANDYBRIDGE},
- /* 2414 */ {I_VLDMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+9251, IF_AVX|IF_SANDYBRIDGE},
- /* 2415 */ {I_VMASKMOVDQU, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+9258, IF_AVX|IF_SANDYBRIDGE},
- /* 2416 */ {I_VMASKMOVPS, 3, {XMMREG,XMMREG,MEMORY|BITS128,0,0}, nasm_bytecodes+9265, IF_AVX|IF_SANDYBRIDGE},
- /* 2417 */ {I_VMASKMOVPS, 3, {YMMREG,YMMREG,MEMORY|BITS256,0,0}, nasm_bytecodes+9272, IF_AVX|IF_SANDYBRIDGE},
- /* 2418 */ {I_VMASKMOVPS, 3, {MEMORY|BITS128,XMMREG,XMMREG,0,0}, nasm_bytecodes+9279, IF_AVX|IF_SANDYBRIDGE|IF_SO},
- /* 2419 */ {I_VMASKMOVPS, 3, {MEMORY|BITS256,YMMREG,YMMREG,0,0}, nasm_bytecodes+9286, IF_AVX|IF_SANDYBRIDGE|IF_SY},
- /* 2420 */ {I_VMASKMOVPD, 3, {XMMREG,XMMREG,MEMORY|BITS128,0,0}, nasm_bytecodes+9293, IF_AVX|IF_SANDYBRIDGE},
- /* 2421 */ {I_VMASKMOVPD, 3, {YMMREG,YMMREG,MEMORY|BITS256,0,0}, nasm_bytecodes+9300, IF_AVX|IF_SANDYBRIDGE},
- /* 2422 */ {I_VMASKMOVPD, 3, {MEMORY|BITS128,XMMREG,XMMREG,0,0}, nasm_bytecodes+9307, IF_AVX|IF_SANDYBRIDGE},
- /* 2423 */ {I_VMASKMOVPD, 3, {MEMORY|BITS256,YMMREG,YMMREG,0,0}, nasm_bytecodes+9314, IF_AVX|IF_SANDYBRIDGE},
- /* 2424 */ {I_VMAXPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9321, IF_AVX|IF_SANDYBRIDGE},
- /* 2425 */ {I_VMAXPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9328, IF_AVX|IF_SANDYBRIDGE},
- /* 2426 */ {I_VMAXPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9335, IF_AVX|IF_SANDYBRIDGE},
- /* 2427 */ {I_VMAXPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9342, IF_AVX|IF_SANDYBRIDGE},
- /* 2428 */ {I_VMAXPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9349, IF_AVX|IF_SANDYBRIDGE},
- /* 2429 */ {I_VMAXPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9356, IF_AVX|IF_SANDYBRIDGE},
- /* 2430 */ {I_VMAXPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9363, IF_AVX|IF_SANDYBRIDGE},
- /* 2431 */ {I_VMAXPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9370, IF_AVX|IF_SANDYBRIDGE},
- /* 2432 */ {I_VMAXSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+9377, IF_AVX|IF_SANDYBRIDGE},
- /* 2433 */ {I_VMAXSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9384, IF_AVX|IF_SANDYBRIDGE},
- /* 2434 */ {I_VMAXSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+9391, IF_AVX|IF_SANDYBRIDGE},
- /* 2435 */ {I_VMAXSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9398, IF_AVX|IF_SANDYBRIDGE},
- /* 2436 */ {I_VMINPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9405, IF_AVX|IF_SANDYBRIDGE},
- /* 2437 */ {I_VMINPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9412, IF_AVX|IF_SANDYBRIDGE},
- /* 2438 */ {I_VMINPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9419, IF_AVX|IF_SANDYBRIDGE},
- /* 2439 */ {I_VMINPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9426, IF_AVX|IF_SANDYBRIDGE},
- /* 2440 */ {I_VMINPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9433, IF_AVX|IF_SANDYBRIDGE},
- /* 2441 */ {I_VMINPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9440, IF_AVX|IF_SANDYBRIDGE},
- /* 2442 */ {I_VMINPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9447, IF_AVX|IF_SANDYBRIDGE},
- /* 2443 */ {I_VMINPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9454, IF_AVX|IF_SANDYBRIDGE},
- /* 2444 */ {I_VMINSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+9461, IF_AVX|IF_SANDYBRIDGE},
- /* 2445 */ {I_VMINSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9468, IF_AVX|IF_SANDYBRIDGE},
- /* 2446 */ {I_VMINSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+9475, IF_AVX|IF_SANDYBRIDGE},
- /* 2447 */ {I_VMINSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9482, IF_AVX|IF_SANDYBRIDGE},
- /* 2448 */ {I_VMOVAPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9489, IF_AVX|IF_SANDYBRIDGE},
- /* 2449 */ {I_VMOVAPD, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+9496, IF_AVX|IF_SANDYBRIDGE},
- /* 2450 */ {I_VMOVAPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9503, IF_AVX|IF_SANDYBRIDGE},
- /* 2451 */ {I_VMOVAPD, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+9510, IF_AVX|IF_SANDYBRIDGE},
- /* 2452 */ {I_VMOVAPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9517, IF_AVX|IF_SANDYBRIDGE},
- /* 2453 */ {I_VMOVAPS, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+9524, IF_AVX|IF_SANDYBRIDGE},
- /* 2454 */ {I_VMOVAPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9531, IF_AVX|IF_SANDYBRIDGE},
- /* 2455 */ {I_VMOVAPS, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+9538, IF_AVX|IF_SANDYBRIDGE},
- /* 2456 */ {I_VMOVD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+9545, IF_AVX|IF_SANDYBRIDGE},
- /* 2457 */ {I_VMOVD, 2, {RM_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+9552, IF_AVX|IF_SANDYBRIDGE},
- /* 2458 */ {I_VMOVQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9559, IF_AVX|IF_SANDYBRIDGE|IF_SQ},
- /* 2459 */ {I_VMOVQ, 2, {RM_XMM|BITS64,XMMREG,0,0,0}, nasm_bytecodes+9566, IF_AVX|IF_SANDYBRIDGE|IF_SQ},
- /* 2460 */ {I_VMOVQ, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+9573, IF_AVX|IF_SANDYBRIDGE|IF_LONG|IF_SQ},
- /* 2461 */ {I_VMOVQ, 2, {RM_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+9580, IF_AVX|IF_SANDYBRIDGE|IF_LONG|IF_SQ},
- /* 2462 */ {I_VMOVDDUP, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9587, IF_AVX|IF_SANDYBRIDGE},
- /* 2463 */ {I_VMOVDDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9594, IF_AVX|IF_SANDYBRIDGE},
- /* 2464 */ {I_VMOVDQA, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9601, IF_AVX|IF_SANDYBRIDGE},
- /* 2465 */ {I_VMOVDQA, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+9608, IF_AVX|IF_SANDYBRIDGE},
- /* 2466 */ {I_VMOVQQA, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9615, IF_AVX|IF_SANDYBRIDGE},
- /* 2467 */ {I_VMOVQQA, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+9622, IF_AVX|IF_SANDYBRIDGE},
- /* 2468 */ {I_VMOVDQA, 2, {YMMREG,RM_YMM,0,0,0}, nasm_bytecodes+9615, IF_AVX|IF_SANDYBRIDGE},
- /* 2469 */ {I_VMOVDQA, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+9622, IF_AVX|IF_SANDYBRIDGE},
- /* 2470 */ {I_VMOVDQU, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9629, IF_AVX|IF_SANDYBRIDGE},
- /* 2471 */ {I_VMOVDQU, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+9636, IF_AVX|IF_SANDYBRIDGE},
- /* 2472 */ {I_VMOVQQU, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9643, IF_AVX|IF_SANDYBRIDGE},
- /* 2473 */ {I_VMOVQQU, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+9650, IF_AVX|IF_SANDYBRIDGE},
- /* 2474 */ {I_VMOVDQU, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9643, IF_AVX|IF_SANDYBRIDGE},
- /* 2475 */ {I_VMOVDQU, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+9650, IF_AVX|IF_SANDYBRIDGE},
- /* 2476 */ {I_VMOVHLPS, 3, {XMMREG,XMMREG,XMMREG,0,0}, nasm_bytecodes+9657, IF_AVX|IF_SANDYBRIDGE},
- /* 2477 */ {I_VMOVHLPS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+9664, IF_AVX|IF_SANDYBRIDGE},
- /* 2478 */ {I_VMOVHPD, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, nasm_bytecodes+9671, IF_AVX|IF_SANDYBRIDGE},
- /* 2479 */ {I_VMOVHPD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+9678, IF_AVX|IF_SANDYBRIDGE},
- /* 2480 */ {I_VMOVHPD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+9685, IF_AVX|IF_SANDYBRIDGE},
- /* 2481 */ {I_VMOVHPS, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, nasm_bytecodes+9692, IF_AVX|IF_SANDYBRIDGE},
- /* 2482 */ {I_VMOVHPS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+9699, IF_AVX|IF_SANDYBRIDGE},
- /* 2483 */ {I_VMOVHPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+9706, IF_AVX|IF_SANDYBRIDGE},
- /* 2484 */ {I_VMOVLHPS, 3, {XMMREG,XMMREG,XMMREG,0,0}, nasm_bytecodes+9692, IF_AVX|IF_SANDYBRIDGE},
- /* 2485 */ {I_VMOVLHPS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+9699, IF_AVX|IF_SANDYBRIDGE},
- /* 2486 */ {I_VMOVLPD, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, nasm_bytecodes+9713, IF_AVX|IF_SANDYBRIDGE},
- /* 2487 */ {I_VMOVLPD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+9720, IF_AVX|IF_SANDYBRIDGE},
- /* 2488 */ {I_VMOVLPD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+9727, IF_AVX|IF_SANDYBRIDGE},
- /* 2489 */ {I_VMOVLPS, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, nasm_bytecodes+9657, IF_AVX|IF_SANDYBRIDGE},
- /* 2490 */ {I_VMOVLPS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+9664, IF_AVX|IF_SANDYBRIDGE},
- /* 2491 */ {I_VMOVLPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+9734, IF_AVX|IF_SANDYBRIDGE},
- /* 2492 */ {I_VMOVMSKPD, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+9741, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- /* 2493 */ {I_VMOVMSKPD, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+9741, IF_AVX|IF_SANDYBRIDGE},
- /* 2494 */ {I_VMOVMSKPD, 2, {REG_GPR|BITS64,YMMREG,0,0,0}, nasm_bytecodes+9748, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- /* 2495 */ {I_VMOVMSKPD, 2, {REG_GPR|BITS32,YMMREG,0,0,0}, nasm_bytecodes+9748, IF_AVX|IF_SANDYBRIDGE},
- /* 2496 */ {I_VMOVMSKPS, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+9755, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- /* 2497 */ {I_VMOVMSKPS, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+9755, IF_AVX|IF_SANDYBRIDGE},
- /* 2498 */ {I_VMOVMSKPS, 2, {REG_GPR|BITS64,YMMREG,0,0,0}, nasm_bytecodes+9762, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- /* 2499 */ {I_VMOVMSKPS, 2, {REG_GPR|BITS32,YMMREG,0,0,0}, nasm_bytecodes+9762, IF_AVX|IF_SANDYBRIDGE},
- /* 2500 */ {I_VMOVNTDQ, 2, {MEMORY|BITS128,XMMREG,0,0,0}, nasm_bytecodes+9769, IF_AVX|IF_SANDYBRIDGE},
- /* 2501 */ {I_VMOVNTQQ, 2, {MEMORY|BITS256,YMMREG,0,0,0}, nasm_bytecodes+9776, IF_AVX|IF_SANDYBRIDGE},
- /* 2502 */ {I_VMOVNTDQ, 2, {MEMORY|BITS256,YMMREG,0,0,0}, nasm_bytecodes+9776, IF_AVX|IF_SANDYBRIDGE},
- /* 2503 */ {I_VMOVNTDQA, 2, {XMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+9783, IF_AVX|IF_SANDYBRIDGE},
- /* 2504 */ {I_VMOVNTPD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, nasm_bytecodes+9790, IF_AVX|IF_SANDYBRIDGE},
- /* 2505 */ {I_VMOVNTPD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, nasm_bytecodes+9797, IF_AVX|IF_SANDYBRIDGE},
- /* 2506 */ {I_VMOVNTPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, nasm_bytecodes+9804, IF_AVX|IF_SANDYBRIDGE},
- /* 2507 */ {I_VMOVNTPS, 2, {MEMORY|BITS128,YMMREG,0,0,0}, nasm_bytecodes+9811, IF_AVX|IF_SANDYBRIDGE},
- /* 2508 */ {I_VMOVSD, 3, {XMMREG,XMMREG,XMMREG,0,0}, nasm_bytecodes+9818, IF_AVX|IF_SANDYBRIDGE},
- /* 2509 */ {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+9825, IF_AVX|IF_SANDYBRIDGE},
- /* 2510 */ {I_VMOVSD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+9832, IF_AVX|IF_SANDYBRIDGE},
- /* 2511 */ {I_VMOVSD, 3, {XMMREG,XMMREG,XMMREG,0,0}, nasm_bytecodes+9839, IF_AVX|IF_SANDYBRIDGE},
- /* 2512 */ {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+9846, IF_AVX|IF_SANDYBRIDGE},
- /* 2513 */ {I_VMOVSD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+9853, IF_AVX|IF_SANDYBRIDGE},
- /* 2514 */ {I_VMOVSHDUP, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9860, IF_AVX|IF_SANDYBRIDGE},
- /* 2515 */ {I_VMOVSHDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9867, IF_AVX|IF_SANDYBRIDGE},
- /* 2516 */ {I_VMOVSLDUP, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9874, IF_AVX|IF_SANDYBRIDGE},
- /* 2517 */ {I_VMOVSLDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9881, IF_AVX|IF_SANDYBRIDGE},
- /* 2518 */ {I_VMOVSS, 3, {XMMREG,XMMREG,XMMREG,0,0}, nasm_bytecodes+9888, IF_AVX|IF_SANDYBRIDGE},
- /* 2519 */ {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+9895, IF_AVX|IF_SANDYBRIDGE},
- /* 2520 */ {I_VMOVSS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+9902, IF_AVX|IF_SANDYBRIDGE},
- /* 2521 */ {I_VMOVSS, 3, {XMMREG,XMMREG,XMMREG,0,0}, nasm_bytecodes+9909, IF_AVX|IF_SANDYBRIDGE},
- /* 2522 */ {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+9916, IF_AVX|IF_SANDYBRIDGE},
- /* 2523 */ {I_VMOVSS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+9923, IF_AVX|IF_SANDYBRIDGE},
- /* 2524 */ {I_VMOVUPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9930, IF_AVX|IF_SANDYBRIDGE},
- /* 2525 */ {I_VMOVUPD, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+9937, IF_AVX|IF_SANDYBRIDGE},
- /* 2526 */ {I_VMOVUPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9944, IF_AVX|IF_SANDYBRIDGE},
- /* 2527 */ {I_VMOVUPD, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+9951, IF_AVX|IF_SANDYBRIDGE},
- /* 2528 */ {I_VMOVUPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9958, IF_AVX|IF_SANDYBRIDGE},
- /* 2529 */ {I_VMOVUPS, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+9965, IF_AVX|IF_SANDYBRIDGE},
- /* 2530 */ {I_VMOVUPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9972, IF_AVX|IF_SANDYBRIDGE},
- /* 2531 */ {I_VMOVUPS, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+9979, IF_AVX|IF_SANDYBRIDGE},
- /* 2532 */ {I_VMPSADBW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6120, IF_AVX|IF_SANDYBRIDGE},
- /* 2533 */ {I_VMPSADBW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6128, IF_AVX|IF_SANDYBRIDGE},
- /* 2534 */ {I_VMULPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9986, IF_AVX|IF_SANDYBRIDGE},
- /* 2535 */ {I_VMULPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9993, IF_AVX|IF_SANDYBRIDGE},
- /* 2536 */ {I_VMULPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10000, IF_AVX|IF_SANDYBRIDGE},
- /* 2537 */ {I_VMULPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10007, IF_AVX|IF_SANDYBRIDGE},
- /* 2538 */ {I_VMULPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10014, IF_AVX|IF_SANDYBRIDGE},
- /* 2539 */ {I_VMULPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10021, IF_AVX|IF_SANDYBRIDGE},
- /* 2540 */ {I_VMULPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10028, IF_AVX|IF_SANDYBRIDGE},
- /* 2541 */ {I_VMULPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10035, IF_AVX|IF_SANDYBRIDGE},
- /* 2542 */ {I_VMULSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+10042, IF_AVX|IF_SANDYBRIDGE},
- /* 2543 */ {I_VMULSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+10049, IF_AVX|IF_SANDYBRIDGE},
- /* 2544 */ {I_VMULSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+10056, IF_AVX|IF_SANDYBRIDGE},
- /* 2545 */ {I_VMULSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+10063, IF_AVX|IF_SANDYBRIDGE},
- /* 2546 */ {I_VORPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10070, IF_AVX|IF_SANDYBRIDGE},
- /* 2547 */ {I_VORPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10077, IF_AVX|IF_SANDYBRIDGE},
- /* 2548 */ {I_VORPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10084, IF_AVX|IF_SANDYBRIDGE},
- /* 2549 */ {I_VORPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10091, IF_AVX|IF_SANDYBRIDGE},
- /* 2550 */ {I_VORPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10098, IF_AVX|IF_SANDYBRIDGE},
- /* 2551 */ {I_VORPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10105, IF_AVX|IF_SANDYBRIDGE},
- /* 2552 */ {I_VORPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10112, IF_AVX|IF_SANDYBRIDGE},
- /* 2553 */ {I_VORPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10119, IF_AVX|IF_SANDYBRIDGE},
- /* 2554 */ {I_VPABSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10126, IF_AVX|IF_SANDYBRIDGE},
- /* 2555 */ {I_VPABSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10133, IF_AVX|IF_SANDYBRIDGE},
- /* 2556 */ {I_VPABSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10140, IF_AVX|IF_SANDYBRIDGE},
- /* 2557 */ {I_VPACKSSWB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10147, IF_AVX|IF_SANDYBRIDGE},
- /* 2558 */ {I_VPACKSSWB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10154, IF_AVX|IF_SANDYBRIDGE},
- /* 2559 */ {I_VPACKSSDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10161, IF_AVX|IF_SANDYBRIDGE},
- /* 2560 */ {I_VPACKSSDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10168, IF_AVX|IF_SANDYBRIDGE},
- /* 2561 */ {I_VPACKUSWB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10175, IF_AVX|IF_SANDYBRIDGE},
- /* 2562 */ {I_VPACKUSWB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10182, IF_AVX|IF_SANDYBRIDGE},
- /* 2563 */ {I_VPACKUSDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10189, IF_AVX|IF_SANDYBRIDGE},
- /* 2564 */ {I_VPACKUSDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10196, IF_AVX|IF_SANDYBRIDGE},
- /* 2565 */ {I_VPADDB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10203, IF_AVX|IF_SANDYBRIDGE},
- /* 2566 */ {I_VPADDB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10210, IF_AVX|IF_SANDYBRIDGE},
- /* 2567 */ {I_VPADDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10217, IF_AVX|IF_SANDYBRIDGE},
- /* 2568 */ {I_VPADDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10224, IF_AVX|IF_SANDYBRIDGE},
- /* 2569 */ {I_VPADDD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10231, IF_AVX|IF_SANDYBRIDGE},
- /* 2570 */ {I_VPADDD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10238, IF_AVX|IF_SANDYBRIDGE},
- /* 2571 */ {I_VPADDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10245, IF_AVX|IF_SANDYBRIDGE},
- /* 2572 */ {I_VPADDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10252, IF_AVX|IF_SANDYBRIDGE},
- /* 2573 */ {I_VPADDSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10259, IF_AVX|IF_SANDYBRIDGE},
- /* 2574 */ {I_VPADDSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10266, IF_AVX|IF_SANDYBRIDGE},
- /* 2575 */ {I_VPADDSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10273, IF_AVX|IF_SANDYBRIDGE},
- /* 2576 */ {I_VPADDSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10280, IF_AVX|IF_SANDYBRIDGE},
- /* 2577 */ {I_VPADDUSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10287, IF_AVX|IF_SANDYBRIDGE},
- /* 2578 */ {I_VPADDUSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10294, IF_AVX|IF_SANDYBRIDGE},
- /* 2579 */ {I_VPADDUSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10301, IF_AVX|IF_SANDYBRIDGE},
- /* 2580 */ {I_VPADDUSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10308, IF_AVX|IF_SANDYBRIDGE},
- /* 2581 */ {I_VPALIGNR, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6136, IF_AVX|IF_SANDYBRIDGE},
- /* 2582 */ {I_VPALIGNR, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6144, IF_AVX|IF_SANDYBRIDGE},
- /* 2583 */ {I_VPAND, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10315, IF_AVX|IF_SANDYBRIDGE},
- /* 2584 */ {I_VPAND, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10322, IF_AVX|IF_SANDYBRIDGE},
- /* 2585 */ {I_VPANDN, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10329, IF_AVX|IF_SANDYBRIDGE},
- /* 2586 */ {I_VPANDN, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10336, IF_AVX|IF_SANDYBRIDGE},
- /* 2587 */ {I_VPAVGB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10343, IF_AVX|IF_SANDYBRIDGE},
- /* 2588 */ {I_VPAVGB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10350, IF_AVX|IF_SANDYBRIDGE},
- /* 2589 */ {I_VPAVGW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10357, IF_AVX|IF_SANDYBRIDGE},
- /* 2590 */ {I_VPAVGW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10364, IF_AVX|IF_SANDYBRIDGE},
- /* 2591 */ {I_VPBLENDVB, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+3582, IF_AVX|IF_SANDYBRIDGE},
- /* 2592 */ {I_VPBLENDVB, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+3591, IF_AVX|IF_SANDYBRIDGE},
- /* 2593 */ {I_VPBLENDW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6152, IF_AVX|IF_SANDYBRIDGE},
- /* 2594 */ {I_VPBLENDW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6160, IF_AVX|IF_SANDYBRIDGE},
- /* 2595 */ {I_VPCMPESTRI, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6168, IF_AVX|IF_SANDYBRIDGE},
- /* 2596 */ {I_VPCMPESTRM, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6176, IF_AVX|IF_SANDYBRIDGE},
- /* 2597 */ {I_VPCMPISTRI, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6184, IF_AVX|IF_SANDYBRIDGE},
- /* 2598 */ {I_VPCMPISTRM, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6192, IF_AVX|IF_SANDYBRIDGE},
- /* 2599 */ {I_VPCMPEQB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10371, IF_AVX|IF_SANDYBRIDGE},
- /* 2600 */ {I_VPCMPEQB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10378, IF_AVX|IF_SANDYBRIDGE},
- /* 2601 */ {I_VPCMPEQW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10385, IF_AVX|IF_SANDYBRIDGE},
- /* 2602 */ {I_VPCMPEQW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10392, IF_AVX|IF_SANDYBRIDGE},
- /* 2603 */ {I_VPCMPEQD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10399, IF_AVX|IF_SANDYBRIDGE},
- /* 2604 */ {I_VPCMPEQD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10406, IF_AVX|IF_SANDYBRIDGE},
- /* 2605 */ {I_VPCMPEQQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10413, IF_AVX|IF_SANDYBRIDGE},
- /* 2606 */ {I_VPCMPEQQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10420, IF_AVX|IF_SANDYBRIDGE},
- /* 2607 */ {I_VPCMPGTB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10427, IF_AVX|IF_SANDYBRIDGE},
- /* 2608 */ {I_VPCMPGTB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10434, IF_AVX|IF_SANDYBRIDGE},
- /* 2609 */ {I_VPCMPGTW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10441, IF_AVX|IF_SANDYBRIDGE},
- /* 2610 */ {I_VPCMPGTW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10448, IF_AVX|IF_SANDYBRIDGE},
- /* 2611 */ {I_VPCMPGTD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10455, IF_AVX|IF_SANDYBRIDGE},
- /* 2612 */ {I_VPCMPGTD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10462, IF_AVX|IF_SANDYBRIDGE},
- /* 2613 */ {I_VPCMPGTQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10469, IF_AVX|IF_SANDYBRIDGE},
- /* 2614 */ {I_VPCMPGTQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10476, IF_AVX|IF_SANDYBRIDGE},
- /* 2615 */ {I_VPERMILPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10483, IF_AVX|IF_SANDYBRIDGE},
- /* 2616 */ {I_VPERMILPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10490, IF_AVX|IF_SANDYBRIDGE},
- /* 2617 */ {I_VPERMILPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6200, IF_AVX|IF_SANDYBRIDGE},
- /* 2618 */ {I_VPERMILPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6208, IF_AVX|IF_SANDYBRIDGE},
- /* 2619 */ {I_VPERMILPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10497, IF_AVX|IF_SANDYBRIDGE},
- /* 2620 */ {I_VPERMILPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10504, IF_AVX|IF_SANDYBRIDGE},
- /* 2621 */ {I_VPERMILPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6216, IF_AVX|IF_SANDYBRIDGE},
- /* 2622 */ {I_VPERMILPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6224, IF_AVX|IF_SANDYBRIDGE},
- /* 2623 */ {I_VPERM2F128, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+6232, IF_AVX|IF_SANDYBRIDGE},
- /* 2624 */ {I_VPEXTRB, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6240, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- /* 2625 */ {I_VPEXTRB, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6240, IF_AVX|IF_SANDYBRIDGE},
- /* 2626 */ {I_VPEXTRB, 3, {MEMORY|BITS8,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6240, IF_AVX|IF_SANDYBRIDGE},
- /* 2627 */ {I_VPEXTRW, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6248, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- /* 2628 */ {I_VPEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6248, IF_AVX|IF_SANDYBRIDGE},
- /* 2629 */ {I_VPEXTRW, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6256, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- /* 2630 */ {I_VPEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6256, IF_AVX|IF_SANDYBRIDGE},
- /* 2631 */ {I_VPEXTRW, 3, {MEMORY|BITS16,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6256, IF_AVX|IF_SANDYBRIDGE},
- /* 2632 */ {I_VPEXTRD, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6264, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- /* 2633 */ {I_VPEXTRD, 3, {RM_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6264, IF_AVX|IF_SANDYBRIDGE},
- /* 2634 */ {I_VPEXTRQ, 3, {RM_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6272, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- /* 2635 */ {I_VPHADDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10511, IF_AVX|IF_SANDYBRIDGE},
- /* 2636 */ {I_VPHADDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10518, IF_AVX|IF_SANDYBRIDGE},
- /* 2637 */ {I_VPHADDD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10525, IF_AVX|IF_SANDYBRIDGE},
- /* 2638 */ {I_VPHADDD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10532, IF_AVX|IF_SANDYBRIDGE},
- /* 2639 */ {I_VPHADDSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10539, IF_AVX|IF_SANDYBRIDGE},
- /* 2640 */ {I_VPHADDSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10546, IF_AVX|IF_SANDYBRIDGE},
- /* 2641 */ {I_VPHMINPOSUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10553, IF_AVX|IF_SANDYBRIDGE},
- /* 2642 */ {I_VPHSUBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10560, IF_AVX|IF_SANDYBRIDGE},
- /* 2643 */ {I_VPHSUBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10567, IF_AVX|IF_SANDYBRIDGE},
- /* 2644 */ {I_VPHSUBD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10574, IF_AVX|IF_SANDYBRIDGE},
- /* 2645 */ {I_VPHSUBD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10581, IF_AVX|IF_SANDYBRIDGE},
- /* 2646 */ {I_VPHSUBSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10588, IF_AVX|IF_SANDYBRIDGE},
- /* 2647 */ {I_VPHSUBSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10595, IF_AVX|IF_SANDYBRIDGE},
- /* 2648 */ {I_VPINSRB, 4, {XMMREG,XMMREG,MEMORY|BITS8,IMMEDIATE|BITS8,0}, nasm_bytecodes+6280, IF_AVX|IF_SANDYBRIDGE},
- /* 2649 */ {I_VPINSRB, 3, {XMMREG,MEMORY|BITS8,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6288, IF_AVX|IF_SANDYBRIDGE},
- /* 2650 */ {I_VPINSRB, 4, {XMMREG,XMMREG,RM_GPR|BITS8,IMMEDIATE|BITS8,0}, nasm_bytecodes+6280, IF_AVX|IF_SANDYBRIDGE},
- /* 2651 */ {I_VPINSRB, 3, {XMMREG,RM_GPR|BITS8,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6288, IF_AVX|IF_SANDYBRIDGE},
- /* 2652 */ {I_VPINSRB, 4, {XMMREG,XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0}, nasm_bytecodes+6280, IF_AVX|IF_SANDYBRIDGE},
- /* 2653 */ {I_VPINSRB, 3, {XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6288, IF_AVX|IF_SANDYBRIDGE},
- /* 2654 */ {I_VPINSRW, 4, {XMMREG,XMMREG,MEMORY|BITS16,IMMEDIATE|BITS8,0}, nasm_bytecodes+6296, IF_AVX|IF_SANDYBRIDGE},
- /* 2655 */ {I_VPINSRW, 3, {XMMREG,MEMORY|BITS16,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6304, IF_AVX|IF_SANDYBRIDGE},
- /* 2656 */ {I_VPINSRW, 4, {XMMREG,XMMREG,RM_GPR|BITS16,IMMEDIATE|BITS8,0}, nasm_bytecodes+6296, IF_AVX|IF_SANDYBRIDGE},
- /* 2657 */ {I_VPINSRW, 3, {XMMREG,RM_GPR|BITS16,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6304, IF_AVX|IF_SANDYBRIDGE},
- /* 2658 */ {I_VPINSRW, 4, {XMMREG,XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0}, nasm_bytecodes+6296, IF_AVX|IF_SANDYBRIDGE},
- /* 2659 */ {I_VPINSRW, 3, {XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6304, IF_AVX|IF_SANDYBRIDGE},
- /* 2660 */ {I_VPINSRD, 4, {XMMREG,XMMREG,MEMORY|BITS32,IMMEDIATE|BITS8,0}, nasm_bytecodes+6312, IF_AVX|IF_SANDYBRIDGE},
- /* 2661 */ {I_VPINSRD, 3, {XMMREG,MEMORY|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6320, IF_AVX|IF_SANDYBRIDGE},
- /* 2662 */ {I_VPINSRD, 4, {XMMREG,XMMREG,RM_GPR|BITS32,IMMEDIATE|BITS8,0}, nasm_bytecodes+6312, IF_AVX|IF_SANDYBRIDGE},
- /* 2663 */ {I_VPINSRD, 3, {XMMREG,RM_GPR|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6320, IF_AVX|IF_SANDYBRIDGE},
- /* 2664 */ {I_VPINSRQ, 4, {XMMREG,XMMREG,MEMORY|BITS64,IMMEDIATE|BITS8,0}, nasm_bytecodes+6328, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- /* 2665 */ {I_VPINSRQ, 3, {XMMREG,MEMORY|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6336, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- /* 2666 */ {I_VPINSRQ, 4, {XMMREG,XMMREG,RM_GPR|BITS64,IMMEDIATE|BITS8,0}, nasm_bytecodes+6328, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- /* 2667 */ {I_VPINSRQ, 3, {XMMREG,RM_GPR|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6336, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- /* 2668 */ {I_VPMADDWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10602, IF_AVX|IF_SANDYBRIDGE},
- /* 2669 */ {I_VPMADDWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10609, IF_AVX|IF_SANDYBRIDGE},
- /* 2670 */ {I_VPMADDUBSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10616, IF_AVX|IF_SANDYBRIDGE},
- /* 2671 */ {I_VPMADDUBSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10623, IF_AVX|IF_SANDYBRIDGE},
- /* 2672 */ {I_VPMAXSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10630, IF_AVX|IF_SANDYBRIDGE},
- /* 2673 */ {I_VPMAXSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10637, IF_AVX|IF_SANDYBRIDGE},
- /* 2674 */ {I_VPMAXSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10644, IF_AVX|IF_SANDYBRIDGE},
- /* 2675 */ {I_VPMAXSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10651, IF_AVX|IF_SANDYBRIDGE},
- /* 2676 */ {I_VPMAXSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10658, IF_AVX|IF_SANDYBRIDGE},
- /* 2677 */ {I_VPMAXSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10665, IF_AVX|IF_SANDYBRIDGE},
- /* 2678 */ {I_VPMAXUB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10672, IF_AVX|IF_SANDYBRIDGE},
- /* 2679 */ {I_VPMAXUB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10679, IF_AVX|IF_SANDYBRIDGE},
- /* 2680 */ {I_VPMAXUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10686, IF_AVX|IF_SANDYBRIDGE},
- /* 2681 */ {I_VPMAXUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10693, IF_AVX|IF_SANDYBRIDGE},
- /* 2682 */ {I_VPMAXUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10700, IF_AVX|IF_SANDYBRIDGE},
- /* 2683 */ {I_VPMAXUD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10707, IF_AVX|IF_SANDYBRIDGE},
- /* 2684 */ {I_VPMINSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10714, IF_AVX|IF_SANDYBRIDGE},
- /* 2685 */ {I_VPMINSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10721, IF_AVX|IF_SANDYBRIDGE},
- /* 2686 */ {I_VPMINSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10728, IF_AVX|IF_SANDYBRIDGE},
- /* 2687 */ {I_VPMINSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10735, IF_AVX|IF_SANDYBRIDGE},
- /* 2688 */ {I_VPMINSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10742, IF_AVX|IF_SANDYBRIDGE},
- /* 2689 */ {I_VPMINSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10749, IF_AVX|IF_SANDYBRIDGE},
- /* 2690 */ {I_VPMINUB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10756, IF_AVX|IF_SANDYBRIDGE},
- /* 2691 */ {I_VPMINUB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10763, IF_AVX|IF_SANDYBRIDGE},
- /* 2692 */ {I_VPMINUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10770, IF_AVX|IF_SANDYBRIDGE},
- /* 2693 */ {I_VPMINUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10777, IF_AVX|IF_SANDYBRIDGE},
- /* 2694 */ {I_VPMINUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10784, IF_AVX|IF_SANDYBRIDGE},
- /* 2695 */ {I_VPMINUD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10791, IF_AVX|IF_SANDYBRIDGE},
- /* 2696 */ {I_VPMOVMSKB, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+10798, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
- /* 2697 */ {I_VPMOVMSKB, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+10798, IF_AVX|IF_SANDYBRIDGE},
- /* 2698 */ {I_VPMOVSXBW, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+10805, IF_AVX|IF_SANDYBRIDGE},
- /* 2699 */ {I_VPMOVSXBD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+10812, IF_AVX|IF_SANDYBRIDGE},
- /* 2700 */ {I_VPMOVSXBQ, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, nasm_bytecodes+10819, IF_AVX|IF_SANDYBRIDGE},
- /* 2701 */ {I_VPMOVSXWD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+10826, IF_AVX|IF_SANDYBRIDGE},
- /* 2702 */ {I_VPMOVSXWQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+10833, IF_AVX|IF_SANDYBRIDGE},
- /* 2703 */ {I_VPMOVSXDQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+10840, IF_AVX|IF_SANDYBRIDGE},
- /* 2704 */ {I_VPMOVZXBW, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+10847, IF_AVX|IF_SANDYBRIDGE},
- /* 2705 */ {I_VPMOVZXBD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+10854, IF_AVX|IF_SANDYBRIDGE},
- /* 2706 */ {I_VPMOVZXBQ, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, nasm_bytecodes+10861, IF_AVX|IF_SANDYBRIDGE},
- /* 2707 */ {I_VPMOVZXWD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+10868, IF_AVX|IF_SANDYBRIDGE},
- /* 2708 */ {I_VPMOVZXWQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+10875, IF_AVX|IF_SANDYBRIDGE},
- /* 2709 */ {I_VPMOVZXDQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+10882, IF_AVX|IF_SANDYBRIDGE},
- /* 2710 */ {I_VPMULHUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10889, IF_AVX|IF_SANDYBRIDGE},
- /* 2711 */ {I_VPMULHUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10896, IF_AVX|IF_SANDYBRIDGE},
- /* 2712 */ {I_VPMULHRSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10903, IF_AVX|IF_SANDYBRIDGE},
- /* 2713 */ {I_VPMULHRSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10910, IF_AVX|IF_SANDYBRIDGE},
- /* 2714 */ {I_VPMULHW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10917, IF_AVX|IF_SANDYBRIDGE},
- /* 2715 */ {I_VPMULHW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10924, IF_AVX|IF_SANDYBRIDGE},
- /* 2716 */ {I_VPMULLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10931, IF_AVX|IF_SANDYBRIDGE},
- /* 2717 */ {I_VPMULLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10938, IF_AVX|IF_SANDYBRIDGE},
- /* 2718 */ {I_VPMULLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10945, IF_AVX|IF_SANDYBRIDGE},
- /* 2719 */ {I_VPMULLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10952, IF_AVX|IF_SANDYBRIDGE},
- /* 2720 */ {I_VPMULUDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10959, IF_AVX|IF_SANDYBRIDGE},
- /* 2721 */ {I_VPMULUDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10966, IF_AVX|IF_SANDYBRIDGE},
- /* 2722 */ {I_VPMULDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10973, IF_AVX|IF_SANDYBRIDGE},
- /* 2723 */ {I_VPMULDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10980, IF_AVX|IF_SANDYBRIDGE},
- /* 2724 */ {I_VPOR, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10987, IF_AVX|IF_SANDYBRIDGE},
- /* 2725 */ {I_VPOR, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10994, IF_AVX|IF_SANDYBRIDGE},
- /* 2726 */ {I_VPSADBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11001, IF_AVX|IF_SANDYBRIDGE},
- /* 2727 */ {I_VPSADBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11008, IF_AVX|IF_SANDYBRIDGE},
- /* 2728 */ {I_VPSHUFB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11015, IF_AVX|IF_SANDYBRIDGE},
- /* 2729 */ {I_VPSHUFB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11022, IF_AVX|IF_SANDYBRIDGE},
- /* 2730 */ {I_VPSHUFD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6344, IF_AVX|IF_SANDYBRIDGE},
- /* 2731 */ {I_VPSHUFHW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6352, IF_AVX|IF_SANDYBRIDGE},
- /* 2732 */ {I_VPSHUFLW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6360, IF_AVX|IF_SANDYBRIDGE},
- /* 2733 */ {I_VPSIGNB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11029, IF_AVX|IF_SANDYBRIDGE},
- /* 2734 */ {I_VPSIGNB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11036, IF_AVX|IF_SANDYBRIDGE},
- /* 2735 */ {I_VPSIGNW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11043, IF_AVX|IF_SANDYBRIDGE},
- /* 2736 */ {I_VPSIGNW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11050, IF_AVX|IF_SANDYBRIDGE},
- /* 2737 */ {I_VPSIGND, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11057, IF_AVX|IF_SANDYBRIDGE},
- /* 2738 */ {I_VPSIGND, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11064, IF_AVX|IF_SANDYBRIDGE},
- /* 2739 */ {I_VPSLLDQ, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6368, IF_AVX|IF_SANDYBRIDGE},
- /* 2740 */ {I_VPSLLDQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6376, IF_AVX|IF_SANDYBRIDGE},
- /* 2741 */ {I_VPSRLDQ, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6384, IF_AVX|IF_SANDYBRIDGE},
- /* 2742 */ {I_VPSRLDQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6392, IF_AVX|IF_SANDYBRIDGE},
- /* 2743 */ {I_VPSLLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11071, IF_AVX|IF_SANDYBRIDGE},
- /* 2744 */ {I_VPSLLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11078, IF_AVX|IF_SANDYBRIDGE},
- /* 2745 */ {I_VPSLLW, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6400, IF_AVX|IF_SANDYBRIDGE},
- /* 2746 */ {I_VPSLLW, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6408, IF_AVX|IF_SANDYBRIDGE},
- /* 2747 */ {I_VPSLLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11085, IF_AVX|IF_SANDYBRIDGE},
- /* 2748 */ {I_VPSLLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11092, IF_AVX|IF_SANDYBRIDGE},
- /* 2749 */ {I_VPSLLD, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6416, IF_AVX|IF_SANDYBRIDGE},
- /* 2750 */ {I_VPSLLD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6424, IF_AVX|IF_SANDYBRIDGE},
- /* 2751 */ {I_VPSLLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11099, IF_AVX|IF_SANDYBRIDGE},
- /* 2752 */ {I_VPSLLQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11106, IF_AVX|IF_SANDYBRIDGE},
- /* 2753 */ {I_VPSLLQ, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6432, IF_AVX|IF_SANDYBRIDGE},
- /* 2754 */ {I_VPSLLQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6440, IF_AVX|IF_SANDYBRIDGE},
- /* 2755 */ {I_VPSRAW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11113, IF_AVX|IF_SANDYBRIDGE},
- /* 2756 */ {I_VPSRAW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11120, IF_AVX|IF_SANDYBRIDGE},
- /* 2757 */ {I_VPSRAW, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6448, IF_AVX|IF_SANDYBRIDGE},
- /* 2758 */ {I_VPSRAW, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6456, IF_AVX|IF_SANDYBRIDGE},
- /* 2759 */ {I_VPSRAD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11127, IF_AVX|IF_SANDYBRIDGE},
- /* 2760 */ {I_VPSRAD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11134, IF_AVX|IF_SANDYBRIDGE},
- /* 2761 */ {I_VPSRAD, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6464, IF_AVX|IF_SANDYBRIDGE},
- /* 2762 */ {I_VPSRAD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6472, IF_AVX|IF_SANDYBRIDGE},
- /* 2763 */ {I_VPSRLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11141, IF_AVX|IF_SANDYBRIDGE},
- /* 2764 */ {I_VPSRLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11148, IF_AVX|IF_SANDYBRIDGE},
- /* 2765 */ {I_VPSRLW, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6480, IF_AVX|IF_SANDYBRIDGE},
- /* 2766 */ {I_VPSRLW, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6488, IF_AVX|IF_SANDYBRIDGE},
- /* 2767 */ {I_VPSRLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11155, IF_AVX|IF_SANDYBRIDGE},
- /* 2768 */ {I_VPSRLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11162, IF_AVX|IF_SANDYBRIDGE},
- /* 2769 */ {I_VPSRLD, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6496, IF_AVX|IF_SANDYBRIDGE},
- /* 2770 */ {I_VPSRLD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6504, IF_AVX|IF_SANDYBRIDGE},
- /* 2771 */ {I_VPSRLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11169, IF_AVX|IF_SANDYBRIDGE},
- /* 2772 */ {I_VPSRLQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11176, IF_AVX|IF_SANDYBRIDGE},
- /* 2773 */ {I_VPSRLQ, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6512, IF_AVX|IF_SANDYBRIDGE},
- /* 2774 */ {I_VPSRLQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6520, IF_AVX|IF_SANDYBRIDGE},
- /* 2775 */ {I_VPTEST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11183, IF_AVX|IF_SANDYBRIDGE},
- /* 2776 */ {I_VPTEST, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11190, IF_AVX|IF_SANDYBRIDGE},
- /* 2777 */ {I_VPSUBB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11197, IF_AVX|IF_SANDYBRIDGE},
- /* 2778 */ {I_VPSUBB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11204, IF_AVX|IF_SANDYBRIDGE},
- /* 2779 */ {I_VPSUBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11211, IF_AVX|IF_SANDYBRIDGE},
- /* 2780 */ {I_VPSUBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11218, IF_AVX|IF_SANDYBRIDGE},
- /* 2781 */ {I_VPSUBD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11225, IF_AVX|IF_SANDYBRIDGE},
- /* 2782 */ {I_VPSUBD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11232, IF_AVX|IF_SANDYBRIDGE},
- /* 2783 */ {I_VPSUBQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11239, IF_AVX|IF_SANDYBRIDGE},
- /* 2784 */ {I_VPSUBQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11246, IF_AVX|IF_SANDYBRIDGE},
- /* 2785 */ {I_VPSUBSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11253, IF_AVX|IF_SANDYBRIDGE},
- /* 2786 */ {I_VPSUBSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11260, IF_AVX|IF_SANDYBRIDGE},
- /* 2787 */ {I_VPSUBSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11267, IF_AVX|IF_SANDYBRIDGE},
- /* 2788 */ {I_VPSUBSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11274, IF_AVX|IF_SANDYBRIDGE},
- /* 2789 */ {I_VPSUBUSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11281, IF_AVX|IF_SANDYBRIDGE},
- /* 2790 */ {I_VPSUBUSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11288, IF_AVX|IF_SANDYBRIDGE},
- /* 2791 */ {I_VPSUBUSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11295, IF_AVX|IF_SANDYBRIDGE},
- /* 2792 */ {I_VPSUBUSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11302, IF_AVX|IF_SANDYBRIDGE},
- /* 2793 */ {I_VPUNPCKHBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11309, IF_AVX|IF_SANDYBRIDGE},
- /* 2794 */ {I_VPUNPCKHBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11316, IF_AVX|IF_SANDYBRIDGE},
- /* 2795 */ {I_VPUNPCKHWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11323, IF_AVX|IF_SANDYBRIDGE},
- /* 2796 */ {I_VPUNPCKHWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11330, IF_AVX|IF_SANDYBRIDGE},
- /* 2797 */ {I_VPUNPCKHDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11337, IF_AVX|IF_SANDYBRIDGE},
- /* 2798 */ {I_VPUNPCKHDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11344, IF_AVX|IF_SANDYBRIDGE},
- /* 2799 */ {I_VPUNPCKHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11351, IF_AVX|IF_SANDYBRIDGE},
- /* 2800 */ {I_VPUNPCKHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11358, IF_AVX|IF_SANDYBRIDGE},
- /* 2801 */ {I_VPUNPCKLBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11365, IF_AVX|IF_SANDYBRIDGE},
- /* 2802 */ {I_VPUNPCKLBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11372, IF_AVX|IF_SANDYBRIDGE},
- /* 2803 */ {I_VPUNPCKLWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11379, IF_AVX|IF_SANDYBRIDGE},
- /* 2804 */ {I_VPUNPCKLWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11386, IF_AVX|IF_SANDYBRIDGE},
- /* 2805 */ {I_VPUNPCKLDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11393, IF_AVX|IF_SANDYBRIDGE},
- /* 2806 */ {I_VPUNPCKLDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11400, IF_AVX|IF_SANDYBRIDGE},
- /* 2807 */ {I_VPUNPCKLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11407, IF_AVX|IF_SANDYBRIDGE},
- /* 2808 */ {I_VPUNPCKLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11414, IF_AVX|IF_SANDYBRIDGE},
- /* 2809 */ {I_VPXOR, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11421, IF_AVX|IF_SANDYBRIDGE},
- /* 2810 */ {I_VPXOR, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11428, IF_AVX|IF_SANDYBRIDGE},
- /* 2811 */ {I_VRCPPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11435, IF_AVX|IF_SANDYBRIDGE},
- /* 2812 */ {I_VRCPPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11442, IF_AVX|IF_SANDYBRIDGE},
- /* 2813 */ {I_VRCPSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+11449, IF_AVX|IF_SANDYBRIDGE},
- /* 2814 */ {I_VRCPSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+11456, IF_AVX|IF_SANDYBRIDGE},
- /* 2815 */ {I_VRSQRTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11463, IF_AVX|IF_SANDYBRIDGE},
- /* 2816 */ {I_VRSQRTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11470, IF_AVX|IF_SANDYBRIDGE},
- /* 2817 */ {I_VRSQRTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+11477, IF_AVX|IF_SANDYBRIDGE},
- /* 2818 */ {I_VRSQRTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+11484, IF_AVX|IF_SANDYBRIDGE},
- /* 2819 */ {I_VROUNDPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6528, IF_AVX|IF_SANDYBRIDGE},
- /* 2820 */ {I_VROUNDPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6536, IF_AVX|IF_SANDYBRIDGE},
- /* 2821 */ {I_VROUNDPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6544, IF_AVX|IF_SANDYBRIDGE},
- /* 2822 */ {I_VROUNDPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6552, IF_AVX|IF_SANDYBRIDGE},
- /* 2823 */ {I_VROUNDSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, nasm_bytecodes+6560, IF_AVX|IF_SANDYBRIDGE},
- /* 2824 */ {I_VROUNDSD, 3, {XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6568, IF_AVX|IF_SANDYBRIDGE},
- /* 2825 */ {I_VROUNDSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, nasm_bytecodes+6576, IF_AVX|IF_SANDYBRIDGE},
- /* 2826 */ {I_VROUNDSS, 3, {XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6584, IF_AVX|IF_SANDYBRIDGE},
- /* 2827 */ {I_VSHUFPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6592, IF_AVX|IF_SANDYBRIDGE},
- /* 2828 */ {I_VSHUFPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6600, IF_AVX|IF_SANDYBRIDGE},
- /* 2829 */ {I_VSHUFPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+6608, IF_AVX|IF_SANDYBRIDGE},
- /* 2830 */ {I_VSHUFPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6616, IF_AVX|IF_SANDYBRIDGE},
- /* 2831 */ {I_VSHUFPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6624, IF_AVX|IF_SANDYBRIDGE},
- /* 2832 */ {I_VSHUFPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6632, IF_AVX|IF_SANDYBRIDGE},
- /* 2833 */ {I_VSHUFPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+6640, IF_AVX|IF_SANDYBRIDGE},
- /* 2834 */ {I_VSHUFPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6648, IF_AVX|IF_SANDYBRIDGE},
- /* 2835 */ {I_VSQRTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11491, IF_AVX|IF_SANDYBRIDGE},
- /* 2836 */ {I_VSQRTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11498, IF_AVX|IF_SANDYBRIDGE},
- /* 2837 */ {I_VSQRTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11505, IF_AVX|IF_SANDYBRIDGE},
- /* 2838 */ {I_VSQRTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11512, IF_AVX|IF_SANDYBRIDGE},
- /* 2839 */ {I_VSQRTSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+11519, IF_AVX|IF_SANDYBRIDGE},
- /* 2840 */ {I_VSQRTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+11526, IF_AVX|IF_SANDYBRIDGE},
- /* 2841 */ {I_VSQRTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+11533, IF_AVX|IF_SANDYBRIDGE},
- /* 2842 */ {I_VSQRTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+11540, IF_AVX|IF_SANDYBRIDGE},
- /* 2843 */ {I_VSTMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+11547, IF_AVX|IF_SANDYBRIDGE},
- /* 2844 */ {I_VSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11554, IF_AVX|IF_SANDYBRIDGE},
- /* 2845 */ {I_VSUBPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11561, IF_AVX|IF_SANDYBRIDGE},
- /* 2846 */ {I_VSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11568, IF_AVX|IF_SANDYBRIDGE},
- /* 2847 */ {I_VSUBPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11575, IF_AVX|IF_SANDYBRIDGE},
- /* 2848 */ {I_VSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11582, IF_AVX|IF_SANDYBRIDGE},
- /* 2849 */ {I_VSUBPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11589, IF_AVX|IF_SANDYBRIDGE},
- /* 2850 */ {I_VSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11596, IF_AVX|IF_SANDYBRIDGE},
- /* 2851 */ {I_VSUBPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11603, IF_AVX|IF_SANDYBRIDGE},
- /* 2852 */ {I_VSUBSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+11610, IF_AVX|IF_SANDYBRIDGE},
- /* 2853 */ {I_VSUBSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+11617, IF_AVX|IF_SANDYBRIDGE},
- /* 2854 */ {I_VSUBSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+11624, IF_AVX|IF_SANDYBRIDGE},
- /* 2855 */ {I_VSUBSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+11631, IF_AVX|IF_SANDYBRIDGE},
- /* 2856 */ {I_VTESTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11638, IF_AVX|IF_SANDYBRIDGE},
- /* 2857 */ {I_VTESTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11645, IF_AVX|IF_SANDYBRIDGE},
- /* 2858 */ {I_VTESTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11652, IF_AVX|IF_SANDYBRIDGE},
- /* 2859 */ {I_VTESTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11659, IF_AVX|IF_SANDYBRIDGE},
- /* 2860 */ {I_VUCOMISD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+11666, IF_AVX|IF_SANDYBRIDGE},
- /* 2861 */ {I_VUCOMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+11673, IF_AVX|IF_SANDYBRIDGE},
- /* 2862 */ {I_VUNPCKHPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11680, IF_AVX|IF_SANDYBRIDGE},
- /* 2863 */ {I_VUNPCKHPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11687, IF_AVX|IF_SANDYBRIDGE},
- /* 2864 */ {I_VUNPCKHPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11694, IF_AVX|IF_SANDYBRIDGE},
- /* 2865 */ {I_VUNPCKHPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11701, IF_AVX|IF_SANDYBRIDGE},
- /* 2866 */ {I_VUNPCKHPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11708, IF_AVX|IF_SANDYBRIDGE},
- /* 2867 */ {I_VUNPCKHPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11715, IF_AVX|IF_SANDYBRIDGE},
- /* 2868 */ {I_VUNPCKHPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11722, IF_AVX|IF_SANDYBRIDGE},
- /* 2869 */ {I_VUNPCKHPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11729, IF_AVX|IF_SANDYBRIDGE},
- /* 2870 */ {I_VUNPCKLPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11736, IF_AVX|IF_SANDYBRIDGE},
- /* 2871 */ {I_VUNPCKLPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11743, IF_AVX|IF_SANDYBRIDGE},
- /* 2872 */ {I_VUNPCKLPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11750, IF_AVX|IF_SANDYBRIDGE},
- /* 2873 */ {I_VUNPCKLPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11757, IF_AVX|IF_SANDYBRIDGE},
- /* 2874 */ {I_VUNPCKLPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11764, IF_AVX|IF_SANDYBRIDGE},
- /* 2875 */ {I_VUNPCKLPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11771, IF_AVX|IF_SANDYBRIDGE},
- /* 2876 */ {I_VUNPCKLPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11778, IF_AVX|IF_SANDYBRIDGE},
- /* 2877 */ {I_VUNPCKLPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11785, IF_AVX|IF_SANDYBRIDGE},
- /* 2878 */ {I_VXORPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11792, IF_AVX|IF_SANDYBRIDGE},
- /* 2879 */ {I_VXORPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11799, IF_AVX|IF_SANDYBRIDGE},
- /* 2880 */ {I_VXORPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11806, IF_AVX|IF_SANDYBRIDGE},
- /* 2881 */ {I_VXORPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11813, IF_AVX|IF_SANDYBRIDGE},
- /* 2882 */ {I_VXORPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11820, IF_AVX|IF_SANDYBRIDGE},
- /* 2883 */ {I_VXORPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11827, IF_AVX|IF_SANDYBRIDGE},
- /* 2884 */ {I_VXORPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11834, IF_AVX|IF_SANDYBRIDGE},
- /* 2885 */ {I_VXORPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11841, IF_AVX|IF_SANDYBRIDGE},
- /* 2886 */ {I_VZEROALL, 0, {0,0,0,0,0}, nasm_bytecodes+15560, IF_AVX|IF_SANDYBRIDGE},
- /* 2887 */ {I_VZEROUPPER, 0, {0,0,0,0,0}, nasm_bytecodes+15566, IF_AVX|IF_SANDYBRIDGE},
- /* 2888 */ {I_PCLMULLQLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3600, IF_SSE|IF_WESTMERE},
- /* 2889 */ {I_PCLMULHQLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3609, IF_SSE|IF_WESTMERE},
- /* 2890 */ {I_PCLMULLQHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3618, IF_SSE|IF_WESTMERE},
- /* 2891 */ {I_PCLMULHQHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3627, IF_SSE|IF_WESTMERE},
- /* 2892 */ {I_PCLMULQDQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6656, IF_SSE|IF_WESTMERE},
- /* 2893 */ {I_VPCLMULLQLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+3636, IF_AVX|IF_SANDYBRIDGE},
- /* 2894 */ {I_VPCLMULLQLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3645, IF_AVX|IF_SANDYBRIDGE},
- /* 2895 */ {I_VPCLMULHQLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+3654, IF_AVX|IF_SANDYBRIDGE},
- /* 2896 */ {I_VPCLMULHQLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3663, IF_AVX|IF_SANDYBRIDGE},
- /* 2897 */ {I_VPCLMULLQHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+3672, IF_AVX|IF_SANDYBRIDGE},
- /* 2898 */ {I_VPCLMULLQHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3681, IF_AVX|IF_SANDYBRIDGE},
- /* 2899 */ {I_VPCLMULHQHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+3690, IF_AVX|IF_SANDYBRIDGE},
- /* 2900 */ {I_VPCLMULHQHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3699, IF_AVX|IF_SANDYBRIDGE},
- /* 2901 */ {I_VPCLMULQDQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6664, IF_AVX|IF_SANDYBRIDGE},
- /* 2902 */ {I_VPCLMULQDQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6672, IF_AVX|IF_SANDYBRIDGE},
- /* 2903 */ {I_VFMADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11848, IF_FMA|IF_FUTURE},
- /* 2904 */ {I_VFMADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11855, IF_FMA|IF_FUTURE},
- /* 2905 */ {I_VFMADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11862, IF_FMA|IF_FUTURE},
- /* 2906 */ {I_VFMADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11869, IF_FMA|IF_FUTURE},
- /* 2907 */ {I_VFMADD312PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11848, IF_FMA|IF_FUTURE},
- /* 2908 */ {I_VFMADD312PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11855, IF_FMA|IF_FUTURE},
- /* 2909 */ {I_VFMADD312PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11862, IF_FMA|IF_FUTURE},
- /* 2910 */ {I_VFMADD312PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11869, IF_FMA|IF_FUTURE},
- /* 2911 */ {I_VFMADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11876, IF_FMA|IF_FUTURE},
- /* 2912 */ {I_VFMADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11883, IF_FMA|IF_FUTURE},
- /* 2913 */ {I_VFMADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11890, IF_FMA|IF_FUTURE},
- /* 2914 */ {I_VFMADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11897, IF_FMA|IF_FUTURE},
- /* 2915 */ {I_VFMADD123PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11876, IF_FMA|IF_FUTURE},
- /* 2916 */ {I_VFMADD123PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11883, IF_FMA|IF_FUTURE},
- /* 2917 */ {I_VFMADD123PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11890, IF_FMA|IF_FUTURE},
- /* 2918 */ {I_VFMADD123PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11897, IF_FMA|IF_FUTURE},
- /* 2919 */ {I_VFMADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11904, IF_FMA|IF_FUTURE},
- /* 2920 */ {I_VFMADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11911, IF_FMA|IF_FUTURE},
- /* 2921 */ {I_VFMADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11918, IF_FMA|IF_FUTURE},
- /* 2922 */ {I_VFMADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11925, IF_FMA|IF_FUTURE},
- /* 2923 */ {I_VFMADD321PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11904, IF_FMA|IF_FUTURE},
- /* 2924 */ {I_VFMADD321PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11911, IF_FMA|IF_FUTURE},
- /* 2925 */ {I_VFMADD321PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11918, IF_FMA|IF_FUTURE},
- /* 2926 */ {I_VFMADD321PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11925, IF_FMA|IF_FUTURE},
- /* 2927 */ {I_VFMADDSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11932, IF_FMA|IF_FUTURE},
- /* 2928 */ {I_VFMADDSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11939, IF_FMA|IF_FUTURE},
- /* 2929 */ {I_VFMADDSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11946, IF_FMA|IF_FUTURE},
- /* 2930 */ {I_VFMADDSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11953, IF_FMA|IF_FUTURE},
- /* 2931 */ {I_VFMADDSUB312PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11932, IF_FMA|IF_FUTURE},
- /* 2932 */ {I_VFMADDSUB312PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11939, IF_FMA|IF_FUTURE},
- /* 2933 */ {I_VFMADDSUB312PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11946, IF_FMA|IF_FUTURE},
- /* 2934 */ {I_VFMADDSUB312PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11953, IF_FMA|IF_FUTURE},
- /* 2935 */ {I_VFMADDSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11960, IF_FMA|IF_FUTURE},
- /* 2936 */ {I_VFMADDSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11967, IF_FMA|IF_FUTURE},
- /* 2937 */ {I_VFMADDSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11974, IF_FMA|IF_FUTURE},
- /* 2938 */ {I_VFMADDSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11981, IF_FMA|IF_FUTURE},
- /* 2939 */ {I_VFMADDSUB123PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11960, IF_FMA|IF_FUTURE},
- /* 2940 */ {I_VFMADDSUB123PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11967, IF_FMA|IF_FUTURE},
- /* 2941 */ {I_VFMADDSUB123PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11974, IF_FMA|IF_FUTURE},
- /* 2942 */ {I_VFMADDSUB123PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11981, IF_FMA|IF_FUTURE},
- /* 2943 */ {I_VFMADDSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11988, IF_FMA|IF_FUTURE},
- /* 2944 */ {I_VFMADDSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11995, IF_FMA|IF_FUTURE},
- /* 2945 */ {I_VFMADDSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12002, IF_FMA|IF_FUTURE},
- /* 2946 */ {I_VFMADDSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12009, IF_FMA|IF_FUTURE},
- /* 2947 */ {I_VFMADDSUB321PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11988, IF_FMA|IF_FUTURE},
- /* 2948 */ {I_VFMADDSUB321PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11995, IF_FMA|IF_FUTURE},
- /* 2949 */ {I_VFMADDSUB321PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12002, IF_FMA|IF_FUTURE},
- /* 2950 */ {I_VFMADDSUB321PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12009, IF_FMA|IF_FUTURE},
- /* 2951 */ {I_VFMSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12016, IF_FMA|IF_FUTURE},
- /* 2952 */ {I_VFMSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12023, IF_FMA|IF_FUTURE},
- /* 2953 */ {I_VFMSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12030, IF_FMA|IF_FUTURE},
- /* 2954 */ {I_VFMSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12037, IF_FMA|IF_FUTURE},
- /* 2955 */ {I_VFMSUB312PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12016, IF_FMA|IF_FUTURE},
- /* 2956 */ {I_VFMSUB312PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12023, IF_FMA|IF_FUTURE},
- /* 2957 */ {I_VFMSUB312PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12030, IF_FMA|IF_FUTURE},
- /* 2958 */ {I_VFMSUB312PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12037, IF_FMA|IF_FUTURE},
- /* 2959 */ {I_VFMSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12044, IF_FMA|IF_FUTURE},
- /* 2960 */ {I_VFMSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12051, IF_FMA|IF_FUTURE},
- /* 2961 */ {I_VFMSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12058, IF_FMA|IF_FUTURE},
- /* 2962 */ {I_VFMSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12065, IF_FMA|IF_FUTURE},
- /* 2963 */ {I_VFMSUB123PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12044, IF_FMA|IF_FUTURE},
- /* 2964 */ {I_VFMSUB123PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12051, IF_FMA|IF_FUTURE},
- /* 2965 */ {I_VFMSUB123PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12058, IF_FMA|IF_FUTURE},
- /* 2966 */ {I_VFMSUB123PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12065, IF_FMA|IF_FUTURE},
- /* 2967 */ {I_VFMSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12072, IF_FMA|IF_FUTURE},
- /* 2968 */ {I_VFMSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12079, IF_FMA|IF_FUTURE},
- /* 2969 */ {I_VFMSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12086, IF_FMA|IF_FUTURE},
- /* 2970 */ {I_VFMSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12093, IF_FMA|IF_FUTURE},
- /* 2971 */ {I_VFMSUB321PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12072, IF_FMA|IF_FUTURE},
- /* 2972 */ {I_VFMSUB321PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12079, IF_FMA|IF_FUTURE},
- /* 2973 */ {I_VFMSUB321PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12086, IF_FMA|IF_FUTURE},
- /* 2974 */ {I_VFMSUB321PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12093, IF_FMA|IF_FUTURE},
- /* 2975 */ {I_VFMSUBADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12100, IF_FMA|IF_FUTURE},
- /* 2976 */ {I_VFMSUBADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12107, IF_FMA|IF_FUTURE},
- /* 2977 */ {I_VFMSUBADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12114, IF_FMA|IF_FUTURE},
- /* 2978 */ {I_VFMSUBADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12121, IF_FMA|IF_FUTURE},
- /* 2979 */ {I_VFMSUBADD312PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12100, IF_FMA|IF_FUTURE},
- /* 2980 */ {I_VFMSUBADD312PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12107, IF_FMA|IF_FUTURE},
- /* 2981 */ {I_VFMSUBADD312PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12114, IF_FMA|IF_FUTURE},
- /* 2982 */ {I_VFMSUBADD312PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12121, IF_FMA|IF_FUTURE},
- /* 2983 */ {I_VFMSUBADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12128, IF_FMA|IF_FUTURE},
- /* 2984 */ {I_VFMSUBADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12135, IF_FMA|IF_FUTURE},
- /* 2985 */ {I_VFMSUBADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12142, IF_FMA|IF_FUTURE},
- /* 2986 */ {I_VFMSUBADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12149, IF_FMA|IF_FUTURE},
- /* 2987 */ {I_VFMSUBADD123PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12128, IF_FMA|IF_FUTURE},
- /* 2988 */ {I_VFMSUBADD123PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12135, IF_FMA|IF_FUTURE},
- /* 2989 */ {I_VFMSUBADD123PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12142, IF_FMA|IF_FUTURE},
- /* 2990 */ {I_VFMSUBADD123PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12149, IF_FMA|IF_FUTURE},
- /* 2991 */ {I_VFMSUBADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12156, IF_FMA|IF_FUTURE},
- /* 2992 */ {I_VFMSUBADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12163, IF_FMA|IF_FUTURE},
- /* 2993 */ {I_VFMSUBADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12170, IF_FMA|IF_FUTURE},
- /* 2994 */ {I_VFMSUBADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12177, IF_FMA|IF_FUTURE},
- /* 2995 */ {I_VFMSUBADD321PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12156, IF_FMA|IF_FUTURE},
- /* 2996 */ {I_VFMSUBADD321PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12163, IF_FMA|IF_FUTURE},
- /* 2997 */ {I_VFMSUBADD321PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12170, IF_FMA|IF_FUTURE},
- /* 2998 */ {I_VFMSUBADD321PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12177, IF_FMA|IF_FUTURE},
- /* 2999 */ {I_VFNMADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12184, IF_FMA|IF_FUTURE},
- /* 3000 */ {I_VFNMADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12191, IF_FMA|IF_FUTURE},
- /* 3001 */ {I_VFNMADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12198, IF_FMA|IF_FUTURE},
- /* 3002 */ {I_VFNMADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12205, IF_FMA|IF_FUTURE},
- /* 3003 */ {I_VFNMADD312PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12184, IF_FMA|IF_FUTURE},
- /* 3004 */ {I_VFNMADD312PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12191, IF_FMA|IF_FUTURE},
- /* 3005 */ {I_VFNMADD312PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12198, IF_FMA|IF_FUTURE},
- /* 3006 */ {I_VFNMADD312PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12205, IF_FMA|IF_FUTURE},
- /* 3007 */ {I_VFNMADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12212, IF_FMA|IF_FUTURE},
- /* 3008 */ {I_VFNMADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12219, IF_FMA|IF_FUTURE},
- /* 3009 */ {I_VFNMADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12226, IF_FMA|IF_FUTURE},
- /* 3010 */ {I_VFNMADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12233, IF_FMA|IF_FUTURE},
- /* 3011 */ {I_VFNMADD123PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12212, IF_FMA|IF_FUTURE},
- /* 3012 */ {I_VFNMADD123PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12219, IF_FMA|IF_FUTURE},
- /* 3013 */ {I_VFNMADD123PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12226, IF_FMA|IF_FUTURE},
- /* 3014 */ {I_VFNMADD123PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12233, IF_FMA|IF_FUTURE},
- /* 3015 */ {I_VFNMADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12240, IF_FMA|IF_FUTURE},
- /* 3016 */ {I_VFNMADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12247, IF_FMA|IF_FUTURE},
- /* 3017 */ {I_VFNMADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12254, IF_FMA|IF_FUTURE},
- /* 3018 */ {I_VFNMADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12261, IF_FMA|IF_FUTURE},
- /* 3019 */ {I_VFNMADD321PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12240, IF_FMA|IF_FUTURE},
- /* 3020 */ {I_VFNMADD321PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12247, IF_FMA|IF_FUTURE},
- /* 3021 */ {I_VFNMADD321PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12254, IF_FMA|IF_FUTURE},
- /* 3022 */ {I_VFNMADD321PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12261, IF_FMA|IF_FUTURE},
- /* 3023 */ {I_VFNMSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12268, IF_FMA|IF_FUTURE},
- /* 3024 */ {I_VFNMSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12275, IF_FMA|IF_FUTURE},
- /* 3025 */ {I_VFNMSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12282, IF_FMA|IF_FUTURE},
- /* 3026 */ {I_VFNMSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12289, IF_FMA|IF_FUTURE},
- /* 3027 */ {I_VFNMSUB312PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12268, IF_FMA|IF_FUTURE},
- /* 3028 */ {I_VFNMSUB312PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12275, IF_FMA|IF_FUTURE},
- /* 3029 */ {I_VFNMSUB312PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12282, IF_FMA|IF_FUTURE},
- /* 3030 */ {I_VFNMSUB312PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12289, IF_FMA|IF_FUTURE},
- /* 3031 */ {I_VFNMSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12296, IF_FMA|IF_FUTURE},
- /* 3032 */ {I_VFNMSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12303, IF_FMA|IF_FUTURE},
- /* 3033 */ {I_VFNMSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12310, IF_FMA|IF_FUTURE},
- /* 3034 */ {I_VFNMSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12317, IF_FMA|IF_FUTURE},
- /* 3035 */ {I_VFNMSUB123PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12296, IF_FMA|IF_FUTURE},
- /* 3036 */ {I_VFNMSUB123PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12303, IF_FMA|IF_FUTURE},
- /* 3037 */ {I_VFNMSUB123PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12310, IF_FMA|IF_FUTURE},
- /* 3038 */ {I_VFNMSUB123PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12317, IF_FMA|IF_FUTURE},
- /* 3039 */ {I_VFNMSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12324, IF_FMA|IF_FUTURE},
- /* 3040 */ {I_VFNMSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12331, IF_FMA|IF_FUTURE},
- /* 3041 */ {I_VFNMSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12338, IF_FMA|IF_FUTURE},
- /* 3042 */ {I_VFNMSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12345, IF_FMA|IF_FUTURE},
- /* 3043 */ {I_VFNMSUB321PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12324, IF_FMA|IF_FUTURE},
- /* 3044 */ {I_VFNMSUB321PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12331, IF_FMA|IF_FUTURE},
- /* 3045 */ {I_VFNMSUB321PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12338, IF_FMA|IF_FUTURE},
- /* 3046 */ {I_VFNMSUB321PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12345, IF_FMA|IF_FUTURE},
- /* 3047 */ {I_VFMADD132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12352, IF_FMA|IF_FUTURE},
- /* 3048 */ {I_VFMADD132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12359, IF_FMA|IF_FUTURE},
- /* 3049 */ {I_VFMADD312SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12352, IF_FMA|IF_FUTURE},
- /* 3050 */ {I_VFMADD312SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12359, IF_FMA|IF_FUTURE},
- /* 3051 */ {I_VFMADD213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12366, IF_FMA|IF_FUTURE},
- /* 3052 */ {I_VFMADD213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12373, IF_FMA|IF_FUTURE},
- /* 3053 */ {I_VFMADD123SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12366, IF_FMA|IF_FUTURE},
- /* 3054 */ {I_VFMADD123SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12373, IF_FMA|IF_FUTURE},
- /* 3055 */ {I_VFMADD231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12380, IF_FMA|IF_FUTURE},
- /* 3056 */ {I_VFMADD231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12387, IF_FMA|IF_FUTURE},
- /* 3057 */ {I_VFMADD321SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12380, IF_FMA|IF_FUTURE},
- /* 3058 */ {I_VFMADD321SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12387, IF_FMA|IF_FUTURE},
- /* 3059 */ {I_VFMSUB132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12394, IF_FMA|IF_FUTURE},
- /* 3060 */ {I_VFMSUB132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12401, IF_FMA|IF_FUTURE},
- /* 3061 */ {I_VFMSUB312SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12394, IF_FMA|IF_FUTURE},
- /* 3062 */ {I_VFMSUB312SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12401, IF_FMA|IF_FUTURE},
- /* 3063 */ {I_VFMSUB213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12408, IF_FMA|IF_FUTURE},
- /* 3064 */ {I_VFMSUB213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12415, IF_FMA|IF_FUTURE},
- /* 3065 */ {I_VFMSUB123SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12408, IF_FMA|IF_FUTURE},
- /* 3066 */ {I_VFMSUB123SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12415, IF_FMA|IF_FUTURE},
- /* 3067 */ {I_VFMSUB231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12422, IF_FMA|IF_FUTURE},
- /* 3068 */ {I_VFMSUB231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12429, IF_FMA|IF_FUTURE},
- /* 3069 */ {I_VFMSUB321SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12422, IF_FMA|IF_FUTURE},
- /* 3070 */ {I_VFMSUB321SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12429, IF_FMA|IF_FUTURE},
- /* 3071 */ {I_VFNMADD132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12436, IF_FMA|IF_FUTURE},
- /* 3072 */ {I_VFNMADD132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12443, IF_FMA|IF_FUTURE},
- /* 3073 */ {I_VFNMADD312SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12436, IF_FMA|IF_FUTURE},
- /* 3074 */ {I_VFNMADD312SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12443, IF_FMA|IF_FUTURE},
- /* 3075 */ {I_VFNMADD213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12450, IF_FMA|IF_FUTURE},
- /* 3076 */ {I_VFNMADD213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12457, IF_FMA|IF_FUTURE},
- /* 3077 */ {I_VFNMADD123SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12450, IF_FMA|IF_FUTURE},
- /* 3078 */ {I_VFNMADD123SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12457, IF_FMA|IF_FUTURE},
- /* 3079 */ {I_VFNMADD231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12464, IF_FMA|IF_FUTURE},
- /* 3080 */ {I_VFNMADD231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12471, IF_FMA|IF_FUTURE},
- /* 3081 */ {I_VFNMADD321SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12464, IF_FMA|IF_FUTURE},
- /* 3082 */ {I_VFNMADD321SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12471, IF_FMA|IF_FUTURE},
- /* 3083 */ {I_VFNMSUB132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12478, IF_FMA|IF_FUTURE},
- /* 3084 */ {I_VFNMSUB132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12485, IF_FMA|IF_FUTURE},
- /* 3085 */ {I_VFNMSUB312SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12478, IF_FMA|IF_FUTURE},
- /* 3086 */ {I_VFNMSUB312SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12485, IF_FMA|IF_FUTURE},
- /* 3087 */ {I_VFNMSUB213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12492, IF_FMA|IF_FUTURE},
- /* 3088 */ {I_VFNMSUB213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12499, IF_FMA|IF_FUTURE},
- /* 3089 */ {I_VFNMSUB123SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12492, IF_FMA|IF_FUTURE},
- /* 3090 */ {I_VFNMSUB123SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12499, IF_FMA|IF_FUTURE},
- /* 3091 */ {I_VFNMSUB231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12506, IF_FMA|IF_FUTURE},
- /* 3092 */ {I_VFNMSUB231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12513, IF_FMA|IF_FUTURE},
- /* 3093 */ {I_VFNMSUB321SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12506, IF_FMA|IF_FUTURE},
- /* 3094 */ {I_VFNMSUB321SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12513, IF_FMA|IF_FUTURE},
- /* 3095 */ {I_RDFSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+12521, IF_LONG|IF_FUTURE},
- /* 3096 */ {I_RDFSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+12520, IF_LONG|IF_FUTURE},
- /* 3097 */ {I_RDGSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+12528, IF_LONG|IF_FUTURE},
- /* 3098 */ {I_RDGSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+12527, IF_LONG|IF_FUTURE},
- /* 3099 */ {I_RDRAND, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15572, IF_FUTURE},
- /* 3100 */ {I_RDRAND, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15578, IF_FUTURE},
- /* 3101 */ {I_RDRAND, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15584, IF_LONG|IF_FUTURE},
- /* 3102 */ {I_WRFSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+12535, IF_LONG|IF_FUTURE},
- /* 3103 */ {I_WRFSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+12534, IF_LONG|IF_FUTURE},
- /* 3104 */ {I_WRGSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+12542, IF_LONG|IF_FUTURE},
- /* 3105 */ {I_WRGSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+12541, IF_LONG|IF_FUTURE},
- /* 3106 */ {I_VCVTPH2PS, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12548, IF_AVX|IF_FUTURE},
- /* 3107 */ {I_VCVTPH2PS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+12555, IF_AVX|IF_FUTURE},
- /* 3108 */ {I_VCVTPS2PH, 3, {RM_XMM|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6680, IF_AVX|IF_FUTURE},
- /* 3109 */ {I_VCVTPS2PH, 3, {RM_XMM|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6688, IF_AVX|IF_FUTURE},
- /* 3110 */ {I_XSTORE, 0, {0,0,0,0,0}, nasm_bytecodes+18627, IF_PENT|IF_CYRIX},
- /* 3111 */ {I_XCRYPTECB, 0, {0,0,0,0,0}, nasm_bytecodes+15590, IF_PENT|IF_CYRIX},
- /* 3112 */ {I_XCRYPTCBC, 0, {0,0,0,0,0}, nasm_bytecodes+15596, IF_PENT|IF_CYRIX},
- /* 3113 */ {I_XCRYPTCTR, 0, {0,0,0,0,0}, nasm_bytecodes+15602, IF_PENT|IF_CYRIX},
- /* 3114 */ {I_XCRYPTCFB, 0, {0,0,0,0,0}, nasm_bytecodes+15608, IF_PENT|IF_CYRIX},
- /* 3115 */ {I_XCRYPTOFB, 0, {0,0,0,0,0}, nasm_bytecodes+15614, IF_PENT|IF_CYRIX},
- /* 3116 */ {I_MONTMUL, 0, {0,0,0,0,0}, nasm_bytecodes+15620, IF_PENT|IF_CYRIX},
- /* 3117 */ {I_XSHA1, 0, {0,0,0,0,0}, nasm_bytecodes+15626, IF_PENT|IF_CYRIX},
- /* 3118 */ {I_XSHA256, 0, {0,0,0,0,0}, nasm_bytecodes+15632, IF_PENT|IF_CYRIX},
- /* 3119 */ {I_LLWPCB, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+12562, IF_AMD|IF_386},
- /* 3120 */ {I_LLWPCB, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+12569, IF_AMD|IF_X64},
- /* 3121 */ {I_SLWPCB, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+12576, IF_AMD|IF_386},
- /* 3122 */ {I_SLWPCB, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+12583, IF_AMD|IF_X64},
- /* 3123 */ {I_LWPVAL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+6696, IF_AMD|IF_386},
- /* 3124 */ {I_LWPVAL, 3, {REG_GPR|BITS64,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+6704, IF_AMD|IF_X64},
- /* 3125 */ {I_LWPINS, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+6712, IF_AMD|IF_386},
- /* 3126 */ {I_LWPINS, 3, {REG_GPR|BITS64,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+6720, IF_AMD|IF_X64},
- /* 3127 */ {I_VFMADDPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+3708, IF_AMD|IF_SSE5},
- /* 3128 */ {I_VFMADDPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+3717, IF_AMD|IF_SSE5},
- /* 3129 */ {I_VFMADDPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+3726, IF_AMD|IF_SSE5},
- /* 3130 */ {I_VFMADDPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+3735, IF_AMD|IF_SSE5},
- /* 3131 */ {I_VFMADDPD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+3744, IF_AMD|IF_SSE5},
- /* 3132 */ {I_VFMADDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+3753, IF_AMD|IF_SSE5},
- /* 3133 */ {I_VFMADDPD, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+3762, IF_AMD|IF_SSE5},
- /* 3134 */ {I_VFMADDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+3771, IF_AMD|IF_SSE5},
- /* 3135 */ {I_VFMADDPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+3780, IF_AMD|IF_SSE5},
- /* 3136 */ {I_VFMADDPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+3789, IF_AMD|IF_SSE5},
- /* 3137 */ {I_VFMADDPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+3798, IF_AMD|IF_SSE5},
- /* 3138 */ {I_VFMADDPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+3807, IF_AMD|IF_SSE5},
- /* 3139 */ {I_VFMADDPS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+3816, IF_AMD|IF_SSE5},
- /* 3140 */ {I_VFMADDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+3825, IF_AMD|IF_SSE5},
- /* 3141 */ {I_VFMADDPS, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+3834, IF_AMD|IF_SSE5},
- /* 3142 */ {I_VFMADDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+3843, IF_AMD|IF_SSE5},
- /* 3143 */ {I_VFMADDSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,XMMREG,0}, nasm_bytecodes+3852, IF_AMD|IF_SSE5},
- /* 3144 */ {I_VFMADDSD, 3, {XMMREG,RM_XMM|BITS64,XMMREG,0,0}, nasm_bytecodes+3861, IF_AMD|IF_SSE5},
- /* 3145 */ {I_VFMADDSD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS64,0}, nasm_bytecodes+3870, IF_AMD|IF_SSE5},
- /* 3146 */ {I_VFMADDSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3879, IF_AMD|IF_SSE5},
- /* 3147 */ {I_VFMADDSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,XMMREG,0}, nasm_bytecodes+3888, IF_AMD|IF_SSE5},
- /* 3148 */ {I_VFMADDSS, 3, {XMMREG,RM_XMM|BITS32,XMMREG,0,0}, nasm_bytecodes+3897, IF_AMD|IF_SSE5},
- /* 3149 */ {I_VFMADDSS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS32,0}, nasm_bytecodes+3906, IF_AMD|IF_SSE5},
- /* 3150 */ {I_VFMADDSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+3915, IF_AMD|IF_SSE5},
- /* 3151 */ {I_VFMADDSUBPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+3924, IF_AMD|IF_SSE5},
- /* 3152 */ {I_VFMADDSUBPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+3933, IF_AMD|IF_SSE5},
- /* 3153 */ {I_VFMADDSUBPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+3942, IF_AMD|IF_SSE5},
- /* 3154 */ {I_VFMADDSUBPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+3951, IF_AMD|IF_SSE5},
- /* 3155 */ {I_VFMADDSUBPD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+3960, IF_AMD|IF_SSE5},
- /* 3156 */ {I_VFMADDSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+3969, IF_AMD|IF_SSE5},
- /* 3157 */ {I_VFMADDSUBPD, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+3978, IF_AMD|IF_SSE5},
- /* 3158 */ {I_VFMADDSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+3987, IF_AMD|IF_SSE5},
- /* 3159 */ {I_VFMADDSUBPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+3996, IF_AMD|IF_SSE5},
- /* 3160 */ {I_VFMADDSUBPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4005, IF_AMD|IF_SSE5},
- /* 3161 */ {I_VFMADDSUBPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+4014, IF_AMD|IF_SSE5},
- /* 3162 */ {I_VFMADDSUBPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+4023, IF_AMD|IF_SSE5},
- /* 3163 */ {I_VFMADDSUBPS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+4032, IF_AMD|IF_SSE5},
- /* 3164 */ {I_VFMADDSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+4041, IF_AMD|IF_SSE5},
- /* 3165 */ {I_VFMADDSUBPS, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+4050, IF_AMD|IF_SSE5},
- /* 3166 */ {I_VFMADDSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+4059, IF_AMD|IF_SSE5},
- /* 3167 */ {I_VFMSUBADDPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4068, IF_AMD|IF_SSE5},
- /* 3168 */ {I_VFMSUBADDPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4077, IF_AMD|IF_SSE5},
- /* 3169 */ {I_VFMSUBADDPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+4086, IF_AMD|IF_SSE5},
- /* 3170 */ {I_VFMSUBADDPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+4095, IF_AMD|IF_SSE5},
- /* 3171 */ {I_VFMSUBADDPD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+4104, IF_AMD|IF_SSE5},
- /* 3172 */ {I_VFMSUBADDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+4113, IF_AMD|IF_SSE5},
- /* 3173 */ {I_VFMSUBADDPD, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+4122, IF_AMD|IF_SSE5},
- /* 3174 */ {I_VFMSUBADDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+4131, IF_AMD|IF_SSE5},
- /* 3175 */ {I_VFMSUBADDPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4140, IF_AMD|IF_SSE5},
- /* 3176 */ {I_VFMSUBADDPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4149, IF_AMD|IF_SSE5},
- /* 3177 */ {I_VFMSUBADDPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+4158, IF_AMD|IF_SSE5},
- /* 3178 */ {I_VFMSUBADDPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+4167, IF_AMD|IF_SSE5},
- /* 3179 */ {I_VFMSUBADDPS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+4176, IF_AMD|IF_SSE5},
- /* 3180 */ {I_VFMSUBADDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+4185, IF_AMD|IF_SSE5},
- /* 3181 */ {I_VFMSUBADDPS, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+4194, IF_AMD|IF_SSE5},
- /* 3182 */ {I_VFMSUBADDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+4203, IF_AMD|IF_SSE5},
- /* 3183 */ {I_VFMSUBPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4212, IF_AMD|IF_SSE5},
- /* 3184 */ {I_VFMSUBPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4221, IF_AMD|IF_SSE5},
- /* 3185 */ {I_VFMSUBPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+4230, IF_AMD|IF_SSE5},
- /* 3186 */ {I_VFMSUBPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+4239, IF_AMD|IF_SSE5},
- /* 3187 */ {I_VFMSUBPD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+4248, IF_AMD|IF_SSE5},
- /* 3188 */ {I_VFMSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+4257, IF_AMD|IF_SSE5},
- /* 3189 */ {I_VFMSUBPD, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+4266, IF_AMD|IF_SSE5},
- /* 3190 */ {I_VFMSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+4275, IF_AMD|IF_SSE5},
- /* 3191 */ {I_VFMSUBPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4284, IF_AMD|IF_SSE5},
- /* 3192 */ {I_VFMSUBPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4293, IF_AMD|IF_SSE5},
- /* 3193 */ {I_VFMSUBPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+4302, IF_AMD|IF_SSE5},
- /* 3194 */ {I_VFMSUBPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+4311, IF_AMD|IF_SSE5},
- /* 3195 */ {I_VFMSUBPS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+4320, IF_AMD|IF_SSE5},
- /* 3196 */ {I_VFMSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+4329, IF_AMD|IF_SSE5},
- /* 3197 */ {I_VFMSUBPS, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+4338, IF_AMD|IF_SSE5},
- /* 3198 */ {I_VFMSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+4347, IF_AMD|IF_SSE5},
- /* 3199 */ {I_VFMSUBSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,XMMREG,0}, nasm_bytecodes+4356, IF_AMD|IF_SSE5},
- /* 3200 */ {I_VFMSUBSD, 3, {XMMREG,RM_XMM|BITS64,XMMREG,0,0}, nasm_bytecodes+4365, IF_AMD|IF_SSE5},
- /* 3201 */ {I_VFMSUBSD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS64,0}, nasm_bytecodes+4374, IF_AMD|IF_SSE5},
- /* 3202 */ {I_VFMSUBSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+4383, IF_AMD|IF_SSE5},
- /* 3203 */ {I_VFMSUBSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,XMMREG,0}, nasm_bytecodes+4392, IF_AMD|IF_SSE5},
- /* 3204 */ {I_VFMSUBSS, 3, {XMMREG,RM_XMM|BITS32,XMMREG,0,0}, nasm_bytecodes+4401, IF_AMD|IF_SSE5},
- /* 3205 */ {I_VFMSUBSS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS32,0}, nasm_bytecodes+4410, IF_AMD|IF_SSE5},
- /* 3206 */ {I_VFMSUBSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+4419, IF_AMD|IF_SSE5},
- /* 3207 */ {I_VFNMADDPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4428, IF_AMD|IF_SSE5},
- /* 3208 */ {I_VFNMADDPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4437, IF_AMD|IF_SSE5},
- /* 3209 */ {I_VFNMADDPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+4446, IF_AMD|IF_SSE5},
- /* 3210 */ {I_VFNMADDPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+4455, IF_AMD|IF_SSE5},
- /* 3211 */ {I_VFNMADDPD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+4464, IF_AMD|IF_SSE5},
- /* 3212 */ {I_VFNMADDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+4473, IF_AMD|IF_SSE5},
- /* 3213 */ {I_VFNMADDPD, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+4482, IF_AMD|IF_SSE5},
- /* 3214 */ {I_VFNMADDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+4491, IF_AMD|IF_SSE5},
- /* 3215 */ {I_VFNMADDPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4500, IF_AMD|IF_SSE5},
- /* 3216 */ {I_VFNMADDPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4509, IF_AMD|IF_SSE5},
- /* 3217 */ {I_VFNMADDPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+4518, IF_AMD|IF_SSE5},
- /* 3218 */ {I_VFNMADDPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+4527, IF_AMD|IF_SSE5},
- /* 3219 */ {I_VFNMADDPS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+4536, IF_AMD|IF_SSE5},
- /* 3220 */ {I_VFNMADDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+4545, IF_AMD|IF_SSE5},
- /* 3221 */ {I_VFNMADDPS, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+4554, IF_AMD|IF_SSE5},
- /* 3222 */ {I_VFNMADDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+4563, IF_AMD|IF_SSE5},
- /* 3223 */ {I_VFNMADDSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,XMMREG,0}, nasm_bytecodes+4572, IF_AMD|IF_SSE5},
- /* 3224 */ {I_VFNMADDSD, 3, {XMMREG,RM_XMM|BITS64,XMMREG,0,0}, nasm_bytecodes+4581, IF_AMD|IF_SSE5},
- /* 3225 */ {I_VFNMADDSD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS64,0}, nasm_bytecodes+4590, IF_AMD|IF_SSE5},
- /* 3226 */ {I_VFNMADDSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+4599, IF_AMD|IF_SSE5},
- /* 3227 */ {I_VFNMADDSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,XMMREG,0}, nasm_bytecodes+4608, IF_AMD|IF_SSE5},
- /* 3228 */ {I_VFNMADDSS, 3, {XMMREG,RM_XMM|BITS32,XMMREG,0,0}, nasm_bytecodes+4617, IF_AMD|IF_SSE5},
- /* 3229 */ {I_VFNMADDSS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS32,0}, nasm_bytecodes+4626, IF_AMD|IF_SSE5},
- /* 3230 */ {I_VFNMADDSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+4635, IF_AMD|IF_SSE5},
- /* 3231 */ {I_VFNMSUBPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4644, IF_AMD|IF_SSE5},
- /* 3232 */ {I_VFNMSUBPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4653, IF_AMD|IF_SSE5},
- /* 3233 */ {I_VFNMSUBPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+4662, IF_AMD|IF_SSE5},
- /* 3234 */ {I_VFNMSUBPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+4671, IF_AMD|IF_SSE5},
- /* 3235 */ {I_VFNMSUBPD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+4680, IF_AMD|IF_SSE5},
- /* 3236 */ {I_VFNMSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+4689, IF_AMD|IF_SSE5},
- /* 3237 */ {I_VFNMSUBPD, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+4698, IF_AMD|IF_SSE5},
- /* 3238 */ {I_VFNMSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+4707, IF_AMD|IF_SSE5},
- /* 3239 */ {I_VFNMSUBPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4716, IF_AMD|IF_SSE5},
- /* 3240 */ {I_VFNMSUBPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4725, IF_AMD|IF_SSE5},
- /* 3241 */ {I_VFNMSUBPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+4734, IF_AMD|IF_SSE5},
- /* 3242 */ {I_VFNMSUBPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+4743, IF_AMD|IF_SSE5},
- /* 3243 */ {I_VFNMSUBPS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+4752, IF_AMD|IF_SSE5},
- /* 3244 */ {I_VFNMSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+4761, IF_AMD|IF_SSE5},
- /* 3245 */ {I_VFNMSUBPS, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+4770, IF_AMD|IF_SSE5},
- /* 3246 */ {I_VFNMSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+4779, IF_AMD|IF_SSE5},
- /* 3247 */ {I_VFNMSUBSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,XMMREG,0}, nasm_bytecodes+4788, IF_AMD|IF_SSE5},
- /* 3248 */ {I_VFNMSUBSD, 3, {XMMREG,RM_XMM|BITS64,XMMREG,0,0}, nasm_bytecodes+4797, IF_AMD|IF_SSE5},
- /* 3249 */ {I_VFNMSUBSD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS64,0}, nasm_bytecodes+4806, IF_AMD|IF_SSE5},
- /* 3250 */ {I_VFNMSUBSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+4815, IF_AMD|IF_SSE5},
- /* 3251 */ {I_VFNMSUBSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,XMMREG,0}, nasm_bytecodes+4824, IF_AMD|IF_SSE5},
- /* 3252 */ {I_VFNMSUBSS, 3, {XMMREG,RM_XMM|BITS32,XMMREG,0,0}, nasm_bytecodes+4833, IF_AMD|IF_SSE5},
- /* 3253 */ {I_VFNMSUBSS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS32,0}, nasm_bytecodes+4842, IF_AMD|IF_SSE5},
- /* 3254 */ {I_VFNMSUBSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+4851, IF_AMD|IF_SSE5},
- /* 3255 */ {I_VFRCZPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12590, IF_AMD|IF_SSE5},
- /* 3256 */ {I_VFRCZPD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12597, IF_AMD|IF_SSE5},
- /* 3257 */ {I_VFRCZPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12604, IF_AMD|IF_SSE5},
- /* 3258 */ {I_VFRCZPD, 1, {YMMREG,0,0,0,0}, nasm_bytecodes+12611, IF_AMD|IF_SSE5},
- /* 3259 */ {I_VFRCZPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12618, IF_AMD|IF_SSE5},
- /* 3260 */ {I_VFRCZPS, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12625, IF_AMD|IF_SSE5},
- /* 3261 */ {I_VFRCZPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12632, IF_AMD|IF_SSE5},
- /* 3262 */ {I_VFRCZPS, 1, {YMMREG,0,0,0,0}, nasm_bytecodes+12639, IF_AMD|IF_SSE5},
- /* 3263 */ {I_VFRCZSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+12646, IF_AMD|IF_SSE5},
- /* 3264 */ {I_VFRCZSD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12653, IF_AMD|IF_SSE5},
- /* 3265 */ {I_VFRCZSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+12660, IF_AMD|IF_SSE5},
- /* 3266 */ {I_VFRCZSS, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12667, IF_AMD|IF_SSE5},
- /* 3267 */ {I_VPCMOV, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4860, IF_AMD|IF_SSE5},
- /* 3268 */ {I_VPCMOV, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4869, IF_AMD|IF_SSE5},
- /* 3269 */ {I_VPCMOV, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+4878, IF_AMD|IF_SSE5},
- /* 3270 */ {I_VPCMOV, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+4887, IF_AMD|IF_SSE5},
- /* 3271 */ {I_VPCMOV, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+4896, IF_AMD|IF_SSE5},
- /* 3272 */ {I_VPCMOV, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+4905, IF_AMD|IF_SSE5},
- /* 3273 */ {I_VPCMOV, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+4914, IF_AMD|IF_SSE5},
- /* 3274 */ {I_VPCMOV, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+4923, IF_AMD|IF_SSE5},
- /* 3275 */ {I_VPCOMB, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6728, IF_AMD|IF_SSE5},
- /* 3276 */ {I_VPCOMB, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6736, IF_AMD|IF_SSE5},
- /* 3277 */ {I_VPCOMD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6744, IF_AMD|IF_SSE5},
- /* 3278 */ {I_VPCOMD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6752, IF_AMD|IF_SSE5},
- /* 3279 */ {I_VPCOMQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6760, IF_AMD|IF_SSE5},
- /* 3280 */ {I_VPCOMQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6768, IF_AMD|IF_SSE5},
- /* 3281 */ {I_VPCOMUB, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6776, IF_AMD|IF_SSE5},
- /* 3282 */ {I_VPCOMUB, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6784, IF_AMD|IF_SSE5},
- /* 3283 */ {I_VPCOMUD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6792, IF_AMD|IF_SSE5},
- /* 3284 */ {I_VPCOMUD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6800, IF_AMD|IF_SSE5},
- /* 3285 */ {I_VPCOMUQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6808, IF_AMD|IF_SSE5},
- /* 3286 */ {I_VPCOMUQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6816, IF_AMD|IF_SSE5},
- /* 3287 */ {I_VPCOMUW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6824, IF_AMD|IF_SSE5},
- /* 3288 */ {I_VPCOMUW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6832, IF_AMD|IF_SSE5},
- /* 3289 */ {I_VPCOMW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6840, IF_AMD|IF_SSE5},
- /* 3290 */ {I_VPCOMW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6848, IF_AMD|IF_SSE5},
- /* 3291 */ {I_VPHADDBD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12674, IF_AMD|IF_SSE5},
- /* 3292 */ {I_VPHADDBD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12681, IF_AMD|IF_SSE5},
- /* 3293 */ {I_VPHADDBQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12688, IF_AMD|IF_SSE5},
- /* 3294 */ {I_VPHADDBQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12695, IF_AMD|IF_SSE5},
- /* 3295 */ {I_VPHADDBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12702, IF_AMD|IF_SSE5},
- /* 3296 */ {I_VPHADDBW, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12709, IF_AMD|IF_SSE5},
- /* 3297 */ {I_VPHADDDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12716, IF_AMD|IF_SSE5},
- /* 3298 */ {I_VPHADDDQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12723, IF_AMD|IF_SSE5},
- /* 3299 */ {I_VPHADDUBD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12730, IF_AMD|IF_SSE5},
- /* 3300 */ {I_VPHADDUBD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12737, IF_AMD|IF_SSE5},
- /* 3301 */ {I_VPHADDUBQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12744, IF_AMD|IF_SSE5},
- /* 3302 */ {I_VPHADDUBQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12751, IF_AMD|IF_SSE5},
- /* 3303 */ {I_VPHADDUBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12758, IF_AMD|IF_SSE5},
- /* 3304 */ {I_VPHADDUBW, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12765, IF_AMD|IF_SSE5},
- /* 3305 */ {I_VPHADDUDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12772, IF_AMD|IF_SSE5},
- /* 3306 */ {I_VPHADDUDQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12779, IF_AMD|IF_SSE5},
- /* 3307 */ {I_VPHADDUWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12786, IF_AMD|IF_SSE5},
- /* 3308 */ {I_VPHADDUWD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12793, IF_AMD|IF_SSE5},
- /* 3309 */ {I_VPHADDUWQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12800, IF_AMD|IF_SSE5},
- /* 3310 */ {I_VPHADDUWQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12807, IF_AMD|IF_SSE5},
- /* 3311 */ {I_VPHADDWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12814, IF_AMD|IF_SSE5},
- /* 3312 */ {I_VPHADDWD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12821, IF_AMD|IF_SSE5},
- /* 3313 */ {I_VPHADDWQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12828, IF_AMD|IF_SSE5},
- /* 3314 */ {I_VPHADDWQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12835, IF_AMD|IF_SSE5},
- /* 3315 */ {I_VPHSUBBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12842, IF_AMD|IF_SSE5},
- /* 3316 */ {I_VPHSUBBW, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12849, IF_AMD|IF_SSE5},
- /* 3317 */ {I_VPHSUBDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12856, IF_AMD|IF_SSE5},
- /* 3318 */ {I_VPHSUBDQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12863, IF_AMD|IF_SSE5},
- /* 3319 */ {I_VPHSUBWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12870, IF_AMD|IF_SSE5},
- /* 3320 */ {I_VPHSUBWD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+12877, IF_AMD|IF_SSE5},
- /* 3321 */ {I_VPMACSDD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4932, IF_AMD|IF_SSE5},
- /* 3322 */ {I_VPMACSDD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4941, IF_AMD|IF_SSE5},
- /* 3323 */ {I_VPMACSDQH, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4950, IF_AMD|IF_SSE5},
- /* 3324 */ {I_VPMACSDQH, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4959, IF_AMD|IF_SSE5},
- /* 3325 */ {I_VPMACSDQL, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4968, IF_AMD|IF_SSE5},
- /* 3326 */ {I_VPMACSDQL, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4977, IF_AMD|IF_SSE5},
- /* 3327 */ {I_VPMACSSDD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4986, IF_AMD|IF_SSE5},
- /* 3328 */ {I_VPMACSSDD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4995, IF_AMD|IF_SSE5},
- /* 3329 */ {I_VPMACSSDQH, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5004, IF_AMD|IF_SSE5},
- /* 3330 */ {I_VPMACSSDQH, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5013, IF_AMD|IF_SSE5},
- /* 3331 */ {I_VPMACSSDQL, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5022, IF_AMD|IF_SSE5},
- /* 3332 */ {I_VPMACSSDQL, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5031, IF_AMD|IF_SSE5},
- /* 3333 */ {I_VPMACSSWD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5040, IF_AMD|IF_SSE5},
- /* 3334 */ {I_VPMACSSWD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5049, IF_AMD|IF_SSE5},
- /* 3335 */ {I_VPMACSSWW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5058, IF_AMD|IF_SSE5},
- /* 3336 */ {I_VPMACSSWW, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5067, IF_AMD|IF_SSE5},
- /* 3337 */ {I_VPMACSWD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5076, IF_AMD|IF_SSE5},
- /* 3338 */ {I_VPMACSWD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5085, IF_AMD|IF_SSE5},
- /* 3339 */ {I_VPMACSWW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5094, IF_AMD|IF_SSE5},
- /* 3340 */ {I_VPMACSWW, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5103, IF_AMD|IF_SSE5},
- /* 3341 */ {I_VPMADCSSWD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5112, IF_AMD|IF_SSE5},
- /* 3342 */ {I_VPMADCSSWD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5121, IF_AMD|IF_SSE5},
- /* 3343 */ {I_VPMADCSWD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5130, IF_AMD|IF_SSE5},
- /* 3344 */ {I_VPMADCSWD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5139, IF_AMD|IF_SSE5},
- /* 3345 */ {I_VPPERM, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+5148, IF_AMD|IF_SSE5},
- /* 3346 */ {I_VPPERM, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+5157, IF_AMD|IF_SSE5},
- /* 3347 */ {I_VPPERM, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5166, IF_AMD|IF_SSE5},
- /* 3348 */ {I_VPPERM, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5175, IF_AMD|IF_SSE5},
- /* 3349 */ {I_VPROTB, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+12884, IF_AMD|IF_SSE5},
- /* 3350 */ {I_VPROTB, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+12891, IF_AMD|IF_SSE5},
- /* 3351 */ {I_VPROTB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12898, IF_AMD|IF_SSE5},
- /* 3352 */ {I_VPROTB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12905, IF_AMD|IF_SSE5},
- /* 3353 */ {I_VPROTB, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6856, IF_AMD|IF_SSE5},
- /* 3354 */ {I_VPROTB, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6864, IF_AMD|IF_SSE5},
- /* 3355 */ {I_VPROTD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+12912, IF_AMD|IF_SSE5},
- /* 3356 */ {I_VPROTD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+12919, IF_AMD|IF_SSE5},
- /* 3357 */ {I_VPROTD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12926, IF_AMD|IF_SSE5},
- /* 3358 */ {I_VPROTD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12933, IF_AMD|IF_SSE5},
- /* 3359 */ {I_VPROTD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6872, IF_AMD|IF_SSE5},
- /* 3360 */ {I_VPROTD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6880, IF_AMD|IF_SSE5},
- /* 3361 */ {I_VPROTQ, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+12940, IF_AMD|IF_SSE5},
- /* 3362 */ {I_VPROTQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+12947, IF_AMD|IF_SSE5},
- /* 3363 */ {I_VPROTQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12954, IF_AMD|IF_SSE5},
- /* 3364 */ {I_VPROTQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12961, IF_AMD|IF_SSE5},
- /* 3365 */ {I_VPROTQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6888, IF_AMD|IF_SSE5},
- /* 3366 */ {I_VPROTQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6896, IF_AMD|IF_SSE5},
- /* 3367 */ {I_VPROTW, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+12968, IF_AMD|IF_SSE5},
- /* 3368 */ {I_VPROTW, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+12975, IF_AMD|IF_SSE5},
- /* 3369 */ {I_VPROTW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12982, IF_AMD|IF_SSE5},
- /* 3370 */ {I_VPROTW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12989, IF_AMD|IF_SSE5},
- /* 3371 */ {I_VPROTW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6904, IF_AMD|IF_SSE5},
- /* 3372 */ {I_VPROTW, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6912, IF_AMD|IF_SSE5},
- /* 3373 */ {I_VPSHAB, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+12996, IF_AMD|IF_SSE5},
- /* 3374 */ {I_VPSHAB, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13003, IF_AMD|IF_SSE5},
- /* 3375 */ {I_VPSHAB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13010, IF_AMD|IF_SSE5},
- /* 3376 */ {I_VPSHAB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13017, IF_AMD|IF_SSE5},
- /* 3377 */ {I_VPSHAD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13024, IF_AMD|IF_SSE5},
- /* 3378 */ {I_VPSHAD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13031, IF_AMD|IF_SSE5},
- /* 3379 */ {I_VPSHAD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13038, IF_AMD|IF_SSE5},
- /* 3380 */ {I_VPSHAD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13045, IF_AMD|IF_SSE5},
- /* 3381 */ {I_VPSHAQ, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13052, IF_AMD|IF_SSE5},
- /* 3382 */ {I_VPSHAQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13059, IF_AMD|IF_SSE5},
- /* 3383 */ {I_VPSHAQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13066, IF_AMD|IF_SSE5},
- /* 3384 */ {I_VPSHAQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13073, IF_AMD|IF_SSE5},
- /* 3385 */ {I_VPSHAW, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13080, IF_AMD|IF_SSE5},
- /* 3386 */ {I_VPSHAW, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13087, IF_AMD|IF_SSE5},
- /* 3387 */ {I_VPSHAW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13094, IF_AMD|IF_SSE5},
- /* 3388 */ {I_VPSHAW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13101, IF_AMD|IF_SSE5},
- /* 3389 */ {I_VPSHLB, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13108, IF_AMD|IF_SSE5},
- /* 3390 */ {I_VPSHLB, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13115, IF_AMD|IF_SSE5},
- /* 3391 */ {I_VPSHLB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13122, IF_AMD|IF_SSE5},
- /* 3392 */ {I_VPSHLB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13129, IF_AMD|IF_SSE5},
- /* 3393 */ {I_VPSHLD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13136, IF_AMD|IF_SSE5},
- /* 3394 */ {I_VPSHLD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13143, IF_AMD|IF_SSE5},
- /* 3395 */ {I_VPSHLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13150, IF_AMD|IF_SSE5},
- /* 3396 */ {I_VPSHLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13157, IF_AMD|IF_SSE5},
- /* 3397 */ {I_VPSHLQ, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13164, IF_AMD|IF_SSE5},
- /* 3398 */ {I_VPSHLQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13171, IF_AMD|IF_SSE5},
- /* 3399 */ {I_VPSHLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13178, IF_AMD|IF_SSE5},
- /* 3400 */ {I_VPSHLQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13185, IF_AMD|IF_SSE5},
- /* 3401 */ {I_VPSHLW, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13192, IF_AMD|IF_SSE5},
- /* 3402 */ {I_VPSHLW, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13199, IF_AMD|IF_SSE5},
- /* 3403 */ {I_VPSHLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13206, IF_AMD|IF_SSE5},
- /* 3404 */ {I_VPSHLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13213, IF_AMD|IF_SSE5},
- /* 3405 */ {I_HINT_NOP0, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15638, IF_P6|IF_UNDOC},
- /* 3406 */ {I_HINT_NOP0, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15644, IF_P6|IF_UNDOC},
- /* 3407 */ {I_HINT_NOP0, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15650, IF_X64|IF_UNDOC},
- /* 3408 */ {I_HINT_NOP1, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15656, IF_P6|IF_UNDOC},
- /* 3409 */ {I_HINT_NOP1, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15662, IF_P6|IF_UNDOC},
- /* 3410 */ {I_HINT_NOP1, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15668, IF_X64|IF_UNDOC},
- /* 3411 */ {I_HINT_NOP2, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15674, IF_P6|IF_UNDOC},
- /* 3412 */ {I_HINT_NOP2, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15680, IF_P6|IF_UNDOC},
- /* 3413 */ {I_HINT_NOP2, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15686, IF_X64|IF_UNDOC},
- /* 3414 */ {I_HINT_NOP3, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15692, IF_P6|IF_UNDOC},
- /* 3415 */ {I_HINT_NOP3, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15698, IF_P6|IF_UNDOC},
- /* 3416 */ {I_HINT_NOP3, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15704, IF_X64|IF_UNDOC},
- /* 3417 */ {I_HINT_NOP4, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15710, IF_P6|IF_UNDOC},
- /* 3418 */ {I_HINT_NOP4, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15716, IF_P6|IF_UNDOC},
- /* 3419 */ {I_HINT_NOP4, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15722, IF_X64|IF_UNDOC},
- /* 3420 */ {I_HINT_NOP5, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15728, IF_P6|IF_UNDOC},
- /* 3421 */ {I_HINT_NOP5, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15734, IF_P6|IF_UNDOC},
- /* 3422 */ {I_HINT_NOP5, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15740, IF_X64|IF_UNDOC},
- /* 3423 */ {I_HINT_NOP6, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15746, IF_P6|IF_UNDOC},
- /* 3424 */ {I_HINT_NOP6, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15752, IF_P6|IF_UNDOC},
- /* 3425 */ {I_HINT_NOP6, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15758, IF_X64|IF_UNDOC},
- /* 3426 */ {I_HINT_NOP7, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15764, IF_P6|IF_UNDOC},
- /* 3427 */ {I_HINT_NOP7, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15770, IF_P6|IF_UNDOC},
- /* 3428 */ {I_HINT_NOP7, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15776, IF_X64|IF_UNDOC},
- /* 3429 */ {I_HINT_NOP8, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15782, IF_P6|IF_UNDOC},
- /* 3430 */ {I_HINT_NOP8, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15788, IF_P6|IF_UNDOC},
- /* 3431 */ {I_HINT_NOP8, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15794, IF_X64|IF_UNDOC},
- /* 3432 */ {I_HINT_NOP9, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15800, IF_P6|IF_UNDOC},
- /* 3433 */ {I_HINT_NOP9, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15806, IF_P6|IF_UNDOC},
- /* 3434 */ {I_HINT_NOP9, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15812, IF_X64|IF_UNDOC},
- /* 3435 */ {I_HINT_NOP10, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15818, IF_P6|IF_UNDOC},
- /* 3436 */ {I_HINT_NOP10, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15824, IF_P6|IF_UNDOC},
- /* 3437 */ {I_HINT_NOP10, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15830, IF_X64|IF_UNDOC},
- /* 3438 */ {I_HINT_NOP11, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15836, IF_P6|IF_UNDOC},
- /* 3439 */ {I_HINT_NOP11, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15842, IF_P6|IF_UNDOC},
- /* 3440 */ {I_HINT_NOP11, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15848, IF_X64|IF_UNDOC},
- /* 3441 */ {I_HINT_NOP12, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15854, IF_P6|IF_UNDOC},
- /* 3442 */ {I_HINT_NOP12, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15860, IF_P6|IF_UNDOC},
- /* 3443 */ {I_HINT_NOP12, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15866, IF_X64|IF_UNDOC},
- /* 3444 */ {I_HINT_NOP13, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15872, IF_P6|IF_UNDOC},
- /* 3445 */ {I_HINT_NOP13, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15878, IF_P6|IF_UNDOC},
- /* 3446 */ {I_HINT_NOP13, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15884, IF_X64|IF_UNDOC},
- /* 3447 */ {I_HINT_NOP14, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15890, IF_P6|IF_UNDOC},
- /* 3448 */ {I_HINT_NOP14, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15896, IF_P6|IF_UNDOC},
- /* 3449 */ {I_HINT_NOP14, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15902, IF_X64|IF_UNDOC},
- /* 3450 */ {I_HINT_NOP15, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15908, IF_P6|IF_UNDOC},
- /* 3451 */ {I_HINT_NOP15, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15914, IF_P6|IF_UNDOC},
- /* 3452 */ {I_HINT_NOP15, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15920, IF_X64|IF_UNDOC},
- /* 3453 */ {I_HINT_NOP16, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15926, IF_P6|IF_UNDOC},
- /* 3454 */ {I_HINT_NOP16, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15932, IF_P6|IF_UNDOC},
- /* 3455 */ {I_HINT_NOP16, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15938, IF_X64|IF_UNDOC},
- /* 3456 */ {I_HINT_NOP17, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15944, IF_P6|IF_UNDOC},
- /* 3457 */ {I_HINT_NOP17, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15950, IF_P6|IF_UNDOC},
- /* 3458 */ {I_HINT_NOP17, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15956, IF_X64|IF_UNDOC},
- /* 3459 */ {I_HINT_NOP18, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15962, IF_P6|IF_UNDOC},
- /* 3460 */ {I_HINT_NOP18, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15968, IF_P6|IF_UNDOC},
- /* 3461 */ {I_HINT_NOP18, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15974, IF_X64|IF_UNDOC},
- /* 3462 */ {I_HINT_NOP19, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15980, IF_P6|IF_UNDOC},
- /* 3463 */ {I_HINT_NOP19, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15986, IF_P6|IF_UNDOC},
- /* 3464 */ {I_HINT_NOP19, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15992, IF_X64|IF_UNDOC},
- /* 3465 */ {I_HINT_NOP20, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+15998, IF_P6|IF_UNDOC},
- /* 3466 */ {I_HINT_NOP20, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16004, IF_P6|IF_UNDOC},
- /* 3467 */ {I_HINT_NOP20, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16010, IF_X64|IF_UNDOC},
- /* 3468 */ {I_HINT_NOP21, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16016, IF_P6|IF_UNDOC},
- /* 3469 */ {I_HINT_NOP21, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16022, IF_P6|IF_UNDOC},
- /* 3470 */ {I_HINT_NOP21, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16028, IF_X64|IF_UNDOC},
- /* 3471 */ {I_HINT_NOP22, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16034, IF_P6|IF_UNDOC},
- /* 3472 */ {I_HINT_NOP22, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16040, IF_P6|IF_UNDOC},
- /* 3473 */ {I_HINT_NOP22, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16046, IF_X64|IF_UNDOC},
- /* 3474 */ {I_HINT_NOP23, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16052, IF_P6|IF_UNDOC},
- /* 3475 */ {I_HINT_NOP23, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16058, IF_P6|IF_UNDOC},
- /* 3476 */ {I_HINT_NOP23, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16064, IF_X64|IF_UNDOC},
- /* 3477 */ {I_HINT_NOP24, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16070, IF_P6|IF_UNDOC},
- /* 3478 */ {I_HINT_NOP24, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16076, IF_P6|IF_UNDOC},
- /* 3479 */ {I_HINT_NOP24, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16082, IF_X64|IF_UNDOC},
- /* 3480 */ {I_HINT_NOP25, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16088, IF_P6|IF_UNDOC},
- /* 3481 */ {I_HINT_NOP25, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16094, IF_P6|IF_UNDOC},
- /* 3482 */ {I_HINT_NOP25, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16100, IF_X64|IF_UNDOC},
- /* 3483 */ {I_HINT_NOP26, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16106, IF_P6|IF_UNDOC},
- /* 3484 */ {I_HINT_NOP26, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16112, IF_P6|IF_UNDOC},
- /* 3485 */ {I_HINT_NOP26, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16118, IF_X64|IF_UNDOC},
- /* 3486 */ {I_HINT_NOP27, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16124, IF_P6|IF_UNDOC},
- /* 3487 */ {I_HINT_NOP27, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16130, IF_P6|IF_UNDOC},
- /* 3488 */ {I_HINT_NOP27, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16136, IF_X64|IF_UNDOC},
- /* 3489 */ {I_HINT_NOP28, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16142, IF_P6|IF_UNDOC},
- /* 3490 */ {I_HINT_NOP28, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16148, IF_P6|IF_UNDOC},
- /* 3491 */ {I_HINT_NOP28, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16154, IF_X64|IF_UNDOC},
- /* 3492 */ {I_HINT_NOP29, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16160, IF_P6|IF_UNDOC},
- /* 3493 */ {I_HINT_NOP29, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16166, IF_P6|IF_UNDOC},
- /* 3494 */ {I_HINT_NOP29, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16172, IF_X64|IF_UNDOC},
- /* 3495 */ {I_HINT_NOP30, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16178, IF_P6|IF_UNDOC},
- /* 3496 */ {I_HINT_NOP30, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16184, IF_P6|IF_UNDOC},
- /* 3497 */ {I_HINT_NOP30, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16190, IF_X64|IF_UNDOC},
- /* 3498 */ {I_HINT_NOP31, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16196, IF_P6|IF_UNDOC},
- /* 3499 */ {I_HINT_NOP31, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16202, IF_P6|IF_UNDOC},
- /* 3500 */ {I_HINT_NOP31, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16208, IF_X64|IF_UNDOC},
- /* 3501 */ {I_HINT_NOP32, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16214, IF_P6|IF_UNDOC},
- /* 3502 */ {I_HINT_NOP32, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16220, IF_P6|IF_UNDOC},
- /* 3503 */ {I_HINT_NOP32, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16226, IF_X64|IF_UNDOC},
- /* 3504 */ {I_HINT_NOP33, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16232, IF_P6|IF_UNDOC},
- /* 3505 */ {I_HINT_NOP33, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16238, IF_P6|IF_UNDOC},
- /* 3506 */ {I_HINT_NOP33, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16244, IF_X64|IF_UNDOC},
- /* 3507 */ {I_HINT_NOP34, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16250, IF_P6|IF_UNDOC},
- /* 3508 */ {I_HINT_NOP34, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16256, IF_P6|IF_UNDOC},
- /* 3509 */ {I_HINT_NOP34, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16262, IF_X64|IF_UNDOC},
- /* 3510 */ {I_HINT_NOP35, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16268, IF_P6|IF_UNDOC},
- /* 3511 */ {I_HINT_NOP35, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16274, IF_P6|IF_UNDOC},
- /* 3512 */ {I_HINT_NOP35, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16280, IF_X64|IF_UNDOC},
- /* 3513 */ {I_HINT_NOP36, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16286, IF_P6|IF_UNDOC},
- /* 3514 */ {I_HINT_NOP36, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16292, IF_P6|IF_UNDOC},
- /* 3515 */ {I_HINT_NOP36, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16298, IF_X64|IF_UNDOC},
- /* 3516 */ {I_HINT_NOP37, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16304, IF_P6|IF_UNDOC},
- /* 3517 */ {I_HINT_NOP37, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16310, IF_P6|IF_UNDOC},
- /* 3518 */ {I_HINT_NOP37, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16316, IF_X64|IF_UNDOC},
- /* 3519 */ {I_HINT_NOP38, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16322, IF_P6|IF_UNDOC},
- /* 3520 */ {I_HINT_NOP38, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16328, IF_P6|IF_UNDOC},
- /* 3521 */ {I_HINT_NOP38, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16334, IF_X64|IF_UNDOC},
- /* 3522 */ {I_HINT_NOP39, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16340, IF_P6|IF_UNDOC},
- /* 3523 */ {I_HINT_NOP39, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16346, IF_P6|IF_UNDOC},
- /* 3524 */ {I_HINT_NOP39, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16352, IF_X64|IF_UNDOC},
- /* 3525 */ {I_HINT_NOP40, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16358, IF_P6|IF_UNDOC},
- /* 3526 */ {I_HINT_NOP40, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16364, IF_P6|IF_UNDOC},
- /* 3527 */ {I_HINT_NOP40, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16370, IF_X64|IF_UNDOC},
- /* 3528 */ {I_HINT_NOP41, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16376, IF_P6|IF_UNDOC},
- /* 3529 */ {I_HINT_NOP41, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16382, IF_P6|IF_UNDOC},
- /* 3530 */ {I_HINT_NOP41, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16388, IF_X64|IF_UNDOC},
- /* 3531 */ {I_HINT_NOP42, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16394, IF_P6|IF_UNDOC},
- /* 3532 */ {I_HINT_NOP42, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16400, IF_P6|IF_UNDOC},
- /* 3533 */ {I_HINT_NOP42, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16406, IF_X64|IF_UNDOC},
- /* 3534 */ {I_HINT_NOP43, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16412, IF_P6|IF_UNDOC},
- /* 3535 */ {I_HINT_NOP43, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16418, IF_P6|IF_UNDOC},
- /* 3536 */ {I_HINT_NOP43, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16424, IF_X64|IF_UNDOC},
- /* 3537 */ {I_HINT_NOP44, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16430, IF_P6|IF_UNDOC},
- /* 3538 */ {I_HINT_NOP44, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16436, IF_P6|IF_UNDOC},
- /* 3539 */ {I_HINT_NOP44, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16442, IF_X64|IF_UNDOC},
- /* 3540 */ {I_HINT_NOP45, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16448, IF_P6|IF_UNDOC},
- /* 3541 */ {I_HINT_NOP45, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16454, IF_P6|IF_UNDOC},
- /* 3542 */ {I_HINT_NOP45, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16460, IF_X64|IF_UNDOC},
- /* 3543 */ {I_HINT_NOP46, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16466, IF_P6|IF_UNDOC},
- /* 3544 */ {I_HINT_NOP46, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16472, IF_P6|IF_UNDOC},
- /* 3545 */ {I_HINT_NOP46, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16478, IF_X64|IF_UNDOC},
- /* 3546 */ {I_HINT_NOP47, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16484, IF_P6|IF_UNDOC},
- /* 3547 */ {I_HINT_NOP47, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16490, IF_P6|IF_UNDOC},
- /* 3548 */ {I_HINT_NOP47, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16496, IF_X64|IF_UNDOC},
- /* 3549 */ {I_HINT_NOP48, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16502, IF_P6|IF_UNDOC},
- /* 3550 */ {I_HINT_NOP48, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16508, IF_P6|IF_UNDOC},
- /* 3551 */ {I_HINT_NOP48, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16514, IF_X64|IF_UNDOC},
- /* 3552 */ {I_HINT_NOP49, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16520, IF_P6|IF_UNDOC},
- /* 3553 */ {I_HINT_NOP49, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16526, IF_P6|IF_UNDOC},
- /* 3554 */ {I_HINT_NOP49, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16532, IF_X64|IF_UNDOC},
- /* 3555 */ {I_HINT_NOP50, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16538, IF_P6|IF_UNDOC},
- /* 3556 */ {I_HINT_NOP50, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16544, IF_P6|IF_UNDOC},
- /* 3557 */ {I_HINT_NOP50, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16550, IF_X64|IF_UNDOC},
- /* 3558 */ {I_HINT_NOP51, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16556, IF_P6|IF_UNDOC},
- /* 3559 */ {I_HINT_NOP51, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16562, IF_P6|IF_UNDOC},
- /* 3560 */ {I_HINT_NOP51, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16568, IF_X64|IF_UNDOC},
- /* 3561 */ {I_HINT_NOP52, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16574, IF_P6|IF_UNDOC},
- /* 3562 */ {I_HINT_NOP52, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16580, IF_P6|IF_UNDOC},
- /* 3563 */ {I_HINT_NOP52, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16586, IF_X64|IF_UNDOC},
- /* 3564 */ {I_HINT_NOP53, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16592, IF_P6|IF_UNDOC},
- /* 3565 */ {I_HINT_NOP53, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16598, IF_P6|IF_UNDOC},
- /* 3566 */ {I_HINT_NOP53, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16604, IF_X64|IF_UNDOC},
- /* 3567 */ {I_HINT_NOP54, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16610, IF_P6|IF_UNDOC},
- /* 3568 */ {I_HINT_NOP54, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16616, IF_P6|IF_UNDOC},
- /* 3569 */ {I_HINT_NOP54, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16622, IF_X64|IF_UNDOC},
- /* 3570 */ {I_HINT_NOP55, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16628, IF_P6|IF_UNDOC},
- /* 3571 */ {I_HINT_NOP55, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16634, IF_P6|IF_UNDOC},
- /* 3572 */ {I_HINT_NOP55, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16640, IF_X64|IF_UNDOC},
- /* 3573 */ {I_HINT_NOP56, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+13976, IF_P6|IF_UNDOC},
- /* 3574 */ {I_HINT_NOP56, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+13982, IF_P6|IF_UNDOC},
- /* 3575 */ {I_HINT_NOP56, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+13988, IF_X64|IF_UNDOC},
- /* 3576 */ {I_HINT_NOP57, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16646, IF_P6|IF_UNDOC},
- /* 3577 */ {I_HINT_NOP57, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16652, IF_P6|IF_UNDOC},
- /* 3578 */ {I_HINT_NOP57, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16658, IF_X64|IF_UNDOC},
- /* 3579 */ {I_HINT_NOP58, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16664, IF_P6|IF_UNDOC},
- /* 3580 */ {I_HINT_NOP58, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16670, IF_P6|IF_UNDOC},
- /* 3581 */ {I_HINT_NOP58, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16676, IF_X64|IF_UNDOC},
- /* 3582 */ {I_HINT_NOP59, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16682, IF_P6|IF_UNDOC},
- /* 3583 */ {I_HINT_NOP59, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16688, IF_P6|IF_UNDOC},
- /* 3584 */ {I_HINT_NOP59, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16694, IF_X64|IF_UNDOC},
- /* 3585 */ {I_HINT_NOP60, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16700, IF_P6|IF_UNDOC},
- /* 3586 */ {I_HINT_NOP60, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16706, IF_P6|IF_UNDOC},
- /* 3587 */ {I_HINT_NOP60, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16712, IF_X64|IF_UNDOC},
- /* 3588 */ {I_HINT_NOP61, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16718, IF_P6|IF_UNDOC},
- /* 3589 */ {I_HINT_NOP61, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16724, IF_P6|IF_UNDOC},
- /* 3590 */ {I_HINT_NOP61, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16730, IF_X64|IF_UNDOC},
- /* 3591 */ {I_HINT_NOP62, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16736, IF_P6|IF_UNDOC},
- /* 3592 */ {I_HINT_NOP62, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16742, IF_P6|IF_UNDOC},
- /* 3593 */ {I_HINT_NOP62, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16748, IF_X64|IF_UNDOC},
- /* 3594 */ {I_HINT_NOP63, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16754, IF_P6|IF_UNDOC},
- /* 3595 */ {I_HINT_NOP63, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16760, IF_P6|IF_UNDOC},
- /* 3596 */ {I_HINT_NOP63, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16766, IF_X64|IF_UNDOC},
+ /* 0 */ {I_RESB, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+21271, IF_8086},
+ /* 1 */ {I_AAA, 0, {0,0,0,0,0}, nasm_bytecodes+22117, IF_8086|IF_NOLONG},
+ /* 2 */ {I_AAD, 0, {0,0,0,0,0}, nasm_bytecodes+21129, IF_8086|IF_NOLONG},
+ /* 3 */ {I_AAD, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+21133, IF_8086|IF_SB|IF_NOLONG},
+ /* 4 */ {I_AAM, 0, {0,0,0,0,0}, nasm_bytecodes+21137, IF_8086|IF_NOLONG},
+ /* 5 */ {I_AAM, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+21141, IF_8086|IF_SB|IF_NOLONG},
+ /* 6 */ {I_AAS, 0, {0,0,0,0,0}, nasm_bytecodes+22120, IF_8086|IF_NOLONG},
+ /* 7 */ {I_ADC, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19399, IF_8086|IF_SM|IF_LOCK},
+ /* 8 */ {I_ADC, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19400, IF_8086},
+ /* 9 */ {I_ADC, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+15799, IF_8086|IF_SM|IF_LOCK},
+ /* 10 */ {I_ADC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+15800, IF_8086},
+ /* 11 */ {I_ADC, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+15805, IF_386|IF_SM|IF_LOCK},
+ /* 12 */ {I_ADC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+15806, IF_386},
+ /* 13 */ {I_ADC, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+15811, IF_X64|IF_SM|IF_LOCK},
+ /* 14 */ {I_ADC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+15812, IF_X64},
+ /* 15 */ {I_ADC, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+10636, IF_8086|IF_SM},
+ /* 16 */ {I_ADC, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+10636, IF_8086},
+ /* 17 */ {I_ADC, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+19404, IF_8086|IF_SM},
+ /* 18 */ {I_ADC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+19404, IF_8086},
+ /* 19 */ {I_ADC, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+19409, IF_386|IF_SM},
+ /* 20 */ {I_ADC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+19409, IF_386},
+ /* 21 */ {I_ADC, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+19414, IF_X64|IF_SM},
+ /* 22 */ {I_ADC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+19414, IF_X64},
+ /* 23 */ {I_ADC, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7322, IF_8086|IF_LOCK},
+ /* 24 */ {I_ADC, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7329, IF_386|IF_LOCK},
+ /* 25 */ {I_ADC, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7336, IF_X64|IF_LOCK},
+ /* 26 */ {I_ADC, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+21145, IF_8086|IF_SM},
+ /* 27 */ {I_ADC, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+7323, IF_8086|IF_SM},
+ /* 28 */ {I_ADC, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+19419, IF_8086|IF_SM},
+ /* 29 */ {I_ADC, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+7330, IF_386|IF_SM},
+ /* 30 */ {I_ADC, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+19424, IF_386|IF_SM},
+ /* 31 */ {I_ADC, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+7337, IF_X64|IF_SM},
+ /* 32 */ {I_ADC, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+19429, IF_X64|IF_SM},
+ /* 33 */ {I_ADC, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+15817, IF_8086|IF_SM|IF_LOCK},
+ /* 34 */ {I_ADC, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+7343, IF_8086|IF_SM|IF_LOCK},
+ /* 35 */ {I_ADC, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+7350, IF_386|IF_SM|IF_LOCK},
+ /* 36 */ {I_ADC, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+7357, IF_X64|IF_SM|IF_LOCK},
+ /* 37 */ {I_ADC, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+15817, IF_8086|IF_SM|IF_LOCK},
+ /* 38 */ {I_ADC, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+7343, IF_8086|IF_SM|IF_LOCK},
+ /* 39 */ {I_ADC, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+7350, IF_386|IF_SM|IF_LOCK},
+ /* 40 */ {I_ADD, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19434, IF_8086|IF_SM|IF_LOCK},
+ /* 41 */ {I_ADD, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19435, IF_8086},
+ /* 42 */ {I_ADD, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+15829, IF_8086|IF_SM|IF_LOCK},
+ /* 43 */ {I_ADD, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+15830, IF_8086},
+ /* 44 */ {I_ADD, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+15835, IF_386|IF_SM|IF_LOCK},
+ /* 45 */ {I_ADD, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+15836, IF_386},
+ /* 46 */ {I_ADD, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+15841, IF_X64|IF_SM|IF_LOCK},
+ /* 47 */ {I_ADD, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+15842, IF_X64},
+ /* 48 */ {I_ADD, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+14381, IF_8086|IF_SM},
+ /* 49 */ {I_ADD, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+14381, IF_8086},
+ /* 50 */ {I_ADD, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+19439, IF_8086|IF_SM},
+ /* 51 */ {I_ADD, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+19439, IF_8086},
+ /* 52 */ {I_ADD, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+19444, IF_386|IF_SM},
+ /* 53 */ {I_ADD, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+19444, IF_386},
+ /* 54 */ {I_ADD, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+19449, IF_X64|IF_SM},
+ /* 55 */ {I_ADD, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+19449, IF_X64},
+ /* 56 */ {I_ADD, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7364, IF_8086|IF_LOCK},
+ /* 57 */ {I_ADD, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7371, IF_386|IF_LOCK},
+ /* 58 */ {I_ADD, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7378, IF_X64|IF_LOCK},
+ /* 59 */ {I_ADD, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+21149, IF_8086|IF_SM},
+ /* 60 */ {I_ADD, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+7365, IF_8086|IF_SM},
+ /* 61 */ {I_ADD, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+19454, IF_8086|IF_SM},
+ /* 62 */ {I_ADD, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+7372, IF_386|IF_SM},
+ /* 63 */ {I_ADD, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+19459, IF_386|IF_SM},
+ /* 64 */ {I_ADD, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+7379, IF_X64|IF_SM},
+ /* 65 */ {I_ADD, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+19464, IF_X64|IF_SM},
+ /* 66 */ {I_ADD, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+15847, IF_8086|IF_SM|IF_LOCK},
+ /* 67 */ {I_ADD, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+7385, IF_8086|IF_SM|IF_LOCK},
+ /* 68 */ {I_ADD, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+7392, IF_386|IF_SM|IF_LOCK},
+ /* 69 */ {I_ADD, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+7399, IF_X64|IF_SM|IF_LOCK},
+ /* 70 */ {I_ADD, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+15847, IF_8086|IF_SM|IF_LOCK},
+ /* 71 */ {I_ADD, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+7385, IF_8086|IF_SM|IF_LOCK},
+ /* 72 */ {I_ADD, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+7392, IF_386|IF_SM|IF_LOCK},
+ /* 73 */ {I_AND, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19469, IF_8086|IF_SM|IF_LOCK},
+ /* 74 */ {I_AND, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+19470, IF_8086},
+ /* 75 */ {I_AND, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+15859, IF_8086|IF_SM|IF_LOCK},
+ /* 76 */ {I_AND, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+15860, IF_8086},
+ /* 77 */ {I_AND, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+15865, IF_386|IF_SM|IF_LOCK},
+ /* 78 */ {I_AND, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+15866, IF_386},
+ /* 79 */ {I_AND, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+15871, IF_X64|IF_SM|IF_LOCK},
+ /* 80 */ {I_AND, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+15872, IF_X64},
+ /* 81 */ {I_AND, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+14661, IF_8086|IF_SM},
+ /* 82 */ {I_AND, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+14661, IF_8086},
+ /* 83 */ {I_AND, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+19474, IF_8086|IF_SM},
+ /* 84 */ {I_AND, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+19474, IF_8086},
+ /* 85 */ {I_AND, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+19479, IF_386|IF_SM},
+ /* 86 */ {I_AND, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+19479, IF_386},
+ /* 87 */ {I_AND, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+19484, IF_X64|IF_SM},
+ /* 88 */ {I_AND, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+19484, IF_X64},
+ /* 89 */ {I_AND, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7406, IF_8086|IF_LOCK},
+ /* 90 */ {I_AND, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7413, IF_386|IF_LOCK},
+ /* 91 */ {I_AND, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7420, IF_X64|IF_LOCK},
+ /* 92 */ {I_AND, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+21153, IF_8086|IF_SM},
+ /* 93 */ {I_AND, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+7407, IF_8086|IF_SM},
+ /* 94 */ {I_AND, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+19489, IF_8086|IF_SM},
+ /* 95 */ {I_AND, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+7414, IF_386|IF_SM},
+ /* 96 */ {I_AND, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+19494, IF_386|IF_SM},
+ /* 97 */ {I_AND, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+7421, IF_X64|IF_SM},
+ /* 98 */ {I_AND, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+19499, IF_X64|IF_SM},
+ /* 99 */ {I_AND, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+15877, IF_8086|IF_SM|IF_LOCK},
+ /* 100 */ {I_AND, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+7427, IF_8086|IF_SM|IF_LOCK},
+ /* 101 */ {I_AND, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+7434, IF_386|IF_SM|IF_LOCK},
+ /* 102 */ {I_AND, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+7441, IF_X64|IF_SM|IF_LOCK},
+ /* 103 */ {I_AND, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+15877, IF_8086|IF_SM|IF_LOCK},
+ /* 104 */ {I_AND, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+7427, IF_8086|IF_SM|IF_LOCK},
+ /* 105 */ {I_AND, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+7434, IF_386|IF_SM|IF_LOCK},
+ /* 106 */ {I_ARPL, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+21157, IF_286|IF_PROT|IF_SM|IF_NOLONG},
+ /* 107 */ {I_ARPL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+21157, IF_286|IF_PROT|IF_NOLONG},
+ /* 108 */ {I_BOUND, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+19504, IF_186|IF_NOLONG},
+ /* 109 */ {I_BOUND, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+19509, IF_386|IF_NOLONG},
+ /* 110 */ {I_BSF, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+15889, IF_386|IF_SM},
+ /* 111 */ {I_BSF, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+15889, IF_386},
+ /* 112 */ {I_BSF, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+15895, IF_386|IF_SM},
+ /* 113 */ {I_BSF, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+15895, IF_386},
+ /* 114 */ {I_BSF, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+15901, IF_X64|IF_SM},
+ /* 115 */ {I_BSF, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+15901, IF_X64},
+ /* 116 */ {I_BSR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+15907, IF_386|IF_SM},
+ /* 117 */ {I_BSR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+15907, IF_386},
+ /* 118 */ {I_BSR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+15913, IF_386|IF_SM},
+ /* 119 */ {I_BSR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+15913, IF_386},
+ /* 120 */ {I_BSR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+15919, IF_X64|IF_SM},
+ /* 121 */ {I_BSR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+15919, IF_X64},
+ /* 122 */ {I_BSWAP, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+15925, IF_486},
+ /* 123 */ {I_BSWAP, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+15931, IF_X64},
+ /* 124 */ {I_BT, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+15937, IF_386|IF_SM},
+ /* 125 */ {I_BT, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+15937, IF_386},
+ /* 126 */ {I_BT, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+15943, IF_386|IF_SM},
+ /* 127 */ {I_BT, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+15943, IF_386},
+ /* 128 */ {I_BT, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+15949, IF_X64|IF_SM},
+ /* 129 */ {I_BT, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+15949, IF_X64},
+ /* 130 */ {I_BT, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+7448, IF_386|IF_SB},
+ /* 131 */ {I_BT, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+7455, IF_386|IF_SB},
+ /* 132 */ {I_BT, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+7462, IF_X64|IF_SB},
+ /* 133 */ {I_BTC, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+7469, IF_386|IF_SM|IF_LOCK},
+ /* 134 */ {I_BTC, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+7470, IF_386},
+ /* 135 */ {I_BTC, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7476, IF_386|IF_SM|IF_LOCK},
+ /* 136 */ {I_BTC, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7477, IF_386},
+ /* 137 */ {I_BTC, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7483, IF_X64|IF_SM|IF_LOCK},
+ /* 138 */ {I_BTC, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7484, IF_X64},
+ /* 139 */ {I_BTC, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+3618, IF_386|IF_SB|IF_LOCK},
+ /* 140 */ {I_BTC, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+3626, IF_386|IF_SB|IF_LOCK},
+ /* 141 */ {I_BTC, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+3634, IF_X64|IF_SB|IF_LOCK},
+ /* 142 */ {I_BTR, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+7490, IF_386|IF_SM|IF_LOCK},
+ /* 143 */ {I_BTR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+7491, IF_386},
+ /* 144 */ {I_BTR, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7497, IF_386|IF_SM|IF_LOCK},
+ /* 145 */ {I_BTR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7498, IF_386},
+ /* 146 */ {I_BTR, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7504, IF_X64|IF_SM|IF_LOCK},
+ /* 147 */ {I_BTR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7505, IF_X64},
+ /* 148 */ {I_BTR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+3642, IF_386|IF_SB|IF_LOCK},
+ /* 149 */ {I_BTR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+3650, IF_386|IF_SB|IF_LOCK},
+ /* 150 */ {I_BTR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+3658, IF_X64|IF_SB|IF_LOCK},
+ /* 151 */ {I_BTS, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+7511, IF_386|IF_SM|IF_LOCK},
+ /* 152 */ {I_BTS, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+7512, IF_386},
+ /* 153 */ {I_BTS, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7518, IF_386|IF_SM|IF_LOCK},
+ /* 154 */ {I_BTS, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7519, IF_386},
+ /* 155 */ {I_BTS, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7525, IF_X64|IF_SM|IF_LOCK},
+ /* 156 */ {I_BTS, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7526, IF_X64},
+ /* 157 */ {I_BTS, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+3666, IF_386|IF_SB|IF_LOCK},
+ /* 158 */ {I_BTS, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+3674, IF_386|IF_SB|IF_LOCK},
+ /* 159 */ {I_BTS, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+3682, IF_X64|IF_SB|IF_LOCK},
+ /* 160 */ {I_CALL, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+19514, IF_8086},
+ /* 161 */ {I_CALL, 1, {IMMEDIATE|NEAR,0,0,0,0}, nasm_bytecodes+19514, IF_8086},
+ /* 162 */ {I_CALL, 1, {IMMEDIATE|BITS16,0,0,0,0}, nasm_bytecodes+19519, IF_8086},
+ /* 163 */ {I_CALL, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, nasm_bytecodes+19519, IF_8086},
+ /* 164 */ {I_CALL, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+19524, IF_386},
+ /* 165 */ {I_CALL, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, nasm_bytecodes+19524, IF_386},
+ /* 166 */ {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+15973, IF_8086|IF_NOLONG},
+ /* 167 */ {I_CALL, 2, {IMMEDIATE|BITS16|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+15979, IF_8086|IF_NOLONG},
+ /* 168 */ {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+15979, IF_8086|IF_NOLONG},
+ /* 169 */ {I_CALL, 2, {IMMEDIATE|BITS32|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+15985, IF_386|IF_NOLONG},
+ /* 170 */ {I_CALL, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+15985, IF_386|IF_NOLONG},
+ /* 171 */ {I_CALL, 1, {MEMORY|FAR,0,0,0,0}, nasm_bytecodes+19529, IF_8086|IF_NOLONG},
+ /* 172 */ {I_CALL, 1, {MEMORY|FAR,0,0,0,0}, nasm_bytecodes+19534, IF_X64},
+ /* 173 */ {I_CALL, 1, {MEMORY|BITS16|FAR,0,0,0,0}, nasm_bytecodes+19539, IF_8086},
+ /* 174 */ {I_CALL, 1, {MEMORY|BITS32|FAR,0,0,0,0}, nasm_bytecodes+19544, IF_386},
+ /* 175 */ {I_CALL, 1, {MEMORY|BITS64|FAR,0,0,0,0}, nasm_bytecodes+19534, IF_X64},
+ /* 176 */ {I_CALL, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19554, IF_8086},
+ /* 177 */ {I_CALL, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19559, IF_386|IF_NOLONG},
+ /* 178 */ {I_CALL, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19564, IF_X64},
+ /* 179 */ {I_CALL, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19549, IF_8086},
+ /* 180 */ {I_CALL, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+19554, IF_8086},
+ /* 181 */ {I_CALL, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+19559, IF_386|IF_NOLONG},
+ /* 182 */ {I_CALL, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19564, IF_X64},
+ /* 183 */ {I_CALL, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+19564, IF_X64},
+ /* 184 */ {I_CBW, 0, {0,0,0,0,0}, nasm_bytecodes+21169, IF_8086},
+ /* 185 */ {I_CDQ, 0, {0,0,0,0,0}, nasm_bytecodes+21173, IF_386},
+ /* 186 */ {I_CDQE, 0, {0,0,0,0,0}, nasm_bytecodes+21177, IF_X64},
+ /* 187 */ {I_CLC, 0, {0,0,0,0,0}, nasm_bytecodes+20936, IF_8086},
+ /* 188 */ {I_CLD, 0, {0,0,0,0,0}, nasm_bytecodes+22123, IF_8086},
+ /* 189 */ {I_CLGI, 0, {0,0,0,0,0}, nasm_bytecodes+19569, IF_X64|IF_AMD},
+ /* 190 */ {I_CLI, 0, {0,0,0,0,0}, nasm_bytecodes+22126, IF_8086},
+ /* 191 */ {I_CLTS, 0, {0,0,0,0,0}, nasm_bytecodes+21181, IF_286|IF_PRIV},
+ /* 192 */ {I_CMC, 0, {0,0,0,0,0}, nasm_bytecodes+22129, IF_8086},
+ /* 193 */ {I_CMP, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+21185, IF_8086|IF_SM},
+ /* 194 */ {I_CMP, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+21185, IF_8086},
+ /* 195 */ {I_CMP, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+19574, IF_8086|IF_SM},
+ /* 196 */ {I_CMP, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+19574, IF_8086},
+ /* 197 */ {I_CMP, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+19579, IF_386|IF_SM},
+ /* 198 */ {I_CMP, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+19579, IF_386},
+ /* 199 */ {I_CMP, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+19584, IF_X64|IF_SM},
+ /* 200 */ {I_CMP, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+19584, IF_X64},
+ /* 201 */ {I_CMP, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+14619, IF_8086|IF_SM},
+ /* 202 */ {I_CMP, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+14619, IF_8086},
+ /* 203 */ {I_CMP, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+19589, IF_8086|IF_SM},
+ /* 204 */ {I_CMP, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+19589, IF_8086},
+ /* 205 */ {I_CMP, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+19594, IF_386|IF_SM},
+ /* 206 */ {I_CMP, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+19594, IF_386},
+ /* 207 */ {I_CMP, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+19599, IF_X64|IF_SM},
+ /* 208 */ {I_CMP, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+19599, IF_X64},
+ /* 209 */ {I_CMP, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+15991, IF_8086},
+ /* 210 */ {I_CMP, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+15997, IF_386},
+ /* 211 */ {I_CMP, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16003, IF_X64},
+ /* 212 */ {I_CMP, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+21189, IF_8086|IF_SM},
+ /* 213 */ {I_CMP, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+15991, IF_8086|IF_SM},
+ /* 214 */ {I_CMP, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+19604, IF_8086|IF_SM},
+ /* 215 */ {I_CMP, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+15997, IF_386|IF_SM},
+ /* 216 */ {I_CMP, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+19609, IF_386|IF_SM},
+ /* 217 */ {I_CMP, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+16003, IF_X64|IF_SM},
+ /* 218 */ {I_CMP, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+19614, IF_X64|IF_SM},
+ /* 219 */ {I_CMP, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+19619, IF_8086|IF_SM},
+ /* 220 */ {I_CMP, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+16009, IF_8086|IF_SM},
+ /* 221 */ {I_CMP, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+16015, IF_386|IF_SM},
+ /* 222 */ {I_CMP, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+16021, IF_X64|IF_SM},
+ /* 223 */ {I_CMP, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+19619, IF_8086|IF_SM},
+ /* 224 */ {I_CMP, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+16009, IF_8086|IF_SM},
+ /* 225 */ {I_CMP, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+16015, IF_386|IF_SM},
+ /* 226 */ {I_CMPSB, 0, {0,0,0,0,0}, nasm_bytecodes+21193, IF_8086},
+ /* 227 */ {I_CMPSD, 0, {0,0,0,0,0}, nasm_bytecodes+19629, IF_386},
+ /* 228 */ {I_CMPSQ, 0, {0,0,0,0,0}, nasm_bytecodes+19634, IF_X64},
+ /* 229 */ {I_CMPSW, 0, {0,0,0,0,0}, nasm_bytecodes+19639, IF_8086},
+ /* 230 */ {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+16027, IF_PENT|IF_SM|IF_LOCK},
+ /* 231 */ {I_CMPXCHG, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+16028, IF_PENT},
+ /* 232 */ {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+7532, IF_PENT|IF_SM|IF_LOCK},
+ /* 233 */ {I_CMPXCHG, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+7533, IF_PENT},
+ /* 234 */ {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7539, IF_PENT|IF_SM|IF_LOCK},
+ /* 235 */ {I_CMPXCHG, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+7540, IF_PENT},
+ /* 236 */ {I_CMPXCHG, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7546, IF_X64|IF_SM|IF_LOCK},
+ /* 237 */ {I_CMPXCHG, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+7547, IF_X64},
+ /* 238 */ {I_CMPXCHG8B, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+16045, IF_PENT|IF_LOCK},
+ /* 239 */ {I_CMPXCHG16B, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+16051, IF_X64|IF_LOCK},
+ /* 240 */ {I_CPUID, 0, {0,0,0,0,0}, nasm_bytecodes+21197, IF_PENT},
+ /* 241 */ {I_CPU_READ, 0, {0,0,0,0,0}, nasm_bytecodes+21201, IF_PENT|IF_CYRIX},
+ /* 242 */ {I_CPU_WRITE, 0, {0,0,0,0,0}, nasm_bytecodes+21205, IF_PENT|IF_CYRIX},
+ /* 243 */ {I_CQO, 0, {0,0,0,0,0}, nasm_bytecodes+21209, IF_X64},
+ /* 244 */ {I_CWD, 0, {0,0,0,0,0}, nasm_bytecodes+21213, IF_8086},
+ /* 245 */ {I_CWDE, 0, {0,0,0,0,0}, nasm_bytecodes+21217, IF_386},
+ /* 246 */ {I_DAA, 0, {0,0,0,0,0}, nasm_bytecodes+22132, IF_8086|IF_NOLONG},
+ /* 247 */ {I_DAS, 0, {0,0,0,0,0}, nasm_bytecodes+22135, IF_8086|IF_NOLONG},
+ /* 248 */ {I_DEC, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+21221, IF_8086|IF_NOLONG},
+ /* 249 */ {I_DEC, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+21225, IF_386|IF_NOLONG},
+ /* 250 */ {I_DEC, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+19649, IF_8086|IF_LOCK},
+ /* 251 */ {I_DEC, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16057, IF_8086|IF_LOCK},
+ /* 252 */ {I_DEC, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16063, IF_386|IF_LOCK},
+ /* 253 */ {I_DEC, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16069, IF_X64|IF_LOCK},
+ /* 254 */ {I_DIV, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+21229, IF_8086},
+ /* 255 */ {I_DIV, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19654, IF_8086},
+ /* 256 */ {I_DIV, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19659, IF_386},
+ /* 257 */ {I_DIV, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19664, IF_X64},
+ /* 258 */ {I_DMINT, 0, {0,0,0,0,0}, nasm_bytecodes+21233, IF_P6|IF_CYRIX},
+ /* 259 */ {I_EMMS, 0, {0,0,0,0,0}, nasm_bytecodes+21237, IF_PENT|IF_MMX},
+ /* 260 */ {I_ENTER, 2, {IMMEDIATE,IMMEDIATE,0,0,0}, nasm_bytecodes+19669, IF_186},
+ /* 261 */ {I_EQU, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+22176, IF_8086},
+ /* 262 */ {I_EQU, 2, {IMMEDIATE|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+22176, IF_8086},
+ /* 263 */ {I_F2XM1, 0, {0,0,0,0,0}, nasm_bytecodes+21241, IF_8086|IF_FPU},
+ /* 264 */ {I_FABS, 0, {0,0,0,0,0}, nasm_bytecodes+21245, IF_8086|IF_FPU},
+ /* 265 */ {I_FADD, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21249, IF_8086|IF_FPU},
+ /* 266 */ {I_FADD, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21253, IF_8086|IF_FPU},
+ /* 267 */ {I_FADD, 1, {FPUREG|TO,0,0,0,0}, nasm_bytecodes+19674, IF_8086|IF_FPU},
+ /* 268 */ {I_FADD, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19679, IF_8086|IF_FPU},
+ /* 269 */ {I_FADD, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+19674, IF_8086|IF_FPU},
+ /* 270 */ {I_FADD, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19684, IF_8086|IF_FPU},
+ /* 271 */ {I_FADDP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19689, IF_8086|IF_FPU},
+ /* 272 */ {I_FADDP, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+19689, IF_8086|IF_FPU},
+ /* 273 */ {I_FBLD, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+21261, IF_8086|IF_FPU},
+ /* 274 */ {I_FBLD, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+21261, IF_8086|IF_FPU},
+ /* 275 */ {I_FBSTP, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+21265, IF_8086|IF_FPU},
+ /* 276 */ {I_FBSTP, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+21265, IF_8086|IF_FPU},
+ /* 277 */ {I_FCHS, 0, {0,0,0,0,0}, nasm_bytecodes+21269, IF_8086|IF_FPU},
+ /* 278 */ {I_FCLEX, 0, {0,0,0,0,0}, nasm_bytecodes+19694, IF_8086|IF_FPU},
+ /* 279 */ {I_FCMOVB, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19699, IF_P6|IF_FPU},
+ /* 280 */ {I_FCMOVB, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19704, IF_P6|IF_FPU},
+ /* 281 */ {I_FCMOVBE, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19709, IF_P6|IF_FPU},
+ /* 282 */ {I_FCMOVBE, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19714, IF_P6|IF_FPU},
+ /* 283 */ {I_FCMOVE, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19719, IF_P6|IF_FPU},
+ /* 284 */ {I_FCMOVE, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19724, IF_P6|IF_FPU},
+ /* 285 */ {I_FCMOVNB, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19729, IF_P6|IF_FPU},
+ /* 286 */ {I_FCMOVNB, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19734, IF_P6|IF_FPU},
+ /* 287 */ {I_FCMOVNBE, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19739, IF_P6|IF_FPU},
+ /* 288 */ {I_FCMOVNBE, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19744, IF_P6|IF_FPU},
+ /* 289 */ {I_FCMOVNE, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19749, IF_P6|IF_FPU},
+ /* 290 */ {I_FCMOVNE, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19754, IF_P6|IF_FPU},
+ /* 291 */ {I_FCMOVNU, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19759, IF_P6|IF_FPU},
+ /* 292 */ {I_FCMOVNU, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19764, IF_P6|IF_FPU},
+ /* 293 */ {I_FCMOVU, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19769, IF_P6|IF_FPU},
+ /* 294 */ {I_FCMOVU, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19774, IF_P6|IF_FPU},
+ /* 295 */ {I_FCOM, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21305, IF_8086|IF_FPU},
+ /* 296 */ {I_FCOM, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21309, IF_8086|IF_FPU},
+ /* 297 */ {I_FCOM, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19779, IF_8086|IF_FPU},
+ /* 298 */ {I_FCOM, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19784, IF_8086|IF_FPU},
+ /* 299 */ {I_FCOMI, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19789, IF_P6|IF_FPU},
+ /* 300 */ {I_FCOMI, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19794, IF_P6|IF_FPU},
+ /* 301 */ {I_FCOMIP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19799, IF_P6|IF_FPU},
+ /* 302 */ {I_FCOMIP, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19804, IF_P6|IF_FPU},
+ /* 303 */ {I_FCOMP, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21325, IF_8086|IF_FPU},
+ /* 304 */ {I_FCOMP, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21329, IF_8086|IF_FPU},
+ /* 305 */ {I_FCOMP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19809, IF_8086|IF_FPU},
+ /* 306 */ {I_FCOMP, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19814, IF_8086|IF_FPU},
+ /* 307 */ {I_FCOMPP, 0, {0,0,0,0,0}, nasm_bytecodes+21337, IF_8086|IF_FPU},
+ /* 308 */ {I_FCOS, 0, {0,0,0,0,0}, nasm_bytecodes+21341, IF_386|IF_FPU},
+ /* 309 */ {I_FDECSTP, 0, {0,0,0,0,0}, nasm_bytecodes+21345, IF_8086|IF_FPU},
+ /* 310 */ {I_FDISI, 0, {0,0,0,0,0}, nasm_bytecodes+19819, IF_8086|IF_FPU},
+ /* 311 */ {I_FDIV, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21349, IF_8086|IF_FPU},
+ /* 312 */ {I_FDIV, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21353, IF_8086|IF_FPU},
+ /* 313 */ {I_FDIV, 1, {FPUREG|TO,0,0,0,0}, nasm_bytecodes+19824, IF_8086|IF_FPU},
+ /* 314 */ {I_FDIV, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19829, IF_8086|IF_FPU},
+ /* 315 */ {I_FDIV, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+19824, IF_8086|IF_FPU},
+ /* 316 */ {I_FDIV, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19834, IF_8086|IF_FPU},
+ /* 317 */ {I_FDIVP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19839, IF_8086|IF_FPU},
+ /* 318 */ {I_FDIVP, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+19839, IF_8086|IF_FPU},
+ /* 319 */ {I_FDIVR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21361, IF_8086|IF_FPU},
+ /* 320 */ {I_FDIVR, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21365, IF_8086|IF_FPU},
+ /* 321 */ {I_FDIVR, 1, {FPUREG|TO,0,0,0,0}, nasm_bytecodes+19844, IF_8086|IF_FPU},
+ /* 322 */ {I_FDIVR, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+19844, IF_8086|IF_FPU},
+ /* 323 */ {I_FDIVR, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19849, IF_8086|IF_FPU},
+ /* 324 */ {I_FDIVR, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19854, IF_8086|IF_FPU},
+ /* 325 */ {I_FDIVRP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19859, IF_8086|IF_FPU},
+ /* 326 */ {I_FDIVRP, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+19859, IF_8086|IF_FPU},
+ /* 327 */ {I_FEMMS, 0, {0,0,0,0,0}, nasm_bytecodes+21373, IF_PENT|IF_3DNOW},
+ /* 328 */ {I_FENI, 0, {0,0,0,0,0}, nasm_bytecodes+19864, IF_8086|IF_FPU},
+ /* 329 */ {I_FFREE, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19869, IF_8086|IF_FPU},
+ /* 330 */ {I_FFREE, 0, {0,0,0,0,0}, nasm_bytecodes+21377, IF_8086|IF_FPU},
+ /* 331 */ {I_FFREEP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19874, IF_286|IF_FPU|IF_UNDOC},
+ /* 332 */ {I_FFREEP, 0, {0,0,0,0,0}, nasm_bytecodes+21381, IF_286|IF_FPU|IF_UNDOC},
+ /* 333 */ {I_FIADD, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21385, IF_8086|IF_FPU},
+ /* 334 */ {I_FIADD, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+21389, IF_8086|IF_FPU},
+ /* 335 */ {I_FICOM, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21393, IF_8086|IF_FPU},
+ /* 336 */ {I_FICOM, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+21397, IF_8086|IF_FPU},
+ /* 337 */ {I_FICOMP, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21401, IF_8086|IF_FPU},
+ /* 338 */ {I_FICOMP, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+21405, IF_8086|IF_FPU},
+ /* 339 */ {I_FIDIV, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21409, IF_8086|IF_FPU},
+ /* 340 */ {I_FIDIV, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+21413, IF_8086|IF_FPU},
+ /* 341 */ {I_FIDIVR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21417, IF_8086|IF_FPU},
+ /* 342 */ {I_FIDIVR, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+21421, IF_8086|IF_FPU},
+ /* 343 */ {I_FILD, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21425, IF_8086|IF_FPU},
+ /* 344 */ {I_FILD, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+21429, IF_8086|IF_FPU},
+ /* 345 */ {I_FILD, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21433, IF_8086|IF_FPU},
+ /* 346 */ {I_FIMUL, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21437, IF_8086|IF_FPU},
+ /* 347 */ {I_FIMUL, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+21441, IF_8086|IF_FPU},
+ /* 348 */ {I_FINCSTP, 0, {0,0,0,0,0}, nasm_bytecodes+21445, IF_8086|IF_FPU},
+ /* 349 */ {I_FINIT, 0, {0,0,0,0,0}, nasm_bytecodes+19879, IF_8086|IF_FPU},
+ /* 350 */ {I_FIST, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21449, IF_8086|IF_FPU},
+ /* 351 */ {I_FIST, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+21453, IF_8086|IF_FPU},
+ /* 352 */ {I_FISTP, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21457, IF_8086|IF_FPU},
+ /* 353 */ {I_FISTP, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+21461, IF_8086|IF_FPU},
+ /* 354 */ {I_FISTP, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21465, IF_8086|IF_FPU},
+ /* 355 */ {I_FISTTP, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+21469, IF_PRESCOTT|IF_FPU},
+ /* 356 */ {I_FISTTP, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21473, IF_PRESCOTT|IF_FPU},
+ /* 357 */ {I_FISTTP, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21477, IF_PRESCOTT|IF_FPU},
+ /* 358 */ {I_FISUB, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21481, IF_8086|IF_FPU},
+ /* 359 */ {I_FISUB, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+21485, IF_8086|IF_FPU},
+ /* 360 */ {I_FISUBR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21489, IF_8086|IF_FPU},
+ /* 361 */ {I_FISUBR, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+21493, IF_8086|IF_FPU},
+ /* 362 */ {I_FLD, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21497, IF_8086|IF_FPU},
+ /* 363 */ {I_FLD, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21501, IF_8086|IF_FPU},
+ /* 364 */ {I_FLD, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+21505, IF_8086|IF_FPU},
+ /* 365 */ {I_FLD, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19884, IF_8086|IF_FPU},
+ /* 366 */ {I_FLD1, 0, {0,0,0,0,0}, nasm_bytecodes+21513, IF_8086|IF_FPU},
+ /* 367 */ {I_FLDCW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+21517, IF_8086|IF_FPU|IF_SW},
+ /* 368 */ {I_FLDENV, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+21521, IF_8086|IF_FPU},
+ /* 369 */ {I_FLDL2E, 0, {0,0,0,0,0}, nasm_bytecodes+21525, IF_8086|IF_FPU},
+ /* 370 */ {I_FLDL2T, 0, {0,0,0,0,0}, nasm_bytecodes+21529, IF_8086|IF_FPU},
+ /* 371 */ {I_FLDLG2, 0, {0,0,0,0,0}, nasm_bytecodes+21533, IF_8086|IF_FPU},
+ /* 372 */ {I_FLDLN2, 0, {0,0,0,0,0}, nasm_bytecodes+21537, IF_8086|IF_FPU},
+ /* 373 */ {I_FLDPI, 0, {0,0,0,0,0}, nasm_bytecodes+21541, IF_8086|IF_FPU},
+ /* 374 */ {I_FLDZ, 0, {0,0,0,0,0}, nasm_bytecodes+21545, IF_8086|IF_FPU},
+ /* 375 */ {I_FMUL, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21549, IF_8086|IF_FPU},
+ /* 376 */ {I_FMUL, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21553, IF_8086|IF_FPU},
+ /* 377 */ {I_FMUL, 1, {FPUREG|TO,0,0,0,0}, nasm_bytecodes+19889, IF_8086|IF_FPU},
+ /* 378 */ {I_FMUL, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+19889, IF_8086|IF_FPU},
+ /* 379 */ {I_FMUL, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19894, IF_8086|IF_FPU},
+ /* 380 */ {I_FMUL, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19899, IF_8086|IF_FPU},
+ /* 381 */ {I_FMULP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19904, IF_8086|IF_FPU},
+ /* 382 */ {I_FMULP, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+19904, IF_8086|IF_FPU},
+ /* 383 */ {I_FNCLEX, 0, {0,0,0,0,0}, nasm_bytecodes+19695, IF_8086|IF_FPU},
+ /* 384 */ {I_FNDISI, 0, {0,0,0,0,0}, nasm_bytecodes+19820, IF_8086|IF_FPU},
+ /* 385 */ {I_FNENI, 0, {0,0,0,0,0}, nasm_bytecodes+19865, IF_8086|IF_FPU},
+ /* 386 */ {I_FNINIT, 0, {0,0,0,0,0}, nasm_bytecodes+19880, IF_8086|IF_FPU},
+ /* 387 */ {I_FNOP, 0, {0,0,0,0,0}, nasm_bytecodes+21561, IF_8086|IF_FPU},
+ /* 388 */ {I_FNSAVE, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19910, IF_8086|IF_FPU},
+ /* 389 */ {I_FNSTCW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19920, IF_8086|IF_FPU|IF_SW},
+ /* 390 */ {I_FNSTENV, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19925, IF_8086|IF_FPU},
+ /* 391 */ {I_FNSTSW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19935, IF_8086|IF_FPU|IF_SW},
+ /* 392 */ {I_FNSTSW, 1, {REG_AX,0,0,0,0}, nasm_bytecodes+19940, IF_286|IF_FPU},
+ /* 393 */ {I_FPATAN, 0, {0,0,0,0,0}, nasm_bytecodes+21565, IF_8086|IF_FPU},
+ /* 394 */ {I_FPREM, 0, {0,0,0,0,0}, nasm_bytecodes+21569, IF_8086|IF_FPU},
+ /* 395 */ {I_FPREM1, 0, {0,0,0,0,0}, nasm_bytecodes+21573, IF_386|IF_FPU},
+ /* 396 */ {I_FPTAN, 0, {0,0,0,0,0}, nasm_bytecodes+21577, IF_8086|IF_FPU},
+ /* 397 */ {I_FRNDINT, 0, {0,0,0,0,0}, nasm_bytecodes+21581, IF_8086|IF_FPU},
+ /* 398 */ {I_FRSTOR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+21585, IF_8086|IF_FPU},
+ /* 399 */ {I_FSAVE, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19909, IF_8086|IF_FPU},
+ /* 400 */ {I_FSCALE, 0, {0,0,0,0,0}, nasm_bytecodes+21589, IF_8086|IF_FPU},
+ /* 401 */ {I_FSETPM, 0, {0,0,0,0,0}, nasm_bytecodes+21593, IF_286|IF_FPU},
+ /* 402 */ {I_FSIN, 0, {0,0,0,0,0}, nasm_bytecodes+21597, IF_386|IF_FPU},
+ /* 403 */ {I_FSINCOS, 0, {0,0,0,0,0}, nasm_bytecodes+21601, IF_386|IF_FPU},
+ /* 404 */ {I_FSQRT, 0, {0,0,0,0,0}, nasm_bytecodes+21605, IF_8086|IF_FPU},
+ /* 405 */ {I_FST, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21609, IF_8086|IF_FPU},
+ /* 406 */ {I_FST, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21613, IF_8086|IF_FPU},
+ /* 407 */ {I_FST, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19914, IF_8086|IF_FPU},
+ /* 408 */ {I_FSTCW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19919, IF_8086|IF_FPU|IF_SW},
+ /* 409 */ {I_FSTENV, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19924, IF_8086|IF_FPU},
+ /* 410 */ {I_FSTP, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21621, IF_8086|IF_FPU},
+ /* 411 */ {I_FSTP, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21625, IF_8086|IF_FPU},
+ /* 412 */ {I_FSTP, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+21629, IF_8086|IF_FPU},
+ /* 413 */ {I_FSTP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19929, IF_8086|IF_FPU},
+ /* 414 */ {I_FSTSW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+19934, IF_8086|IF_FPU|IF_SW},
+ /* 415 */ {I_FSTSW, 1, {REG_AX,0,0,0,0}, nasm_bytecodes+19939, IF_286|IF_FPU},
+ /* 416 */ {I_FSUB, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21637, IF_8086|IF_FPU},
+ /* 417 */ {I_FSUB, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21641, IF_8086|IF_FPU},
+ /* 418 */ {I_FSUB, 1, {FPUREG|TO,0,0,0,0}, nasm_bytecodes+19944, IF_8086|IF_FPU},
+ /* 419 */ {I_FSUB, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+19944, IF_8086|IF_FPU},
+ /* 420 */ {I_FSUB, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19949, IF_8086|IF_FPU},
+ /* 421 */ {I_FSUB, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19954, IF_8086|IF_FPU},
+ /* 422 */ {I_FSUBP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19959, IF_8086|IF_FPU},
+ /* 423 */ {I_FSUBP, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+19959, IF_8086|IF_FPU},
+ /* 424 */ {I_FSUBR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+21649, IF_8086|IF_FPU},
+ /* 425 */ {I_FSUBR, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+21653, IF_8086|IF_FPU},
+ /* 426 */ {I_FSUBR, 1, {FPUREG|TO,0,0,0,0}, nasm_bytecodes+19964, IF_8086|IF_FPU},
+ /* 427 */ {I_FSUBR, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+19964, IF_8086|IF_FPU},
+ /* 428 */ {I_FSUBR, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19969, IF_8086|IF_FPU},
+ /* 429 */ {I_FSUBR, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19974, IF_8086|IF_FPU},
+ /* 430 */ {I_FSUBRP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19979, IF_8086|IF_FPU},
+ /* 431 */ {I_FSUBRP, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+19979, IF_8086|IF_FPU},
+ /* 432 */ {I_FTST, 0, {0,0,0,0,0}, nasm_bytecodes+21661, IF_8086|IF_FPU},
+ /* 433 */ {I_FUCOM, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19984, IF_386|IF_FPU},
+ /* 434 */ {I_FUCOM, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19989, IF_386|IF_FPU},
+ /* 435 */ {I_FUCOMI, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+19994, IF_P6|IF_FPU},
+ /* 436 */ {I_FUCOMI, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+19999, IF_P6|IF_FPU},
+ /* 437 */ {I_FUCOMIP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+20004, IF_P6|IF_FPU},
+ /* 438 */ {I_FUCOMIP, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+20009, IF_P6|IF_FPU},
+ /* 439 */ {I_FUCOMP, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+20014, IF_386|IF_FPU},
+ /* 440 */ {I_FUCOMP, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+20019, IF_386|IF_FPU},
+ /* 441 */ {I_FUCOMPP, 0, {0,0,0,0,0}, nasm_bytecodes+21681, IF_386|IF_FPU},
+ /* 442 */ {I_FXAM, 0, {0,0,0,0,0}, nasm_bytecodes+21685, IF_8086|IF_FPU},
+ /* 443 */ {I_FXCH, 1, {FPUREG,0,0,0,0}, nasm_bytecodes+20024, IF_8086|IF_FPU},
+ /* 444 */ {I_FXCH, 2, {FPUREG,FPU0,0,0,0}, nasm_bytecodes+20024, IF_8086|IF_FPU},
+ /* 445 */ {I_FXCH, 2, {FPU0,FPUREG,0,0,0}, nasm_bytecodes+20029, IF_8086|IF_FPU},
+ /* 446 */ {I_FXTRACT, 0, {0,0,0,0,0}, nasm_bytecodes+21693, IF_8086|IF_FPU},
+ /* 447 */ {I_FYL2X, 0, {0,0,0,0,0}, nasm_bytecodes+21697, IF_8086|IF_FPU},
+ /* 448 */ {I_FYL2XP1, 0, {0,0,0,0,0}, nasm_bytecodes+21701, IF_8086|IF_FPU},
+ /* 449 */ {I_HLT, 0, {0,0,0,0,0}, nasm_bytecodes+22138, IF_8086|IF_PRIV},
+ /* 450 */ {I_IDIV, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+21705, IF_8086},
+ /* 451 */ {I_IDIV, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+20034, IF_8086},
+ /* 452 */ {I_IDIV, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+20039, IF_386},
+ /* 453 */ {I_IDIV, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+20044, IF_X64},
+ /* 454 */ {I_IMUL, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+21709, IF_8086},
+ /* 455 */ {I_IMUL, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+20049, IF_8086},
+ /* 456 */ {I_IMUL, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+20054, IF_386},
+ /* 457 */ {I_IMUL, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+20059, IF_X64},
+ /* 458 */ {I_IMUL, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16075, IF_386|IF_SM},
+ /* 459 */ {I_IMUL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16075, IF_386},
+ /* 460 */ {I_IMUL, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+16081, IF_386|IF_SM},
+ /* 461 */ {I_IMUL, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16081, IF_386},
+ /* 462 */ {I_IMUL, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+16087, IF_X64|IF_SM},
+ /* 463 */ {I_IMUL, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16087, IF_X64},
+ /* 464 */ {I_IMUL, 3, {REG_GPR|BITS16,MEMORY,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+16093, IF_186|IF_SM},
+ /* 465 */ {I_IMUL, 3, {REG_GPR|BITS16,MEMORY,IMMEDIATE|BITS16,0,0}, nasm_bytecodes+16099, IF_186|IF_SM},
+ /* 466 */ {I_IMUL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+16093, IF_186},
+ /* 467 */ {I_IMUL, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE|BITS16,0,0}, nasm_bytecodes+16099, IF_186},
+ /* 468 */ {I_IMUL, 3, {REG_GPR|BITS32,MEMORY,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+16111, IF_386|IF_SM},
+ /* 469 */ {I_IMUL, 3, {REG_GPR|BITS32,MEMORY,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+16117, IF_386|IF_SM},
+ /* 470 */ {I_IMUL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+16111, IF_386},
+ /* 471 */ {I_IMUL, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+16117, IF_386},
+ /* 472 */ {I_IMUL, 3, {REG_GPR|BITS64,MEMORY,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+16129, IF_X64|IF_SM},
+ /* 473 */ {I_IMUL, 3, {REG_GPR|BITS64,MEMORY,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+16135, IF_X64|IF_SM},
+ /* 474 */ {I_IMUL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+16129, IF_X64},
+ /* 475 */ {I_IMUL, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+16135, IF_X64},
+ /* 476 */ {I_IMUL, 2, {REG_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16147, IF_186},
+ /* 477 */ {I_IMUL, 2, {REG_GPR|BITS16,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+16153, IF_186},
+ /* 478 */ {I_IMUL, 2, {REG_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16165, IF_386},
+ /* 479 */ {I_IMUL, 2, {REG_GPR|BITS32,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+16171, IF_386},
+ /* 480 */ {I_IMUL, 2, {REG_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16183, IF_X64},
+ /* 481 */ {I_IMUL, 2, {REG_GPR|BITS64,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+16189, IF_X64},
+ /* 482 */ {I_IN, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+21713, IF_8086|IF_SB},
+ /* 483 */ {I_IN, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+20064, IF_8086|IF_SB},
+ /* 484 */ {I_IN, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+20069, IF_386|IF_SB},
+ /* 485 */ {I_IN, 2, {REG_AL,REG_DX,0,0,0}, nasm_bytecodes+22144, IF_8086},
+ /* 486 */ {I_IN, 2, {REG_AX,REG_DX,0,0,0}, nasm_bytecodes+21717, IF_8086},
+ /* 487 */ {I_IN, 2, {REG_EAX,REG_DX,0,0,0}, nasm_bytecodes+21721, IF_386},
+ /* 488 */ {I_INC, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+21725, IF_8086|IF_NOLONG},
+ /* 489 */ {I_INC, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+21729, IF_386|IF_NOLONG},
+ /* 490 */ {I_INC, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+20074, IF_8086|IF_LOCK},
+ /* 491 */ {I_INC, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16201, IF_8086|IF_LOCK},
+ /* 492 */ {I_INC, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16207, IF_386|IF_LOCK},
+ /* 493 */ {I_INC, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16213, IF_X64|IF_LOCK},
+ /* 494 */ {I_INSB, 0, {0,0,0,0,0}, nasm_bytecodes+22147, IF_186},
+ /* 495 */ {I_INSD, 0, {0,0,0,0,0}, nasm_bytecodes+21733, IF_386},
+ /* 496 */ {I_INSW, 0, {0,0,0,0,0}, nasm_bytecodes+21737, IF_186},
+ /* 497 */ {I_INT, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+21741, IF_8086|IF_SB},
+ /* 498 */ {I_INT1, 0, {0,0,0,0,0}, nasm_bytecodes+22141, IF_386},
+ /* 499 */ {I_INT3, 0, {0,0,0,0,0}, nasm_bytecodes+22150, IF_8086},
+ /* 500 */ {I_INTO, 0, {0,0,0,0,0}, nasm_bytecodes+22153, IF_8086|IF_NOLONG},
+ /* 501 */ {I_INVD, 0, {0,0,0,0,0}, nasm_bytecodes+21745, IF_486|IF_PRIV},
+ /* 502 */ {I_INVPCID, 2, {REG_GPR|BITS32,MEMORY|BITS128,0,0,0}, nasm_bytecodes+7553, IF_FUTURE|IF_INVPCID|IF_PRIV|IF_NOLONG},
+ /* 503 */ {I_INVPCID, 2, {REG_GPR|BITS64,MEMORY|BITS128,0,0,0}, nasm_bytecodes+7553, IF_FUTURE|IF_INVPCID|IF_PRIV|IF_LONG},
+ /* 504 */ {I_INVLPG, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20079, IF_486|IF_PRIV},
+ /* 505 */ {I_INVLPGA, 2, {REG_AX,REG_ECX,0,0,0}, nasm_bytecodes+16219, IF_X86_64|IF_AMD|IF_NOLONG},
+ /* 506 */ {I_INVLPGA, 2, {REG_EAX,REG_ECX,0,0,0}, nasm_bytecodes+16225, IF_X86_64|IF_AMD},
+ /* 507 */ {I_INVLPGA, 2, {REG_RAX,REG_ECX,0,0,0}, nasm_bytecodes+7560, IF_X64|IF_AMD},
+ /* 508 */ {I_INVLPGA, 0, {0,0,0,0,0}, nasm_bytecodes+16226, IF_X86_64|IF_AMD},
+ /* 509 */ {I_IRET, 0, {0,0,0,0,0}, nasm_bytecodes+21749, IF_8086},
+ /* 510 */ {I_IRETD, 0, {0,0,0,0,0}, nasm_bytecodes+21753, IF_386},
+ /* 511 */ {I_IRETQ, 0, {0,0,0,0,0}, nasm_bytecodes+21757, IF_X64},
+ /* 512 */ {I_IRETW, 0, {0,0,0,0,0}, nasm_bytecodes+21761, IF_8086},
+ /* 513 */ {I_JCXZ, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+20084, IF_8086|IF_NOLONG},
+ /* 514 */ {I_JECXZ, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+20089, IF_386},
+ /* 515 */ {I_JRCXZ, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+20094, IF_X64},
+ /* 516 */ {I_JMP, 1, {IMMEDIATE|SHORT,0,0,0,0}, nasm_bytecodes+20100, IF_8086},
+ /* 517 */ {I_JMP, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+20104, IF_8086},
+ /* 518 */ {I_JMP, 1, {IMMEDIATE|BITS16,0,0,0,0}, nasm_bytecodes+20109, IF_8086},
+ /* 519 */ {I_JMP, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+20114, IF_386},
+ /* 520 */ {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+16249, IF_8086|IF_NOLONG},
+ /* 521 */ {I_JMP, 2, {IMMEDIATE|BITS16|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+16255, IF_8086|IF_NOLONG},
+ /* 522 */ {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+16255, IF_8086|IF_NOLONG},
+ /* 523 */ {I_JMP, 2, {IMMEDIATE|BITS32|COLON,IMMEDIATE,0,0,0}, nasm_bytecodes+16261, IF_386|IF_NOLONG},
+ /* 524 */ {I_JMP, 2, {IMMEDIATE|COLON,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+16261, IF_386|IF_NOLONG},
+ /* 525 */ {I_JMP, 1, {MEMORY|FAR,0,0,0,0}, nasm_bytecodes+20119, IF_8086|IF_NOLONG},
+ /* 526 */ {I_JMP, 1, {MEMORY|FAR,0,0,0,0}, nasm_bytecodes+20124, IF_X64},
+ /* 527 */ {I_JMP, 1, {MEMORY|BITS16|FAR,0,0,0,0}, nasm_bytecodes+20129, IF_8086},
+ /* 528 */ {I_JMP, 1, {MEMORY|BITS32|FAR,0,0,0,0}, nasm_bytecodes+20134, IF_386},
+ /* 529 */ {I_JMP, 1, {MEMORY|BITS64|FAR,0,0,0,0}, nasm_bytecodes+20124, IF_X64},
+ /* 530 */ {I_JMP, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+20144, IF_8086},
+ /* 531 */ {I_JMP, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+20149, IF_386|IF_NOLONG},
+ /* 532 */ {I_JMP, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+20154, IF_X64},
+ /* 533 */ {I_JMP, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20139, IF_8086},
+ /* 534 */ {I_JMP, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+20144, IF_8086},
+ /* 535 */ {I_JMP, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+20149, IF_386|IF_NOLONG},
+ /* 536 */ {I_JMP, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20154, IF_X64},
+ /* 537 */ {I_JMP, 1, {MEMORY|BITS64,0,0,0,0}, nasm_bytecodes+20154, IF_X64},
+ /* 538 */ {I_JMPE, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+16267, IF_IA64},
+ /* 539 */ {I_JMPE, 1, {IMMEDIATE|BITS16,0,0,0,0}, nasm_bytecodes+16273, IF_IA64},
+ /* 540 */ {I_JMPE, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+16279, IF_IA64},
+ /* 541 */ {I_JMPE, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16285, IF_IA64},
+ /* 542 */ {I_JMPE, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16291, IF_IA64},
+ /* 543 */ {I_LAHF, 0, {0,0,0,0,0}, nasm_bytecodes+22156, IF_8086},
+ /* 544 */ {I_LAR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16297, IF_286|IF_PROT|IF_SW},
+ /* 545 */ {I_LAR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16297, IF_286|IF_PROT},
+ /* 546 */ {I_LAR, 2, {REG_GPR|BITS16,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16297, IF_386|IF_PROT},
+ /* 547 */ {I_LAR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+16303, IF_386|IF_PROT|IF_SW},
+ /* 548 */ {I_LAR, 2, {REG_GPR|BITS32,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16303, IF_386|IF_PROT},
+ /* 549 */ {I_LAR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16303, IF_386|IF_PROT},
+ /* 550 */ {I_LAR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+16309, IF_X64|IF_PROT|IF_SW},
+ /* 551 */ {I_LAR, 2, {REG_GPR|BITS64,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16309, IF_X64|IF_PROT},
+ /* 552 */ {I_LAR, 2, {REG_GPR|BITS64,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16309, IF_X64|IF_PROT},
+ /* 553 */ {I_LAR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16309, IF_X64|IF_PROT},
+ /* 554 */ {I_LDS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+20159, IF_8086|IF_NOLONG},
+ /* 555 */ {I_LDS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+20164, IF_386|IF_NOLONG},
+ /* 556 */ {I_LEA, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+20169, IF_8086},
+ /* 557 */ {I_LEA, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+20174, IF_386},
+ /* 558 */ {I_LEA, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+20179, IF_X64},
+ /* 559 */ {I_LEAVE, 0, {0,0,0,0,0}, nasm_bytecodes+20436, IF_186},
+ /* 560 */ {I_LES, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+20184, IF_8086|IF_NOLONG},
+ /* 561 */ {I_LES, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+20189, IF_386|IF_NOLONG},
+ /* 562 */ {I_LFENCE, 0, {0,0,0,0,0}, nasm_bytecodes+20194, IF_X64|IF_AMD},
+ /* 563 */ {I_LFS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16315, IF_386},
+ /* 564 */ {I_LFS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+16321, IF_386},
+ /* 565 */ {I_LFS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+16327, IF_X64},
+ /* 566 */ {I_LGDT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20199, IF_286|IF_PRIV},
+ /* 567 */ {I_LGS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16333, IF_386},
+ /* 568 */ {I_LGS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+16339, IF_386},
+ /* 569 */ {I_LGS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+16345, IF_X64},
+ /* 570 */ {I_LIDT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20204, IF_286|IF_PRIV},
+ /* 571 */ {I_LLDT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20209, IF_286|IF_PROT|IF_PRIV},
+ /* 572 */ {I_LLDT, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+20209, IF_286|IF_PROT|IF_PRIV},
+ /* 573 */ {I_LLDT, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+20209, IF_286|IF_PROT|IF_PRIV},
+ /* 574 */ {I_LMSW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20214, IF_286|IF_PRIV},
+ /* 575 */ {I_LMSW, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+20214, IF_286|IF_PRIV},
+ /* 576 */ {I_LMSW, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+20214, IF_286|IF_PRIV},
+ /* 577 */ {I_LOADALL, 0, {0,0,0,0,0}, nasm_bytecodes+21765, IF_386|IF_UNDOC},
+ /* 578 */ {I_LOADALL286, 0, {0,0,0,0,0}, nasm_bytecodes+21769, IF_286|IF_UNDOC},
+ /* 579 */ {I_LODSB, 0, {0,0,0,0,0}, nasm_bytecodes+22159, IF_8086},
+ /* 580 */ {I_LODSD, 0, {0,0,0,0,0}, nasm_bytecodes+21773, IF_386},
+ /* 581 */ {I_LODSQ, 0, {0,0,0,0,0}, nasm_bytecodes+21777, IF_X64},
+ /* 582 */ {I_LODSW, 0, {0,0,0,0,0}, nasm_bytecodes+21781, IF_8086},
+ /* 583 */ {I_LOOP, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+20219, IF_8086},
+ /* 584 */ {I_LOOP, 2, {IMMEDIATE,REG_CX,0,0,0}, nasm_bytecodes+20224, IF_8086|IF_NOLONG},
+ /* 585 */ {I_LOOP, 2, {IMMEDIATE,REG_ECX,0,0,0}, nasm_bytecodes+20229, IF_386},
+ /* 586 */ {I_LOOP, 2, {IMMEDIATE,REG_RCX,0,0,0}, nasm_bytecodes+20234, IF_X64},
+ /* 587 */ {I_LOOPE, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+20239, IF_8086},
+ /* 588 */ {I_LOOPE, 2, {IMMEDIATE,REG_CX,0,0,0}, nasm_bytecodes+20244, IF_8086|IF_NOLONG},
+ /* 589 */ {I_LOOPE, 2, {IMMEDIATE,REG_ECX,0,0,0}, nasm_bytecodes+20249, IF_386},
+ /* 590 */ {I_LOOPE, 2, {IMMEDIATE,REG_RCX,0,0,0}, nasm_bytecodes+20254, IF_X64},
+ /* 591 */ {I_LOOPNE, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+20259, IF_8086},
+ /* 592 */ {I_LOOPNE, 2, {IMMEDIATE,REG_CX,0,0,0}, nasm_bytecodes+20264, IF_8086|IF_NOLONG},
+ /* 593 */ {I_LOOPNE, 2, {IMMEDIATE,REG_ECX,0,0,0}, nasm_bytecodes+20269, IF_386},
+ /* 594 */ {I_LOOPNE, 2, {IMMEDIATE,REG_RCX,0,0,0}, nasm_bytecodes+20274, IF_X64},
+ /* 595 */ {I_LOOPNZ, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+20259, IF_8086},
+ /* 596 */ {I_LOOPNZ, 2, {IMMEDIATE,REG_CX,0,0,0}, nasm_bytecodes+20264, IF_8086|IF_NOLONG},
+ /* 597 */ {I_LOOPNZ, 2, {IMMEDIATE,REG_ECX,0,0,0}, nasm_bytecodes+20269, IF_386},
+ /* 598 */ {I_LOOPNZ, 2, {IMMEDIATE,REG_RCX,0,0,0}, nasm_bytecodes+20274, IF_X64},
+ /* 599 */ {I_LOOPZ, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+20239, IF_8086},
+ /* 600 */ {I_LOOPZ, 2, {IMMEDIATE,REG_CX,0,0,0}, nasm_bytecodes+20244, IF_8086|IF_NOLONG},
+ /* 601 */ {I_LOOPZ, 2, {IMMEDIATE,REG_ECX,0,0,0}, nasm_bytecodes+20249, IF_386},
+ /* 602 */ {I_LOOPZ, 2, {IMMEDIATE,REG_RCX,0,0,0}, nasm_bytecodes+20254, IF_X64},
+ /* 603 */ {I_LSL, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16351, IF_286|IF_PROT|IF_SW},
+ /* 604 */ {I_LSL, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16351, IF_286|IF_PROT},
+ /* 605 */ {I_LSL, 2, {REG_GPR|BITS16,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16351, IF_386|IF_PROT},
+ /* 606 */ {I_LSL, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+16357, IF_386|IF_PROT|IF_SW},
+ /* 607 */ {I_LSL, 2, {REG_GPR|BITS32,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16357, IF_386|IF_PROT},
+ /* 608 */ {I_LSL, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16357, IF_386|IF_PROT},
+ /* 609 */ {I_LSL, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+16363, IF_X64|IF_PROT|IF_SW},
+ /* 610 */ {I_LSL, 2, {REG_GPR|BITS64,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16363, IF_X64|IF_PROT},
+ /* 611 */ {I_LSL, 2, {REG_GPR|BITS64,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16363, IF_X64|IF_PROT},
+ /* 612 */ {I_LSL, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16363, IF_X64|IF_PROT},
+ /* 613 */ {I_LSS, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16369, IF_386},
+ /* 614 */ {I_LSS, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+16375, IF_386},
+ /* 615 */ {I_LSS, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+16381, IF_X64},
+ /* 616 */ {I_LTR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20279, IF_286|IF_PROT|IF_PRIV},
+ /* 617 */ {I_LTR, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+20279, IF_286|IF_PROT|IF_PRIV},
+ /* 618 */ {I_LTR, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+20279, IF_286|IF_PROT|IF_PRIV},
+ /* 619 */ {I_MFENCE, 0, {0,0,0,0,0}, nasm_bytecodes+20284, IF_X64|IF_AMD},
+ /* 620 */ {I_MONITOR, 0, {0,0,0,0,0}, nasm_bytecodes+20289, IF_PRESCOTT},
+ /* 621 */ {I_MOV, 2, {MEMORY,REG_SREG,0,0,0}, nasm_bytecodes+20310, IF_8086|IF_SW},
+ /* 622 */ {I_MOV, 2, {REG_GPR|BITS16,REG_SREG,0,0,0}, nasm_bytecodes+20294, IF_8086},
+ /* 623 */ {I_MOV, 2, {REG_GPR|BITS32,REG_SREG,0,0,0}, nasm_bytecodes+20299, IF_386},
+ /* 624 */ {I_MOV, 2, {RM_GPR|BITS64,REG_SREG,0,0,0}, nasm_bytecodes+20309, IF_X64},
+ /* 625 */ {I_MOV, 2, {REG_SREG,MEMORY,0,0,0}, nasm_bytecodes+20330, IF_8086|IF_SW},
+ /* 626 */ {I_MOV, 2, {REG_SREG,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+20319, IF_8086},
+ /* 627 */ {I_MOV, 2, {REG_SREG,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+20324, IF_386},
+ /* 628 */ {I_MOV, 2, {REG_SREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+20329, IF_X64},
+ /* 629 */ {I_MOV, 2, {REG_AL,MEM_OFFS,0,0,0}, nasm_bytecodes+21785, IF_8086|IF_SM},
+ /* 630 */ {I_MOV, 2, {REG_AX,MEM_OFFS,0,0,0}, nasm_bytecodes+20334, IF_8086|IF_SM},
+ /* 631 */ {I_MOV, 2, {REG_EAX,MEM_OFFS,0,0,0}, nasm_bytecodes+20339, IF_386|IF_SM},
+ /* 632 */ {I_MOV, 2, {REG_RAX,MEM_OFFS,0,0,0}, nasm_bytecodes+20344, IF_X64|IF_SM},
+ /* 633 */ {I_MOV, 2, {MEM_OFFS,REG_AL,0,0,0}, nasm_bytecodes+21789, IF_8086|IF_SM|IF_NOHLE},
+ /* 634 */ {I_MOV, 2, {MEM_OFFS,REG_AX,0,0,0}, nasm_bytecodes+20349, IF_8086|IF_SM|IF_NOHLE},
+ /* 635 */ {I_MOV, 2, {MEM_OFFS,REG_EAX,0,0,0}, nasm_bytecodes+20354, IF_386|IF_SM|IF_NOHLE},
+ /* 636 */ {I_MOV, 2, {MEM_OFFS,REG_RAX,0,0,0}, nasm_bytecodes+20359, IF_X64|IF_SM|IF_NOHLE},
+ /* 637 */ {I_MOV, 2, {REG_GPR|BITS32,REG_CREG,0,0,0}, nasm_bytecodes+16387, IF_386|IF_PRIV|IF_NOLONG},
+ /* 638 */ {I_MOV, 2, {REG_GPR|BITS64,REG_CREG,0,0,0}, nasm_bytecodes+16393, IF_X64|IF_PRIV},
+ /* 639 */ {I_MOV, 2, {REG_CREG,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16399, IF_386|IF_PRIV|IF_NOLONG},
+ /* 640 */ {I_MOV, 2, {REG_CREG,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16405, IF_X64|IF_PRIV},
+ /* 641 */ {I_MOV, 2, {REG_GPR|BITS32,REG_DREG,0,0,0}, nasm_bytecodes+16412, IF_386|IF_PRIV|IF_NOLONG},
+ /* 642 */ {I_MOV, 2, {REG_GPR|BITS64,REG_DREG,0,0,0}, nasm_bytecodes+16411, IF_X64|IF_PRIV},
+ /* 643 */ {I_MOV, 2, {REG_DREG,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16418, IF_386|IF_PRIV|IF_NOLONG},
+ /* 644 */ {I_MOV, 2, {REG_DREG,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16417, IF_X64|IF_PRIV},
+ /* 645 */ {I_MOV, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+20374, IF_8086|IF_SM},
+ /* 646 */ {I_MOV, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+20375, IF_8086},
+ /* 647 */ {I_MOV, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16423, IF_8086|IF_SM},
+ /* 648 */ {I_MOV, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16424, IF_8086},
+ /* 649 */ {I_MOV, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16429, IF_386|IF_SM},
+ /* 650 */ {I_MOV, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16430, IF_386},
+ /* 651 */ {I_MOV, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16435, IF_X64|IF_SM},
+ /* 652 */ {I_MOV, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16436, IF_X64},
+ /* 653 */ {I_MOV, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+21793, IF_8086|IF_SM},
+ /* 654 */ {I_MOV, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+21793, IF_8086},
+ /* 655 */ {I_MOV, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+20379, IF_8086|IF_SM},
+ /* 656 */ {I_MOV, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+20379, IF_8086},
+ /* 657 */ {I_MOV, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+20384, IF_386|IF_SM},
+ /* 658 */ {I_MOV, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+20384, IF_386},
+ /* 659 */ {I_MOV, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+20389, IF_X64|IF_SM},
+ /* 660 */ {I_MOV, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+20389, IF_X64},
+ /* 661 */ {I_MOV, 2, {REG_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+21797, IF_8086|IF_SM},
+ /* 662 */ {I_MOV, 2, {REG_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+20394, IF_8086|IF_SM},
+ /* 663 */ {I_MOV, 2, {REG_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+20399, IF_386|IF_SM},
+ /* 664 */ {I_MOV, 2, {REG_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+20409, IF_X64|IF_SM},
+ /* 665 */ {I_MOV, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+16441, IF_8086|IF_SM},
+ /* 666 */ {I_MOV, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+7595, IF_8086|IF_SM},
+ /* 667 */ {I_MOV, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+7602, IF_386|IF_SM},
+ /* 668 */ {I_MOV, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+7609, IF_X64|IF_SM},
+ /* 669 */ {I_MOV, 2, {RM_GPR|BITS64,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+7609, IF_X64},
+ /* 670 */ {I_MOV, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16441, IF_8086|IF_SM},
+ /* 671 */ {I_MOV, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+7595, IF_8086|IF_SM},
+ /* 672 */ {I_MOV, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+7602, IF_386|IF_SM},
+ /* 673 */ {I_MOVD, 2, {MMXREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+16447, IF_PENT|IF_MMX|IF_SD},
+ /* 674 */ {I_MOVD, 2, {RM_GPR|BITS32,MMXREG,0,0,0}, nasm_bytecodes+16453, IF_PENT|IF_MMX|IF_SD},
+ /* 675 */ {I_MOVQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+16459, IF_PENT|IF_MMX|IF_SQ},
+ /* 676 */ {I_MOVQ, 2, {RM_MMX,MMXREG,0,0,0}, nasm_bytecodes+16465, IF_PENT|IF_MMX|IF_SQ},
+ /* 677 */ {I_MOVQ, 2, {MMXREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+7616, IF_X64|IF_MMX},
+ /* 678 */ {I_MOVQ, 2, {RM_GPR|BITS64,MMXREG,0,0,0}, nasm_bytecodes+7623, IF_X64|IF_MMX},
+ /* 679 */ {I_MOVSB, 0, {0,0,0,0,0}, nasm_bytecodes+3751, IF_8086},
+ /* 680 */ {I_MOVSD, 0, {0,0,0,0,0}, nasm_bytecodes+21801, IF_386},
+ /* 681 */ {I_MOVSQ, 0, {0,0,0,0,0}, nasm_bytecodes+21805, IF_X64},
+ /* 682 */ {I_MOVSW, 0, {0,0,0,0,0}, nasm_bytecodes+21809, IF_8086},
+ /* 683 */ {I_MOVSX, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16471, IF_386|IF_SB},
+ /* 684 */ {I_MOVSX, 2, {REG_GPR|BITS16,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+16471, IF_386},
+ /* 685 */ {I_MOVSX, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, nasm_bytecodes+16477, IF_386},
+ /* 686 */ {I_MOVSX, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+16483, IF_386},
+ /* 687 */ {I_MOVSX, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, nasm_bytecodes+16489, IF_X64},
+ /* 688 */ {I_MOVSX, 2, {REG_GPR|BITS64,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+16495, IF_X64},
+ /* 689 */ {I_MOVSXD, 2, {REG_GPR|BITS64,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+20414, IF_X64},
+ /* 690 */ {I_MOVZX, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16501, IF_386|IF_SB},
+ /* 691 */ {I_MOVZX, 2, {REG_GPR|BITS16,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+16501, IF_386},
+ /* 692 */ {I_MOVZX, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, nasm_bytecodes+16507, IF_386},
+ /* 693 */ {I_MOVZX, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+16513, IF_386},
+ /* 694 */ {I_MOVZX, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, nasm_bytecodes+16519, IF_X64},
+ /* 695 */ {I_MOVZX, 2, {REG_GPR|BITS64,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+16525, IF_X64},
+ /* 696 */ {I_MUL, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+21813, IF_8086},
+ /* 697 */ {I_MUL, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+20419, IF_8086},
+ /* 698 */ {I_MUL, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+20424, IF_386},
+ /* 699 */ {I_MUL, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+20429, IF_X64},
+ /* 700 */ {I_MWAIT, 0, {0,0,0,0,0}, nasm_bytecodes+20434, IF_PRESCOTT},
+ /* 701 */ {I_NEG, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+20439, IF_8086|IF_LOCK},
+ /* 702 */ {I_NEG, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16531, IF_8086|IF_LOCK},
+ /* 703 */ {I_NEG, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16537, IF_386|IF_LOCK},
+ /* 704 */ {I_NEG, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16543, IF_X64|IF_LOCK},
+ /* 705 */ {I_NOP, 0, {0,0,0,0,0}, nasm_bytecodes+21817, IF_8086},
+ /* 706 */ {I_NOP, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16549, IF_P6},
+ /* 707 */ {I_NOP, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16555, IF_P6},
+ /* 708 */ {I_NOP, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16561, IF_X64},
+ /* 709 */ {I_NOT, 1, {RM_GPR|BITS8,0,0,0,0}, nasm_bytecodes+20444, IF_8086|IF_LOCK},
+ /* 710 */ {I_NOT, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16567, IF_8086|IF_LOCK},
+ /* 711 */ {I_NOT, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16573, IF_386|IF_LOCK},
+ /* 712 */ {I_NOT, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16579, IF_X64|IF_LOCK},
+ /* 713 */ {I_OR, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+20449, IF_8086|IF_SM|IF_LOCK},
+ /* 714 */ {I_OR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+20450, IF_8086},
+ /* 715 */ {I_OR, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16585, IF_8086|IF_SM|IF_LOCK},
+ /* 716 */ {I_OR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16586, IF_8086},
+ /* 717 */ {I_OR, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16591, IF_386|IF_SM|IF_LOCK},
+ /* 718 */ {I_OR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16592, IF_386},
+ /* 719 */ {I_OR, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16597, IF_X64|IF_SM|IF_LOCK},
+ /* 720 */ {I_OR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16598, IF_X64},
+ /* 721 */ {I_OR, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+14906, IF_8086|IF_SM},
+ /* 722 */ {I_OR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+14906, IF_8086},
+ /* 723 */ {I_OR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+20454, IF_8086|IF_SM},
+ /* 724 */ {I_OR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+20454, IF_8086},
+ /* 725 */ {I_OR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+20459, IF_386|IF_SM},
+ /* 726 */ {I_OR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+20459, IF_386},
+ /* 727 */ {I_OR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+20464, IF_X64|IF_SM},
+ /* 728 */ {I_OR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+20464, IF_X64},
+ /* 729 */ {I_OR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7630, IF_8086|IF_LOCK},
+ /* 730 */ {I_OR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7637, IF_386|IF_LOCK},
+ /* 731 */ {I_OR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7644, IF_X64|IF_LOCK},
+ /* 732 */ {I_OR, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+21821, IF_8086|IF_SM},
+ /* 733 */ {I_OR, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+7631, IF_8086|IF_SM},
+ /* 734 */ {I_OR, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+20469, IF_8086|IF_SM},
+ /* 735 */ {I_OR, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+7638, IF_386|IF_SM},
+ /* 736 */ {I_OR, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+20474, IF_386|IF_SM},
+ /* 737 */ {I_OR, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+7645, IF_X64|IF_SM},
+ /* 738 */ {I_OR, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+20479, IF_X64|IF_SM},
+ /* 739 */ {I_OR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+16603, IF_8086|IF_SM|IF_LOCK},
+ /* 740 */ {I_OR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+7651, IF_8086|IF_SM|IF_LOCK},
+ /* 741 */ {I_OR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+7658, IF_386|IF_SM|IF_LOCK},
+ /* 742 */ {I_OR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+7665, IF_X64|IF_SM|IF_LOCK},
+ /* 743 */ {I_OR, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16603, IF_8086|IF_SM|IF_LOCK},
+ /* 744 */ {I_OR, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+7651, IF_8086|IF_SM|IF_LOCK},
+ /* 745 */ {I_OR, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+7658, IF_386|IF_SM|IF_LOCK},
+ /* 746 */ {I_OUT, 2, {IMMEDIATE,REG_AL,0,0,0}, nasm_bytecodes+21825, IF_8086|IF_SB},
+ /* 747 */ {I_OUT, 2, {IMMEDIATE,REG_AX,0,0,0}, nasm_bytecodes+20484, IF_8086|IF_SB},
+ /* 748 */ {I_OUT, 2, {IMMEDIATE,REG_EAX,0,0,0}, nasm_bytecodes+20489, IF_386|IF_SB},
+ /* 749 */ {I_OUT, 2, {REG_DX,REG_AL,0,0,0}, nasm_bytecodes+22162, IF_8086},
+ /* 750 */ {I_OUT, 2, {REG_DX,REG_AX,0,0,0}, nasm_bytecodes+21829, IF_8086},
+ /* 751 */ {I_OUT, 2, {REG_DX,REG_EAX,0,0,0}, nasm_bytecodes+21833, IF_386},
+ /* 752 */ {I_OUTSB, 0, {0,0,0,0,0}, nasm_bytecodes+22165, IF_186},
+ /* 753 */ {I_OUTSD, 0, {0,0,0,0,0}, nasm_bytecodes+21837, IF_386},
+ /* 754 */ {I_OUTSW, 0, {0,0,0,0,0}, nasm_bytecodes+21841, IF_186},
+ /* 755 */ {I_PACKSSDW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7672, IF_PENT|IF_MMX|IF_SQ},
+ /* 756 */ {I_PACKSSWB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7679, IF_PENT|IF_MMX|IF_SQ},
+ /* 757 */ {I_PACKUSWB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7686, IF_PENT|IF_MMX|IF_SQ},
+ /* 758 */ {I_PADDB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7693, IF_PENT|IF_MMX|IF_SQ},
+ /* 759 */ {I_PADDD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7700, IF_PENT|IF_MMX|IF_SQ},
+ /* 760 */ {I_PADDSB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7707, IF_PENT|IF_MMX|IF_SQ},
+ /* 761 */ {I_PADDSIW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+16615, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
+ /* 762 */ {I_PADDSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7714, IF_PENT|IF_MMX|IF_SQ},
+ /* 763 */ {I_PADDUSB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7721, IF_PENT|IF_MMX|IF_SQ},
+ /* 764 */ {I_PADDUSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7728, IF_PENT|IF_MMX|IF_SQ},
+ /* 765 */ {I_PADDW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7735, IF_PENT|IF_MMX|IF_SQ},
+ /* 766 */ {I_PAND, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7742, IF_PENT|IF_MMX|IF_SQ},
+ /* 767 */ {I_PANDN, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7749, IF_PENT|IF_MMX|IF_SQ},
+ /* 768 */ {I_PAUSE, 0, {0,0,0,0,0}, nasm_bytecodes+20494, IF_8086},
+ /* 769 */ {I_PAVEB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+16621, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
+ /* 770 */ {I_PAVGUSB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3690, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 771 */ {I_PCMPEQB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7756, IF_PENT|IF_MMX|IF_SQ},
+ /* 772 */ {I_PCMPEQD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7763, IF_PENT|IF_MMX|IF_SQ},
+ /* 773 */ {I_PCMPEQW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7770, IF_PENT|IF_MMX|IF_SQ},
+ /* 774 */ {I_PCMPGTB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7777, IF_PENT|IF_MMX|IF_SQ},
+ /* 775 */ {I_PCMPGTD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7784, IF_PENT|IF_MMX|IF_SQ},
+ /* 776 */ {I_PCMPGTW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7791, IF_PENT|IF_MMX|IF_SQ},
+ /* 777 */ {I_PDISTIB, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+17798, IF_PENT|IF_MMX|IF_SM|IF_CYRIX},
+ /* 778 */ {I_PF2ID, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3698, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 779 */ {I_PFACC, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3706, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 780 */ {I_PFADD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3714, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 781 */ {I_PFCMPEQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3722, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 782 */ {I_PFCMPGE, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3730, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 783 */ {I_PFCMPGT, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3738, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 784 */ {I_PFMAX, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3746, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 785 */ {I_PFMIN, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3754, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 786 */ {I_PFMUL, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3762, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 787 */ {I_PFRCP, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3770, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 788 */ {I_PFRCPIT1, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3778, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 789 */ {I_PFRCPIT2, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3786, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 790 */ {I_PFRSQIT1, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3794, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 791 */ {I_PFRSQRT, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3802, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 792 */ {I_PFSUB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3810, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 793 */ {I_PFSUBR, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3818, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 794 */ {I_PI2FD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3826, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 795 */ {I_PMACHRIW, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+17894, IF_PENT|IF_MMX|IF_SM|IF_CYRIX},
+ /* 796 */ {I_PMADDWD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7798, IF_PENT|IF_MMX|IF_SQ},
+ /* 797 */ {I_PMAGW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+16627, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
+ /* 798 */ {I_PMULHRIW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+16633, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
+ /* 799 */ {I_PMULHRWA, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3834, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 800 */ {I_PMULHRWC, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+16639, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
+ /* 801 */ {I_PMULHW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7805, IF_PENT|IF_MMX|IF_SQ},
+ /* 802 */ {I_PMULLW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7812, IF_PENT|IF_MMX|IF_SQ},
+ /* 803 */ {I_PMVGEZB, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+18026, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
+ /* 804 */ {I_PMVLZB, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+17882, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
+ /* 805 */ {I_PMVNZB, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+17864, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
+ /* 806 */ {I_PMVZB, 2, {MMXREG,MEMORY,0,0,0}, nasm_bytecodes+17786, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
+ /* 807 */ {I_POP, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+21845, IF_8086},
+ /* 808 */ {I_POP, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+21849, IF_386|IF_NOLONG},
+ /* 809 */ {I_POP, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+21853, IF_X64},
+ /* 810 */ {I_POP, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+20499, IF_8086},
+ /* 811 */ {I_POP, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+20504, IF_386|IF_NOLONG},
+ /* 812 */ {I_POP, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+20509, IF_X64},
+ /* 813 */ {I_POP, 1, {REG_DESS,0,0,0,0}, nasm_bytecodes+21687, IF_8086|IF_NOLONG},
+ /* 814 */ {I_POP, 1, {REG_FSGS,0,0,0,0}, nasm_bytecodes+21857, IF_386},
+ /* 815 */ {I_POPA, 0, {0,0,0,0,0}, nasm_bytecodes+21861, IF_186|IF_NOLONG},
+ /* 816 */ {I_POPAD, 0, {0,0,0,0,0}, nasm_bytecodes+21865, IF_386|IF_NOLONG},
+ /* 817 */ {I_POPAW, 0, {0,0,0,0,0}, nasm_bytecodes+21869, IF_186|IF_NOLONG},
+ /* 818 */ {I_POPF, 0, {0,0,0,0,0}, nasm_bytecodes+21873, IF_8086},
+ /* 819 */ {I_POPFD, 0, {0,0,0,0,0}, nasm_bytecodes+21877, IF_386|IF_NOLONG},
+ /* 820 */ {I_POPFQ, 0, {0,0,0,0,0}, nasm_bytecodes+21877, IF_X64},
+ /* 821 */ {I_POPFW, 0, {0,0,0,0,0}, nasm_bytecodes+21881, IF_8086},
+ /* 822 */ {I_POR, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7819, IF_PENT|IF_MMX|IF_SQ},
+ /* 823 */ {I_PREFETCH, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20514, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 824 */ {I_PREFETCHW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20519, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 825 */ {I_PSLLD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7826, IF_PENT|IF_MMX|IF_SQ},
+ /* 826 */ {I_PSLLD, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7833, IF_PENT|IF_MMX},
+ /* 827 */ {I_PSLLQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7840, IF_PENT|IF_MMX|IF_SQ},
+ /* 828 */ {I_PSLLQ, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7847, IF_PENT|IF_MMX},
+ /* 829 */ {I_PSLLW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7854, IF_PENT|IF_MMX|IF_SQ},
+ /* 830 */ {I_PSLLW, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7861, IF_PENT|IF_MMX},
+ /* 831 */ {I_PSRAD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7868, IF_PENT|IF_MMX|IF_SQ},
+ /* 832 */ {I_PSRAD, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7875, IF_PENT|IF_MMX},
+ /* 833 */ {I_PSRAW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7882, IF_PENT|IF_MMX|IF_SQ},
+ /* 834 */ {I_PSRAW, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7889, IF_PENT|IF_MMX},
+ /* 835 */ {I_PSRLD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7896, IF_PENT|IF_MMX|IF_SQ},
+ /* 836 */ {I_PSRLD, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7903, IF_PENT|IF_MMX},
+ /* 837 */ {I_PSRLQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7910, IF_PENT|IF_MMX|IF_SQ},
+ /* 838 */ {I_PSRLQ, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7917, IF_PENT|IF_MMX},
+ /* 839 */ {I_PSRLW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7924, IF_PENT|IF_MMX|IF_SQ},
+ /* 840 */ {I_PSRLW, 2, {MMXREG,IMMEDIATE,0,0,0}, nasm_bytecodes+7931, IF_PENT|IF_MMX},
+ /* 841 */ {I_PSUBB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7938, IF_PENT|IF_MMX|IF_SQ},
+ /* 842 */ {I_PSUBD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7945, IF_PENT|IF_MMX|IF_SQ},
+ /* 843 */ {I_PSUBSB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7952, IF_PENT|IF_MMX|IF_SQ},
+ /* 844 */ {I_PSUBSIW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+16645, IF_PENT|IF_MMX|IF_SQ|IF_CYRIX},
+ /* 845 */ {I_PSUBSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7959, IF_PENT|IF_MMX|IF_SQ},
+ /* 846 */ {I_PSUBUSB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7966, IF_PENT|IF_MMX|IF_SQ},
+ /* 847 */ {I_PSUBUSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7973, IF_PENT|IF_MMX|IF_SQ},
+ /* 848 */ {I_PSUBW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7980, IF_PENT|IF_MMX|IF_SQ},
+ /* 849 */ {I_PUNPCKHBW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7987, IF_PENT|IF_MMX|IF_SQ},
+ /* 850 */ {I_PUNPCKHDQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+7994, IF_PENT|IF_MMX|IF_SQ},
+ /* 851 */ {I_PUNPCKHWD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8001, IF_PENT|IF_MMX|IF_SQ},
+ /* 852 */ {I_PUNPCKLBW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8008, IF_PENT|IF_MMX|IF_SQ},
+ /* 853 */ {I_PUNPCKLDQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8015, IF_PENT|IF_MMX|IF_SQ},
+ /* 854 */ {I_PUNPCKLWD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8022, IF_PENT|IF_MMX|IF_SQ},
+ /* 855 */ {I_PUSH, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+21885, IF_8086},
+ /* 856 */ {I_PUSH, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+21889, IF_386|IF_NOLONG},
+ /* 857 */ {I_PUSH, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+21893, IF_X64},
+ /* 858 */ {I_PUSH, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+20524, IF_8086},
+ /* 859 */ {I_PUSH, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+20529, IF_386|IF_NOLONG},
+ /* 860 */ {I_PUSH, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+20534, IF_X64},
+ /* 861 */ {I_PUSH, 1, {REG_CS,0,0,0,0}, nasm_bytecodes+21663, IF_8086|IF_NOLONG},
+ /* 862 */ {I_PUSH, 1, {REG_DESS,0,0,0,0}, nasm_bytecodes+21663, IF_8086|IF_NOLONG},
+ /* 863 */ {I_PUSH, 1, {REG_FSGS,0,0,0,0}, nasm_bytecodes+21897, IF_386},
+ /* 864 */ {I_PUSH, 1, {IMMEDIATE|BITS8,0,0,0,0}, nasm_bytecodes+21901, IF_186},
+ /* 865 */ {I_PUSH, 1, {IMMEDIATE|BITS16,0,0,0,0}, nasm_bytecodes+20539, IF_186|IF_AR0|IF_SZ},
+ /* 866 */ {I_PUSH, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+20544, IF_386|IF_NOLONG|IF_AR0|IF_SZ},
+ /* 867 */ {I_PUSH, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+20544, IF_386|IF_NOLONG|IF_SD},
+ /* 868 */ {I_PUSH, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+20549, IF_X64|IF_AR0|IF_SZ},
+ /* 869 */ {I_PUSH, 1, {IMMEDIATE|BITS64,0,0,0,0}, nasm_bytecodes+20549, IF_X64|IF_AR0|IF_SZ},
+ /* 870 */ {I_PUSHA, 0, {0,0,0,0,0}, nasm_bytecodes+21905, IF_186|IF_NOLONG},
+ /* 871 */ {I_PUSHAD, 0, {0,0,0,0,0}, nasm_bytecodes+21909, IF_386|IF_NOLONG},
+ /* 872 */ {I_PUSHAW, 0, {0,0,0,0,0}, nasm_bytecodes+21913, IF_186|IF_NOLONG},
+ /* 873 */ {I_PUSHF, 0, {0,0,0,0,0}, nasm_bytecodes+21917, IF_8086},
+ /* 874 */ {I_PUSHFD, 0, {0,0,0,0,0}, nasm_bytecodes+21921, IF_386|IF_NOLONG},
+ /* 875 */ {I_PUSHFQ, 0, {0,0,0,0,0}, nasm_bytecodes+21921, IF_X64},
+ /* 876 */ {I_PUSHFW, 0, {0,0,0,0,0}, nasm_bytecodes+21925, IF_8086},
+ /* 877 */ {I_PXOR, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8029, IF_PENT|IF_MMX|IF_SQ},
+ /* 878 */ {I_RCL, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+21929, IF_8086},
+ /* 879 */ {I_RCL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+21933, IF_8086},
+ /* 880 */ {I_RCL, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+20554, IF_186},
+ /* 881 */ {I_RCL, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+20559, IF_8086},
+ /* 882 */ {I_RCL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+20564, IF_8086},
+ /* 883 */ {I_RCL, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16651, IF_186},
+ /* 884 */ {I_RCL, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+20569, IF_386},
+ /* 885 */ {I_RCL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+20574, IF_386},
+ /* 886 */ {I_RCL, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16657, IF_386},
+ /* 887 */ {I_RCL, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+20579, IF_X64},
+ /* 888 */ {I_RCL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+20584, IF_X64},
+ /* 889 */ {I_RCL, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16663, IF_X64},
+ /* 890 */ {I_RCR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+21937, IF_8086},
+ /* 891 */ {I_RCR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+21941, IF_8086},
+ /* 892 */ {I_RCR, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+20589, IF_186},
+ /* 893 */ {I_RCR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+20594, IF_8086},
+ /* 894 */ {I_RCR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+20599, IF_8086},
+ /* 895 */ {I_RCR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16669, IF_186},
+ /* 896 */ {I_RCR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+20604, IF_386},
+ /* 897 */ {I_RCR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+20609, IF_386},
+ /* 898 */ {I_RCR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16675, IF_386},
+ /* 899 */ {I_RCR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+20614, IF_X64},
+ /* 900 */ {I_RCR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+20619, IF_X64},
+ /* 901 */ {I_RCR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16681, IF_X64},
+ /* 902 */ {I_RDSHR, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16687, IF_P6|IF_CYRIX|IF_SMM},
+ /* 903 */ {I_RDMSR, 0, {0,0,0,0,0}, nasm_bytecodes+21945, IF_PENT|IF_PRIV},
+ /* 904 */ {I_RDPMC, 0, {0,0,0,0,0}, nasm_bytecodes+21949, IF_P6},
+ /* 905 */ {I_RDTSC, 0, {0,0,0,0,0}, nasm_bytecodes+21953, IF_PENT},
+ /* 906 */ {I_RDTSCP, 0, {0,0,0,0,0}, nasm_bytecodes+20624, IF_X86_64},
+ /* 907 */ {I_RET, 0, {0,0,0,0,0}, nasm_bytecodes+21081, IF_8086},
+ /* 908 */ {I_RET, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+21957, IF_8086|IF_SW},
+ /* 909 */ {I_RETF, 0, {0,0,0,0,0}, nasm_bytecodes+21106, IF_8086},
+ /* 910 */ {I_RETF, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+21961, IF_8086|IF_SW},
+ /* 911 */ {I_RETN, 0, {0,0,0,0,0}, nasm_bytecodes+21081, IF_8086},
+ /* 912 */ {I_RETN, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+21957, IF_8086|IF_SW},
+ /* 913 */ {I_ROL, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+21965, IF_8086},
+ /* 914 */ {I_ROL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+21969, IF_8086},
+ /* 915 */ {I_ROL, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+20629, IF_186},
+ /* 916 */ {I_ROL, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+20634, IF_8086},
+ /* 917 */ {I_ROL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+20639, IF_8086},
+ /* 918 */ {I_ROL, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16693, IF_186},
+ /* 919 */ {I_ROL, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+20644, IF_386},
+ /* 920 */ {I_ROL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+20649, IF_386},
+ /* 921 */ {I_ROL, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16699, IF_386},
+ /* 922 */ {I_ROL, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+20654, IF_X64},
+ /* 923 */ {I_ROL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+20659, IF_X64},
+ /* 924 */ {I_ROL, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16705, IF_X64},
+ /* 925 */ {I_ROR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+21973, IF_8086},
+ /* 926 */ {I_ROR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+21977, IF_8086},
+ /* 927 */ {I_ROR, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+20664, IF_186},
+ /* 928 */ {I_ROR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+20669, IF_8086},
+ /* 929 */ {I_ROR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+20674, IF_8086},
+ /* 930 */ {I_ROR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16711, IF_186},
+ /* 931 */ {I_ROR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+20679, IF_386},
+ /* 932 */ {I_ROR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+20684, IF_386},
+ /* 933 */ {I_ROR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16717, IF_386},
+ /* 934 */ {I_ROR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+20689, IF_X64},
+ /* 935 */ {I_ROR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+20694, IF_X64},
+ /* 936 */ {I_ROR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16723, IF_X64},
+ /* 937 */ {I_RSDC, 2, {REG_SREG,MEMORY|BITS80,0,0,0}, nasm_bytecodes+18134, IF_486|IF_CYRIX|IF_SMM},
+ /* 938 */ {I_RSLDT, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+20699, IF_486|IF_CYRIX|IF_SMM},
+ /* 939 */ {I_RSM, 0, {0,0,0,0,0}, nasm_bytecodes+21981, IF_PENT|IF_SMM},
+ /* 940 */ {I_RSTS, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+20704, IF_486|IF_CYRIX|IF_SMM},
+ /* 941 */ {I_SAHF, 0, {0,0,0,0,0}, nasm_bytecodes+3719, IF_8086},
+ /* 942 */ {I_SALC, 0, {0,0,0,0,0}, nasm_bytecodes+21126, IF_8086|IF_UNDOC},
+ /* 943 */ {I_SAR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+21993, IF_8086},
+ /* 944 */ {I_SAR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+21997, IF_8086},
+ /* 945 */ {I_SAR, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+20744, IF_186},
+ /* 946 */ {I_SAR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+20749, IF_8086},
+ /* 947 */ {I_SAR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+20754, IF_8086},
+ /* 948 */ {I_SAR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16747, IF_186},
+ /* 949 */ {I_SAR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+20759, IF_386},
+ /* 950 */ {I_SAR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+20764, IF_386},
+ /* 951 */ {I_SAR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16753, IF_386},
+ /* 952 */ {I_SAR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+20769, IF_X64},
+ /* 953 */ {I_SAR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+20774, IF_X64},
+ /* 954 */ {I_SAR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16759, IF_X64},
+ /* 955 */ {I_SBB, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+20779, IF_8086|IF_SM|IF_LOCK},
+ /* 956 */ {I_SBB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+20780, IF_8086},
+ /* 957 */ {I_SBB, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16765, IF_8086|IF_SM|IF_LOCK},
+ /* 958 */ {I_SBB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16766, IF_8086},
+ /* 959 */ {I_SBB, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16771, IF_386|IF_SM|IF_LOCK},
+ /* 960 */ {I_SBB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16772, IF_386},
+ /* 961 */ {I_SBB, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16777, IF_X64|IF_SM|IF_LOCK},
+ /* 962 */ {I_SBB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16778, IF_X64},
+ /* 963 */ {I_SBB, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+9523, IF_8086|IF_SM},
+ /* 964 */ {I_SBB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+9523, IF_8086},
+ /* 965 */ {I_SBB, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+20784, IF_8086|IF_SM},
+ /* 966 */ {I_SBB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+20784, IF_8086},
+ /* 967 */ {I_SBB, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+20789, IF_386|IF_SM},
+ /* 968 */ {I_SBB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+20789, IF_386},
+ /* 969 */ {I_SBB, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+20794, IF_X64|IF_SM},
+ /* 970 */ {I_SBB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+20794, IF_X64},
+ /* 971 */ {I_SBB, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+8036, IF_8086|IF_LOCK},
+ /* 972 */ {I_SBB, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+8043, IF_386|IF_LOCK},
+ /* 973 */ {I_SBB, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+8050, IF_X64|IF_LOCK},
+ /* 974 */ {I_SBB, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+22001, IF_8086|IF_SM},
+ /* 975 */ {I_SBB, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+8037, IF_8086|IF_SM},
+ /* 976 */ {I_SBB, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+20799, IF_8086|IF_SM},
+ /* 977 */ {I_SBB, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+8044, IF_386|IF_SM},
+ /* 978 */ {I_SBB, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+20804, IF_386|IF_SM},
+ /* 979 */ {I_SBB, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+8051, IF_X64|IF_SM},
+ /* 980 */ {I_SBB, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+20809, IF_X64|IF_SM},
+ /* 981 */ {I_SBB, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+16783, IF_8086|IF_SM|IF_LOCK},
+ /* 982 */ {I_SBB, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+8057, IF_8086|IF_SM|IF_LOCK},
+ /* 983 */ {I_SBB, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+8064, IF_386|IF_SM|IF_LOCK},
+ /* 984 */ {I_SBB, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+8071, IF_X64|IF_SM|IF_LOCK},
+ /* 985 */ {I_SBB, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16783, IF_8086|IF_SM|IF_LOCK},
+ /* 986 */ {I_SBB, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+8057, IF_8086|IF_SM|IF_LOCK},
+ /* 987 */ {I_SBB, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+8064, IF_386|IF_SM|IF_LOCK},
+ /* 988 */ {I_SCASB, 0, {0,0,0,0,0}, nasm_bytecodes+22005, IF_8086},
+ /* 989 */ {I_SCASD, 0, {0,0,0,0,0}, nasm_bytecodes+20814, IF_386},
+ /* 990 */ {I_SCASQ, 0, {0,0,0,0,0}, nasm_bytecodes+20819, IF_X64},
+ /* 991 */ {I_SCASW, 0, {0,0,0,0,0}, nasm_bytecodes+20824, IF_8086},
+ /* 992 */ {I_SFENCE, 0, {0,0,0,0,0}, nasm_bytecodes+20829, IF_X64|IF_AMD},
+ /* 993 */ {I_SGDT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20834, IF_286},
+ /* 994 */ {I_SHL, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+21985, IF_8086},
+ /* 995 */ {I_SHL, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+21989, IF_8086},
+ /* 996 */ {I_SHL, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+20709, IF_186},
+ /* 997 */ {I_SHL, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+20714, IF_8086},
+ /* 998 */ {I_SHL, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+20719, IF_8086},
+ /* 999 */ {I_SHL, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16729, IF_186},
+ /* 1000 */ {I_SHL, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+20724, IF_386},
+ /* 1001 */ {I_SHL, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+20729, IF_386},
+ /* 1002 */ {I_SHL, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16735, IF_386},
+ /* 1003 */ {I_SHL, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+20734, IF_X64},
+ /* 1004 */ {I_SHL, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+20739, IF_X64},
+ /* 1005 */ {I_SHL, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16741, IF_X64},
+ /* 1006 */ {I_SHLD, 3, {MEMORY,REG_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+8078, IF_386|IF_SM2|IF_SB|IF_AR2},
+ /* 1007 */ {I_SHLD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+8078, IF_386|IF_SM2|IF_SB|IF_AR2},
+ /* 1008 */ {I_SHLD, 3, {MEMORY,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+8085, IF_386|IF_SM2|IF_SB|IF_AR2},
+ /* 1009 */ {I_SHLD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+8085, IF_386|IF_SM2|IF_SB|IF_AR2},
+ /* 1010 */ {I_SHLD, 3, {MEMORY,REG_GPR|BITS64,IMMEDIATE,0,0}, nasm_bytecodes+8092, IF_X64|IF_SM2|IF_SB|IF_AR2},
+ /* 1011 */ {I_SHLD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE,0,0}, nasm_bytecodes+8092, IF_X64|IF_SM2|IF_SB|IF_AR2},
+ /* 1012 */ {I_SHLD, 3, {MEMORY,REG_GPR|BITS16,REG_CL,0,0}, nasm_bytecodes+16795, IF_386|IF_SM},
+ /* 1013 */ {I_SHLD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,REG_CL,0,0}, nasm_bytecodes+16795, IF_386},
+ /* 1014 */ {I_SHLD, 3, {MEMORY,REG_GPR|BITS32,REG_CL,0,0}, nasm_bytecodes+16801, IF_386|IF_SM},
+ /* 1015 */ {I_SHLD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,REG_CL,0,0}, nasm_bytecodes+16801, IF_386},
+ /* 1016 */ {I_SHLD, 3, {MEMORY,REG_GPR|BITS64,REG_CL,0,0}, nasm_bytecodes+16807, IF_X64|IF_SM},
+ /* 1017 */ {I_SHLD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,REG_CL,0,0}, nasm_bytecodes+16807, IF_X64},
+ /* 1018 */ {I_SHR, 2, {RM_GPR|BITS8,UNITY,0,0,0}, nasm_bytecodes+22009, IF_8086},
+ /* 1019 */ {I_SHR, 2, {RM_GPR|BITS8,REG_CL,0,0,0}, nasm_bytecodes+22013, IF_8086},
+ /* 1020 */ {I_SHR, 2, {RM_GPR|BITS8,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+20839, IF_186},
+ /* 1021 */ {I_SHR, 2, {RM_GPR|BITS16,UNITY,0,0,0}, nasm_bytecodes+20844, IF_8086},
+ /* 1022 */ {I_SHR, 2, {RM_GPR|BITS16,REG_CL,0,0,0}, nasm_bytecodes+20849, IF_8086},
+ /* 1023 */ {I_SHR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16813, IF_186},
+ /* 1024 */ {I_SHR, 2, {RM_GPR|BITS32,UNITY,0,0,0}, nasm_bytecodes+20854, IF_386},
+ /* 1025 */ {I_SHR, 2, {RM_GPR|BITS32,REG_CL,0,0,0}, nasm_bytecodes+20859, IF_386},
+ /* 1026 */ {I_SHR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16819, IF_386},
+ /* 1027 */ {I_SHR, 2, {RM_GPR|BITS64,UNITY,0,0,0}, nasm_bytecodes+20864, IF_X64},
+ /* 1028 */ {I_SHR, 2, {RM_GPR|BITS64,REG_CL,0,0,0}, nasm_bytecodes+20869, IF_X64},
+ /* 1029 */ {I_SHR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16825, IF_X64},
+ /* 1030 */ {I_SHRD, 3, {MEMORY,REG_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+8099, IF_386|IF_SM2|IF_SB|IF_AR2},
+ /* 1031 */ {I_SHRD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+8099, IF_386|IF_SM2|IF_SB|IF_AR2},
+ /* 1032 */ {I_SHRD, 3, {MEMORY,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+8106, IF_386|IF_SM2|IF_SB|IF_AR2},
+ /* 1033 */ {I_SHRD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+8106, IF_386|IF_SM2|IF_SB|IF_AR2},
+ /* 1034 */ {I_SHRD, 3, {MEMORY,REG_GPR|BITS64,IMMEDIATE,0,0}, nasm_bytecodes+8113, IF_X64|IF_SM2|IF_SB|IF_AR2},
+ /* 1035 */ {I_SHRD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,IMMEDIATE,0,0}, nasm_bytecodes+8113, IF_X64|IF_SM2|IF_SB|IF_AR2},
+ /* 1036 */ {I_SHRD, 3, {MEMORY,REG_GPR|BITS16,REG_CL,0,0}, nasm_bytecodes+16831, IF_386|IF_SM},
+ /* 1037 */ {I_SHRD, 3, {REG_GPR|BITS16,REG_GPR|BITS16,REG_CL,0,0}, nasm_bytecodes+16831, IF_386},
+ /* 1038 */ {I_SHRD, 3, {MEMORY,REG_GPR|BITS32,REG_CL,0,0}, nasm_bytecodes+16837, IF_386|IF_SM},
+ /* 1039 */ {I_SHRD, 3, {REG_GPR|BITS32,REG_GPR|BITS32,REG_CL,0,0}, nasm_bytecodes+16837, IF_386},
+ /* 1040 */ {I_SHRD, 3, {MEMORY,REG_GPR|BITS64,REG_CL,0,0}, nasm_bytecodes+16843, IF_X64|IF_SM},
+ /* 1041 */ {I_SHRD, 3, {REG_GPR|BITS64,REG_GPR|BITS64,REG_CL,0,0}, nasm_bytecodes+16843, IF_X64},
+ /* 1042 */ {I_SIDT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20874, IF_286},
+ /* 1043 */ {I_SLDT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+16868, IF_286},
+ /* 1044 */ {I_SLDT, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+16868, IF_286},
+ /* 1045 */ {I_SLDT, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16849, IF_286},
+ /* 1046 */ {I_SLDT, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16855, IF_386},
+ /* 1047 */ {I_SLDT, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16867, IF_X64},
+ /* 1048 */ {I_SKINIT, 0, {0,0,0,0,0}, nasm_bytecodes+20879, IF_X64},
+ /* 1049 */ {I_SMI, 0, {0,0,0,0,0}, nasm_bytecodes+22141, IF_386|IF_UNDOC},
+ /* 1050 */ {I_SMSW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+16880, IF_286},
+ /* 1051 */ {I_SMSW, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+16880, IF_286},
+ /* 1052 */ {I_SMSW, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16873, IF_286},
+ /* 1053 */ {I_SMSW, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16879, IF_386},
+ /* 1054 */ {I_STC, 0, {0,0,0,0,0}, nasm_bytecodes+20626, IF_8086},
+ /* 1055 */ {I_STD, 0, {0,0,0,0,0}, nasm_bytecodes+22168, IF_8086},
+ /* 1056 */ {I_STGI, 0, {0,0,0,0,0}, nasm_bytecodes+20884, IF_X64},
+ /* 1057 */ {I_STI, 0, {0,0,0,0,0}, nasm_bytecodes+22171, IF_8086},
+ /* 1058 */ {I_STOSB, 0, {0,0,0,0,0}, nasm_bytecodes+3823, IF_8086},
+ /* 1059 */ {I_STOSD, 0, {0,0,0,0,0}, nasm_bytecodes+22025, IF_386},
+ /* 1060 */ {I_STOSQ, 0, {0,0,0,0,0}, nasm_bytecodes+22029, IF_X64},
+ /* 1061 */ {I_STOSW, 0, {0,0,0,0,0}, nasm_bytecodes+22033, IF_8086},
+ /* 1062 */ {I_STR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+16898, IF_286|IF_PROT},
+ /* 1063 */ {I_STR, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+16898, IF_286|IF_PROT},
+ /* 1064 */ {I_STR, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16885, IF_286|IF_PROT},
+ /* 1065 */ {I_STR, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16891, IF_386|IF_PROT},
+ /* 1066 */ {I_STR, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16897, IF_X64},
+ /* 1067 */ {I_SUB, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+20889, IF_8086|IF_SM|IF_LOCK},
+ /* 1068 */ {I_SUB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+20890, IF_8086},
+ /* 1069 */ {I_SUB, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16903, IF_8086|IF_SM|IF_LOCK},
+ /* 1070 */ {I_SUB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16904, IF_8086},
+ /* 1071 */ {I_SUB, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16909, IF_386|IF_SM|IF_LOCK},
+ /* 1072 */ {I_SUB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16910, IF_386},
+ /* 1073 */ {I_SUB, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16915, IF_X64|IF_SM|IF_LOCK},
+ /* 1074 */ {I_SUB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+16916, IF_X64},
+ /* 1075 */ {I_SUB, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+15263, IF_8086|IF_SM},
+ /* 1076 */ {I_SUB, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+15263, IF_8086},
+ /* 1077 */ {I_SUB, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+20894, IF_8086|IF_SM},
+ /* 1078 */ {I_SUB, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+20894, IF_8086},
+ /* 1079 */ {I_SUB, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+20899, IF_386|IF_SM},
+ /* 1080 */ {I_SUB, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+20899, IF_386},
+ /* 1081 */ {I_SUB, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+20904, IF_X64|IF_SM},
+ /* 1082 */ {I_SUB, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+20904, IF_X64},
+ /* 1083 */ {I_SUB, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+8120, IF_8086|IF_LOCK},
+ /* 1084 */ {I_SUB, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+8127, IF_386|IF_LOCK},
+ /* 1085 */ {I_SUB, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+8134, IF_X64|IF_LOCK},
+ /* 1086 */ {I_SUB, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+22037, IF_8086|IF_SM},
+ /* 1087 */ {I_SUB, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+8121, IF_8086|IF_SM},
+ /* 1088 */ {I_SUB, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+20909, IF_8086|IF_SM},
+ /* 1089 */ {I_SUB, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+8128, IF_386|IF_SM},
+ /* 1090 */ {I_SUB, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+20914, IF_386|IF_SM},
+ /* 1091 */ {I_SUB, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+8135, IF_X64|IF_SM},
+ /* 1092 */ {I_SUB, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+20919, IF_X64|IF_SM},
+ /* 1093 */ {I_SUB, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+16921, IF_8086|IF_SM|IF_LOCK},
+ /* 1094 */ {I_SUB, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+8141, IF_8086|IF_SM|IF_LOCK},
+ /* 1095 */ {I_SUB, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+8148, IF_386|IF_SM|IF_LOCK},
+ /* 1096 */ {I_SUB, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+8155, IF_X64|IF_SM|IF_LOCK},
+ /* 1097 */ {I_SUB, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+16921, IF_8086|IF_SM|IF_LOCK},
+ /* 1098 */ {I_SUB, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+8141, IF_8086|IF_SM|IF_LOCK},
+ /* 1099 */ {I_SUB, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+8148, IF_386|IF_SM|IF_LOCK},
+ /* 1100 */ {I_SVDC, 2, {MEMORY|BITS80,REG_SREG,0,0,0}, nasm_bytecodes+8626, IF_486|IF_CYRIX|IF_SMM},
+ /* 1101 */ {I_SVTS, 1, {MEMORY|BITS80,0,0,0,0}, nasm_bytecodes+20929, IF_486|IF_CYRIX|IF_SMM},
+ /* 1102 */ {I_SWAPGS, 0, {0,0,0,0,0}, nasm_bytecodes+20934, IF_X64},
+ /* 1103 */ {I_SYSCALL, 0, {0,0,0,0,0}, nasm_bytecodes+21769, IF_P6|IF_AMD},
+ /* 1104 */ {I_SYSENTER, 0, {0,0,0,0,0}, nasm_bytecodes+22041, IF_P6},
+ /* 1105 */ {I_SYSEXIT, 0, {0,0,0,0,0}, nasm_bytecodes+22045, IF_P6|IF_PRIV},
+ /* 1106 */ {I_SYSRET, 0, {0,0,0,0,0}, nasm_bytecodes+21765, IF_P6|IF_PRIV|IF_AMD},
+ /* 1107 */ {I_TEST, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+22049, IF_8086|IF_SM},
+ /* 1108 */ {I_TEST, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+22049, IF_8086},
+ /* 1109 */ {I_TEST, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+20939, IF_8086|IF_SM},
+ /* 1110 */ {I_TEST, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+20939, IF_8086},
+ /* 1111 */ {I_TEST, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+20944, IF_386|IF_SM},
+ /* 1112 */ {I_TEST, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+20944, IF_386},
+ /* 1113 */ {I_TEST, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+20949, IF_X64|IF_SM},
+ /* 1114 */ {I_TEST, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+20949, IF_X64},
+ /* 1115 */ {I_TEST, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+22053, IF_8086|IF_SM},
+ /* 1116 */ {I_TEST, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+20954, IF_8086|IF_SM},
+ /* 1117 */ {I_TEST, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+20959, IF_386|IF_SM},
+ /* 1118 */ {I_TEST, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+20964, IF_X64|IF_SM},
+ /* 1119 */ {I_TEST, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+22057, IF_8086|IF_SM},
+ /* 1120 */ {I_TEST, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+20969, IF_8086|IF_SM},
+ /* 1121 */ {I_TEST, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+20974, IF_386|IF_SM},
+ /* 1122 */ {I_TEST, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+20979, IF_X64|IF_SM},
+ /* 1123 */ {I_TEST, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+20984, IF_8086|IF_SM},
+ /* 1124 */ {I_TEST, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+16933, IF_8086|IF_SM},
+ /* 1125 */ {I_TEST, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+16939, IF_386|IF_SM},
+ /* 1126 */ {I_TEST, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+16945, IF_X64|IF_SM},
+ /* 1127 */ {I_TEST, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+20984, IF_8086|IF_SM},
+ /* 1128 */ {I_TEST, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+16933, IF_8086|IF_SM},
+ /* 1129 */ {I_TEST, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+16939, IF_386|IF_SM},
+ /* 1130 */ {I_UD0, 0, {0,0,0,0,0}, nasm_bytecodes+22061, IF_186|IF_UNDOC},
+ /* 1131 */ {I_UD1, 0, {0,0,0,0,0}, nasm_bytecodes+22065, IF_186|IF_UNDOC},
+ /* 1132 */ {I_UD2, 0, {0,0,0,0,0}, nasm_bytecodes+22069, IF_186},
+ /* 1133 */ {I_VERR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20989, IF_286|IF_PROT},
+ /* 1134 */ {I_VERR, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+20989, IF_286|IF_PROT},
+ /* 1135 */ {I_VERR, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+20989, IF_286|IF_PROT},
+ /* 1136 */ {I_VERW, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+20994, IF_286|IF_PROT},
+ /* 1137 */ {I_VERW, 1, {MEMORY|BITS16,0,0,0,0}, nasm_bytecodes+20994, IF_286|IF_PROT},
+ /* 1138 */ {I_VERW, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+20994, IF_286|IF_PROT},
+ /* 1139 */ {I_FWAIT, 0, {0,0,0,0,0}, nasm_bytecodes+21667, IF_8086},
+ /* 1140 */ {I_WBINVD, 0, {0,0,0,0,0}, nasm_bytecodes+22073, IF_486|IF_PRIV},
+ /* 1141 */ {I_WRSHR, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16963, IF_P6|IF_CYRIX|IF_SMM},
+ /* 1142 */ {I_WRMSR, 0, {0,0,0,0,0}, nasm_bytecodes+22077, IF_PENT|IF_PRIV},
+ /* 1143 */ {I_XADD, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+16969, IF_486|IF_SM|IF_LOCK},
+ /* 1144 */ {I_XADD, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+16970, IF_486},
+ /* 1145 */ {I_XADD, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+8190, IF_486|IF_SM|IF_LOCK},
+ /* 1146 */ {I_XADD, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+8191, IF_486},
+ /* 1147 */ {I_XADD, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+8197, IF_486|IF_SM|IF_LOCK},
+ /* 1148 */ {I_XADD, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+8198, IF_486},
+ /* 1149 */ {I_XADD, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+8204, IF_X64|IF_SM|IF_LOCK},
+ /* 1150 */ {I_XADD, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+8205, IF_X64},
+ /* 1151 */ {I_XCHG, 2, {REG_AX,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+22081, IF_8086},
+ /* 1152 */ {I_XCHG, 2, {REG_EAX,REG32NA,0,0,0}, nasm_bytecodes+22085, IF_386},
+ /* 1153 */ {I_XCHG, 2, {REG_RAX,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+22089, IF_X64},
+ /* 1154 */ {I_XCHG, 2, {REG_GPR|BITS16,REG_AX,0,0,0}, nasm_bytecodes+22093, IF_8086},
+ /* 1155 */ {I_XCHG, 2, {REG32NA,REG_EAX,0,0,0}, nasm_bytecodes+22097, IF_386},
+ /* 1156 */ {I_XCHG, 2, {REG_GPR|BITS64,REG_RAX,0,0,0}, nasm_bytecodes+22101, IF_X64},
+ /* 1157 */ {I_XCHG, 2, {REG_EAX,REG_EAX,0,0,0}, nasm_bytecodes+22105, IF_386|IF_NOLONG},
+ /* 1158 */ {I_XCHG, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+20999, IF_8086|IF_SM|IF_LOCK},
+ /* 1159 */ {I_XCHG, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+21000, IF_8086},
+ /* 1160 */ {I_XCHG, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+16987, IF_8086|IF_SM|IF_LOCK},
+ /* 1161 */ {I_XCHG, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+16988, IF_8086},
+ /* 1162 */ {I_XCHG, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+16993, IF_386|IF_SM|IF_LOCK},
+ /* 1163 */ {I_XCHG, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+16994, IF_386},
+ /* 1164 */ {I_XCHG, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+16999, IF_X64|IF_SM|IF_LOCK},
+ /* 1165 */ {I_XCHG, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17000, IF_X64},
+ /* 1166 */ {I_XCHG, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+21004, IF_8086|IF_SM|IF_LOCK},
+ /* 1167 */ {I_XCHG, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+21005, IF_8086},
+ /* 1168 */ {I_XCHG, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+17005, IF_8086|IF_SM|IF_LOCK},
+ /* 1169 */ {I_XCHG, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+17006, IF_8086},
+ /* 1170 */ {I_XCHG, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17011, IF_386|IF_SM|IF_LOCK},
+ /* 1171 */ {I_XCHG, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17012, IF_386},
+ /* 1172 */ {I_XCHG, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17017, IF_X64|IF_SM|IF_LOCK},
+ /* 1173 */ {I_XCHG, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17018, IF_X64},
+ /* 1174 */ {I_XLATB, 0, {0,0,0,0,0}, nasm_bytecodes+22174, IF_8086},
+ /* 1175 */ {I_XLAT, 0, {0,0,0,0,0}, nasm_bytecodes+22174, IF_8086},
+ /* 1176 */ {I_XOR, 2, {MEMORY,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+21009, IF_8086|IF_SM|IF_LOCK},
+ /* 1177 */ {I_XOR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+21010, IF_8086},
+ /* 1178 */ {I_XOR, 2, {MEMORY,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+17023, IF_8086|IF_SM|IF_LOCK},
+ /* 1179 */ {I_XOR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+17024, IF_8086},
+ /* 1180 */ {I_XOR, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17029, IF_386|IF_SM|IF_LOCK},
+ /* 1181 */ {I_XOR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+17030, IF_386},
+ /* 1182 */ {I_XOR, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17035, IF_X64|IF_SM|IF_LOCK},
+ /* 1183 */ {I_XOR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+17036, IF_X64},
+ /* 1184 */ {I_XOR, 2, {REG_GPR|BITS8,MEMORY,0,0,0}, nasm_bytecodes+14703, IF_8086|IF_SM},
+ /* 1185 */ {I_XOR, 2, {REG_GPR|BITS8,REG_GPR|BITS8,0,0,0}, nasm_bytecodes+14703, IF_8086},
+ /* 1186 */ {I_XOR, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+21014, IF_8086|IF_SM},
+ /* 1187 */ {I_XOR, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+21014, IF_8086},
+ /* 1188 */ {I_XOR, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+21019, IF_386|IF_SM},
+ /* 1189 */ {I_XOR, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+21019, IF_386},
+ /* 1190 */ {I_XOR, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+21024, IF_X64|IF_SM},
+ /* 1191 */ {I_XOR, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+21024, IF_X64},
+ /* 1192 */ {I_XOR, 2, {RM_GPR|BITS16,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+8211, IF_8086|IF_LOCK},
+ /* 1193 */ {I_XOR, 2, {RM_GPR|BITS32,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+8218, IF_386|IF_LOCK},
+ /* 1194 */ {I_XOR, 2, {RM_GPR|BITS64,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+8225, IF_X64|IF_LOCK},
+ /* 1195 */ {I_XOR, 2, {REG_AL,IMMEDIATE,0,0,0}, nasm_bytecodes+22109, IF_8086|IF_SM},
+ /* 1196 */ {I_XOR, 2, {REG_AX,SBYTE16,0,0,0}, nasm_bytecodes+8212, IF_8086|IF_SM},
+ /* 1197 */ {I_XOR, 2, {REG_AX,IMMEDIATE,0,0,0}, nasm_bytecodes+21029, IF_8086|IF_SM},
+ /* 1198 */ {I_XOR, 2, {REG_EAX,SBYTE32,0,0,0}, nasm_bytecodes+8219, IF_386|IF_SM},
+ /* 1199 */ {I_XOR, 2, {REG_EAX,IMMEDIATE,0,0,0}, nasm_bytecodes+21034, IF_386|IF_SM},
+ /* 1200 */ {I_XOR, 2, {REG_RAX,SBYTE64,0,0,0}, nasm_bytecodes+8226, IF_X64|IF_SM},
+ /* 1201 */ {I_XOR, 2, {REG_RAX,IMMEDIATE,0,0,0}, nasm_bytecodes+21039, IF_X64|IF_SM},
+ /* 1202 */ {I_XOR, 2, {RM_GPR|BITS8,IMMEDIATE,0,0,0}, nasm_bytecodes+17041, IF_8086|IF_SM|IF_LOCK},
+ /* 1203 */ {I_XOR, 2, {RM_GPR|BITS16,IMMEDIATE,0,0,0}, nasm_bytecodes+8232, IF_8086|IF_SM|IF_LOCK},
+ /* 1204 */ {I_XOR, 2, {RM_GPR|BITS32,IMMEDIATE,0,0,0}, nasm_bytecodes+8239, IF_386|IF_SM|IF_LOCK},
+ /* 1205 */ {I_XOR, 2, {RM_GPR|BITS64,IMMEDIATE,0,0,0}, nasm_bytecodes+8246, IF_X64|IF_SM|IF_LOCK},
+ /* 1206 */ {I_XOR, 2, {MEMORY,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+17041, IF_8086|IF_SM|IF_LOCK},
+ /* 1207 */ {I_XOR, 2, {MEMORY,IMMEDIATE|BITS16,0,0,0}, nasm_bytecodes+8232, IF_8086|IF_SM|IF_LOCK},
+ /* 1208 */ {I_XOR, 2, {MEMORY,IMMEDIATE|BITS32,0,0,0}, nasm_bytecodes+8239, IF_386|IF_SM|IF_LOCK},
+ /* 1209 */ {I_CMOVcc, 2, {REG_GPR|BITS16,MEMORY,0,0,0}, nasm_bytecodes+8253, IF_P6|IF_SM},
+ /* 1210 */ {I_CMOVcc, 2, {REG_GPR|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+8253, IF_P6},
+ /* 1211 */ {I_CMOVcc, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+8260, IF_P6|IF_SM},
+ /* 1212 */ {I_CMOVcc, 2, {REG_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+8260, IF_P6},
+ /* 1213 */ {I_CMOVcc, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+8267, IF_X64|IF_SM},
+ /* 1214 */ {I_CMOVcc, 2, {REG_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+8267, IF_X64},
+ /* 1215 */ {I_Jcc, 1, {IMMEDIATE|NEAR,0,0,0,0}, nasm_bytecodes+8274, IF_386},
+ /* 1216 */ {I_Jcc, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, nasm_bytecodes+8281, IF_386},
+ /* 1217 */ {I_Jcc, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, nasm_bytecodes+8288, IF_386},
+ /* 1218 */ {I_Jcc, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+21045, IF_8086},
+ /* 1219 */ {I_SETcc, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17053, IF_386|IF_SB},
+ /* 1220 */ {I_SETcc, 1, {REG_GPR|BITS8,0,0,0,0}, nasm_bytecodes+17053, IF_386},
+ /* 1221 */ {I_ADDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17059, IF_KATMAI|IF_SSE},
+ /* 1222 */ {I_ADDSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+17065, IF_KATMAI|IF_SSE},
+ /* 1223 */ {I_ANDNPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17071, IF_KATMAI|IF_SSE},
+ /* 1224 */ {I_ANDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17077, IF_KATMAI|IF_SSE},
+ /* 1225 */ {I_CMPEQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3842, IF_KATMAI|IF_SSE},
+ /* 1226 */ {I_CMPEQSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+3850, IF_KATMAI|IF_SSE},
+ /* 1227 */ {I_CMPLEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3858, IF_KATMAI|IF_SSE},
+ /* 1228 */ {I_CMPLESS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+3866, IF_KATMAI|IF_SSE},
+ /* 1229 */ {I_CMPLTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3874, IF_KATMAI|IF_SSE},
+ /* 1230 */ {I_CMPLTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+3882, IF_KATMAI|IF_SSE},
+ /* 1231 */ {I_CMPNEQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3890, IF_KATMAI|IF_SSE},
+ /* 1232 */ {I_CMPNEQSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+3898, IF_KATMAI|IF_SSE},
+ /* 1233 */ {I_CMPNLEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3906, IF_KATMAI|IF_SSE},
+ /* 1234 */ {I_CMPNLESS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+3914, IF_KATMAI|IF_SSE},
+ /* 1235 */ {I_CMPNLTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3922, IF_KATMAI|IF_SSE},
+ /* 1236 */ {I_CMPNLTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+3930, IF_KATMAI|IF_SSE},
+ /* 1237 */ {I_CMPORDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3938, IF_KATMAI|IF_SSE},
+ /* 1238 */ {I_CMPORDSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+3946, IF_KATMAI|IF_SSE},
+ /* 1239 */ {I_CMPUNORDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3954, IF_KATMAI|IF_SSE},
+ /* 1240 */ {I_CMPUNORDSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+3962, IF_KATMAI|IF_SSE},
+ /* 1241 */ {I_CMPPS, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+8302, IF_KATMAI|IF_SSE|IF_SB|IF_AR2},
+ /* 1242 */ {I_CMPPS, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+8302, IF_KATMAI|IF_SSE|IF_SB|IF_AR2},
+ /* 1243 */ {I_CMPSS, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+8309, IF_KATMAI|IF_SSE|IF_SB|IF_AR2},
+ /* 1244 */ {I_CMPSS, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+8309, IF_KATMAI|IF_SSE|IF_SB|IF_AR2},
+ /* 1245 */ {I_COMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+17083, IF_KATMAI|IF_SSE},
+ /* 1246 */ {I_CVTPI2PS, 2, {XMMREG,RM_MMX|BITS64,0,0,0}, nasm_bytecodes+17089, IF_KATMAI|IF_SSE|IF_MMX},
+ /* 1247 */ {I_CVTPS2PI, 2, {MMXREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+17095, IF_KATMAI|IF_SSE|IF_MMX},
+ /* 1248 */ {I_CVTSI2SS, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+8317, IF_KATMAI|IF_SSE|IF_SD|IF_AR1},
+ /* 1249 */ {I_CVTSI2SS, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+8316, IF_X64|IF_SSE|IF_SQ|IF_AR1},
+ /* 1250 */ {I_CVTSS2SI, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+8324, IF_KATMAI|IF_SSE|IF_SD|IF_AR1},
+ /* 1251 */ {I_CVTSS2SI, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+8324, IF_KATMAI|IF_SSE|IF_SD|IF_AR1},
+ /* 1252 */ {I_CVTSS2SI, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+8323, IF_X64|IF_SSE|IF_SD|IF_AR1},
+ /* 1253 */ {I_CVTSS2SI, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+8323, IF_X64|IF_SSE|IF_SD|IF_AR1},
+ /* 1254 */ {I_CVTTPS2PI, 2, {MMXREG,RM_XMM,0,0,0}, nasm_bytecodes+17101, IF_KATMAI|IF_SSE|IF_MMX|IF_SQ},
+ /* 1255 */ {I_CVTTSS2SI, 2, {REG_GPR|BITS32,RM_XMM,0,0,0}, nasm_bytecodes+8331, IF_KATMAI|IF_SSE|IF_SD|IF_AR1},
+ /* 1256 */ {I_CVTTSS2SI, 2, {REG_GPR|BITS64,RM_XMM,0,0,0}, nasm_bytecodes+8330, IF_X64|IF_SSE|IF_SD|IF_AR1},
+ /* 1257 */ {I_DIVPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17107, IF_KATMAI|IF_SSE},
+ /* 1258 */ {I_DIVSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+17113, IF_KATMAI|IF_SSE},
+ /* 1259 */ {I_LDMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+13309, IF_KATMAI|IF_SSE},
+ /* 1260 */ {I_MAXPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17119, IF_KATMAI|IF_SSE},
+ /* 1261 */ {I_MAXSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+17125, IF_KATMAI|IF_SSE},
+ /* 1262 */ {I_MINPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17131, IF_KATMAI|IF_SSE},
+ /* 1263 */ {I_MINSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+17137, IF_KATMAI|IF_SSE},
+ /* 1264 */ {I_MOVAPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17143, IF_KATMAI|IF_SSE},
+ /* 1265 */ {I_MOVAPS, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+17149, IF_KATMAI|IF_SSE},
+ /* 1266 */ {I_MOVHPS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+17155, IF_KATMAI|IF_SSE},
+ /* 1267 */ {I_MOVHPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+17161, IF_KATMAI|IF_SSE},
+ /* 1268 */ {I_MOVLHPS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17155, IF_KATMAI|IF_SSE},
+ /* 1269 */ {I_MOVLPS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+16957, IF_KATMAI|IF_SSE},
+ /* 1270 */ {I_MOVLPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+17167, IF_KATMAI|IF_SSE},
+ /* 1271 */ {I_MOVHLPS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+16957, IF_KATMAI|IF_SSE},
+ /* 1272 */ {I_MOVMSKPS, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+17173, IF_KATMAI|IF_SSE},
+ /* 1273 */ {I_MOVMSKPS, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+8337, IF_X64|IF_SSE},
+ /* 1274 */ {I_MOVNTPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, nasm_bytecodes+17179, IF_KATMAI|IF_SSE},
+ /* 1275 */ {I_MOVSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+17185, IF_KATMAI|IF_SSE},
+ /* 1276 */ {I_MOVSS, 2, {MEMORY|BITS32,XMMREG,0,0,0}, nasm_bytecodes+17191, IF_KATMAI|IF_SSE},
+ /* 1277 */ {I_MOVSS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17185, IF_KATMAI|IF_SSE},
+ /* 1278 */ {I_MOVUPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17197, IF_KATMAI|IF_SSE},
+ /* 1279 */ {I_MOVUPS, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+17203, IF_KATMAI|IF_SSE},
+ /* 1280 */ {I_MULPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17209, IF_KATMAI|IF_SSE},
+ /* 1281 */ {I_MULSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+17215, IF_KATMAI|IF_SSE},
+ /* 1282 */ {I_ORPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17221, IF_KATMAI|IF_SSE},
+ /* 1283 */ {I_RCPPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17227, IF_KATMAI|IF_SSE},
+ /* 1284 */ {I_RCPSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+17233, IF_KATMAI|IF_SSE},
+ /* 1285 */ {I_RSQRTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17239, IF_KATMAI|IF_SSE},
+ /* 1286 */ {I_RSQRTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+17245, IF_KATMAI|IF_SSE},
+ /* 1287 */ {I_SHUFPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+8344, IF_KATMAI|IF_SSE},
+ /* 1288 */ {I_SQRTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17251, IF_KATMAI|IF_SSE},
+ /* 1289 */ {I_SQRTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+17257, IF_KATMAI|IF_SSE},
+ /* 1290 */ {I_STMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+13323, IF_KATMAI|IF_SSE},
+ /* 1291 */ {I_SUBPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17263, IF_KATMAI|IF_SSE},
+ /* 1292 */ {I_SUBSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+17269, IF_KATMAI|IF_SSE},
+ /* 1293 */ {I_UCOMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+17275, IF_KATMAI|IF_SSE},
+ /* 1294 */ {I_UNPCKHPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17281, IF_KATMAI|IF_SSE},
+ /* 1295 */ {I_UNPCKLPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17287, IF_KATMAI|IF_SSE},
+ /* 1296 */ {I_XORPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+17293, IF_KATMAI|IF_SSE},
+ /* 1297 */ {I_FXRSTOR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17300, IF_P6|IF_SSE|IF_FPU},
+ /* 1298 */ {I_FXRSTOR64, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17299, IF_X64|IF_SSE|IF_FPU},
+ /* 1299 */ {I_FXSAVE, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17306, IF_P6|IF_SSE|IF_FPU},
+ /* 1300 */ {I_FXSAVE64, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17305, IF_X64|IF_SSE|IF_FPU},
+ /* 1301 */ {I_XGETBV, 0, {0,0,0,0,0}, nasm_bytecodes+17311, IF_NEHALEM},
+ /* 1302 */ {I_XSETBV, 0, {0,0,0,0,0}, nasm_bytecodes+17317, IF_NEHALEM|IF_PRIV},
+ /* 1303 */ {I_XSAVE, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17324, IF_NEHALEM},
+ /* 1304 */ {I_XSAVE64, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17323, IF_LONG|IF_NEHALEM},
+ /* 1305 */ {I_XSAVEOPT, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17330, IF_FUTURE},
+ /* 1306 */ {I_XSAVEOPT64, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17329, IF_LONG|IF_FUTURE},
+ /* 1307 */ {I_XRSTOR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17336, IF_NEHALEM},
+ /* 1308 */ {I_XRSTOR64, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+17335, IF_LONG|IF_NEHALEM},
+ /* 1309 */ {I_PREFETCHNTA, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18278, IF_KATMAI},
+ /* 1310 */ {I_PREFETCHT0, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18296, IF_KATMAI},
+ /* 1311 */ {I_PREFETCHT1, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18314, IF_KATMAI},
+ /* 1312 */ {I_PREFETCHT2, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18332, IF_KATMAI},
+ /* 1313 */ {I_SFENCE, 0, {0,0,0,0,0}, nasm_bytecodes+20829, IF_KATMAI},
+ /* 1314 */ {I_MASKMOVQ, 2, {MMXREG,MMXREG,0,0,0}, nasm_bytecodes+17341, IF_KATMAI|IF_MMX},
+ /* 1315 */ {I_MOVNTQ, 2, {MEMORY,MMXREG,0,0,0}, nasm_bytecodes+17347, IF_KATMAI|IF_MMX|IF_SQ},
+ /* 1316 */ {I_PAVGB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8351, IF_KATMAI|IF_MMX|IF_SQ},
+ /* 1317 */ {I_PAVGW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8358, IF_KATMAI|IF_MMX|IF_SQ},
+ /* 1318 */ {I_PEXTRW, 3, {REG_GPR|BITS32,MMXREG,IMMEDIATE,0,0}, nasm_bytecodes+8365, IF_KATMAI|IF_MMX|IF_SB|IF_AR2},
+ /* 1319 */ {I_PINSRW, 3, {MMXREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+8372, IF_KATMAI|IF_MMX|IF_SB|IF_AR2},
+ /* 1320 */ {I_PINSRW, 3, {MMXREG,RM_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+8372, IF_KATMAI|IF_MMX|IF_SB|IF_AR2},
+ /* 1321 */ {I_PINSRW, 3, {MMXREG,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+8372, IF_KATMAI|IF_MMX|IF_SB|IF_AR2},
+ /* 1322 */ {I_PMAXSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8379, IF_KATMAI|IF_MMX|IF_SQ},
+ /* 1323 */ {I_PMAXUB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8386, IF_KATMAI|IF_MMX|IF_SQ},
+ /* 1324 */ {I_PMINSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8393, IF_KATMAI|IF_MMX|IF_SQ},
+ /* 1325 */ {I_PMINUB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8400, IF_KATMAI|IF_MMX|IF_SQ},
+ /* 1326 */ {I_PMOVMSKB, 2, {REG_GPR|BITS32,MMXREG,0,0,0}, nasm_bytecodes+17353, IF_KATMAI|IF_MMX},
+ /* 1327 */ {I_PMULHUW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8407, IF_KATMAI|IF_MMX|IF_SQ},
+ /* 1328 */ {I_PSADBW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8414, IF_KATMAI|IF_MMX|IF_SQ},
+ /* 1329 */ {I_PSHUFW, 3, {MMXREG,RM_MMX,IMMEDIATE,0,0}, nasm_bytecodes+3970, IF_KATMAI|IF_MMX|IF_SM2|IF_SB|IF_AR2},
+ /* 1330 */ {I_PF2IW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3978, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 1331 */ {I_PFNACC, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3986, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 1332 */ {I_PFPNACC, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+3994, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 1333 */ {I_PI2FW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+4002, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 1334 */ {I_PSWAPD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+4010, IF_PENT|IF_3DNOW|IF_SQ},
+ /* 1335 */ {I_MASKMOVDQU, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17359, IF_WILLAMETTE|IF_SSE2},
+ /* 1336 */ {I_CLFLUSH, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+21049, IF_WILLAMETTE|IF_SSE2},
+ /* 1337 */ {I_MOVNTDQ, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+17365, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1338 */ {I_MOVNTI, 2, {MEMORY,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+8422, IF_WILLAMETTE|IF_SD},
+ /* 1339 */ {I_MOVNTI, 2, {MEMORY,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+8421, IF_X64|IF_SQ},
+ /* 1340 */ {I_MOVNTPD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+17371, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1341 */ {I_LFENCE, 0, {0,0,0,0,0}, nasm_bytecodes+20194, IF_WILLAMETTE|IF_SSE2},
+ /* 1342 */ {I_MFENCE, 0, {0,0,0,0,0}, nasm_bytecodes+20284, IF_WILLAMETTE|IF_SSE2},
+ /* 1343 */ {I_MOVD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+8428, IF_WILLAMETTE|IF_SSE2|IF_SD},
+ /* 1344 */ {I_MOVD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+8435, IF_WILLAMETTE|IF_SSE2|IF_SD},
+ /* 1345 */ {I_MOVD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+8435, IF_WILLAMETTE|IF_SSE2},
+ /* 1346 */ {I_MOVD, 2, {RM_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+8428, IF_WILLAMETTE|IF_SSE2},
+ /* 1347 */ {I_MOVDQA, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17377, IF_WILLAMETTE|IF_SSE2},
+ /* 1348 */ {I_MOVDQA, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+17383, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1349 */ {I_MOVDQA, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+17377, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1350 */ {I_MOVDQA, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17383, IF_WILLAMETTE|IF_SSE2},
+ /* 1351 */ {I_MOVDQU, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17389, IF_WILLAMETTE|IF_SSE2},
+ /* 1352 */ {I_MOVDQU, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+17395, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1353 */ {I_MOVDQU, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+17389, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1354 */ {I_MOVDQU, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17395, IF_WILLAMETTE|IF_SSE2},
+ /* 1355 */ {I_MOVDQ2Q, 2, {MMXREG,XMMREG,0,0,0}, nasm_bytecodes+17401, IF_WILLAMETTE|IF_SSE2},
+ /* 1356 */ {I_MOVQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17407, IF_WILLAMETTE|IF_SSE2},
+ /* 1357 */ {I_MOVQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17413, IF_WILLAMETTE|IF_SSE2},
+ /* 1358 */ {I_MOVQ, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+17413, IF_WILLAMETTE|IF_SSE2|IF_SQ},
+ /* 1359 */ {I_MOVQ, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+17407, IF_WILLAMETTE|IF_SSE2|IF_SQ},
+ /* 1360 */ {I_MOVQ, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+8442, IF_X64|IF_SSE2},
+ /* 1361 */ {I_MOVQ, 2, {RM_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+8449, IF_X64|IF_SSE2},
+ /* 1362 */ {I_MOVQ2DQ, 2, {XMMREG,MMXREG,0,0,0}, nasm_bytecodes+17419, IF_WILLAMETTE|IF_SSE2},
+ /* 1363 */ {I_PACKSSWB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17425, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1364 */ {I_PACKSSDW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17431, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1365 */ {I_PACKUSWB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17437, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1366 */ {I_PADDB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17443, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1367 */ {I_PADDW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17449, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1368 */ {I_PADDD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17455, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1369 */ {I_PADDQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+17461, IF_WILLAMETTE|IF_MMX|IF_SQ},
+ /* 1370 */ {I_PADDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17467, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1371 */ {I_PADDSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17473, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1372 */ {I_PADDSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17479, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1373 */ {I_PADDUSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17485, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1374 */ {I_PADDUSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17491, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1375 */ {I_PAND, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17497, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1376 */ {I_PANDN, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17503, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1377 */ {I_PAVGB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17509, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1378 */ {I_PAVGW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17515, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1379 */ {I_PCMPEQB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17521, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1380 */ {I_PCMPEQW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17527, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1381 */ {I_PCMPEQD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17533, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1382 */ {I_PCMPGTB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17539, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1383 */ {I_PCMPGTW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17545, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1384 */ {I_PCMPGTD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17551, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1385 */ {I_PEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+8456, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
+ /* 1386 */ {I_PINSRW, 3, {XMMREG,REG_GPR|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+8463, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
+ /* 1387 */ {I_PINSRW, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+8463, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
+ /* 1388 */ {I_PINSRW, 3, {XMMREG,MEMORY|BITS16,IMMEDIATE,0,0}, nasm_bytecodes+8463, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
+ /* 1389 */ {I_PMADDWD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17557, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1390 */ {I_PMAXSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17563, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1391 */ {I_PMAXUB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17569, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1392 */ {I_PMINSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17575, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1393 */ {I_PMINUB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17581, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1394 */ {I_PMOVMSKB, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+17587, IF_WILLAMETTE|IF_SSE2},
+ /* 1395 */ {I_PMULHUW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17593, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1396 */ {I_PMULHW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17599, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1397 */ {I_PMULLW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17605, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1398 */ {I_PMULUDQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8470, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1399 */ {I_PMULUDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17611, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1400 */ {I_POR, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17617, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1401 */ {I_PSADBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17623, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1402 */ {I_PSHUFD, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+8477, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
+ /* 1403 */ {I_PSHUFD, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+8477, IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},
+ /* 1404 */ {I_PSHUFHW, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+8484, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
+ /* 1405 */ {I_PSHUFHW, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+8484, IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},
+ /* 1406 */ {I_PSHUFLW, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+8491, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
+ /* 1407 */ {I_PSHUFLW, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+8491, IF_WILLAMETTE|IF_SSE2|IF_SM2|IF_SB|IF_AR2},
+ /* 1408 */ {I_PSLLDQ, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+8498, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
+ /* 1409 */ {I_PSLLW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17629, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1410 */ {I_PSLLW, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+8505, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
+ /* 1411 */ {I_PSLLD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17635, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1412 */ {I_PSLLD, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+8512, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
+ /* 1413 */ {I_PSLLQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17641, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1414 */ {I_PSLLQ, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+8519, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
+ /* 1415 */ {I_PSRAW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17647, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1416 */ {I_PSRAW, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+8526, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
+ /* 1417 */ {I_PSRAD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17653, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1418 */ {I_PSRAD, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+8533, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
+ /* 1419 */ {I_PSRLDQ, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+8540, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
+ /* 1420 */ {I_PSRLW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17659, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1421 */ {I_PSRLW, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+8547, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
+ /* 1422 */ {I_PSRLD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17665, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1423 */ {I_PSRLD, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+8554, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
+ /* 1424 */ {I_PSRLQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17671, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1425 */ {I_PSRLQ, 2, {XMMREG,IMMEDIATE,0,0,0}, nasm_bytecodes+8561, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR1},
+ /* 1426 */ {I_PSUBB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17677, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1427 */ {I_PSUBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17683, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1428 */ {I_PSUBD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17689, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1429 */ {I_PSUBQ, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8568, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1430 */ {I_PSUBQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17695, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1431 */ {I_PSUBSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17701, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1432 */ {I_PSUBSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17707, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1433 */ {I_PSUBUSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17713, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1434 */ {I_PSUBUSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17719, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1435 */ {I_PUNPCKHBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17725, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1436 */ {I_PUNPCKHWD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17731, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1437 */ {I_PUNPCKHDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17737, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1438 */ {I_PUNPCKHQDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17743, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1439 */ {I_PUNPCKLBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17749, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1440 */ {I_PUNPCKLWD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17755, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1441 */ {I_PUNPCKLDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17761, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1442 */ {I_PUNPCKLQDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17767, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1443 */ {I_PXOR, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17773, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1444 */ {I_ADDPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17779, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1445 */ {I_ADDSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17785, IF_WILLAMETTE|IF_SSE2|IF_SQ},
+ /* 1446 */ {I_ANDNPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17791, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1447 */ {I_ANDPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17797, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1448 */ {I_CMPEQPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4018, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1449 */ {I_CMPEQSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4026, IF_WILLAMETTE|IF_SSE2},
+ /* 1450 */ {I_CMPLEPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4034, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1451 */ {I_CMPLESD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4042, IF_WILLAMETTE|IF_SSE2},
+ /* 1452 */ {I_CMPLTPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4050, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1453 */ {I_CMPLTSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4058, IF_WILLAMETTE|IF_SSE2},
+ /* 1454 */ {I_CMPNEQPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4066, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1455 */ {I_CMPNEQSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4074, IF_WILLAMETTE|IF_SSE2},
+ /* 1456 */ {I_CMPNLEPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4082, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1457 */ {I_CMPNLESD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4090, IF_WILLAMETTE|IF_SSE2},
+ /* 1458 */ {I_CMPNLTPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4098, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1459 */ {I_CMPNLTSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4106, IF_WILLAMETTE|IF_SSE2},
+ /* 1460 */ {I_CMPORDPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4114, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1461 */ {I_CMPORDSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4122, IF_WILLAMETTE|IF_SSE2},
+ /* 1462 */ {I_CMPUNORDPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4130, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1463 */ {I_CMPUNORDSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+4138, IF_WILLAMETTE|IF_SSE2},
+ /* 1464 */ {I_CMPPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+8575, IF_WILLAMETTE|IF_SSE2},
+ /* 1465 */ {I_CMPSD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+8582, IF_WILLAMETTE|IF_SSE2},
+ /* 1466 */ {I_COMISD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17803, IF_WILLAMETTE|IF_SSE2},
+ /* 1467 */ {I_CVTDQ2PD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17809, IF_WILLAMETTE|IF_SSE2|IF_SQ},
+ /* 1468 */ {I_CVTDQ2PS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17815, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1469 */ {I_CVTPD2DQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17821, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1470 */ {I_CVTPD2PI, 2, {MMXREG,RM_XMM,0,0,0}, nasm_bytecodes+17827, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1471 */ {I_CVTPD2PS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17833, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1472 */ {I_CVTPI2PD, 2, {XMMREG,RM_MMX,0,0,0}, nasm_bytecodes+17839, IF_WILLAMETTE|IF_SSE2|IF_SQ},
+ /* 1473 */ {I_CVTPS2DQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17845, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1474 */ {I_CVTPS2PD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17851, IF_WILLAMETTE|IF_SSE2|IF_SQ},
+ /* 1475 */ {I_CVTSD2SI, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+8590, IF_WILLAMETTE|IF_SSE2|IF_SQ|IF_AR1},
+ /* 1476 */ {I_CVTSD2SI, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+8590, IF_WILLAMETTE|IF_SSE2|IF_SQ|IF_AR1},
+ /* 1477 */ {I_CVTSD2SI, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+8589, IF_X64|IF_SSE2|IF_SQ|IF_AR1},
+ /* 1478 */ {I_CVTSD2SI, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+8589, IF_X64|IF_SSE2|IF_SQ|IF_AR1},
+ /* 1479 */ {I_CVTSD2SS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17857, IF_WILLAMETTE|IF_SSE2|IF_SQ},
+ /* 1480 */ {I_CVTSI2SD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+8597, IF_WILLAMETTE|IF_SSE2|IF_SD|IF_AR1},
+ /* 1481 */ {I_CVTSI2SD, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+8596, IF_X64|IF_SSE2|IF_SQ|IF_AR1},
+ /* 1482 */ {I_CVTSS2SD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17863, IF_WILLAMETTE|IF_SSE2|IF_SD},
+ /* 1483 */ {I_CVTTPD2PI, 2, {MMXREG,RM_XMM,0,0,0}, nasm_bytecodes+17869, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1484 */ {I_CVTTPD2DQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17875, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1485 */ {I_CVTTPS2DQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17881, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1486 */ {I_CVTTSD2SI, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+8604, IF_WILLAMETTE|IF_SSE2|IF_SQ|IF_AR1},
+ /* 1487 */ {I_CVTTSD2SI, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+8604, IF_WILLAMETTE|IF_SSE2|IF_SQ|IF_AR1},
+ /* 1488 */ {I_CVTTSD2SI, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+8603, IF_X64|IF_SSE2|IF_SQ|IF_AR1},
+ /* 1489 */ {I_CVTTSD2SI, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+8603, IF_X64|IF_SSE2|IF_SQ|IF_AR1},
+ /* 1490 */ {I_DIVPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17887, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1491 */ {I_DIVSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17893, IF_WILLAMETTE|IF_SSE2},
+ /* 1492 */ {I_MAXPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17899, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1493 */ {I_MAXSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17905, IF_WILLAMETTE|IF_SSE2},
+ /* 1494 */ {I_MINPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17911, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1495 */ {I_MINSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17917, IF_WILLAMETTE|IF_SSE2},
+ /* 1496 */ {I_MOVAPD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17923, IF_WILLAMETTE|IF_SSE2},
+ /* 1497 */ {I_MOVAPD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17929, IF_WILLAMETTE|IF_SSE2},
+ /* 1498 */ {I_MOVAPD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+17929, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1499 */ {I_MOVAPD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+17923, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1500 */ {I_MOVHPD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+17935, IF_WILLAMETTE|IF_SSE2},
+ /* 1501 */ {I_MOVHPD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+17941, IF_WILLAMETTE|IF_SSE2},
+ /* 1502 */ {I_MOVLPD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+17947, IF_WILLAMETTE|IF_SSE2},
+ /* 1503 */ {I_MOVLPD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+17953, IF_WILLAMETTE|IF_SSE2},
+ /* 1504 */ {I_MOVMSKPD, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+17959, IF_WILLAMETTE|IF_SSE2},
+ /* 1505 */ {I_MOVMSKPD, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+8610, IF_X64|IF_SSE2},
+ /* 1506 */ {I_MOVSD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17965, IF_WILLAMETTE|IF_SSE2},
+ /* 1507 */ {I_MOVSD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17971, IF_WILLAMETTE|IF_SSE2},
+ /* 1508 */ {I_MOVSD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+17971, IF_WILLAMETTE|IF_SSE2},
+ /* 1509 */ {I_MOVSD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+17965, IF_WILLAMETTE|IF_SSE2},
+ /* 1510 */ {I_MOVUPD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17977, IF_WILLAMETTE|IF_SSE2},
+ /* 1511 */ {I_MOVUPD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+17983, IF_WILLAMETTE|IF_SSE2},
+ /* 1512 */ {I_MOVUPD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+17983, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1513 */ {I_MOVUPD, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+17977, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1514 */ {I_MULPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17989, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1515 */ {I_MULSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+17995, IF_WILLAMETTE|IF_SSE2},
+ /* 1516 */ {I_ORPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18001, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1517 */ {I_SHUFPD, 3, {XMMREG,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+8617, IF_WILLAMETTE|IF_SSE2|IF_SB|IF_AR2},
+ /* 1518 */ {I_SHUFPD, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+8617, IF_WILLAMETTE|IF_SSE2|IF_SM|IF_SB|IF_AR2},
+ /* 1519 */ {I_SQRTPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18007, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1520 */ {I_SQRTSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18013, IF_WILLAMETTE|IF_SSE2},
+ /* 1521 */ {I_SUBPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18019, IF_WILLAMETTE|IF_SSE2|IF_SO},
+ /* 1522 */ {I_SUBSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18025, IF_WILLAMETTE|IF_SSE2},
+ /* 1523 */ {I_UCOMISD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18031, IF_WILLAMETTE|IF_SSE2},
+ /* 1524 */ {I_UNPCKHPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+18037, IF_WILLAMETTE|IF_SSE2},
+ /* 1525 */ {I_UNPCKLPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+18043, IF_WILLAMETTE|IF_SSE2},
+ /* 1526 */ {I_XORPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+18049, IF_WILLAMETTE|IF_SSE2},
+ /* 1527 */ {I_ADDSUBPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18055, IF_PRESCOTT|IF_SSE3|IF_SO},
+ /* 1528 */ {I_ADDSUBPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18061, IF_PRESCOTT|IF_SSE3|IF_SO},
+ /* 1529 */ {I_HADDPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18067, IF_PRESCOTT|IF_SSE3|IF_SO},
+ /* 1530 */ {I_HADDPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18073, IF_PRESCOTT|IF_SSE3|IF_SO},
+ /* 1531 */ {I_HSUBPD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18079, IF_PRESCOTT|IF_SSE3|IF_SO},
+ /* 1532 */ {I_HSUBPS, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18085, IF_PRESCOTT|IF_SSE3|IF_SO},
+ /* 1533 */ {I_LDDQU, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+18091, IF_PRESCOTT|IF_SSE3|IF_SO},
+ /* 1534 */ {I_MOVDDUP, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18097, IF_PRESCOTT|IF_SSE3},
+ /* 1535 */ {I_MOVSHDUP, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18103, IF_PRESCOTT|IF_SSE3},
+ /* 1536 */ {I_MOVSLDUP, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+18109, IF_PRESCOTT|IF_SSE3},
+ /* 1537 */ {I_VMCALL, 0, {0,0,0,0,0}, nasm_bytecodes+21054, IF_VMX},
+ /* 1538 */ {I_VMCLEAR, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18115, IF_VMX},
+ /* 1539 */ {I_VMFUNC, 0, {0,0,0,0,0}, nasm_bytecodes+21059, IF_VMX},
+ /* 1540 */ {I_VMLAUNCH, 0, {0,0,0,0,0}, nasm_bytecodes+21064, IF_VMX},
+ /* 1541 */ {I_VMLOAD, 0, {0,0,0,0,0}, nasm_bytecodes+21069, IF_X64|IF_VMX},
+ /* 1542 */ {I_VMMCALL, 0, {0,0,0,0,0}, nasm_bytecodes+21074, IF_X64|IF_VMX},
+ /* 1543 */ {I_VMPTRLD, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18176, IF_VMX},
+ /* 1544 */ {I_VMPTRST, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18194, IF_VMX},
+ /* 1545 */ {I_VMREAD, 2, {RM_GPR|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+8625, IF_VMX|IF_NOLONG|IF_SD},
+ /* 1546 */ {I_VMREAD, 2, {RM_GPR|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+8624, IF_X64|IF_VMX|IF_SQ},
+ /* 1547 */ {I_VMRESUME, 0, {0,0,0,0,0}, nasm_bytecodes+21079, IF_VMX},
+ /* 1548 */ {I_VMRUN, 0, {0,0,0,0,0}, nasm_bytecodes+21084, IF_X64|IF_VMX},
+ /* 1549 */ {I_VMSAVE, 0, {0,0,0,0,0}, nasm_bytecodes+21089, IF_X64|IF_VMX},
+ /* 1550 */ {I_VMWRITE, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+8632, IF_VMX|IF_NOLONG|IF_SD},
+ /* 1551 */ {I_VMWRITE, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+8631, IF_X64|IF_VMX|IF_SQ},
+ /* 1552 */ {I_VMXOFF, 0, {0,0,0,0,0}, nasm_bytecodes+21094, IF_VMX},
+ /* 1553 */ {I_VMXON, 1, {MEMORY,0,0,0,0}, nasm_bytecodes+18121, IF_VMX},
+ /* 1554 */ {I_INVEPT, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+4147, IF_VMX|IF_SO|IF_NOLONG},
+ /* 1555 */ {I_INVEPT, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+4146, IF_VMX|IF_SO|IF_LONG},
+ /* 1556 */ {I_INVVPID, 2, {REG_GPR|BITS32,MEMORY,0,0,0}, nasm_bytecodes+4155, IF_VMX|IF_SO|IF_NOLONG},
+ /* 1557 */ {I_INVVPID, 2, {REG_GPR|BITS64,MEMORY,0,0,0}, nasm_bytecodes+4154, IF_VMX|IF_SO|IF_LONG},
+ /* 1558 */ {I_PABSB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8638, IF_SSSE3|IF_MMX|IF_SQ},
+ /* 1559 */ {I_PABSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8645, IF_SSSE3},
+ /* 1560 */ {I_PABSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8652, IF_SSSE3|IF_MMX|IF_SQ},
+ /* 1561 */ {I_PABSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8659, IF_SSSE3},
+ /* 1562 */ {I_PABSD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8666, IF_SSSE3|IF_MMX|IF_SQ},
+ /* 1563 */ {I_PABSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8673, IF_SSSE3},
+ /* 1564 */ {I_PALIGNR, 3, {MMXREG,RM_MMX,IMMEDIATE,0,0}, nasm_bytecodes+4162, IF_SSSE3|IF_MMX|IF_SQ},
+ /* 1565 */ {I_PALIGNR, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4170, IF_SSSE3},
+ /* 1566 */ {I_PHADDW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8680, IF_SSSE3|IF_MMX|IF_SQ},
+ /* 1567 */ {I_PHADDW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8687, IF_SSSE3},
+ /* 1568 */ {I_PHADDD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8694, IF_SSSE3|IF_MMX|IF_SQ},
+ /* 1569 */ {I_PHADDD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8701, IF_SSSE3},
+ /* 1570 */ {I_PHADDSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8708, IF_SSSE3|IF_MMX|IF_SQ},
+ /* 1571 */ {I_PHADDSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8715, IF_SSSE3},
+ /* 1572 */ {I_PHSUBW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8722, IF_SSSE3|IF_MMX|IF_SQ},
+ /* 1573 */ {I_PHSUBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8729, IF_SSSE3},
+ /* 1574 */ {I_PHSUBD, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8736, IF_SSSE3|IF_MMX|IF_SQ},
+ /* 1575 */ {I_PHSUBD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8743, IF_SSSE3},
+ /* 1576 */ {I_PHSUBSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8750, IF_SSSE3|IF_MMX|IF_SQ},
+ /* 1577 */ {I_PHSUBSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8757, IF_SSSE3},
+ /* 1578 */ {I_PMADDUBSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8764, IF_SSSE3|IF_MMX|IF_SQ},
+ /* 1579 */ {I_PMADDUBSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8771, IF_SSSE3},
+ /* 1580 */ {I_PMULHRSW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8778, IF_SSSE3|IF_MMX|IF_SQ},
+ /* 1581 */ {I_PMULHRSW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8785, IF_SSSE3},
+ /* 1582 */ {I_PSHUFB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8792, IF_SSSE3|IF_MMX|IF_SQ},
+ /* 1583 */ {I_PSHUFB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8799, IF_SSSE3},
+ /* 1584 */ {I_PSIGNB, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8806, IF_SSSE3|IF_MMX|IF_SQ},
+ /* 1585 */ {I_PSIGNB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8813, IF_SSSE3},
+ /* 1586 */ {I_PSIGNW, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8820, IF_SSSE3|IF_MMX|IF_SQ},
+ /* 1587 */ {I_PSIGNW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8827, IF_SSSE3},
+ /* 1588 */ {I_PSIGND, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+8834, IF_SSSE3|IF_MMX|IF_SQ},
+ /* 1589 */ {I_PSIGND, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8841, IF_SSSE3},
+ /* 1590 */ {I_EXTRQ, 3, {XMMREG,IMMEDIATE,IMMEDIATE,0,0}, nasm_bytecodes+4178, IF_SSE4A|IF_AMD},
+ /* 1591 */ {I_EXTRQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+18127, IF_SSE4A|IF_AMD},
+ /* 1592 */ {I_INSERTQ, 4, {XMMREG,XMMREG,IMMEDIATE,IMMEDIATE,0}, nasm_bytecodes+4186, IF_SSE4A|IF_AMD},
+ /* 1593 */ {I_INSERTQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+18133, IF_SSE4A|IF_AMD},
+ /* 1594 */ {I_MOVNTSD, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+18139, IF_SSE4A|IF_AMD|IF_SQ},
+ /* 1595 */ {I_MOVNTSS, 2, {MEMORY,XMMREG,0,0,0}, nasm_bytecodes+18145, IF_SSE4A|IF_AMD|IF_SD},
+ /* 1596 */ {I_LZCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+8848, IF_P6|IF_AMD},
+ /* 1597 */ {I_LZCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+8855, IF_P6|IF_AMD},
+ /* 1598 */ {I_LZCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+8862, IF_X64|IF_AMD},
+ /* 1599 */ {I_BLENDPD, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4194, IF_SSE41},
+ /* 1600 */ {I_BLENDPS, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4202, IF_SSE41},
+ /* 1601 */ {I_BLENDVPD, 3, {XMMREG,RM_XMM,XMM0,0,0}, nasm_bytecodes+8869, IF_SSE41},
+ /* 1602 */ {I_BLENDVPS, 3, {XMMREG,RM_XMM,XMM0,0,0}, nasm_bytecodes+8876, IF_SSE41},
+ /* 1603 */ {I_DPPD, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4210, IF_SSE41},
+ /* 1604 */ {I_DPPS, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4218, IF_SSE41},
+ /* 1605 */ {I_EXTRACTPS, 3, {RM_GPR|BITS32,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+1, IF_SSE41},
+ /* 1606 */ {I_EXTRACTPS, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+0, IF_SSE41|IF_X64},
+ /* 1607 */ {I_INSERTPS, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4226, IF_SSE41|IF_SD},
+ /* 1608 */ {I_MOVNTDQA, 2, {XMMREG,MEMORY,0,0,0}, nasm_bytecodes+8883, IF_SSE41},
+ /* 1609 */ {I_MPSADBW, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4234, IF_SSE41},
+ /* 1610 */ {I_PACKUSDW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8890, IF_SSE41},
+ /* 1611 */ {I_PBLENDVB, 3, {XMMREG,RM_XMM,XMM0,0,0}, nasm_bytecodes+8897, IF_SSE41},
+ /* 1612 */ {I_PBLENDW, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4242, IF_SSE41},
+ /* 1613 */ {I_PCMPEQQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8904, IF_SSE41},
+ /* 1614 */ {I_PEXTRB, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+10, IF_SSE41},
+ /* 1615 */ {I_PEXTRB, 3, {MEMORY|BITS8,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+10, IF_SSE41},
+ /* 1616 */ {I_PEXTRB, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+9, IF_SSE41|IF_X64},
+ /* 1617 */ {I_PEXTRD, 3, {RM_GPR|BITS32,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+19, IF_SSE41},
+ /* 1618 */ {I_PEXTRQ, 3, {RM_GPR|BITS64,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+18, IF_SSE41|IF_X64},
+ /* 1619 */ {I_PEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+28, IF_SSE41},
+ /* 1620 */ {I_PEXTRW, 3, {MEMORY|BITS16,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+28, IF_SSE41},
+ /* 1621 */ {I_PEXTRW, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE,0,0}, nasm_bytecodes+27, IF_SSE41|IF_X64},
+ /* 1622 */ {I_PHMINPOSUW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8911, IF_SSE41},
+ /* 1623 */ {I_PINSRB, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+37, IF_SSE41|IF_SB|IF_AR2},
+ /* 1624 */ {I_PINSRB, 3, {XMMREG,RM_GPR|BITS8,IMMEDIATE,0,0}, nasm_bytecodes+36, IF_SSE41|IF_SB|IF_AR2},
+ /* 1625 */ {I_PINSRB, 3, {XMMREG,REG_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+37, IF_SSE41|IF_SB|IF_AR2},
+ /* 1626 */ {I_PINSRD, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+46, IF_SSE41|IF_SB|IF_AR2},
+ /* 1627 */ {I_PINSRD, 3, {XMMREG,RM_GPR|BITS32,IMMEDIATE,0,0}, nasm_bytecodes+46, IF_SSE41|IF_SB|IF_AR2},
+ /* 1628 */ {I_PINSRQ, 3, {XMMREG,MEMORY,IMMEDIATE,0,0}, nasm_bytecodes+45, IF_SSE41|IF_X64|IF_SB|IF_AR2},
+ /* 1629 */ {I_PINSRQ, 3, {XMMREG,RM_GPR|BITS64,IMMEDIATE,0,0}, nasm_bytecodes+45, IF_SSE41|IF_X64|IF_SB|IF_AR2},
+ /* 1630 */ {I_PMAXSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8918, IF_SSE41},
+ /* 1631 */ {I_PMAXSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8925, IF_SSE41},
+ /* 1632 */ {I_PMAXUD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8932, IF_SSE41},
+ /* 1633 */ {I_PMAXUW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8939, IF_SSE41},
+ /* 1634 */ {I_PMINSB, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8946, IF_SSE41},
+ /* 1635 */ {I_PMINSD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8953, IF_SSE41},
+ /* 1636 */ {I_PMINUD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8960, IF_SSE41},
+ /* 1637 */ {I_PMINUW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8967, IF_SSE41},
+ /* 1638 */ {I_PMOVSXBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8974, IF_SSE41|IF_SQ},
+ /* 1639 */ {I_PMOVSXBD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8981, IF_SSE41|IF_SD},
+ /* 1640 */ {I_PMOVSXBQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8988, IF_SSE41|IF_SW},
+ /* 1641 */ {I_PMOVSXWD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+8995, IF_SSE41|IF_SQ},
+ /* 1642 */ {I_PMOVSXWQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9002, IF_SSE41|IF_SD},
+ /* 1643 */ {I_PMOVSXDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9009, IF_SSE41|IF_SQ},
+ /* 1644 */ {I_PMOVZXBW, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9016, IF_SSE41|IF_SQ},
+ /* 1645 */ {I_PMOVZXBD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9023, IF_SSE41|IF_SD},
+ /* 1646 */ {I_PMOVZXBQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9030, IF_SSE41|IF_SW},
+ /* 1647 */ {I_PMOVZXWD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9037, IF_SSE41|IF_SQ},
+ /* 1648 */ {I_PMOVZXWQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9044, IF_SSE41|IF_SD},
+ /* 1649 */ {I_PMOVZXDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9051, IF_SSE41|IF_SQ},
+ /* 1650 */ {I_PMULDQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9058, IF_SSE41},
+ /* 1651 */ {I_PMULLD, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9065, IF_SSE41},
+ /* 1652 */ {I_PTEST, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9072, IF_SSE41},
+ /* 1653 */ {I_ROUNDPD, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4250, IF_SSE41},
+ /* 1654 */ {I_ROUNDPS, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4258, IF_SSE41},
+ /* 1655 */ {I_ROUNDSD, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4266, IF_SSE41},
+ /* 1656 */ {I_ROUNDSS, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4274, IF_SSE41},
+ /* 1657 */ {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS8,0,0,0}, nasm_bytecodes+4299, IF_SSE42},
+ /* 1658 */ {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+4282, IF_SSE42},
+ /* 1659 */ {I_CRC32, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+4290, IF_SSE42},
+ /* 1660 */ {I_CRC32, 2, {REG_GPR|BITS64,RM_GPR|BITS8,0,0,0}, nasm_bytecodes+4298, IF_SSE42|IF_X64},
+ /* 1661 */ {I_CRC32, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+4306, IF_SSE42|IF_X64},
+ /* 1662 */ {I_PCMPESTRI, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4314, IF_SSE42},
+ /* 1663 */ {I_PCMPESTRM, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4322, IF_SSE42},
+ /* 1664 */ {I_PCMPISTRI, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4330, IF_SSE42},
+ /* 1665 */ {I_PCMPISTRM, 3, {XMMREG,RM_XMM,IMMEDIATE,0,0}, nasm_bytecodes+4338, IF_SSE42},
+ /* 1666 */ {I_PCMPGTQ, 2, {XMMREG,RM_XMM,0,0,0}, nasm_bytecodes+9079, IF_SSE42},
+ /* 1667 */ {I_POPCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+9086, IF_NEHALEM|IF_SW},
+ /* 1668 */ {I_POPCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+9093, IF_NEHALEM|IF_SD},
+ /* 1669 */ {I_POPCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+9100, IF_NEHALEM|IF_SQ|IF_X64},
+ /* 1670 */ {I_GETSEC, 0, {0,0,0,0,0}, nasm_bytecodes+22113, IF_KATMAI},
+ /* 1671 */ {I_PFRCPV, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+4346, IF_PENT|IF_3DNOW|IF_SQ|IF_CYRIX},
+ /* 1672 */ {I_PFRSQRTV, 2, {MMXREG,RM_MMX,0,0,0}, nasm_bytecodes+4354, IF_PENT|IF_3DNOW|IF_SQ|IF_CYRIX},
+ /* 1673 */ {I_MOVBE, 2, {REG_GPR|BITS16,MEMORY|BITS16,0,0,0}, nasm_bytecodes+9107, IF_NEHALEM|IF_SM},
+ /* 1674 */ {I_MOVBE, 2, {REG_GPR|BITS32,MEMORY|BITS32,0,0,0}, nasm_bytecodes+9114, IF_NEHALEM|IF_SM},
+ /* 1675 */ {I_MOVBE, 2, {REG_GPR|BITS64,MEMORY|BITS64,0,0,0}, nasm_bytecodes+9121, IF_NEHALEM|IF_SM},
+ /* 1676 */ {I_MOVBE, 2, {MEMORY|BITS16,REG_GPR|BITS16,0,0,0}, nasm_bytecodes+9128, IF_NEHALEM|IF_SM},
+ /* 1677 */ {I_MOVBE, 2, {MEMORY|BITS32,REG_GPR|BITS32,0,0,0}, nasm_bytecodes+9135, IF_NEHALEM|IF_SM},
+ /* 1678 */ {I_MOVBE, 2, {MEMORY|BITS64,REG_GPR|BITS64,0,0,0}, nasm_bytecodes+9142, IF_NEHALEM|IF_SM},
+ /* 1679 */ {I_AESENC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9149, IF_SSE|IF_WESTMERE},
+ /* 1680 */ {I_AESENCLAST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9156, IF_SSE|IF_WESTMERE},
+ /* 1681 */ {I_AESDEC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9163, IF_SSE|IF_WESTMERE},
+ /* 1682 */ {I_AESDECLAST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9170, IF_SSE|IF_WESTMERE},
+ /* 1683 */ {I_AESIMC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9177, IF_SSE|IF_WESTMERE},
+ /* 1684 */ {I_AESKEYGENASSIST, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4362, IF_SSE|IF_WESTMERE},
+ /* 1685 */ {I_VAESENC, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9184, IF_AVX|IF_SANDYBRIDGE},
+ /* 1686 */ {I_VAESENC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9191, IF_AVX|IF_SANDYBRIDGE},
+ /* 1687 */ {I_VAESENCLAST, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9198, IF_AVX|IF_SANDYBRIDGE},
+ /* 1688 */ {I_VAESENCLAST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9205, IF_AVX|IF_SANDYBRIDGE},
+ /* 1689 */ {I_VAESDEC, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9212, IF_AVX|IF_SANDYBRIDGE},
+ /* 1690 */ {I_VAESDEC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9219, IF_AVX|IF_SANDYBRIDGE},
+ /* 1691 */ {I_VAESDECLAST, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9226, IF_AVX|IF_SANDYBRIDGE},
+ /* 1692 */ {I_VAESDECLAST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9233, IF_AVX|IF_SANDYBRIDGE},
+ /* 1693 */ {I_VAESIMC, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9240, IF_AVX|IF_SANDYBRIDGE},
+ /* 1694 */ {I_VAESKEYGENASSIST, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4370, IF_AVX|IF_SANDYBRIDGE},
+ /* 1695 */ {I_VADDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9247, IF_AVX|IF_SANDYBRIDGE},
+ /* 1696 */ {I_VADDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9254, IF_AVX|IF_SANDYBRIDGE},
+ /* 1697 */ {I_VADDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9261, IF_AVX|IF_SANDYBRIDGE},
+ /* 1698 */ {I_VADDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9268, IF_AVX|IF_SANDYBRIDGE},
+ /* 1699 */ {I_VADDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9275, IF_AVX|IF_SANDYBRIDGE},
+ /* 1700 */ {I_VADDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9282, IF_AVX|IF_SANDYBRIDGE},
+ /* 1701 */ {I_VADDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9289, IF_AVX|IF_SANDYBRIDGE},
+ /* 1702 */ {I_VADDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9296, IF_AVX|IF_SANDYBRIDGE},
+ /* 1703 */ {I_VADDSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+9303, IF_AVX|IF_SANDYBRIDGE},
+ /* 1704 */ {I_VADDSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9310, IF_AVX|IF_SANDYBRIDGE},
+ /* 1705 */ {I_VADDSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+9317, IF_AVX|IF_SANDYBRIDGE},
+ /* 1706 */ {I_VADDSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9324, IF_AVX|IF_SANDYBRIDGE},
+ /* 1707 */ {I_VADDSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9331, IF_AVX|IF_SANDYBRIDGE},
+ /* 1708 */ {I_VADDSUBPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9338, IF_AVX|IF_SANDYBRIDGE},
+ /* 1709 */ {I_VADDSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9345, IF_AVX|IF_SANDYBRIDGE},
+ /* 1710 */ {I_VADDSUBPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9352, IF_AVX|IF_SANDYBRIDGE},
+ /* 1711 */ {I_VADDSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9359, IF_AVX|IF_SANDYBRIDGE},
+ /* 1712 */ {I_VADDSUBPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9366, IF_AVX|IF_SANDYBRIDGE},
+ /* 1713 */ {I_VADDSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9373, IF_AVX|IF_SANDYBRIDGE},
+ /* 1714 */ {I_VADDSUBPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9380, IF_AVX|IF_SANDYBRIDGE},
+ /* 1715 */ {I_VANDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9387, IF_AVX|IF_SANDYBRIDGE},
+ /* 1716 */ {I_VANDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9394, IF_AVX|IF_SANDYBRIDGE},
+ /* 1717 */ {I_VANDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9401, IF_AVX|IF_SANDYBRIDGE},
+ /* 1718 */ {I_VANDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9408, IF_AVX|IF_SANDYBRIDGE},
+ /* 1719 */ {I_VANDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9415, IF_AVX|IF_SANDYBRIDGE},
+ /* 1720 */ {I_VANDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9422, IF_AVX|IF_SANDYBRIDGE},
+ /* 1721 */ {I_VANDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9429, IF_AVX|IF_SANDYBRIDGE},
+ /* 1722 */ {I_VANDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9436, IF_AVX|IF_SANDYBRIDGE},
+ /* 1723 */ {I_VANDNPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9443, IF_AVX|IF_SANDYBRIDGE},
+ /* 1724 */ {I_VANDNPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9450, IF_AVX|IF_SANDYBRIDGE},
+ /* 1725 */ {I_VANDNPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9457, IF_AVX|IF_SANDYBRIDGE},
+ /* 1726 */ {I_VANDNPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9464, IF_AVX|IF_SANDYBRIDGE},
+ /* 1727 */ {I_VANDNPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9471, IF_AVX|IF_SANDYBRIDGE},
+ /* 1728 */ {I_VANDNPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9478, IF_AVX|IF_SANDYBRIDGE},
+ /* 1729 */ {I_VANDNPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9485, IF_AVX|IF_SANDYBRIDGE},
+ /* 1730 */ {I_VANDNPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9492, IF_AVX|IF_SANDYBRIDGE},
+ /* 1731 */ {I_VBLENDPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+4378, IF_AVX|IF_SANDYBRIDGE},
+ /* 1732 */ {I_VBLENDPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4386, IF_AVX|IF_SANDYBRIDGE},
+ /* 1733 */ {I_VBLENDPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+4394, IF_AVX|IF_SANDYBRIDGE},
+ /* 1734 */ {I_VBLENDPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4402, IF_AVX|IF_SANDYBRIDGE},
+ /* 1735 */ {I_VBLENDPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+4410, IF_AVX|IF_SANDYBRIDGE},
+ /* 1736 */ {I_VBLENDPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4418, IF_AVX|IF_SANDYBRIDGE},
+ /* 1737 */ {I_VBLENDPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+4426, IF_AVX|IF_SANDYBRIDGE},
+ /* 1738 */ {I_VBLENDPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4434, IF_AVX|IF_SANDYBRIDGE},
+ /* 1739 */ {I_VBLENDVPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4442, IF_AVX|IF_SANDYBRIDGE},
+ /* 1740 */ {I_VBLENDVPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4450, IF_AVX|IF_SANDYBRIDGE},
+ /* 1741 */ {I_VBLENDVPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+4458, IF_AVX|IF_SANDYBRIDGE},
+ /* 1742 */ {I_VBLENDVPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+4466, IF_AVX|IF_SANDYBRIDGE},
+ /* 1743 */ {I_VBLENDVPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4474, IF_AVX|IF_SANDYBRIDGE},
+ /* 1744 */ {I_VBLENDVPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4482, IF_AVX|IF_SANDYBRIDGE},
+ /* 1745 */ {I_VBLENDVPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+4490, IF_AVX|IF_SANDYBRIDGE},
+ /* 1746 */ {I_VBLENDVPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+4498, IF_AVX|IF_SANDYBRIDGE},
+ /* 1747 */ {I_VBROADCASTSS, 2, {XMMREG,MEMORY|BITS32,0,0,0}, nasm_bytecodes+9499, IF_AVX|IF_SANDYBRIDGE},
+ /* 1748 */ {I_VBROADCASTSS, 2, {YMMREG,MEMORY|BITS32,0,0,0}, nasm_bytecodes+9506, IF_AVX|IF_SANDYBRIDGE},
+ /* 1749 */ {I_VBROADCASTSD, 2, {YMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+9513, IF_AVX|IF_SANDYBRIDGE},
+ /* 1750 */ {I_VBROADCASTF128, 2, {YMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+9520, IF_AVX|IF_SANDYBRIDGE},
+ /* 1751 */ {I_VCMPEQ_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+54, IF_AVX|IF_SANDYBRIDGE},
+ /* 1752 */ {I_VCMPEQ_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+63, IF_AVX|IF_SANDYBRIDGE},
+ /* 1753 */ {I_VCMPEQ_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+72, IF_AVX|IF_SANDYBRIDGE},
+ /* 1754 */ {I_VCMPEQ_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+81, IF_AVX|IF_SANDYBRIDGE},
+ /* 1755 */ {I_VCMPEQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+90, IF_AVX|IF_SANDYBRIDGE},
+ /* 1756 */ {I_VCMPEQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+99, IF_AVX|IF_SANDYBRIDGE},
+ /* 1757 */ {I_VCMPEQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+108, IF_AVX|IF_SANDYBRIDGE},
+ /* 1758 */ {I_VCMPEQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+117, IF_AVX|IF_SANDYBRIDGE},
+ /* 1759 */ {I_VCMPLT_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+126, IF_AVX|IF_SANDYBRIDGE},
+ /* 1760 */ {I_VCMPLT_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+135, IF_AVX|IF_SANDYBRIDGE},
+ /* 1761 */ {I_VCMPLT_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+144, IF_AVX|IF_SANDYBRIDGE},
+ /* 1762 */ {I_VCMPLT_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+153, IF_AVX|IF_SANDYBRIDGE},
+ /* 1763 */ {I_VCMPLTPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+126, IF_AVX|IF_SANDYBRIDGE},
+ /* 1764 */ {I_VCMPLTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+135, IF_AVX|IF_SANDYBRIDGE},
+ /* 1765 */ {I_VCMPLTPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+144, IF_AVX|IF_SANDYBRIDGE},
+ /* 1766 */ {I_VCMPLTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+153, IF_AVX|IF_SANDYBRIDGE},
+ /* 1767 */ {I_VCMPLE_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+162, IF_AVX|IF_SANDYBRIDGE},
+ /* 1768 */ {I_VCMPLE_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+171, IF_AVX|IF_SANDYBRIDGE},
+ /* 1769 */ {I_VCMPLE_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+180, IF_AVX|IF_SANDYBRIDGE},
+ /* 1770 */ {I_VCMPLE_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+189, IF_AVX|IF_SANDYBRIDGE},
+ /* 1771 */ {I_VCMPLEPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+162, IF_AVX|IF_SANDYBRIDGE},
+ /* 1772 */ {I_VCMPLEPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+171, IF_AVX|IF_SANDYBRIDGE},
+ /* 1773 */ {I_VCMPLEPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+180, IF_AVX|IF_SANDYBRIDGE},
+ /* 1774 */ {I_VCMPLEPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+189, IF_AVX|IF_SANDYBRIDGE},
+ /* 1775 */ {I_VCMPUNORD_QPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+198, IF_AVX|IF_SANDYBRIDGE},
+ /* 1776 */ {I_VCMPUNORD_QPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+207, IF_AVX|IF_SANDYBRIDGE},
+ /* 1777 */ {I_VCMPUNORD_QPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+216, IF_AVX|IF_SANDYBRIDGE},
+ /* 1778 */ {I_VCMPUNORD_QPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+225, IF_AVX|IF_SANDYBRIDGE},
+ /* 1779 */ {I_VCMPUNORDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+198, IF_AVX|IF_SANDYBRIDGE},
+ /* 1780 */ {I_VCMPUNORDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+207, IF_AVX|IF_SANDYBRIDGE},
+ /* 1781 */ {I_VCMPUNORDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+216, IF_AVX|IF_SANDYBRIDGE},
+ /* 1782 */ {I_VCMPUNORDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+225, IF_AVX|IF_SANDYBRIDGE},
+ /* 1783 */ {I_VCMPNEQ_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+234, IF_AVX|IF_SANDYBRIDGE},
+ /* 1784 */ {I_VCMPNEQ_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+243, IF_AVX|IF_SANDYBRIDGE},
+ /* 1785 */ {I_VCMPNEQ_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+252, IF_AVX|IF_SANDYBRIDGE},
+ /* 1786 */ {I_VCMPNEQ_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+261, IF_AVX|IF_SANDYBRIDGE},
+ /* 1787 */ {I_VCMPNEQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+234, IF_AVX|IF_SANDYBRIDGE},
+ /* 1788 */ {I_VCMPNEQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+243, IF_AVX|IF_SANDYBRIDGE},
+ /* 1789 */ {I_VCMPNEQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+252, IF_AVX|IF_SANDYBRIDGE},
+ /* 1790 */ {I_VCMPNEQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+261, IF_AVX|IF_SANDYBRIDGE},
+ /* 1791 */ {I_VCMPNLT_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+270, IF_AVX|IF_SANDYBRIDGE},
+ /* 1792 */ {I_VCMPNLT_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+279, IF_AVX|IF_SANDYBRIDGE},
+ /* 1793 */ {I_VCMPNLT_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+288, IF_AVX|IF_SANDYBRIDGE},
+ /* 1794 */ {I_VCMPNLT_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+297, IF_AVX|IF_SANDYBRIDGE},
+ /* 1795 */ {I_VCMPNLTPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+270, IF_AVX|IF_SANDYBRIDGE},
+ /* 1796 */ {I_VCMPNLTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+279, IF_AVX|IF_SANDYBRIDGE},
+ /* 1797 */ {I_VCMPNLTPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+288, IF_AVX|IF_SANDYBRIDGE},
+ /* 1798 */ {I_VCMPNLTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+297, IF_AVX|IF_SANDYBRIDGE},
+ /* 1799 */ {I_VCMPNLE_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+306, IF_AVX|IF_SANDYBRIDGE},
+ /* 1800 */ {I_VCMPNLE_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+315, IF_AVX|IF_SANDYBRIDGE},
+ /* 1801 */ {I_VCMPNLE_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+324, IF_AVX|IF_SANDYBRIDGE},
+ /* 1802 */ {I_VCMPNLE_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+333, IF_AVX|IF_SANDYBRIDGE},
+ /* 1803 */ {I_VCMPNLEPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+306, IF_AVX|IF_SANDYBRIDGE},
+ /* 1804 */ {I_VCMPNLEPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+315, IF_AVX|IF_SANDYBRIDGE},
+ /* 1805 */ {I_VCMPNLEPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+324, IF_AVX|IF_SANDYBRIDGE},
+ /* 1806 */ {I_VCMPNLEPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+333, IF_AVX|IF_SANDYBRIDGE},
+ /* 1807 */ {I_VCMPORD_QPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+342, IF_AVX|IF_SANDYBRIDGE},
+ /* 1808 */ {I_VCMPORD_QPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+351, IF_AVX|IF_SANDYBRIDGE},
+ /* 1809 */ {I_VCMPORD_QPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+360, IF_AVX|IF_SANDYBRIDGE},
+ /* 1810 */ {I_VCMPORD_QPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+369, IF_AVX|IF_SANDYBRIDGE},
+ /* 1811 */ {I_VCMPORDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+342, IF_AVX|IF_SANDYBRIDGE},
+ /* 1812 */ {I_VCMPORDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+351, IF_AVX|IF_SANDYBRIDGE},
+ /* 1813 */ {I_VCMPORDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+360, IF_AVX|IF_SANDYBRIDGE},
+ /* 1814 */ {I_VCMPORDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+369, IF_AVX|IF_SANDYBRIDGE},
+ /* 1815 */ {I_VCMPEQ_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+378, IF_AVX|IF_SANDYBRIDGE},
+ /* 1816 */ {I_VCMPEQ_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+387, IF_AVX|IF_SANDYBRIDGE},
+ /* 1817 */ {I_VCMPEQ_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+396, IF_AVX|IF_SANDYBRIDGE},
+ /* 1818 */ {I_VCMPEQ_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+405, IF_AVX|IF_SANDYBRIDGE},
+ /* 1819 */ {I_VCMPNGE_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+414, IF_AVX|IF_SANDYBRIDGE},
+ /* 1820 */ {I_VCMPNGE_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+423, IF_AVX|IF_SANDYBRIDGE},
+ /* 1821 */ {I_VCMPNGE_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+432, IF_AVX|IF_SANDYBRIDGE},
+ /* 1822 */ {I_VCMPNGE_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+441, IF_AVX|IF_SANDYBRIDGE},
+ /* 1823 */ {I_VCMPNGEPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+414, IF_AVX|IF_SANDYBRIDGE},
+ /* 1824 */ {I_VCMPNGEPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+423, IF_AVX|IF_SANDYBRIDGE},
+ /* 1825 */ {I_VCMPNGEPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+432, IF_AVX|IF_SANDYBRIDGE},
+ /* 1826 */ {I_VCMPNGEPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+441, IF_AVX|IF_SANDYBRIDGE},
+ /* 1827 */ {I_VCMPNGT_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+450, IF_AVX|IF_SANDYBRIDGE},
+ /* 1828 */ {I_VCMPNGT_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+459, IF_AVX|IF_SANDYBRIDGE},
+ /* 1829 */ {I_VCMPNGT_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+468, IF_AVX|IF_SANDYBRIDGE},
+ /* 1830 */ {I_VCMPNGT_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+477, IF_AVX|IF_SANDYBRIDGE},
+ /* 1831 */ {I_VCMPNGTPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+450, IF_AVX|IF_SANDYBRIDGE},
+ /* 1832 */ {I_VCMPNGTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+459, IF_AVX|IF_SANDYBRIDGE},
+ /* 1833 */ {I_VCMPNGTPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+468, IF_AVX|IF_SANDYBRIDGE},
+ /* 1834 */ {I_VCMPNGTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+477, IF_AVX|IF_SANDYBRIDGE},
+ /* 1835 */ {I_VCMPFALSE_OQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+486, IF_AVX|IF_SANDYBRIDGE},
+ /* 1836 */ {I_VCMPFALSE_OQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+495, IF_AVX|IF_SANDYBRIDGE},
+ /* 1837 */ {I_VCMPFALSE_OQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+504, IF_AVX|IF_SANDYBRIDGE},
+ /* 1838 */ {I_VCMPFALSE_OQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+513, IF_AVX|IF_SANDYBRIDGE},
+ /* 1839 */ {I_VCMPFALSEPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+486, IF_AVX|IF_SANDYBRIDGE},
+ /* 1840 */ {I_VCMPFALSEPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+495, IF_AVX|IF_SANDYBRIDGE},
+ /* 1841 */ {I_VCMPFALSEPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+504, IF_AVX|IF_SANDYBRIDGE},
+ /* 1842 */ {I_VCMPFALSEPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+513, IF_AVX|IF_SANDYBRIDGE},
+ /* 1843 */ {I_VCMPNEQ_OQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+522, IF_AVX|IF_SANDYBRIDGE},
+ /* 1844 */ {I_VCMPNEQ_OQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+531, IF_AVX|IF_SANDYBRIDGE},
+ /* 1845 */ {I_VCMPNEQ_OQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+540, IF_AVX|IF_SANDYBRIDGE},
+ /* 1846 */ {I_VCMPNEQ_OQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+549, IF_AVX|IF_SANDYBRIDGE},
+ /* 1847 */ {I_VCMPGE_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+558, IF_AVX|IF_SANDYBRIDGE},
+ /* 1848 */ {I_VCMPGE_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+567, IF_AVX|IF_SANDYBRIDGE},
+ /* 1849 */ {I_VCMPGE_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+576, IF_AVX|IF_SANDYBRIDGE},
+ /* 1850 */ {I_VCMPGE_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+585, IF_AVX|IF_SANDYBRIDGE},
+ /* 1851 */ {I_VCMPGEPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+558, IF_AVX|IF_SANDYBRIDGE},
+ /* 1852 */ {I_VCMPGEPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+567, IF_AVX|IF_SANDYBRIDGE},
+ /* 1853 */ {I_VCMPGEPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+576, IF_AVX|IF_SANDYBRIDGE},
+ /* 1854 */ {I_VCMPGEPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+585, IF_AVX|IF_SANDYBRIDGE},
+ /* 1855 */ {I_VCMPGT_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+594, IF_AVX|IF_SANDYBRIDGE},
+ /* 1856 */ {I_VCMPGT_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+603, IF_AVX|IF_SANDYBRIDGE},
+ /* 1857 */ {I_VCMPGT_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+612, IF_AVX|IF_SANDYBRIDGE},
+ /* 1858 */ {I_VCMPGT_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+621, IF_AVX|IF_SANDYBRIDGE},
+ /* 1859 */ {I_VCMPGTPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+594, IF_AVX|IF_SANDYBRIDGE},
+ /* 1860 */ {I_VCMPGTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+603, IF_AVX|IF_SANDYBRIDGE},
+ /* 1861 */ {I_VCMPGTPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+612, IF_AVX|IF_SANDYBRIDGE},
+ /* 1862 */ {I_VCMPGTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+621, IF_AVX|IF_SANDYBRIDGE},
+ /* 1863 */ {I_VCMPTRUE_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+630, IF_AVX|IF_SANDYBRIDGE},
+ /* 1864 */ {I_VCMPTRUE_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+639, IF_AVX|IF_SANDYBRIDGE},
+ /* 1865 */ {I_VCMPTRUE_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+648, IF_AVX|IF_SANDYBRIDGE},
+ /* 1866 */ {I_VCMPTRUE_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+657, IF_AVX|IF_SANDYBRIDGE},
+ /* 1867 */ {I_VCMPTRUEPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+630, IF_AVX|IF_SANDYBRIDGE},
+ /* 1868 */ {I_VCMPTRUEPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+639, IF_AVX|IF_SANDYBRIDGE},
+ /* 1869 */ {I_VCMPTRUEPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+648, IF_AVX|IF_SANDYBRIDGE},
+ /* 1870 */ {I_VCMPTRUEPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+657, IF_AVX|IF_SANDYBRIDGE},
+ /* 1871 */ {I_VCMPEQ_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+54, IF_AVX|IF_SANDYBRIDGE},
+ /* 1872 */ {I_VCMPEQ_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+63, IF_AVX|IF_SANDYBRIDGE},
+ /* 1873 */ {I_VCMPEQ_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+72, IF_AVX|IF_SANDYBRIDGE},
+ /* 1874 */ {I_VCMPEQ_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+81, IF_AVX|IF_SANDYBRIDGE},
+ /* 1875 */ {I_VCMPLT_OQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+666, IF_AVX|IF_SANDYBRIDGE},
+ /* 1876 */ {I_VCMPLT_OQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+675, IF_AVX|IF_SANDYBRIDGE},
+ /* 1877 */ {I_VCMPLT_OQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+684, IF_AVX|IF_SANDYBRIDGE},
+ /* 1878 */ {I_VCMPLT_OQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+693, IF_AVX|IF_SANDYBRIDGE},
+ /* 1879 */ {I_VCMPLE_OQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+702, IF_AVX|IF_SANDYBRIDGE},
+ /* 1880 */ {I_VCMPLE_OQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+711, IF_AVX|IF_SANDYBRIDGE},
+ /* 1881 */ {I_VCMPLE_OQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+720, IF_AVX|IF_SANDYBRIDGE},
+ /* 1882 */ {I_VCMPLE_OQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+729, IF_AVX|IF_SANDYBRIDGE},
+ /* 1883 */ {I_VCMPUNORD_SPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+738, IF_AVX|IF_SANDYBRIDGE},
+ /* 1884 */ {I_VCMPUNORD_SPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+747, IF_AVX|IF_SANDYBRIDGE},
+ /* 1885 */ {I_VCMPUNORD_SPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+756, IF_AVX|IF_SANDYBRIDGE},
+ /* 1886 */ {I_VCMPUNORD_SPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+765, IF_AVX|IF_SANDYBRIDGE},
+ /* 1887 */ {I_VCMPNEQ_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+774, IF_AVX|IF_SANDYBRIDGE},
+ /* 1888 */ {I_VCMPNEQ_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+783, IF_AVX|IF_SANDYBRIDGE},
+ /* 1889 */ {I_VCMPNEQ_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+792, IF_AVX|IF_SANDYBRIDGE},
+ /* 1890 */ {I_VCMPNEQ_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+801, IF_AVX|IF_SANDYBRIDGE},
+ /* 1891 */ {I_VCMPNLT_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+810, IF_AVX|IF_SANDYBRIDGE},
+ /* 1892 */ {I_VCMPNLT_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+819, IF_AVX|IF_SANDYBRIDGE},
+ /* 1893 */ {I_VCMPNLT_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+828, IF_AVX|IF_SANDYBRIDGE},
+ /* 1894 */ {I_VCMPNLT_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+837, IF_AVX|IF_SANDYBRIDGE},
+ /* 1895 */ {I_VCMPNLE_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+846, IF_AVX|IF_SANDYBRIDGE},
+ /* 1896 */ {I_VCMPNLE_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+855, IF_AVX|IF_SANDYBRIDGE},
+ /* 1897 */ {I_VCMPNLE_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+864, IF_AVX|IF_SANDYBRIDGE},
+ /* 1898 */ {I_VCMPNLE_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+873, IF_AVX|IF_SANDYBRIDGE},
+ /* 1899 */ {I_VCMPORD_SPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+882, IF_AVX|IF_SANDYBRIDGE},
+ /* 1900 */ {I_VCMPORD_SPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+891, IF_AVX|IF_SANDYBRIDGE},
+ /* 1901 */ {I_VCMPORD_SPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+900, IF_AVX|IF_SANDYBRIDGE},
+ /* 1902 */ {I_VCMPORD_SPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+909, IF_AVX|IF_SANDYBRIDGE},
+ /* 1903 */ {I_VCMPEQ_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+918, IF_AVX|IF_SANDYBRIDGE},
+ /* 1904 */ {I_VCMPEQ_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+927, IF_AVX|IF_SANDYBRIDGE},
+ /* 1905 */ {I_VCMPEQ_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+936, IF_AVX|IF_SANDYBRIDGE},
+ /* 1906 */ {I_VCMPEQ_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+945, IF_AVX|IF_SANDYBRIDGE},
+ /* 1907 */ {I_VCMPNGE_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+954, IF_AVX|IF_SANDYBRIDGE},
+ /* 1908 */ {I_VCMPNGE_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+963, IF_AVX|IF_SANDYBRIDGE},
+ /* 1909 */ {I_VCMPNGE_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+972, IF_AVX|IF_SANDYBRIDGE},
+ /* 1910 */ {I_VCMPNGE_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+981, IF_AVX|IF_SANDYBRIDGE},
+ /* 1911 */ {I_VCMPNGT_UQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+990, IF_AVX|IF_SANDYBRIDGE},
+ /* 1912 */ {I_VCMPNGT_UQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+999, IF_AVX|IF_SANDYBRIDGE},
+ /* 1913 */ {I_VCMPNGT_UQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1008, IF_AVX|IF_SANDYBRIDGE},
+ /* 1914 */ {I_VCMPNGT_UQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1017, IF_AVX|IF_SANDYBRIDGE},
+ /* 1915 */ {I_VCMPFALSE_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1026, IF_AVX|IF_SANDYBRIDGE},
+ /* 1916 */ {I_VCMPFALSE_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1035, IF_AVX|IF_SANDYBRIDGE},
+ /* 1917 */ {I_VCMPFALSE_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1044, IF_AVX|IF_SANDYBRIDGE},
+ /* 1918 */ {I_VCMPFALSE_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1053, IF_AVX|IF_SANDYBRIDGE},
+ /* 1919 */ {I_VCMPNEQ_OSPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1062, IF_AVX|IF_SANDYBRIDGE},
+ /* 1920 */ {I_VCMPNEQ_OSPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1071, IF_AVX|IF_SANDYBRIDGE},
+ /* 1921 */ {I_VCMPNEQ_OSPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1080, IF_AVX|IF_SANDYBRIDGE},
+ /* 1922 */ {I_VCMPNEQ_OSPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1089, IF_AVX|IF_SANDYBRIDGE},
+ /* 1923 */ {I_VCMPGE_OQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1098, IF_AVX|IF_SANDYBRIDGE},
+ /* 1924 */ {I_VCMPGE_OQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1107, IF_AVX|IF_SANDYBRIDGE},
+ /* 1925 */ {I_VCMPGE_OQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1116, IF_AVX|IF_SANDYBRIDGE},
+ /* 1926 */ {I_VCMPGE_OQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1125, IF_AVX|IF_SANDYBRIDGE},
+ /* 1927 */ {I_VCMPGT_OQPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1134, IF_AVX|IF_SANDYBRIDGE},
+ /* 1928 */ {I_VCMPGT_OQPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1143, IF_AVX|IF_SANDYBRIDGE},
+ /* 1929 */ {I_VCMPGT_OQPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1152, IF_AVX|IF_SANDYBRIDGE},
+ /* 1930 */ {I_VCMPGT_OQPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1161, IF_AVX|IF_SANDYBRIDGE},
+ /* 1931 */ {I_VCMPTRUE_USPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1170, IF_AVX|IF_SANDYBRIDGE},
+ /* 1932 */ {I_VCMPTRUE_USPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1179, IF_AVX|IF_SANDYBRIDGE},
+ /* 1933 */ {I_VCMPTRUE_USPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1188, IF_AVX|IF_SANDYBRIDGE},
+ /* 1934 */ {I_VCMPTRUE_USPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1197, IF_AVX|IF_SANDYBRIDGE},
+ /* 1935 */ {I_VCMPPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+4506, IF_AVX|IF_SANDYBRIDGE},
+ /* 1936 */ {I_VCMPPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4514, IF_AVX|IF_SANDYBRIDGE},
+ /* 1937 */ {I_VCMPPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+4522, IF_AVX|IF_SANDYBRIDGE},
+ /* 1938 */ {I_VCMPPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4530, IF_AVX|IF_SANDYBRIDGE},
+ /* 1939 */ {I_VCMPEQ_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1206, IF_AVX|IF_SANDYBRIDGE},
+ /* 1940 */ {I_VCMPEQ_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1215, IF_AVX|IF_SANDYBRIDGE},
+ /* 1941 */ {I_VCMPEQ_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1224, IF_AVX|IF_SANDYBRIDGE},
+ /* 1942 */ {I_VCMPEQ_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1233, IF_AVX|IF_SANDYBRIDGE},
+ /* 1943 */ {I_VCMPEQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1242, IF_AVX|IF_SANDYBRIDGE},
+ /* 1944 */ {I_VCMPEQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1251, IF_AVX|IF_SANDYBRIDGE},
+ /* 1945 */ {I_VCMPEQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1260, IF_AVX|IF_SANDYBRIDGE},
+ /* 1946 */ {I_VCMPEQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1269, IF_AVX|IF_SANDYBRIDGE},
+ /* 1947 */ {I_VCMPLT_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1278, IF_AVX|IF_SANDYBRIDGE},
+ /* 1948 */ {I_VCMPLT_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1287, IF_AVX|IF_SANDYBRIDGE},
+ /* 1949 */ {I_VCMPLT_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1296, IF_AVX|IF_SANDYBRIDGE},
+ /* 1950 */ {I_VCMPLT_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1305, IF_AVX|IF_SANDYBRIDGE},
+ /* 1951 */ {I_VCMPLTPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1278, IF_AVX|IF_SANDYBRIDGE},
+ /* 1952 */ {I_VCMPLTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1287, IF_AVX|IF_SANDYBRIDGE},
+ /* 1953 */ {I_VCMPLTPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1296, IF_AVX|IF_SANDYBRIDGE},
+ /* 1954 */ {I_VCMPLTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1305, IF_AVX|IF_SANDYBRIDGE},
+ /* 1955 */ {I_VCMPLE_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1314, IF_AVX|IF_SANDYBRIDGE},
+ /* 1956 */ {I_VCMPLE_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1323, IF_AVX|IF_SANDYBRIDGE},
+ /* 1957 */ {I_VCMPLE_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1332, IF_AVX|IF_SANDYBRIDGE},
+ /* 1958 */ {I_VCMPLE_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1341, IF_AVX|IF_SANDYBRIDGE},
+ /* 1959 */ {I_VCMPLEPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1314, IF_AVX|IF_SANDYBRIDGE},
+ /* 1960 */ {I_VCMPLEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1323, IF_AVX|IF_SANDYBRIDGE},
+ /* 1961 */ {I_VCMPLEPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1332, IF_AVX|IF_SANDYBRIDGE},
+ /* 1962 */ {I_VCMPLEPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1341, IF_AVX|IF_SANDYBRIDGE},
+ /* 1963 */ {I_VCMPUNORD_QPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1350, IF_AVX|IF_SANDYBRIDGE},
+ /* 1964 */ {I_VCMPUNORD_QPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1359, IF_AVX|IF_SANDYBRIDGE},
+ /* 1965 */ {I_VCMPUNORD_QPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1368, IF_AVX|IF_SANDYBRIDGE},
+ /* 1966 */ {I_VCMPUNORD_QPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1377, IF_AVX|IF_SANDYBRIDGE},
+ /* 1967 */ {I_VCMPUNORDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1350, IF_AVX|IF_SANDYBRIDGE},
+ /* 1968 */ {I_VCMPUNORDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1359, IF_AVX|IF_SANDYBRIDGE},
+ /* 1969 */ {I_VCMPUNORDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1368, IF_AVX|IF_SANDYBRIDGE},
+ /* 1970 */ {I_VCMPUNORDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1377, IF_AVX|IF_SANDYBRIDGE},
+ /* 1971 */ {I_VCMPNEQ_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1386, IF_AVX|IF_SANDYBRIDGE},
+ /* 1972 */ {I_VCMPNEQ_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1395, IF_AVX|IF_SANDYBRIDGE},
+ /* 1973 */ {I_VCMPNEQ_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1404, IF_AVX|IF_SANDYBRIDGE},
+ /* 1974 */ {I_VCMPNEQ_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1413, IF_AVX|IF_SANDYBRIDGE},
+ /* 1975 */ {I_VCMPNEQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1386, IF_AVX|IF_SANDYBRIDGE},
+ /* 1976 */ {I_VCMPNEQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1395, IF_AVX|IF_SANDYBRIDGE},
+ /* 1977 */ {I_VCMPNEQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1404, IF_AVX|IF_SANDYBRIDGE},
+ /* 1978 */ {I_VCMPNEQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1413, IF_AVX|IF_SANDYBRIDGE},
+ /* 1979 */ {I_VCMPNLT_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1422, IF_AVX|IF_SANDYBRIDGE},
+ /* 1980 */ {I_VCMPNLT_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1431, IF_AVX|IF_SANDYBRIDGE},
+ /* 1981 */ {I_VCMPNLT_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1440, IF_AVX|IF_SANDYBRIDGE},
+ /* 1982 */ {I_VCMPNLT_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1449, IF_AVX|IF_SANDYBRIDGE},
+ /* 1983 */ {I_VCMPNLTPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1422, IF_AVX|IF_SANDYBRIDGE},
+ /* 1984 */ {I_VCMPNLTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1431, IF_AVX|IF_SANDYBRIDGE},
+ /* 1985 */ {I_VCMPNLTPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1440, IF_AVX|IF_SANDYBRIDGE},
+ /* 1986 */ {I_VCMPNLTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1449, IF_AVX|IF_SANDYBRIDGE},
+ /* 1987 */ {I_VCMPNLE_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1458, IF_AVX|IF_SANDYBRIDGE},
+ /* 1988 */ {I_VCMPNLE_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1467, IF_AVX|IF_SANDYBRIDGE},
+ /* 1989 */ {I_VCMPNLE_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1476, IF_AVX|IF_SANDYBRIDGE},
+ /* 1990 */ {I_VCMPNLE_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1485, IF_AVX|IF_SANDYBRIDGE},
+ /* 1991 */ {I_VCMPNLEPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1458, IF_AVX|IF_SANDYBRIDGE},
+ /* 1992 */ {I_VCMPNLEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1467, IF_AVX|IF_SANDYBRIDGE},
+ /* 1993 */ {I_VCMPNLEPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1476, IF_AVX|IF_SANDYBRIDGE},
+ /* 1994 */ {I_VCMPNLEPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1485, IF_AVX|IF_SANDYBRIDGE},
+ /* 1995 */ {I_VCMPORD_QPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1494, IF_AVX|IF_SANDYBRIDGE},
+ /* 1996 */ {I_VCMPORD_QPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1503, IF_AVX|IF_SANDYBRIDGE},
+ /* 1997 */ {I_VCMPORD_QPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1512, IF_AVX|IF_SANDYBRIDGE},
+ /* 1998 */ {I_VCMPORD_QPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1521, IF_AVX|IF_SANDYBRIDGE},
+ /* 1999 */ {I_VCMPORDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1494, IF_AVX|IF_SANDYBRIDGE},
+ /* 2000 */ {I_VCMPORDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1503, IF_AVX|IF_SANDYBRIDGE},
+ /* 2001 */ {I_VCMPORDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1512, IF_AVX|IF_SANDYBRIDGE},
+ /* 2002 */ {I_VCMPORDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1521, IF_AVX|IF_SANDYBRIDGE},
+ /* 2003 */ {I_VCMPEQ_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1530, IF_AVX|IF_SANDYBRIDGE},
+ /* 2004 */ {I_VCMPEQ_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1539, IF_AVX|IF_SANDYBRIDGE},
+ /* 2005 */ {I_VCMPEQ_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1548, IF_AVX|IF_SANDYBRIDGE},
+ /* 2006 */ {I_VCMPEQ_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1557, IF_AVX|IF_SANDYBRIDGE},
+ /* 2007 */ {I_VCMPNGE_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1566, IF_AVX|IF_SANDYBRIDGE},
+ /* 2008 */ {I_VCMPNGE_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1575, IF_AVX|IF_SANDYBRIDGE},
+ /* 2009 */ {I_VCMPNGE_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1584, IF_AVX|IF_SANDYBRIDGE},
+ /* 2010 */ {I_VCMPNGE_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1593, IF_AVX|IF_SANDYBRIDGE},
+ /* 2011 */ {I_VCMPNGEPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1566, IF_AVX|IF_SANDYBRIDGE},
+ /* 2012 */ {I_VCMPNGEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1575, IF_AVX|IF_SANDYBRIDGE},
+ /* 2013 */ {I_VCMPNGEPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1584, IF_AVX|IF_SANDYBRIDGE},
+ /* 2014 */ {I_VCMPNGEPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1593, IF_AVX|IF_SANDYBRIDGE},
+ /* 2015 */ {I_VCMPNGT_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1602, IF_AVX|IF_SANDYBRIDGE},
+ /* 2016 */ {I_VCMPNGT_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1611, IF_AVX|IF_SANDYBRIDGE},
+ /* 2017 */ {I_VCMPNGT_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1620, IF_AVX|IF_SANDYBRIDGE},
+ /* 2018 */ {I_VCMPNGT_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1629, IF_AVX|IF_SANDYBRIDGE},
+ /* 2019 */ {I_VCMPNGTPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1602, IF_AVX|IF_SANDYBRIDGE},
+ /* 2020 */ {I_VCMPNGTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1611, IF_AVX|IF_SANDYBRIDGE},
+ /* 2021 */ {I_VCMPNGTPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1620, IF_AVX|IF_SANDYBRIDGE},
+ /* 2022 */ {I_VCMPNGTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1629, IF_AVX|IF_SANDYBRIDGE},
+ /* 2023 */ {I_VCMPFALSE_OQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1638, IF_AVX|IF_SANDYBRIDGE},
+ /* 2024 */ {I_VCMPFALSE_OQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1647, IF_AVX|IF_SANDYBRIDGE},
+ /* 2025 */ {I_VCMPFALSE_OQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1656, IF_AVX|IF_SANDYBRIDGE},
+ /* 2026 */ {I_VCMPFALSE_OQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1665, IF_AVX|IF_SANDYBRIDGE},
+ /* 2027 */ {I_VCMPFALSEPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1638, IF_AVX|IF_SANDYBRIDGE},
+ /* 2028 */ {I_VCMPFALSEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1647, IF_AVX|IF_SANDYBRIDGE},
+ /* 2029 */ {I_VCMPFALSEPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1656, IF_AVX|IF_SANDYBRIDGE},
+ /* 2030 */ {I_VCMPFALSEPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1665, IF_AVX|IF_SANDYBRIDGE},
+ /* 2031 */ {I_VCMPNEQ_OQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1674, IF_AVX|IF_SANDYBRIDGE},
+ /* 2032 */ {I_VCMPNEQ_OQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1683, IF_AVX|IF_SANDYBRIDGE},
+ /* 2033 */ {I_VCMPNEQ_OQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1692, IF_AVX|IF_SANDYBRIDGE},
+ /* 2034 */ {I_VCMPNEQ_OQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1701, IF_AVX|IF_SANDYBRIDGE},
+ /* 2035 */ {I_VCMPGE_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1710, IF_AVX|IF_SANDYBRIDGE},
+ /* 2036 */ {I_VCMPGE_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1719, IF_AVX|IF_SANDYBRIDGE},
+ /* 2037 */ {I_VCMPGE_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1728, IF_AVX|IF_SANDYBRIDGE},
+ /* 2038 */ {I_VCMPGE_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1737, IF_AVX|IF_SANDYBRIDGE},
+ /* 2039 */ {I_VCMPGEPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1710, IF_AVX|IF_SANDYBRIDGE},
+ /* 2040 */ {I_VCMPGEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1719, IF_AVX|IF_SANDYBRIDGE},
+ /* 2041 */ {I_VCMPGEPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1728, IF_AVX|IF_SANDYBRIDGE},
+ /* 2042 */ {I_VCMPGEPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1737, IF_AVX|IF_SANDYBRIDGE},
+ /* 2043 */ {I_VCMPGT_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1746, IF_AVX|IF_SANDYBRIDGE},
+ /* 2044 */ {I_VCMPGT_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1755, IF_AVX|IF_SANDYBRIDGE},
+ /* 2045 */ {I_VCMPGT_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1764, IF_AVX|IF_SANDYBRIDGE},
+ /* 2046 */ {I_VCMPGT_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1773, IF_AVX|IF_SANDYBRIDGE},
+ /* 2047 */ {I_VCMPGTPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1746, IF_AVX|IF_SANDYBRIDGE},
+ /* 2048 */ {I_VCMPGTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1755, IF_AVX|IF_SANDYBRIDGE},
+ /* 2049 */ {I_VCMPGTPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1764, IF_AVX|IF_SANDYBRIDGE},
+ /* 2050 */ {I_VCMPGTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1773, IF_AVX|IF_SANDYBRIDGE},
+ /* 2051 */ {I_VCMPTRUE_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1782, IF_AVX|IF_SANDYBRIDGE},
+ /* 2052 */ {I_VCMPTRUE_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1791, IF_AVX|IF_SANDYBRIDGE},
+ /* 2053 */ {I_VCMPTRUE_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1800, IF_AVX|IF_SANDYBRIDGE},
+ /* 2054 */ {I_VCMPTRUE_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1809, IF_AVX|IF_SANDYBRIDGE},
+ /* 2055 */ {I_VCMPTRUEPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1782, IF_AVX|IF_SANDYBRIDGE},
+ /* 2056 */ {I_VCMPTRUEPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1791, IF_AVX|IF_SANDYBRIDGE},
+ /* 2057 */ {I_VCMPTRUEPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1800, IF_AVX|IF_SANDYBRIDGE},
+ /* 2058 */ {I_VCMPTRUEPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1809, IF_AVX|IF_SANDYBRIDGE},
+ /* 2059 */ {I_VCMPEQ_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1206, IF_AVX|IF_SANDYBRIDGE},
+ /* 2060 */ {I_VCMPEQ_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1215, IF_AVX|IF_SANDYBRIDGE},
+ /* 2061 */ {I_VCMPEQ_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1224, IF_AVX|IF_SANDYBRIDGE},
+ /* 2062 */ {I_VCMPEQ_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1233, IF_AVX|IF_SANDYBRIDGE},
+ /* 2063 */ {I_VCMPLT_OQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1818, IF_AVX|IF_SANDYBRIDGE},
+ /* 2064 */ {I_VCMPLT_OQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1827, IF_AVX|IF_SANDYBRIDGE},
+ /* 2065 */ {I_VCMPLT_OQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1836, IF_AVX|IF_SANDYBRIDGE},
+ /* 2066 */ {I_VCMPLT_OQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1845, IF_AVX|IF_SANDYBRIDGE},
+ /* 2067 */ {I_VCMPLE_OQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1854, IF_AVX|IF_SANDYBRIDGE},
+ /* 2068 */ {I_VCMPLE_OQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1863, IF_AVX|IF_SANDYBRIDGE},
+ /* 2069 */ {I_VCMPLE_OQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1872, IF_AVX|IF_SANDYBRIDGE},
+ /* 2070 */ {I_VCMPLE_OQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1881, IF_AVX|IF_SANDYBRIDGE},
+ /* 2071 */ {I_VCMPUNORD_SPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1890, IF_AVX|IF_SANDYBRIDGE},
+ /* 2072 */ {I_VCMPUNORD_SPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1899, IF_AVX|IF_SANDYBRIDGE},
+ /* 2073 */ {I_VCMPUNORD_SPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1908, IF_AVX|IF_SANDYBRIDGE},
+ /* 2074 */ {I_VCMPUNORD_SPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1917, IF_AVX|IF_SANDYBRIDGE},
+ /* 2075 */ {I_VCMPNEQ_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1926, IF_AVX|IF_SANDYBRIDGE},
+ /* 2076 */ {I_VCMPNEQ_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1935, IF_AVX|IF_SANDYBRIDGE},
+ /* 2077 */ {I_VCMPNEQ_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1944, IF_AVX|IF_SANDYBRIDGE},
+ /* 2078 */ {I_VCMPNEQ_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1953, IF_AVX|IF_SANDYBRIDGE},
+ /* 2079 */ {I_VCMPNLT_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1962, IF_AVX|IF_SANDYBRIDGE},
+ /* 2080 */ {I_VCMPNLT_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+1971, IF_AVX|IF_SANDYBRIDGE},
+ /* 2081 */ {I_VCMPNLT_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+1980, IF_AVX|IF_SANDYBRIDGE},
+ /* 2082 */ {I_VCMPNLT_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+1989, IF_AVX|IF_SANDYBRIDGE},
+ /* 2083 */ {I_VCMPNLE_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+1998, IF_AVX|IF_SANDYBRIDGE},
+ /* 2084 */ {I_VCMPNLE_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2007, IF_AVX|IF_SANDYBRIDGE},
+ /* 2085 */ {I_VCMPNLE_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2016, IF_AVX|IF_SANDYBRIDGE},
+ /* 2086 */ {I_VCMPNLE_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2025, IF_AVX|IF_SANDYBRIDGE},
+ /* 2087 */ {I_VCMPORD_SPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2034, IF_AVX|IF_SANDYBRIDGE},
+ /* 2088 */ {I_VCMPORD_SPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2043, IF_AVX|IF_SANDYBRIDGE},
+ /* 2089 */ {I_VCMPORD_SPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2052, IF_AVX|IF_SANDYBRIDGE},
+ /* 2090 */ {I_VCMPORD_SPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2061, IF_AVX|IF_SANDYBRIDGE},
+ /* 2091 */ {I_VCMPEQ_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2070, IF_AVX|IF_SANDYBRIDGE},
+ /* 2092 */ {I_VCMPEQ_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2079, IF_AVX|IF_SANDYBRIDGE},
+ /* 2093 */ {I_VCMPEQ_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2088, IF_AVX|IF_SANDYBRIDGE},
+ /* 2094 */ {I_VCMPEQ_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2097, IF_AVX|IF_SANDYBRIDGE},
+ /* 2095 */ {I_VCMPNGE_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2106, IF_AVX|IF_SANDYBRIDGE},
+ /* 2096 */ {I_VCMPNGE_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2115, IF_AVX|IF_SANDYBRIDGE},
+ /* 2097 */ {I_VCMPNGE_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2124, IF_AVX|IF_SANDYBRIDGE},
+ /* 2098 */ {I_VCMPNGE_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2133, IF_AVX|IF_SANDYBRIDGE},
+ /* 2099 */ {I_VCMPNGT_UQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2142, IF_AVX|IF_SANDYBRIDGE},
+ /* 2100 */ {I_VCMPNGT_UQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2151, IF_AVX|IF_SANDYBRIDGE},
+ /* 2101 */ {I_VCMPNGT_UQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2160, IF_AVX|IF_SANDYBRIDGE},
+ /* 2102 */ {I_VCMPNGT_UQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2169, IF_AVX|IF_SANDYBRIDGE},
+ /* 2103 */ {I_VCMPFALSE_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2178, IF_AVX|IF_SANDYBRIDGE},
+ /* 2104 */ {I_VCMPFALSE_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2187, IF_AVX|IF_SANDYBRIDGE},
+ /* 2105 */ {I_VCMPFALSE_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2196, IF_AVX|IF_SANDYBRIDGE},
+ /* 2106 */ {I_VCMPFALSE_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2205, IF_AVX|IF_SANDYBRIDGE},
+ /* 2107 */ {I_VCMPNEQ_OSPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2214, IF_AVX|IF_SANDYBRIDGE},
+ /* 2108 */ {I_VCMPNEQ_OSPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2223, IF_AVX|IF_SANDYBRIDGE},
+ /* 2109 */ {I_VCMPNEQ_OSPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2232, IF_AVX|IF_SANDYBRIDGE},
+ /* 2110 */ {I_VCMPNEQ_OSPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2241, IF_AVX|IF_SANDYBRIDGE},
+ /* 2111 */ {I_VCMPGE_OQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2250, IF_AVX|IF_SANDYBRIDGE},
+ /* 2112 */ {I_VCMPGE_OQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2259, IF_AVX|IF_SANDYBRIDGE},
+ /* 2113 */ {I_VCMPGE_OQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2268, IF_AVX|IF_SANDYBRIDGE},
+ /* 2114 */ {I_VCMPGE_OQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2277, IF_AVX|IF_SANDYBRIDGE},
+ /* 2115 */ {I_VCMPGT_OQPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2286, IF_AVX|IF_SANDYBRIDGE},
+ /* 2116 */ {I_VCMPGT_OQPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2295, IF_AVX|IF_SANDYBRIDGE},
+ /* 2117 */ {I_VCMPGT_OQPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2304, IF_AVX|IF_SANDYBRIDGE},
+ /* 2118 */ {I_VCMPGT_OQPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2313, IF_AVX|IF_SANDYBRIDGE},
+ /* 2119 */ {I_VCMPTRUE_USPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+2322, IF_AVX|IF_SANDYBRIDGE},
+ /* 2120 */ {I_VCMPTRUE_USPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+2331, IF_AVX|IF_SANDYBRIDGE},
+ /* 2121 */ {I_VCMPTRUE_USPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+2340, IF_AVX|IF_SANDYBRIDGE},
+ /* 2122 */ {I_VCMPTRUE_USPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+2349, IF_AVX|IF_SANDYBRIDGE},
+ /* 2123 */ {I_VCMPPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+4538, IF_AVX|IF_SANDYBRIDGE},
+ /* 2124 */ {I_VCMPPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4546, IF_AVX|IF_SANDYBRIDGE},
+ /* 2125 */ {I_VCMPPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+4554, IF_AVX|IF_SANDYBRIDGE},
+ /* 2126 */ {I_VCMPPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4562, IF_AVX|IF_SANDYBRIDGE},
+ /* 2127 */ {I_VCMPEQ_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2358, IF_AVX|IF_SANDYBRIDGE},
+ /* 2128 */ {I_VCMPEQ_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2367, IF_AVX|IF_SANDYBRIDGE},
+ /* 2129 */ {I_VCMPEQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2376, IF_AVX|IF_SANDYBRIDGE},
+ /* 2130 */ {I_VCMPEQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2385, IF_AVX|IF_SANDYBRIDGE},
+ /* 2131 */ {I_VCMPLT_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2394, IF_AVX|IF_SANDYBRIDGE},
+ /* 2132 */ {I_VCMPLT_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2403, IF_AVX|IF_SANDYBRIDGE},
+ /* 2133 */ {I_VCMPLTSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2394, IF_AVX|IF_SANDYBRIDGE},
+ /* 2134 */ {I_VCMPLTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2403, IF_AVX|IF_SANDYBRIDGE},
+ /* 2135 */ {I_VCMPLE_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2412, IF_AVX|IF_SANDYBRIDGE},
+ /* 2136 */ {I_VCMPLE_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2421, IF_AVX|IF_SANDYBRIDGE},
+ /* 2137 */ {I_VCMPLESD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2412, IF_AVX|IF_SANDYBRIDGE},
+ /* 2138 */ {I_VCMPLESD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2421, IF_AVX|IF_SANDYBRIDGE},
+ /* 2139 */ {I_VCMPUNORD_QSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2430, IF_AVX|IF_SANDYBRIDGE},
+ /* 2140 */ {I_VCMPUNORD_QSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2439, IF_AVX|IF_SANDYBRIDGE},
+ /* 2141 */ {I_VCMPUNORDSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2430, IF_AVX|IF_SANDYBRIDGE},
+ /* 2142 */ {I_VCMPUNORDSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2439, IF_AVX|IF_SANDYBRIDGE},
+ /* 2143 */ {I_VCMPNEQ_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2448, IF_AVX|IF_SANDYBRIDGE},
+ /* 2144 */ {I_VCMPNEQ_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2457, IF_AVX|IF_SANDYBRIDGE},
+ /* 2145 */ {I_VCMPNEQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2448, IF_AVX|IF_SANDYBRIDGE},
+ /* 2146 */ {I_VCMPNEQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2457, IF_AVX|IF_SANDYBRIDGE},
+ /* 2147 */ {I_VCMPNLT_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2466, IF_AVX|IF_SANDYBRIDGE},
+ /* 2148 */ {I_VCMPNLT_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2475, IF_AVX|IF_SANDYBRIDGE},
+ /* 2149 */ {I_VCMPNLTSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2466, IF_AVX|IF_SANDYBRIDGE},
+ /* 2150 */ {I_VCMPNLTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2475, IF_AVX|IF_SANDYBRIDGE},
+ /* 2151 */ {I_VCMPNLE_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2484, IF_AVX|IF_SANDYBRIDGE},
+ /* 2152 */ {I_VCMPNLE_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2493, IF_AVX|IF_SANDYBRIDGE},
+ /* 2153 */ {I_VCMPNLESD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2484, IF_AVX|IF_SANDYBRIDGE},
+ /* 2154 */ {I_VCMPNLESD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2493, IF_AVX|IF_SANDYBRIDGE},
+ /* 2155 */ {I_VCMPORD_QSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2502, IF_AVX|IF_SANDYBRIDGE},
+ /* 2156 */ {I_VCMPORD_QSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2511, IF_AVX|IF_SANDYBRIDGE},
+ /* 2157 */ {I_VCMPORDSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2502, IF_AVX|IF_SANDYBRIDGE},
+ /* 2158 */ {I_VCMPORDSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2511, IF_AVX|IF_SANDYBRIDGE},
+ /* 2159 */ {I_VCMPEQ_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2520, IF_AVX|IF_SANDYBRIDGE},
+ /* 2160 */ {I_VCMPEQ_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2529, IF_AVX|IF_SANDYBRIDGE},
+ /* 2161 */ {I_VCMPNGE_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2538, IF_AVX|IF_SANDYBRIDGE},
+ /* 2162 */ {I_VCMPNGE_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2547, IF_AVX|IF_SANDYBRIDGE},
+ /* 2163 */ {I_VCMPNGESD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2538, IF_AVX|IF_SANDYBRIDGE},
+ /* 2164 */ {I_VCMPNGESD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2547, IF_AVX|IF_SANDYBRIDGE},
+ /* 2165 */ {I_VCMPNGT_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2556, IF_AVX|IF_SANDYBRIDGE},
+ /* 2166 */ {I_VCMPNGT_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2565, IF_AVX|IF_SANDYBRIDGE},
+ /* 2167 */ {I_VCMPNGTSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2556, IF_AVX|IF_SANDYBRIDGE},
+ /* 2168 */ {I_VCMPNGTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2565, IF_AVX|IF_SANDYBRIDGE},
+ /* 2169 */ {I_VCMPFALSE_OQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2574, IF_AVX|IF_SANDYBRIDGE},
+ /* 2170 */ {I_VCMPFALSE_OQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2583, IF_AVX|IF_SANDYBRIDGE},
+ /* 2171 */ {I_VCMPFALSESD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2574, IF_AVX|IF_SANDYBRIDGE},
+ /* 2172 */ {I_VCMPFALSESD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2583, IF_AVX|IF_SANDYBRIDGE},
+ /* 2173 */ {I_VCMPNEQ_OQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2592, IF_AVX|IF_SANDYBRIDGE},
+ /* 2174 */ {I_VCMPNEQ_OQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2601, IF_AVX|IF_SANDYBRIDGE},
+ /* 2175 */ {I_VCMPGE_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2610, IF_AVX|IF_SANDYBRIDGE},
+ /* 2176 */ {I_VCMPGE_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2619, IF_AVX|IF_SANDYBRIDGE},
+ /* 2177 */ {I_VCMPGESD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2610, IF_AVX|IF_SANDYBRIDGE},
+ /* 2178 */ {I_VCMPGESD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2619, IF_AVX|IF_SANDYBRIDGE},
+ /* 2179 */ {I_VCMPGT_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2628, IF_AVX|IF_SANDYBRIDGE},
+ /* 2180 */ {I_VCMPGT_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2637, IF_AVX|IF_SANDYBRIDGE},
+ /* 2181 */ {I_VCMPGTSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2628, IF_AVX|IF_SANDYBRIDGE},
+ /* 2182 */ {I_VCMPGTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2637, IF_AVX|IF_SANDYBRIDGE},
+ /* 2183 */ {I_VCMPTRUE_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2646, IF_AVX|IF_SANDYBRIDGE},
+ /* 2184 */ {I_VCMPTRUE_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2655, IF_AVX|IF_SANDYBRIDGE},
+ /* 2185 */ {I_VCMPTRUESD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2646, IF_AVX|IF_SANDYBRIDGE},
+ /* 2186 */ {I_VCMPTRUESD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2655, IF_AVX|IF_SANDYBRIDGE},
+ /* 2187 */ {I_VCMPEQ_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2358, IF_AVX|IF_SANDYBRIDGE},
+ /* 2188 */ {I_VCMPEQ_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2367, IF_AVX|IF_SANDYBRIDGE},
+ /* 2189 */ {I_VCMPLT_OQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2664, IF_AVX|IF_SANDYBRIDGE},
+ /* 2190 */ {I_VCMPLT_OQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2673, IF_AVX|IF_SANDYBRIDGE},
+ /* 2191 */ {I_VCMPLE_OQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2682, IF_AVX|IF_SANDYBRIDGE},
+ /* 2192 */ {I_VCMPLE_OQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2691, IF_AVX|IF_SANDYBRIDGE},
+ /* 2193 */ {I_VCMPUNORD_SSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2700, IF_AVX|IF_SANDYBRIDGE},
+ /* 2194 */ {I_VCMPUNORD_SSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2709, IF_AVX|IF_SANDYBRIDGE},
+ /* 2195 */ {I_VCMPNEQ_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2718, IF_AVX|IF_SANDYBRIDGE},
+ /* 2196 */ {I_VCMPNEQ_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2727, IF_AVX|IF_SANDYBRIDGE},
+ /* 2197 */ {I_VCMPNLT_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2736, IF_AVX|IF_SANDYBRIDGE},
+ /* 2198 */ {I_VCMPNLT_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2745, IF_AVX|IF_SANDYBRIDGE},
+ /* 2199 */ {I_VCMPNLE_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2754, IF_AVX|IF_SANDYBRIDGE},
+ /* 2200 */ {I_VCMPNLE_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2763, IF_AVX|IF_SANDYBRIDGE},
+ /* 2201 */ {I_VCMPORD_SSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2772, IF_AVX|IF_SANDYBRIDGE},
+ /* 2202 */ {I_VCMPORD_SSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2781, IF_AVX|IF_SANDYBRIDGE},
+ /* 2203 */ {I_VCMPEQ_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2790, IF_AVX|IF_SANDYBRIDGE},
+ /* 2204 */ {I_VCMPEQ_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2799, IF_AVX|IF_SANDYBRIDGE},
+ /* 2205 */ {I_VCMPNGE_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2808, IF_AVX|IF_SANDYBRIDGE},
+ /* 2206 */ {I_VCMPNGE_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2817, IF_AVX|IF_SANDYBRIDGE},
+ /* 2207 */ {I_VCMPNGT_UQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2826, IF_AVX|IF_SANDYBRIDGE},
+ /* 2208 */ {I_VCMPNGT_UQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2835, IF_AVX|IF_SANDYBRIDGE},
+ /* 2209 */ {I_VCMPFALSE_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2844, IF_AVX|IF_SANDYBRIDGE},
+ /* 2210 */ {I_VCMPFALSE_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2853, IF_AVX|IF_SANDYBRIDGE},
+ /* 2211 */ {I_VCMPNEQ_OSSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2862, IF_AVX|IF_SANDYBRIDGE},
+ /* 2212 */ {I_VCMPNEQ_OSSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2871, IF_AVX|IF_SANDYBRIDGE},
+ /* 2213 */ {I_VCMPGE_OQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2880, IF_AVX|IF_SANDYBRIDGE},
+ /* 2214 */ {I_VCMPGE_OQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2889, IF_AVX|IF_SANDYBRIDGE},
+ /* 2215 */ {I_VCMPGT_OQSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2898, IF_AVX|IF_SANDYBRIDGE},
+ /* 2216 */ {I_VCMPGT_OQSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2907, IF_AVX|IF_SANDYBRIDGE},
+ /* 2217 */ {I_VCMPTRUE_USSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2916, IF_AVX|IF_SANDYBRIDGE},
+ /* 2218 */ {I_VCMPTRUE_USSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2925, IF_AVX|IF_SANDYBRIDGE},
+ /* 2219 */ {I_VCMPSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, nasm_bytecodes+4570, IF_AVX|IF_SANDYBRIDGE},
+ /* 2220 */ {I_VCMPSD, 3, {XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4578, IF_AVX|IF_SANDYBRIDGE},
+ /* 2221 */ {I_VCMPEQ_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2934, IF_AVX|IF_SANDYBRIDGE},
+ /* 2222 */ {I_VCMPEQ_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2943, IF_AVX|IF_SANDYBRIDGE},
+ /* 2223 */ {I_VCMPEQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2952, IF_AVX|IF_SANDYBRIDGE},
+ /* 2224 */ {I_VCMPEQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2961, IF_AVX|IF_SANDYBRIDGE},
+ /* 2225 */ {I_VCMPLT_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2970, IF_AVX|IF_SANDYBRIDGE},
+ /* 2226 */ {I_VCMPLT_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2979, IF_AVX|IF_SANDYBRIDGE},
+ /* 2227 */ {I_VCMPLTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2970, IF_AVX|IF_SANDYBRIDGE},
+ /* 2228 */ {I_VCMPLTSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2979, IF_AVX|IF_SANDYBRIDGE},
+ /* 2229 */ {I_VCMPLE_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2988, IF_AVX|IF_SANDYBRIDGE},
+ /* 2230 */ {I_VCMPLE_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2997, IF_AVX|IF_SANDYBRIDGE},
+ /* 2231 */ {I_VCMPLESS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2988, IF_AVX|IF_SANDYBRIDGE},
+ /* 2232 */ {I_VCMPLESS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2997, IF_AVX|IF_SANDYBRIDGE},
+ /* 2233 */ {I_VCMPUNORD_QSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3006, IF_AVX|IF_SANDYBRIDGE},
+ /* 2234 */ {I_VCMPUNORD_QSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3015, IF_AVX|IF_SANDYBRIDGE},
+ /* 2235 */ {I_VCMPUNORDSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3006, IF_AVX|IF_SANDYBRIDGE},
+ /* 2236 */ {I_VCMPUNORDSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3015, IF_AVX|IF_SANDYBRIDGE},
+ /* 2237 */ {I_VCMPNEQ_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3024, IF_AVX|IF_SANDYBRIDGE},
+ /* 2238 */ {I_VCMPNEQ_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3033, IF_AVX|IF_SANDYBRIDGE},
+ /* 2239 */ {I_VCMPNEQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3024, IF_AVX|IF_SANDYBRIDGE},
+ /* 2240 */ {I_VCMPNEQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3033, IF_AVX|IF_SANDYBRIDGE},
+ /* 2241 */ {I_VCMPNLT_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3042, IF_AVX|IF_SANDYBRIDGE},
+ /* 2242 */ {I_VCMPNLT_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3051, IF_AVX|IF_SANDYBRIDGE},
+ /* 2243 */ {I_VCMPNLTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3042, IF_AVX|IF_SANDYBRIDGE},
+ /* 2244 */ {I_VCMPNLTSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3051, IF_AVX|IF_SANDYBRIDGE},
+ /* 2245 */ {I_VCMPNLE_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3060, IF_AVX|IF_SANDYBRIDGE},
+ /* 2246 */ {I_VCMPNLE_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3069, IF_AVX|IF_SANDYBRIDGE},
+ /* 2247 */ {I_VCMPNLESS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3060, IF_AVX|IF_SANDYBRIDGE},
+ /* 2248 */ {I_VCMPNLESS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3069, IF_AVX|IF_SANDYBRIDGE},
+ /* 2249 */ {I_VCMPORD_QSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3078, IF_AVX|IF_SANDYBRIDGE},
+ /* 2250 */ {I_VCMPORD_QSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3087, IF_AVX|IF_SANDYBRIDGE},
+ /* 2251 */ {I_VCMPORDSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3078, IF_AVX|IF_SANDYBRIDGE},
+ /* 2252 */ {I_VCMPORDSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3087, IF_AVX|IF_SANDYBRIDGE},
+ /* 2253 */ {I_VCMPEQ_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3096, IF_AVX|IF_SANDYBRIDGE},
+ /* 2254 */ {I_VCMPEQ_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3105, IF_AVX|IF_SANDYBRIDGE},
+ /* 2255 */ {I_VCMPNGE_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3114, IF_AVX|IF_SANDYBRIDGE},
+ /* 2256 */ {I_VCMPNGE_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3123, IF_AVX|IF_SANDYBRIDGE},
+ /* 2257 */ {I_VCMPNGESS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3114, IF_AVX|IF_SANDYBRIDGE},
+ /* 2258 */ {I_VCMPNGESS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3123, IF_AVX|IF_SANDYBRIDGE},
+ /* 2259 */ {I_VCMPNGT_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3132, IF_AVX|IF_SANDYBRIDGE},
+ /* 2260 */ {I_VCMPNGT_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3141, IF_AVX|IF_SANDYBRIDGE},
+ /* 2261 */ {I_VCMPNGTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3132, IF_AVX|IF_SANDYBRIDGE},
+ /* 2262 */ {I_VCMPNGTSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3141, IF_AVX|IF_SANDYBRIDGE},
+ /* 2263 */ {I_VCMPFALSE_OQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3150, IF_AVX|IF_SANDYBRIDGE},
+ /* 2264 */ {I_VCMPFALSE_OQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3159, IF_AVX|IF_SANDYBRIDGE},
+ /* 2265 */ {I_VCMPFALSESS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3150, IF_AVX|IF_SANDYBRIDGE},
+ /* 2266 */ {I_VCMPFALSESS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3159, IF_AVX|IF_SANDYBRIDGE},
+ /* 2267 */ {I_VCMPNEQ_OQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3168, IF_AVX|IF_SANDYBRIDGE},
+ /* 2268 */ {I_VCMPNEQ_OQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3177, IF_AVX|IF_SANDYBRIDGE},
+ /* 2269 */ {I_VCMPGE_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3186, IF_AVX|IF_SANDYBRIDGE},
+ /* 2270 */ {I_VCMPGE_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3195, IF_AVX|IF_SANDYBRIDGE},
+ /* 2271 */ {I_VCMPGESS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3186, IF_AVX|IF_SANDYBRIDGE},
+ /* 2272 */ {I_VCMPGESS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3195, IF_AVX|IF_SANDYBRIDGE},
+ /* 2273 */ {I_VCMPGT_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3204, IF_AVX|IF_SANDYBRIDGE},
+ /* 2274 */ {I_VCMPGT_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3213, IF_AVX|IF_SANDYBRIDGE},
+ /* 2275 */ {I_VCMPGTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3204, IF_AVX|IF_SANDYBRIDGE},
+ /* 2276 */ {I_VCMPGTSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3213, IF_AVX|IF_SANDYBRIDGE},
+ /* 2277 */ {I_VCMPTRUE_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3222, IF_AVX|IF_SANDYBRIDGE},
+ /* 2278 */ {I_VCMPTRUE_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3231, IF_AVX|IF_SANDYBRIDGE},
+ /* 2279 */ {I_VCMPTRUESS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3222, IF_AVX|IF_SANDYBRIDGE},
+ /* 2280 */ {I_VCMPTRUESS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3231, IF_AVX|IF_SANDYBRIDGE},
+ /* 2281 */ {I_VCMPEQ_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+2934, IF_AVX|IF_SANDYBRIDGE},
+ /* 2282 */ {I_VCMPEQ_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+2943, IF_AVX|IF_SANDYBRIDGE},
+ /* 2283 */ {I_VCMPLT_OQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3240, IF_AVX|IF_SANDYBRIDGE},
+ /* 2284 */ {I_VCMPLT_OQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3249, IF_AVX|IF_SANDYBRIDGE},
+ /* 2285 */ {I_VCMPLE_OQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3258, IF_AVX|IF_SANDYBRIDGE},
+ /* 2286 */ {I_VCMPLE_OQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3267, IF_AVX|IF_SANDYBRIDGE},
+ /* 2287 */ {I_VCMPUNORD_SSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3276, IF_AVX|IF_SANDYBRIDGE},
+ /* 2288 */ {I_VCMPUNORD_SSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3285, IF_AVX|IF_SANDYBRIDGE},
+ /* 2289 */ {I_VCMPNEQ_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3294, IF_AVX|IF_SANDYBRIDGE},
+ /* 2290 */ {I_VCMPNEQ_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3303, IF_AVX|IF_SANDYBRIDGE},
+ /* 2291 */ {I_VCMPNLT_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3312, IF_AVX|IF_SANDYBRIDGE},
+ /* 2292 */ {I_VCMPNLT_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3321, IF_AVX|IF_SANDYBRIDGE},
+ /* 2293 */ {I_VCMPNLE_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3330, IF_AVX|IF_SANDYBRIDGE},
+ /* 2294 */ {I_VCMPNLE_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3339, IF_AVX|IF_SANDYBRIDGE},
+ /* 2295 */ {I_VCMPORD_SSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3348, IF_AVX|IF_SANDYBRIDGE},
+ /* 2296 */ {I_VCMPORD_SSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3357, IF_AVX|IF_SANDYBRIDGE},
+ /* 2297 */ {I_VCMPEQ_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3366, IF_AVX|IF_SANDYBRIDGE},
+ /* 2298 */ {I_VCMPEQ_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3375, IF_AVX|IF_SANDYBRIDGE},
+ /* 2299 */ {I_VCMPNGE_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3384, IF_AVX|IF_SANDYBRIDGE},
+ /* 2300 */ {I_VCMPNGE_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3393, IF_AVX|IF_SANDYBRIDGE},
+ /* 2301 */ {I_VCMPNGT_UQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3402, IF_AVX|IF_SANDYBRIDGE},
+ /* 2302 */ {I_VCMPNGT_UQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3411, IF_AVX|IF_SANDYBRIDGE},
+ /* 2303 */ {I_VCMPFALSE_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3420, IF_AVX|IF_SANDYBRIDGE},
+ /* 2304 */ {I_VCMPFALSE_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3429, IF_AVX|IF_SANDYBRIDGE},
+ /* 2305 */ {I_VCMPNEQ_OSSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3438, IF_AVX|IF_SANDYBRIDGE},
+ /* 2306 */ {I_VCMPNEQ_OSSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3447, IF_AVX|IF_SANDYBRIDGE},
+ /* 2307 */ {I_VCMPGE_OQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3456, IF_AVX|IF_SANDYBRIDGE},
+ /* 2308 */ {I_VCMPGE_OQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3465, IF_AVX|IF_SANDYBRIDGE},
+ /* 2309 */ {I_VCMPGT_OQSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3474, IF_AVX|IF_SANDYBRIDGE},
+ /* 2310 */ {I_VCMPGT_OQSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3483, IF_AVX|IF_SANDYBRIDGE},
+ /* 2311 */ {I_VCMPTRUE_USSS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+3492, IF_AVX|IF_SANDYBRIDGE},
+ /* 2312 */ {I_VCMPTRUE_USSS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+3501, IF_AVX|IF_SANDYBRIDGE},
+ /* 2313 */ {I_VCMPSS, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, nasm_bytecodes+4586, IF_AVX|IF_SANDYBRIDGE},
+ /* 2314 */ {I_VCMPSS, 3, {XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4594, IF_AVX|IF_SANDYBRIDGE},
+ /* 2315 */ {I_VCOMISD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9527, IF_AVX|IF_SANDYBRIDGE},
+ /* 2316 */ {I_VCOMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9534, IF_AVX|IF_SANDYBRIDGE},
+ /* 2317 */ {I_VCVTDQ2PD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9541, IF_AVX|IF_SANDYBRIDGE},
+ /* 2318 */ {I_VCVTDQ2PD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9548, IF_AVX|IF_SANDYBRIDGE},
+ /* 2319 */ {I_VCVTDQ2PS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9555, IF_AVX|IF_SANDYBRIDGE},
+ /* 2320 */ {I_VCVTDQ2PS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9562, IF_AVX|IF_SANDYBRIDGE},
+ /* 2321 */ {I_VCVTPD2DQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+9569, IF_AVX|IF_SANDYBRIDGE},
+ /* 2322 */ {I_VCVTPD2DQ, 2, {XMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+9569, IF_AVX|IF_SANDYBRIDGE|IF_SO},
+ /* 2323 */ {I_VCVTPD2DQ, 2, {XMMREG,YMMREG,0,0,0}, nasm_bytecodes+9576, IF_AVX|IF_SANDYBRIDGE},
+ /* 2324 */ {I_VCVTPD2DQ, 2, {XMMREG,MEMORY|BITS256,0,0,0}, nasm_bytecodes+9576, IF_AVX|IF_SANDYBRIDGE|IF_SY},
+ /* 2325 */ {I_VCVTPD2PS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+9583, IF_AVX|IF_SANDYBRIDGE},
+ /* 2326 */ {I_VCVTPD2PS, 2, {XMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+9583, IF_AVX|IF_SANDYBRIDGE|IF_SO},
+ /* 2327 */ {I_VCVTPD2PS, 2, {XMMREG,YMMREG,0,0,0}, nasm_bytecodes+9590, IF_AVX|IF_SANDYBRIDGE},
+ /* 2328 */ {I_VCVTPD2PS, 2, {XMMREG,MEMORY|BITS256,0,0,0}, nasm_bytecodes+9590, IF_AVX|IF_SANDYBRIDGE|IF_SY},
+ /* 2329 */ {I_VCVTPS2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9597, IF_AVX|IF_SANDYBRIDGE},
+ /* 2330 */ {I_VCVTPS2DQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9604, IF_AVX|IF_SANDYBRIDGE},
+ /* 2331 */ {I_VCVTPS2PD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9611, IF_AVX|IF_SANDYBRIDGE},
+ /* 2332 */ {I_VCVTPS2PD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9618, IF_AVX|IF_SANDYBRIDGE},
+ /* 2333 */ {I_VCVTSD2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9625, IF_AVX|IF_SANDYBRIDGE},
+ /* 2334 */ {I_VCVTSD2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9632, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ /* 2335 */ {I_VCVTSD2SS, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+9639, IF_AVX|IF_SANDYBRIDGE},
+ /* 2336 */ {I_VCVTSD2SS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9646, IF_AVX|IF_SANDYBRIDGE},
+ /* 2337 */ {I_VCVTSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, nasm_bytecodes+9653, IF_AVX|IF_SANDYBRIDGE|IF_SD},
+ /* 2338 */ {I_VCVTSI2SD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+9660, IF_AVX|IF_SANDYBRIDGE|IF_SD},
+ /* 2339 */ {I_VCVTSI2SD, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, nasm_bytecodes+9667, IF_AVX|IF_SANDYBRIDGE|IF_LONG|IF_SQ},
+ /* 2340 */ {I_VCVTSI2SD, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+9674, IF_AVX|IF_SANDYBRIDGE|IF_LONG|IF_SQ},
+ /* 2341 */ {I_VCVTSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS32,0,0}, nasm_bytecodes+9681, IF_AVX|IF_SANDYBRIDGE|IF_SD},
+ /* 2342 */ {I_VCVTSI2SS, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+9688, IF_AVX|IF_SANDYBRIDGE|IF_SD},
+ /* 2343 */ {I_VCVTSI2SS, 3, {XMMREG,XMMREG,RM_GPR|BITS64,0,0}, nasm_bytecodes+9695, IF_AVX|IF_SANDYBRIDGE|IF_LONG|IF_SQ},
+ /* 2344 */ {I_VCVTSI2SS, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+9702, IF_AVX|IF_SANDYBRIDGE|IF_LONG|IF_SQ},
+ /* 2345 */ {I_VCVTSS2SD, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+9709, IF_AVX|IF_SANDYBRIDGE},
+ /* 2346 */ {I_VCVTSS2SD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9716, IF_AVX|IF_SANDYBRIDGE},
+ /* 2347 */ {I_VCVTSS2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9723, IF_AVX|IF_SANDYBRIDGE},
+ /* 2348 */ {I_VCVTSS2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9730, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ /* 2349 */ {I_VCVTTPD2DQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+9737, IF_AVX|IF_SANDYBRIDGE},
+ /* 2350 */ {I_VCVTTPD2DQ, 2, {XMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+9737, IF_AVX|IF_SANDYBRIDGE|IF_SO},
+ /* 2351 */ {I_VCVTTPD2DQ, 2, {XMMREG,YMMREG,0,0,0}, nasm_bytecodes+9744, IF_AVX|IF_SANDYBRIDGE},
+ /* 2352 */ {I_VCVTTPD2DQ, 2, {XMMREG,MEMORY|BITS256,0,0,0}, nasm_bytecodes+9744, IF_AVX|IF_SANDYBRIDGE|IF_SY},
+ /* 2353 */ {I_VCVTTPS2DQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9751, IF_AVX|IF_SANDYBRIDGE},
+ /* 2354 */ {I_VCVTTPS2DQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9758, IF_AVX|IF_SANDYBRIDGE},
+ /* 2355 */ {I_VCVTTSD2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9765, IF_AVX|IF_SANDYBRIDGE},
+ /* 2356 */ {I_VCVTTSD2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9772, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ /* 2357 */ {I_VCVTTSS2SI, 2, {REG_GPR|BITS32,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9779, IF_AVX|IF_SANDYBRIDGE},
+ /* 2358 */ {I_VCVTTSS2SI, 2, {REG_GPR|BITS64,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9786, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ /* 2359 */ {I_VDIVPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9793, IF_AVX|IF_SANDYBRIDGE},
+ /* 2360 */ {I_VDIVPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9800, IF_AVX|IF_SANDYBRIDGE},
+ /* 2361 */ {I_VDIVPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9807, IF_AVX|IF_SANDYBRIDGE},
+ /* 2362 */ {I_VDIVPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9814, IF_AVX|IF_SANDYBRIDGE},
+ /* 2363 */ {I_VDIVPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9821, IF_AVX|IF_SANDYBRIDGE},
+ /* 2364 */ {I_VDIVPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9828, IF_AVX|IF_SANDYBRIDGE},
+ /* 2365 */ {I_VDIVPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9835, IF_AVX|IF_SANDYBRIDGE},
+ /* 2366 */ {I_VDIVPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9842, IF_AVX|IF_SANDYBRIDGE},
+ /* 2367 */ {I_VDIVSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+9849, IF_AVX|IF_SANDYBRIDGE},
+ /* 2368 */ {I_VDIVSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+9856, IF_AVX|IF_SANDYBRIDGE},
+ /* 2369 */ {I_VDIVSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+9863, IF_AVX|IF_SANDYBRIDGE},
+ /* 2370 */ {I_VDIVSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+9870, IF_AVX|IF_SANDYBRIDGE},
+ /* 2371 */ {I_VDPPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+4602, IF_AVX|IF_SANDYBRIDGE},
+ /* 2372 */ {I_VDPPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4610, IF_AVX|IF_SANDYBRIDGE},
+ /* 2373 */ {I_VDPPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+4618, IF_AVX|IF_SANDYBRIDGE},
+ /* 2374 */ {I_VDPPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4626, IF_AVX|IF_SANDYBRIDGE},
+ /* 2375 */ {I_VDPPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+4634, IF_AVX|IF_SANDYBRIDGE},
+ /* 2376 */ {I_VDPPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4642, IF_AVX|IF_SANDYBRIDGE},
+ /* 2377 */ {I_VEXTRACTF128, 3, {RM_XMM|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4650, IF_AVX|IF_SANDYBRIDGE},
+ /* 2378 */ {I_VEXTRACTPS, 3, {RM_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4658, IF_AVX|IF_SANDYBRIDGE},
+ /* 2379 */ {I_VHADDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9877, IF_AVX|IF_SANDYBRIDGE},
+ /* 2380 */ {I_VHADDPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9884, IF_AVX|IF_SANDYBRIDGE},
+ /* 2381 */ {I_VHADDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9891, IF_AVX|IF_SANDYBRIDGE},
+ /* 2382 */ {I_VHADDPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9898, IF_AVX|IF_SANDYBRIDGE},
+ /* 2383 */ {I_VHADDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9905, IF_AVX|IF_SANDYBRIDGE},
+ /* 2384 */ {I_VHADDPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9912, IF_AVX|IF_SANDYBRIDGE},
+ /* 2385 */ {I_VHADDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9919, IF_AVX|IF_SANDYBRIDGE},
+ /* 2386 */ {I_VHADDPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9926, IF_AVX|IF_SANDYBRIDGE},
+ /* 2387 */ {I_VHSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9933, IF_AVX|IF_SANDYBRIDGE},
+ /* 2388 */ {I_VHSUBPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9940, IF_AVX|IF_SANDYBRIDGE},
+ /* 2389 */ {I_VHSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9947, IF_AVX|IF_SANDYBRIDGE},
+ /* 2390 */ {I_VHSUBPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9954, IF_AVX|IF_SANDYBRIDGE},
+ /* 2391 */ {I_VHSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+9961, IF_AVX|IF_SANDYBRIDGE},
+ /* 2392 */ {I_VHSUBPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+9968, IF_AVX|IF_SANDYBRIDGE},
+ /* 2393 */ {I_VHSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+9975, IF_AVX|IF_SANDYBRIDGE},
+ /* 2394 */ {I_VHSUBPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+9982, IF_AVX|IF_SANDYBRIDGE},
+ /* 2395 */ {I_VINSERTF128, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+4666, IF_AVX|IF_SANDYBRIDGE},
+ /* 2396 */ {I_VINSERTPS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, nasm_bytecodes+4674, IF_AVX|IF_SANDYBRIDGE},
+ /* 2397 */ {I_VINSERTPS, 3, {XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4682, IF_AVX|IF_SANDYBRIDGE},
+ /* 2398 */ {I_VLDDQU, 2, {XMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+9989, IF_AVX|IF_SANDYBRIDGE},
+ /* 2399 */ {I_VLDQQU, 2, {YMMREG,MEMORY|BITS256,0,0,0}, nasm_bytecodes+9996, IF_AVX|IF_SANDYBRIDGE},
+ /* 2400 */ {I_VLDDQU, 2, {YMMREG,MEMORY|BITS256,0,0,0}, nasm_bytecodes+9996, IF_AVX|IF_SANDYBRIDGE},
+ /* 2401 */ {I_VLDMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+10003, IF_AVX|IF_SANDYBRIDGE},
+ /* 2402 */ {I_VMASKMOVDQU, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+10010, IF_AVX|IF_SANDYBRIDGE},
+ /* 2403 */ {I_VMASKMOVPS, 3, {XMMREG,XMMREG,MEMORY|BITS128,0,0}, nasm_bytecodes+10017, IF_AVX|IF_SANDYBRIDGE},
+ /* 2404 */ {I_VMASKMOVPS, 3, {YMMREG,YMMREG,MEMORY|BITS256,0,0}, nasm_bytecodes+10024, IF_AVX|IF_SANDYBRIDGE},
+ /* 2405 */ {I_VMASKMOVPS, 3, {MEMORY|BITS128,XMMREG,XMMREG,0,0}, nasm_bytecodes+10031, IF_AVX|IF_SANDYBRIDGE|IF_SO},
+ /* 2406 */ {I_VMASKMOVPS, 3, {MEMORY|BITS256,YMMREG,YMMREG,0,0}, nasm_bytecodes+10038, IF_AVX|IF_SANDYBRIDGE|IF_SY},
+ /* 2407 */ {I_VMASKMOVPD, 3, {XMMREG,XMMREG,MEMORY|BITS128,0,0}, nasm_bytecodes+10045, IF_AVX|IF_SANDYBRIDGE},
+ /* 2408 */ {I_VMASKMOVPD, 3, {YMMREG,YMMREG,MEMORY|BITS256,0,0}, nasm_bytecodes+10052, IF_AVX|IF_SANDYBRIDGE},
+ /* 2409 */ {I_VMASKMOVPD, 3, {MEMORY|BITS128,XMMREG,XMMREG,0,0}, nasm_bytecodes+10059, IF_AVX|IF_SANDYBRIDGE},
+ /* 2410 */ {I_VMASKMOVPD, 3, {MEMORY|BITS256,YMMREG,YMMREG,0,0}, nasm_bytecodes+10066, IF_AVX|IF_SANDYBRIDGE},
+ /* 2411 */ {I_VMAXPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10073, IF_AVX|IF_SANDYBRIDGE},
+ /* 2412 */ {I_VMAXPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10080, IF_AVX|IF_SANDYBRIDGE},
+ /* 2413 */ {I_VMAXPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10087, IF_AVX|IF_SANDYBRIDGE},
+ /* 2414 */ {I_VMAXPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10094, IF_AVX|IF_SANDYBRIDGE},
+ /* 2415 */ {I_VMAXPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10101, IF_AVX|IF_SANDYBRIDGE},
+ /* 2416 */ {I_VMAXPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10108, IF_AVX|IF_SANDYBRIDGE},
+ /* 2417 */ {I_VMAXPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10115, IF_AVX|IF_SANDYBRIDGE},
+ /* 2418 */ {I_VMAXPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10122, IF_AVX|IF_SANDYBRIDGE},
+ /* 2419 */ {I_VMAXSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+10129, IF_AVX|IF_SANDYBRIDGE},
+ /* 2420 */ {I_VMAXSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+10136, IF_AVX|IF_SANDYBRIDGE},
+ /* 2421 */ {I_VMAXSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+10143, IF_AVX|IF_SANDYBRIDGE},
+ /* 2422 */ {I_VMAXSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+10150, IF_AVX|IF_SANDYBRIDGE},
+ /* 2423 */ {I_VMINPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10157, IF_AVX|IF_SANDYBRIDGE},
+ /* 2424 */ {I_VMINPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10164, IF_AVX|IF_SANDYBRIDGE},
+ /* 2425 */ {I_VMINPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10171, IF_AVX|IF_SANDYBRIDGE},
+ /* 2426 */ {I_VMINPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10178, IF_AVX|IF_SANDYBRIDGE},
+ /* 2427 */ {I_VMINPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10185, IF_AVX|IF_SANDYBRIDGE},
+ /* 2428 */ {I_VMINPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10192, IF_AVX|IF_SANDYBRIDGE},
+ /* 2429 */ {I_VMINPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10199, IF_AVX|IF_SANDYBRIDGE},
+ /* 2430 */ {I_VMINPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10206, IF_AVX|IF_SANDYBRIDGE},
+ /* 2431 */ {I_VMINSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+10213, IF_AVX|IF_SANDYBRIDGE},
+ /* 2432 */ {I_VMINSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+10220, IF_AVX|IF_SANDYBRIDGE},
+ /* 2433 */ {I_VMINSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+10227, IF_AVX|IF_SANDYBRIDGE},
+ /* 2434 */ {I_VMINSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+10234, IF_AVX|IF_SANDYBRIDGE},
+ /* 2435 */ {I_VMOVAPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10241, IF_AVX|IF_SANDYBRIDGE},
+ /* 2436 */ {I_VMOVAPD, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+10248, IF_AVX|IF_SANDYBRIDGE},
+ /* 2437 */ {I_VMOVAPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10255, IF_AVX|IF_SANDYBRIDGE},
+ /* 2438 */ {I_VMOVAPD, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+10262, IF_AVX|IF_SANDYBRIDGE},
+ /* 2439 */ {I_VMOVAPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10269, IF_AVX|IF_SANDYBRIDGE},
+ /* 2440 */ {I_VMOVAPS, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+10276, IF_AVX|IF_SANDYBRIDGE},
+ /* 2441 */ {I_VMOVAPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10283, IF_AVX|IF_SANDYBRIDGE},
+ /* 2442 */ {I_VMOVAPS, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+10290, IF_AVX|IF_SANDYBRIDGE},
+ /* 2443 */ {I_VMOVD, 2, {XMMREG,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+10297, IF_AVX|IF_SANDYBRIDGE},
+ /* 2444 */ {I_VMOVD, 2, {RM_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+10304, IF_AVX|IF_SANDYBRIDGE},
+ /* 2445 */ {I_VMOVQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+10311, IF_AVX|IF_SANDYBRIDGE|IF_SQ},
+ /* 2446 */ {I_VMOVQ, 2, {RM_XMM|BITS64,XMMREG,0,0,0}, nasm_bytecodes+10318, IF_AVX|IF_SANDYBRIDGE|IF_SQ},
+ /* 2447 */ {I_VMOVQ, 2, {XMMREG,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+10325, IF_AVX|IF_SANDYBRIDGE|IF_LONG|IF_SQ},
+ /* 2448 */ {I_VMOVQ, 2, {RM_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+10332, IF_AVX|IF_SANDYBRIDGE|IF_LONG|IF_SQ},
+ /* 2449 */ {I_VMOVDDUP, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+10339, IF_AVX|IF_SANDYBRIDGE},
+ /* 2450 */ {I_VMOVDDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10346, IF_AVX|IF_SANDYBRIDGE},
+ /* 2451 */ {I_VMOVDQA, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10353, IF_AVX|IF_SANDYBRIDGE},
+ /* 2452 */ {I_VMOVDQA, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+10360, IF_AVX|IF_SANDYBRIDGE},
+ /* 2453 */ {I_VMOVQQA, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10367, IF_AVX|IF_SANDYBRIDGE},
+ /* 2454 */ {I_VMOVQQA, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+10374, IF_AVX|IF_SANDYBRIDGE},
+ /* 2455 */ {I_VMOVDQA, 2, {YMMREG,RM_YMM,0,0,0}, nasm_bytecodes+10367, IF_AVX|IF_SANDYBRIDGE},
+ /* 2456 */ {I_VMOVDQA, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+10374, IF_AVX|IF_SANDYBRIDGE},
+ /* 2457 */ {I_VMOVDQU, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10381, IF_AVX|IF_SANDYBRIDGE},
+ /* 2458 */ {I_VMOVDQU, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+10388, IF_AVX|IF_SANDYBRIDGE},
+ /* 2459 */ {I_VMOVQQU, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10395, IF_AVX|IF_SANDYBRIDGE},
+ /* 2460 */ {I_VMOVQQU, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+10402, IF_AVX|IF_SANDYBRIDGE},
+ /* 2461 */ {I_VMOVDQU, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10395, IF_AVX|IF_SANDYBRIDGE},
+ /* 2462 */ {I_VMOVDQU, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+10402, IF_AVX|IF_SANDYBRIDGE},
+ /* 2463 */ {I_VMOVHLPS, 3, {XMMREG,XMMREG,XMMREG,0,0}, nasm_bytecodes+10409, IF_AVX|IF_SANDYBRIDGE},
+ /* 2464 */ {I_VMOVHLPS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+10416, IF_AVX|IF_SANDYBRIDGE},
+ /* 2465 */ {I_VMOVHPD, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, nasm_bytecodes+10423, IF_AVX|IF_SANDYBRIDGE},
+ /* 2466 */ {I_VMOVHPD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+10430, IF_AVX|IF_SANDYBRIDGE},
+ /* 2467 */ {I_VMOVHPD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+10437, IF_AVX|IF_SANDYBRIDGE},
+ /* 2468 */ {I_VMOVHPS, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, nasm_bytecodes+10444, IF_AVX|IF_SANDYBRIDGE},
+ /* 2469 */ {I_VMOVHPS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+10451, IF_AVX|IF_SANDYBRIDGE},
+ /* 2470 */ {I_VMOVHPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+10458, IF_AVX|IF_SANDYBRIDGE},
+ /* 2471 */ {I_VMOVLHPS, 3, {XMMREG,XMMREG,XMMREG,0,0}, nasm_bytecodes+10444, IF_AVX|IF_SANDYBRIDGE},
+ /* 2472 */ {I_VMOVLHPS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+10451, IF_AVX|IF_SANDYBRIDGE},
+ /* 2473 */ {I_VMOVLPD, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, nasm_bytecodes+10465, IF_AVX|IF_SANDYBRIDGE},
+ /* 2474 */ {I_VMOVLPD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+10472, IF_AVX|IF_SANDYBRIDGE},
+ /* 2475 */ {I_VMOVLPD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+10479, IF_AVX|IF_SANDYBRIDGE},
+ /* 2476 */ {I_VMOVLPS, 3, {XMMREG,XMMREG,MEMORY|BITS64,0,0}, nasm_bytecodes+10409, IF_AVX|IF_SANDYBRIDGE},
+ /* 2477 */ {I_VMOVLPS, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+10416, IF_AVX|IF_SANDYBRIDGE},
+ /* 2478 */ {I_VMOVLPS, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+10486, IF_AVX|IF_SANDYBRIDGE},
+ /* 2479 */ {I_VMOVMSKPD, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+10493, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ /* 2480 */ {I_VMOVMSKPD, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+10493, IF_AVX|IF_SANDYBRIDGE},
+ /* 2481 */ {I_VMOVMSKPD, 2, {REG_GPR|BITS64,YMMREG,0,0,0}, nasm_bytecodes+10500, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ /* 2482 */ {I_VMOVMSKPD, 2, {REG_GPR|BITS32,YMMREG,0,0,0}, nasm_bytecodes+10500, IF_AVX|IF_SANDYBRIDGE},
+ /* 2483 */ {I_VMOVMSKPS, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+10507, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ /* 2484 */ {I_VMOVMSKPS, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+10507, IF_AVX|IF_SANDYBRIDGE},
+ /* 2485 */ {I_VMOVMSKPS, 2, {REG_GPR|BITS64,YMMREG,0,0,0}, nasm_bytecodes+10514, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ /* 2486 */ {I_VMOVMSKPS, 2, {REG_GPR|BITS32,YMMREG,0,0,0}, nasm_bytecodes+10514, IF_AVX|IF_SANDYBRIDGE},
+ /* 2487 */ {I_VMOVNTDQ, 2, {MEMORY|BITS128,XMMREG,0,0,0}, nasm_bytecodes+10521, IF_AVX|IF_SANDYBRIDGE},
+ /* 2488 */ {I_VMOVNTQQ, 2, {MEMORY|BITS256,YMMREG,0,0,0}, nasm_bytecodes+10528, IF_AVX|IF_SANDYBRIDGE},
+ /* 2489 */ {I_VMOVNTDQ, 2, {MEMORY|BITS256,YMMREG,0,0,0}, nasm_bytecodes+10528, IF_AVX|IF_SANDYBRIDGE},
+ /* 2490 */ {I_VMOVNTDQA, 2, {XMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+10535, IF_AVX|IF_SANDYBRIDGE},
+ /* 2491 */ {I_VMOVNTPD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, nasm_bytecodes+10542, IF_AVX|IF_SANDYBRIDGE},
+ /* 2492 */ {I_VMOVNTPD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, nasm_bytecodes+10549, IF_AVX|IF_SANDYBRIDGE},
+ /* 2493 */ {I_VMOVNTPS, 2, {MEMORY|BITS128,XMMREG,0,0,0}, nasm_bytecodes+10556, IF_AVX|IF_SANDYBRIDGE},
+ /* 2494 */ {I_VMOVNTPS, 2, {MEMORY|BITS128,YMMREG,0,0,0}, nasm_bytecodes+10563, IF_AVX|IF_SANDYBRIDGE},
+ /* 2495 */ {I_VMOVSD, 3, {XMMREG,XMMREG,XMMREG,0,0}, nasm_bytecodes+10570, IF_AVX|IF_SANDYBRIDGE},
+ /* 2496 */ {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+10577, IF_AVX|IF_SANDYBRIDGE},
+ /* 2497 */ {I_VMOVSD, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+10584, IF_AVX|IF_SANDYBRIDGE},
+ /* 2498 */ {I_VMOVSD, 3, {XMMREG,XMMREG,XMMREG,0,0}, nasm_bytecodes+10591, IF_AVX|IF_SANDYBRIDGE},
+ /* 2499 */ {I_VMOVSD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+10598, IF_AVX|IF_SANDYBRIDGE},
+ /* 2500 */ {I_VMOVSD, 2, {MEMORY|BITS64,XMMREG,0,0,0}, nasm_bytecodes+10605, IF_AVX|IF_SANDYBRIDGE},
+ /* 2501 */ {I_VMOVSHDUP, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10612, IF_AVX|IF_SANDYBRIDGE},
+ /* 2502 */ {I_VMOVSHDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10619, IF_AVX|IF_SANDYBRIDGE},
+ /* 2503 */ {I_VMOVSLDUP, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10626, IF_AVX|IF_SANDYBRIDGE},
+ /* 2504 */ {I_VMOVSLDUP, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10633, IF_AVX|IF_SANDYBRIDGE},
+ /* 2505 */ {I_VMOVSS, 3, {XMMREG,XMMREG,XMMREG,0,0}, nasm_bytecodes+10640, IF_AVX|IF_SANDYBRIDGE},
+ /* 2506 */ {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+10647, IF_AVX|IF_SANDYBRIDGE},
+ /* 2507 */ {I_VMOVSS, 2, {XMMREG,MEMORY|BITS32,0,0,0}, nasm_bytecodes+10654, IF_AVX|IF_SANDYBRIDGE},
+ /* 2508 */ {I_VMOVSS, 3, {XMMREG,XMMREG,XMMREG,0,0}, nasm_bytecodes+10661, IF_AVX|IF_SANDYBRIDGE},
+ /* 2509 */ {I_VMOVSS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+10668, IF_AVX|IF_SANDYBRIDGE},
+ /* 2510 */ {I_VMOVSS, 2, {MEMORY|BITS32,XMMREG,0,0,0}, nasm_bytecodes+10675, IF_AVX|IF_SANDYBRIDGE},
+ /* 2511 */ {I_VMOVUPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10682, IF_AVX|IF_SANDYBRIDGE},
+ /* 2512 */ {I_VMOVUPD, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+10689, IF_AVX|IF_SANDYBRIDGE},
+ /* 2513 */ {I_VMOVUPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10696, IF_AVX|IF_SANDYBRIDGE},
+ /* 2514 */ {I_VMOVUPD, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+10703, IF_AVX|IF_SANDYBRIDGE},
+ /* 2515 */ {I_VMOVUPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10710, IF_AVX|IF_SANDYBRIDGE},
+ /* 2516 */ {I_VMOVUPS, 2, {RM_XMM|BITS128,XMMREG,0,0,0}, nasm_bytecodes+10717, IF_AVX|IF_SANDYBRIDGE},
+ /* 2517 */ {I_VMOVUPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10724, IF_AVX|IF_SANDYBRIDGE},
+ /* 2518 */ {I_VMOVUPS, 2, {RM_YMM|BITS256,YMMREG,0,0,0}, nasm_bytecodes+10731, IF_AVX|IF_SANDYBRIDGE},
+ /* 2519 */ {I_VMPSADBW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+4690, IF_AVX|IF_SANDYBRIDGE},
+ /* 2520 */ {I_VMPSADBW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4698, IF_AVX|IF_SANDYBRIDGE},
+ /* 2521 */ {I_VMULPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10738, IF_AVX|IF_SANDYBRIDGE},
+ /* 2522 */ {I_VMULPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10745, IF_AVX|IF_SANDYBRIDGE},
+ /* 2523 */ {I_VMULPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10752, IF_AVX|IF_SANDYBRIDGE},
+ /* 2524 */ {I_VMULPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10759, IF_AVX|IF_SANDYBRIDGE},
+ /* 2525 */ {I_VMULPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10766, IF_AVX|IF_SANDYBRIDGE},
+ /* 2526 */ {I_VMULPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10773, IF_AVX|IF_SANDYBRIDGE},
+ /* 2527 */ {I_VMULPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10780, IF_AVX|IF_SANDYBRIDGE},
+ /* 2528 */ {I_VMULPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10787, IF_AVX|IF_SANDYBRIDGE},
+ /* 2529 */ {I_VMULSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+10794, IF_AVX|IF_SANDYBRIDGE},
+ /* 2530 */ {I_VMULSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+10801, IF_AVX|IF_SANDYBRIDGE},
+ /* 2531 */ {I_VMULSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+10808, IF_AVX|IF_SANDYBRIDGE},
+ /* 2532 */ {I_VMULSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+10815, IF_AVX|IF_SANDYBRIDGE},
+ /* 2533 */ {I_VORPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10822, IF_AVX|IF_SANDYBRIDGE},
+ /* 2534 */ {I_VORPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10829, IF_AVX|IF_SANDYBRIDGE},
+ /* 2535 */ {I_VORPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10836, IF_AVX|IF_SANDYBRIDGE},
+ /* 2536 */ {I_VORPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10843, IF_AVX|IF_SANDYBRIDGE},
+ /* 2537 */ {I_VORPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10850, IF_AVX|IF_SANDYBRIDGE},
+ /* 2538 */ {I_VORPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10857, IF_AVX|IF_SANDYBRIDGE},
+ /* 2539 */ {I_VORPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+10864, IF_AVX|IF_SANDYBRIDGE},
+ /* 2540 */ {I_VORPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+10871, IF_AVX|IF_SANDYBRIDGE},
+ /* 2541 */ {I_VPABSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10878, IF_AVX|IF_SANDYBRIDGE},
+ /* 2542 */ {I_VPABSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10885, IF_AVX|IF_SANDYBRIDGE},
+ /* 2543 */ {I_VPABSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10892, IF_AVX|IF_SANDYBRIDGE},
+ /* 2544 */ {I_VPACKSSWB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10899, IF_AVX|IF_SANDYBRIDGE},
+ /* 2545 */ {I_VPACKSSWB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10906, IF_AVX|IF_SANDYBRIDGE},
+ /* 2546 */ {I_VPACKSSDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10913, IF_AVX|IF_SANDYBRIDGE},
+ /* 2547 */ {I_VPACKSSDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10920, IF_AVX|IF_SANDYBRIDGE},
+ /* 2548 */ {I_VPACKUSWB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10927, IF_AVX|IF_SANDYBRIDGE},
+ /* 2549 */ {I_VPACKUSWB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10934, IF_AVX|IF_SANDYBRIDGE},
+ /* 2550 */ {I_VPACKUSDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10941, IF_AVX|IF_SANDYBRIDGE},
+ /* 2551 */ {I_VPACKUSDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10948, IF_AVX|IF_SANDYBRIDGE},
+ /* 2552 */ {I_VPADDB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10955, IF_AVX|IF_SANDYBRIDGE},
+ /* 2553 */ {I_VPADDB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10962, IF_AVX|IF_SANDYBRIDGE},
+ /* 2554 */ {I_VPADDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10969, IF_AVX|IF_SANDYBRIDGE},
+ /* 2555 */ {I_VPADDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10976, IF_AVX|IF_SANDYBRIDGE},
+ /* 2556 */ {I_VPADDD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10983, IF_AVX|IF_SANDYBRIDGE},
+ /* 2557 */ {I_VPADDD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+10990, IF_AVX|IF_SANDYBRIDGE},
+ /* 2558 */ {I_VPADDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+10997, IF_AVX|IF_SANDYBRIDGE},
+ /* 2559 */ {I_VPADDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11004, IF_AVX|IF_SANDYBRIDGE},
+ /* 2560 */ {I_VPADDSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11011, IF_AVX|IF_SANDYBRIDGE},
+ /* 2561 */ {I_VPADDSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11018, IF_AVX|IF_SANDYBRIDGE},
+ /* 2562 */ {I_VPADDSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11025, IF_AVX|IF_SANDYBRIDGE},
+ /* 2563 */ {I_VPADDSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11032, IF_AVX|IF_SANDYBRIDGE},
+ /* 2564 */ {I_VPADDUSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11039, IF_AVX|IF_SANDYBRIDGE},
+ /* 2565 */ {I_VPADDUSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11046, IF_AVX|IF_SANDYBRIDGE},
+ /* 2566 */ {I_VPADDUSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11053, IF_AVX|IF_SANDYBRIDGE},
+ /* 2567 */ {I_VPADDUSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11060, IF_AVX|IF_SANDYBRIDGE},
+ /* 2568 */ {I_VPALIGNR, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+4706, IF_AVX|IF_SANDYBRIDGE},
+ /* 2569 */ {I_VPALIGNR, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4714, IF_AVX|IF_SANDYBRIDGE},
+ /* 2570 */ {I_VPAND, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11067, IF_AVX|IF_SANDYBRIDGE},
+ /* 2571 */ {I_VPAND, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11074, IF_AVX|IF_SANDYBRIDGE},
+ /* 2572 */ {I_VPANDN, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11081, IF_AVX|IF_SANDYBRIDGE},
+ /* 2573 */ {I_VPANDN, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11088, IF_AVX|IF_SANDYBRIDGE},
+ /* 2574 */ {I_VPAVGB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11095, IF_AVX|IF_SANDYBRIDGE},
+ /* 2575 */ {I_VPAVGB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11102, IF_AVX|IF_SANDYBRIDGE},
+ /* 2576 */ {I_VPAVGW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11109, IF_AVX|IF_SANDYBRIDGE},
+ /* 2577 */ {I_VPAVGW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11116, IF_AVX|IF_SANDYBRIDGE},
+ /* 2578 */ {I_VPBLENDVB, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+4722, IF_AVX|IF_SANDYBRIDGE},
+ /* 2579 */ {I_VPBLENDVB, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+4730, IF_AVX|IF_SANDYBRIDGE},
+ /* 2580 */ {I_VPBLENDW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+4738, IF_AVX|IF_SANDYBRIDGE},
+ /* 2581 */ {I_VPBLENDW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4746, IF_AVX|IF_SANDYBRIDGE},
+ /* 2582 */ {I_VPCMPESTRI, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4754, IF_AVX|IF_SANDYBRIDGE},
+ /* 2583 */ {I_VPCMPESTRM, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4762, IF_AVX|IF_SANDYBRIDGE},
+ /* 2584 */ {I_VPCMPISTRI, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4770, IF_AVX|IF_SANDYBRIDGE},
+ /* 2585 */ {I_VPCMPISTRM, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4778, IF_AVX|IF_SANDYBRIDGE},
+ /* 2586 */ {I_VPCMPEQB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11123, IF_AVX|IF_SANDYBRIDGE},
+ /* 2587 */ {I_VPCMPEQB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11130, IF_AVX|IF_SANDYBRIDGE},
+ /* 2588 */ {I_VPCMPEQW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11137, IF_AVX|IF_SANDYBRIDGE},
+ /* 2589 */ {I_VPCMPEQW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11144, IF_AVX|IF_SANDYBRIDGE},
+ /* 2590 */ {I_VPCMPEQD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11151, IF_AVX|IF_SANDYBRIDGE},
+ /* 2591 */ {I_VPCMPEQD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11158, IF_AVX|IF_SANDYBRIDGE},
+ /* 2592 */ {I_VPCMPEQQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11165, IF_AVX|IF_SANDYBRIDGE},
+ /* 2593 */ {I_VPCMPEQQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11172, IF_AVX|IF_SANDYBRIDGE},
+ /* 2594 */ {I_VPCMPGTB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11179, IF_AVX|IF_SANDYBRIDGE},
+ /* 2595 */ {I_VPCMPGTB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11186, IF_AVX|IF_SANDYBRIDGE},
+ /* 2596 */ {I_VPCMPGTW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11193, IF_AVX|IF_SANDYBRIDGE},
+ /* 2597 */ {I_VPCMPGTW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11200, IF_AVX|IF_SANDYBRIDGE},
+ /* 2598 */ {I_VPCMPGTD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11207, IF_AVX|IF_SANDYBRIDGE},
+ /* 2599 */ {I_VPCMPGTD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11214, IF_AVX|IF_SANDYBRIDGE},
+ /* 2600 */ {I_VPCMPGTQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11221, IF_AVX|IF_SANDYBRIDGE},
+ /* 2601 */ {I_VPCMPGTQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11228, IF_AVX|IF_SANDYBRIDGE},
+ /* 2602 */ {I_VPERMILPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11235, IF_AVX|IF_SANDYBRIDGE},
+ /* 2603 */ {I_VPERMILPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11242, IF_AVX|IF_SANDYBRIDGE},
+ /* 2604 */ {I_VPERMILPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4786, IF_AVX|IF_SANDYBRIDGE},
+ /* 2605 */ {I_VPERMILPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4794, IF_AVX|IF_SANDYBRIDGE},
+ /* 2606 */ {I_VPERMILPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11249, IF_AVX|IF_SANDYBRIDGE},
+ /* 2607 */ {I_VPERMILPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+11256, IF_AVX|IF_SANDYBRIDGE},
+ /* 2608 */ {I_VPERMILPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4802, IF_AVX|IF_SANDYBRIDGE},
+ /* 2609 */ {I_VPERMILPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4810, IF_AVX|IF_SANDYBRIDGE},
+ /* 2610 */ {I_VPERM2F128, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+4818, IF_AVX|IF_SANDYBRIDGE},
+ /* 2611 */ {I_VPEXTRB, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4826, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ /* 2612 */ {I_VPEXTRB, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4826, IF_AVX|IF_SANDYBRIDGE},
+ /* 2613 */ {I_VPEXTRB, 3, {MEMORY|BITS8,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4826, IF_AVX|IF_SANDYBRIDGE},
+ /* 2614 */ {I_VPEXTRW, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4834, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ /* 2615 */ {I_VPEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4834, IF_AVX|IF_SANDYBRIDGE},
+ /* 2616 */ {I_VPEXTRW, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4842, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ /* 2617 */ {I_VPEXTRW, 3, {REG_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4842, IF_AVX|IF_SANDYBRIDGE},
+ /* 2618 */ {I_VPEXTRW, 3, {MEMORY|BITS16,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4842, IF_AVX|IF_SANDYBRIDGE},
+ /* 2619 */ {I_VPEXTRD, 3, {REG_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4850, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ /* 2620 */ {I_VPEXTRD, 3, {RM_GPR|BITS32,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4850, IF_AVX|IF_SANDYBRIDGE},
+ /* 2621 */ {I_VPEXTRQ, 3, {RM_GPR|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4858, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ /* 2622 */ {I_VPHADDW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11263, IF_AVX|IF_SANDYBRIDGE},
+ /* 2623 */ {I_VPHADDW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11270, IF_AVX|IF_SANDYBRIDGE},
+ /* 2624 */ {I_VPHADDD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11277, IF_AVX|IF_SANDYBRIDGE},
+ /* 2625 */ {I_VPHADDD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11284, IF_AVX|IF_SANDYBRIDGE},
+ /* 2626 */ {I_VPHADDSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11291, IF_AVX|IF_SANDYBRIDGE},
+ /* 2627 */ {I_VPHADDSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11298, IF_AVX|IF_SANDYBRIDGE},
+ /* 2628 */ {I_VPHMINPOSUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11305, IF_AVX|IF_SANDYBRIDGE},
+ /* 2629 */ {I_VPHSUBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11312, IF_AVX|IF_SANDYBRIDGE},
+ /* 2630 */ {I_VPHSUBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11319, IF_AVX|IF_SANDYBRIDGE},
+ /* 2631 */ {I_VPHSUBD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11326, IF_AVX|IF_SANDYBRIDGE},
+ /* 2632 */ {I_VPHSUBD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11333, IF_AVX|IF_SANDYBRIDGE},
+ /* 2633 */ {I_VPHSUBSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11340, IF_AVX|IF_SANDYBRIDGE},
+ /* 2634 */ {I_VPHSUBSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11347, IF_AVX|IF_SANDYBRIDGE},
+ /* 2635 */ {I_VPINSRB, 4, {XMMREG,XMMREG,MEMORY|BITS8,IMMEDIATE|BITS8,0}, nasm_bytecodes+4866, IF_AVX|IF_SANDYBRIDGE},
+ /* 2636 */ {I_VPINSRB, 3, {XMMREG,MEMORY|BITS8,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4874, IF_AVX|IF_SANDYBRIDGE},
+ /* 2637 */ {I_VPINSRB, 4, {XMMREG,XMMREG,RM_GPR|BITS8,IMMEDIATE|BITS8,0}, nasm_bytecodes+4866, IF_AVX|IF_SANDYBRIDGE},
+ /* 2638 */ {I_VPINSRB, 3, {XMMREG,RM_GPR|BITS8,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4874, IF_AVX|IF_SANDYBRIDGE},
+ /* 2639 */ {I_VPINSRB, 4, {XMMREG,XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0}, nasm_bytecodes+4866, IF_AVX|IF_SANDYBRIDGE},
+ /* 2640 */ {I_VPINSRB, 3, {XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4874, IF_AVX|IF_SANDYBRIDGE},
+ /* 2641 */ {I_VPINSRW, 4, {XMMREG,XMMREG,MEMORY|BITS16,IMMEDIATE|BITS8,0}, nasm_bytecodes+4882, IF_AVX|IF_SANDYBRIDGE},
+ /* 2642 */ {I_VPINSRW, 3, {XMMREG,MEMORY|BITS16,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4890, IF_AVX|IF_SANDYBRIDGE},
+ /* 2643 */ {I_VPINSRW, 4, {XMMREG,XMMREG,RM_GPR|BITS16,IMMEDIATE|BITS8,0}, nasm_bytecodes+4882, IF_AVX|IF_SANDYBRIDGE},
+ /* 2644 */ {I_VPINSRW, 3, {XMMREG,RM_GPR|BITS16,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4890, IF_AVX|IF_SANDYBRIDGE},
+ /* 2645 */ {I_VPINSRW, 4, {XMMREG,XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0}, nasm_bytecodes+4882, IF_AVX|IF_SANDYBRIDGE},
+ /* 2646 */ {I_VPINSRW, 3, {XMMREG,REG_GPR|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4890, IF_AVX|IF_SANDYBRIDGE},
+ /* 2647 */ {I_VPINSRD, 4, {XMMREG,XMMREG,MEMORY|BITS32,IMMEDIATE|BITS8,0}, nasm_bytecodes+4898, IF_AVX|IF_SANDYBRIDGE},
+ /* 2648 */ {I_VPINSRD, 3, {XMMREG,MEMORY|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4906, IF_AVX|IF_SANDYBRIDGE},
+ /* 2649 */ {I_VPINSRD, 4, {XMMREG,XMMREG,RM_GPR|BITS32,IMMEDIATE|BITS8,0}, nasm_bytecodes+4898, IF_AVX|IF_SANDYBRIDGE},
+ /* 2650 */ {I_VPINSRD, 3, {XMMREG,RM_GPR|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4906, IF_AVX|IF_SANDYBRIDGE},
+ /* 2651 */ {I_VPINSRQ, 4, {XMMREG,XMMREG,MEMORY|BITS64,IMMEDIATE|BITS8,0}, nasm_bytecodes+4914, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ /* 2652 */ {I_VPINSRQ, 3, {XMMREG,MEMORY|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4922, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ /* 2653 */ {I_VPINSRQ, 4, {XMMREG,XMMREG,RM_GPR|BITS64,IMMEDIATE|BITS8,0}, nasm_bytecodes+4914, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ /* 2654 */ {I_VPINSRQ, 3, {XMMREG,RM_GPR|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4922, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ /* 2655 */ {I_VPMADDWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11354, IF_AVX|IF_SANDYBRIDGE},
+ /* 2656 */ {I_VPMADDWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11361, IF_AVX|IF_SANDYBRIDGE},
+ /* 2657 */ {I_VPMADDUBSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11368, IF_AVX|IF_SANDYBRIDGE},
+ /* 2658 */ {I_VPMADDUBSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11375, IF_AVX|IF_SANDYBRIDGE},
+ /* 2659 */ {I_VPMAXSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11382, IF_AVX|IF_SANDYBRIDGE},
+ /* 2660 */ {I_VPMAXSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11389, IF_AVX|IF_SANDYBRIDGE},
+ /* 2661 */ {I_VPMAXSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11396, IF_AVX|IF_SANDYBRIDGE},
+ /* 2662 */ {I_VPMAXSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11403, IF_AVX|IF_SANDYBRIDGE},
+ /* 2663 */ {I_VPMAXSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11410, IF_AVX|IF_SANDYBRIDGE},
+ /* 2664 */ {I_VPMAXSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11417, IF_AVX|IF_SANDYBRIDGE},
+ /* 2665 */ {I_VPMAXUB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11424, IF_AVX|IF_SANDYBRIDGE},
+ /* 2666 */ {I_VPMAXUB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11431, IF_AVX|IF_SANDYBRIDGE},
+ /* 2667 */ {I_VPMAXUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11438, IF_AVX|IF_SANDYBRIDGE},
+ /* 2668 */ {I_VPMAXUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11445, IF_AVX|IF_SANDYBRIDGE},
+ /* 2669 */ {I_VPMAXUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11452, IF_AVX|IF_SANDYBRIDGE},
+ /* 2670 */ {I_VPMAXUD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11459, IF_AVX|IF_SANDYBRIDGE},
+ /* 2671 */ {I_VPMINSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11466, IF_AVX|IF_SANDYBRIDGE},
+ /* 2672 */ {I_VPMINSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11473, IF_AVX|IF_SANDYBRIDGE},
+ /* 2673 */ {I_VPMINSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11480, IF_AVX|IF_SANDYBRIDGE},
+ /* 2674 */ {I_VPMINSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11487, IF_AVX|IF_SANDYBRIDGE},
+ /* 2675 */ {I_VPMINSD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11494, IF_AVX|IF_SANDYBRIDGE},
+ /* 2676 */ {I_VPMINSD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11501, IF_AVX|IF_SANDYBRIDGE},
+ /* 2677 */ {I_VPMINUB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11508, IF_AVX|IF_SANDYBRIDGE},
+ /* 2678 */ {I_VPMINUB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11515, IF_AVX|IF_SANDYBRIDGE},
+ /* 2679 */ {I_VPMINUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11522, IF_AVX|IF_SANDYBRIDGE},
+ /* 2680 */ {I_VPMINUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11529, IF_AVX|IF_SANDYBRIDGE},
+ /* 2681 */ {I_VPMINUD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11536, IF_AVX|IF_SANDYBRIDGE},
+ /* 2682 */ {I_VPMINUD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11543, IF_AVX|IF_SANDYBRIDGE},
+ /* 2683 */ {I_VPMOVMSKB, 2, {REG_GPR|BITS64,XMMREG,0,0,0}, nasm_bytecodes+11550, IF_AVX|IF_SANDYBRIDGE|IF_LONG},
+ /* 2684 */ {I_VPMOVMSKB, 2, {REG_GPR|BITS32,XMMREG,0,0,0}, nasm_bytecodes+11550, IF_AVX|IF_SANDYBRIDGE},
+ /* 2685 */ {I_VPMOVSXBW, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+11557, IF_AVX|IF_SANDYBRIDGE},
+ /* 2686 */ {I_VPMOVSXBD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+11564, IF_AVX|IF_SANDYBRIDGE},
+ /* 2687 */ {I_VPMOVSXBQ, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, nasm_bytecodes+11571, IF_AVX|IF_SANDYBRIDGE},
+ /* 2688 */ {I_VPMOVSXWD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+11578, IF_AVX|IF_SANDYBRIDGE},
+ /* 2689 */ {I_VPMOVSXWQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+11585, IF_AVX|IF_SANDYBRIDGE},
+ /* 2690 */ {I_VPMOVSXDQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+11592, IF_AVX|IF_SANDYBRIDGE},
+ /* 2691 */ {I_VPMOVZXBW, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+11599, IF_AVX|IF_SANDYBRIDGE},
+ /* 2692 */ {I_VPMOVZXBD, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+11606, IF_AVX|IF_SANDYBRIDGE},
+ /* 2693 */ {I_VPMOVZXBQ, 2, {XMMREG,RM_XMM|BITS16,0,0,0}, nasm_bytecodes+11613, IF_AVX|IF_SANDYBRIDGE},
+ /* 2694 */ {I_VPMOVZXWD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+11620, IF_AVX|IF_SANDYBRIDGE},
+ /* 2695 */ {I_VPMOVZXWQ, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+11627, IF_AVX|IF_SANDYBRIDGE},
+ /* 2696 */ {I_VPMOVZXDQ, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+11634, IF_AVX|IF_SANDYBRIDGE},
+ /* 2697 */ {I_VPMULHUW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11641, IF_AVX|IF_SANDYBRIDGE},
+ /* 2698 */ {I_VPMULHUW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11648, IF_AVX|IF_SANDYBRIDGE},
+ /* 2699 */ {I_VPMULHRSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11655, IF_AVX|IF_SANDYBRIDGE},
+ /* 2700 */ {I_VPMULHRSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11662, IF_AVX|IF_SANDYBRIDGE},
+ /* 2701 */ {I_VPMULHW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11669, IF_AVX|IF_SANDYBRIDGE},
+ /* 2702 */ {I_VPMULHW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11676, IF_AVX|IF_SANDYBRIDGE},
+ /* 2703 */ {I_VPMULLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11683, IF_AVX|IF_SANDYBRIDGE},
+ /* 2704 */ {I_VPMULLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11690, IF_AVX|IF_SANDYBRIDGE},
+ /* 2705 */ {I_VPMULLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11697, IF_AVX|IF_SANDYBRIDGE},
+ /* 2706 */ {I_VPMULLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11704, IF_AVX|IF_SANDYBRIDGE},
+ /* 2707 */ {I_VPMULUDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11711, IF_AVX|IF_SANDYBRIDGE},
+ /* 2708 */ {I_VPMULUDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11718, IF_AVX|IF_SANDYBRIDGE},
+ /* 2709 */ {I_VPMULDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11725, IF_AVX|IF_SANDYBRIDGE},
+ /* 2710 */ {I_VPMULDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11732, IF_AVX|IF_SANDYBRIDGE},
+ /* 2711 */ {I_VPOR, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11739, IF_AVX|IF_SANDYBRIDGE},
+ /* 2712 */ {I_VPOR, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11746, IF_AVX|IF_SANDYBRIDGE},
+ /* 2713 */ {I_VPSADBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11753, IF_AVX|IF_SANDYBRIDGE},
+ /* 2714 */ {I_VPSADBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11760, IF_AVX|IF_SANDYBRIDGE},
+ /* 2715 */ {I_VPSHUFB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11767, IF_AVX|IF_SANDYBRIDGE},
+ /* 2716 */ {I_VPSHUFB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11774, IF_AVX|IF_SANDYBRIDGE},
+ /* 2717 */ {I_VPSHUFD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4930, IF_AVX|IF_SANDYBRIDGE},
+ /* 2718 */ {I_VPSHUFHW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4938, IF_AVX|IF_SANDYBRIDGE},
+ /* 2719 */ {I_VPSHUFLW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4946, IF_AVX|IF_SANDYBRIDGE},
+ /* 2720 */ {I_VPSIGNB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11781, IF_AVX|IF_SANDYBRIDGE},
+ /* 2721 */ {I_VPSIGNB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11788, IF_AVX|IF_SANDYBRIDGE},
+ /* 2722 */ {I_VPSIGNW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11795, IF_AVX|IF_SANDYBRIDGE},
+ /* 2723 */ {I_VPSIGNW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11802, IF_AVX|IF_SANDYBRIDGE},
+ /* 2724 */ {I_VPSIGND, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11809, IF_AVX|IF_SANDYBRIDGE},
+ /* 2725 */ {I_VPSIGND, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11816, IF_AVX|IF_SANDYBRIDGE},
+ /* 2726 */ {I_VPSLLDQ, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4954, IF_AVX|IF_SANDYBRIDGE},
+ /* 2727 */ {I_VPSLLDQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+4962, IF_AVX|IF_SANDYBRIDGE},
+ /* 2728 */ {I_VPSRLDQ, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4970, IF_AVX|IF_SANDYBRIDGE},
+ /* 2729 */ {I_VPSRLDQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+4978, IF_AVX|IF_SANDYBRIDGE},
+ /* 2730 */ {I_VPSLLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11823, IF_AVX|IF_SANDYBRIDGE},
+ /* 2731 */ {I_VPSLLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11830, IF_AVX|IF_SANDYBRIDGE},
+ /* 2732 */ {I_VPSLLW, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+4986, IF_AVX|IF_SANDYBRIDGE},
+ /* 2733 */ {I_VPSLLW, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+4994, IF_AVX|IF_SANDYBRIDGE},
+ /* 2734 */ {I_VPSLLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11837, IF_AVX|IF_SANDYBRIDGE},
+ /* 2735 */ {I_VPSLLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11844, IF_AVX|IF_SANDYBRIDGE},
+ /* 2736 */ {I_VPSLLD, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5002, IF_AVX|IF_SANDYBRIDGE},
+ /* 2737 */ {I_VPSLLD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+5010, IF_AVX|IF_SANDYBRIDGE},
+ /* 2738 */ {I_VPSLLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11851, IF_AVX|IF_SANDYBRIDGE},
+ /* 2739 */ {I_VPSLLQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11858, IF_AVX|IF_SANDYBRIDGE},
+ /* 2740 */ {I_VPSLLQ, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5018, IF_AVX|IF_SANDYBRIDGE},
+ /* 2741 */ {I_VPSLLQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+5026, IF_AVX|IF_SANDYBRIDGE},
+ /* 2742 */ {I_VPSRAW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11865, IF_AVX|IF_SANDYBRIDGE},
+ /* 2743 */ {I_VPSRAW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11872, IF_AVX|IF_SANDYBRIDGE},
+ /* 2744 */ {I_VPSRAW, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5034, IF_AVX|IF_SANDYBRIDGE},
+ /* 2745 */ {I_VPSRAW, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+5042, IF_AVX|IF_SANDYBRIDGE},
+ /* 2746 */ {I_VPSRAD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11879, IF_AVX|IF_SANDYBRIDGE},
+ /* 2747 */ {I_VPSRAD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11886, IF_AVX|IF_SANDYBRIDGE},
+ /* 2748 */ {I_VPSRAD, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5050, IF_AVX|IF_SANDYBRIDGE},
+ /* 2749 */ {I_VPSRAD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+5058, IF_AVX|IF_SANDYBRIDGE},
+ /* 2750 */ {I_VPSRLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11893, IF_AVX|IF_SANDYBRIDGE},
+ /* 2751 */ {I_VPSRLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11900, IF_AVX|IF_SANDYBRIDGE},
+ /* 2752 */ {I_VPSRLW, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5066, IF_AVX|IF_SANDYBRIDGE},
+ /* 2753 */ {I_VPSRLW, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+5074, IF_AVX|IF_SANDYBRIDGE},
+ /* 2754 */ {I_VPSRLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11907, IF_AVX|IF_SANDYBRIDGE},
+ /* 2755 */ {I_VPSRLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11914, IF_AVX|IF_SANDYBRIDGE},
+ /* 2756 */ {I_VPSRLD, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5082, IF_AVX|IF_SANDYBRIDGE},
+ /* 2757 */ {I_VPSRLD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+5090, IF_AVX|IF_SANDYBRIDGE},
+ /* 2758 */ {I_VPSRLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11921, IF_AVX|IF_SANDYBRIDGE},
+ /* 2759 */ {I_VPSRLQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11928, IF_AVX|IF_SANDYBRIDGE},
+ /* 2760 */ {I_VPSRLQ, 3, {XMMREG,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5098, IF_AVX|IF_SANDYBRIDGE},
+ /* 2761 */ {I_VPSRLQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+5106, IF_AVX|IF_SANDYBRIDGE},
+ /* 2762 */ {I_VPTEST, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11935, IF_AVX|IF_SANDYBRIDGE},
+ /* 2763 */ {I_VPTEST, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+11942, IF_AVX|IF_SANDYBRIDGE},
+ /* 2764 */ {I_VPSUBB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11949, IF_AVX|IF_SANDYBRIDGE},
+ /* 2765 */ {I_VPSUBB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11956, IF_AVX|IF_SANDYBRIDGE},
+ /* 2766 */ {I_VPSUBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11963, IF_AVX|IF_SANDYBRIDGE},
+ /* 2767 */ {I_VPSUBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11970, IF_AVX|IF_SANDYBRIDGE},
+ /* 2768 */ {I_VPSUBD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11977, IF_AVX|IF_SANDYBRIDGE},
+ /* 2769 */ {I_VPSUBD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11984, IF_AVX|IF_SANDYBRIDGE},
+ /* 2770 */ {I_VPSUBQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+11991, IF_AVX|IF_SANDYBRIDGE},
+ /* 2771 */ {I_VPSUBQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+11998, IF_AVX|IF_SANDYBRIDGE},
+ /* 2772 */ {I_VPSUBSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12005, IF_AVX|IF_SANDYBRIDGE},
+ /* 2773 */ {I_VPSUBSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12012, IF_AVX|IF_SANDYBRIDGE},
+ /* 2774 */ {I_VPSUBSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12019, IF_AVX|IF_SANDYBRIDGE},
+ /* 2775 */ {I_VPSUBSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12026, IF_AVX|IF_SANDYBRIDGE},
+ /* 2776 */ {I_VPSUBUSB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12033, IF_AVX|IF_SANDYBRIDGE},
+ /* 2777 */ {I_VPSUBUSB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12040, IF_AVX|IF_SANDYBRIDGE},
+ /* 2778 */ {I_VPSUBUSW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12047, IF_AVX|IF_SANDYBRIDGE},
+ /* 2779 */ {I_VPSUBUSW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12054, IF_AVX|IF_SANDYBRIDGE},
+ /* 2780 */ {I_VPUNPCKHBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12061, IF_AVX|IF_SANDYBRIDGE},
+ /* 2781 */ {I_VPUNPCKHBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12068, IF_AVX|IF_SANDYBRIDGE},
+ /* 2782 */ {I_VPUNPCKHWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12075, IF_AVX|IF_SANDYBRIDGE},
+ /* 2783 */ {I_VPUNPCKHWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12082, IF_AVX|IF_SANDYBRIDGE},
+ /* 2784 */ {I_VPUNPCKHDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12089, IF_AVX|IF_SANDYBRIDGE},
+ /* 2785 */ {I_VPUNPCKHDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12096, IF_AVX|IF_SANDYBRIDGE},
+ /* 2786 */ {I_VPUNPCKHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12103, IF_AVX|IF_SANDYBRIDGE},
+ /* 2787 */ {I_VPUNPCKHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12110, IF_AVX|IF_SANDYBRIDGE},
+ /* 2788 */ {I_VPUNPCKLBW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12117, IF_AVX|IF_SANDYBRIDGE},
+ /* 2789 */ {I_VPUNPCKLBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12124, IF_AVX|IF_SANDYBRIDGE},
+ /* 2790 */ {I_VPUNPCKLWD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12131, IF_AVX|IF_SANDYBRIDGE},
+ /* 2791 */ {I_VPUNPCKLWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12138, IF_AVX|IF_SANDYBRIDGE},
+ /* 2792 */ {I_VPUNPCKLDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12145, IF_AVX|IF_SANDYBRIDGE},
+ /* 2793 */ {I_VPUNPCKLDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12152, IF_AVX|IF_SANDYBRIDGE},
+ /* 2794 */ {I_VPUNPCKLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12159, IF_AVX|IF_SANDYBRIDGE},
+ /* 2795 */ {I_VPUNPCKLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12166, IF_AVX|IF_SANDYBRIDGE},
+ /* 2796 */ {I_VPXOR, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12173, IF_AVX|IF_SANDYBRIDGE},
+ /* 2797 */ {I_VPXOR, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12180, IF_AVX|IF_SANDYBRIDGE},
+ /* 2798 */ {I_VRCPPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12187, IF_AVX|IF_SANDYBRIDGE},
+ /* 2799 */ {I_VRCPPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12194, IF_AVX|IF_SANDYBRIDGE},
+ /* 2800 */ {I_VRCPSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12201, IF_AVX|IF_SANDYBRIDGE},
+ /* 2801 */ {I_VRCPSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+12208, IF_AVX|IF_SANDYBRIDGE},
+ /* 2802 */ {I_VRSQRTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12215, IF_AVX|IF_SANDYBRIDGE},
+ /* 2803 */ {I_VRSQRTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12222, IF_AVX|IF_SANDYBRIDGE},
+ /* 2804 */ {I_VRSQRTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12229, IF_AVX|IF_SANDYBRIDGE},
+ /* 2805 */ {I_VRSQRTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+12236, IF_AVX|IF_SANDYBRIDGE},
+ /* 2806 */ {I_VROUNDPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5114, IF_AVX|IF_SANDYBRIDGE},
+ /* 2807 */ {I_VROUNDPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5122, IF_AVX|IF_SANDYBRIDGE},
+ /* 2808 */ {I_VROUNDPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5130, IF_AVX|IF_SANDYBRIDGE},
+ /* 2809 */ {I_VROUNDPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5138, IF_AVX|IF_SANDYBRIDGE},
+ /* 2810 */ {I_VROUNDSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0}, nasm_bytecodes+5146, IF_AVX|IF_SANDYBRIDGE},
+ /* 2811 */ {I_VROUNDSD, 3, {XMMREG,RM_XMM|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5154, IF_AVX|IF_SANDYBRIDGE},
+ /* 2812 */ {I_VROUNDSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0}, nasm_bytecodes+5162, IF_AVX|IF_SANDYBRIDGE},
+ /* 2813 */ {I_VROUNDSS, 3, {XMMREG,RM_XMM|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5170, IF_AVX|IF_SANDYBRIDGE},
+ /* 2814 */ {I_VSHUFPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+5178, IF_AVX|IF_SANDYBRIDGE},
+ /* 2815 */ {I_VSHUFPD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5186, IF_AVX|IF_SANDYBRIDGE},
+ /* 2816 */ {I_VSHUFPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+5194, IF_AVX|IF_SANDYBRIDGE},
+ /* 2817 */ {I_VSHUFPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5202, IF_AVX|IF_SANDYBRIDGE},
+ /* 2818 */ {I_VSHUFPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+5210, IF_AVX|IF_SANDYBRIDGE},
+ /* 2819 */ {I_VSHUFPS, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5218, IF_AVX|IF_SANDYBRIDGE},
+ /* 2820 */ {I_VSHUFPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+5226, IF_AVX|IF_SANDYBRIDGE},
+ /* 2821 */ {I_VSHUFPS, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5234, IF_AVX|IF_SANDYBRIDGE},
+ /* 2822 */ {I_VSQRTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12243, IF_AVX|IF_SANDYBRIDGE},
+ /* 2823 */ {I_VSQRTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12250, IF_AVX|IF_SANDYBRIDGE},
+ /* 2824 */ {I_VSQRTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12257, IF_AVX|IF_SANDYBRIDGE},
+ /* 2825 */ {I_VSQRTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12264, IF_AVX|IF_SANDYBRIDGE},
+ /* 2826 */ {I_VSQRTSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12271, IF_AVX|IF_SANDYBRIDGE},
+ /* 2827 */ {I_VSQRTSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+12278, IF_AVX|IF_SANDYBRIDGE},
+ /* 2828 */ {I_VSQRTSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12285, IF_AVX|IF_SANDYBRIDGE},
+ /* 2829 */ {I_VSQRTSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+12292, IF_AVX|IF_SANDYBRIDGE},
+ /* 2830 */ {I_VSTMXCSR, 1, {MEMORY|BITS32,0,0,0,0}, nasm_bytecodes+12299, IF_AVX|IF_SANDYBRIDGE},
+ /* 2831 */ {I_VSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12306, IF_AVX|IF_SANDYBRIDGE},
+ /* 2832 */ {I_VSUBPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12313, IF_AVX|IF_SANDYBRIDGE},
+ /* 2833 */ {I_VSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12320, IF_AVX|IF_SANDYBRIDGE},
+ /* 2834 */ {I_VSUBPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12327, IF_AVX|IF_SANDYBRIDGE},
+ /* 2835 */ {I_VSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12334, IF_AVX|IF_SANDYBRIDGE},
+ /* 2836 */ {I_VSUBPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12341, IF_AVX|IF_SANDYBRIDGE},
+ /* 2837 */ {I_VSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12348, IF_AVX|IF_SANDYBRIDGE},
+ /* 2838 */ {I_VSUBPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12355, IF_AVX|IF_SANDYBRIDGE},
+ /* 2839 */ {I_VSUBSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+12362, IF_AVX|IF_SANDYBRIDGE},
+ /* 2840 */ {I_VSUBSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+12369, IF_AVX|IF_SANDYBRIDGE},
+ /* 2841 */ {I_VSUBSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+12376, IF_AVX|IF_SANDYBRIDGE},
+ /* 2842 */ {I_VSUBSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+12383, IF_AVX|IF_SANDYBRIDGE},
+ /* 2843 */ {I_VTESTPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12390, IF_AVX|IF_SANDYBRIDGE},
+ /* 2844 */ {I_VTESTPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12397, IF_AVX|IF_SANDYBRIDGE},
+ /* 2845 */ {I_VTESTPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12404, IF_AVX|IF_SANDYBRIDGE},
+ /* 2846 */ {I_VTESTPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12411, IF_AVX|IF_SANDYBRIDGE},
+ /* 2847 */ {I_VUCOMISD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+12418, IF_AVX|IF_SANDYBRIDGE},
+ /* 2848 */ {I_VUCOMISS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+12425, IF_AVX|IF_SANDYBRIDGE},
+ /* 2849 */ {I_VUNPCKHPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12432, IF_AVX|IF_SANDYBRIDGE},
+ /* 2850 */ {I_VUNPCKHPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12439, IF_AVX|IF_SANDYBRIDGE},
+ /* 2851 */ {I_VUNPCKHPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12446, IF_AVX|IF_SANDYBRIDGE},
+ /* 2852 */ {I_VUNPCKHPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12453, IF_AVX|IF_SANDYBRIDGE},
+ /* 2853 */ {I_VUNPCKHPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12460, IF_AVX|IF_SANDYBRIDGE},
+ /* 2854 */ {I_VUNPCKHPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12467, IF_AVX|IF_SANDYBRIDGE},
+ /* 2855 */ {I_VUNPCKHPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12474, IF_AVX|IF_SANDYBRIDGE},
+ /* 2856 */ {I_VUNPCKHPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12481, IF_AVX|IF_SANDYBRIDGE},
+ /* 2857 */ {I_VUNPCKLPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12488, IF_AVX|IF_SANDYBRIDGE},
+ /* 2858 */ {I_VUNPCKLPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12495, IF_AVX|IF_SANDYBRIDGE},
+ /* 2859 */ {I_VUNPCKLPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12502, IF_AVX|IF_SANDYBRIDGE},
+ /* 2860 */ {I_VUNPCKLPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12509, IF_AVX|IF_SANDYBRIDGE},
+ /* 2861 */ {I_VUNPCKLPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12516, IF_AVX|IF_SANDYBRIDGE},
+ /* 2862 */ {I_VUNPCKLPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12523, IF_AVX|IF_SANDYBRIDGE},
+ /* 2863 */ {I_VUNPCKLPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12530, IF_AVX|IF_SANDYBRIDGE},
+ /* 2864 */ {I_VUNPCKLPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12537, IF_AVX|IF_SANDYBRIDGE},
+ /* 2865 */ {I_VXORPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12544, IF_AVX|IF_SANDYBRIDGE},
+ /* 2866 */ {I_VXORPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12551, IF_AVX|IF_SANDYBRIDGE},
+ /* 2867 */ {I_VXORPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12558, IF_AVX|IF_SANDYBRIDGE},
+ /* 2868 */ {I_VXORPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12565, IF_AVX|IF_SANDYBRIDGE},
+ /* 2869 */ {I_VXORPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12572, IF_AVX|IF_SANDYBRIDGE},
+ /* 2870 */ {I_VXORPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+12579, IF_AVX|IF_SANDYBRIDGE},
+ /* 2871 */ {I_VXORPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12586, IF_AVX|IF_SANDYBRIDGE},
+ /* 2872 */ {I_VXORPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+12593, IF_AVX|IF_SANDYBRIDGE},
+ /* 2873 */ {I_VZEROALL, 0, {0,0,0,0,0}, nasm_bytecodes+18151, IF_AVX|IF_SANDYBRIDGE},
+ /* 2874 */ {I_VZEROUPPER, 0, {0,0,0,0,0}, nasm_bytecodes+18157, IF_AVX|IF_SANDYBRIDGE},
+ /* 2875 */ {I_PCLMULLQLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3510, IF_SSE|IF_WESTMERE},
+ /* 2876 */ {I_PCLMULHQLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3519, IF_SSE|IF_WESTMERE},
+ /* 2877 */ {I_PCLMULLQHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3528, IF_SSE|IF_WESTMERE},
+ /* 2878 */ {I_PCLMULHQHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3537, IF_SSE|IF_WESTMERE},
+ /* 2879 */ {I_PCLMULQDQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5242, IF_SSE|IF_WESTMERE},
+ /* 2880 */ {I_VPCLMULLQLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+3546, IF_AVX|IF_SANDYBRIDGE},
+ /* 2881 */ {I_VPCLMULLQLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3555, IF_AVX|IF_SANDYBRIDGE},
+ /* 2882 */ {I_VPCLMULHQLQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+3564, IF_AVX|IF_SANDYBRIDGE},
+ /* 2883 */ {I_VPCLMULHQLQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3573, IF_AVX|IF_SANDYBRIDGE},
+ /* 2884 */ {I_VPCLMULLQHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+3582, IF_AVX|IF_SANDYBRIDGE},
+ /* 2885 */ {I_VPCLMULLQHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3591, IF_AVX|IF_SANDYBRIDGE},
+ /* 2886 */ {I_VPCLMULHQHQDQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+3600, IF_AVX|IF_SANDYBRIDGE},
+ /* 2887 */ {I_VPCLMULHQHQDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+3609, IF_AVX|IF_SANDYBRIDGE},
+ /* 2888 */ {I_VPCLMULQDQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+5250, IF_AVX|IF_SANDYBRIDGE},
+ /* 2889 */ {I_VPCLMULQDQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5258, IF_AVX|IF_SANDYBRIDGE},
+ /* 2890 */ {I_VFMADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12600, IF_FMA|IF_FUTURE},
+ /* 2891 */ {I_VFMADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12607, IF_FMA|IF_FUTURE},
+ /* 2892 */ {I_VFMADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12614, IF_FMA|IF_FUTURE},
+ /* 2893 */ {I_VFMADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12621, IF_FMA|IF_FUTURE},
+ /* 2894 */ {I_VFMADD312PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12600, IF_FMA|IF_FUTURE},
+ /* 2895 */ {I_VFMADD312PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12607, IF_FMA|IF_FUTURE},
+ /* 2896 */ {I_VFMADD312PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12614, IF_FMA|IF_FUTURE},
+ /* 2897 */ {I_VFMADD312PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12621, IF_FMA|IF_FUTURE},
+ /* 2898 */ {I_VFMADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12628, IF_FMA|IF_FUTURE},
+ /* 2899 */ {I_VFMADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12635, IF_FMA|IF_FUTURE},
+ /* 2900 */ {I_VFMADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12642, IF_FMA|IF_FUTURE},
+ /* 2901 */ {I_VFMADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12649, IF_FMA|IF_FUTURE},
+ /* 2902 */ {I_VFMADD123PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12628, IF_FMA|IF_FUTURE},
+ /* 2903 */ {I_VFMADD123PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12635, IF_FMA|IF_FUTURE},
+ /* 2904 */ {I_VFMADD123PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12642, IF_FMA|IF_FUTURE},
+ /* 2905 */ {I_VFMADD123PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12649, IF_FMA|IF_FUTURE},
+ /* 2906 */ {I_VFMADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12656, IF_FMA|IF_FUTURE},
+ /* 2907 */ {I_VFMADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12663, IF_FMA|IF_FUTURE},
+ /* 2908 */ {I_VFMADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12670, IF_FMA|IF_FUTURE},
+ /* 2909 */ {I_VFMADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12677, IF_FMA|IF_FUTURE},
+ /* 2910 */ {I_VFMADD321PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12656, IF_FMA|IF_FUTURE},
+ /* 2911 */ {I_VFMADD321PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12663, IF_FMA|IF_FUTURE},
+ /* 2912 */ {I_VFMADD321PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12670, IF_FMA|IF_FUTURE},
+ /* 2913 */ {I_VFMADD321PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12677, IF_FMA|IF_FUTURE},
+ /* 2914 */ {I_VFMADDSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12684, IF_FMA|IF_FUTURE},
+ /* 2915 */ {I_VFMADDSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12691, IF_FMA|IF_FUTURE},
+ /* 2916 */ {I_VFMADDSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12698, IF_FMA|IF_FUTURE},
+ /* 2917 */ {I_VFMADDSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12705, IF_FMA|IF_FUTURE},
+ /* 2918 */ {I_VFMADDSUB312PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12684, IF_FMA|IF_FUTURE},
+ /* 2919 */ {I_VFMADDSUB312PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12691, IF_FMA|IF_FUTURE},
+ /* 2920 */ {I_VFMADDSUB312PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12698, IF_FMA|IF_FUTURE},
+ /* 2921 */ {I_VFMADDSUB312PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12705, IF_FMA|IF_FUTURE},
+ /* 2922 */ {I_VFMADDSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12712, IF_FMA|IF_FUTURE},
+ /* 2923 */ {I_VFMADDSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12719, IF_FMA|IF_FUTURE},
+ /* 2924 */ {I_VFMADDSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12726, IF_FMA|IF_FUTURE},
+ /* 2925 */ {I_VFMADDSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12733, IF_FMA|IF_FUTURE},
+ /* 2926 */ {I_VFMADDSUB123PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12712, IF_FMA|IF_FUTURE},
+ /* 2927 */ {I_VFMADDSUB123PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12719, IF_FMA|IF_FUTURE},
+ /* 2928 */ {I_VFMADDSUB123PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12726, IF_FMA|IF_FUTURE},
+ /* 2929 */ {I_VFMADDSUB123PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12733, IF_FMA|IF_FUTURE},
+ /* 2930 */ {I_VFMADDSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12740, IF_FMA|IF_FUTURE},
+ /* 2931 */ {I_VFMADDSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12747, IF_FMA|IF_FUTURE},
+ /* 2932 */ {I_VFMADDSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12754, IF_FMA|IF_FUTURE},
+ /* 2933 */ {I_VFMADDSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12761, IF_FMA|IF_FUTURE},
+ /* 2934 */ {I_VFMADDSUB321PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12740, IF_FMA|IF_FUTURE},
+ /* 2935 */ {I_VFMADDSUB321PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12747, IF_FMA|IF_FUTURE},
+ /* 2936 */ {I_VFMADDSUB321PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12754, IF_FMA|IF_FUTURE},
+ /* 2937 */ {I_VFMADDSUB321PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12761, IF_FMA|IF_FUTURE},
+ /* 2938 */ {I_VFMSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12768, IF_FMA|IF_FUTURE},
+ /* 2939 */ {I_VFMSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12775, IF_FMA|IF_FUTURE},
+ /* 2940 */ {I_VFMSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12782, IF_FMA|IF_FUTURE},
+ /* 2941 */ {I_VFMSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12789, IF_FMA|IF_FUTURE},
+ /* 2942 */ {I_VFMSUB312PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12768, IF_FMA|IF_FUTURE},
+ /* 2943 */ {I_VFMSUB312PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12775, IF_FMA|IF_FUTURE},
+ /* 2944 */ {I_VFMSUB312PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12782, IF_FMA|IF_FUTURE},
+ /* 2945 */ {I_VFMSUB312PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12789, IF_FMA|IF_FUTURE},
+ /* 2946 */ {I_VFMSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12796, IF_FMA|IF_FUTURE},
+ /* 2947 */ {I_VFMSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12803, IF_FMA|IF_FUTURE},
+ /* 2948 */ {I_VFMSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12810, IF_FMA|IF_FUTURE},
+ /* 2949 */ {I_VFMSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12817, IF_FMA|IF_FUTURE},
+ /* 2950 */ {I_VFMSUB123PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12796, IF_FMA|IF_FUTURE},
+ /* 2951 */ {I_VFMSUB123PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12803, IF_FMA|IF_FUTURE},
+ /* 2952 */ {I_VFMSUB123PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12810, IF_FMA|IF_FUTURE},
+ /* 2953 */ {I_VFMSUB123PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12817, IF_FMA|IF_FUTURE},
+ /* 2954 */ {I_VFMSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12824, IF_FMA|IF_FUTURE},
+ /* 2955 */ {I_VFMSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12831, IF_FMA|IF_FUTURE},
+ /* 2956 */ {I_VFMSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12838, IF_FMA|IF_FUTURE},
+ /* 2957 */ {I_VFMSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12845, IF_FMA|IF_FUTURE},
+ /* 2958 */ {I_VFMSUB321PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12824, IF_FMA|IF_FUTURE},
+ /* 2959 */ {I_VFMSUB321PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12831, IF_FMA|IF_FUTURE},
+ /* 2960 */ {I_VFMSUB321PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12838, IF_FMA|IF_FUTURE},
+ /* 2961 */ {I_VFMSUB321PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12845, IF_FMA|IF_FUTURE},
+ /* 2962 */ {I_VFMSUBADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12852, IF_FMA|IF_FUTURE},
+ /* 2963 */ {I_VFMSUBADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12859, IF_FMA|IF_FUTURE},
+ /* 2964 */ {I_VFMSUBADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12866, IF_FMA|IF_FUTURE},
+ /* 2965 */ {I_VFMSUBADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12873, IF_FMA|IF_FUTURE},
+ /* 2966 */ {I_VFMSUBADD312PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12852, IF_FMA|IF_FUTURE},
+ /* 2967 */ {I_VFMSUBADD312PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12859, IF_FMA|IF_FUTURE},
+ /* 2968 */ {I_VFMSUBADD312PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12866, IF_FMA|IF_FUTURE},
+ /* 2969 */ {I_VFMSUBADD312PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12873, IF_FMA|IF_FUTURE},
+ /* 2970 */ {I_VFMSUBADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12880, IF_FMA|IF_FUTURE},
+ /* 2971 */ {I_VFMSUBADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12887, IF_FMA|IF_FUTURE},
+ /* 2972 */ {I_VFMSUBADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12894, IF_FMA|IF_FUTURE},
+ /* 2973 */ {I_VFMSUBADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12901, IF_FMA|IF_FUTURE},
+ /* 2974 */ {I_VFMSUBADD123PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12880, IF_FMA|IF_FUTURE},
+ /* 2975 */ {I_VFMSUBADD123PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12887, IF_FMA|IF_FUTURE},
+ /* 2976 */ {I_VFMSUBADD123PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12894, IF_FMA|IF_FUTURE},
+ /* 2977 */ {I_VFMSUBADD123PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12901, IF_FMA|IF_FUTURE},
+ /* 2978 */ {I_VFMSUBADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12908, IF_FMA|IF_FUTURE},
+ /* 2979 */ {I_VFMSUBADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12915, IF_FMA|IF_FUTURE},
+ /* 2980 */ {I_VFMSUBADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12922, IF_FMA|IF_FUTURE},
+ /* 2981 */ {I_VFMSUBADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12929, IF_FMA|IF_FUTURE},
+ /* 2982 */ {I_VFMSUBADD321PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12908, IF_FMA|IF_FUTURE},
+ /* 2983 */ {I_VFMSUBADD321PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12915, IF_FMA|IF_FUTURE},
+ /* 2984 */ {I_VFMSUBADD321PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12922, IF_FMA|IF_FUTURE},
+ /* 2985 */ {I_VFMSUBADD321PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12929, IF_FMA|IF_FUTURE},
+ /* 2986 */ {I_VFNMADD132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12936, IF_FMA|IF_FUTURE},
+ /* 2987 */ {I_VFNMADD132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12943, IF_FMA|IF_FUTURE},
+ /* 2988 */ {I_VFNMADD132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12950, IF_FMA|IF_FUTURE},
+ /* 2989 */ {I_VFNMADD132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12957, IF_FMA|IF_FUTURE},
+ /* 2990 */ {I_VFNMADD312PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12936, IF_FMA|IF_FUTURE},
+ /* 2991 */ {I_VFNMADD312PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12943, IF_FMA|IF_FUTURE},
+ /* 2992 */ {I_VFNMADD312PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12950, IF_FMA|IF_FUTURE},
+ /* 2993 */ {I_VFNMADD312PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12957, IF_FMA|IF_FUTURE},
+ /* 2994 */ {I_VFNMADD213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12964, IF_FMA|IF_FUTURE},
+ /* 2995 */ {I_VFNMADD213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12971, IF_FMA|IF_FUTURE},
+ /* 2996 */ {I_VFNMADD213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12978, IF_FMA|IF_FUTURE},
+ /* 2997 */ {I_VFNMADD213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12985, IF_FMA|IF_FUTURE},
+ /* 2998 */ {I_VFNMADD123PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12964, IF_FMA|IF_FUTURE},
+ /* 2999 */ {I_VFNMADD123PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12971, IF_FMA|IF_FUTURE},
+ /* 3000 */ {I_VFNMADD123PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12978, IF_FMA|IF_FUTURE},
+ /* 3001 */ {I_VFNMADD123PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12985, IF_FMA|IF_FUTURE},
+ /* 3002 */ {I_VFNMADD231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12992, IF_FMA|IF_FUTURE},
+ /* 3003 */ {I_VFNMADD231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12999, IF_FMA|IF_FUTURE},
+ /* 3004 */ {I_VFNMADD231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13006, IF_FMA|IF_FUTURE},
+ /* 3005 */ {I_VFNMADD231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13013, IF_FMA|IF_FUTURE},
+ /* 3006 */ {I_VFNMADD321PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+12992, IF_FMA|IF_FUTURE},
+ /* 3007 */ {I_VFNMADD321PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+12999, IF_FMA|IF_FUTURE},
+ /* 3008 */ {I_VFNMADD321PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13006, IF_FMA|IF_FUTURE},
+ /* 3009 */ {I_VFNMADD321PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13013, IF_FMA|IF_FUTURE},
+ /* 3010 */ {I_VFNMSUB132PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13020, IF_FMA|IF_FUTURE},
+ /* 3011 */ {I_VFNMSUB132PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13027, IF_FMA|IF_FUTURE},
+ /* 3012 */ {I_VFNMSUB132PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13034, IF_FMA|IF_FUTURE},
+ /* 3013 */ {I_VFNMSUB132PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13041, IF_FMA|IF_FUTURE},
+ /* 3014 */ {I_VFNMSUB312PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13020, IF_FMA|IF_FUTURE},
+ /* 3015 */ {I_VFNMSUB312PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13027, IF_FMA|IF_FUTURE},
+ /* 3016 */ {I_VFNMSUB312PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13034, IF_FMA|IF_FUTURE},
+ /* 3017 */ {I_VFNMSUB312PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13041, IF_FMA|IF_FUTURE},
+ /* 3018 */ {I_VFNMSUB213PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13048, IF_FMA|IF_FUTURE},
+ /* 3019 */ {I_VFNMSUB213PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13055, IF_FMA|IF_FUTURE},
+ /* 3020 */ {I_VFNMSUB213PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13062, IF_FMA|IF_FUTURE},
+ /* 3021 */ {I_VFNMSUB213PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13069, IF_FMA|IF_FUTURE},
+ /* 3022 */ {I_VFNMSUB123PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13048, IF_FMA|IF_FUTURE},
+ /* 3023 */ {I_VFNMSUB123PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13055, IF_FMA|IF_FUTURE},
+ /* 3024 */ {I_VFNMSUB123PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13062, IF_FMA|IF_FUTURE},
+ /* 3025 */ {I_VFNMSUB123PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13069, IF_FMA|IF_FUTURE},
+ /* 3026 */ {I_VFNMSUB231PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13076, IF_FMA|IF_FUTURE},
+ /* 3027 */ {I_VFNMSUB231PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13083, IF_FMA|IF_FUTURE},
+ /* 3028 */ {I_VFNMSUB231PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13090, IF_FMA|IF_FUTURE},
+ /* 3029 */ {I_VFNMSUB231PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13097, IF_FMA|IF_FUTURE},
+ /* 3030 */ {I_VFNMSUB321PS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13076, IF_FMA|IF_FUTURE},
+ /* 3031 */ {I_VFNMSUB321PS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13083, IF_FMA|IF_FUTURE},
+ /* 3032 */ {I_VFNMSUB321PD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13090, IF_FMA|IF_FUTURE},
+ /* 3033 */ {I_VFNMSUB321PD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+13097, IF_FMA|IF_FUTURE},
+ /* 3034 */ {I_VFMADD132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13104, IF_FMA|IF_FUTURE},
+ /* 3035 */ {I_VFMADD132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13111, IF_FMA|IF_FUTURE},
+ /* 3036 */ {I_VFMADD312SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13104, IF_FMA|IF_FUTURE},
+ /* 3037 */ {I_VFMADD312SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13111, IF_FMA|IF_FUTURE},
+ /* 3038 */ {I_VFMADD213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13118, IF_FMA|IF_FUTURE},
+ /* 3039 */ {I_VFMADD213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13125, IF_FMA|IF_FUTURE},
+ /* 3040 */ {I_VFMADD123SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13118, IF_FMA|IF_FUTURE},
+ /* 3041 */ {I_VFMADD123SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13125, IF_FMA|IF_FUTURE},
+ /* 3042 */ {I_VFMADD231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13132, IF_FMA|IF_FUTURE},
+ /* 3043 */ {I_VFMADD231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13139, IF_FMA|IF_FUTURE},
+ /* 3044 */ {I_VFMADD321SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13132, IF_FMA|IF_FUTURE},
+ /* 3045 */ {I_VFMADD321SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13139, IF_FMA|IF_FUTURE},
+ /* 3046 */ {I_VFMSUB132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13146, IF_FMA|IF_FUTURE},
+ /* 3047 */ {I_VFMSUB132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13153, IF_FMA|IF_FUTURE},
+ /* 3048 */ {I_VFMSUB312SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13146, IF_FMA|IF_FUTURE},
+ /* 3049 */ {I_VFMSUB312SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13153, IF_FMA|IF_FUTURE},
+ /* 3050 */ {I_VFMSUB213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13160, IF_FMA|IF_FUTURE},
+ /* 3051 */ {I_VFMSUB213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13167, IF_FMA|IF_FUTURE},
+ /* 3052 */ {I_VFMSUB123SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13160, IF_FMA|IF_FUTURE},
+ /* 3053 */ {I_VFMSUB123SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13167, IF_FMA|IF_FUTURE},
+ /* 3054 */ {I_VFMSUB231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13174, IF_FMA|IF_FUTURE},
+ /* 3055 */ {I_VFMSUB231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13181, IF_FMA|IF_FUTURE},
+ /* 3056 */ {I_VFMSUB321SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13174, IF_FMA|IF_FUTURE},
+ /* 3057 */ {I_VFMSUB321SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13181, IF_FMA|IF_FUTURE},
+ /* 3058 */ {I_VFNMADD132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13188, IF_FMA|IF_FUTURE},
+ /* 3059 */ {I_VFNMADD132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13195, IF_FMA|IF_FUTURE},
+ /* 3060 */ {I_VFNMADD312SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13188, IF_FMA|IF_FUTURE},
+ /* 3061 */ {I_VFNMADD312SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13195, IF_FMA|IF_FUTURE},
+ /* 3062 */ {I_VFNMADD213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13202, IF_FMA|IF_FUTURE},
+ /* 3063 */ {I_VFNMADD213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13209, IF_FMA|IF_FUTURE},
+ /* 3064 */ {I_VFNMADD123SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13202, IF_FMA|IF_FUTURE},
+ /* 3065 */ {I_VFNMADD123SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13209, IF_FMA|IF_FUTURE},
+ /* 3066 */ {I_VFNMADD231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13216, IF_FMA|IF_FUTURE},
+ /* 3067 */ {I_VFNMADD231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13223, IF_FMA|IF_FUTURE},
+ /* 3068 */ {I_VFNMADD321SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13216, IF_FMA|IF_FUTURE},
+ /* 3069 */ {I_VFNMADD321SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13223, IF_FMA|IF_FUTURE},
+ /* 3070 */ {I_VFNMSUB132SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13230, IF_FMA|IF_FUTURE},
+ /* 3071 */ {I_VFNMSUB132SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13237, IF_FMA|IF_FUTURE},
+ /* 3072 */ {I_VFNMSUB312SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13230, IF_FMA|IF_FUTURE},
+ /* 3073 */ {I_VFNMSUB312SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13237, IF_FMA|IF_FUTURE},
+ /* 3074 */ {I_VFNMSUB213SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13244, IF_FMA|IF_FUTURE},
+ /* 3075 */ {I_VFNMSUB213SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13251, IF_FMA|IF_FUTURE},
+ /* 3076 */ {I_VFNMSUB123SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13244, IF_FMA|IF_FUTURE},
+ /* 3077 */ {I_VFNMSUB123SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13251, IF_FMA|IF_FUTURE},
+ /* 3078 */ {I_VFNMSUB231SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13258, IF_FMA|IF_FUTURE},
+ /* 3079 */ {I_VFNMSUB231SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13265, IF_FMA|IF_FUTURE},
+ /* 3080 */ {I_VFNMSUB321SS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+13258, IF_FMA|IF_FUTURE},
+ /* 3081 */ {I_VFNMSUB321SD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+13265, IF_FMA|IF_FUTURE},
+ /* 3082 */ {I_RDFSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+13272, IF_LONG|IF_FUTURE},
+ /* 3083 */ {I_RDFSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+13279, IF_LONG|IF_FUTURE},
+ /* 3084 */ {I_RDGSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+13286, IF_LONG|IF_FUTURE},
+ /* 3085 */ {I_RDGSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+13293, IF_LONG|IF_FUTURE},
+ /* 3086 */ {I_RDRAND, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18163, IF_FUTURE},
+ /* 3087 */ {I_RDRAND, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18169, IF_FUTURE},
+ /* 3088 */ {I_RDRAND, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18175, IF_LONG|IF_FUTURE},
+ /* 3089 */ {I_WRFSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+13300, IF_LONG|IF_FUTURE},
+ /* 3090 */ {I_WRFSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+13307, IF_LONG|IF_FUTURE},
+ /* 3091 */ {I_WRGSBASE, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+13314, IF_LONG|IF_FUTURE},
+ /* 3092 */ {I_WRGSBASE, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+13321, IF_LONG|IF_FUTURE},
+ /* 3093 */ {I_VCVTPH2PS, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13328, IF_AVX|IF_FUTURE},
+ /* 3094 */ {I_VCVTPH2PS, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+13335, IF_AVX|IF_FUTURE},
+ /* 3095 */ {I_VCVTPS2PH, 3, {RM_XMM|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5266, IF_AVX|IF_FUTURE},
+ /* 3096 */ {I_VCVTPS2PH, 3, {RM_XMM|BITS64,XMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+5274, IF_AVX|IF_FUTURE},
+ /* 3097 */ {I_ADCX, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+5282, IF_FUTURE},
+ /* 3098 */ {I_ADCX, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+5290, IF_LONG|IF_FUTURE},
+ /* 3099 */ {I_ADOX, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+5298, IF_FUTURE},
+ /* 3100 */ {I_ADOX, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+5306, IF_LONG|IF_FUTURE},
+ /* 3101 */ {I_RDSEED, 1, {REG_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18181, IF_FUTURE},
+ /* 3102 */ {I_RDSEED, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18187, IF_FUTURE},
+ /* 3103 */ {I_RDSEED, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18193, IF_LONG|IF_FUTURE},
+ /* 3104 */ {I_CLAC, 0, {0,0,0,0,0}, nasm_bytecodes+21099, IF_PRIV|IF_FUTURE},
+ /* 3105 */ {I_STAC, 0, {0,0,0,0,0}, nasm_bytecodes+21104, IF_PRIV|IF_FUTURE},
+ /* 3106 */ {I_XSTORE, 0, {0,0,0,0,0}, nasm_bytecodes+21109, IF_PENT|IF_CYRIX},
+ /* 3107 */ {I_XCRYPTECB, 0, {0,0,0,0,0}, nasm_bytecodes+18199, IF_PENT|IF_CYRIX},
+ /* 3108 */ {I_XCRYPTCBC, 0, {0,0,0,0,0}, nasm_bytecodes+18205, IF_PENT|IF_CYRIX},
+ /* 3109 */ {I_XCRYPTCTR, 0, {0,0,0,0,0}, nasm_bytecodes+18211, IF_PENT|IF_CYRIX},
+ /* 3110 */ {I_XCRYPTCFB, 0, {0,0,0,0,0}, nasm_bytecodes+18217, IF_PENT|IF_CYRIX},
+ /* 3111 */ {I_XCRYPTOFB, 0, {0,0,0,0,0}, nasm_bytecodes+18223, IF_PENT|IF_CYRIX},
+ /* 3112 */ {I_MONTMUL, 0, {0,0,0,0,0}, nasm_bytecodes+18229, IF_PENT|IF_CYRIX},
+ /* 3113 */ {I_XSHA1, 0, {0,0,0,0,0}, nasm_bytecodes+18235, IF_PENT|IF_CYRIX},
+ /* 3114 */ {I_XSHA256, 0, {0,0,0,0,0}, nasm_bytecodes+18241, IF_PENT|IF_CYRIX},
+ /* 3115 */ {I_LLWPCB, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+13342, IF_AMD|IF_386},
+ /* 3116 */ {I_LLWPCB, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+13349, IF_AMD|IF_X64},
+ /* 3117 */ {I_SLWPCB, 1, {REG_GPR|BITS32,0,0,0,0}, nasm_bytecodes+13356, IF_AMD|IF_386},
+ /* 3118 */ {I_SLWPCB, 1, {REG_GPR|BITS64,0,0,0,0}, nasm_bytecodes+13363, IF_AMD|IF_X64},
+ /* 3119 */ {I_LWPVAL, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+5314, IF_AMD|IF_386},
+ /* 3120 */ {I_LWPVAL, 3, {REG_GPR|BITS64,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+5322, IF_AMD|IF_X64},
+ /* 3121 */ {I_LWPINS, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+5330, IF_AMD|IF_386},
+ /* 3122 */ {I_LWPINS, 3, {REG_GPR|BITS64,RM_GPR|BITS32,IMMEDIATE|BITS32,0,0}, nasm_bytecodes+5338, IF_AMD|IF_X64},
+ /* 3123 */ {I_VFMADDPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5346, IF_AMD|IF_SSE5},
+ /* 3124 */ {I_VFMADDPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5354, IF_AMD|IF_SSE5},
+ /* 3125 */ {I_VFMADDPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+5362, IF_AMD|IF_SSE5},
+ /* 3126 */ {I_VFMADDPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+5370, IF_AMD|IF_SSE5},
+ /* 3127 */ {I_VFMADDPD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+5378, IF_AMD|IF_SSE5},
+ /* 3128 */ {I_VFMADDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+5386, IF_AMD|IF_SSE5},
+ /* 3129 */ {I_VFMADDPD, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+5394, IF_AMD|IF_SSE5},
+ /* 3130 */ {I_VFMADDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+5402, IF_AMD|IF_SSE5},
+ /* 3131 */ {I_VFMADDPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5410, IF_AMD|IF_SSE5},
+ /* 3132 */ {I_VFMADDPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5418, IF_AMD|IF_SSE5},
+ /* 3133 */ {I_VFMADDPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+5426, IF_AMD|IF_SSE5},
+ /* 3134 */ {I_VFMADDPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+5434, IF_AMD|IF_SSE5},
+ /* 3135 */ {I_VFMADDPS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+5442, IF_AMD|IF_SSE5},
+ /* 3136 */ {I_VFMADDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+5450, IF_AMD|IF_SSE5},
+ /* 3137 */ {I_VFMADDPS, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+5458, IF_AMD|IF_SSE5},
+ /* 3138 */ {I_VFMADDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+5466, IF_AMD|IF_SSE5},
+ /* 3139 */ {I_VFMADDSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,XMMREG,0}, nasm_bytecodes+5474, IF_AMD|IF_SSE5},
+ /* 3140 */ {I_VFMADDSD, 3, {XMMREG,RM_XMM|BITS64,XMMREG,0,0}, nasm_bytecodes+5482, IF_AMD|IF_SSE5},
+ /* 3141 */ {I_VFMADDSD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS64,0}, nasm_bytecodes+5490, IF_AMD|IF_SSE5},
+ /* 3142 */ {I_VFMADDSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+5498, IF_AMD|IF_SSE5},
+ /* 3143 */ {I_VFMADDSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,XMMREG,0}, nasm_bytecodes+5506, IF_AMD|IF_SSE5},
+ /* 3144 */ {I_VFMADDSS, 3, {XMMREG,RM_XMM|BITS32,XMMREG,0,0}, nasm_bytecodes+5514, IF_AMD|IF_SSE5},
+ /* 3145 */ {I_VFMADDSS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS32,0}, nasm_bytecodes+5522, IF_AMD|IF_SSE5},
+ /* 3146 */ {I_VFMADDSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+5530, IF_AMD|IF_SSE5},
+ /* 3147 */ {I_VFMADDSUBPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5538, IF_AMD|IF_SSE5},
+ /* 3148 */ {I_VFMADDSUBPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5546, IF_AMD|IF_SSE5},
+ /* 3149 */ {I_VFMADDSUBPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+5554, IF_AMD|IF_SSE5},
+ /* 3150 */ {I_VFMADDSUBPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+5562, IF_AMD|IF_SSE5},
+ /* 3151 */ {I_VFMADDSUBPD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+5570, IF_AMD|IF_SSE5},
+ /* 3152 */ {I_VFMADDSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+5578, IF_AMD|IF_SSE5},
+ /* 3153 */ {I_VFMADDSUBPD, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+5586, IF_AMD|IF_SSE5},
+ /* 3154 */ {I_VFMADDSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+5594, IF_AMD|IF_SSE5},
+ /* 3155 */ {I_VFMADDSUBPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5602, IF_AMD|IF_SSE5},
+ /* 3156 */ {I_VFMADDSUBPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5610, IF_AMD|IF_SSE5},
+ /* 3157 */ {I_VFMADDSUBPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+5618, IF_AMD|IF_SSE5},
+ /* 3158 */ {I_VFMADDSUBPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+5626, IF_AMD|IF_SSE5},
+ /* 3159 */ {I_VFMADDSUBPS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+5634, IF_AMD|IF_SSE5},
+ /* 3160 */ {I_VFMADDSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+5642, IF_AMD|IF_SSE5},
+ /* 3161 */ {I_VFMADDSUBPS, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+5650, IF_AMD|IF_SSE5},
+ /* 3162 */ {I_VFMADDSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+5658, IF_AMD|IF_SSE5},
+ /* 3163 */ {I_VFMSUBADDPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5666, IF_AMD|IF_SSE5},
+ /* 3164 */ {I_VFMSUBADDPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5674, IF_AMD|IF_SSE5},
+ /* 3165 */ {I_VFMSUBADDPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+5682, IF_AMD|IF_SSE5},
+ /* 3166 */ {I_VFMSUBADDPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+5690, IF_AMD|IF_SSE5},
+ /* 3167 */ {I_VFMSUBADDPD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+5698, IF_AMD|IF_SSE5},
+ /* 3168 */ {I_VFMSUBADDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+5706, IF_AMD|IF_SSE5},
+ /* 3169 */ {I_VFMSUBADDPD, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+5714, IF_AMD|IF_SSE5},
+ /* 3170 */ {I_VFMSUBADDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+5722, IF_AMD|IF_SSE5},
+ /* 3171 */ {I_VFMSUBADDPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5730, IF_AMD|IF_SSE5},
+ /* 3172 */ {I_VFMSUBADDPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5738, IF_AMD|IF_SSE5},
+ /* 3173 */ {I_VFMSUBADDPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+5746, IF_AMD|IF_SSE5},
+ /* 3174 */ {I_VFMSUBADDPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+5754, IF_AMD|IF_SSE5},
+ /* 3175 */ {I_VFMSUBADDPS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+5762, IF_AMD|IF_SSE5},
+ /* 3176 */ {I_VFMSUBADDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+5770, IF_AMD|IF_SSE5},
+ /* 3177 */ {I_VFMSUBADDPS, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+5778, IF_AMD|IF_SSE5},
+ /* 3178 */ {I_VFMSUBADDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+5786, IF_AMD|IF_SSE5},
+ /* 3179 */ {I_VFMSUBPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5794, IF_AMD|IF_SSE5},
+ /* 3180 */ {I_VFMSUBPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5802, IF_AMD|IF_SSE5},
+ /* 3181 */ {I_VFMSUBPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+5810, IF_AMD|IF_SSE5},
+ /* 3182 */ {I_VFMSUBPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+5818, IF_AMD|IF_SSE5},
+ /* 3183 */ {I_VFMSUBPD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+5826, IF_AMD|IF_SSE5},
+ /* 3184 */ {I_VFMSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+5834, IF_AMD|IF_SSE5},
+ /* 3185 */ {I_VFMSUBPD, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+5842, IF_AMD|IF_SSE5},
+ /* 3186 */ {I_VFMSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+5850, IF_AMD|IF_SSE5},
+ /* 3187 */ {I_VFMSUBPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5858, IF_AMD|IF_SSE5},
+ /* 3188 */ {I_VFMSUBPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5866, IF_AMD|IF_SSE5},
+ /* 3189 */ {I_VFMSUBPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+5874, IF_AMD|IF_SSE5},
+ /* 3190 */ {I_VFMSUBPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+5882, IF_AMD|IF_SSE5},
+ /* 3191 */ {I_VFMSUBPS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+5890, IF_AMD|IF_SSE5},
+ /* 3192 */ {I_VFMSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+5898, IF_AMD|IF_SSE5},
+ /* 3193 */ {I_VFMSUBPS, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+5906, IF_AMD|IF_SSE5},
+ /* 3194 */ {I_VFMSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+5914, IF_AMD|IF_SSE5},
+ /* 3195 */ {I_VFMSUBSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,XMMREG,0}, nasm_bytecodes+5922, IF_AMD|IF_SSE5},
+ /* 3196 */ {I_VFMSUBSD, 3, {XMMREG,RM_XMM|BITS64,XMMREG,0,0}, nasm_bytecodes+5930, IF_AMD|IF_SSE5},
+ /* 3197 */ {I_VFMSUBSD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS64,0}, nasm_bytecodes+5938, IF_AMD|IF_SSE5},
+ /* 3198 */ {I_VFMSUBSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+5946, IF_AMD|IF_SSE5},
+ /* 3199 */ {I_VFMSUBSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,XMMREG,0}, nasm_bytecodes+5954, IF_AMD|IF_SSE5},
+ /* 3200 */ {I_VFMSUBSS, 3, {XMMREG,RM_XMM|BITS32,XMMREG,0,0}, nasm_bytecodes+5962, IF_AMD|IF_SSE5},
+ /* 3201 */ {I_VFMSUBSS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS32,0}, nasm_bytecodes+5970, IF_AMD|IF_SSE5},
+ /* 3202 */ {I_VFMSUBSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+5978, IF_AMD|IF_SSE5},
+ /* 3203 */ {I_VFNMADDPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+5986, IF_AMD|IF_SSE5},
+ /* 3204 */ {I_VFNMADDPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+5994, IF_AMD|IF_SSE5},
+ /* 3205 */ {I_VFNMADDPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+6002, IF_AMD|IF_SSE5},
+ /* 3206 */ {I_VFNMADDPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+6010, IF_AMD|IF_SSE5},
+ /* 3207 */ {I_VFNMADDPD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+6018, IF_AMD|IF_SSE5},
+ /* 3208 */ {I_VFNMADDPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+6026, IF_AMD|IF_SSE5},
+ /* 3209 */ {I_VFNMADDPD, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+6034, IF_AMD|IF_SSE5},
+ /* 3210 */ {I_VFNMADDPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+6042, IF_AMD|IF_SSE5},
+ /* 3211 */ {I_VFNMADDPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6050, IF_AMD|IF_SSE5},
+ /* 3212 */ {I_VFNMADDPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6058, IF_AMD|IF_SSE5},
+ /* 3213 */ {I_VFNMADDPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+6066, IF_AMD|IF_SSE5},
+ /* 3214 */ {I_VFNMADDPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+6074, IF_AMD|IF_SSE5},
+ /* 3215 */ {I_VFNMADDPS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+6082, IF_AMD|IF_SSE5},
+ /* 3216 */ {I_VFNMADDPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+6090, IF_AMD|IF_SSE5},
+ /* 3217 */ {I_VFNMADDPS, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+6098, IF_AMD|IF_SSE5},
+ /* 3218 */ {I_VFNMADDPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+6106, IF_AMD|IF_SSE5},
+ /* 3219 */ {I_VFNMADDSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,XMMREG,0}, nasm_bytecodes+6114, IF_AMD|IF_SSE5},
+ /* 3220 */ {I_VFNMADDSD, 3, {XMMREG,RM_XMM|BITS64,XMMREG,0,0}, nasm_bytecodes+6122, IF_AMD|IF_SSE5},
+ /* 3221 */ {I_VFNMADDSD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS64,0}, nasm_bytecodes+6130, IF_AMD|IF_SSE5},
+ /* 3222 */ {I_VFNMADDSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+6138, IF_AMD|IF_SSE5},
+ /* 3223 */ {I_VFNMADDSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,XMMREG,0}, nasm_bytecodes+6146, IF_AMD|IF_SSE5},
+ /* 3224 */ {I_VFNMADDSS, 3, {XMMREG,RM_XMM|BITS32,XMMREG,0,0}, nasm_bytecodes+6154, IF_AMD|IF_SSE5},
+ /* 3225 */ {I_VFNMADDSS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS32,0}, nasm_bytecodes+6162, IF_AMD|IF_SSE5},
+ /* 3226 */ {I_VFNMADDSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+6170, IF_AMD|IF_SSE5},
+ /* 3227 */ {I_VFNMSUBPD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6178, IF_AMD|IF_SSE5},
+ /* 3228 */ {I_VFNMSUBPD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6186, IF_AMD|IF_SSE5},
+ /* 3229 */ {I_VFNMSUBPD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+6194, IF_AMD|IF_SSE5},
+ /* 3230 */ {I_VFNMSUBPD, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+6202, IF_AMD|IF_SSE5},
+ /* 3231 */ {I_VFNMSUBPD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+6210, IF_AMD|IF_SSE5},
+ /* 3232 */ {I_VFNMSUBPD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+6218, IF_AMD|IF_SSE5},
+ /* 3233 */ {I_VFNMSUBPD, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+6226, IF_AMD|IF_SSE5},
+ /* 3234 */ {I_VFNMSUBPD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+6234, IF_AMD|IF_SSE5},
+ /* 3235 */ {I_VFNMSUBPS, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6242, IF_AMD|IF_SSE5},
+ /* 3236 */ {I_VFNMSUBPS, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6250, IF_AMD|IF_SSE5},
+ /* 3237 */ {I_VFNMSUBPS, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+6258, IF_AMD|IF_SSE5},
+ /* 3238 */ {I_VFNMSUBPS, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+6266, IF_AMD|IF_SSE5},
+ /* 3239 */ {I_VFNMSUBPS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+6274, IF_AMD|IF_SSE5},
+ /* 3240 */ {I_VFNMSUBPS, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+6282, IF_AMD|IF_SSE5},
+ /* 3241 */ {I_VFNMSUBPS, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+6290, IF_AMD|IF_SSE5},
+ /* 3242 */ {I_VFNMSUBPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+6298, IF_AMD|IF_SSE5},
+ /* 3243 */ {I_VFNMSUBSD, 4, {XMMREG,XMMREG,RM_XMM|BITS64,XMMREG,0}, nasm_bytecodes+6306, IF_AMD|IF_SSE5},
+ /* 3244 */ {I_VFNMSUBSD, 3, {XMMREG,RM_XMM|BITS64,XMMREG,0,0}, nasm_bytecodes+6314, IF_AMD|IF_SSE5},
+ /* 3245 */ {I_VFNMSUBSD, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS64,0}, nasm_bytecodes+6322, IF_AMD|IF_SSE5},
+ /* 3246 */ {I_VFNMSUBSD, 3, {XMMREG,XMMREG,RM_XMM|BITS64,0,0}, nasm_bytecodes+6330, IF_AMD|IF_SSE5},
+ /* 3247 */ {I_VFNMSUBSS, 4, {XMMREG,XMMREG,RM_XMM|BITS32,XMMREG,0}, nasm_bytecodes+6338, IF_AMD|IF_SSE5},
+ /* 3248 */ {I_VFNMSUBSS, 3, {XMMREG,RM_XMM|BITS32,XMMREG,0,0}, nasm_bytecodes+6346, IF_AMD|IF_SSE5},
+ /* 3249 */ {I_VFNMSUBSS, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS32,0}, nasm_bytecodes+6354, IF_AMD|IF_SSE5},
+ /* 3250 */ {I_VFNMSUBSS, 3, {XMMREG,XMMREG,RM_XMM|BITS32,0,0}, nasm_bytecodes+6362, IF_AMD|IF_SSE5},
+ /* 3251 */ {I_VFRCZPD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13370, IF_AMD|IF_SSE5},
+ /* 3252 */ {I_VFRCZPD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13377, IF_AMD|IF_SSE5},
+ /* 3253 */ {I_VFRCZPD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+13384, IF_AMD|IF_SSE5},
+ /* 3254 */ {I_VFRCZPD, 1, {YMMREG,0,0,0,0}, nasm_bytecodes+13391, IF_AMD|IF_SSE5},
+ /* 3255 */ {I_VFRCZPS, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13398, IF_AMD|IF_SSE5},
+ /* 3256 */ {I_VFRCZPS, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13405, IF_AMD|IF_SSE5},
+ /* 3257 */ {I_VFRCZPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+13412, IF_AMD|IF_SSE5},
+ /* 3258 */ {I_VFRCZPS, 1, {YMMREG,0,0,0,0}, nasm_bytecodes+13419, IF_AMD|IF_SSE5},
+ /* 3259 */ {I_VFRCZSD, 2, {XMMREG,RM_XMM|BITS64,0,0,0}, nasm_bytecodes+13426, IF_AMD|IF_SSE5},
+ /* 3260 */ {I_VFRCZSD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13433, IF_AMD|IF_SSE5},
+ /* 3261 */ {I_VFRCZSS, 2, {XMMREG,RM_XMM|BITS32,0,0,0}, nasm_bytecodes+13440, IF_AMD|IF_SSE5},
+ /* 3262 */ {I_VFRCZSS, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13447, IF_AMD|IF_SSE5},
+ /* 3263 */ {I_VPCMOV, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6370, IF_AMD|IF_SSE5},
+ /* 3264 */ {I_VPCMOV, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6378, IF_AMD|IF_SSE5},
+ /* 3265 */ {I_VPCMOV, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+6386, IF_AMD|IF_SSE5},
+ /* 3266 */ {I_VPCMOV, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+6394, IF_AMD|IF_SSE5},
+ /* 3267 */ {I_VPCMOV, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+6402, IF_AMD|IF_SSE5},
+ /* 3268 */ {I_VPCMOV, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+6410, IF_AMD|IF_SSE5},
+ /* 3269 */ {I_VPCMOV, 4, {YMMREG,YMMREG,YMMREG,RM_YMM|BITS256,0}, nasm_bytecodes+6418, IF_AMD|IF_SSE5},
+ /* 3270 */ {I_VPCMOV, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+6426, IF_AMD|IF_SSE5},
+ /* 3271 */ {I_VPCOMB, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6434, IF_AMD|IF_SSE5},
+ /* 3272 */ {I_VPCOMB, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6442, IF_AMD|IF_SSE5},
+ /* 3273 */ {I_VPCOMD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6450, IF_AMD|IF_SSE5},
+ /* 3274 */ {I_VPCOMD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6458, IF_AMD|IF_SSE5},
+ /* 3275 */ {I_VPCOMQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6466, IF_AMD|IF_SSE5},
+ /* 3276 */ {I_VPCOMQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6474, IF_AMD|IF_SSE5},
+ /* 3277 */ {I_VPCOMUB, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6482, IF_AMD|IF_SSE5},
+ /* 3278 */ {I_VPCOMUB, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6490, IF_AMD|IF_SSE5},
+ /* 3279 */ {I_VPCOMUD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6498, IF_AMD|IF_SSE5},
+ /* 3280 */ {I_VPCOMUD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6506, IF_AMD|IF_SSE5},
+ /* 3281 */ {I_VPCOMUQ, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6514, IF_AMD|IF_SSE5},
+ /* 3282 */ {I_VPCOMUQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6522, IF_AMD|IF_SSE5},
+ /* 3283 */ {I_VPCOMUW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6530, IF_AMD|IF_SSE5},
+ /* 3284 */ {I_VPCOMUW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6538, IF_AMD|IF_SSE5},
+ /* 3285 */ {I_VPCOMW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+6546, IF_AMD|IF_SSE5},
+ /* 3286 */ {I_VPCOMW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6554, IF_AMD|IF_SSE5},
+ /* 3287 */ {I_VPHADDBD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13454, IF_AMD|IF_SSE5},
+ /* 3288 */ {I_VPHADDBD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13461, IF_AMD|IF_SSE5},
+ /* 3289 */ {I_VPHADDBQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13468, IF_AMD|IF_SSE5},
+ /* 3290 */ {I_VPHADDBQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13475, IF_AMD|IF_SSE5},
+ /* 3291 */ {I_VPHADDBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13482, IF_AMD|IF_SSE5},
+ /* 3292 */ {I_VPHADDBW, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13489, IF_AMD|IF_SSE5},
+ /* 3293 */ {I_VPHADDDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13496, IF_AMD|IF_SSE5},
+ /* 3294 */ {I_VPHADDDQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13503, IF_AMD|IF_SSE5},
+ /* 3295 */ {I_VPHADDUBD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13510, IF_AMD|IF_SSE5},
+ /* 3296 */ {I_VPHADDUBD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13517, IF_AMD|IF_SSE5},
+ /* 3297 */ {I_VPHADDUBQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13524, IF_AMD|IF_SSE5},
+ /* 3298 */ {I_VPHADDUBQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13531, IF_AMD|IF_SSE5},
+ /* 3299 */ {I_VPHADDUBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13538, IF_AMD|IF_SSE5},
+ /* 3300 */ {I_VPHADDUBW, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13545, IF_AMD|IF_SSE5},
+ /* 3301 */ {I_VPHADDUDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13552, IF_AMD|IF_SSE5},
+ /* 3302 */ {I_VPHADDUDQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13559, IF_AMD|IF_SSE5},
+ /* 3303 */ {I_VPHADDUWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13566, IF_AMD|IF_SSE5},
+ /* 3304 */ {I_VPHADDUWD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13573, IF_AMD|IF_SSE5},
+ /* 3305 */ {I_VPHADDUWQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13580, IF_AMD|IF_SSE5},
+ /* 3306 */ {I_VPHADDUWQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13587, IF_AMD|IF_SSE5},
+ /* 3307 */ {I_VPHADDWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13594, IF_AMD|IF_SSE5},
+ /* 3308 */ {I_VPHADDWD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13601, IF_AMD|IF_SSE5},
+ /* 3309 */ {I_VPHADDWQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13608, IF_AMD|IF_SSE5},
+ /* 3310 */ {I_VPHADDWQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13615, IF_AMD|IF_SSE5},
+ /* 3311 */ {I_VPHSUBBW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13622, IF_AMD|IF_SSE5},
+ /* 3312 */ {I_VPHSUBBW, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13629, IF_AMD|IF_SSE5},
+ /* 3313 */ {I_VPHSUBDQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13636, IF_AMD|IF_SSE5},
+ /* 3314 */ {I_VPHSUBDQ, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13643, IF_AMD|IF_SSE5},
+ /* 3315 */ {I_VPHSUBWD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13650, IF_AMD|IF_SSE5},
+ /* 3316 */ {I_VPHSUBWD, 1, {XMMREG,0,0,0,0}, nasm_bytecodes+13657, IF_AMD|IF_SSE5},
+ /* 3317 */ {I_VPMACSDD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6562, IF_AMD|IF_SSE5},
+ /* 3318 */ {I_VPMACSDD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6570, IF_AMD|IF_SSE5},
+ /* 3319 */ {I_VPMACSDQH, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6578, IF_AMD|IF_SSE5},
+ /* 3320 */ {I_VPMACSDQH, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6586, IF_AMD|IF_SSE5},
+ /* 3321 */ {I_VPMACSDQL, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6594, IF_AMD|IF_SSE5},
+ /* 3322 */ {I_VPMACSDQL, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6602, IF_AMD|IF_SSE5},
+ /* 3323 */ {I_VPMACSSDD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6610, IF_AMD|IF_SSE5},
+ /* 3324 */ {I_VPMACSSDD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6618, IF_AMD|IF_SSE5},
+ /* 3325 */ {I_VPMACSSDQH, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6626, IF_AMD|IF_SSE5},
+ /* 3326 */ {I_VPMACSSDQH, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6634, IF_AMD|IF_SSE5},
+ /* 3327 */ {I_VPMACSSDQL, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6642, IF_AMD|IF_SSE5},
+ /* 3328 */ {I_VPMACSSDQL, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6650, IF_AMD|IF_SSE5},
+ /* 3329 */ {I_VPMACSSWD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6658, IF_AMD|IF_SSE5},
+ /* 3330 */ {I_VPMACSSWD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6666, IF_AMD|IF_SSE5},
+ /* 3331 */ {I_VPMACSSWW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6674, IF_AMD|IF_SSE5},
+ /* 3332 */ {I_VPMACSSWW, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6682, IF_AMD|IF_SSE5},
+ /* 3333 */ {I_VPMACSWD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6690, IF_AMD|IF_SSE5},
+ /* 3334 */ {I_VPMACSWD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6698, IF_AMD|IF_SSE5},
+ /* 3335 */ {I_VPMACSWW, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6706, IF_AMD|IF_SSE5},
+ /* 3336 */ {I_VPMACSWW, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6714, IF_AMD|IF_SSE5},
+ /* 3337 */ {I_VPMADCSSWD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6722, IF_AMD|IF_SSE5},
+ /* 3338 */ {I_VPMADCSSWD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6730, IF_AMD|IF_SSE5},
+ /* 3339 */ {I_VPMADCSWD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6738, IF_AMD|IF_SSE5},
+ /* 3340 */ {I_VPMADCSWD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6746, IF_AMD|IF_SSE5},
+ /* 3341 */ {I_VPPERM, 4, {XMMREG,XMMREG,XMMREG,RM_XMM|BITS128,0}, nasm_bytecodes+6754, IF_AMD|IF_SSE5},
+ /* 3342 */ {I_VPPERM, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+6762, IF_AMD|IF_SSE5},
+ /* 3343 */ {I_VPPERM, 4, {XMMREG,XMMREG,RM_XMM|BITS128,XMMREG,0}, nasm_bytecodes+6770, IF_AMD|IF_SSE5},
+ /* 3344 */ {I_VPPERM, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+6778, IF_AMD|IF_SSE5},
+ /* 3345 */ {I_VPROTB, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13664, IF_AMD|IF_SSE5},
+ /* 3346 */ {I_VPROTB, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13671, IF_AMD|IF_SSE5},
+ /* 3347 */ {I_VPROTB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13678, IF_AMD|IF_SSE5},
+ /* 3348 */ {I_VPROTB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13685, IF_AMD|IF_SSE5},
+ /* 3349 */ {I_VPROTB, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6786, IF_AMD|IF_SSE5},
+ /* 3350 */ {I_VPROTB, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6794, IF_AMD|IF_SSE5},
+ /* 3351 */ {I_VPROTD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13692, IF_AMD|IF_SSE5},
+ /* 3352 */ {I_VPROTD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13699, IF_AMD|IF_SSE5},
+ /* 3353 */ {I_VPROTD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13706, IF_AMD|IF_SSE5},
+ /* 3354 */ {I_VPROTD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13713, IF_AMD|IF_SSE5},
+ /* 3355 */ {I_VPROTD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6802, IF_AMD|IF_SSE5},
+ /* 3356 */ {I_VPROTD, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6810, IF_AMD|IF_SSE5},
+ /* 3357 */ {I_VPROTQ, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13720, IF_AMD|IF_SSE5},
+ /* 3358 */ {I_VPROTQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13727, IF_AMD|IF_SSE5},
+ /* 3359 */ {I_VPROTQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13734, IF_AMD|IF_SSE5},
+ /* 3360 */ {I_VPROTQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13741, IF_AMD|IF_SSE5},
+ /* 3361 */ {I_VPROTQ, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6818, IF_AMD|IF_SSE5},
+ /* 3362 */ {I_VPROTQ, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6826, IF_AMD|IF_SSE5},
+ /* 3363 */ {I_VPROTW, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13748, IF_AMD|IF_SSE5},
+ /* 3364 */ {I_VPROTW, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13755, IF_AMD|IF_SSE5},
+ /* 3365 */ {I_VPROTW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13762, IF_AMD|IF_SSE5},
+ /* 3366 */ {I_VPROTW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13769, IF_AMD|IF_SSE5},
+ /* 3367 */ {I_VPROTW, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6834, IF_AMD|IF_SSE5},
+ /* 3368 */ {I_VPROTW, 2, {XMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6842, IF_AMD|IF_SSE5},
+ /* 3369 */ {I_VPSHAB, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13776, IF_AMD|IF_SSE5},
+ /* 3370 */ {I_VPSHAB, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13783, IF_AMD|IF_SSE5},
+ /* 3371 */ {I_VPSHAB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13790, IF_AMD|IF_SSE5},
+ /* 3372 */ {I_VPSHAB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13797, IF_AMD|IF_SSE5},
+ /* 3373 */ {I_VPSHAD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13804, IF_AMD|IF_SSE5},
+ /* 3374 */ {I_VPSHAD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13811, IF_AMD|IF_SSE5},
+ /* 3375 */ {I_VPSHAD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13818, IF_AMD|IF_SSE5},
+ /* 3376 */ {I_VPSHAD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13825, IF_AMD|IF_SSE5},
+ /* 3377 */ {I_VPSHAQ, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13832, IF_AMD|IF_SSE5},
+ /* 3378 */ {I_VPSHAQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13839, IF_AMD|IF_SSE5},
+ /* 3379 */ {I_VPSHAQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13846, IF_AMD|IF_SSE5},
+ /* 3380 */ {I_VPSHAQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13853, IF_AMD|IF_SSE5},
+ /* 3381 */ {I_VPSHAW, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13860, IF_AMD|IF_SSE5},
+ /* 3382 */ {I_VPSHAW, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13867, IF_AMD|IF_SSE5},
+ /* 3383 */ {I_VPSHAW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13874, IF_AMD|IF_SSE5},
+ /* 3384 */ {I_VPSHAW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13881, IF_AMD|IF_SSE5},
+ /* 3385 */ {I_VPSHLB, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13888, IF_AMD|IF_SSE5},
+ /* 3386 */ {I_VPSHLB, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13895, IF_AMD|IF_SSE5},
+ /* 3387 */ {I_VPSHLB, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13902, IF_AMD|IF_SSE5},
+ /* 3388 */ {I_VPSHLB, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13909, IF_AMD|IF_SSE5},
+ /* 3389 */ {I_VPSHLD, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13916, IF_AMD|IF_SSE5},
+ /* 3390 */ {I_VPSHLD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13923, IF_AMD|IF_SSE5},
+ /* 3391 */ {I_VPSHLD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13930, IF_AMD|IF_SSE5},
+ /* 3392 */ {I_VPSHLD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13937, IF_AMD|IF_SSE5},
+ /* 3393 */ {I_VPSHLQ, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13944, IF_AMD|IF_SSE5},
+ /* 3394 */ {I_VPSHLQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13951, IF_AMD|IF_SSE5},
+ /* 3395 */ {I_VPSHLQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13958, IF_AMD|IF_SSE5},
+ /* 3396 */ {I_VPSHLQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13965, IF_AMD|IF_SSE5},
+ /* 3397 */ {I_VPSHLW, 3, {XMMREG,RM_XMM|BITS128,XMMREG,0,0}, nasm_bytecodes+13972, IF_AMD|IF_SSE5},
+ /* 3398 */ {I_VPSHLW, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+13979, IF_AMD|IF_SSE5},
+ /* 3399 */ {I_VPSHLW, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+13986, IF_AMD|IF_SSE5},
+ /* 3400 */ {I_VPSHLW, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+13993, IF_AMD|IF_SSE5},
+ /* 3401 */ {I_VMPSADBW, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+6850, IF_FUTURE|IF_AVX2},
+ /* 3402 */ {I_VMPSADBW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6858, IF_FUTURE|IF_AVX2},
+ /* 3403 */ {I_VPABSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14000, IF_FUTURE|IF_AVX2},
+ /* 3404 */ {I_VPABSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14007, IF_FUTURE|IF_AVX2},
+ /* 3405 */ {I_VPABSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14014, IF_FUTURE|IF_AVX2},
+ /* 3406 */ {I_VPACKSSWB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14021, IF_FUTURE|IF_AVX2},
+ /* 3407 */ {I_VPACKSSWB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14028, IF_FUTURE|IF_AVX2},
+ /* 3408 */ {I_VPACKSSDW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14035, IF_FUTURE|IF_AVX2},
+ /* 3409 */ {I_VPACKSSDW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14042, IF_FUTURE|IF_AVX2},
+ /* 3410 */ {I_VPACKUSDW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14049, IF_FUTURE|IF_AVX2},
+ /* 3411 */ {I_VPACKUSDW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14056, IF_FUTURE|IF_AVX2},
+ /* 3412 */ {I_VPACKUSWB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14063, IF_FUTURE|IF_AVX2},
+ /* 3413 */ {I_VPACKUSWB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14070, IF_FUTURE|IF_AVX2},
+ /* 3414 */ {I_VPADDB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14077, IF_FUTURE|IF_AVX2},
+ /* 3415 */ {I_VPADDB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14084, IF_FUTURE|IF_AVX2},
+ /* 3416 */ {I_VPADDW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14091, IF_FUTURE|IF_AVX2},
+ /* 3417 */ {I_VPADDW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14098, IF_FUTURE|IF_AVX2},
+ /* 3418 */ {I_VPADDD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14105, IF_FUTURE|IF_AVX2},
+ /* 3419 */ {I_VPADDD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14112, IF_FUTURE|IF_AVX2},
+ /* 3420 */ {I_VPADDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14119, IF_FUTURE|IF_AVX2},
+ /* 3421 */ {I_VPADDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14126, IF_FUTURE|IF_AVX2},
+ /* 3422 */ {I_VPADDSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14133, IF_FUTURE|IF_AVX2},
+ /* 3423 */ {I_VPADDSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14140, IF_FUTURE|IF_AVX2},
+ /* 3424 */ {I_VPADDSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14147, IF_FUTURE|IF_AVX2},
+ /* 3425 */ {I_VPADDSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14154, IF_FUTURE|IF_AVX2},
+ /* 3426 */ {I_VPADDUSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14161, IF_FUTURE|IF_AVX2},
+ /* 3427 */ {I_VPADDUSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14168, IF_FUTURE|IF_AVX2},
+ /* 3428 */ {I_VPADDUSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14175, IF_FUTURE|IF_AVX2},
+ /* 3429 */ {I_VPADDUSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14182, IF_FUTURE|IF_AVX2},
+ /* 3430 */ {I_VPALIGNR, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+6866, IF_FUTURE|IF_AVX2},
+ /* 3431 */ {I_VPALIGNR, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6874, IF_FUTURE|IF_AVX2},
+ /* 3432 */ {I_VPAND, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14189, IF_FUTURE|IF_AVX2},
+ /* 3433 */ {I_VPAND, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14196, IF_FUTURE|IF_AVX2},
+ /* 3434 */ {I_VPANDN, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14203, IF_FUTURE|IF_AVX2},
+ /* 3435 */ {I_VPANDN, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14210, IF_FUTURE|IF_AVX2},
+ /* 3436 */ {I_VPAVGB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14217, IF_FUTURE|IF_AVX2},
+ /* 3437 */ {I_VPAVGB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14224, IF_FUTURE|IF_AVX2},
+ /* 3438 */ {I_VPAVGW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14231, IF_FUTURE|IF_AVX2},
+ /* 3439 */ {I_VPAVGW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14238, IF_FUTURE|IF_AVX2},
+ /* 3440 */ {I_VPBLENDVB, 4, {YMMREG,YMMREG,RM_YMM|BITS256,YMMREG,0}, nasm_bytecodes+6882, IF_FUTURE|IF_AVX2},
+ /* 3441 */ {I_VPBLENDVB, 3, {YMMREG,RM_YMM|BITS256,YMMREG,0,0}, nasm_bytecodes+6890, IF_FUTURE|IF_AVX2},
+ /* 3442 */ {I_VPBLENDW, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+6898, IF_FUTURE|IF_AVX2},
+ /* 3443 */ {I_VPBLENDW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6906, IF_FUTURE|IF_AVX2},
+ /* 3444 */ {I_VPCMPEQB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14245, IF_FUTURE|IF_AVX2},
+ /* 3445 */ {I_VPCMPEQB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14252, IF_FUTURE|IF_AVX2},
+ /* 3446 */ {I_VPCMPEQW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14259, IF_FUTURE|IF_AVX2},
+ /* 3447 */ {I_VPCMPEQW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14266, IF_FUTURE|IF_AVX2},
+ /* 3448 */ {I_VPCMPEQD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14273, IF_FUTURE|IF_AVX2},
+ /* 3449 */ {I_VPCMPEQD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14280, IF_FUTURE|IF_AVX2},
+ /* 3450 */ {I_VPCMPEQQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14287, IF_FUTURE|IF_AVX2},
+ /* 3451 */ {I_VPCMPEQQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14294, IF_FUTURE|IF_AVX2},
+ /* 3452 */ {I_VPCMPGTB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14301, IF_FUTURE|IF_AVX2},
+ /* 3453 */ {I_VPCMPGTB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14308, IF_FUTURE|IF_AVX2},
+ /* 3454 */ {I_VPCMPGTW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14315, IF_FUTURE|IF_AVX2},
+ /* 3455 */ {I_VPCMPGTW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14322, IF_FUTURE|IF_AVX2},
+ /* 3456 */ {I_VPCMPGTD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14329, IF_FUTURE|IF_AVX2},
+ /* 3457 */ {I_VPCMPGTD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14336, IF_FUTURE|IF_AVX2},
+ /* 3458 */ {I_VPCMPGTQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14343, IF_FUTURE|IF_AVX2},
+ /* 3459 */ {I_VPCMPGTQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14350, IF_FUTURE|IF_AVX2},
+ /* 3460 */ {I_VPHADDW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14357, IF_FUTURE|IF_AVX2},
+ /* 3461 */ {I_VPHADDW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14364, IF_FUTURE|IF_AVX2},
+ /* 3462 */ {I_VPHADDD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14371, IF_FUTURE|IF_AVX2},
+ /* 3463 */ {I_VPHADDD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14378, IF_FUTURE|IF_AVX2},
+ /* 3464 */ {I_VPHADDSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14385, IF_FUTURE|IF_AVX2},
+ /* 3465 */ {I_VPHADDSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14392, IF_FUTURE|IF_AVX2},
+ /* 3466 */ {I_VPHSUBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14399, IF_FUTURE|IF_AVX2},
+ /* 3467 */ {I_VPHSUBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14406, IF_FUTURE|IF_AVX2},
+ /* 3468 */ {I_VPHSUBD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14413, IF_FUTURE|IF_AVX2},
+ /* 3469 */ {I_VPHSUBD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14420, IF_FUTURE|IF_AVX2},
+ /* 3470 */ {I_VPHSUBSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14427, IF_FUTURE|IF_AVX2},
+ /* 3471 */ {I_VPHSUBSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14434, IF_FUTURE|IF_AVX2},
+ /* 3472 */ {I_VPMADDUBSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14441, IF_FUTURE|IF_AVX2},
+ /* 3473 */ {I_VPMADDUBSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14448, IF_FUTURE|IF_AVX2},
+ /* 3474 */ {I_VPMADDWD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14455, IF_FUTURE|IF_AVX2},
+ /* 3475 */ {I_VPMADDWD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14462, IF_FUTURE|IF_AVX2},
+ /* 3476 */ {I_VPMAXSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14469, IF_FUTURE|IF_AVX2},
+ /* 3477 */ {I_VPMAXSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14476, IF_FUTURE|IF_AVX2},
+ /* 3478 */ {I_VPMAXSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14483, IF_FUTURE|IF_AVX2},
+ /* 3479 */ {I_VPMAXSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14490, IF_FUTURE|IF_AVX2},
+ /* 3480 */ {I_VPMAXSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14497, IF_FUTURE|IF_AVX2},
+ /* 3481 */ {I_VPMAXSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14504, IF_FUTURE|IF_AVX2},
+ /* 3482 */ {I_VPMAXUB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14511, IF_FUTURE|IF_AVX2},
+ /* 3483 */ {I_VPMAXUB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14518, IF_FUTURE|IF_AVX2},
+ /* 3484 */ {I_VPMAXUW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14525, IF_FUTURE|IF_AVX2},
+ /* 3485 */ {I_VPMAXUW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14532, IF_FUTURE|IF_AVX2},
+ /* 3486 */ {I_VPMAXUD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14539, IF_FUTURE|IF_AVX2},
+ /* 3487 */ {I_VPMAXUD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14546, IF_FUTURE|IF_AVX2},
+ /* 3488 */ {I_VPMINSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14553, IF_FUTURE|IF_AVX2},
+ /* 3489 */ {I_VPMINSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14560, IF_FUTURE|IF_AVX2},
+ /* 3490 */ {I_VPMINSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14567, IF_FUTURE|IF_AVX2},
+ /* 3491 */ {I_VPMINSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14574, IF_FUTURE|IF_AVX2},
+ /* 3492 */ {I_VPMINSD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14581, IF_FUTURE|IF_AVX2},
+ /* 3493 */ {I_VPMINSD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14588, IF_FUTURE|IF_AVX2},
+ /* 3494 */ {I_VPMINUB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14595, IF_FUTURE|IF_AVX2},
+ /* 3495 */ {I_VPMINUB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14602, IF_FUTURE|IF_AVX2},
+ /* 3496 */ {I_VPMINUW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14609, IF_FUTURE|IF_AVX2},
+ /* 3497 */ {I_VPMINUW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14616, IF_FUTURE|IF_AVX2},
+ /* 3498 */ {I_VPMINUD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14623, IF_FUTURE|IF_AVX2},
+ /* 3499 */ {I_VPMINUD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14630, IF_FUTURE|IF_AVX2},
+ /* 3500 */ {I_VPMOVMSKB, 2, {REG_GPR|BITS32,YMMREG,0,0,0}, nasm_bytecodes+14637, IF_FUTURE|IF_AVX2},
+ /* 3501 */ {I_VPMOVMSKB, 2, {REG_GPR|BITS64,YMMREG,0,0,0}, nasm_bytecodes+14637, IF_FUTURE|IF_AVX2},
+ /* 3502 */ {I_VPMOVSXBW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+14644, IF_FUTURE|IF_AVX2},
+ /* 3503 */ {I_VPMOVSXBD, 2, {YMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+14651, IF_FUTURE|IF_AVX2},
+ /* 3504 */ {I_VPMOVSXBD, 2, {YMMREG,XMMREG,0,0,0}, nasm_bytecodes+14651, IF_FUTURE|IF_AVX2},
+ /* 3505 */ {I_VPMOVSXBQ, 2, {YMMREG,MEMORY|BITS32,0,0,0}, nasm_bytecodes+14658, IF_FUTURE|IF_AVX2},
+ /* 3506 */ {I_VPMOVSXBD, 2, {YMMREG,XMMREG,0,0,0}, nasm_bytecodes+14658, IF_FUTURE|IF_AVX2},
+ /* 3507 */ {I_VPMOVSXWD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+14665, IF_FUTURE|IF_AVX2},
+ /* 3508 */ {I_VPMOVSXWQ, 2, {YMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+14672, IF_FUTURE|IF_AVX2},
+ /* 3509 */ {I_VPMOVSXWQ, 2, {YMMREG,XMMREG,0,0,0}, nasm_bytecodes+14672, IF_FUTURE|IF_AVX2},
+ /* 3510 */ {I_VPMOVSXDQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+14679, IF_FUTURE|IF_AVX2},
+ /* 3511 */ {I_VPMOVZXBW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+14686, IF_FUTURE|IF_AVX2},
+ /* 3512 */ {I_VPMOVZXBD, 2, {YMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+14693, IF_FUTURE|IF_AVX2},
+ /* 3513 */ {I_VPMOVZXBD, 2, {YMMREG,XMMREG,0,0,0}, nasm_bytecodes+14693, IF_FUTURE|IF_AVX2},
+ /* 3514 */ {I_VPMOVZXBQ, 2, {YMMREG,MEMORY|BITS32,0,0,0}, nasm_bytecodes+14700, IF_FUTURE|IF_AVX2},
+ /* 3515 */ {I_VPMOVZXBQ, 2, {YMMREG,XMMREG,0,0,0}, nasm_bytecodes+14700, IF_FUTURE|IF_AVX2},
+ /* 3516 */ {I_VPMOVZXWD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+14707, IF_FUTURE|IF_AVX2},
+ /* 3517 */ {I_VPMOVZXWQ, 2, {YMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+14714, IF_FUTURE|IF_AVX2},
+ /* 3518 */ {I_VPMOVZXWQ, 2, {YMMREG,XMMREG,0,0,0}, nasm_bytecodes+14714, IF_FUTURE|IF_AVX2},
+ /* 3519 */ {I_VPMOVZXDQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+14721, IF_FUTURE|IF_AVX2},
+ /* 3520 */ {I_VPMULDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14728, IF_FUTURE|IF_AVX2},
+ /* 3521 */ {I_VPMULDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14735, IF_FUTURE|IF_AVX2},
+ /* 3522 */ {I_VPMULHRSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14742, IF_FUTURE|IF_AVX2},
+ /* 3523 */ {I_VPMULHRSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14749, IF_FUTURE|IF_AVX2},
+ /* 3524 */ {I_VPMULHUW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14756, IF_FUTURE|IF_AVX2},
+ /* 3525 */ {I_VPMULHUW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14763, IF_FUTURE|IF_AVX2},
+ /* 3526 */ {I_VPMULHW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14770, IF_FUTURE|IF_AVX2},
+ /* 3527 */ {I_VPMULHW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14777, IF_FUTURE|IF_AVX2},
+ /* 3528 */ {I_VPMULLW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14784, IF_FUTURE|IF_AVX2},
+ /* 3529 */ {I_VPMULLW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14791, IF_FUTURE|IF_AVX2},
+ /* 3530 */ {I_VPMULLD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14798, IF_FUTURE|IF_AVX2},
+ /* 3531 */ {I_VPMULLD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14805, IF_FUTURE|IF_AVX2},
+ /* 3532 */ {I_VPMULUDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14812, IF_FUTURE|IF_AVX2},
+ /* 3533 */ {I_VPMULUDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14819, IF_FUTURE|IF_AVX2},
+ /* 3534 */ {I_VPOR, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14826, IF_FUTURE|IF_AVX2},
+ /* 3535 */ {I_VPOR, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14833, IF_FUTURE|IF_AVX2},
+ /* 3536 */ {I_VPSADBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14840, IF_FUTURE|IF_AVX2},
+ /* 3537 */ {I_VPSADBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14847, IF_FUTURE|IF_AVX2},
+ /* 3538 */ {I_VPSHUFB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14854, IF_FUTURE|IF_AVX2},
+ /* 3539 */ {I_VPSHUFB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14861, IF_FUTURE|IF_AVX2},
+ /* 3540 */ {I_VPSHUFD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6914, IF_FUTURE|IF_AVX2},
+ /* 3541 */ {I_VPSHUFHW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6922, IF_FUTURE|IF_AVX2},
+ /* 3542 */ {I_VPSHUFLW, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6930, IF_FUTURE|IF_AVX2},
+ /* 3543 */ {I_VPSIGNB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14868, IF_FUTURE|IF_AVX2},
+ /* 3544 */ {I_VPSIGNB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14875, IF_FUTURE|IF_AVX2},
+ /* 3545 */ {I_VPSIGNW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14882, IF_FUTURE|IF_AVX2},
+ /* 3546 */ {I_VPSIGNW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14889, IF_FUTURE|IF_AVX2},
+ /* 3547 */ {I_VPSIGND, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+14896, IF_FUTURE|IF_AVX2},
+ /* 3548 */ {I_VPSIGND, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+14903, IF_FUTURE|IF_AVX2},
+ /* 3549 */ {I_VPSLLDQ, 3, {YMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6938, IF_FUTURE|IF_AVX2},
+ /* 3550 */ {I_VPSLLDQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6946, IF_FUTURE|IF_AVX2},
+ /* 3551 */ {I_VPSLLW, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+14910, IF_FUTURE|IF_AVX2},
+ /* 3552 */ {I_VPSLLW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+14917, IF_FUTURE|IF_AVX2},
+ /* 3553 */ {I_VPSLLW, 3, {YMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6954, IF_FUTURE|IF_AVX2},
+ /* 3554 */ {I_VPSLLW, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6962, IF_FUTURE|IF_AVX2},
+ /* 3555 */ {I_VPSLLD, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+14924, IF_FUTURE|IF_AVX2},
+ /* 3556 */ {I_VPSLLD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+14931, IF_FUTURE|IF_AVX2},
+ /* 3557 */ {I_VPSLLD, 3, {YMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6970, IF_FUTURE|IF_AVX2},
+ /* 3558 */ {I_VPSLLD, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6978, IF_FUTURE|IF_AVX2},
+ /* 3559 */ {I_VPSLLQ, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+14938, IF_FUTURE|IF_AVX2},
+ /* 3560 */ {I_VPSLLQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+14945, IF_FUTURE|IF_AVX2},
+ /* 3561 */ {I_VPSLLQ, 3, {YMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+6986, IF_FUTURE|IF_AVX2},
+ /* 3562 */ {I_VPSLLQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+6994, IF_FUTURE|IF_AVX2},
+ /* 3563 */ {I_VPSRAW, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+14952, IF_FUTURE|IF_AVX2},
+ /* 3564 */ {I_VPSRAW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+14959, IF_FUTURE|IF_AVX2},
+ /* 3565 */ {I_VPSRAW, 3, {YMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7002, IF_FUTURE|IF_AVX2},
+ /* 3566 */ {I_VPSRAW, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7010, IF_FUTURE|IF_AVX2},
+ /* 3567 */ {I_VPSRAD, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+14966, IF_FUTURE|IF_AVX2},
+ /* 3568 */ {I_VPSRAD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+14973, IF_FUTURE|IF_AVX2},
+ /* 3569 */ {I_VPSRAD, 3, {YMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7018, IF_FUTURE|IF_AVX2},
+ /* 3570 */ {I_VPSRAD, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7026, IF_FUTURE|IF_AVX2},
+ /* 3571 */ {I_VPSRLDQ, 3, {YMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7034, IF_FUTURE|IF_AVX2},
+ /* 3572 */ {I_VPSRLDQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7042, IF_FUTURE|IF_AVX2},
+ /* 3573 */ {I_VPSRLW, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+14980, IF_FUTURE|IF_AVX2},
+ /* 3574 */ {I_VPSRLW, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+14987, IF_FUTURE|IF_AVX2},
+ /* 3575 */ {I_VPSRLW, 3, {YMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7050, IF_FUTURE|IF_AVX2},
+ /* 3576 */ {I_VPSRLW, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7058, IF_FUTURE|IF_AVX2},
+ /* 3577 */ {I_VPSRLD, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+14994, IF_FUTURE|IF_AVX2},
+ /* 3578 */ {I_VPSRLD, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+15001, IF_FUTURE|IF_AVX2},
+ /* 3579 */ {I_VPSRLD, 3, {YMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7066, IF_FUTURE|IF_AVX2},
+ /* 3580 */ {I_VPSRLD, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7074, IF_FUTURE|IF_AVX2},
+ /* 3581 */ {I_VPSRLQ, 3, {YMMREG,YMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+15008, IF_FUTURE|IF_AVX2},
+ /* 3582 */ {I_VPSRLQ, 2, {YMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+15015, IF_FUTURE|IF_AVX2},
+ /* 3583 */ {I_VPSRLQ, 3, {YMMREG,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7082, IF_FUTURE|IF_AVX2},
+ /* 3584 */ {I_VPSRLQ, 2, {YMMREG,IMMEDIATE|BITS8,0,0,0}, nasm_bytecodes+7090, IF_FUTURE|IF_AVX2},
+ /* 3585 */ {I_VPSUBB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15022, IF_FUTURE|IF_AVX2},
+ /* 3586 */ {I_VPSUBB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15029, IF_FUTURE|IF_AVX2},
+ /* 3587 */ {I_VPSUBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15036, IF_FUTURE|IF_AVX2},
+ /* 3588 */ {I_VPSUBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15043, IF_FUTURE|IF_AVX2},
+ /* 3589 */ {I_VPSUBD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15050, IF_FUTURE|IF_AVX2},
+ /* 3590 */ {I_VPSUBD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15057, IF_FUTURE|IF_AVX2},
+ /* 3591 */ {I_VPSUBQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15064, IF_FUTURE|IF_AVX2},
+ /* 3592 */ {I_VPSUBQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15071, IF_FUTURE|IF_AVX2},
+ /* 3593 */ {I_VPSUBSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15078, IF_FUTURE|IF_AVX2},
+ /* 3594 */ {I_VPSUBSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15085, IF_FUTURE|IF_AVX2},
+ /* 3595 */ {I_VPSUBSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15092, IF_FUTURE|IF_AVX2},
+ /* 3596 */ {I_VPSUBSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15099, IF_FUTURE|IF_AVX2},
+ /* 3597 */ {I_VPSUBUSB, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15106, IF_FUTURE|IF_AVX2},
+ /* 3598 */ {I_VPSUBUSB, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15113, IF_FUTURE|IF_AVX2},
+ /* 3599 */ {I_VPSUBUSW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15120, IF_FUTURE|IF_AVX2},
+ /* 3600 */ {I_VPSUBUSW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15127, IF_FUTURE|IF_AVX2},
+ /* 3601 */ {I_VPUNPCKHBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15134, IF_FUTURE|IF_AVX2},
+ /* 3602 */ {I_VPUNPCKHBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15141, IF_FUTURE|IF_AVX2},
+ /* 3603 */ {I_VPUNPCKHWD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15148, IF_FUTURE|IF_AVX2},
+ /* 3604 */ {I_VPUNPCKHWD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15155, IF_FUTURE|IF_AVX2},
+ /* 3605 */ {I_VPUNPCKHDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15162, IF_FUTURE|IF_AVX2},
+ /* 3606 */ {I_VPUNPCKHDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15169, IF_FUTURE|IF_AVX2},
+ /* 3607 */ {I_VPUNPCKHQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15176, IF_FUTURE|IF_AVX2},
+ /* 3608 */ {I_VPUNPCKHQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15183, IF_FUTURE|IF_AVX2},
+ /* 3609 */ {I_VPUNPCKLBW, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15190, IF_FUTURE|IF_AVX2},
+ /* 3610 */ {I_VPUNPCKLBW, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15197, IF_FUTURE|IF_AVX2},
+ /* 3611 */ {I_VPUNPCKLWD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15204, IF_FUTURE|IF_AVX2},
+ /* 3612 */ {I_VPUNPCKLWD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15211, IF_FUTURE|IF_AVX2},
+ /* 3613 */ {I_VPUNPCKLDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15218, IF_FUTURE|IF_AVX2},
+ /* 3614 */ {I_VPUNPCKLDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15225, IF_FUTURE|IF_AVX2},
+ /* 3615 */ {I_VPUNPCKLQDQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15232, IF_FUTURE|IF_AVX2},
+ /* 3616 */ {I_VPUNPCKLQDQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15239, IF_FUTURE|IF_AVX2},
+ /* 3617 */ {I_VPXOR, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15246, IF_FUTURE|IF_AVX2},
+ /* 3618 */ {I_VPXOR, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15253, IF_FUTURE|IF_AVX2},
+ /* 3619 */ {I_VMOVNTDQA, 2, {YMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+15260, IF_FUTURE|IF_AVX2},
+ /* 3620 */ {I_VBROADCASTSS, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+9499, IF_FUTURE|IF_AVX2},
+ /* 3621 */ {I_VBROADCASTSS, 2, {YMMREG,XMMREG,0,0,0}, nasm_bytecodes+9506, IF_FUTURE|IF_AVX2},
+ /* 3622 */ {I_VBROADCASTSD, 2, {YMMREG,XMMREG,0,0,0}, nasm_bytecodes+9513, IF_FUTURE|IF_AVX2},
+ /* 3623 */ {I_VBROADCASTI128, 2, {YMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+15267, IF_FUTURE|IF_AVX2},
+ /* 3624 */ {I_VPBLENDD, 4, {XMMREG,XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+7098, IF_FUTURE|IF_AVX2},
+ /* 3625 */ {I_VPBLENDD, 3, {XMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7106, IF_FUTURE|IF_AVX2},
+ /* 3626 */ {I_VPBLENDD, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+7114, IF_FUTURE|IF_AVX2},
+ /* 3627 */ {I_VPBLENDD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7122, IF_FUTURE|IF_AVX2},
+ /* 3628 */ {I_VPBROADCASTB, 2, {XMMREG,MEMORY|BITS8,0,0,0}, nasm_bytecodes+15274, IF_FUTURE|IF_AVX2},
+ /* 3629 */ {I_VPBROADCASTB, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+15274, IF_FUTURE|IF_AVX2},
+ /* 3630 */ {I_VPBROADCASTB, 2, {YMMREG,MEMORY|BITS8,0,0,0}, nasm_bytecodes+15281, IF_FUTURE|IF_AVX2},
+ /* 3631 */ {I_VPBROADCASTB, 2, {YMMREG,XMMREG,0,0,0}, nasm_bytecodes+15281, IF_FUTURE|IF_AVX2},
+ /* 3632 */ {I_VPBROADCASTW, 2, {XMMREG,MEMORY|BITS16,0,0,0}, nasm_bytecodes+15288, IF_FUTURE|IF_AVX2},
+ /* 3633 */ {I_VPBROADCASTW, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+15288, IF_FUTURE|IF_AVX2},
+ /* 3634 */ {I_VPBROADCASTW, 2, {YMMREG,MEMORY|BITS16,0,0,0}, nasm_bytecodes+15295, IF_FUTURE|IF_AVX2},
+ /* 3635 */ {I_VPBROADCASTW, 2, {YMMREG,XMMREG,0,0,0}, nasm_bytecodes+15295, IF_FUTURE|IF_AVX2},
+ /* 3636 */ {I_VPBROADCASTD, 2, {XMMREG,MEMORY|BITS32,0,0,0}, nasm_bytecodes+15302, IF_FUTURE|IF_AVX2},
+ /* 3637 */ {I_VPBROADCASTD, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+15302, IF_FUTURE|IF_AVX2},
+ /* 3638 */ {I_VPBROADCASTD, 2, {YMMREG,MEMORY|BITS32,0,0,0}, nasm_bytecodes+15309, IF_FUTURE|IF_AVX2},
+ /* 3639 */ {I_VPBROADCASTD, 2, {YMMREG,XMMREG,0,0,0}, nasm_bytecodes+15309, IF_FUTURE|IF_AVX2},
+ /* 3640 */ {I_VPBROADCASTQ, 2, {XMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+15316, IF_FUTURE|IF_AVX2},
+ /* 3641 */ {I_VPBROADCASTQ, 2, {XMMREG,XMMREG,0,0,0}, nasm_bytecodes+15316, IF_FUTURE|IF_AVX2},
+ /* 3642 */ {I_VPBROADCASTQ, 2, {YMMREG,MEMORY|BITS64,0,0,0}, nasm_bytecodes+15323, IF_FUTURE|IF_AVX2},
+ /* 3643 */ {I_VPBROADCASTQ, 2, {YMMREG,XMMREG,0,0,0}, nasm_bytecodes+15323, IF_FUTURE|IF_AVX2},
+ /* 3644 */ {I_VPERMD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15330, IF_FUTURE|IF_AVX2},
+ /* 3645 */ {I_VPERMD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15337, IF_FUTURE|IF_AVX2},
+ /* 3646 */ {I_VPERMPD, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7130, IF_FUTURE|IF_AVX2},
+ /* 3647 */ {I_VPERMPS, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15344, IF_FUTURE|IF_AVX2},
+ /* 3648 */ {I_VPERMPS, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15351, IF_FUTURE|IF_AVX2},
+ /* 3649 */ {I_VPERMQ, 3, {YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7138, IF_FUTURE|IF_AVX2},
+ /* 3650 */ {I_VPERM2I128, 4, {YMMREG,YMMREG,RM_YMM|BITS256,IMMEDIATE|BITS8,0}, nasm_bytecodes+7146, IF_FUTURE|IF_AVX2},
+ /* 3651 */ {I_VEXTRACTI128, 3, {RM_XMM|BITS128,YMMREG,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7154, IF_FUTURE|IF_AVX2},
+ /* 3652 */ {I_VINSERTI128, 4, {YMMREG,YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0}, nasm_bytecodes+7162, IF_FUTURE|IF_AVX2},
+ /* 3653 */ {I_VINSERTI128, 3, {YMMREG,RM_XMM|BITS128,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7170, IF_FUTURE|IF_AVX2},
+ /* 3654 */ {I_VPMASKMOVD, 3, {XMMREG,XMMREG,MEMORY|BITS128,0,0}, nasm_bytecodes+15358, IF_FUTURE|IF_AVX2},
+ /* 3655 */ {I_VPMASKMOVD, 2, {XMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+15365, IF_FUTURE|IF_AVX2},
+ /* 3656 */ {I_VPMASKMOVD, 3, {YMMREG,YMMREG,MEMORY|BITS256,0,0}, nasm_bytecodes+15372, IF_FUTURE|IF_AVX2},
+ /* 3657 */ {I_VPMASKMOVD, 2, {YMMREG,MEMORY|BITS256,0,0,0}, nasm_bytecodes+15379, IF_FUTURE|IF_AVX2},
+ /* 3658 */ {I_VPMASKMOVQ, 3, {XMMREG,XMMREG,MEMORY|BITS128,0,0}, nasm_bytecodes+15386, IF_FUTURE|IF_AVX2},
+ /* 3659 */ {I_VPMASKMOVQ, 2, {XMMREG,MEMORY|BITS128,0,0,0}, nasm_bytecodes+15393, IF_FUTURE|IF_AVX2},
+ /* 3660 */ {I_VPMASKMOVQ, 3, {YMMREG,YMMREG,MEMORY|BITS256,0,0}, nasm_bytecodes+15400, IF_FUTURE|IF_AVX2},
+ /* 3661 */ {I_VPMASKMOVQ, 2, {YMMREG,MEMORY|BITS256,0,0,0}, nasm_bytecodes+15407, IF_FUTURE|IF_AVX2},
+ /* 3662 */ {I_VPMASKMOVD, 3, {MEMORY|BITS128,XMMREG,XMMREG,0,0}, nasm_bytecodes+15414, IF_FUTURE|IF_AVX2},
+ /* 3663 */ {I_VPMASKMOVD, 2, {MEMORY|BITS128,XMMREG,0,0,0}, nasm_bytecodes+15421, IF_FUTURE|IF_AVX2},
+ /* 3664 */ {I_VPMASKMOVD, 3, {MEMORY|BITS256,YMMREG,YMMREG,0,0}, nasm_bytecodes+15428, IF_FUTURE|IF_AVX2},
+ /* 3665 */ {I_VPMASKMOVD, 2, {MEMORY|BITS256,YMMREG,0,0,0}, nasm_bytecodes+15435, IF_FUTURE|IF_AVX2},
+ /* 3666 */ {I_VPMASKMOVQ, 3, {MEMORY|BITS128,XMMREG,XMMREG,0,0}, nasm_bytecodes+15442, IF_FUTURE|IF_AVX2},
+ /* 3667 */ {I_VPMASKMOVQ, 2, {MEMORY|BITS128,XMMREG,0,0,0}, nasm_bytecodes+15449, IF_FUTURE|IF_AVX2},
+ /* 3668 */ {I_VPMASKMOVQ, 3, {MEMORY|BITS256,YMMREG,YMMREG,0,0}, nasm_bytecodes+15456, IF_FUTURE|IF_AVX2},
+ /* 3669 */ {I_VPMASKMOVQ, 2, {MEMORY|BITS256,YMMREG,0,0,0}, nasm_bytecodes+15463, IF_FUTURE|IF_AVX2},
+ /* 3670 */ {I_VPSLLVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+15470, IF_FUTURE|IF_AVX2},
+ /* 3671 */ {I_VPSLLVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+15477, IF_FUTURE|IF_AVX2},
+ /* 3672 */ {I_VPSLLVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+15484, IF_FUTURE|IF_AVX2},
+ /* 3673 */ {I_VPSLLVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+15491, IF_FUTURE|IF_AVX2},
+ /* 3674 */ {I_VPSLLVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15498, IF_FUTURE|IF_AVX2},
+ /* 3675 */ {I_VPSLLVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15505, IF_FUTURE|IF_AVX2},
+ /* 3676 */ {I_VPSLLVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15512, IF_FUTURE|IF_AVX2},
+ /* 3677 */ {I_VPSLLVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15519, IF_FUTURE|IF_AVX2},
+ /* 3678 */ {I_VPSRAVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+15526, IF_FUTURE|IF_AVX2},
+ /* 3679 */ {I_VPSRAVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+15533, IF_FUTURE|IF_AVX2},
+ /* 3680 */ {I_VPSRAVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15540, IF_FUTURE|IF_AVX2},
+ /* 3681 */ {I_VPSRAVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15547, IF_FUTURE|IF_AVX2},
+ /* 3682 */ {I_VPSRLVD, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+15554, IF_FUTURE|IF_AVX2},
+ /* 3683 */ {I_VPSRLVD, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+15561, IF_FUTURE|IF_AVX2},
+ /* 3684 */ {I_VPSRLVQ, 3, {XMMREG,XMMREG,RM_XMM|BITS128,0,0}, nasm_bytecodes+15568, IF_FUTURE|IF_AVX2},
+ /* 3685 */ {I_VPSRLVQ, 2, {XMMREG,RM_XMM|BITS128,0,0,0}, nasm_bytecodes+15575, IF_FUTURE|IF_AVX2},
+ /* 3686 */ {I_VPSRLVD, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15582, IF_FUTURE|IF_AVX2},
+ /* 3687 */ {I_VPSRLVD, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15589, IF_FUTURE|IF_AVX2},
+ /* 3688 */ {I_VPSRLVQ, 3, {YMMREG,YMMREG,RM_YMM|BITS256,0,0}, nasm_bytecodes+15596, IF_FUTURE|IF_AVX2},
+ /* 3689 */ {I_VPSRLVQ, 2, {YMMREG,RM_YMM|BITS256,0,0,0}, nasm_bytecodes+15603, IF_FUTURE|IF_AVX2},
+ /* 3690 */ {I_VGATHERDPD, 3, {XMMREG,MEMORY|BITS64,XMMREG,0,0}, nasm_bytecodes+7178, IF_FUTURE|IF_AVX2},
+ /* 3691 */ {I_VGATHERQPD, 3, {XMMREG,MEMORY|BITS64,XMMREG,0,0}, nasm_bytecodes+7186, IF_FUTURE|IF_AVX2},
+ /* 3692 */ {I_VGATHERDPD, 3, {YMMREG,MEMORY|BITS64,YMMREG,0,0}, nasm_bytecodes+7194, IF_FUTURE|IF_AVX2},
+ /* 3693 */ {I_VGATHERQPD, 3, {YMMREG,MEMORY|BITS64,YMMREG,0,0}, nasm_bytecodes+7202, IF_FUTURE|IF_AVX2},
+ /* 3694 */ {I_VGATHERDPS, 3, {XMMREG,MEMORY|BITS32,XMMREG,0,0}, nasm_bytecodes+7210, IF_FUTURE|IF_AVX2},
+ /* 3695 */ {I_VGATHERQPS, 3, {XMMREG,MEMORY|BITS32,XMMREG,0,0}, nasm_bytecodes+7218, IF_FUTURE|IF_AVX2},
+ /* 3696 */ {I_VGATHERDPS, 3, {YMMREG,MEMORY|BITS32,YMMREG,0,0}, nasm_bytecodes+7226, IF_FUTURE|IF_AVX2},
+ /* 3697 */ {I_VGATHERQPS, 3, {XMMREG,MEMORY|BITS32,XMMREG,0,0}, nasm_bytecodes+7234, IF_FUTURE|IF_AVX2},
+ /* 3698 */ {I_VPGATHERDD, 3, {XMMREG,MEMORY|BITS32,XMMREG,0,0}, nasm_bytecodes+7242, IF_FUTURE|IF_AVX2},
+ /* 3699 */ {I_VPGATHERQD, 3, {XMMREG,MEMORY|BITS32,XMMREG,0,0}, nasm_bytecodes+7250, IF_FUTURE|IF_AVX2},
+ /* 3700 */ {I_VPGATHERDD, 3, {YMMREG,MEMORY|BITS32,YMMREG,0,0}, nasm_bytecodes+7258, IF_FUTURE|IF_AVX2},
+ /* 3701 */ {I_VPGATHERQD, 3, {XMMREG,MEMORY|BITS32,XMMREG,0,0}, nasm_bytecodes+7266, IF_FUTURE|IF_AVX2},
+ /* 3702 */ {I_VPGATHERDQ, 3, {XMMREG,MEMORY|BITS64,XMMREG,0,0}, nasm_bytecodes+7274, IF_FUTURE|IF_AVX2},
+ /* 3703 */ {I_VPGATHERQQ, 3, {XMMREG,MEMORY|BITS64,XMMREG,0,0}, nasm_bytecodes+7282, IF_FUTURE|IF_AVX2},
+ /* 3704 */ {I_VPGATHERDQ, 3, {YMMREG,MEMORY|BITS64,YMMREG,0,0}, nasm_bytecodes+7290, IF_FUTURE|IF_AVX2},
+ /* 3705 */ {I_VPGATHERQQ, 3, {YMMREG,MEMORY|BITS64,YMMREG,0,0}, nasm_bytecodes+7298, IF_FUTURE|IF_AVX2},
+ /* 3706 */ {I_XABORT, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+21114, IF_FUTURE|IF_RTM},
+ /* 3707 */ {I_XABORT, 1, {IMMEDIATE|BITS8,0,0,0,0}, nasm_bytecodes+21114, IF_FUTURE|IF_RTM},
+ /* 3708 */ {I_XBEGIN, 1, {IMMEDIATE,0,0,0,0}, nasm_bytecodes+18247, IF_FUTURE|IF_RTM},
+ /* 3709 */ {I_XBEGIN, 1, {IMMEDIATE|NEAR,0,0,0,0}, nasm_bytecodes+18247, IF_FUTURE|IF_RTM},
+ /* 3710 */ {I_XBEGIN, 1, {IMMEDIATE|BITS16,0,0,0,0}, nasm_bytecodes+18253, IF_FUTURE|IF_RTM},
+ /* 3711 */ {I_XBEGIN, 1, {IMMEDIATE|BITS16|NEAR,0,0,0,0}, nasm_bytecodes+18253, IF_FUTURE|IF_RTM},
+ /* 3712 */ {I_XBEGIN, 1, {IMMEDIATE|BITS32,0,0,0,0}, nasm_bytecodes+18259, IF_FUTURE|IF_RTM},
+ /* 3713 */ {I_XBEGIN, 1, {IMMEDIATE|BITS32|NEAR,0,0,0,0}, nasm_bytecodes+18259, IF_FUTURE|IF_RTM},
+ /* 3714 */ {I_XEND, 0, {0,0,0,0,0}, nasm_bytecodes+21119, IF_FUTURE|IF_RTM},
+ /* 3715 */ {I_XTEST, 0, {0,0,0,0,0}, nasm_bytecodes+21124, IF_FUTURE|IF_HLE|IF_RTM},
+ /* 3716 */ {I_TZCNT, 2, {REG_GPR|BITS16,RM_GPR|BITS16,0,0,0}, nasm_bytecodes+15610, IF_FUTURE|IF_BMI1},
+ /* 3717 */ {I_TZCNT, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+15617, IF_FUTURE|IF_BMI1},
+ /* 3718 */ {I_TZCNT, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+15624, IF_LONG|IF_FUTURE|IF_BMI1},
+ /* 3719 */ {I_ANDN, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, nasm_bytecodes+15631, IF_FUTURE|IF_BMI1},
+ /* 3720 */ {I_ANDN, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, nasm_bytecodes+15638, IF_LONG|IF_FUTURE|IF_BMI1},
+ /* 3721 */ {I_BEXTR, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, nasm_bytecodes+15645, IF_FUTURE|IF_BMI1},
+ /* 3722 */ {I_BEXTR, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, nasm_bytecodes+15652, IF_LONG|IF_FUTURE|IF_BMI1},
+ /* 3723 */ {I_BLSI, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+15659, IF_FUTURE|IF_BMI1},
+ /* 3724 */ {I_BLSI, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+15666, IF_LONG|IF_FUTURE|IF_BMI1},
+ /* 3725 */ {I_BLSMSK, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+15673, IF_FUTURE|IF_BMI1},
+ /* 3726 */ {I_BLSMSK, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+15680, IF_LONG|IF_FUTURE|IF_BMI1},
+ /* 3727 */ {I_BLSR, 2, {REG_GPR|BITS32,RM_GPR|BITS32,0,0,0}, nasm_bytecodes+15687, IF_FUTURE|IF_BMI1},
+ /* 3728 */ {I_BLSR, 2, {REG_GPR|BITS64,RM_GPR|BITS64,0,0,0}, nasm_bytecodes+15694, IF_LONG|IF_FUTURE|IF_BMI1},
+ /* 3729 */ {I_BZHI, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, nasm_bytecodes+15701, IF_FUTURE|IF_BMI2},
+ /* 3730 */ {I_BZHI, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, nasm_bytecodes+15708, IF_LONG|IF_FUTURE|IF_BMI2},
+ /* 3731 */ {I_MULX, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, nasm_bytecodes+15715, IF_FUTURE|IF_BMI2},
+ /* 3732 */ {I_MULX, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, nasm_bytecodes+15722, IF_LONG|IF_FUTURE|IF_BMI2},
+ /* 3733 */ {I_PDEP, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, nasm_bytecodes+15729, IF_FUTURE|IF_BMI2},
+ /* 3734 */ {I_PDEP, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, nasm_bytecodes+15736, IF_LONG|IF_FUTURE|IF_BMI2},
+ /* 3735 */ {I_PEXT, 3, {REG_GPR|BITS32,REG_GPR|BITS32,RM_GPR|BITS32,0,0}, nasm_bytecodes+15743, IF_FUTURE|IF_BMI2},
+ /* 3736 */ {I_PEXT, 3, {REG_GPR|BITS64,REG_GPR|BITS64,RM_GPR|BITS64,0,0}, nasm_bytecodes+15750, IF_LONG|IF_FUTURE|IF_BMI2},
+ /* 3737 */ {I_RORX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7306, IF_FUTURE|IF_BMI2},
+ /* 3738 */ {I_RORX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,IMMEDIATE|BITS8,0,0}, nasm_bytecodes+7314, IF_LONG|IF_FUTURE|IF_BMI2},
+ /* 3739 */ {I_SARX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, nasm_bytecodes+15757, IF_FUTURE|IF_BMI2},
+ /* 3740 */ {I_SARX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, nasm_bytecodes+15764, IF_LONG|IF_FUTURE|IF_BMI2},
+ /* 3741 */ {I_SHLX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, nasm_bytecodes+15771, IF_FUTURE|IF_BMI2},
+ /* 3742 */ {I_SHLX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, nasm_bytecodes+15778, IF_LONG|IF_FUTURE|IF_BMI2},
+ /* 3743 */ {I_SHRX, 3, {REG_GPR|BITS32,RM_GPR|BITS32,REG_GPR|BITS32,0,0}, nasm_bytecodes+15785, IF_FUTURE|IF_BMI2},
+ /* 3744 */ {I_SHRX, 3, {REG_GPR|BITS64,RM_GPR|BITS64,REG_GPR|BITS64,0,0}, nasm_bytecodes+15792, IF_LONG|IF_FUTURE|IF_BMI2},
+ /* 3745 */ {I_HINT_NOP0, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18265, IF_P6|IF_UNDOC},
+ /* 3746 */ {I_HINT_NOP0, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18271, IF_P6|IF_UNDOC},
+ /* 3747 */ {I_HINT_NOP0, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18277, IF_X64|IF_UNDOC},
+ /* 3748 */ {I_HINT_NOP1, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18283, IF_P6|IF_UNDOC},
+ /* 3749 */ {I_HINT_NOP1, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18289, IF_P6|IF_UNDOC},
+ /* 3750 */ {I_HINT_NOP1, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18295, IF_X64|IF_UNDOC},
+ /* 3751 */ {I_HINT_NOP2, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18301, IF_P6|IF_UNDOC},
+ /* 3752 */ {I_HINT_NOP2, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18307, IF_P6|IF_UNDOC},
+ /* 3753 */ {I_HINT_NOP2, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18313, IF_X64|IF_UNDOC},
+ /* 3754 */ {I_HINT_NOP3, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18319, IF_P6|IF_UNDOC},
+ /* 3755 */ {I_HINT_NOP3, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18325, IF_P6|IF_UNDOC},
+ /* 3756 */ {I_HINT_NOP3, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18331, IF_X64|IF_UNDOC},
+ /* 3757 */ {I_HINT_NOP4, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18337, IF_P6|IF_UNDOC},
+ /* 3758 */ {I_HINT_NOP4, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18343, IF_P6|IF_UNDOC},
+ /* 3759 */ {I_HINT_NOP4, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18349, IF_X64|IF_UNDOC},
+ /* 3760 */ {I_HINT_NOP5, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18355, IF_P6|IF_UNDOC},
+ /* 3761 */ {I_HINT_NOP5, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18361, IF_P6|IF_UNDOC},
+ /* 3762 */ {I_HINT_NOP5, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18367, IF_X64|IF_UNDOC},
+ /* 3763 */ {I_HINT_NOP6, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18373, IF_P6|IF_UNDOC},
+ /* 3764 */ {I_HINT_NOP6, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18379, IF_P6|IF_UNDOC},
+ /* 3765 */ {I_HINT_NOP6, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18385, IF_X64|IF_UNDOC},
+ /* 3766 */ {I_HINT_NOP7, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18391, IF_P6|IF_UNDOC},
+ /* 3767 */ {I_HINT_NOP7, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18397, IF_P6|IF_UNDOC},
+ /* 3768 */ {I_HINT_NOP7, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18403, IF_X64|IF_UNDOC},
+ /* 3769 */ {I_HINT_NOP8, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18409, IF_P6|IF_UNDOC},
+ /* 3770 */ {I_HINT_NOP8, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18415, IF_P6|IF_UNDOC},
+ /* 3771 */ {I_HINT_NOP8, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18421, IF_X64|IF_UNDOC},
+ /* 3772 */ {I_HINT_NOP9, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18427, IF_P6|IF_UNDOC},
+ /* 3773 */ {I_HINT_NOP9, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18433, IF_P6|IF_UNDOC},
+ /* 3774 */ {I_HINT_NOP9, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18439, IF_X64|IF_UNDOC},
+ /* 3775 */ {I_HINT_NOP10, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18445, IF_P6|IF_UNDOC},
+ /* 3776 */ {I_HINT_NOP10, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18451, IF_P6|IF_UNDOC},
+ /* 3777 */ {I_HINT_NOP10, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18457, IF_X64|IF_UNDOC},
+ /* 3778 */ {I_HINT_NOP11, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18463, IF_P6|IF_UNDOC},
+ /* 3779 */ {I_HINT_NOP11, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18469, IF_P6|IF_UNDOC},
+ /* 3780 */ {I_HINT_NOP11, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18475, IF_X64|IF_UNDOC},
+ /* 3781 */ {I_HINT_NOP12, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18481, IF_P6|IF_UNDOC},
+ /* 3782 */ {I_HINT_NOP12, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18487, IF_P6|IF_UNDOC},
+ /* 3783 */ {I_HINT_NOP12, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18493, IF_X64|IF_UNDOC},
+ /* 3784 */ {I_HINT_NOP13, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18499, IF_P6|IF_UNDOC},
+ /* 3785 */ {I_HINT_NOP13, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18505, IF_P6|IF_UNDOC},
+ /* 3786 */ {I_HINT_NOP13, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18511, IF_X64|IF_UNDOC},
+ /* 3787 */ {I_HINT_NOP14, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18517, IF_P6|IF_UNDOC},
+ /* 3788 */ {I_HINT_NOP14, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18523, IF_P6|IF_UNDOC},
+ /* 3789 */ {I_HINT_NOP14, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18529, IF_X64|IF_UNDOC},
+ /* 3790 */ {I_HINT_NOP15, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18535, IF_P6|IF_UNDOC},
+ /* 3791 */ {I_HINT_NOP15, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18541, IF_P6|IF_UNDOC},
+ /* 3792 */ {I_HINT_NOP15, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18547, IF_X64|IF_UNDOC},
+ /* 3793 */ {I_HINT_NOP16, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18553, IF_P6|IF_UNDOC},
+ /* 3794 */ {I_HINT_NOP16, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18559, IF_P6|IF_UNDOC},
+ /* 3795 */ {I_HINT_NOP16, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18565, IF_X64|IF_UNDOC},
+ /* 3796 */ {I_HINT_NOP17, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18571, IF_P6|IF_UNDOC},
+ /* 3797 */ {I_HINT_NOP17, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18577, IF_P6|IF_UNDOC},
+ /* 3798 */ {I_HINT_NOP17, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18583, IF_X64|IF_UNDOC},
+ /* 3799 */ {I_HINT_NOP18, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18589, IF_P6|IF_UNDOC},
+ /* 3800 */ {I_HINT_NOP18, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18595, IF_P6|IF_UNDOC},
+ /* 3801 */ {I_HINT_NOP18, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18601, IF_X64|IF_UNDOC},
+ /* 3802 */ {I_HINT_NOP19, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18607, IF_P6|IF_UNDOC},
+ /* 3803 */ {I_HINT_NOP19, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18613, IF_P6|IF_UNDOC},
+ /* 3804 */ {I_HINT_NOP19, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18619, IF_X64|IF_UNDOC},
+ /* 3805 */ {I_HINT_NOP20, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18625, IF_P6|IF_UNDOC},
+ /* 3806 */ {I_HINT_NOP20, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18631, IF_P6|IF_UNDOC},
+ /* 3807 */ {I_HINT_NOP20, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18637, IF_X64|IF_UNDOC},
+ /* 3808 */ {I_HINT_NOP21, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18643, IF_P6|IF_UNDOC},
+ /* 3809 */ {I_HINT_NOP21, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18649, IF_P6|IF_UNDOC},
+ /* 3810 */ {I_HINT_NOP21, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18655, IF_X64|IF_UNDOC},
+ /* 3811 */ {I_HINT_NOP22, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18661, IF_P6|IF_UNDOC},
+ /* 3812 */ {I_HINT_NOP22, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18667, IF_P6|IF_UNDOC},
+ /* 3813 */ {I_HINT_NOP22, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18673, IF_X64|IF_UNDOC},
+ /* 3814 */ {I_HINT_NOP23, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18679, IF_P6|IF_UNDOC},
+ /* 3815 */ {I_HINT_NOP23, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18685, IF_P6|IF_UNDOC},
+ /* 3816 */ {I_HINT_NOP23, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18691, IF_X64|IF_UNDOC},
+ /* 3817 */ {I_HINT_NOP24, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18697, IF_P6|IF_UNDOC},
+ /* 3818 */ {I_HINT_NOP24, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18703, IF_P6|IF_UNDOC},
+ /* 3819 */ {I_HINT_NOP24, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18709, IF_X64|IF_UNDOC},
+ /* 3820 */ {I_HINT_NOP25, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18715, IF_P6|IF_UNDOC},
+ /* 3821 */ {I_HINT_NOP25, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18721, IF_P6|IF_UNDOC},
+ /* 3822 */ {I_HINT_NOP25, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18727, IF_X64|IF_UNDOC},
+ /* 3823 */ {I_HINT_NOP26, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18733, IF_P6|IF_UNDOC},
+ /* 3824 */ {I_HINT_NOP26, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18739, IF_P6|IF_UNDOC},
+ /* 3825 */ {I_HINT_NOP26, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18745, IF_X64|IF_UNDOC},
+ /* 3826 */ {I_HINT_NOP27, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18751, IF_P6|IF_UNDOC},
+ /* 3827 */ {I_HINT_NOP27, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18757, IF_P6|IF_UNDOC},
+ /* 3828 */ {I_HINT_NOP27, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18763, IF_X64|IF_UNDOC},
+ /* 3829 */ {I_HINT_NOP28, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18769, IF_P6|IF_UNDOC},
+ /* 3830 */ {I_HINT_NOP28, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18775, IF_P6|IF_UNDOC},
+ /* 3831 */ {I_HINT_NOP28, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18781, IF_X64|IF_UNDOC},
+ /* 3832 */ {I_HINT_NOP29, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18787, IF_P6|IF_UNDOC},
+ /* 3833 */ {I_HINT_NOP29, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18793, IF_P6|IF_UNDOC},
+ /* 3834 */ {I_HINT_NOP29, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18799, IF_X64|IF_UNDOC},
+ /* 3835 */ {I_HINT_NOP30, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18805, IF_P6|IF_UNDOC},
+ /* 3836 */ {I_HINT_NOP30, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18811, IF_P6|IF_UNDOC},
+ /* 3837 */ {I_HINT_NOP30, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18817, IF_X64|IF_UNDOC},
+ /* 3838 */ {I_HINT_NOP31, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18823, IF_P6|IF_UNDOC},
+ /* 3839 */ {I_HINT_NOP31, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18829, IF_P6|IF_UNDOC},
+ /* 3840 */ {I_HINT_NOP31, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18835, IF_X64|IF_UNDOC},
+ /* 3841 */ {I_HINT_NOP32, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18841, IF_P6|IF_UNDOC},
+ /* 3842 */ {I_HINT_NOP32, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18847, IF_P6|IF_UNDOC},
+ /* 3843 */ {I_HINT_NOP32, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18853, IF_X64|IF_UNDOC},
+ /* 3844 */ {I_HINT_NOP33, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18859, IF_P6|IF_UNDOC},
+ /* 3845 */ {I_HINT_NOP33, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18865, IF_P6|IF_UNDOC},
+ /* 3846 */ {I_HINT_NOP33, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18871, IF_X64|IF_UNDOC},
+ /* 3847 */ {I_HINT_NOP34, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18877, IF_P6|IF_UNDOC},
+ /* 3848 */ {I_HINT_NOP34, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18883, IF_P6|IF_UNDOC},
+ /* 3849 */ {I_HINT_NOP34, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18889, IF_X64|IF_UNDOC},
+ /* 3850 */ {I_HINT_NOP35, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18895, IF_P6|IF_UNDOC},
+ /* 3851 */ {I_HINT_NOP35, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18901, IF_P6|IF_UNDOC},
+ /* 3852 */ {I_HINT_NOP35, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18907, IF_X64|IF_UNDOC},
+ /* 3853 */ {I_HINT_NOP36, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18913, IF_P6|IF_UNDOC},
+ /* 3854 */ {I_HINT_NOP36, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18919, IF_P6|IF_UNDOC},
+ /* 3855 */ {I_HINT_NOP36, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18925, IF_X64|IF_UNDOC},
+ /* 3856 */ {I_HINT_NOP37, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18931, IF_P6|IF_UNDOC},
+ /* 3857 */ {I_HINT_NOP37, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18937, IF_P6|IF_UNDOC},
+ /* 3858 */ {I_HINT_NOP37, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18943, IF_X64|IF_UNDOC},
+ /* 3859 */ {I_HINT_NOP38, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18949, IF_P6|IF_UNDOC},
+ /* 3860 */ {I_HINT_NOP38, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18955, IF_P6|IF_UNDOC},
+ /* 3861 */ {I_HINT_NOP38, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18961, IF_X64|IF_UNDOC},
+ /* 3862 */ {I_HINT_NOP39, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18967, IF_P6|IF_UNDOC},
+ /* 3863 */ {I_HINT_NOP39, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18973, IF_P6|IF_UNDOC},
+ /* 3864 */ {I_HINT_NOP39, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18979, IF_X64|IF_UNDOC},
+ /* 3865 */ {I_HINT_NOP40, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+18985, IF_P6|IF_UNDOC},
+ /* 3866 */ {I_HINT_NOP40, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+18991, IF_P6|IF_UNDOC},
+ /* 3867 */ {I_HINT_NOP40, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+18997, IF_X64|IF_UNDOC},
+ /* 3868 */ {I_HINT_NOP41, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19003, IF_P6|IF_UNDOC},
+ /* 3869 */ {I_HINT_NOP41, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19009, IF_P6|IF_UNDOC},
+ /* 3870 */ {I_HINT_NOP41, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19015, IF_X64|IF_UNDOC},
+ /* 3871 */ {I_HINT_NOP42, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19021, IF_P6|IF_UNDOC},
+ /* 3872 */ {I_HINT_NOP42, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19027, IF_P6|IF_UNDOC},
+ /* 3873 */ {I_HINT_NOP42, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19033, IF_X64|IF_UNDOC},
+ /* 3874 */ {I_HINT_NOP43, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19039, IF_P6|IF_UNDOC},
+ /* 3875 */ {I_HINT_NOP43, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19045, IF_P6|IF_UNDOC},
+ /* 3876 */ {I_HINT_NOP43, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19051, IF_X64|IF_UNDOC},
+ /* 3877 */ {I_HINT_NOP44, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19057, IF_P6|IF_UNDOC},
+ /* 3878 */ {I_HINT_NOP44, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19063, IF_P6|IF_UNDOC},
+ /* 3879 */ {I_HINT_NOP44, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19069, IF_X64|IF_UNDOC},
+ /* 3880 */ {I_HINT_NOP45, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19075, IF_P6|IF_UNDOC},
+ /* 3881 */ {I_HINT_NOP45, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19081, IF_P6|IF_UNDOC},
+ /* 3882 */ {I_HINT_NOP45, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19087, IF_X64|IF_UNDOC},
+ /* 3883 */ {I_HINT_NOP46, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19093, IF_P6|IF_UNDOC},
+ /* 3884 */ {I_HINT_NOP46, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19099, IF_P6|IF_UNDOC},
+ /* 3885 */ {I_HINT_NOP46, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19105, IF_X64|IF_UNDOC},
+ /* 3886 */ {I_HINT_NOP47, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19111, IF_P6|IF_UNDOC},
+ /* 3887 */ {I_HINT_NOP47, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19117, IF_P6|IF_UNDOC},
+ /* 3888 */ {I_HINT_NOP47, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19123, IF_X64|IF_UNDOC},
+ /* 3889 */ {I_HINT_NOP48, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19129, IF_P6|IF_UNDOC},
+ /* 3890 */ {I_HINT_NOP48, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19135, IF_P6|IF_UNDOC},
+ /* 3891 */ {I_HINT_NOP48, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19141, IF_X64|IF_UNDOC},
+ /* 3892 */ {I_HINT_NOP49, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19147, IF_P6|IF_UNDOC},
+ /* 3893 */ {I_HINT_NOP49, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19153, IF_P6|IF_UNDOC},
+ /* 3894 */ {I_HINT_NOP49, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19159, IF_X64|IF_UNDOC},
+ /* 3895 */ {I_HINT_NOP50, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19165, IF_P6|IF_UNDOC},
+ /* 3896 */ {I_HINT_NOP50, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19171, IF_P6|IF_UNDOC},
+ /* 3897 */ {I_HINT_NOP50, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19177, IF_X64|IF_UNDOC},
+ /* 3898 */ {I_HINT_NOP51, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19183, IF_P6|IF_UNDOC},
+ /* 3899 */ {I_HINT_NOP51, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19189, IF_P6|IF_UNDOC},
+ /* 3900 */ {I_HINT_NOP51, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19195, IF_X64|IF_UNDOC},
+ /* 3901 */ {I_HINT_NOP52, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19201, IF_P6|IF_UNDOC},
+ /* 3902 */ {I_HINT_NOP52, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19207, IF_P6|IF_UNDOC},
+ /* 3903 */ {I_HINT_NOP52, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19213, IF_X64|IF_UNDOC},
+ /* 3904 */ {I_HINT_NOP53, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19219, IF_P6|IF_UNDOC},
+ /* 3905 */ {I_HINT_NOP53, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19225, IF_P6|IF_UNDOC},
+ /* 3906 */ {I_HINT_NOP53, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19231, IF_X64|IF_UNDOC},
+ /* 3907 */ {I_HINT_NOP54, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19237, IF_P6|IF_UNDOC},
+ /* 3908 */ {I_HINT_NOP54, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19243, IF_P6|IF_UNDOC},
+ /* 3909 */ {I_HINT_NOP54, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19249, IF_X64|IF_UNDOC},
+ /* 3910 */ {I_HINT_NOP55, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19255, IF_P6|IF_UNDOC},
+ /* 3911 */ {I_HINT_NOP55, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19261, IF_P6|IF_UNDOC},
+ /* 3912 */ {I_HINT_NOP55, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19267, IF_X64|IF_UNDOC},
+ /* 3913 */ {I_HINT_NOP56, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+16549, IF_P6|IF_UNDOC},
+ /* 3914 */ {I_HINT_NOP56, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+16555, IF_P6|IF_UNDOC},
+ /* 3915 */ {I_HINT_NOP56, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+16561, IF_X64|IF_UNDOC},
+ /* 3916 */ {I_HINT_NOP57, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19273, IF_P6|IF_UNDOC},
+ /* 3917 */ {I_HINT_NOP57, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19279, IF_P6|IF_UNDOC},
+ /* 3918 */ {I_HINT_NOP57, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19285, IF_X64|IF_UNDOC},
+ /* 3919 */ {I_HINT_NOP58, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19291, IF_P6|IF_UNDOC},
+ /* 3920 */ {I_HINT_NOP58, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19297, IF_P6|IF_UNDOC},
+ /* 3921 */ {I_HINT_NOP58, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19303, IF_X64|IF_UNDOC},
+ /* 3922 */ {I_HINT_NOP59, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19309, IF_P6|IF_UNDOC},
+ /* 3923 */ {I_HINT_NOP59, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19315, IF_P6|IF_UNDOC},
+ /* 3924 */ {I_HINT_NOP59, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19321, IF_X64|IF_UNDOC},
+ /* 3925 */ {I_HINT_NOP60, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19327, IF_P6|IF_UNDOC},
+ /* 3926 */ {I_HINT_NOP60, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19333, IF_P6|IF_UNDOC},
+ /* 3927 */ {I_HINT_NOP60, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19339, IF_X64|IF_UNDOC},
+ /* 3928 */ {I_HINT_NOP61, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19345, IF_P6|IF_UNDOC},
+ /* 3929 */ {I_HINT_NOP61, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19351, IF_P6|IF_UNDOC},
+ /* 3930 */ {I_HINT_NOP61, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19357, IF_X64|IF_UNDOC},
+ /* 3931 */ {I_HINT_NOP62, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19363, IF_P6|IF_UNDOC},
+ /* 3932 */ {I_HINT_NOP62, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19369, IF_P6|IF_UNDOC},
+ /* 3933 */ {I_HINT_NOP62, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19375, IF_X64|IF_UNDOC},
+ /* 3934 */ {I_HINT_NOP63, 1, {RM_GPR|BITS16,0,0,0,0}, nasm_bytecodes+19381, IF_P6|IF_UNDOC},
+ /* 3935 */ {I_HINT_NOP63, 1, {RM_GPR|BITS32,0,0,0,0}, nasm_bytecodes+19387, IF_P6|IF_UNDOC},
+ /* 3936 */ {I_HINT_NOP63, 1, {RM_GPR|BITS64,0,0,0,0}, nasm_bytecodes+19393, IF_X64|IF_UNDOC},
};
static const struct itemplate * const itable_00[] = {
@@ -3642,20 +3982,34 @@ static const struct itemplate * const itable_05[] = {
};
static const struct itemplate * const itable_06[] = {
- instrux + 869,
- instrux + 870,
+ instrux + 861,
+ instrux + 862,
};
static const struct itemplate * const itable_07[] = {
- instrux + 821,
+ instrux + 813,
};
static const struct itemplate * const itable_08[] = {
+ instrux + 713,
+ instrux + 714,
+};
+
+static const struct itemplate * const itable_09[] = {
+ instrux + 715,
+ instrux + 716,
+ instrux + 717,
+ instrux + 718,
+ instrux + 719,
+ instrux + 720,
+};
+
+static const struct itemplate * const itable_0A[] = {
instrux + 721,
instrux + 722,
};
-static const struct itemplate * const itable_09[] = {
+static const struct itemplate * const itable_0B[] = {
instrux + 723,
instrux + 724,
instrux + 725,
@@ -3664,161 +4018,160 @@ static const struct itemplate * const itable_09[] = {
instrux + 728,
};
-static const struct itemplate * const itable_0A[] = {
- instrux + 729,
- instrux + 730,
-};
-
-static const struct itemplate * const itable_0B[] = {
- instrux + 731,
- instrux + 732,
- instrux + 733,
- instrux + 734,
- instrux + 735,
- instrux + 736,
-};
-
static const struct itemplate * const itable_0C[] = {
- instrux + 740,
+ instrux + 732,
};
static const struct itemplate * const itable_0D[] = {
- instrux + 742,
- instrux + 744,
- instrux + 746,
+ instrux + 734,
+ instrux + 736,
+ instrux + 738,
};
static const struct itemplate * const itable_0E[] = {
- instrux + 869,
- instrux + 870,
+ instrux + 861,
+ instrux + 862,
};
static const struct itemplate * const itable_0F00[] = {
- instrux + 545,
- instrux + 546,
- instrux + 575,
- instrux + 576,
- instrux + 577,
- instrux + 620,
- instrux + 621,
- instrux + 622,
- instrux + 1051,
- instrux + 1052,
- instrux + 1053,
- instrux + 1054,
- instrux + 1055,
- instrux + 1070,
- instrux + 1071,
- instrux + 1072,
- instrux + 1073,
- instrux + 1074,
- instrux + 1141,
- instrux + 1142,
- instrux + 1143,
- instrux + 1144,
- instrux + 1145,
- instrux + 1146,
+ instrux + 541,
+ instrux + 542,
+ instrux + 571,
+ instrux + 572,
+ instrux + 573,
+ instrux + 616,
+ instrux + 617,
+ instrux + 618,
+ instrux + 1043,
+ instrux + 1044,
+ instrux + 1045,
+ instrux + 1046,
+ instrux + 1047,
+ instrux + 1062,
+ instrux + 1063,
+ instrux + 1064,
+ instrux + 1065,
+ instrux + 1066,
+ instrux + 1133,
+ instrux + 1134,
+ instrux + 1135,
+ instrux + 1136,
+ instrux + 1137,
+ instrux + 1138,
};
static const struct itemplate * const itable_0F01[] = {
- instrux + 192,
+ instrux + 189,
+ instrux + 504,
instrux + 505,
instrux + 506,
instrux + 507,
instrux + 508,
- instrux + 509,
+ instrux + 566,
instrux + 570,
instrux + 574,
- instrux + 578,
- instrux + 579,
- instrux + 580,
- instrux + 624,
- instrux + 708,
- instrux + 914,
- instrux + 1001,
+ instrux + 575,
+ instrux + 576,
+ instrux + 620,
+ instrux + 700,
+ instrux + 906,
+ instrux + 993,
+ instrux + 1042,
+ instrux + 1048,
instrux + 1050,
+ instrux + 1051,
+ instrux + 1052,
+ instrux + 1053,
instrux + 1056,
- instrux + 1058,
- instrux + 1059,
- instrux + 1060,
- instrux + 1061,
- instrux + 1064,
- instrux + 1110,
- instrux + 1315,
- instrux + 1316,
- instrux + 1551,
- instrux + 1553,
- instrux + 1554,
- instrux + 1555,
- instrux + 1560,
- instrux + 1561,
- instrux + 1562,
- instrux + 1565,
+ instrux + 1102,
+ instrux + 1301,
+ instrux + 1302,
+ instrux + 1537,
+ instrux + 1539,
+ instrux + 1540,
+ instrux + 1541,
+ instrux + 1542,
+ instrux + 1547,
+ instrux + 1548,
+ instrux + 1549,
+ instrux + 1552,
+ instrux + 3104,
+ instrux + 3105,
+ instrux + 3714,
+ instrux + 3715,
};
static const struct itemplate * const itable_0F02[] = {
+ instrux + 544,
+ instrux + 545,
+ instrux + 546,
+ instrux + 547,
instrux + 548,
instrux + 549,
instrux + 550,
instrux + 551,
instrux + 552,
instrux + 553,
- instrux + 554,
- instrux + 555,
- instrux + 556,
- instrux + 557,
};
static const struct itemplate * const itable_0F03[] = {
+ instrux + 603,
+ instrux + 604,
+ instrux + 605,
+ instrux + 606,
instrux + 607,
instrux + 608,
instrux + 609,
instrux + 610,
instrux + 611,
instrux + 612,
- instrux + 613,
- instrux + 614,
- instrux + 615,
- instrux + 616,
};
static const struct itemplate * const itable_0F05[] = {
- instrux + 582,
- instrux + 1111,
+ instrux + 578,
+ instrux + 1103,
};
static const struct itemplate * const itable_0F06[] = {
- instrux + 194,
+ instrux + 191,
};
static const struct itemplate * const itable_0F07[] = {
- instrux + 581,
- instrux + 1114,
+ instrux + 577,
+ instrux + 1106,
};
static const struct itemplate * const itable_0F08[] = {
- instrux + 504,
+ instrux + 501,
};
static const struct itemplate * const itable_0F09[] = {
- instrux + 1148,
+ instrux + 1140,
};
static const struct itemplate * const itable_0F0B[] = {
- instrux + 1140,
+ instrux + 1132,
};
static const struct itemplate * const itable_0F0D[] = {
- instrux + 831,
- instrux + 832,
+ instrux + 823,
+ instrux + 824,
};
static const struct itemplate * const itable_0F0E[] = {
- instrux + 330,
+ instrux + 327,
};
static const struct itemplate * const itable_0F0F[] = {
+ instrux + 770,
instrux + 778,
+ instrux + 779,
+ instrux + 780,
+ instrux + 781,
+ instrux + 782,
+ instrux + 783,
+ instrux + 784,
+ instrux + 785,
instrux + 786,
instrux + 787,
instrux + 788,
@@ -3828,1428 +4181,1421 @@ static const struct itemplate * const itable_0F0F[] = {
instrux + 792,
instrux + 793,
instrux + 794,
- instrux + 795,
- instrux + 796,
- instrux + 797,
- instrux + 798,
instrux + 799,
- instrux + 800,
- instrux + 801,
- instrux + 802,
- instrux + 807,
- instrux + 1344,
- instrux + 1345,
- instrux + 1346,
- instrux + 1347,
- instrux + 1348,
- instrux + 1684,
- instrux + 1685,
+ instrux + 1330,
+ instrux + 1331,
+ instrux + 1332,
+ instrux + 1333,
+ instrux + 1334,
+ instrux + 1671,
+ instrux + 1672,
};
static const struct itemplate * const itable_0F10[] = {
- instrux + 1285,
- instrux + 1287,
- instrux + 1289,
- instrux + 1291,
- instrux + 1520,
- instrux + 1523,
- instrux + 1524,
- instrux + 1527,
+ instrux + 1275,
+ instrux + 1277,
+ instrux + 1278,
+ instrux + 1506,
+ instrux + 1509,
+ instrux + 1510,
+ instrux + 1513,
};
static const struct itemplate * const itable_0F11[] = {
- instrux + 1286,
- instrux + 1288,
- instrux + 1290,
- instrux + 1292,
- instrux + 1521,
- instrux + 1522,
- instrux + 1525,
- instrux + 1526,
+ instrux + 1276,
+ instrux + 1279,
+ instrux + 1507,
+ instrux + 1508,
+ instrux + 1511,
+ instrux + 1512,
};
static const struct itemplate * const itable_0F12[] = {
- instrux + 1279,
- instrux + 1281,
- instrux + 1517,
- instrux + 1548,
- instrux + 1550,
+ instrux + 1269,
+ instrux + 1271,
+ instrux + 1503,
+ instrux + 1534,
+ instrux + 1536,
};
static const struct itemplate * const itable_0F13[] = {
- instrux + 1280,
- instrux + 1516,
+ instrux + 1270,
+ instrux + 1502,
};
static const struct itemplate * const itable_0F14[] = {
- instrux + 1309,
- instrux + 1539,
+ instrux + 1295,
+ instrux + 1525,
};
static const struct itemplate * const itable_0F15[] = {
- instrux + 1308,
- instrux + 1538,
+ instrux + 1294,
+ instrux + 1524,
};
static const struct itemplate * const itable_0F16[] = {
- instrux + 1276,
- instrux + 1278,
- instrux + 1515,
- instrux + 1549,
+ instrux + 1266,
+ instrux + 1268,
+ instrux + 1501,
+ instrux + 1535,
};
static const struct itemplate * const itable_0F17[] = {
- instrux + 1277,
- instrux + 1514,
+ instrux + 1267,
+ instrux + 1500,
};
static const struct itemplate * const itable_0F18[] = {
- instrux + 1323,
- instrux + 1324,
- instrux + 1325,
- instrux + 1326,
- instrux + 3405,
- instrux + 3406,
- instrux + 3407,
- instrux + 3408,
- instrux + 3409,
- instrux + 3410,
- instrux + 3411,
- instrux + 3412,
- instrux + 3413,
- instrux + 3414,
- instrux + 3415,
- instrux + 3416,
- instrux + 3417,
- instrux + 3418,
- instrux + 3419,
- instrux + 3420,
- instrux + 3421,
- instrux + 3422,
- instrux + 3423,
- instrux + 3424,
- instrux + 3425,
- instrux + 3426,
- instrux + 3427,
- instrux + 3428,
+ instrux + 1309,
+ instrux + 1310,
+ instrux + 1311,
+ instrux + 1312,
+ instrux + 3745,
+ instrux + 3746,
+ instrux + 3747,
+ instrux + 3748,
+ instrux + 3749,
+ instrux + 3750,
+ instrux + 3751,
+ instrux + 3752,
+ instrux + 3753,
+ instrux + 3754,
+ instrux + 3755,
+ instrux + 3756,
+ instrux + 3757,
+ instrux + 3758,
+ instrux + 3759,
+ instrux + 3760,
+ instrux + 3761,
+ instrux + 3762,
+ instrux + 3763,
+ instrux + 3764,
+ instrux + 3765,
+ instrux + 3766,
+ instrux + 3767,
+ instrux + 3768,
};
static const struct itemplate * const itable_0F19[] = {
- instrux + 3429,
- instrux + 3430,
- instrux + 3431,
- instrux + 3432,
- instrux + 3433,
- instrux + 3434,
- instrux + 3435,
- instrux + 3436,
- instrux + 3437,
- instrux + 3438,
- instrux + 3439,
- instrux + 3440,
- instrux + 3441,
- instrux + 3442,
- instrux + 3443,
- instrux + 3444,
- instrux + 3445,
- instrux + 3446,
- instrux + 3447,
- instrux + 3448,
- instrux + 3449,
- instrux + 3450,
- instrux + 3451,
- instrux + 3452,
+ instrux + 3769,
+ instrux + 3770,
+ instrux + 3771,
+ instrux + 3772,
+ instrux + 3773,
+ instrux + 3774,
+ instrux + 3775,
+ instrux + 3776,
+ instrux + 3777,
+ instrux + 3778,
+ instrux + 3779,
+ instrux + 3780,
+ instrux + 3781,
+ instrux + 3782,
+ instrux + 3783,
+ instrux + 3784,
+ instrux + 3785,
+ instrux + 3786,
+ instrux + 3787,
+ instrux + 3788,
+ instrux + 3789,
+ instrux + 3790,
+ instrux + 3791,
+ instrux + 3792,
};
static const struct itemplate * const itable_0F1A[] = {
- instrux + 3453,
- instrux + 3454,
- instrux + 3455,
- instrux + 3456,
- instrux + 3457,
- instrux + 3458,
- instrux + 3459,
- instrux + 3460,
- instrux + 3461,
- instrux + 3462,
- instrux + 3463,
- instrux + 3464,
- instrux + 3465,
- instrux + 3466,
- instrux + 3467,
- instrux + 3468,
- instrux + 3469,
- instrux + 3470,
- instrux + 3471,
- instrux + 3472,
- instrux + 3473,
- instrux + 3474,
- instrux + 3475,
- instrux + 3476,
+ instrux + 3793,
+ instrux + 3794,
+ instrux + 3795,
+ instrux + 3796,
+ instrux + 3797,
+ instrux + 3798,
+ instrux + 3799,
+ instrux + 3800,
+ instrux + 3801,
+ instrux + 3802,
+ instrux + 3803,
+ instrux + 3804,
+ instrux + 3805,
+ instrux + 3806,
+ instrux + 3807,
+ instrux + 3808,
+ instrux + 3809,
+ instrux + 3810,
+ instrux + 3811,
+ instrux + 3812,
+ instrux + 3813,
+ instrux + 3814,
+ instrux + 3815,
+ instrux + 3816,
};
static const struct itemplate * const itable_0F1B[] = {
- instrux + 3477,
- instrux + 3478,
- instrux + 3479,
- instrux + 3480,
- instrux + 3481,
- instrux + 3482,
- instrux + 3483,
- instrux + 3484,
- instrux + 3485,
- instrux + 3486,
- instrux + 3487,
- instrux + 3488,
- instrux + 3489,
- instrux + 3490,
- instrux + 3491,
- instrux + 3492,
- instrux + 3493,
- instrux + 3494,
- instrux + 3495,
- instrux + 3496,
- instrux + 3497,
- instrux + 3498,
- instrux + 3499,
- instrux + 3500,
+ instrux + 3817,
+ instrux + 3818,
+ instrux + 3819,
+ instrux + 3820,
+ instrux + 3821,
+ instrux + 3822,
+ instrux + 3823,
+ instrux + 3824,
+ instrux + 3825,
+ instrux + 3826,
+ instrux + 3827,
+ instrux + 3828,
+ instrux + 3829,
+ instrux + 3830,
+ instrux + 3831,
+ instrux + 3832,
+ instrux + 3833,
+ instrux + 3834,
+ instrux + 3835,
+ instrux + 3836,
+ instrux + 3837,
+ instrux + 3838,
+ instrux + 3839,
+ instrux + 3840,
};
static const struct itemplate * const itable_0F1C[] = {
- instrux + 3501,
- instrux + 3502,
- instrux + 3503,
- instrux + 3504,
- instrux + 3505,
- instrux + 3506,
- instrux + 3507,
- instrux + 3508,
- instrux + 3509,
- instrux + 3510,
- instrux + 3511,
- instrux + 3512,
- instrux + 3513,
- instrux + 3514,
- instrux + 3515,
- instrux + 3516,
- instrux + 3517,
- instrux + 3518,
- instrux + 3519,
- instrux + 3520,
- instrux + 3521,
- instrux + 3522,
- instrux + 3523,
- instrux + 3524,
+ instrux + 3841,
+ instrux + 3842,
+ instrux + 3843,
+ instrux + 3844,
+ instrux + 3845,
+ instrux + 3846,
+ instrux + 3847,
+ instrux + 3848,
+ instrux + 3849,
+ instrux + 3850,
+ instrux + 3851,
+ instrux + 3852,
+ instrux + 3853,
+ instrux + 3854,
+ instrux + 3855,
+ instrux + 3856,
+ instrux + 3857,
+ instrux + 3858,
+ instrux + 3859,
+ instrux + 3860,
+ instrux + 3861,
+ instrux + 3862,
+ instrux + 3863,
+ instrux + 3864,
};
static const struct itemplate * const itable_0F1D[] = {
- instrux + 3525,
- instrux + 3526,
- instrux + 3527,
- instrux + 3528,
- instrux + 3529,
- instrux + 3530,
- instrux + 3531,
- instrux + 3532,
- instrux + 3533,
- instrux + 3534,
- instrux + 3535,
- instrux + 3536,
- instrux + 3537,
- instrux + 3538,
- instrux + 3539,
- instrux + 3540,
- instrux + 3541,
- instrux + 3542,
- instrux + 3543,
- instrux + 3544,
- instrux + 3545,
- instrux + 3546,
- instrux + 3547,
- instrux + 3548,
+ instrux + 3865,
+ instrux + 3866,
+ instrux + 3867,
+ instrux + 3868,
+ instrux + 3869,
+ instrux + 3870,
+ instrux + 3871,
+ instrux + 3872,
+ instrux + 3873,
+ instrux + 3874,
+ instrux + 3875,
+ instrux + 3876,
+ instrux + 3877,
+ instrux + 3878,
+ instrux + 3879,
+ instrux + 3880,
+ instrux + 3881,
+ instrux + 3882,
+ instrux + 3883,
+ instrux + 3884,
+ instrux + 3885,
+ instrux + 3886,
+ instrux + 3887,
+ instrux + 3888,
};
static const struct itemplate * const itable_0F1E[] = {
- instrux + 3549,
- instrux + 3550,
- instrux + 3551,
- instrux + 3552,
- instrux + 3553,
- instrux + 3554,
- instrux + 3555,
- instrux + 3556,
- instrux + 3557,
- instrux + 3558,
- instrux + 3559,
- instrux + 3560,
- instrux + 3561,
- instrux + 3562,
- instrux + 3563,
- instrux + 3564,
- instrux + 3565,
- instrux + 3566,
- instrux + 3567,
- instrux + 3568,
- instrux + 3569,
- instrux + 3570,
- instrux + 3571,
- instrux + 3572,
+ instrux + 3889,
+ instrux + 3890,
+ instrux + 3891,
+ instrux + 3892,
+ instrux + 3893,
+ instrux + 3894,
+ instrux + 3895,
+ instrux + 3896,
+ instrux + 3897,
+ instrux + 3898,
+ instrux + 3899,
+ instrux + 3900,
+ instrux + 3901,
+ instrux + 3902,
+ instrux + 3903,
+ instrux + 3904,
+ instrux + 3905,
+ instrux + 3906,
+ instrux + 3907,
+ instrux + 3908,
+ instrux + 3909,
+ instrux + 3910,
+ instrux + 3911,
+ instrux + 3912,
};
static const struct itemplate * const itable_0F1F[] = {
- instrux + 714,
- instrux + 715,
- instrux + 716,
- instrux + 3573,
- instrux + 3574,
- instrux + 3575,
- instrux + 3576,
- instrux + 3577,
- instrux + 3578,
- instrux + 3579,
- instrux + 3580,
- instrux + 3581,
- instrux + 3582,
- instrux + 3583,
- instrux + 3584,
- instrux + 3585,
- instrux + 3586,
- instrux + 3587,
- instrux + 3588,
- instrux + 3589,
- instrux + 3590,
- instrux + 3591,
- instrux + 3592,
- instrux + 3593,
- instrux + 3594,
- instrux + 3595,
- instrux + 3596,
+ instrux + 706,
+ instrux + 707,
+ instrux + 708,
+ instrux + 3913,
+ instrux + 3914,
+ instrux + 3915,
+ instrux + 3916,
+ instrux + 3917,
+ instrux + 3918,
+ instrux + 3919,
+ instrux + 3920,
+ instrux + 3921,
+ instrux + 3922,
+ instrux + 3923,
+ instrux + 3924,
+ instrux + 3925,
+ instrux + 3926,
+ instrux + 3927,
+ instrux + 3928,
+ instrux + 3929,
+ instrux + 3930,
+ instrux + 3931,
+ instrux + 3932,
+ instrux + 3933,
+ instrux + 3934,
+ instrux + 3935,
+ instrux + 3936,
};
static const struct itemplate * const itable_0F20[] = {
- instrux + 639,
- instrux + 640,
+ instrux + 637,
+ instrux + 638,
};
static const struct itemplate * const itable_0F21[] = {
- instrux + 643,
- instrux + 644,
+ instrux + 641,
+ instrux + 642,
};
static const struct itemplate * const itable_0F22[] = {
- instrux + 641,
- instrux + 642,
+ instrux + 639,
+ instrux + 640,
};
static const struct itemplate * const itable_0F23[] = {
- instrux + 645,
- instrux + 646,
+ instrux + 643,
+ instrux + 644,
};
static const struct itemplate * const itable_0F28[] = {
- instrux + 1272,
- instrux + 1274,
- instrux + 1510,
- instrux + 1513,
+ instrux + 1264,
+ instrux + 1496,
+ instrux + 1499,
};
static const struct itemplate * const itable_0F29[] = {
- instrux + 1273,
- instrux + 1275,
- instrux + 1511,
- instrux + 1512,
+ instrux + 1265,
+ instrux + 1497,
+ instrux + 1498,
};
static const struct itemplate * const itable_0F2A[] = {
- instrux + 1254,
- instrux + 1256,
- instrux + 1257,
- instrux + 1486,
- instrux + 1494,
- instrux + 1495,
+ instrux + 1246,
+ instrux + 1248,
+ instrux + 1249,
+ instrux + 1472,
+ instrux + 1480,
+ instrux + 1481,
};
static const struct itemplate * const itable_0F2B[] = {
- instrux + 1284,
- instrux + 1354,
- instrux + 1607,
- instrux + 1608,
+ instrux + 1274,
+ instrux + 1340,
+ instrux + 1594,
+ instrux + 1595,
};
static const struct itemplate * const itable_0F2C[] = {
- instrux + 1262,
- instrux + 1263,
- instrux + 1264,
- instrux + 1497,
- instrux + 1500,
- instrux + 1501,
- instrux + 1502,
- instrux + 1503,
+ instrux + 1254,
+ instrux + 1255,
+ instrux + 1256,
+ instrux + 1483,
+ instrux + 1486,
+ instrux + 1487,
+ instrux + 1488,
+ instrux + 1489,
};
static const struct itemplate * const itable_0F2D[] = {
- instrux + 1255,
- instrux + 1258,
- instrux + 1259,
- instrux + 1260,
- instrux + 1261,
- instrux + 1484,
- instrux + 1489,
- instrux + 1490,
- instrux + 1491,
- instrux + 1492,
+ instrux + 1247,
+ instrux + 1250,
+ instrux + 1251,
+ instrux + 1252,
+ instrux + 1253,
+ instrux + 1470,
+ instrux + 1475,
+ instrux + 1476,
+ instrux + 1477,
+ instrux + 1478,
};
static const struct itemplate * const itable_0F2E[] = {
- instrux + 1307,
- instrux + 1537,
+ instrux + 1293,
+ instrux + 1523,
};
static const struct itemplate * const itable_0F2F[] = {
- instrux + 1253,
- instrux + 1480,
+ instrux + 1245,
+ instrux + 1466,
};
static const struct itemplate * const itable_0F30[] = {
- instrux + 1150,
+ instrux + 1142,
};
static const struct itemplate * const itable_0F31[] = {
- instrux + 913,
+ instrux + 905,
};
static const struct itemplate * const itable_0F32[] = {
- instrux + 911,
+ instrux + 903,
};
static const struct itemplate * const itable_0F33[] = {
- instrux + 912,
+ instrux + 904,
};
static const struct itemplate * const itable_0F34[] = {
- instrux + 1112,
+ instrux + 1104,
};
static const struct itemplate * const itable_0F35[] = {
- instrux + 1113,
+ instrux + 1105,
};
static const struct itemplate * const itable_0F36[] = {
- instrux + 910,
+ instrux + 902,
};
static const struct itemplate * const itable_0F37[] = {
- instrux + 1149,
- instrux + 1683,
+ instrux + 1141,
+ instrux + 1670,
};
static const struct itemplate * const itable_0F3800[] = {
- instrux + 1595,
- instrux + 1596,
+ instrux + 1582,
+ instrux + 1583,
};
static const struct itemplate * const itable_0F3801[] = {
- instrux + 1579,
- instrux + 1580,
+ instrux + 1566,
+ instrux + 1567,
};
static const struct itemplate * const itable_0F3802[] = {
- instrux + 1581,
- instrux + 1582,
+ instrux + 1568,
+ instrux + 1569,
};
static const struct itemplate * const itable_0F3803[] = {
- instrux + 1583,
- instrux + 1584,
+ instrux + 1570,
+ instrux + 1571,
};
static const struct itemplate * const itable_0F3804[] = {
- instrux + 1591,
- instrux + 1592,
+ instrux + 1578,
+ instrux + 1579,
};
static const struct itemplate * const itable_0F3805[] = {
- instrux + 1585,
- instrux + 1586,
+ instrux + 1572,
+ instrux + 1573,
};
static const struct itemplate * const itable_0F3806[] = {
- instrux + 1587,
- instrux + 1588,
+ instrux + 1574,
+ instrux + 1575,
};
static const struct itemplate * const itable_0F3807[] = {
- instrux + 1589,
- instrux + 1590,
+ instrux + 1576,
+ instrux + 1577,
};
static const struct itemplate * const itable_0F3808[] = {
- instrux + 1597,
- instrux + 1598,
+ instrux + 1584,
+ instrux + 1585,
};
static const struct itemplate * const itable_0F3809[] = {
- instrux + 1599,
- instrux + 1600,
+ instrux + 1586,
+ instrux + 1587,
};
static const struct itemplate * const itable_0F380A[] = {
- instrux + 1601,
- instrux + 1602,
+ instrux + 1588,
+ instrux + 1589,
};
static const struct itemplate * const itable_0F380B[] = {
- instrux + 1593,
- instrux + 1594,
+ instrux + 1580,
+ instrux + 1581,
};
static const struct itemplate * const itable_0F3810[] = {
- instrux + 1624,
+ instrux + 1611,
};
static const struct itemplate * const itable_0F3814[] = {
- instrux + 1615,
+ instrux + 1602,
};
static const struct itemplate * const itable_0F3815[] = {
- instrux + 1614,
+ instrux + 1601,
};
static const struct itemplate * const itable_0F3817[] = {
- instrux + 1665,
+ instrux + 1652,
};
static const struct itemplate * const itable_0F381C[] = {
- instrux + 1571,
- instrux + 1572,
+ instrux + 1558,
+ instrux + 1559,
};
static const struct itemplate * const itable_0F381D[] = {
- instrux + 1573,
- instrux + 1574,
+ instrux + 1560,
+ instrux + 1561,
};
static const struct itemplate * const itable_0F381E[] = {
- instrux + 1575,
- instrux + 1576,
+ instrux + 1562,
+ instrux + 1563,
};
static const struct itemplate * const itable_0F3820[] = {
- instrux + 1651,
+ instrux + 1638,
};
static const struct itemplate * const itable_0F3821[] = {
- instrux + 1652,
+ instrux + 1639,
};
static const struct itemplate * const itable_0F3822[] = {
- instrux + 1653,
+ instrux + 1640,
};
static const struct itemplate * const itable_0F3823[] = {
- instrux + 1654,
+ instrux + 1641,
};
static const struct itemplate * const itable_0F3824[] = {
- instrux + 1655,
+ instrux + 1642,
};
static const struct itemplate * const itable_0F3825[] = {
- instrux + 1656,
+ instrux + 1643,
};
static const struct itemplate * const itable_0F3828[] = {
- instrux + 1663,
+ instrux + 1650,
};
static const struct itemplate * const itable_0F3829[] = {
- instrux + 1626,
+ instrux + 1613,
};
static const struct itemplate * const itable_0F382A[] = {
- instrux + 1621,
+ instrux + 1608,
};
static const struct itemplate * const itable_0F382B[] = {
- instrux + 1623,
+ instrux + 1610,
};
static const struct itemplate * const itable_0F3830[] = {
- instrux + 1657,
+ instrux + 1644,
};
static const struct itemplate * const itable_0F3831[] = {
- instrux + 1658,
+ instrux + 1645,
};
static const struct itemplate * const itable_0F3832[] = {
- instrux + 1659,
+ instrux + 1646,
};
static const struct itemplate * const itable_0F3833[] = {
- instrux + 1660,
+ instrux + 1647,
};
static const struct itemplate * const itable_0F3834[] = {
- instrux + 1661,
+ instrux + 1648,
};
static const struct itemplate * const itable_0F3835[] = {
- instrux + 1662,
+ instrux + 1649,
};
static const struct itemplate * const itable_0F3837[] = {
- instrux + 1679,
+ instrux + 1666,
};
static const struct itemplate * const itable_0F3838[] = {
- instrux + 1647,
+ instrux + 1634,
};
static const struct itemplate * const itable_0F3839[] = {
- instrux + 1648,
+ instrux + 1635,
};
static const struct itemplate * const itable_0F383A[] = {
- instrux + 1650,
+ instrux + 1637,
};
static const struct itemplate * const itable_0F383B[] = {
- instrux + 1649,
+ instrux + 1636,
};
static const struct itemplate * const itable_0F383C[] = {
- instrux + 1643,
+ instrux + 1630,
};
static const struct itemplate * const itable_0F383D[] = {
- instrux + 1644,
+ instrux + 1631,
};
static const struct itemplate * const itable_0F383E[] = {
- instrux + 1646,
+ instrux + 1633,
};
static const struct itemplate * const itable_0F383F[] = {
- instrux + 1645,
+ instrux + 1632,
};
static const struct itemplate * const itable_0F3840[] = {
- instrux + 1664,
+ instrux + 1651,
};
static const struct itemplate * const itable_0F3841[] = {
- instrux + 1635,
+ instrux + 1622,
};
static const struct itemplate * const itable_0F3880[] = {
- instrux + 1567,
- instrux + 1568,
+ instrux + 1554,
+ instrux + 1555,
};
static const struct itemplate * const itable_0F3881[] = {
- instrux + 1569,
- instrux + 1570,
+ instrux + 1556,
+ instrux + 1557,
+};
+
+static const struct itemplate * const itable_0F3882[] = {
+ instrux + 502,
+ instrux + 503,
};
static const struct itemplate * const itable_0F38DB[] = {
- instrux + 1696,
+ instrux + 1683,
};
static const struct itemplate * const itable_0F38DC[] = {
- instrux + 1692,
+ instrux + 1679,
};
static const struct itemplate * const itable_0F38DD[] = {
- instrux + 1693,
+ instrux + 1680,
};
static const struct itemplate * const itable_0F38DE[] = {
- instrux + 1694,
+ instrux + 1681,
};
static const struct itemplate * const itable_0F38DF[] = {
- instrux + 1695,
+ instrux + 1682,
};
static const struct itemplate * const itable_0F38F0[] = {
- instrux + 1670,
+ instrux + 1657,
+ instrux + 1660,
instrux + 1673,
- instrux + 1686,
- instrux + 1687,
- instrux + 1688,
+ instrux + 1674,
+ instrux + 1675,
};
static const struct itemplate * const itable_0F38F1[] = {
- instrux + 1671,
- instrux + 1672,
- instrux + 1674,
- instrux + 1689,
- instrux + 1690,
- instrux + 1691,
+ instrux + 1658,
+ instrux + 1659,
+ instrux + 1661,
+ instrux + 1676,
+ instrux + 1677,
+ instrux + 1678,
+};
+
+static const struct itemplate * const itable_0F38F6[] = {
+ instrux + 3097,
+ instrux + 3098,
+ instrux + 3099,
+ instrux + 3100,
};
static const struct itemplate * const itable_0F39[] = {
- instrux + 261,
+ instrux + 258,
};
static const struct itemplate * const itable_0F3A08[] = {
- instrux + 1667,
+ instrux + 1654,
};
static const struct itemplate * const itable_0F3A09[] = {
- instrux + 1666,
+ instrux + 1653,
};
static const struct itemplate * const itable_0F3A0A[] = {
- instrux + 1669,
+ instrux + 1656,
};
static const struct itemplate * const itable_0F3A0B[] = {
- instrux + 1668,
+ instrux + 1655,
};
static const struct itemplate * const itable_0F3A0C[] = {
- instrux + 1613,
+ instrux + 1600,
};
static const struct itemplate * const itable_0F3A0D[] = {
- instrux + 1612,
+ instrux + 1599,
};
static const struct itemplate * const itable_0F3A0E[] = {
- instrux + 1625,
+ instrux + 1612,
};
static const struct itemplate * const itable_0F3A0F[] = {
- instrux + 1577,
- instrux + 1578,
+ instrux + 1564,
+ instrux + 1565,
};
static const struct itemplate * const itable_0F3A14[] = {
- instrux + 1627,
- instrux + 1628,
- instrux + 1629,
+ instrux + 1614,
+ instrux + 1615,
+ instrux + 1616,
};
static const struct itemplate * const itable_0F3A15[] = {
- instrux + 1632,
- instrux + 1633,
- instrux + 1634,
+ instrux + 1619,
+ instrux + 1620,
+ instrux + 1621,
};
static const struct itemplate * const itable_0F3A16[] = {
- instrux + 1630,
- instrux + 1631,
+ instrux + 1617,
+ instrux + 1618,
};
static const struct itemplate * const itable_0F3A17[] = {
- instrux + 1618,
- instrux + 1619,
+ instrux + 1605,
+ instrux + 1606,
};
static const struct itemplate * const itable_0F3A20[] = {
- instrux + 1636,
- instrux + 1637,
- instrux + 1638,
+ instrux + 1623,
+ instrux + 1624,
+ instrux + 1625,
};
static const struct itemplate * const itable_0F3A21[] = {
- instrux + 1620,
+ instrux + 1607,
};
static const struct itemplate * const itable_0F3A22[] = {
- instrux + 1639,
- instrux + 1640,
- instrux + 1641,
- instrux + 1642,
+ instrux + 1626,
+ instrux + 1627,
+ instrux + 1628,
+ instrux + 1629,
};
static const struct itemplate * const itable_0F3A40[] = {
- instrux + 1617,
+ instrux + 1604,
};
static const struct itemplate * const itable_0F3A41[] = {
- instrux + 1616,
+ instrux + 1603,
};
static const struct itemplate * const itable_0F3A42[] = {
- instrux + 1622,
+ instrux + 1609,
};
static const struct itemplate * const itable_0F3A44[] = {
- instrux + 2888,
- instrux + 2889,
- instrux + 2890,
- instrux + 2891,
- instrux + 2892,
+ instrux + 2875,
+ instrux + 2876,
+ instrux + 2877,
+ instrux + 2878,
+ instrux + 2879,
};
static const struct itemplate * const itable_0F3A60[] = {
- instrux + 1676,
+ instrux + 1663,
};
static const struct itemplate * const itable_0F3A61[] = {
- instrux + 1675,
+ instrux + 1662,
};
static const struct itemplate * const itable_0F3A62[] = {
- instrux + 1678,
+ instrux + 1665,
};
static const struct itemplate * const itable_0F3A63[] = {
- instrux + 1677,
+ instrux + 1664,
};
static const struct itemplate * const itable_0F3ADF[] = {
- instrux + 1697,
+ instrux + 1684,
};
static const struct itemplate * const itable_0F3C[] = {
- instrux + 245,
+ instrux + 242,
};
static const struct itemplate * const itable_0F3D[] = {
- instrux + 244,
+ instrux + 241,
};
static const struct itemplate * const itable_0F40[] = {
- instrux + 1217,
- instrux + 1218,
- instrux + 1219,
- instrux + 1220,
- instrux + 1221,
- instrux + 1222,
+ instrux + 1209,
+ instrux + 1210,
+ instrux + 1211,
+ instrux + 1212,
+ instrux + 1213,
+ instrux + 1214,
};
static const struct itemplate * const itable_0F41[] = {
- instrux + 1217,
- instrux + 1218,
- instrux + 1219,
- instrux + 1220,
- instrux + 1221,
- instrux + 1222,
+ instrux + 1209,
+ instrux + 1210,
+ instrux + 1211,
+ instrux + 1212,
+ instrux + 1213,
+ instrux + 1214,
};
static const struct itemplate * const itable_0F42[] = {
- instrux + 1217,
- instrux + 1218,
- instrux + 1219,
- instrux + 1220,
- instrux + 1221,
- instrux + 1222,
+ instrux + 1209,
+ instrux + 1210,
+ instrux + 1211,
+ instrux + 1212,
+ instrux + 1213,
+ instrux + 1214,
};
static const struct itemplate * const itable_0F43[] = {
- instrux + 1217,
- instrux + 1218,
- instrux + 1219,
- instrux + 1220,
- instrux + 1221,
- instrux + 1222,
+ instrux + 1209,
+ instrux + 1210,
+ instrux + 1211,
+ instrux + 1212,
+ instrux + 1213,
+ instrux + 1214,
};
static const struct itemplate * const itable_0F44[] = {
- instrux + 1217,
- instrux + 1218,
- instrux + 1219,
- instrux + 1220,
- instrux + 1221,
- instrux + 1222,
+ instrux + 1209,
+ instrux + 1210,
+ instrux + 1211,
+ instrux + 1212,
+ instrux + 1213,
+ instrux + 1214,
};
static const struct itemplate * const itable_0F45[] = {
- instrux + 1217,
- instrux + 1218,
- instrux + 1219,
- instrux + 1220,
- instrux + 1221,
- instrux + 1222,
+ instrux + 1209,
+ instrux + 1210,
+ instrux + 1211,
+ instrux + 1212,
+ instrux + 1213,
+ instrux + 1214,
};
static const struct itemplate * const itable_0F46[] = {
- instrux + 1217,
- instrux + 1218,
- instrux + 1219,
- instrux + 1220,
- instrux + 1221,
- instrux + 1222,
+ instrux + 1209,
+ instrux + 1210,
+ instrux + 1211,
+ instrux + 1212,
+ instrux + 1213,
+ instrux + 1214,
};
static const struct itemplate * const itable_0F47[] = {
- instrux + 1217,
- instrux + 1218,
- instrux + 1219,
- instrux + 1220,
- instrux + 1221,
- instrux + 1222,
+ instrux + 1209,
+ instrux + 1210,
+ instrux + 1211,
+ instrux + 1212,
+ instrux + 1213,
+ instrux + 1214,
};
static const struct itemplate * const itable_0F48[] = {
- instrux + 1217,
- instrux + 1218,
- instrux + 1219,
- instrux + 1220,
- instrux + 1221,
- instrux + 1222,
+ instrux + 1209,
+ instrux + 1210,
+ instrux + 1211,
+ instrux + 1212,
+ instrux + 1213,
+ instrux + 1214,
};
static const struct itemplate * const itable_0F49[] = {
- instrux + 1217,
- instrux + 1218,
- instrux + 1219,
- instrux + 1220,
- instrux + 1221,
- instrux + 1222,
+ instrux + 1209,
+ instrux + 1210,
+ instrux + 1211,
+ instrux + 1212,
+ instrux + 1213,
+ instrux + 1214,
};
static const struct itemplate * const itable_0F4A[] = {
- instrux + 1217,
- instrux + 1218,
- instrux + 1219,
- instrux + 1220,
- instrux + 1221,
- instrux + 1222,
+ instrux + 1209,
+ instrux + 1210,
+ instrux + 1211,
+ instrux + 1212,
+ instrux + 1213,
+ instrux + 1214,
};
static const struct itemplate * const itable_0F4B[] = {
- instrux + 1217,
- instrux + 1218,
- instrux + 1219,
- instrux + 1220,
- instrux + 1221,
- instrux + 1222,
+ instrux + 1209,
+ instrux + 1210,
+ instrux + 1211,
+ instrux + 1212,
+ instrux + 1213,
+ instrux + 1214,
};
static const struct itemplate * const itable_0F4C[] = {
- instrux + 1217,
- instrux + 1218,
- instrux + 1219,
- instrux + 1220,
- instrux + 1221,
- instrux + 1222,
+ instrux + 1209,
+ instrux + 1210,
+ instrux + 1211,
+ instrux + 1212,
+ instrux + 1213,
+ instrux + 1214,
};
static const struct itemplate * const itable_0F4D[] = {
- instrux + 1217,
- instrux + 1218,
- instrux + 1219,
- instrux + 1220,
- instrux + 1221,
- instrux + 1222,
+ instrux + 1209,
+ instrux + 1210,
+ instrux + 1211,
+ instrux + 1212,
+ instrux + 1213,
+ instrux + 1214,
};
static const struct itemplate * const itable_0F4E[] = {
- instrux + 1217,
- instrux + 1218,
- instrux + 1219,
- instrux + 1220,
- instrux + 1221,
- instrux + 1222,
+ instrux + 1209,
+ instrux + 1210,
+ instrux + 1211,
+ instrux + 1212,
+ instrux + 1213,
+ instrux + 1214,
};
static const struct itemplate * const itable_0F4F[] = {
- instrux + 1217,
- instrux + 1218,
- instrux + 1219,
- instrux + 1220,
- instrux + 1221,
- instrux + 1222,
+ instrux + 1209,
+ instrux + 1210,
+ instrux + 1211,
+ instrux + 1212,
+ instrux + 1213,
+ instrux + 1214,
};
static const struct itemplate * const itable_0F50[] = {
- instrux + 777,
- instrux + 1282,
- instrux + 1283,
- instrux + 1518,
- instrux + 1519,
+ instrux + 769,
+ instrux + 1272,
+ instrux + 1273,
+ instrux + 1504,
+ instrux + 1505,
};
static const struct itemplate * const itable_0F51[] = {
- instrux + 769,
- instrux + 1302,
- instrux + 1303,
- instrux + 1533,
- instrux + 1534,
+ instrux + 761,
+ instrux + 1288,
+ instrux + 1289,
+ instrux + 1519,
+ instrux + 1520,
};
static const struct itemplate * const itable_0F52[] = {
- instrux + 805,
- instrux + 1298,
- instrux + 1299,
+ instrux + 797,
+ instrux + 1285,
+ instrux + 1286,
};
static const struct itemplate * const itable_0F53[] = {
- instrux + 1296,
- instrux + 1297,
+ instrux + 1283,
+ instrux + 1284,
};
static const struct itemplate * const itable_0F54[] = {
- instrux + 785,
- instrux + 1232,
- instrux + 1461,
+ instrux + 777,
+ instrux + 1224,
+ instrux + 1447,
};
static const struct itemplate * const itable_0F55[] = {
- instrux + 852,
- instrux + 1231,
- instrux + 1460,
+ instrux + 844,
+ instrux + 1223,
+ instrux + 1446,
};
static const struct itemplate * const itable_0F56[] = {
- instrux + 1295,
- instrux + 1530,
+ instrux + 1282,
+ instrux + 1516,
};
static const struct itemplate * const itable_0F57[] = {
- instrux + 1310,
- instrux + 1540,
+ instrux + 1296,
+ instrux + 1526,
};
static const struct itemplate * const itable_0F58[] = {
- instrux + 814,
- instrux + 1229,
- instrux + 1230,
- instrux + 1458,
- instrux + 1459,
+ instrux + 806,
+ instrux + 1221,
+ instrux + 1222,
+ instrux + 1444,
+ instrux + 1445,
};
static const struct itemplate * const itable_0F59[] = {
- instrux + 808,
- instrux + 1293,
- instrux + 1294,
- instrux + 1528,
- instrux + 1529,
+ instrux + 800,
+ instrux + 1280,
+ instrux + 1281,
+ instrux + 1514,
+ instrux + 1515,
};
static const struct itemplate * const itable_0F5A[] = {
- instrux + 813,
- instrux + 1485,
- instrux + 1488,
- instrux + 1493,
- instrux + 1496,
+ instrux + 805,
+ instrux + 1471,
+ instrux + 1474,
+ instrux + 1479,
+ instrux + 1482,
};
static const struct itemplate * const itable_0F5B[] = {
- instrux + 812,
- instrux + 1482,
- instrux + 1487,
- instrux + 1499,
+ instrux + 804,
+ instrux + 1468,
+ instrux + 1473,
+ instrux + 1485,
};
static const struct itemplate * const itable_0F5C[] = {
- instrux + 811,
- instrux + 1305,
- instrux + 1306,
- instrux + 1535,
- instrux + 1536,
+ instrux + 803,
+ instrux + 1291,
+ instrux + 1292,
+ instrux + 1521,
+ instrux + 1522,
};
static const struct itemplate * const itable_0F5D[] = {
- instrux + 806,
- instrux + 1270,
- instrux + 1271,
- instrux + 1508,
- instrux + 1509,
+ instrux + 798,
+ instrux + 1262,
+ instrux + 1263,
+ instrux + 1494,
+ instrux + 1495,
};
static const struct itemplate * const itable_0F5E[] = {
- instrux + 803,
- instrux + 1265,
- instrux + 1266,
- instrux + 1504,
- instrux + 1505,
+ instrux + 795,
+ instrux + 1257,
+ instrux + 1258,
+ instrux + 1490,
+ instrux + 1491,
};
static const struct itemplate * const itable_0F5F[] = {
- instrux + 1268,
- instrux + 1269,
- instrux + 1506,
- instrux + 1507,
+ instrux + 1260,
+ instrux + 1261,
+ instrux + 1492,
+ instrux + 1493,
};
static const struct itemplate * const itable_0F60[] = {
- instrux + 860,
- instrux + 1453,
+ instrux + 852,
+ instrux + 1439,
};
static const struct itemplate * const itable_0F61[] = {
- instrux + 862,
- instrux + 1454,
+ instrux + 854,
+ instrux + 1440,
};
static const struct itemplate * const itable_0F62[] = {
- instrux + 861,
- instrux + 1455,
+ instrux + 853,
+ instrux + 1441,
};
static const struct itemplate * const itable_0F63[] = {
- instrux + 764,
- instrux + 1377,
+ instrux + 756,
+ instrux + 1363,
};
static const struct itemplate * const itable_0F64[] = {
- instrux + 782,
- instrux + 1396,
+ instrux + 774,
+ instrux + 1382,
};
static const struct itemplate * const itable_0F65[] = {
- instrux + 784,
- instrux + 1397,
+ instrux + 776,
+ instrux + 1383,
};
static const struct itemplate * const itable_0F66[] = {
- instrux + 783,
- instrux + 1398,
+ instrux + 775,
+ instrux + 1384,
};
static const struct itemplate * const itable_0F67[] = {
- instrux + 765,
- instrux + 1379,
+ instrux + 757,
+ instrux + 1365,
};
static const struct itemplate * const itable_0F68[] = {
- instrux + 857,
- instrux + 1449,
+ instrux + 849,
+ instrux + 1435,
};
static const struct itemplate * const itable_0F69[] = {
- instrux + 859,
- instrux + 1450,
+ instrux + 851,
+ instrux + 1436,
};
static const struct itemplate * const itable_0F6A[] = {
- instrux + 858,
- instrux + 1451,
+ instrux + 850,
+ instrux + 1437,
};
static const struct itemplate * const itable_0F6B[] = {
- instrux + 763,
- instrux + 1378,
+ instrux + 755,
+ instrux + 1364,
};
static const struct itemplate * const itable_0F6C[] = {
- instrux + 1456,
+ instrux + 1442,
};
static const struct itemplate * const itable_0F6D[] = {
- instrux + 1452,
+ instrux + 1438,
};
static const struct itemplate * const itable_0F6E[] = {
- instrux + 675,
- instrux + 676,
- instrux + 679,
- instrux + 680,
- instrux + 685,
- instrux + 1358,
- instrux + 1359,
- instrux + 1374,
+ instrux + 673,
+ instrux + 677,
+ instrux + 1344,
+ instrux + 1345,
+ instrux + 1360,
};
static const struct itemplate * const itable_0F6F[] = {
- instrux + 683,
- instrux + 1361,
- instrux + 1363,
- instrux + 1365,
- instrux + 1367,
+ instrux + 675,
+ instrux + 1347,
+ instrux + 1349,
+ instrux + 1351,
+ instrux + 1353,
};
static const struct itemplate * const itable_0F70[] = {
- instrux + 1343,
- instrux + 1416,
- instrux + 1417,
- instrux + 1418,
- instrux + 1419,
- instrux + 1420,
- instrux + 1421,
+ instrux + 1329,
+ instrux + 1402,
+ instrux + 1403,
+ instrux + 1404,
+ instrux + 1405,
+ instrux + 1406,
+ instrux + 1407,
};
static const struct itemplate * const itable_0F71[] = {
- instrux + 838,
- instrux + 842,
- instrux + 848,
- instrux + 1424,
- instrux + 1430,
- instrux + 1435,
+ instrux + 830,
+ instrux + 834,
+ instrux + 840,
+ instrux + 1410,
+ instrux + 1416,
+ instrux + 1421,
};
static const struct itemplate * const itable_0F72[] = {
- instrux + 834,
- instrux + 840,
- instrux + 844,
- instrux + 1426,
- instrux + 1432,
- instrux + 1437,
+ instrux + 826,
+ instrux + 832,
+ instrux + 836,
+ instrux + 1412,
+ instrux + 1418,
+ instrux + 1423,
};
static const struct itemplate * const itable_0F73[] = {
- instrux + 836,
- instrux + 846,
- instrux + 1422,
- instrux + 1428,
- instrux + 1433,
- instrux + 1439,
+ instrux + 828,
+ instrux + 838,
+ instrux + 1408,
+ instrux + 1414,
+ instrux + 1419,
+ instrux + 1425,
};
static const struct itemplate * const itable_0F74[] = {
- instrux + 779,
- instrux + 1393,
+ instrux + 771,
+ instrux + 1379,
};
static const struct itemplate * const itable_0F75[] = {
- instrux + 781,
- instrux + 1394,
+ instrux + 773,
+ instrux + 1380,
};
static const struct itemplate * const itable_0F76[] = {
- instrux + 780,
- instrux + 1395,
+ instrux + 772,
+ instrux + 1381,
};
static const struct itemplate * const itable_0F77[] = {
- instrux + 262,
+ instrux + 259,
};
static const struct itemplate * const itable_0F78[] = {
- instrux + 1108,
- instrux + 1558,
- instrux + 1559,
- instrux + 1603,
- instrux + 1605,
+ instrux + 1100,
+ instrux + 1545,
+ instrux + 1546,
+ instrux + 1590,
+ instrux + 1592,
};
static const struct itemplate * const itable_0F79[] = {
- instrux + 945,
- instrux + 1563,
- instrux + 1564,
- instrux + 1604,
- instrux + 1606,
+ instrux + 937,
+ instrux + 1550,
+ instrux + 1551,
+ instrux + 1591,
+ instrux + 1593,
};
static const struct itemplate * const itable_0F7B[] = {
- instrux + 946,
+ instrux + 938,
};
static const struct itemplate * const itable_0F7C[] = {
- instrux + 1109,
- instrux + 1543,
- instrux + 1544,
+ instrux + 1101,
+ instrux + 1529,
+ instrux + 1530,
};
static const struct itemplate * const itable_0F7D[] = {
- instrux + 948,
- instrux + 1545,
- instrux + 1546,
+ instrux + 940,
+ instrux + 1531,
+ instrux + 1532,
};
static const struct itemplate * const itable_0F7E[] = {
- instrux + 677,
+ instrux + 674,
instrux + 678,
- instrux + 681,
- instrux + 682,
- instrux + 686,
- instrux + 1357,
- instrux + 1360,
- instrux + 1370,
- instrux + 1373,
- instrux + 1375,
+ instrux + 1343,
+ instrux + 1346,
+ instrux + 1356,
+ instrux + 1359,
+ instrux + 1361,
};
static const struct itemplate * const itable_0F7F[] = {
- instrux + 684,
- instrux + 1362,
- instrux + 1364,
- instrux + 1366,
- instrux + 1368,
+ instrux + 676,
+ instrux + 1348,
+ instrux + 1350,
+ instrux + 1352,
+ instrux + 1354,
};
static const struct itemplate * const itable_0F80[] = {
- instrux + 1223,
- instrux + 1224,
- instrux + 1225,
+ instrux + 1215,
+ instrux + 1216,
+ instrux + 1217,
};
static const struct itemplate * const itable_0F81[] = {
- instrux + 1223,
- instrux + 1224,
- instrux + 1225,
+ instrux + 1215,
+ instrux + 1216,
+ instrux + 1217,
};
static const struct itemplate * const itable_0F82[] = {
- instrux + 1223,
- instrux + 1224,
- instrux + 1225,
+ instrux + 1215,
+ instrux + 1216,
+ instrux + 1217,
};
static const struct itemplate * const itable_0F83[] = {
- instrux + 1223,
- instrux + 1224,
- instrux + 1225,
+ instrux + 1215,
+ instrux + 1216,
+ instrux + 1217,
};
static const struct itemplate * const itable_0F84[] = {
- instrux + 1223,
- instrux + 1224,
- instrux + 1225,
+ instrux + 1215,
+ instrux + 1216,
+ instrux + 1217,
};
static const struct itemplate * const itable_0F85[] = {
- instrux + 1223,
- instrux + 1224,
- instrux + 1225,
+ instrux + 1215,
+ instrux + 1216,
+ instrux + 1217,
};
static const struct itemplate * const itable_0F86[] = {
- instrux + 1223,
- instrux + 1224,
- instrux + 1225,
+ instrux + 1215,
+ instrux + 1216,
+ instrux + 1217,
};
static const struct itemplate * const itable_0F87[] = {
- instrux + 1223,
- instrux + 1224,
- instrux + 1225,
+ instrux + 1215,
+ instrux + 1216,
+ instrux + 1217,
};
static const struct itemplate * const itable_0F88[] = {
- instrux + 1223,
- instrux + 1224,
- instrux + 1225,
+ instrux + 1215,
+ instrux + 1216,
+ instrux + 1217,
};
static const struct itemplate * const itable_0F89[] = {
- instrux + 1223,
- instrux + 1224,
- instrux + 1225,
+ instrux + 1215,
+ instrux + 1216,
+ instrux + 1217,
};
static const struct itemplate * const itable_0F8A[] = {
- instrux + 1223,
- instrux + 1224,
- instrux + 1225,
+ instrux + 1215,
+ instrux + 1216,
+ instrux + 1217,
};
static const struct itemplate * const itable_0F8B[] = {
- instrux + 1223,
- instrux + 1224,
- instrux + 1225,
+ instrux + 1215,
+ instrux + 1216,
+ instrux + 1217,
};
static const struct itemplate * const itable_0F8C[] = {
- instrux + 1223,
- instrux + 1224,
- instrux + 1225,
+ instrux + 1215,
+ instrux + 1216,
+ instrux + 1217,
};
static const struct itemplate * const itable_0F8D[] = {
- instrux + 1223,
- instrux + 1224,
- instrux + 1225,
+ instrux + 1215,
+ instrux + 1216,
+ instrux + 1217,
};
static const struct itemplate * const itable_0F8E[] = {
- instrux + 1223,
- instrux + 1224,
- instrux + 1225,
+ instrux + 1215,
+ instrux + 1216,
+ instrux + 1217,
};
static const struct itemplate * const itable_0F8F[] = {
- instrux + 1223,
- instrux + 1224,
- instrux + 1225,
+ instrux + 1215,
+ instrux + 1216,
+ instrux + 1217,
};
static const struct itemplate * const itable_0F90[] = {
- instrux + 1227,
- instrux + 1228,
+ instrux + 1219,
+ instrux + 1220,
};
static const struct itemplate * const itable_0F91[] = {
- instrux + 1227,
- instrux + 1228,
+ instrux + 1219,
+ instrux + 1220,
};
static const struct itemplate * const itable_0F92[] = {
- instrux + 1227,
- instrux + 1228,
+ instrux + 1219,
+ instrux + 1220,
};
static const struct itemplate * const itable_0F93[] = {
- instrux + 1227,
- instrux + 1228,
+ instrux + 1219,
+ instrux + 1220,
};
static const struct itemplate * const itable_0F94[] = {
- instrux + 1227,
- instrux + 1228,
+ instrux + 1219,
+ instrux + 1220,
};
static const struct itemplate * const itable_0F95[] = {
- instrux + 1227,
- instrux + 1228,
+ instrux + 1219,
+ instrux + 1220,
};
static const struct itemplate * const itable_0F96[] = {
- instrux + 1227,
- instrux + 1228,
+ instrux + 1219,
+ instrux + 1220,
};
static const struct itemplate * const itable_0F97[] = {
- instrux + 1227,
- instrux + 1228,
+ instrux + 1219,
+ instrux + 1220,
};
static const struct itemplate * const itable_0F98[] = {
- instrux + 1227,
- instrux + 1228,
+ instrux + 1219,
+ instrux + 1220,
};
static const struct itemplate * const itable_0F99[] = {
- instrux + 1227,
- instrux + 1228,
+ instrux + 1219,
+ instrux + 1220,
};
static const struct itemplate * const itable_0F9A[] = {
- instrux + 1227,
- instrux + 1228,
+ instrux + 1219,
+ instrux + 1220,
};
static const struct itemplate * const itable_0F9B[] = {
- instrux + 1227,
- instrux + 1228,
+ instrux + 1219,
+ instrux + 1220,
};
static const struct itemplate * const itable_0F9C[] = {
- instrux + 1227,
- instrux + 1228,
+ instrux + 1219,
+ instrux + 1220,
};
static const struct itemplate * const itable_0F9D[] = {
- instrux + 1227,
- instrux + 1228,
+ instrux + 1219,
+ instrux + 1220,
};
static const struct itemplate * const itable_0F9E[] = {
- instrux + 1227,
- instrux + 1228,
+ instrux + 1219,
+ instrux + 1220,
};
static const struct itemplate * const itable_0F9F[] = {
- instrux + 1227,
- instrux + 1228,
+ instrux + 1219,
+ instrux + 1220,
};
static const struct itemplate * const itable_0FA0[] = {
- instrux + 871,
+ instrux + 863,
};
static const struct itemplate * const itable_0FA1[] = {
- instrux + 822,
+ instrux + 814,
};
static const struct itemplate * const itable_0FA2[] = {
- instrux + 243,
+ instrux + 240,
};
static const struct itemplate * const itable_0FA3[] = {
@@ -5262,69 +5608,69 @@ static const struct itemplate * const itable_0FA3[] = {
};
static const struct itemplate * const itable_0FA4[] = {
+ instrux + 1006,
+ instrux + 1007,
+ instrux + 1008,
+ instrux + 1009,
+ instrux + 1010,
+ instrux + 1011,
+};
+
+static const struct itemplate * const itable_0FA5[] = {
+ instrux + 1012,
+ instrux + 1013,
instrux + 1014,
instrux + 1015,
instrux + 1016,
instrux + 1017,
- instrux + 1018,
- instrux + 1019,
-};
-
-static const struct itemplate * const itable_0FA5[] = {
- instrux + 1020,
- instrux + 1021,
- instrux + 1022,
- instrux + 1023,
- instrux + 1024,
- instrux + 1025,
};
static const struct itemplate * const itable_0FA6C0[] = {
- instrux + 3116,
+ instrux + 3112,
};
static const struct itemplate * const itable_0FA6C8[] = {
- instrux + 3117,
+ instrux + 3113,
};
static const struct itemplate * const itable_0FA6D0[] = {
- instrux + 3118,
+ instrux + 3114,
};
static const struct itemplate * const itable_0FA7C0[] = {
- instrux + 3110,
+ instrux + 3106,
};
static const struct itemplate * const itable_0FA7C8[] = {
- instrux + 3111,
+ instrux + 3107,
};
static const struct itemplate * const itable_0FA7D0[] = {
- instrux + 3112,
+ instrux + 3108,
};
static const struct itemplate * const itable_0FA7D8[] = {
- instrux + 3113,
+ instrux + 3109,
};
static const struct itemplate * const itable_0FA7E0[] = {
- instrux + 3114,
+ instrux + 3110,
};
static const struct itemplate * const itable_0FA7E8[] = {
- instrux + 3115,
+ instrux + 3111,
};
static const struct itemplate * const itable_0FA8[] = {
- instrux + 871,
+ instrux + 863,
};
static const struct itemplate * const itable_0FA9[] = {
- instrux + 822,
+ instrux + 814,
};
static const struct itemplate * const itable_0FAA[] = {
- instrux + 947,
+ instrux + 939,
};
static const struct itemplate * const itable_0FAB[] = {
@@ -5337,80 +5683,80 @@ static const struct itemplate * const itable_0FAB[] = {
};
static const struct itemplate * const itable_0FAC[] = {
+ instrux + 1030,
+ instrux + 1031,
+ instrux + 1032,
+ instrux + 1033,
+ instrux + 1034,
+ instrux + 1035,
+};
+
+static const struct itemplate * const itable_0FAD[] = {
+ instrux + 1036,
+ instrux + 1037,
instrux + 1038,
instrux + 1039,
instrux + 1040,
instrux + 1041,
- instrux + 1042,
- instrux + 1043,
-};
-
-static const struct itemplate * const itable_0FAD[] = {
- instrux + 1044,
- instrux + 1045,
- instrux + 1046,
- instrux + 1047,
- instrux + 1048,
- instrux + 1049,
};
static const struct itemplate * const itable_0FAE[] = {
- instrux + 566,
- instrux + 623,
- instrux + 1000,
- instrux + 1267,
+ instrux + 562,
+ instrux + 619,
+ instrux + 992,
+ instrux + 1259,
+ instrux + 1290,
+ instrux + 1297,
+ instrux + 1298,
+ instrux + 1299,
+ instrux + 1300,
+ instrux + 1303,
instrux + 1304,
- instrux + 1311,
- instrux + 1312,
+ instrux + 1305,
+ instrux + 1306,
+ instrux + 1307,
+ instrux + 1308,
instrux + 1313,
- instrux + 1314,
- instrux + 1317,
- instrux + 1318,
- instrux + 1319,
- instrux + 1320,
- instrux + 1321,
- instrux + 1322,
- instrux + 1327,
- instrux + 1350,
- instrux + 1355,
- instrux + 1356,
- instrux + 3095,
- instrux + 3096,
- instrux + 3097,
- instrux + 3098,
- instrux + 3102,
- instrux + 3103,
- instrux + 3104,
- instrux + 3105,
+ instrux + 1336,
+ instrux + 1341,
+ instrux + 1342,
+ instrux + 3082,
+ instrux + 3083,
+ instrux + 3084,
+ instrux + 3085,
+ instrux + 3089,
+ instrux + 3090,
+ instrux + 3091,
+ instrux + 3092,
};
static const struct itemplate * const itable_0FAF[] = {
+ instrux + 458,
+ instrux + 459,
+ instrux + 460,
instrux + 461,
instrux + 462,
instrux + 463,
- instrux + 464,
- instrux + 465,
- instrux + 466,
};
static const struct itemplate * const itable_0FB0[] = {
- instrux + 233,
- instrux + 234,
+ instrux + 230,
+ instrux + 231,
};
static const struct itemplate * const itable_0FB1[] = {
+ instrux + 232,
+ instrux + 233,
+ instrux + 234,
instrux + 235,
instrux + 236,
instrux + 237,
- instrux + 238,
- instrux + 239,
- instrux + 240,
};
static const struct itemplate * const itable_0FB2[] = {
- instrux + 617,
- instrux + 618,
- instrux + 619,
+ instrux + 613,
+ instrux + 614,
+ instrux + 615,
};
static const struct itemplate * const itable_0FB3[] = {
@@ -5423,40 +5769,40 @@ static const struct itemplate * const itable_0FB3[] = {
};
static const struct itemplate * const itable_0FB4[] = {
- instrux + 567,
- instrux + 568,
- instrux + 569,
+ instrux + 563,
+ instrux + 564,
+ instrux + 565,
};
static const struct itemplate * const itable_0FB5[] = {
- instrux + 571,
- instrux + 572,
- instrux + 573,
+ instrux + 567,
+ instrux + 568,
+ instrux + 569,
};
static const struct itemplate * const itable_0FB6[] = {
- instrux + 698,
- instrux + 699,
- instrux + 700,
- instrux + 702,
+ instrux + 690,
+ instrux + 691,
+ instrux + 692,
+ instrux + 694,
};
static const struct itemplate * const itable_0FB7[] = {
- instrux + 701,
- instrux + 703,
+ instrux + 693,
+ instrux + 695,
};
static const struct itemplate * const itable_0FB8[] = {
- instrux + 542,
- instrux + 543,
- instrux + 544,
- instrux + 1680,
- instrux + 1681,
- instrux + 1682,
+ instrux + 538,
+ instrux + 539,
+ instrux + 540,
+ instrux + 1667,
+ instrux + 1668,
+ instrux + 1669,
};
static const struct itemplate * const itable_0FB9[] = {
- instrux + 1139,
+ instrux + 1131,
};
static const struct itemplate * const itable_0FBA[] = {
@@ -5490,6 +5836,9 @@ static const struct itemplate * const itable_0FBC[] = {
instrux + 113,
instrux + 114,
instrux + 115,
+ instrux + 3716,
+ instrux + 3717,
+ instrux + 3718,
};
static const struct itemplate * const itable_0FBD[] = {
@@ -5499,38 +5848,46 @@ static const struct itemplate * const itable_0FBD[] = {
instrux + 119,
instrux + 120,
instrux + 121,
- instrux + 1609,
- instrux + 1610,
- instrux + 1611,
+ instrux + 1596,
+ instrux + 1597,
+ instrux + 1598,
};
static const struct itemplate * const itable_0FBE[] = {
- instrux + 691,
- instrux + 692,
- instrux + 693,
- instrux + 695,
+ instrux + 683,
+ instrux + 684,
+ instrux + 685,
+ instrux + 687,
};
static const struct itemplate * const itable_0FBF[] = {
- instrux + 694,
- instrux + 696,
+ instrux + 686,
+ instrux + 688,
};
static const struct itemplate * const itable_0FC0[] = {
- instrux + 1151,
- instrux + 1152,
+ instrux + 1143,
+ instrux + 1144,
};
static const struct itemplate * const itable_0FC1[] = {
- instrux + 1153,
- instrux + 1154,
- instrux + 1155,
- instrux + 1156,
- instrux + 1157,
- instrux + 1158,
+ instrux + 1145,
+ instrux + 1146,
+ instrux + 1147,
+ instrux + 1148,
+ instrux + 1149,
+ instrux + 1150,
};
static const struct itemplate * const itable_0FC2[] = {
+ instrux + 1225,
+ instrux + 1226,
+ instrux + 1227,
+ instrux + 1228,
+ instrux + 1229,
+ instrux + 1230,
+ instrux + 1231,
+ instrux + 1232,
instrux + 1233,
instrux + 1234,
instrux + 1235,
@@ -5543,70 +5900,64 @@ static const struct itemplate * const itable_0FC2[] = {
instrux + 1242,
instrux + 1243,
instrux + 1244,
- instrux + 1245,
- instrux + 1246,
- instrux + 1247,
- instrux + 1248,
- instrux + 1249,
- instrux + 1250,
- instrux + 1251,
- instrux + 1252,
+ instrux + 1448,
+ instrux + 1449,
+ instrux + 1450,
+ instrux + 1451,
+ instrux + 1452,
+ instrux + 1453,
+ instrux + 1454,
+ instrux + 1455,
+ instrux + 1456,
+ instrux + 1457,
+ instrux + 1458,
+ instrux + 1459,
+ instrux + 1460,
+ instrux + 1461,
instrux + 1462,
instrux + 1463,
instrux + 1464,
instrux + 1465,
- instrux + 1466,
- instrux + 1467,
- instrux + 1468,
- instrux + 1469,
- instrux + 1470,
- instrux + 1471,
- instrux + 1472,
- instrux + 1473,
- instrux + 1474,
- instrux + 1475,
- instrux + 1476,
- instrux + 1477,
- instrux + 1478,
- instrux + 1479,
};
static const struct itemplate * const itable_0FC3[] = {
- instrux + 1352,
- instrux + 1353,
+ instrux + 1338,
+ instrux + 1339,
};
static const struct itemplate * const itable_0FC4[] = {
- instrux + 1333,
- instrux + 1334,
- instrux + 1335,
- instrux + 1400,
- instrux + 1401,
- instrux + 1402,
+ instrux + 1319,
+ instrux + 1320,
+ instrux + 1321,
+ instrux + 1386,
+ instrux + 1387,
+ instrux + 1388,
};
static const struct itemplate * const itable_0FC5[] = {
- instrux + 1332,
- instrux + 1399,
+ instrux + 1318,
+ instrux + 1385,
};
static const struct itemplate * const itable_0FC6[] = {
- instrux + 1300,
- instrux + 1301,
- instrux + 1531,
- instrux + 1532,
+ instrux + 1287,
+ instrux + 1517,
+ instrux + 1518,
};
static const struct itemplate * const itable_0FC7[] = {
- instrux + 241,
- instrux + 242,
- instrux + 1552,
- instrux + 1556,
- instrux + 1557,
- instrux + 1566,
- instrux + 3099,
- instrux + 3100,
+ instrux + 238,
+ instrux + 239,
+ instrux + 1538,
+ instrux + 1543,
+ instrux + 1544,
+ instrux + 1553,
+ instrux + 3086,
+ instrux + 3087,
+ instrux + 3088,
instrux + 3101,
+ instrux + 3102,
+ instrux + 3103,
};
static const struct itemplate * const itable_0FC8[] = {
@@ -5650,244 +6001,244 @@ static const struct itemplate * const itable_0FCF[] = {
};
static const struct itemplate * const itable_0FD0[] = {
- instrux + 1541,
- instrux + 1542,
+ instrux + 1527,
+ instrux + 1528,
};
static const struct itemplate * const itable_0FD1[] = {
- instrux + 847,
- instrux + 1434,
+ instrux + 839,
+ instrux + 1420,
};
static const struct itemplate * const itable_0FD2[] = {
- instrux + 843,
- instrux + 1436,
+ instrux + 835,
+ instrux + 1422,
};
static const struct itemplate * const itable_0FD3[] = {
- instrux + 845,
- instrux + 1438,
+ instrux + 837,
+ instrux + 1424,
};
static const struct itemplate * const itable_0FD4[] = {
- instrux + 1383,
- instrux + 1384,
+ instrux + 1369,
+ instrux + 1370,
};
static const struct itemplate * const itable_0FD5[] = {
- instrux + 810,
- instrux + 1411,
+ instrux + 802,
+ instrux + 1397,
};
static const struct itemplate * const itable_0FD6[] = {
- instrux + 1369,
- instrux + 1371,
- instrux + 1372,
- instrux + 1376,
+ instrux + 1355,
+ instrux + 1357,
+ instrux + 1358,
+ instrux + 1362,
};
static const struct itemplate * const itable_0FD7[] = {
- instrux + 1340,
- instrux + 1408,
+ instrux + 1326,
+ instrux + 1394,
};
static const struct itemplate * const itable_0FD8[] = {
- instrux + 854,
- instrux + 1447,
+ instrux + 846,
+ instrux + 1433,
};
static const struct itemplate * const itable_0FD9[] = {
- instrux + 855,
- instrux + 1448,
+ instrux + 847,
+ instrux + 1434,
};
static const struct itemplate * const itable_0FDA[] = {
- instrux + 1339,
- instrux + 1407,
+ instrux + 1325,
+ instrux + 1393,
};
static const struct itemplate * const itable_0FDB[] = {
- instrux + 774,
- instrux + 1389,
+ instrux + 766,
+ instrux + 1375,
};
static const struct itemplate * const itable_0FDC[] = {
- instrux + 771,
- instrux + 1387,
+ instrux + 763,
+ instrux + 1373,
};
static const struct itemplate * const itable_0FDD[] = {
- instrux + 772,
- instrux + 1388,
+ instrux + 764,
+ instrux + 1374,
};
static const struct itemplate * const itable_0FDE[] = {
- instrux + 1337,
- instrux + 1405,
+ instrux + 1323,
+ instrux + 1391,
};
static const struct itemplate * const itable_0FDF[] = {
- instrux + 775,
- instrux + 1390,
+ instrux + 767,
+ instrux + 1376,
};
static const struct itemplate * const itable_0FE0[] = {
- instrux + 1330,
- instrux + 1391,
+ instrux + 1316,
+ instrux + 1377,
};
static const struct itemplate * const itable_0FE1[] = {
- instrux + 841,
- instrux + 1429,
+ instrux + 833,
+ instrux + 1415,
};
static const struct itemplate * const itable_0FE2[] = {
- instrux + 839,
- instrux + 1431,
+ instrux + 831,
+ instrux + 1417,
};
static const struct itemplate * const itable_0FE3[] = {
- instrux + 1331,
- instrux + 1392,
+ instrux + 1317,
+ instrux + 1378,
};
static const struct itemplate * const itable_0FE4[] = {
- instrux + 1341,
- instrux + 1409,
+ instrux + 1327,
+ instrux + 1395,
};
static const struct itemplate * const itable_0FE5[] = {
- instrux + 809,
- instrux + 1410,
+ instrux + 801,
+ instrux + 1396,
};
static const struct itemplate * const itable_0FE6[] = {
- instrux + 1481,
- instrux + 1483,
- instrux + 1498,
+ instrux + 1467,
+ instrux + 1469,
+ instrux + 1484,
};
static const struct itemplate * const itable_0FE7[] = {
- instrux + 1329,
- instrux + 1351,
+ instrux + 1315,
+ instrux + 1337,
};
static const struct itemplate * const itable_0FE8[] = {
- instrux + 851,
- instrux + 1445,
+ instrux + 843,
+ instrux + 1431,
};
static const struct itemplate * const itable_0FE9[] = {
- instrux + 853,
- instrux + 1446,
+ instrux + 845,
+ instrux + 1432,
};
static const struct itemplate * const itable_0FEA[] = {
- instrux + 1338,
- instrux + 1406,
+ instrux + 1324,
+ instrux + 1392,
};
static const struct itemplate * const itable_0FEB[] = {
- instrux + 830,
- instrux + 1414,
+ instrux + 822,
+ instrux + 1400,
};
static const struct itemplate * const itable_0FEC[] = {
- instrux + 768,
- instrux + 1385,
+ instrux + 760,
+ instrux + 1371,
};
static const struct itemplate * const itable_0FED[] = {
- instrux + 770,
- instrux + 1386,
+ instrux + 762,
+ instrux + 1372,
};
static const struct itemplate * const itable_0FEE[] = {
- instrux + 1336,
- instrux + 1404,
+ instrux + 1322,
+ instrux + 1390,
};
static const struct itemplate * const itable_0FEF[] = {
- instrux + 885,
- instrux + 1457,
+ instrux + 877,
+ instrux + 1443,
};
static const struct itemplate * const itable_0FF0[] = {
- instrux + 1547,
+ instrux + 1533,
};
static const struct itemplate * const itable_0FF1[] = {
- instrux + 837,
- instrux + 1423,
+ instrux + 829,
+ instrux + 1409,
};
static const struct itemplate * const itable_0FF2[] = {
- instrux + 833,
- instrux + 1425,
+ instrux + 825,
+ instrux + 1411,
};
static const struct itemplate * const itable_0FF3[] = {
- instrux + 835,
- instrux + 1427,
+ instrux + 827,
+ instrux + 1413,
};
static const struct itemplate * const itable_0FF4[] = {
- instrux + 1412,
- instrux + 1413,
+ instrux + 1398,
+ instrux + 1399,
};
static const struct itemplate * const itable_0FF5[] = {
- instrux + 804,
- instrux + 1403,
+ instrux + 796,
+ instrux + 1389,
};
static const struct itemplate * const itable_0FF6[] = {
- instrux + 1342,
- instrux + 1415,
+ instrux + 1328,
+ instrux + 1401,
};
static const struct itemplate * const itable_0FF7[] = {
- instrux + 1328,
- instrux + 1349,
+ instrux + 1314,
+ instrux + 1335,
};
static const struct itemplate * const itable_0FF8[] = {
- instrux + 849,
- instrux + 1440,
+ instrux + 841,
+ instrux + 1426,
};
static const struct itemplate * const itable_0FF9[] = {
- instrux + 856,
- instrux + 1441,
+ instrux + 848,
+ instrux + 1427,
};
static const struct itemplate * const itable_0FFA[] = {
- instrux + 850,
- instrux + 1442,
+ instrux + 842,
+ instrux + 1428,
};
static const struct itemplate * const itable_0FFB[] = {
- instrux + 1443,
- instrux + 1444,
+ instrux + 1429,
+ instrux + 1430,
};
static const struct itemplate * const itable_0FFC[] = {
- instrux + 766,
- instrux + 1380,
+ instrux + 758,
+ instrux + 1366,
};
static const struct itemplate * const itable_0FFD[] = {
- instrux + 773,
- instrux + 1381,
+ instrux + 765,
+ instrux + 1367,
};
static const struct itemplate * const itable_0FFE[] = {
- instrux + 767,
- instrux + 1382,
+ instrux + 759,
+ instrux + 1368,
};
static const struct itemplate * const itable_0FFF[] = {
- instrux + 1138,
+ instrux + 1130,
};
static const struct itemplate * const itable_10[] = {
@@ -5929,20 +6280,34 @@ static const struct itemplate * const itable_15[] = {
};
static const struct itemplate * const itable_16[] = {
- instrux + 869,
- instrux + 870,
+ instrux + 861,
+ instrux + 862,
};
static const struct itemplate * const itable_17[] = {
- instrux + 821,
+ instrux + 813,
};
static const struct itemplate * const itable_18[] = {
+ instrux + 955,
+ instrux + 956,
+};
+
+static const struct itemplate * const itable_19[] = {
+ instrux + 957,
+ instrux + 958,
+ instrux + 959,
+ instrux + 960,
+ instrux + 961,
+ instrux + 962,
+};
+
+static const struct itemplate * const itable_1A[] = {
instrux + 963,
instrux + 964,
};
-static const struct itemplate * const itable_19[] = {
+static const struct itemplate * const itable_1B[] = {
instrux + 965,
instrux + 966,
instrux + 967,
@@ -5951,37 +6316,23 @@ static const struct itemplate * const itable_19[] = {
instrux + 970,
};
-static const struct itemplate * const itable_1A[] = {
- instrux + 971,
- instrux + 972,
-};
-
-static const struct itemplate * const itable_1B[] = {
- instrux + 973,
- instrux + 974,
- instrux + 975,
- instrux + 976,
- instrux + 977,
- instrux + 978,
-};
-
static const struct itemplate * const itable_1C[] = {
- instrux + 982,
+ instrux + 974,
};
static const struct itemplate * const itable_1D[] = {
- instrux + 984,
- instrux + 986,
- instrux + 988,
+ instrux + 976,
+ instrux + 978,
+ instrux + 980,
};
static const struct itemplate * const itable_1E[] = {
- instrux + 869,
- instrux + 870,
+ instrux + 861,
+ instrux + 862,
};
static const struct itemplate * const itable_1F[] = {
- instrux + 821,
+ instrux + 813,
};
static const struct itemplate * const itable_20[] = {
@@ -6023,15 +6374,29 @@ static const struct itemplate * const itable_25[] = {
};
static const struct itemplate * const itable_27[] = {
- instrux + 249,
+ instrux + 246,
};
static const struct itemplate * const itable_28[] = {
+ instrux + 1067,
+ instrux + 1068,
+};
+
+static const struct itemplate * const itable_29[] = {
+ instrux + 1069,
+ instrux + 1070,
+ instrux + 1071,
+ instrux + 1072,
+ instrux + 1073,
+ instrux + 1074,
+};
+
+static const struct itemplate * const itable_2A[] = {
instrux + 1075,
instrux + 1076,
};
-static const struct itemplate * const itable_29[] = {
+static const struct itemplate * const itable_2B[] = {
instrux + 1077,
instrux + 1078,
instrux + 1079,
@@ -6040,40 +6405,40 @@ static const struct itemplate * const itable_29[] = {
instrux + 1082,
};
-static const struct itemplate * const itable_2A[] = {
- instrux + 1083,
- instrux + 1084,
+static const struct itemplate * const itable_2C[] = {
+ instrux + 1086,
};
-static const struct itemplate * const itable_2B[] = {
- instrux + 1085,
- instrux + 1086,
- instrux + 1087,
+static const struct itemplate * const itable_2D[] = {
instrux + 1088,
- instrux + 1089,
instrux + 1090,
+ instrux + 1092,
};
-static const struct itemplate * const itable_2C[] = {
- instrux + 1094,
+static const struct itemplate * const itable_2F[] = {
+ instrux + 247,
};
-static const struct itemplate * const itable_2D[] = {
- instrux + 1096,
- instrux + 1098,
- instrux + 1100,
+static const struct itemplate * const itable_30[] = {
+ instrux + 1176,
+ instrux + 1177,
};
-static const struct itemplate * const itable_2F[] = {
- instrux + 250,
+static const struct itemplate * const itable_31[] = {
+ instrux + 1178,
+ instrux + 1179,
+ instrux + 1180,
+ instrux + 1181,
+ instrux + 1182,
+ instrux + 1183,
};
-static const struct itemplate * const itable_30[] = {
+static const struct itemplate * const itable_32[] = {
instrux + 1184,
instrux + 1185,
};
-static const struct itemplate * const itable_31[] = {
+static const struct itemplate * const itable_33[] = {
instrux + 1186,
instrux + 1187,
instrux + 1188,
@@ -6082,28 +6447,14 @@ static const struct itemplate * const itable_31[] = {
instrux + 1191,
};
-static const struct itemplate * const itable_32[] = {
- instrux + 1192,
- instrux + 1193,
-};
-
-static const struct itemplate * const itable_33[] = {
- instrux + 1194,
- instrux + 1195,
- instrux + 1196,
- instrux + 1197,
- instrux + 1198,
- instrux + 1199,
-};
-
static const struct itemplate * const itable_34[] = {
- instrux + 1203,
+ instrux + 1195,
};
static const struct itemplate * const itable_35[] = {
- instrux + 1205,
- instrux + 1207,
- instrux + 1209,
+ instrux + 1197,
+ instrux + 1199,
+ instrux + 1201,
};
static const struct itemplate * const itable_37[] = {
@@ -6111,41 +6462,41 @@ static const struct itemplate * const itable_37[] = {
};
static const struct itemplate * const itable_38[] = {
- instrux + 196,
- instrux + 197,
+ instrux + 193,
+ instrux + 194,
};
static const struct itemplate * const itable_39[] = {
+ instrux + 195,
+ instrux + 196,
+ instrux + 197,
instrux + 198,
instrux + 199,
instrux + 200,
- instrux + 201,
- instrux + 202,
- instrux + 203,
};
static const struct itemplate * const itable_3A[] = {
- instrux + 204,
- instrux + 205,
+ instrux + 201,
+ instrux + 202,
};
static const struct itemplate * const itable_3B[] = {
+ instrux + 203,
+ instrux + 204,
+ instrux + 205,
instrux + 206,
instrux + 207,
instrux + 208,
- instrux + 209,
- instrux + 210,
- instrux + 211,
};
static const struct itemplate * const itable_3C[] = {
- instrux + 215,
+ instrux + 212,
};
static const struct itemplate * const itable_3D[] = {
- instrux + 217,
- instrux + 219,
- instrux + 221,
+ instrux + 214,
+ instrux + 216,
+ instrux + 218,
};
static const struct itemplate * const itable_3F[] = {
@@ -6153,191 +6504,191 @@ static const struct itemplate * const itable_3F[] = {
};
static const struct itemplate * const itable_40[] = {
- instrux + 491,
- instrux + 492,
+ instrux + 488,
+ instrux + 489,
};
static const struct itemplate * const itable_41[] = {
- instrux + 491,
- instrux + 492,
+ instrux + 488,
+ instrux + 489,
};
static const struct itemplate * const itable_42[] = {
- instrux + 491,
- instrux + 492,
+ instrux + 488,
+ instrux + 489,
};
static const struct itemplate * const itable_43[] = {
- instrux + 491,
- instrux + 492,
+ instrux + 488,
+ instrux + 489,
};
static const struct itemplate * const itable_44[] = {
- instrux + 491,
- instrux + 492,
+ instrux + 488,
+ instrux + 489,
};
static const struct itemplate * const itable_45[] = {
- instrux + 491,
- instrux + 492,
+ instrux + 488,
+ instrux + 489,
};
static const struct itemplate * const itable_46[] = {
- instrux + 491,
- instrux + 492,
+ instrux + 488,
+ instrux + 489,
};
static const struct itemplate * const itable_47[] = {
- instrux + 491,
- instrux + 492,
+ instrux + 488,
+ instrux + 489,
};
static const struct itemplate * const itable_48[] = {
- instrux + 251,
- instrux + 252,
+ instrux + 248,
+ instrux + 249,
};
static const struct itemplate * const itable_49[] = {
- instrux + 251,
- instrux + 252,
+ instrux + 248,
+ instrux + 249,
};
static const struct itemplate * const itable_4A[] = {
- instrux + 251,
- instrux + 252,
+ instrux + 248,
+ instrux + 249,
};
static const struct itemplate * const itable_4B[] = {
- instrux + 251,
- instrux + 252,
+ instrux + 248,
+ instrux + 249,
};
static const struct itemplate * const itable_4C[] = {
- instrux + 251,
- instrux + 252,
+ instrux + 248,
+ instrux + 249,
};
static const struct itemplate * const itable_4D[] = {
- instrux + 251,
- instrux + 252,
+ instrux + 248,
+ instrux + 249,
};
static const struct itemplate * const itable_4E[] = {
- instrux + 251,
- instrux + 252,
+ instrux + 248,
+ instrux + 249,
};
static const struct itemplate * const itable_4F[] = {
- instrux + 251,
- instrux + 252,
+ instrux + 248,
+ instrux + 249,
};
static const struct itemplate * const itable_50[] = {
- instrux + 863,
- instrux + 864,
- instrux + 865,
+ instrux + 855,
+ instrux + 856,
+ instrux + 857,
};
static const struct itemplate * const itable_51[] = {
- instrux + 863,
- instrux + 864,
- instrux + 865,
+ instrux + 855,
+ instrux + 856,
+ instrux + 857,
};
static const struct itemplate * const itable_52[] = {
- instrux + 863,
- instrux + 864,
- instrux + 865,
+ instrux + 855,
+ instrux + 856,
+ instrux + 857,
};
static const struct itemplate * const itable_53[] = {
- instrux + 863,
- instrux + 864,
- instrux + 865,
+ instrux + 855,
+ instrux + 856,
+ instrux + 857,
};
static const struct itemplate * const itable_54[] = {
- instrux + 863,
- instrux + 864,
- instrux + 865,
+ instrux + 855,
+ instrux + 856,
+ instrux + 857,
};
static const struct itemplate * const itable_55[] = {
- instrux + 863,
- instrux + 864,
- instrux + 865,
+ instrux + 855,
+ instrux + 856,
+ instrux + 857,
};
static const struct itemplate * const itable_56[] = {
- instrux + 863,
- instrux + 864,
- instrux + 865,
+ instrux + 855,
+ instrux + 856,
+ instrux + 857,
};
static const struct itemplate * const itable_57[] = {
- instrux + 863,
- instrux + 864,
- instrux + 865,
+ instrux + 855,
+ instrux + 856,
+ instrux + 857,
};
static const struct itemplate * const itable_58[] = {
- instrux + 815,
- instrux + 816,
- instrux + 817,
+ instrux + 807,
+ instrux + 808,
+ instrux + 809,
};
static const struct itemplate * const itable_59[] = {
- instrux + 815,
- instrux + 816,
- instrux + 817,
+ instrux + 807,
+ instrux + 808,
+ instrux + 809,
};
static const struct itemplate * const itable_5A[] = {
- instrux + 815,
- instrux + 816,
- instrux + 817,
+ instrux + 807,
+ instrux + 808,
+ instrux + 809,
};
static const struct itemplate * const itable_5B[] = {
- instrux + 815,
- instrux + 816,
- instrux + 817,
+ instrux + 807,
+ instrux + 808,
+ instrux + 809,
};
static const struct itemplate * const itable_5C[] = {
- instrux + 815,
- instrux + 816,
- instrux + 817,
+ instrux + 807,
+ instrux + 808,
+ instrux + 809,
};
static const struct itemplate * const itable_5D[] = {
- instrux + 815,
- instrux + 816,
- instrux + 817,
+ instrux + 807,
+ instrux + 808,
+ instrux + 809,
};
static const struct itemplate * const itable_5E[] = {
- instrux + 815,
- instrux + 816,
- instrux + 817,
+ instrux + 807,
+ instrux + 808,
+ instrux + 809,
};
static const struct itemplate * const itable_5F[] = {
- instrux + 815,
- instrux + 816,
- instrux + 817,
+ instrux + 807,
+ instrux + 808,
+ instrux + 809,
};
static const struct itemplate * const itable_60[] = {
- instrux + 878,
- instrux + 879,
- instrux + 880,
+ instrux + 870,
+ instrux + 871,
+ instrux + 872,
};
static const struct itemplate * const itable_61[] = {
- instrux + 823,
- instrux + 824,
- instrux + 825,
+ instrux + 815,
+ instrux + 816,
+ instrux + 817,
};
static const struct itemplate * const itable_62[] = {
@@ -6348,39 +6699,19 @@ static const struct itemplate * const itable_62[] = {
static const struct itemplate * const itable_63[] = {
instrux + 106,
instrux + 107,
- instrux + 697,
+ instrux + 689,
};
static const struct itemplate * const itable_68[] = {
- instrux + 873,
- instrux + 874,
- instrux + 875,
- instrux + 876,
- instrux + 877,
+ instrux + 865,
+ instrux + 866,
+ instrux + 867,
+ instrux + 868,
+ instrux + 869,
};
static const struct itemplate * const itable_69[] = {
- instrux + 468,
- instrux + 470,
- instrux + 472,
- instrux + 474,
- instrux + 476,
- instrux + 478,
- instrux + 480,
- instrux + 482,
- instrux + 484,
-};
-
-static const struct itemplate * const itable_6A[] = {
- instrux + 872,
- instrux + 873,
- instrux + 874,
- instrux + 875,
- instrux + 876,
- instrux + 877,
-};
-
-static const struct itemplate * const itable_6B[] = {
+ instrux + 465,
instrux + 467,
instrux + 469,
instrux + 471,
@@ -6389,89 +6720,109 @@ static const struct itemplate * const itable_6B[] = {
instrux + 477,
instrux + 479,
instrux + 481,
- instrux + 483,
+};
+
+static const struct itemplate * const itable_6A[] = {
+ instrux + 864,
+ instrux + 865,
+ instrux + 866,
+ instrux + 867,
+ instrux + 868,
+ instrux + 869,
+};
+
+static const struct itemplate * const itable_6B[] = {
+ instrux + 464,
+ instrux + 466,
+ instrux + 468,
+ instrux + 470,
+ instrux + 472,
+ instrux + 474,
+ instrux + 476,
+ instrux + 478,
+ instrux + 480,
};
static const struct itemplate * const itable_6C[] = {
- instrux + 497,
+ instrux + 494,
};
static const struct itemplate * const itable_6D[] = {
- instrux + 498,
- instrux + 499,
+ instrux + 495,
+ instrux + 496,
};
static const struct itemplate * const itable_6E[] = {
- instrux + 760,
+ instrux + 752,
};
static const struct itemplate * const itable_6F[] = {
- instrux + 761,
- instrux + 762,
+ instrux + 753,
+ instrux + 754,
};
static const struct itemplate * const itable_70[] = {
- instrux + 1226,
+ instrux + 1218,
};
static const struct itemplate * const itable_71[] = {
- instrux + 1226,
+ instrux + 1218,
};
static const struct itemplate * const itable_72[] = {
- instrux + 1226,
+ instrux + 1218,
};
static const struct itemplate * const itable_73[] = {
- instrux + 1226,
+ instrux + 1218,
};
static const struct itemplate * const itable_74[] = {
- instrux + 1226,
+ instrux + 1218,
};
static const struct itemplate * const itable_75[] = {
- instrux + 1226,
+ instrux + 1218,
};
static const struct itemplate * const itable_76[] = {
- instrux + 1226,
+ instrux + 1218,
};
static const struct itemplate * const itable_77[] = {
- instrux + 1226,
+ instrux + 1218,
};
static const struct itemplate * const itable_78[] = {
- instrux + 1226,
+ instrux + 1218,
};
static const struct itemplate * const itable_79[] = {
- instrux + 1226,
+ instrux + 1218,
};
static const struct itemplate * const itable_7A[] = {
- instrux + 1226,
+ instrux + 1218,
};
static const struct itemplate * const itable_7B[] = {
- instrux + 1226,
+ instrux + 1218,
};
static const struct itemplate * const itable_7C[] = {
- instrux + 1226,
+ instrux + 1218,
};
static const struct itemplate * const itable_7D[] = {
- instrux + 1226,
+ instrux + 1218,
};
static const struct itemplate * const itable_7E[] = {
- instrux + 1226,
+ instrux + 1218,
};
static const struct itemplate * const itable_7F[] = {
- instrux + 1226,
+ instrux + 1218,
};
static const struct itemplate * const itable_80[] = {
@@ -6481,16 +6832,16 @@ static const struct itemplate * const itable_80[] = {
instrux + 70,
instrux + 99,
instrux + 103,
- instrux + 222,
- instrux + 226,
- instrux + 747,
- instrux + 751,
- instrux + 989,
- instrux + 993,
- instrux + 1101,
- instrux + 1105,
- instrux + 1210,
- instrux + 1214,
+ instrux + 219,
+ instrux + 223,
+ instrux + 739,
+ instrux + 743,
+ instrux + 981,
+ instrux + 985,
+ instrux + 1093,
+ instrux + 1097,
+ instrux + 1202,
+ instrux + 1206,
};
static const struct itemplate * const itable_81[] = {
@@ -6509,31 +6860,31 @@ static const struct itemplate * const itable_81[] = {
instrux + 102,
instrux + 104,
instrux + 105,
- instrux + 223,
+ instrux + 220,
+ instrux + 221,
+ instrux + 222,
instrux + 224,
instrux + 225,
- instrux + 227,
- instrux + 228,
- instrux + 748,
- instrux + 749,
- instrux + 750,
- instrux + 752,
- instrux + 753,
- instrux + 990,
- instrux + 991,
- instrux + 992,
- instrux + 994,
- instrux + 995,
- instrux + 1102,
- instrux + 1103,
- instrux + 1104,
- instrux + 1106,
- instrux + 1107,
- instrux + 1211,
- instrux + 1212,
- instrux + 1213,
- instrux + 1215,
- instrux + 1216,
+ instrux + 740,
+ instrux + 741,
+ instrux + 742,
+ instrux + 744,
+ instrux + 745,
+ instrux + 982,
+ instrux + 983,
+ instrux + 984,
+ instrux + 986,
+ instrux + 987,
+ instrux + 1094,
+ instrux + 1095,
+ instrux + 1096,
+ instrux + 1098,
+ instrux + 1099,
+ instrux + 1203,
+ instrux + 1204,
+ instrux + 1205,
+ instrux + 1207,
+ instrux + 1208,
};
static const struct itemplate * const itable_83[] = {
@@ -6570,240 +6921,242 @@ static const struct itemplate * const itable_83[] = {
instrux + 102,
instrux + 104,
instrux + 105,
- instrux + 212,
+ instrux + 209,
+ instrux + 210,
+ instrux + 211,
instrux + 213,
- instrux + 214,
- instrux + 216,
- instrux + 218,
+ instrux + 215,
+ instrux + 217,
instrux + 220,
- instrux + 223,
+ instrux + 221,
+ instrux + 222,
instrux + 224,
instrux + 225,
- instrux + 227,
- instrux + 228,
+ instrux + 729,
+ instrux + 730,
+ instrux + 731,
+ instrux + 733,
+ instrux + 735,
instrux + 737,
- instrux + 738,
- instrux + 739,
+ instrux + 740,
instrux + 741,
- instrux + 743,
+ instrux + 742,
+ instrux + 744,
instrux + 745,
- instrux + 748,
- instrux + 749,
- instrux + 750,
- instrux + 752,
- instrux + 753,
+ instrux + 971,
+ instrux + 972,
+ instrux + 973,
+ instrux + 975,
+ instrux + 977,
instrux + 979,
- instrux + 980,
- instrux + 981,
+ instrux + 982,
instrux + 983,
- instrux + 985,
+ instrux + 984,
+ instrux + 986,
instrux + 987,
- instrux + 990,
- instrux + 991,
- instrux + 992,
- instrux + 994,
- instrux + 995,
+ instrux + 1083,
+ instrux + 1084,
+ instrux + 1085,
+ instrux + 1087,
+ instrux + 1089,
instrux + 1091,
- instrux + 1092,
- instrux + 1093,
+ instrux + 1094,
instrux + 1095,
- instrux + 1097,
+ instrux + 1096,
+ instrux + 1098,
instrux + 1099,
- instrux + 1102,
- instrux + 1103,
- instrux + 1104,
- instrux + 1106,
- instrux + 1107,
+ instrux + 1192,
+ instrux + 1193,
+ instrux + 1194,
+ instrux + 1196,
+ instrux + 1198,
instrux + 1200,
- instrux + 1201,
- instrux + 1202,
+ instrux + 1203,
instrux + 1204,
- instrux + 1206,
+ instrux + 1205,
+ instrux + 1207,
instrux + 1208,
- instrux + 1211,
- instrux + 1212,
- instrux + 1213,
- instrux + 1215,
- instrux + 1216,
};
static const struct itemplate * const itable_84[] = {
+ instrux + 1107,
+ instrux + 1108,
instrux + 1115,
- instrux + 1116,
- instrux + 1123,
};
static const struct itemplate * const itable_85[] = {
+ instrux + 1109,
+ instrux + 1110,
+ instrux + 1111,
+ instrux + 1112,
+ instrux + 1113,
+ instrux + 1114,
+ instrux + 1116,
instrux + 1117,
instrux + 1118,
- instrux + 1119,
- instrux + 1120,
- instrux + 1121,
- instrux + 1122,
- instrux + 1124,
- instrux + 1125,
- instrux + 1126,
};
static const struct itemplate * const itable_86[] = {
+ instrux + 1158,
+ instrux + 1159,
instrux + 1166,
instrux + 1167,
- instrux + 1174,
- instrux + 1175,
};
static const struct itemplate * const itable_87[] = {
+ instrux + 1160,
+ instrux + 1161,
+ instrux + 1162,
+ instrux + 1163,
+ instrux + 1164,
+ instrux + 1165,
instrux + 1168,
instrux + 1169,
instrux + 1170,
instrux + 1171,
instrux + 1172,
instrux + 1173,
- instrux + 1176,
- instrux + 1177,
- instrux + 1178,
- instrux + 1179,
- instrux + 1180,
- instrux + 1181,
};
static const struct itemplate * const itable_88[] = {
- instrux + 647,
- instrux + 648,
+ instrux + 645,
+ instrux + 646,
};
static const struct itemplate * const itable_89[] = {
+ instrux + 647,
+ instrux + 648,
instrux + 649,
instrux + 650,
instrux + 651,
instrux + 652,
- instrux + 653,
- instrux + 654,
};
static const struct itemplate * const itable_8A[] = {
- instrux + 655,
- instrux + 656,
+ instrux + 653,
+ instrux + 654,
};
static const struct itemplate * const itable_8B[] = {
+ instrux + 655,
+ instrux + 656,
instrux + 657,
instrux + 658,
instrux + 659,
instrux + 660,
- instrux + 661,
- instrux + 662,
};
static const struct itemplate * const itable_8C[] = {
- instrux + 625,
- instrux + 626,
- instrux + 627,
+ instrux + 621,
+ instrux + 622,
+ instrux + 623,
+ instrux + 624,
};
static const struct itemplate * const itable_8D[] = {
- instrux + 560,
- instrux + 561,
- instrux + 562,
+ instrux + 556,
+ instrux + 557,
+ instrux + 558,
};
static const struct itemplate * const itable_8E[] = {
+ instrux + 625,
+ instrux + 626,
+ instrux + 627,
instrux + 628,
- instrux + 629,
- instrux + 630,
};
static const struct itemplate * const itable_8F[] = {
- instrux + 818,
- instrux + 819,
- instrux + 820,
+ instrux + 810,
+ instrux + 811,
+ instrux + 812,
};
static const struct itemplate * const itable_90[] = {
- instrux + 713,
- instrux + 776,
- instrux + 1159,
- instrux + 1160,
- instrux + 1161,
- instrux + 1162,
- instrux + 1163,
- instrux + 1164,
- instrux + 1165,
+ instrux + 705,
+ instrux + 768,
+ instrux + 1151,
+ instrux + 1152,
+ instrux + 1153,
+ instrux + 1154,
+ instrux + 1155,
+ instrux + 1156,
+ instrux + 1157,
};
static const struct itemplate * const itable_91[] = {
- instrux + 1159,
- instrux + 1160,
- instrux + 1161,
- instrux + 1162,
- instrux + 1163,
- instrux + 1164,
+ instrux + 1151,
+ instrux + 1152,
+ instrux + 1153,
+ instrux + 1154,
+ instrux + 1155,
+ instrux + 1156,
};
static const struct itemplate * const itable_92[] = {
- instrux + 1159,
- instrux + 1160,
- instrux + 1161,
- instrux + 1162,
- instrux + 1163,
- instrux + 1164,
+ instrux + 1151,
+ instrux + 1152,
+ instrux + 1153,
+ instrux + 1154,
+ instrux + 1155,
+ instrux + 1156,
};
static const struct itemplate * const itable_93[] = {
- instrux + 1159,
- instrux + 1160,
- instrux + 1161,
- instrux + 1162,
- instrux + 1163,
- instrux + 1164,
+ instrux + 1151,
+ instrux + 1152,
+ instrux + 1153,
+ instrux + 1154,
+ instrux + 1155,
+ instrux + 1156,
};
static const struct itemplate * const itable_94[] = {
- instrux + 1159,
- instrux + 1160,
- instrux + 1161,
- instrux + 1162,
- instrux + 1163,
- instrux + 1164,
+ instrux + 1151,
+ instrux + 1152,
+ instrux + 1153,
+ instrux + 1154,
+ instrux + 1155,
+ instrux + 1156,
};
static const struct itemplate * const itable_95[] = {
- instrux + 1159,
- instrux + 1160,
- instrux + 1161,
- instrux + 1162,
- instrux + 1163,
- instrux + 1164,
+ instrux + 1151,
+ instrux + 1152,
+ instrux + 1153,
+ instrux + 1154,
+ instrux + 1155,
+ instrux + 1156,
};
static const struct itemplate * const itable_96[] = {
- instrux + 1159,
- instrux + 1160,
- instrux + 1161,
- instrux + 1162,
- instrux + 1163,
- instrux + 1164,
+ instrux + 1151,
+ instrux + 1152,
+ instrux + 1153,
+ instrux + 1154,
+ instrux + 1155,
+ instrux + 1156,
};
static const struct itemplate * const itable_97[] = {
- instrux + 1159,
- instrux + 1160,
- instrux + 1161,
- instrux + 1162,
- instrux + 1163,
- instrux + 1164,
+ instrux + 1151,
+ instrux + 1152,
+ instrux + 1153,
+ instrux + 1154,
+ instrux + 1155,
+ instrux + 1156,
};
static const struct itemplate * const itable_98[] = {
- instrux + 187,
- instrux + 189,
- instrux + 248,
+ instrux + 184,
+ instrux + 186,
+ instrux + 245,
};
static const struct itemplate * const itable_99[] = {
- instrux + 188,
- instrux + 246,
- instrux + 247,
+ instrux + 185,
+ instrux + 243,
+ instrux + 244,
};
static const struct itemplate * const itable_9A[] = {
@@ -6815,356 +7168,364 @@ static const struct itemplate * const itable_9A[] = {
};
static const struct itemplate * const itable_9C[] = {
- instrux + 881,
- instrux + 882,
- instrux + 883,
- instrux + 884,
+ instrux + 873,
+ instrux + 874,
+ instrux + 875,
+ instrux + 876,
};
static const struct itemplate * const itable_9D[] = {
- instrux + 826,
- instrux + 827,
- instrux + 828,
- instrux + 829,
+ instrux + 818,
+ instrux + 819,
+ instrux + 820,
+ instrux + 821,
};
static const struct itemplate * const itable_9E[] = {
- instrux + 949,
+ instrux + 941,
};
static const struct itemplate * const itable_9F[] = {
- instrux + 547,
+ instrux + 543,
};
static const struct itemplate * const itable_A0[] = {
- instrux + 631,
+ instrux + 629,
};
static const struct itemplate * const itable_A1[] = {
+ instrux + 630,
+ instrux + 631,
instrux + 632,
- instrux + 633,
- instrux + 634,
};
static const struct itemplate * const itable_A2[] = {
- instrux + 635,
+ instrux + 633,
};
static const struct itemplate * const itable_A3[] = {
+ instrux + 634,
+ instrux + 635,
instrux + 636,
- instrux + 637,
- instrux + 638,
};
static const struct itemplate * const itable_A4[] = {
- instrux + 687,
+ instrux + 679,
};
static const struct itemplate * const itable_A5[] = {
- instrux + 688,
- instrux + 689,
- instrux + 690,
+ instrux + 680,
+ instrux + 681,
+ instrux + 682,
};
static const struct itemplate * const itable_A6[] = {
- instrux + 229,
+ instrux + 226,
};
static const struct itemplate * const itable_A7[] = {
- instrux + 230,
- instrux + 231,
- instrux + 232,
+ instrux + 227,
+ instrux + 228,
+ instrux + 229,
};
static const struct itemplate * const itable_A8[] = {
- instrux + 1127,
+ instrux + 1119,
};
static const struct itemplate * const itable_A9[] = {
- instrux + 1128,
- instrux + 1129,
- instrux + 1130,
+ instrux + 1120,
+ instrux + 1121,
+ instrux + 1122,
};
static const struct itemplate * const itable_AA[] = {
- instrux + 1066,
+ instrux + 1058,
};
static const struct itemplate * const itable_AB[] = {
- instrux + 1067,
- instrux + 1068,
- instrux + 1069,
+ instrux + 1059,
+ instrux + 1060,
+ instrux + 1061,
};
static const struct itemplate * const itable_AC[] = {
- instrux + 583,
+ instrux + 579,
};
static const struct itemplate * const itable_AD[] = {
- instrux + 584,
- instrux + 585,
- instrux + 586,
+ instrux + 580,
+ instrux + 581,
+ instrux + 582,
};
static const struct itemplate * const itable_AE[] = {
- instrux + 996,
+ instrux + 988,
};
static const struct itemplate * const itable_AF[] = {
- instrux + 997,
- instrux + 998,
- instrux + 999,
+ instrux + 989,
+ instrux + 990,
+ instrux + 991,
};
static const struct itemplate * const itable_B0[] = {
- instrux + 663,
+ instrux + 661,
};
static const struct itemplate * const itable_B1[] = {
- instrux + 663,
+ instrux + 661,
};
static const struct itemplate * const itable_B2[] = {
- instrux + 663,
+ instrux + 661,
};
static const struct itemplate * const itable_B3[] = {
- instrux + 663,
+ instrux + 661,
};
static const struct itemplate * const itable_B4[] = {
- instrux + 663,
+ instrux + 661,
};
static const struct itemplate * const itable_B5[] = {
- instrux + 663,
+ instrux + 661,
};
static const struct itemplate * const itable_B6[] = {
- instrux + 663,
+ instrux + 661,
};
static const struct itemplate * const itable_B7[] = {
- instrux + 663,
+ instrux + 661,
};
static const struct itemplate * const itable_B8[] = {
+ instrux + 662,
+ instrux + 663,
instrux + 664,
- instrux + 665,
- instrux + 666,
};
static const struct itemplate * const itable_B9[] = {
+ instrux + 662,
+ instrux + 663,
instrux + 664,
- instrux + 665,
- instrux + 666,
};
static const struct itemplate * const itable_BA[] = {
+ instrux + 662,
+ instrux + 663,
instrux + 664,
- instrux + 665,
- instrux + 666,
};
static const struct itemplate * const itable_BB[] = {
+ instrux + 662,
+ instrux + 663,
instrux + 664,
- instrux + 665,
- instrux + 666,
};
static const struct itemplate * const itable_BC[] = {
+ instrux + 662,
+ instrux + 663,
instrux + 664,
- instrux + 665,
- instrux + 666,
};
static const struct itemplate * const itable_BD[] = {
+ instrux + 662,
+ instrux + 663,
instrux + 664,
- instrux + 665,
- instrux + 666,
};
static const struct itemplate * const itable_BE[] = {
+ instrux + 662,
+ instrux + 663,
instrux + 664,
- instrux + 665,
- instrux + 666,
};
static const struct itemplate * const itable_BF[] = {
+ instrux + 662,
+ instrux + 663,
instrux + 664,
- instrux + 665,
- instrux + 666,
};
static const struct itemplate * const itable_C0[] = {
- instrux + 888,
- instrux + 900,
- instrux + 923,
- instrux + 935,
- instrux + 953,
- instrux + 1004,
- instrux + 1028,
+ instrux + 880,
+ instrux + 892,
+ instrux + 915,
+ instrux + 927,
+ instrux + 945,
+ instrux + 996,
+ instrux + 1020,
};
static const struct itemplate * const itable_C1[] = {
- instrux + 891,
- instrux + 894,
- instrux + 897,
- instrux + 903,
- instrux + 906,
- instrux + 909,
- instrux + 926,
- instrux + 929,
- instrux + 932,
- instrux + 938,
- instrux + 941,
- instrux + 944,
- instrux + 956,
- instrux + 959,
- instrux + 962,
- instrux + 1007,
- instrux + 1010,
- instrux + 1013,
- instrux + 1031,
- instrux + 1034,
- instrux + 1037,
+ instrux + 883,
+ instrux + 886,
+ instrux + 889,
+ instrux + 895,
+ instrux + 898,
+ instrux + 901,
+ instrux + 918,
+ instrux + 921,
+ instrux + 924,
+ instrux + 930,
+ instrux + 933,
+ instrux + 936,
+ instrux + 948,
+ instrux + 951,
+ instrux + 954,
+ instrux + 999,
+ instrux + 1002,
+ instrux + 1005,
+ instrux + 1023,
+ instrux + 1026,
+ instrux + 1029,
};
static const struct itemplate * const itable_C2[] = {
- instrux + 916,
- instrux + 920,
+ instrux + 908,
+ instrux + 912,
};
static const struct itemplate * const itable_C3[] = {
- instrux + 915,
- instrux + 919,
+ instrux + 907,
+ instrux + 911,
};
static const struct itemplate * const itable_C4[] = {
- instrux + 564,
- instrux + 565,
+ instrux + 560,
+ instrux + 561,
};
static const struct itemplate * const itable_C5[] = {
- instrux + 558,
- instrux + 559,
+ instrux + 554,
+ instrux + 555,
};
static const struct itemplate * const itable_C6[] = {
- instrux + 667,
- instrux + 672,
+ instrux + 665,
+ instrux + 670,
+ instrux + 3706,
+ instrux + 3707,
};
static const struct itemplate * const itable_C7[] = {
+ instrux + 666,
+ instrux + 667,
instrux + 668,
instrux + 669,
- instrux + 670,
instrux + 671,
- instrux + 673,
- instrux + 674,
+ instrux + 672,
+ instrux + 3708,
+ instrux + 3709,
+ instrux + 3710,
+ instrux + 3711,
+ instrux + 3712,
+ instrux + 3713,
};
static const struct itemplate * const itable_C8[] = {
- instrux + 263,
+ instrux + 260,
};
static const struct itemplate * const itable_C9[] = {
- instrux + 563,
+ instrux + 559,
};
static const struct itemplate * const itable_CA[] = {
- instrux + 918,
+ instrux + 910,
};
static const struct itemplate * const itable_CB[] = {
- instrux + 917,
+ instrux + 909,
};
static const struct itemplate * const itable_CC[] = {
- instrux + 502,
+ instrux + 499,
};
static const struct itemplate * const itable_CD[] = {
- instrux + 500,
+ instrux + 497,
};
static const struct itemplate * const itable_CE[] = {
- instrux + 503,
+ instrux + 500,
};
static const struct itemplate * const itable_CF[] = {
+ instrux + 509,
instrux + 510,
instrux + 511,
instrux + 512,
- instrux + 513,
};
static const struct itemplate * const itable_D0[] = {
- instrux + 886,
- instrux + 898,
- instrux + 921,
- instrux + 933,
- instrux + 951,
- instrux + 1002,
- instrux + 1026,
+ instrux + 878,
+ instrux + 890,
+ instrux + 913,
+ instrux + 925,
+ instrux + 943,
+ instrux + 994,
+ instrux + 1018,
};
static const struct itemplate * const itable_D1[] = {
- instrux + 889,
- instrux + 892,
- instrux + 895,
- instrux + 901,
- instrux + 904,
- instrux + 907,
- instrux + 924,
- instrux + 927,
- instrux + 930,
- instrux + 936,
- instrux + 939,
- instrux + 942,
- instrux + 954,
- instrux + 957,
- instrux + 960,
- instrux + 1005,
- instrux + 1008,
- instrux + 1011,
- instrux + 1029,
- instrux + 1032,
- instrux + 1035,
-};
-
-static const struct itemplate * const itable_D2[] = {
+ instrux + 881,
+ instrux + 884,
instrux + 887,
+ instrux + 893,
+ instrux + 896,
instrux + 899,
+ instrux + 916,
+ instrux + 919,
instrux + 922,
+ instrux + 928,
+ instrux + 931,
instrux + 934,
+ instrux + 946,
+ instrux + 949,
instrux + 952,
+ instrux + 997,
+ instrux + 1000,
instrux + 1003,
+ instrux + 1021,
+ instrux + 1024,
instrux + 1027,
};
+static const struct itemplate * const itable_D2[] = {
+ instrux + 879,
+ instrux + 891,
+ instrux + 914,
+ instrux + 926,
+ instrux + 944,
+ instrux + 995,
+ instrux + 1019,
+};
+
static const struct itemplate * const itable_D3[] = {
- instrux + 890,
- instrux + 893,
- instrux + 896,
- instrux + 902,
- instrux + 905,
- instrux + 908,
- instrux + 925,
- instrux + 928,
- instrux + 931,
- instrux + 937,
- instrux + 940,
- instrux + 943,
- instrux + 955,
- instrux + 958,
- instrux + 961,
- instrux + 1006,
- instrux + 1009,
- instrux + 1012,
- instrux + 1030,
- instrux + 1033,
- instrux + 1036,
+ instrux + 882,
+ instrux + 885,
+ instrux + 888,
+ instrux + 894,
+ instrux + 897,
+ instrux + 900,
+ instrux + 917,
+ instrux + 920,
+ instrux + 923,
+ instrux + 929,
+ instrux + 932,
+ instrux + 935,
+ instrux + 947,
+ instrux + 950,
+ instrux + 953,
+ instrux + 998,
+ instrux + 1001,
+ instrux + 1004,
+ instrux + 1022,
+ instrux + 1025,
+ instrux + 1028,
};
static const struct itemplate * const itable_D4[] = {
@@ -7178,49 +7539,52 @@ static const struct itemplate * const itable_D5[] = {
};
static const struct itemplate * const itable_D6[] = {
- instrux + 950,
+ instrux + 942,
};
static const struct itemplate * const itable_D7[] = {
- instrux + 1182,
- instrux + 1183,
+ instrux + 1174,
+ instrux + 1175,
};
static const struct itemplate * const itable_D8[] = {
+ instrux + 265,
instrux + 268,
- instrux + 271,
- instrux + 273,
+ instrux + 270,
+ instrux + 295,
+ instrux + 297,
instrux + 298,
- instrux + 300,
- instrux + 301,
+ instrux + 303,
+ instrux + 305,
instrux + 306,
- instrux + 308,
- instrux + 309,
+ instrux + 311,
instrux + 314,
- instrux + 317,
+ instrux + 316,
instrux + 319,
- instrux + 322,
- instrux + 326,
- instrux + 327,
- instrux + 378,
- instrux + 382,
- instrux + 383,
- instrux + 419,
- instrux + 423,
+ instrux + 323,
+ instrux + 324,
+ instrux + 375,
+ instrux + 379,
+ instrux + 380,
+ instrux + 416,
+ instrux + 420,
+ instrux + 421,
instrux + 424,
- instrux + 427,
- instrux + 431,
- instrux + 432,
+ instrux + 428,
+ instrux + 429,
};
static const struct itemplate * const itable_D9[] = {
- instrux + 266,
- instrux + 267,
- instrux + 280,
- instrux + 311,
- instrux + 312,
- instrux + 351,
+ instrux + 263,
+ instrux + 264,
+ instrux + 277,
+ instrux + 308,
+ instrux + 309,
+ instrux + 348,
+ instrux + 362,
instrux + 365,
+ instrux + 366,
+ instrux + 367,
instrux + 368,
instrux + 369,
instrux + 370,
@@ -7228,224 +7592,221 @@ static const struct itemplate * const itable_D9[] = {
instrux + 372,
instrux + 373,
instrux + 374,
- instrux + 375,
- instrux + 376,
- instrux + 377,
+ instrux + 387,
+ instrux + 389,
instrux + 390,
- instrux + 392,
instrux + 393,
+ instrux + 394,
+ instrux + 395,
instrux + 396,
instrux + 397,
- instrux + 398,
- instrux + 399,
instrux + 400,
+ instrux + 402,
instrux + 403,
+ instrux + 404,
instrux + 405,
- instrux + 406,
- instrux + 407,
instrux + 408,
- instrux + 411,
- instrux + 412,
- instrux + 413,
- instrux + 435,
+ instrux + 409,
+ instrux + 410,
+ instrux + 432,
+ instrux + 442,
+ instrux + 443,
+ instrux + 444,
instrux + 445,
instrux + 446,
instrux + 447,
instrux + 448,
- instrux + 449,
- instrux + 450,
- instrux + 451,
};
static const struct itemplate * const itable_DA[] = {
+ instrux + 279,
+ instrux + 280,
+ instrux + 281,
instrux + 282,
instrux + 283,
instrux + 284,
- instrux + 285,
- instrux + 286,
- instrux + 287,
- instrux + 296,
- instrux + 297,
- instrux + 336,
- instrux + 338,
- instrux + 340,
- instrux + 342,
- instrux + 344,
- instrux + 349,
- instrux + 361,
- instrux + 363,
- instrux + 444,
+ instrux + 293,
+ instrux + 294,
+ instrux + 333,
+ instrux + 335,
+ instrux + 337,
+ instrux + 339,
+ instrux + 341,
+ instrux + 346,
+ instrux + 358,
+ instrux + 360,
+ instrux + 441,
};
static const struct itemplate * const itable_DB[] = {
- instrux + 281,
+ instrux + 278,
+ instrux + 285,
+ instrux + 286,
+ instrux + 287,
instrux + 288,
instrux + 289,
instrux + 290,
instrux + 291,
instrux + 292,
- instrux + 293,
- instrux + 294,
- instrux + 295,
- instrux + 302,
- instrux + 303,
- instrux + 313,
- instrux + 331,
- instrux + 346,
+ instrux + 299,
+ instrux + 300,
+ instrux + 310,
+ instrux + 328,
+ instrux + 343,
+ instrux + 349,
+ instrux + 350,
instrux + 352,
- instrux + 353,
- instrux + 355,
- instrux + 359,
- instrux + 367,
+ instrux + 356,
+ instrux + 364,
+ instrux + 383,
+ instrux + 384,
+ instrux + 385,
instrux + 386,
- instrux + 387,
- instrux + 388,
- instrux + 389,
- instrux + 404,
- instrux + 415,
- instrux + 438,
- instrux + 439,
+ instrux + 401,
+ instrux + 412,
+ instrux + 435,
+ instrux + 436,
};
static const struct itemplate * const itable_DC[] = {
+ instrux + 266,
+ instrux + 267,
instrux + 269,
- instrux + 270,
- instrux + 272,
- instrux + 299,
- instrux + 307,
+ instrux + 296,
+ instrux + 304,
+ instrux + 312,
+ instrux + 313,
instrux + 315,
- instrux + 316,
- instrux + 318,
- instrux + 323,
- instrux + 324,
- instrux + 325,
- instrux + 379,
- instrux + 380,
- instrux + 381,
- instrux + 420,
- instrux + 421,
- instrux + 422,
- instrux + 428,
- instrux + 429,
- instrux + 430,
+ instrux + 320,
+ instrux + 321,
+ instrux + 322,
+ instrux + 376,
+ instrux + 377,
+ instrux + 378,
+ instrux + 417,
+ instrux + 418,
+ instrux + 419,
+ instrux + 425,
+ instrux + 426,
+ instrux + 427,
};
static const struct itemplate * const itable_DD[] = {
- instrux + 332,
- instrux + 333,
- instrux + 360,
- instrux + 366,
+ instrux + 329,
+ instrux + 330,
+ instrux + 357,
+ instrux + 363,
+ instrux + 388,
instrux + 391,
- instrux + 394,
- instrux + 401,
- instrux + 402,
- instrux + 409,
- instrux + 410,
+ instrux + 398,
+ instrux + 399,
+ instrux + 406,
+ instrux + 407,
+ instrux + 411,
+ instrux + 413,
instrux + 414,
- instrux + 416,
- instrux + 417,
- instrux + 436,
- instrux + 437,
- instrux + 442,
- instrux + 443,
+ instrux + 433,
+ instrux + 434,
+ instrux + 439,
+ instrux + 440,
};
static const struct itemplate * const itable_DE[] = {
- instrux + 274,
- instrux + 275,
- instrux + 310,
- instrux + 320,
- instrux + 321,
- instrux + 328,
- instrux + 329,
- instrux + 337,
- instrux + 339,
- instrux + 341,
- instrux + 343,
- instrux + 345,
- instrux + 350,
- instrux + 362,
- instrux + 364,
- instrux + 384,
- instrux + 385,
- instrux + 425,
- instrux + 426,
- instrux + 433,
- instrux + 434,
+ instrux + 271,
+ instrux + 272,
+ instrux + 307,
+ instrux + 317,
+ instrux + 318,
+ instrux + 325,
+ instrux + 326,
+ instrux + 334,
+ instrux + 336,
+ instrux + 338,
+ instrux + 340,
+ instrux + 342,
+ instrux + 347,
+ instrux + 359,
+ instrux + 361,
+ instrux + 381,
+ instrux + 382,
+ instrux + 422,
+ instrux + 423,
+ instrux + 430,
+ instrux + 431,
};
static const struct itemplate * const itable_DF[] = {
+ instrux + 273,
+ instrux + 274,
+ instrux + 275,
instrux + 276,
- instrux + 277,
- instrux + 278,
- instrux + 279,
- instrux + 304,
- instrux + 305,
- instrux + 334,
- instrux + 335,
- instrux + 347,
- instrux + 348,
+ instrux + 301,
+ instrux + 302,
+ instrux + 331,
+ instrux + 332,
+ instrux + 344,
+ instrux + 345,
+ instrux + 351,
+ instrux + 353,
instrux + 354,
- instrux + 356,
- instrux + 357,
- instrux + 358,
- instrux + 395,
- instrux + 418,
- instrux + 440,
- instrux + 441,
+ instrux + 355,
+ instrux + 392,
+ instrux + 415,
+ instrux + 437,
+ instrux + 438,
};
static const struct itemplate * const itable_E0[] = {
+ instrux + 591,
+ instrux + 592,
+ instrux + 593,
+ instrux + 594,
instrux + 595,
instrux + 596,
instrux + 597,
instrux + 598,
- instrux + 599,
- instrux + 600,
- instrux + 601,
- instrux + 602,
};
static const struct itemplate * const itable_E1[] = {
- instrux + 591,
- instrux + 592,
- instrux + 593,
- instrux + 594,
- instrux + 603,
- instrux + 604,
- instrux + 605,
- instrux + 606,
-};
-
-static const struct itemplate * const itable_E2[] = {
instrux + 587,
instrux + 588,
instrux + 589,
instrux + 590,
+ instrux + 599,
+ instrux + 600,
+ instrux + 601,
+ instrux + 602,
+};
+
+static const struct itemplate * const itable_E2[] = {
+ instrux + 583,
+ instrux + 584,
+ instrux + 585,
+ instrux + 586,
};
static const struct itemplate * const itable_E3[] = {
+ instrux + 513,
instrux + 514,
instrux + 515,
- instrux + 516,
};
static const struct itemplate * const itable_E4[] = {
- instrux + 485,
+ instrux + 482,
};
static const struct itemplate * const itable_E5[] = {
- instrux + 486,
- instrux + 487,
+ instrux + 483,
+ instrux + 484,
};
static const struct itemplate * const itable_E6[] = {
- instrux + 754,
+ instrux + 746,
};
static const struct itemplate * const itable_E7[] = {
- instrux + 755,
- instrux + 756,
+ instrux + 747,
+ instrux + 748,
};
static const struct itemplate * const itable_E8[] = {
@@ -7458,118 +7819,118 @@ static const struct itemplate * const itable_E8[] = {
};
static const struct itemplate * const itable_E9[] = {
+ instrux + 517,
instrux + 518,
instrux + 519,
- instrux + 520,
};
static const struct itemplate * const itable_EA[] = {
+ instrux + 520,
instrux + 521,
instrux + 522,
instrux + 523,
instrux + 524,
- instrux + 525,
};
static const struct itemplate * const itable_EB[] = {
- instrux + 517,
+ instrux + 516,
};
static const struct itemplate * const itable_EC[] = {
- instrux + 488,
+ instrux + 485,
};
static const struct itemplate * const itable_ED[] = {
- instrux + 489,
- instrux + 490,
+ instrux + 486,
+ instrux + 487,
};
static const struct itemplate * const itable_EE[] = {
- instrux + 757,
+ instrux + 749,
};
static const struct itemplate * const itable_EF[] = {
- instrux + 758,
- instrux + 759,
+ instrux + 750,
+ instrux + 751,
};
static const struct itemplate * const itable_F1[] = {
- instrux + 501,
- instrux + 1057,
+ instrux + 498,
+ instrux + 1049,
};
static const struct itemplate * const itable_F4[] = {
- instrux + 452,
+ instrux + 449,
};
static const struct itemplate * const itable_F5[] = {
- instrux + 195,
+ instrux + 192,
};
static const struct itemplate * const itable_F6[] = {
- instrux + 257,
- instrux + 453,
- instrux + 457,
- instrux + 704,
+ instrux + 254,
+ instrux + 450,
+ instrux + 454,
+ instrux + 696,
+ instrux + 701,
instrux + 709,
- instrux + 717,
- instrux + 1131,
- instrux + 1135,
+ instrux + 1123,
+ instrux + 1127,
};
static const struct itemplate * const itable_F7[] = {
- instrux + 258,
- instrux + 259,
- instrux + 260,
- instrux + 454,
+ instrux + 255,
+ instrux + 256,
+ instrux + 257,
+ instrux + 451,
+ instrux + 452,
+ instrux + 453,
instrux + 455,
instrux + 456,
- instrux + 458,
- instrux + 459,
- instrux + 460,
- instrux + 705,
- instrux + 706,
- instrux + 707,
+ instrux + 457,
+ instrux + 697,
+ instrux + 698,
+ instrux + 699,
+ instrux + 702,
+ instrux + 703,
+ instrux + 704,
instrux + 710,
instrux + 711,
instrux + 712,
- instrux + 718,
- instrux + 719,
- instrux + 720,
- instrux + 1132,
- instrux + 1133,
- instrux + 1134,
- instrux + 1136,
- instrux + 1137,
+ instrux + 1124,
+ instrux + 1125,
+ instrux + 1126,
+ instrux + 1128,
+ instrux + 1129,
};
static const struct itemplate * const itable_F8[] = {
- instrux + 190,
+ instrux + 187,
};
static const struct itemplate * const itable_F9[] = {
- instrux + 1062,
+ instrux + 1054,
};
static const struct itemplate * const itable_FA[] = {
- instrux + 193,
+ instrux + 190,
};
static const struct itemplate * const itable_FB[] = {
- instrux + 1065,
+ instrux + 1057,
};
static const struct itemplate * const itable_FC[] = {
- instrux + 191,
+ instrux + 188,
};
static const struct itemplate * const itable_FD[] = {
- instrux + 1063,
+ instrux + 1055,
};
static const struct itemplate * const itable_FE[] = {
- instrux + 253,
- instrux + 493,
+ instrux + 250,
+ instrux + 490,
};
static const struct itemplate * const itable_FF[] = {
@@ -7586,15 +7947,13 @@ static const struct itemplate * const itable_FF[] = {
instrux + 181,
instrux + 182,
instrux + 183,
- instrux + 184,
- instrux + 185,
- instrux + 186,
- instrux + 254,
- instrux + 255,
- instrux + 256,
- instrux + 494,
- instrux + 495,
- instrux + 496,
+ instrux + 251,
+ instrux + 252,
+ instrux + 253,
+ instrux + 491,
+ instrux + 492,
+ instrux + 493,
+ instrux + 525,
instrux + 526,
instrux + 527,
instrux + 528,
@@ -7607,197 +7966,206 @@ static const struct itemplate * const itable_FF[] = {
instrux + 535,
instrux + 536,
instrux + 537,
- instrux + 538,
- instrux + 539,
- instrux + 540,
- instrux + 541,
- instrux + 866,
- instrux + 867,
- instrux + 868,
+ instrux + 858,
+ instrux + 859,
+ instrux + 860,
};
static const struct itemplate * const itable_vex01010[] = {
- instrux + 2528,
- instrux + 2530,
+ instrux + 2515,
+ instrux + 2517,
};
static const struct itemplate * const itable_vex01011[] = {
- instrux + 2529,
- instrux + 2531,
+ instrux + 2516,
+ instrux + 2518,
};
static const struct itemplate * const itable_vex01012[] = {
+ instrux + 2463,
+ instrux + 2464,
instrux + 2476,
instrux + 2477,
- instrux + 2489,
- instrux + 2490,
};
static const struct itemplate * const itable_vex01013[] = {
- instrux + 2491,
+ instrux + 2478,
};
static const struct itemplate * const itable_vex01014[] = {
- instrux + 2874,
- instrux + 2875,
- instrux + 2876,
- instrux + 2877,
+ instrux + 2861,
+ instrux + 2862,
+ instrux + 2863,
+ instrux + 2864,
};
static const struct itemplate * const itable_vex01015[] = {
- instrux + 2866,
- instrux + 2867,
- instrux + 2868,
- instrux + 2869,
+ instrux + 2853,
+ instrux + 2854,
+ instrux + 2855,
+ instrux + 2856,
};
static const struct itemplate * const itable_vex01016[] = {
- instrux + 2481,
- instrux + 2482,
- instrux + 2484,
- instrux + 2485,
+ instrux + 2468,
+ instrux + 2469,
+ instrux + 2471,
+ instrux + 2472,
};
static const struct itemplate * const itable_vex01017[] = {
- instrux + 2483,
+ instrux + 2470,
};
static const struct itemplate * const itable_vex01028[] = {
- instrux + 2452,
- instrux + 2454,
+ instrux + 2439,
+ instrux + 2441,
};
static const struct itemplate * const itable_vex01029[] = {
- instrux + 2453,
- instrux + 2455,
+ instrux + 2440,
+ instrux + 2442,
};
static const struct itemplate * const itable_vex0102B[] = {
- instrux + 2506,
- instrux + 2507,
+ instrux + 2493,
+ instrux + 2494,
};
static const struct itemplate * const itable_vex0102E[] = {
- instrux + 2861,
+ instrux + 2848,
};
static const struct itemplate * const itable_vex0102F[] = {
- instrux + 2329,
+ instrux + 2316,
};
static const struct itemplate * const itable_vex01050[] = {
- instrux + 2496,
- instrux + 2497,
- instrux + 2498,
- instrux + 2499,
+ instrux + 2483,
+ instrux + 2484,
+ instrux + 2485,
+ instrux + 2486,
};
static const struct itemplate * const itable_vex01051[] = {
- instrux + 2837,
- instrux + 2838,
+ instrux + 2824,
+ instrux + 2825,
};
static const struct itemplate * const itable_vex01052[] = {
- instrux + 2815,
- instrux + 2816,
+ instrux + 2802,
+ instrux + 2803,
};
static const struct itemplate * const itable_vex01053[] = {
- instrux + 2811,
- instrux + 2812,
+ instrux + 2798,
+ instrux + 2799,
};
static const struct itemplate * const itable_vex01054[] = {
- instrux + 1732,
- instrux + 1733,
- instrux + 1734,
- instrux + 1735,
+ instrux + 1719,
+ instrux + 1720,
+ instrux + 1721,
+ instrux + 1722,
};
static const struct itemplate * const itable_vex01055[] = {
- instrux + 1740,
- instrux + 1741,
- instrux + 1742,
- instrux + 1743,
+ instrux + 1727,
+ instrux + 1728,
+ instrux + 1729,
+ instrux + 1730,
};
static const struct itemplate * const itable_vex01056[] = {
- instrux + 2550,
- instrux + 2551,
- instrux + 2552,
- instrux + 2553,
+ instrux + 2537,
+ instrux + 2538,
+ instrux + 2539,
+ instrux + 2540,
};
static const struct itemplate * const itable_vex01057[] = {
- instrux + 2882,
- instrux + 2883,
- instrux + 2884,
- instrux + 2885,
+ instrux + 2869,
+ instrux + 2870,
+ instrux + 2871,
+ instrux + 2872,
};
static const struct itemplate * const itable_vex01058[] = {
- instrux + 1712,
- instrux + 1713,
- instrux + 1714,
- instrux + 1715,
+ instrux + 1699,
+ instrux + 1700,
+ instrux + 1701,
+ instrux + 1702,
};
static const struct itemplate * const itable_vex01059[] = {
- instrux + 2538,
- instrux + 2539,
- instrux + 2540,
- instrux + 2541,
+ instrux + 2525,
+ instrux + 2526,
+ instrux + 2527,
+ instrux + 2528,
};
static const struct itemplate * const itable_vex0105A[] = {
- instrux + 2344,
- instrux + 2345,
+ instrux + 2331,
+ instrux + 2332,
};
static const struct itemplate * const itable_vex0105B[] = {
- instrux + 2332,
- instrux + 2333,
+ instrux + 2319,
+ instrux + 2320,
};
static const struct itemplate * const itable_vex0105C[] = {
- instrux + 2848,
- instrux + 2849,
- instrux + 2850,
- instrux + 2851,
+ instrux + 2835,
+ instrux + 2836,
+ instrux + 2837,
+ instrux + 2838,
};
static const struct itemplate * const itable_vex0105D[] = {
- instrux + 2440,
- instrux + 2441,
- instrux + 2442,
- instrux + 2443,
+ instrux + 2427,
+ instrux + 2428,
+ instrux + 2429,
+ instrux + 2430,
};
static const struct itemplate * const itable_vex0105E[] = {
- instrux + 2376,
- instrux + 2377,
- instrux + 2378,
- instrux + 2379,
+ instrux + 2363,
+ instrux + 2364,
+ instrux + 2365,
+ instrux + 2366,
};
static const struct itemplate * const itable_vex0105F[] = {
- instrux + 2428,
- instrux + 2429,
- instrux + 2430,
- instrux + 2431,
+ instrux + 2415,
+ instrux + 2416,
+ instrux + 2417,
+ instrux + 2418,
};
static const struct itemplate * const itable_vex01077[] = {
- instrux + 2886,
- instrux + 2887,
+ instrux + 2873,
+ instrux + 2874,
};
static const struct itemplate * const itable_vex010AE[] = {
- instrux + 2414,
- instrux + 2843,
+ instrux + 2401,
+ instrux + 2830,
};
static const struct itemplate * const itable_vex010C2[] = {
+ instrux + 1939,
+ instrux + 1940,
+ instrux + 1941,
+ instrux + 1942,
+ instrux + 1943,
+ instrux + 1944,
+ instrux + 1945,
+ instrux + 1946,
+ instrux + 1947,
+ instrux + 1948,
+ instrux + 1949,
+ instrux + 1950,
+ instrux + 1951,
instrux + 1952,
instrux + 1953,
instrux + 1954,
@@ -7973,349 +8341,397 @@ static const struct itemplate * const itable_vex010C2[] = {
instrux + 2124,
instrux + 2125,
instrux + 2126,
- instrux + 2127,
- instrux + 2128,
- instrux + 2129,
- instrux + 2130,
- instrux + 2131,
- instrux + 2132,
- instrux + 2133,
- instrux + 2134,
- instrux + 2135,
- instrux + 2136,
- instrux + 2137,
- instrux + 2138,
- instrux + 2139,
};
static const struct itemplate * const itable_vex010C6[] = {
- instrux + 2831,
- instrux + 2832,
- instrux + 2833,
- instrux + 2834,
+ instrux + 2818,
+ instrux + 2819,
+ instrux + 2820,
+ instrux + 2821,
};
static const struct itemplate * const itable_vex01110[] = {
- instrux + 2524,
- instrux + 2526,
+ instrux + 2511,
+ instrux + 2513,
};
static const struct itemplate * const itable_vex01111[] = {
- instrux + 2525,
- instrux + 2527,
+ instrux + 2512,
+ instrux + 2514,
};
static const struct itemplate * const itable_vex01112[] = {
- instrux + 2486,
- instrux + 2487,
+ instrux + 2473,
+ instrux + 2474,
};
static const struct itemplate * const itable_vex01113[] = {
- instrux + 2488,
+ instrux + 2475,
};
static const struct itemplate * const itable_vex01114[] = {
- instrux + 2870,
- instrux + 2871,
- instrux + 2872,
- instrux + 2873,
+ instrux + 2857,
+ instrux + 2858,
+ instrux + 2859,
+ instrux + 2860,
};
static const struct itemplate * const itable_vex01115[] = {
- instrux + 2862,
- instrux + 2863,
- instrux + 2864,
- instrux + 2865,
+ instrux + 2849,
+ instrux + 2850,
+ instrux + 2851,
+ instrux + 2852,
};
static const struct itemplate * const itable_vex01116[] = {
- instrux + 2478,
- instrux + 2479,
+ instrux + 2465,
+ instrux + 2466,
};
static const struct itemplate * const itable_vex01117[] = {
- instrux + 2480,
+ instrux + 2467,
};
static const struct itemplate * const itable_vex01128[] = {
- instrux + 2448,
- instrux + 2450,
+ instrux + 2435,
+ instrux + 2437,
};
static const struct itemplate * const itable_vex01129[] = {
- instrux + 2449,
- instrux + 2451,
- instrux + 2605,
- instrux + 2606,
+ instrux + 2436,
+ instrux + 2438,
};
static const struct itemplate * const itable_vex0112B[] = {
- instrux + 2504,
- instrux + 2505,
+ instrux + 2491,
+ instrux + 2492,
};
static const struct itemplate * const itable_vex0112E[] = {
- instrux + 2860,
+ instrux + 2847,
};
static const struct itemplate * const itable_vex0112F[] = {
- instrux + 2328,
-};
-
-static const struct itemplate * const itable_vex01137[] = {
- instrux + 2613,
- instrux + 2614,
+ instrux + 2315,
};
static const struct itemplate * const itable_vex01150[] = {
- instrux + 2492,
- instrux + 2493,
- instrux + 2494,
- instrux + 2495,
+ instrux + 2479,
+ instrux + 2480,
+ instrux + 2481,
+ instrux + 2482,
};
static const struct itemplate * const itable_vex01151[] = {
- instrux + 2835,
- instrux + 2836,
+ instrux + 2822,
+ instrux + 2823,
};
static const struct itemplate * const itable_vex01154[] = {
- instrux + 1728,
- instrux + 1729,
- instrux + 1730,
- instrux + 1731,
+ instrux + 1715,
+ instrux + 1716,
+ instrux + 1717,
+ instrux + 1718,
};
static const struct itemplate * const itable_vex01155[] = {
- instrux + 1736,
- instrux + 1737,
- instrux + 1738,
- instrux + 1739,
+ instrux + 1723,
+ instrux + 1724,
+ instrux + 1725,
+ instrux + 1726,
};
static const struct itemplate * const itable_vex01156[] = {
- instrux + 2546,
- instrux + 2547,
- instrux + 2548,
- instrux + 2549,
+ instrux + 2533,
+ instrux + 2534,
+ instrux + 2535,
+ instrux + 2536,
};
static const struct itemplate * const itable_vex01157[] = {
- instrux + 2878,
- instrux + 2879,
- instrux + 2880,
- instrux + 2881,
+ instrux + 2865,
+ instrux + 2866,
+ instrux + 2867,
+ instrux + 2868,
};
static const struct itemplate * const itable_vex01158[] = {
- instrux + 1708,
- instrux + 1709,
- instrux + 1710,
- instrux + 1711,
+ instrux + 1695,
+ instrux + 1696,
+ instrux + 1697,
+ instrux + 1698,
};
static const struct itemplate * const itable_vex01159[] = {
- instrux + 2534,
- instrux + 2535,
- instrux + 2536,
- instrux + 2537,
+ instrux + 2521,
+ instrux + 2522,
+ instrux + 2523,
+ instrux + 2524,
};
static const struct itemplate * const itable_vex0115A[] = {
- instrux + 2338,
- instrux + 2339,
- instrux + 2340,
- instrux + 2341,
+ instrux + 2325,
+ instrux + 2326,
+ instrux + 2327,
+ instrux + 2328,
};
static const struct itemplate * const itable_vex0115B[] = {
- instrux + 2342,
- instrux + 2343,
+ instrux + 2329,
+ instrux + 2330,
};
static const struct itemplate * const itable_vex0115C[] = {
- instrux + 2844,
- instrux + 2845,
- instrux + 2846,
- instrux + 2847,
+ instrux + 2831,
+ instrux + 2832,
+ instrux + 2833,
+ instrux + 2834,
};
static const struct itemplate * const itable_vex0115D[] = {
- instrux + 2436,
- instrux + 2437,
- instrux + 2438,
- instrux + 2439,
+ instrux + 2423,
+ instrux + 2424,
+ instrux + 2425,
+ instrux + 2426,
};
static const struct itemplate * const itable_vex0115E[] = {
- instrux + 2372,
- instrux + 2373,
- instrux + 2374,
- instrux + 2375,
+ instrux + 2359,
+ instrux + 2360,
+ instrux + 2361,
+ instrux + 2362,
};
static const struct itemplate * const itable_vex0115F[] = {
- instrux + 2424,
- instrux + 2425,
- instrux + 2426,
- instrux + 2427,
+ instrux + 2411,
+ instrux + 2412,
+ instrux + 2413,
+ instrux + 2414,
};
static const struct itemplate * const itable_vex01160[] = {
- instrux + 2801,
- instrux + 2802,
+ instrux + 2788,
+ instrux + 2789,
+ instrux + 3609,
+ instrux + 3610,
};
static const struct itemplate * const itable_vex01161[] = {
- instrux + 2803,
- instrux + 2804,
+ instrux + 2790,
+ instrux + 2791,
+ instrux + 3611,
+ instrux + 3612,
};
static const struct itemplate * const itable_vex01162[] = {
- instrux + 2805,
- instrux + 2806,
+ instrux + 2792,
+ instrux + 2793,
+ instrux + 3613,
+ instrux + 3614,
};
static const struct itemplate * const itable_vex01163[] = {
- instrux + 2557,
- instrux + 2558,
+ instrux + 2544,
+ instrux + 2545,
+ instrux + 3406,
+ instrux + 3407,
};
static const struct itemplate * const itable_vex01164[] = {
- instrux + 2607,
- instrux + 2608,
+ instrux + 2594,
+ instrux + 2595,
+ instrux + 3452,
+ instrux + 3453,
};
static const struct itemplate * const itable_vex01165[] = {
- instrux + 2609,
- instrux + 2610,
+ instrux + 2596,
+ instrux + 2597,
+ instrux + 3454,
+ instrux + 3455,
};
static const struct itemplate * const itable_vex01166[] = {
- instrux + 2611,
- instrux + 2612,
+ instrux + 2598,
+ instrux + 2599,
+ instrux + 3456,
+ instrux + 3457,
};
static const struct itemplate * const itable_vex01167[] = {
- instrux + 2561,
- instrux + 2562,
+ instrux + 2548,
+ instrux + 2549,
+ instrux + 3412,
+ instrux + 3413,
};
static const struct itemplate * const itable_vex01168[] = {
- instrux + 2793,
- instrux + 2794,
+ instrux + 2780,
+ instrux + 2781,
+ instrux + 3601,
+ instrux + 3602,
};
static const struct itemplate * const itable_vex01169[] = {
- instrux + 2795,
- instrux + 2796,
+ instrux + 2782,
+ instrux + 2783,
+ instrux + 3603,
+ instrux + 3604,
};
static const struct itemplate * const itable_vex0116A[] = {
- instrux + 2797,
- instrux + 2798,
+ instrux + 2784,
+ instrux + 2785,
+ instrux + 3605,
+ instrux + 3606,
};
static const struct itemplate * const itable_vex0116B[] = {
- instrux + 2559,
- instrux + 2560,
+ instrux + 2546,
+ instrux + 2547,
+ instrux + 3408,
+ instrux + 3409,
};
static const struct itemplate * const itable_vex0116C[] = {
- instrux + 2807,
- instrux + 2808,
+ instrux + 2794,
+ instrux + 2795,
+ instrux + 3615,
+ instrux + 3616,
};
static const struct itemplate * const itable_vex0116D[] = {
- instrux + 2799,
- instrux + 2800,
+ instrux + 2786,
+ instrux + 2787,
+ instrux + 3607,
+ instrux + 3608,
};
static const struct itemplate * const itable_vex0116E[] = {
- instrux + 2456,
- instrux + 2460,
+ instrux + 2443,
+ instrux + 2447,
};
static const struct itemplate * const itable_vex0116F[] = {
- instrux + 2464,
- instrux + 2466,
- instrux + 2468,
+ instrux + 2451,
+ instrux + 2453,
+ instrux + 2455,
};
static const struct itemplate * const itable_vex01170[] = {
- instrux + 2730,
+ instrux + 2717,
+ instrux + 3540,
};
static const struct itemplate * const itable_vex01171[] = {
+ instrux + 2732,
+ instrux + 2733,
+ instrux + 2744,
instrux + 2745,
- instrux + 2746,
- instrux + 2757,
- instrux + 2758,
- instrux + 2765,
- instrux + 2766,
+ instrux + 2752,
+ instrux + 2753,
+ instrux + 3553,
+ instrux + 3554,
+ instrux + 3565,
+ instrux + 3566,
+ instrux + 3575,
+ instrux + 3576,
};
static const struct itemplate * const itable_vex01172[] = {
+ instrux + 2736,
+ instrux + 2737,
+ instrux + 2748,
instrux + 2749,
- instrux + 2750,
- instrux + 2761,
- instrux + 2762,
- instrux + 2769,
- instrux + 2770,
+ instrux + 2756,
+ instrux + 2757,
+ instrux + 3557,
+ instrux + 3558,
+ instrux + 3569,
+ instrux + 3570,
+ instrux + 3579,
+ instrux + 3580,
};
static const struct itemplate * const itable_vex01173[] = {
- instrux + 2739,
+ instrux + 2726,
+ instrux + 2727,
+ instrux + 2728,
+ instrux + 2729,
instrux + 2740,
instrux + 2741,
- instrux + 2742,
- instrux + 2753,
- instrux + 2754,
- instrux + 2773,
- instrux + 2774,
+ instrux + 2760,
+ instrux + 2761,
+ instrux + 3549,
+ instrux + 3550,
+ instrux + 3561,
+ instrux + 3562,
+ instrux + 3571,
+ instrux + 3572,
+ instrux + 3583,
+ instrux + 3584,
};
static const struct itemplate * const itable_vex01174[] = {
- instrux + 2599,
- instrux + 2600,
+ instrux + 2586,
+ instrux + 2587,
+ instrux + 3444,
+ instrux + 3445,
};
static const struct itemplate * const itable_vex01175[] = {
- instrux + 2601,
- instrux + 2602,
+ instrux + 2588,
+ instrux + 2589,
+ instrux + 3446,
+ instrux + 3447,
};
static const struct itemplate * const itable_vex01176[] = {
- instrux + 2603,
- instrux + 2604,
+ instrux + 2590,
+ instrux + 2591,
+ instrux + 3448,
+ instrux + 3449,
};
static const struct itemplate * const itable_vex0117C[] = {
- instrux + 2392,
- instrux + 2393,
- instrux + 2394,
- instrux + 2395,
+ instrux + 2379,
+ instrux + 2380,
+ instrux + 2381,
+ instrux + 2382,
};
static const struct itemplate * const itable_vex0117D[] = {
- instrux + 2400,
- instrux + 2401,
- instrux + 2402,
- instrux + 2403,
+ instrux + 2387,
+ instrux + 2388,
+ instrux + 2389,
+ instrux + 2390,
};
static const struct itemplate * const itable_vex0117E[] = {
- instrux + 2457,
- instrux + 2461,
+ instrux + 2444,
+ instrux + 2448,
};
static const struct itemplate * const itable_vex0117F[] = {
- instrux + 2465,
- instrux + 2467,
- instrux + 2469,
+ instrux + 2452,
+ instrux + 2454,
+ instrux + 2456,
};
static const struct itemplate * const itable_vex011C2[] = {
+ instrux + 1751,
+ instrux + 1752,
+ instrux + 1753,
+ instrux + 1754,
+ instrux + 1755,
+ instrux + 1756,
+ instrux + 1757,
+ instrux + 1758,
+ instrux + 1759,
+ instrux + 1760,
+ instrux + 1761,
+ instrux + 1762,
+ instrux + 1763,
instrux + 1764,
instrux + 1765,
instrux + 1766,
@@ -8491,390 +8907,473 @@ static const struct itemplate * const itable_vex011C2[] = {
instrux + 1936,
instrux + 1937,
instrux + 1938,
- instrux + 1939,
- instrux + 1940,
- instrux + 1941,
- instrux + 1942,
- instrux + 1943,
- instrux + 1944,
- instrux + 1945,
- instrux + 1946,
- instrux + 1947,
- instrux + 1948,
- instrux + 1949,
- instrux + 1950,
- instrux + 1951,
};
static const struct itemplate * const itable_vex011C4[] = {
- instrux + 2654,
- instrux + 2655,
- instrux + 2656,
- instrux + 2657,
- instrux + 2658,
- instrux + 2659,
+ instrux + 2641,
+ instrux + 2642,
+ instrux + 2643,
+ instrux + 2644,
+ instrux + 2645,
+ instrux + 2646,
};
static const struct itemplate * const itable_vex011C5[] = {
- instrux + 2627,
- instrux + 2628,
+ instrux + 2614,
+ instrux + 2615,
};
static const struct itemplate * const itable_vex011C6[] = {
- instrux + 2827,
- instrux + 2828,
- instrux + 2829,
- instrux + 2830,
+ instrux + 2814,
+ instrux + 2815,
+ instrux + 2816,
+ instrux + 2817,
};
static const struct itemplate * const itable_vex011D0[] = {
- instrux + 1720,
- instrux + 1721,
- instrux + 1722,
- instrux + 1723,
+ instrux + 1707,
+ instrux + 1708,
+ instrux + 1709,
+ instrux + 1710,
};
static const struct itemplate * const itable_vex011D1[] = {
- instrux + 2763,
- instrux + 2764,
+ instrux + 2750,
+ instrux + 2751,
+ instrux + 3573,
+ instrux + 3574,
};
static const struct itemplate * const itable_vex011D2[] = {
- instrux + 2767,
- instrux + 2768,
+ instrux + 2754,
+ instrux + 2755,
+ instrux + 3577,
+ instrux + 3578,
};
static const struct itemplate * const itable_vex011D3[] = {
- instrux + 2771,
- instrux + 2772,
+ instrux + 2758,
+ instrux + 2759,
+ instrux + 3581,
+ instrux + 3582,
};
static const struct itemplate * const itable_vex011D4[] = {
- instrux + 2571,
- instrux + 2572,
+ instrux + 2558,
+ instrux + 2559,
+ instrux + 3420,
+ instrux + 3421,
};
static const struct itemplate * const itable_vex011D5[] = {
- instrux + 2716,
- instrux + 2717,
+ instrux + 2703,
+ instrux + 2704,
+ instrux + 3528,
+ instrux + 3529,
};
static const struct itemplate * const itable_vex011D6[] = {
- instrux + 2459,
+ instrux + 2446,
};
static const struct itemplate * const itable_vex011D7[] = {
- instrux + 2696,
- instrux + 2697,
+ instrux + 2683,
+ instrux + 2684,
+ instrux + 3500,
+ instrux + 3501,
};
static const struct itemplate * const itable_vex011D8[] = {
- instrux + 2789,
- instrux + 2790,
+ instrux + 2776,
+ instrux + 2777,
+ instrux + 3597,
+ instrux + 3598,
};
static const struct itemplate * const itable_vex011D9[] = {
- instrux + 2791,
- instrux + 2792,
+ instrux + 2778,
+ instrux + 2779,
+ instrux + 3599,
+ instrux + 3600,
};
static const struct itemplate * const itable_vex011DA[] = {
- instrux + 2690,
- instrux + 2691,
+ instrux + 2677,
+ instrux + 2678,
+ instrux + 3494,
+ instrux + 3495,
};
static const struct itemplate * const itable_vex011DB[] = {
- instrux + 2583,
- instrux + 2584,
+ instrux + 2570,
+ instrux + 2571,
+ instrux + 3432,
+ instrux + 3433,
};
static const struct itemplate * const itable_vex011DC[] = {
- instrux + 2577,
- instrux + 2578,
+ instrux + 2564,
+ instrux + 2565,
+ instrux + 3426,
+ instrux + 3427,
};
static const struct itemplate * const itable_vex011DD[] = {
- instrux + 2579,
- instrux + 2580,
+ instrux + 2566,
+ instrux + 2567,
+ instrux + 3428,
+ instrux + 3429,
};
static const struct itemplate * const itable_vex011DE[] = {
- instrux + 2678,
- instrux + 2679,
+ instrux + 2665,
+ instrux + 2666,
+ instrux + 3482,
+ instrux + 3483,
};
static const struct itemplate * const itable_vex011DF[] = {
- instrux + 2585,
- instrux + 2586,
+ instrux + 2572,
+ instrux + 2573,
+ instrux + 3434,
+ instrux + 3435,
};
static const struct itemplate * const itable_vex011E0[] = {
- instrux + 2587,
- instrux + 2588,
+ instrux + 2574,
+ instrux + 2575,
+ instrux + 3436,
+ instrux + 3437,
};
static const struct itemplate * const itable_vex011E1[] = {
- instrux + 2755,
- instrux + 2756,
+ instrux + 2742,
+ instrux + 2743,
+ instrux + 3563,
+ instrux + 3564,
};
static const struct itemplate * const itable_vex011E2[] = {
- instrux + 2759,
- instrux + 2760,
+ instrux + 2746,
+ instrux + 2747,
+ instrux + 3567,
+ instrux + 3568,
};
static const struct itemplate * const itable_vex011E3[] = {
- instrux + 2589,
- instrux + 2590,
+ instrux + 2576,
+ instrux + 2577,
+ instrux + 3438,
+ instrux + 3439,
};
static const struct itemplate * const itable_vex011E4[] = {
- instrux + 2710,
- instrux + 2711,
+ instrux + 2697,
+ instrux + 2698,
+ instrux + 3524,
+ instrux + 3525,
};
static const struct itemplate * const itable_vex011E5[] = {
- instrux + 2714,
- instrux + 2715,
+ instrux + 2701,
+ instrux + 2702,
+ instrux + 3526,
+ instrux + 3527,
};
static const struct itemplate * const itable_vex011E6[] = {
- instrux + 2362,
- instrux + 2363,
- instrux + 2364,
- instrux + 2365,
+ instrux + 2349,
+ instrux + 2350,
+ instrux + 2351,
+ instrux + 2352,
};
static const struct itemplate * const itable_vex011E7[] = {
- instrux + 2500,
- instrux + 2501,
- instrux + 2502,
+ instrux + 2487,
+ instrux + 2488,
+ instrux + 2489,
};
static const struct itemplate * const itable_vex011E8[] = {
- instrux + 2785,
- instrux + 2786,
+ instrux + 2772,
+ instrux + 2773,
+ instrux + 3593,
+ instrux + 3594,
};
static const struct itemplate * const itable_vex011E9[] = {
- instrux + 2787,
- instrux + 2788,
+ instrux + 2774,
+ instrux + 2775,
+ instrux + 3595,
+ instrux + 3596,
};
static const struct itemplate * const itable_vex011EA[] = {
- instrux + 2686,
- instrux + 2687,
+ instrux + 2673,
+ instrux + 2674,
+ instrux + 3490,
+ instrux + 3491,
};
static const struct itemplate * const itable_vex011EB[] = {
- instrux + 2724,
- instrux + 2725,
+ instrux + 2711,
+ instrux + 2712,
+ instrux + 3534,
+ instrux + 3535,
};
static const struct itemplate * const itable_vex011EC[] = {
- instrux + 2573,
- instrux + 2574,
+ instrux + 2560,
+ instrux + 2561,
+ instrux + 3422,
+ instrux + 3423,
};
static const struct itemplate * const itable_vex011ED[] = {
- instrux + 2575,
- instrux + 2576,
+ instrux + 2562,
+ instrux + 2563,
+ instrux + 3424,
+ instrux + 3425,
};
static const struct itemplate * const itable_vex011EE[] = {
- instrux + 2674,
- instrux + 2675,
+ instrux + 2661,
+ instrux + 2662,
+ instrux + 3478,
+ instrux + 3479,
};
static const struct itemplate * const itable_vex011EF[] = {
- instrux + 2809,
- instrux + 2810,
+ instrux + 2796,
+ instrux + 2797,
+ instrux + 3617,
+ instrux + 3618,
};
static const struct itemplate * const itable_vex011F1[] = {
- instrux + 2743,
- instrux + 2744,
+ instrux + 2730,
+ instrux + 2731,
+ instrux + 3551,
+ instrux + 3552,
};
static const struct itemplate * const itable_vex011F2[] = {
- instrux + 2747,
- instrux + 2748,
+ instrux + 2734,
+ instrux + 2735,
+ instrux + 3555,
+ instrux + 3556,
};
static const struct itemplate * const itable_vex011F3[] = {
- instrux + 2751,
- instrux + 2752,
+ instrux + 2738,
+ instrux + 2739,
+ instrux + 3559,
+ instrux + 3560,
};
static const struct itemplate * const itable_vex011F4[] = {
- instrux + 2720,
- instrux + 2721,
+ instrux + 2707,
+ instrux + 2708,
+ instrux + 3532,
+ instrux + 3533,
};
static const struct itemplate * const itable_vex011F5[] = {
- instrux + 2668,
- instrux + 2669,
+ instrux + 2655,
+ instrux + 2656,
+ instrux + 3474,
+ instrux + 3475,
};
static const struct itemplate * const itable_vex011F6[] = {
- instrux + 2726,
- instrux + 2727,
+ instrux + 2713,
+ instrux + 2714,
+ instrux + 3536,
+ instrux + 3537,
};
static const struct itemplate * const itable_vex011F7[] = {
- instrux + 2415,
+ instrux + 2402,
};
static const struct itemplate * const itable_vex011F8[] = {
- instrux + 2777,
- instrux + 2778,
+ instrux + 2764,
+ instrux + 2765,
+ instrux + 3585,
+ instrux + 3586,
};
static const struct itemplate * const itable_vex011F9[] = {
- instrux + 2779,
- instrux + 2780,
+ instrux + 2766,
+ instrux + 2767,
+ instrux + 3587,
+ instrux + 3588,
};
static const struct itemplate * const itable_vex011FA[] = {
- instrux + 2781,
- instrux + 2782,
+ instrux + 2768,
+ instrux + 2769,
+ instrux + 3589,
+ instrux + 3590,
};
static const struct itemplate * const itable_vex011FB[] = {
- instrux + 2783,
- instrux + 2784,
+ instrux + 2770,
+ instrux + 2771,
+ instrux + 3591,
+ instrux + 3592,
};
static const struct itemplate * const itable_vex011FC[] = {
- instrux + 2565,
- instrux + 2566,
+ instrux + 2552,
+ instrux + 2553,
+ instrux + 3414,
+ instrux + 3415,
};
static const struct itemplate * const itable_vex011FD[] = {
- instrux + 2567,
- instrux + 2568,
+ instrux + 2554,
+ instrux + 2555,
+ instrux + 3416,
+ instrux + 3417,
};
static const struct itemplate * const itable_vex011FE[] = {
- instrux + 2569,
- instrux + 2570,
+ instrux + 2556,
+ instrux + 2557,
+ instrux + 3418,
+ instrux + 3419,
};
static const struct itemplate * const itable_vex01210[] = {
- instrux + 2518,
- instrux + 2519,
- instrux + 2520,
+ instrux + 2505,
+ instrux + 2506,
+ instrux + 2507,
};
static const struct itemplate * const itable_vex01211[] = {
- instrux + 2521,
- instrux + 2522,
- instrux + 2523,
+ instrux + 2508,
+ instrux + 2509,
+ instrux + 2510,
};
static const struct itemplate * const itable_vex01212[] = {
- instrux + 2516,
- instrux + 2517,
+ instrux + 2503,
+ instrux + 2504,
};
static const struct itemplate * const itable_vex01216[] = {
- instrux + 2514,
- instrux + 2515,
+ instrux + 2501,
+ instrux + 2502,
};
static const struct itemplate * const itable_vex0122A[] = {
- instrux + 2354,
- instrux + 2355,
- instrux + 2356,
- instrux + 2357,
+ instrux + 2341,
+ instrux + 2342,
+ instrux + 2343,
+ instrux + 2344,
};
static const struct itemplate * const itable_vex0122C[] = {
- instrux + 2370,
- instrux + 2371,
+ instrux + 2357,
+ instrux + 2358,
};
static const struct itemplate * const itable_vex0122D[] = {
- instrux + 2360,
- instrux + 2361,
+ instrux + 2347,
+ instrux + 2348,
};
static const struct itemplate * const itable_vex01251[] = {
- instrux + 2841,
- instrux + 2842,
+ instrux + 2828,
+ instrux + 2829,
};
static const struct itemplate * const itable_vex01252[] = {
- instrux + 2817,
- instrux + 2818,
+ instrux + 2804,
+ instrux + 2805,
};
static const struct itemplate * const itable_vex01253[] = {
- instrux + 2813,
- instrux + 2814,
+ instrux + 2800,
+ instrux + 2801,
};
static const struct itemplate * const itable_vex01258[] = {
- instrux + 1718,
- instrux + 1719,
+ instrux + 1705,
+ instrux + 1706,
};
static const struct itemplate * const itable_vex01259[] = {
- instrux + 2544,
- instrux + 2545,
+ instrux + 2531,
+ instrux + 2532,
};
static const struct itemplate * const itable_vex0125A[] = {
- instrux + 2358,
- instrux + 2359,
+ instrux + 2345,
+ instrux + 2346,
};
static const struct itemplate * const itable_vex0125B[] = {
- instrux + 2366,
- instrux + 2367,
+ instrux + 2353,
+ instrux + 2354,
};
static const struct itemplate * const itable_vex0125C[] = {
- instrux + 2854,
- instrux + 2855,
+ instrux + 2841,
+ instrux + 2842,
};
static const struct itemplate * const itable_vex0125D[] = {
- instrux + 2446,
- instrux + 2447,
+ instrux + 2433,
+ instrux + 2434,
};
static const struct itemplate * const itable_vex0125E[] = {
- instrux + 2382,
- instrux + 2383,
+ instrux + 2369,
+ instrux + 2370,
};
static const struct itemplate * const itable_vex0125F[] = {
- instrux + 2434,
- instrux + 2435,
+ instrux + 2421,
+ instrux + 2422,
};
static const struct itemplate * const itable_vex0126F[] = {
- instrux + 2470,
- instrux + 2472,
- instrux + 2474,
+ instrux + 2457,
+ instrux + 2459,
+ instrux + 2461,
};
static const struct itemplate * const itable_vex01270[] = {
- instrux + 2731,
+ instrux + 2718,
+ instrux + 3541,
};
static const struct itemplate * const itable_vex0127E[] = {
- instrux + 2458,
+ instrux + 2445,
};
static const struct itemplate * const itable_vex0127F[] = {
- instrux + 2471,
- instrux + 2473,
- instrux + 2475,
+ instrux + 2458,
+ instrux + 2460,
+ instrux + 2462,
};
static const struct itemplate * const itable_vex012C2[] = {
+ instrux + 2221,
+ instrux + 2222,
+ instrux + 2223,
+ instrux + 2224,
+ instrux + 2225,
+ instrux + 2226,
+ instrux + 2227,
+ instrux + 2228,
+ instrux + 2229,
+ instrux + 2230,
+ instrux + 2231,
+ instrux + 2232,
+ instrux + 2233,
instrux + 2234,
instrux + 2235,
instrux + 2236,
@@ -8956,119 +9455,120 @@ static const struct itemplate * const itable_vex012C2[] = {
instrux + 2312,
instrux + 2313,
instrux + 2314,
- instrux + 2315,
- instrux + 2316,
- instrux + 2317,
- instrux + 2318,
- instrux + 2319,
- instrux + 2320,
- instrux + 2321,
- instrux + 2322,
- instrux + 2323,
- instrux + 2324,
- instrux + 2325,
- instrux + 2326,
- instrux + 2327,
};
static const struct itemplate * const itable_vex012E6[] = {
- instrux + 2330,
- instrux + 2331,
+ instrux + 2317,
+ instrux + 2318,
};
static const struct itemplate * const itable_vex01310[] = {
- instrux + 2508,
- instrux + 2509,
- instrux + 2510,
+ instrux + 2495,
+ instrux + 2496,
+ instrux + 2497,
};
static const struct itemplate * const itable_vex01311[] = {
- instrux + 2511,
- instrux + 2512,
- instrux + 2513,
+ instrux + 2498,
+ instrux + 2499,
+ instrux + 2500,
};
static const struct itemplate * const itable_vex01312[] = {
- instrux + 2462,
- instrux + 2463,
+ instrux + 2449,
+ instrux + 2450,
};
static const struct itemplate * const itable_vex0132A[] = {
- instrux + 2350,
- instrux + 2351,
- instrux + 2352,
- instrux + 2353,
+ instrux + 2337,
+ instrux + 2338,
+ instrux + 2339,
+ instrux + 2340,
};
static const struct itemplate * const itable_vex0132C[] = {
- instrux + 2368,
- instrux + 2369,
+ instrux + 2355,
+ instrux + 2356,
};
static const struct itemplate * const itable_vex0132D[] = {
- instrux + 2346,
- instrux + 2347,
+ instrux + 2333,
+ instrux + 2334,
};
static const struct itemplate * const itable_vex01351[] = {
- instrux + 2839,
- instrux + 2840,
+ instrux + 2826,
+ instrux + 2827,
};
static const struct itemplate * const itable_vex01358[] = {
- instrux + 1716,
- instrux + 1717,
+ instrux + 1703,
+ instrux + 1704,
};
static const struct itemplate * const itable_vex01359[] = {
- instrux + 2542,
- instrux + 2543,
+ instrux + 2529,
+ instrux + 2530,
};
static const struct itemplate * const itable_vex0135A[] = {
- instrux + 2348,
- instrux + 2349,
+ instrux + 2335,
+ instrux + 2336,
};
static const struct itemplate * const itable_vex0135C[] = {
- instrux + 2852,
- instrux + 2853,
+ instrux + 2839,
+ instrux + 2840,
};
static const struct itemplate * const itable_vex0135D[] = {
- instrux + 2444,
- instrux + 2445,
+ instrux + 2431,
+ instrux + 2432,
};
static const struct itemplate * const itable_vex0135E[] = {
- instrux + 2380,
- instrux + 2381,
+ instrux + 2367,
+ instrux + 2368,
};
static const struct itemplate * const itable_vex0135F[] = {
- instrux + 2432,
- instrux + 2433,
+ instrux + 2419,
+ instrux + 2420,
};
static const struct itemplate * const itable_vex01370[] = {
- instrux + 2732,
+ instrux + 2719,
+ instrux + 3542,
};
static const struct itemplate * const itable_vex0137C[] = {
- instrux + 2396,
- instrux + 2397,
- instrux + 2398,
- instrux + 2399,
+ instrux + 2383,
+ instrux + 2384,
+ instrux + 2385,
+ instrux + 2386,
};
static const struct itemplate * const itable_vex0137D[] = {
- instrux + 2404,
- instrux + 2405,
- instrux + 2406,
- instrux + 2407,
+ instrux + 2391,
+ instrux + 2392,
+ instrux + 2393,
+ instrux + 2394,
};
static const struct itemplate * const itable_vex013C2[] = {
+ instrux + 2127,
+ instrux + 2128,
+ instrux + 2129,
+ instrux + 2130,
+ instrux + 2131,
+ instrux + 2132,
+ instrux + 2133,
+ instrux + 2134,
+ instrux + 2135,
+ instrux + 2136,
+ instrux + 2137,
+ instrux + 2138,
+ instrux + 2139,
instrux + 2140,
instrux + 2141,
instrux + 2142,
@@ -9150,1301 +9650,1589 @@ static const struct itemplate * const itable_vex013C2[] = {
instrux + 2218,
instrux + 2219,
instrux + 2220,
- instrux + 2221,
- instrux + 2222,
- instrux + 2223,
- instrux + 2224,
- instrux + 2225,
- instrux + 2226,
- instrux + 2227,
- instrux + 2228,
- instrux + 2229,
- instrux + 2230,
- instrux + 2231,
- instrux + 2232,
- instrux + 2233,
};
static const struct itemplate * const itable_vex013D0[] = {
- instrux + 1724,
- instrux + 1725,
- instrux + 1726,
- instrux + 1727,
+ instrux + 1711,
+ instrux + 1712,
+ instrux + 1713,
+ instrux + 1714,
};
static const struct itemplate * const itable_vex013E6[] = {
- instrux + 2334,
- instrux + 2335,
- instrux + 2336,
- instrux + 2337,
+ instrux + 2321,
+ instrux + 2322,
+ instrux + 2323,
+ instrux + 2324,
};
static const struct itemplate * const itable_vex013F0[] = {
- instrux + 2411,
- instrux + 2412,
- instrux + 2413,
+ instrux + 2398,
+ instrux + 2399,
+ instrux + 2400,
+};
+
+static const struct itemplate * const itable_vex020F2[] = {
+ instrux + 3719,
+ instrux + 3720,
+};
+
+static const struct itemplate * const itable_vex020F3[] = {
+ instrux + 3723,
+ instrux + 3724,
+ instrux + 3725,
+ instrux + 3726,
+ instrux + 3727,
+ instrux + 3728,
+};
+
+static const struct itemplate * const itable_vex020F5[] = {
+ instrux + 3729,
+ instrux + 3730,
+};
+
+static const struct itemplate * const itable_vex020F7[] = {
+ instrux + 3721,
+ instrux + 3722,
};
static const struct itemplate * const itable_vex02100[] = {
- instrux + 2728,
- instrux + 2729,
+ instrux + 2715,
+ instrux + 2716,
+ instrux + 3538,
+ instrux + 3539,
};
static const struct itemplate * const itable_vex02101[] = {
- instrux + 2635,
- instrux + 2636,
+ instrux + 2622,
+ instrux + 2623,
+ instrux + 3460,
+ instrux + 3461,
};
static const struct itemplate * const itable_vex02102[] = {
- instrux + 2637,
- instrux + 2638,
+ instrux + 2624,
+ instrux + 2625,
+ instrux + 3462,
+ instrux + 3463,
};
static const struct itemplate * const itable_vex02103[] = {
- instrux + 2639,
- instrux + 2640,
+ instrux + 2626,
+ instrux + 2627,
+ instrux + 3464,
+ instrux + 3465,
};
static const struct itemplate * const itable_vex02104[] = {
- instrux + 2670,
- instrux + 2671,
+ instrux + 2657,
+ instrux + 2658,
+ instrux + 3472,
+ instrux + 3473,
};
static const struct itemplate * const itable_vex02105[] = {
- instrux + 2642,
- instrux + 2643,
+ instrux + 2629,
+ instrux + 2630,
+ instrux + 3466,
+ instrux + 3467,
};
static const struct itemplate * const itable_vex02106[] = {
- instrux + 2644,
- instrux + 2645,
+ instrux + 2631,
+ instrux + 2632,
+ instrux + 3468,
+ instrux + 3469,
};
static const struct itemplate * const itable_vex02107[] = {
- instrux + 2646,
- instrux + 2647,
+ instrux + 2633,
+ instrux + 2634,
+ instrux + 3470,
+ instrux + 3471,
};
static const struct itemplate * const itable_vex02108[] = {
- instrux + 2733,
- instrux + 2734,
+ instrux + 2720,
+ instrux + 2721,
+ instrux + 3543,
+ instrux + 3544,
};
static const struct itemplate * const itable_vex02109[] = {
- instrux + 2735,
- instrux + 2736,
+ instrux + 2722,
+ instrux + 2723,
+ instrux + 3545,
+ instrux + 3546,
};
static const struct itemplate * const itable_vex0210A[] = {
- instrux + 2737,
- instrux + 2738,
+ instrux + 2724,
+ instrux + 2725,
+ instrux + 3547,
+ instrux + 3548,
};
static const struct itemplate * const itable_vex0210B[] = {
- instrux + 2712,
- instrux + 2713,
+ instrux + 2699,
+ instrux + 2700,
+ instrux + 3522,
+ instrux + 3523,
};
static const struct itemplate * const itable_vex0210C[] = {
- instrux + 2619,
- instrux + 2620,
+ instrux + 2606,
+ instrux + 2607,
};
static const struct itemplate * const itable_vex0210D[] = {
- instrux + 2615,
- instrux + 2616,
+ instrux + 2602,
+ instrux + 2603,
};
static const struct itemplate * const itable_vex0210E[] = {
- instrux + 2856,
- instrux + 2857,
+ instrux + 2843,
+ instrux + 2844,
};
static const struct itemplate * const itable_vex0210F[] = {
- instrux + 2858,
- instrux + 2859,
+ instrux + 2845,
+ instrux + 2846,
};
static const struct itemplate * const itable_vex02113[] = {
- instrux + 3106,
- instrux + 3107,
+ instrux + 3093,
+ instrux + 3094,
+};
+
+static const struct itemplate * const itable_vex02116[] = {
+ instrux + 3647,
+ instrux + 3648,
};
static const struct itemplate * const itable_vex02117[] = {
- instrux + 2775,
- instrux + 2776,
+ instrux + 2762,
+ instrux + 2763,
};
static const struct itemplate * const itable_vex02118[] = {
- instrux + 1760,
- instrux + 1761,
+ instrux + 1747,
+ instrux + 1748,
+ instrux + 3620,
+ instrux + 3621,
};
static const struct itemplate * const itable_vex02119[] = {
- instrux + 1762,
+ instrux + 1749,
+ instrux + 3622,
};
static const struct itemplate * const itable_vex0211A[] = {
- instrux + 1763,
+ instrux + 1750,
};
static const struct itemplate * const itable_vex0211C[] = {
- instrux + 2554,
+ instrux + 2541,
+ instrux + 3403,
};
static const struct itemplate * const itable_vex0211D[] = {
- instrux + 2555,
+ instrux + 2542,
+ instrux + 3404,
};
static const struct itemplate * const itable_vex0211E[] = {
- instrux + 2556,
+ instrux + 2543,
+ instrux + 3405,
};
static const struct itemplate * const itable_vex02120[] = {
- instrux + 2698,
+ instrux + 2685,
+ instrux + 3502,
};
static const struct itemplate * const itable_vex02121[] = {
- instrux + 2699,
+ instrux + 2686,
+ instrux + 3503,
+ instrux + 3504,
};
static const struct itemplate * const itable_vex02122[] = {
- instrux + 2700,
+ instrux + 2687,
+ instrux + 3505,
+ instrux + 3506,
};
static const struct itemplate * const itable_vex02123[] = {
- instrux + 2701,
+ instrux + 2688,
+ instrux + 3507,
};
static const struct itemplate * const itable_vex02124[] = {
- instrux + 2702,
+ instrux + 2689,
+ instrux + 3508,
+ instrux + 3509,
};
static const struct itemplate * const itable_vex02125[] = {
- instrux + 2703,
+ instrux + 2690,
+ instrux + 3510,
};
static const struct itemplate * const itable_vex02128[] = {
- instrux + 2722,
- instrux + 2723,
+ instrux + 2709,
+ instrux + 2710,
+ instrux + 3520,
+ instrux + 3521,
+};
+
+static const struct itemplate * const itable_vex02129[] = {
+ instrux + 2592,
+ instrux + 2593,
+ instrux + 3450,
+ instrux + 3451,
};
static const struct itemplate * const itable_vex0212A[] = {
- instrux + 2503,
+ instrux + 2490,
+ instrux + 3619,
};
static const struct itemplate * const itable_vex0212B[] = {
- instrux + 2563,
- instrux + 2564,
+ instrux + 2550,
+ instrux + 2551,
+ instrux + 3410,
+ instrux + 3411,
};
static const struct itemplate * const itable_vex0212C[] = {
- instrux + 2416,
- instrux + 2417,
+ instrux + 2403,
+ instrux + 2404,
};
static const struct itemplate * const itable_vex0212D[] = {
- instrux + 2420,
- instrux + 2421,
+ instrux + 2407,
+ instrux + 2408,
};
static const struct itemplate * const itable_vex0212E[] = {
- instrux + 2418,
- instrux + 2419,
+ instrux + 2405,
+ instrux + 2406,
};
static const struct itemplate * const itable_vex0212F[] = {
- instrux + 2422,
- instrux + 2423,
+ instrux + 2409,
+ instrux + 2410,
};
static const struct itemplate * const itable_vex02130[] = {
- instrux + 2704,
+ instrux + 2691,
+ instrux + 3511,
};
static const struct itemplate * const itable_vex02131[] = {
- instrux + 2705,
+ instrux + 2692,
+ instrux + 3512,
+ instrux + 3513,
};
static const struct itemplate * const itable_vex02132[] = {
- instrux + 2706,
+ instrux + 2693,
+ instrux + 3514,
+ instrux + 3515,
};
static const struct itemplate * const itable_vex02133[] = {
- instrux + 2707,
+ instrux + 2694,
+ instrux + 3516,
};
static const struct itemplate * const itable_vex02134[] = {
- instrux + 2708,
+ instrux + 2695,
+ instrux + 3517,
+ instrux + 3518,
};
static const struct itemplate * const itable_vex02135[] = {
- instrux + 2709,
+ instrux + 2696,
+ instrux + 3519,
+};
+
+static const struct itemplate * const itable_vex02136[] = {
+ instrux + 3644,
+ instrux + 3645,
+};
+
+static const struct itemplate * const itable_vex02137[] = {
+ instrux + 2600,
+ instrux + 2601,
+ instrux + 3458,
+ instrux + 3459,
};
static const struct itemplate * const itable_vex02138[] = {
- instrux + 2684,
- instrux + 2685,
+ instrux + 2671,
+ instrux + 2672,
+ instrux + 3488,
+ instrux + 3489,
};
static const struct itemplate * const itable_vex02139[] = {
- instrux + 2688,
- instrux + 2689,
+ instrux + 2675,
+ instrux + 2676,
+ instrux + 3492,
+ instrux + 3493,
};
static const struct itemplate * const itable_vex0213A[] = {
- instrux + 2692,
- instrux + 2693,
+ instrux + 2679,
+ instrux + 2680,
+ instrux + 3496,
+ instrux + 3497,
};
static const struct itemplate * const itable_vex0213B[] = {
- instrux + 2694,
- instrux + 2695,
+ instrux + 2681,
+ instrux + 2682,
+ instrux + 3498,
+ instrux + 3499,
};
static const struct itemplate * const itable_vex0213C[] = {
- instrux + 2672,
- instrux + 2673,
+ instrux + 2659,
+ instrux + 2660,
+ instrux + 3476,
+ instrux + 3477,
};
static const struct itemplate * const itable_vex0213D[] = {
- instrux + 2676,
- instrux + 2677,
+ instrux + 2663,
+ instrux + 2664,
+ instrux + 3480,
+ instrux + 3481,
};
static const struct itemplate * const itable_vex0213E[] = {
- instrux + 2680,
- instrux + 2681,
+ instrux + 2667,
+ instrux + 2668,
+ instrux + 3484,
+ instrux + 3485,
};
static const struct itemplate * const itable_vex0213F[] = {
- instrux + 2682,
- instrux + 2683,
+ instrux + 2669,
+ instrux + 2670,
+ instrux + 3486,
+ instrux + 3487,
};
static const struct itemplate * const itable_vex02140[] = {
- instrux + 2718,
- instrux + 2719,
+ instrux + 2705,
+ instrux + 2706,
+ instrux + 3530,
+ instrux + 3531,
};
static const struct itemplate * const itable_vex02141[] = {
- instrux + 2641,
+ instrux + 2628,
};
-static const struct itemplate * const itable_vex02196[] = {
- instrux + 2927,
- instrux + 2928,
- instrux + 2929,
- instrux + 2930,
- instrux + 2931,
- instrux + 2932,
- instrux + 2933,
- instrux + 2934,
+static const struct itemplate * const itable_vex02145[] = {
+ instrux + 3682,
+ instrux + 3683,
+ instrux + 3684,
+ instrux + 3685,
+ instrux + 3686,
+ instrux + 3687,
+ instrux + 3688,
+ instrux + 3689,
};
-static const struct itemplate * const itable_vex02197[] = {
- instrux + 2975,
- instrux + 2976,
- instrux + 2977,
- instrux + 2978,
- instrux + 2979,
- instrux + 2980,
- instrux + 2981,
- instrux + 2982,
+static const struct itemplate * const itable_vex02146[] = {
+ instrux + 3678,
+ instrux + 3679,
+ instrux + 3680,
+ instrux + 3681,
};
-static const struct itemplate * const itable_vex02198[] = {
- instrux + 2903,
- instrux + 2904,
- instrux + 2905,
- instrux + 2906,
- instrux + 2907,
- instrux + 2908,
- instrux + 2909,
- instrux + 2910,
+static const struct itemplate * const itable_vex02147[] = {
+ instrux + 3670,
+ instrux + 3671,
+ instrux + 3672,
+ instrux + 3673,
+ instrux + 3674,
+ instrux + 3675,
+ instrux + 3676,
+ instrux + 3677,
};
-static const struct itemplate * const itable_vex02199[] = {
- instrux + 3047,
- instrux + 3048,
- instrux + 3049,
- instrux + 3050,
+static const struct itemplate * const itable_vex02158[] = {
+ instrux + 3636,
+ instrux + 3637,
+ instrux + 3638,
+ instrux + 3639,
};
-static const struct itemplate * const itable_vex0219A[] = {
- instrux + 2951,
- instrux + 2952,
- instrux + 2953,
- instrux + 2954,
- instrux + 2955,
- instrux + 2956,
- instrux + 2957,
- instrux + 2958,
+static const struct itemplate * const itable_vex02159[] = {
+ instrux + 3640,
+ instrux + 3641,
+ instrux + 3642,
+ instrux + 3643,
};
-static const struct itemplate * const itable_vex0219B[] = {
- instrux + 3059,
- instrux + 3060,
- instrux + 3061,
- instrux + 3062,
+static const struct itemplate * const itable_vex0215A[] = {
+ instrux + 3623,
};
-static const struct itemplate * const itable_vex0219C[] = {
- instrux + 2999,
- instrux + 3000,
- instrux + 3001,
- instrux + 3002,
- instrux + 3003,
- instrux + 3004,
- instrux + 3005,
- instrux + 3006,
+static const struct itemplate * const itable_vex02178[] = {
+ instrux + 3628,
+ instrux + 3629,
+ instrux + 3630,
+ instrux + 3631,
};
-static const struct itemplate * const itable_vex0219D[] = {
- instrux + 3071,
- instrux + 3072,
- instrux + 3073,
- instrux + 3074,
+static const struct itemplate * const itable_vex02179[] = {
+ instrux + 3632,
+ instrux + 3633,
+ instrux + 3634,
+ instrux + 3635,
};
-static const struct itemplate * const itable_vex0219E[] = {
- instrux + 3023,
- instrux + 3024,
- instrux + 3025,
- instrux + 3026,
- instrux + 3027,
- instrux + 3028,
- instrux + 3029,
- instrux + 3030,
+static const struct itemplate * const itable_vex0218C[] = {
+ instrux + 3654,
+ instrux + 3655,
+ instrux + 3656,
+ instrux + 3657,
+ instrux + 3658,
+ instrux + 3659,
+ instrux + 3660,
+ instrux + 3661,
};
-static const struct itemplate * const itable_vex0219F[] = {
- instrux + 3083,
- instrux + 3084,
- instrux + 3085,
- instrux + 3086,
+static const struct itemplate * const itable_vex0218E[] = {
+ instrux + 3662,
+ instrux + 3663,
+ instrux + 3664,
+ instrux + 3665,
+ instrux + 3666,
+ instrux + 3667,
+ instrux + 3668,
+ instrux + 3669,
};
-static const struct itemplate * const itable_vex021A6[] = {
- instrux + 2935,
- instrux + 2936,
- instrux + 2937,
- instrux + 2938,
- instrux + 2939,
- instrux + 2940,
- instrux + 2941,
- instrux + 2942,
+static const struct itemplate * const itable_vex02190[] = {
+ instrux + 3698,
+ instrux + 3700,
+ instrux + 3702,
+ instrux + 3704,
};
-static const struct itemplate * const itable_vex021A7[] = {
- instrux + 2983,
- instrux + 2984,
- instrux + 2985,
- instrux + 2986,
- instrux + 2987,
- instrux + 2988,
- instrux + 2989,
- instrux + 2990,
+static const struct itemplate * const itable_vex02191[] = {
+ instrux + 3699,
+ instrux + 3701,
+ instrux + 3703,
+ instrux + 3705,
};
-static const struct itemplate * const itable_vex021A8[] = {
- instrux + 2911,
- instrux + 2912,
- instrux + 2913,
+static const struct itemplate * const itable_vex02192[] = {
+ instrux + 3690,
+ instrux + 3692,
+ instrux + 3693,
+ instrux + 3694,
+ instrux + 3696,
+};
+
+static const struct itemplate * const itable_vex02193[] = {
+ instrux + 3691,
+ instrux + 3695,
+ instrux + 3697,
+};
+
+static const struct itemplate * const itable_vex02196[] = {
instrux + 2914,
instrux + 2915,
instrux + 2916,
instrux + 2917,
instrux + 2918,
+ instrux + 2919,
+ instrux + 2920,
+ instrux + 2921,
};
-static const struct itemplate * const itable_vex021A9[] = {
- instrux + 3051,
- instrux + 3052,
- instrux + 3053,
- instrux + 3054,
-};
-
-static const struct itemplate * const itable_vex021AA[] = {
- instrux + 2959,
- instrux + 2960,
- instrux + 2961,
+static const struct itemplate * const itable_vex02197[] = {
instrux + 2962,
instrux + 2963,
instrux + 2964,
instrux + 2965,
instrux + 2966,
+ instrux + 2967,
+ instrux + 2968,
+ instrux + 2969,
};
-static const struct itemplate * const itable_vex021AB[] = {
- instrux + 3063,
- instrux + 3064,
- instrux + 3065,
- instrux + 3066,
+static const struct itemplate * const itable_vex02198[] = {
+ instrux + 2890,
+ instrux + 2891,
+ instrux + 2892,
+ instrux + 2893,
+ instrux + 2894,
+ instrux + 2895,
+ instrux + 2896,
+ instrux + 2897,
};
-static const struct itemplate * const itable_vex021AC[] = {
- instrux + 3007,
- instrux + 3008,
- instrux + 3009,
+static const struct itemplate * const itable_vex02199[] = {
+ instrux + 3034,
+ instrux + 3035,
+ instrux + 3036,
+ instrux + 3037,
+};
+
+static const struct itemplate * const itable_vex0219A[] = {
+ instrux + 2938,
+ instrux + 2939,
+ instrux + 2940,
+ instrux + 2941,
+ instrux + 2942,
+ instrux + 2943,
+ instrux + 2944,
+ instrux + 2945,
+};
+
+static const struct itemplate * const itable_vex0219B[] = {
+ instrux + 3046,
+ instrux + 3047,
+ instrux + 3048,
+ instrux + 3049,
+};
+
+static const struct itemplate * const itable_vex0219C[] = {
+ instrux + 2986,
+ instrux + 2987,
+ instrux + 2988,
+ instrux + 2989,
+ instrux + 2990,
+ instrux + 2991,
+ instrux + 2992,
+ instrux + 2993,
+};
+
+static const struct itemplate * const itable_vex0219D[] = {
+ instrux + 3058,
+ instrux + 3059,
+ instrux + 3060,
+ instrux + 3061,
+};
+
+static const struct itemplate * const itable_vex0219E[] = {
instrux + 3010,
instrux + 3011,
instrux + 3012,
instrux + 3013,
instrux + 3014,
+ instrux + 3015,
+ instrux + 3016,
+ instrux + 3017,
};
-static const struct itemplate * const itable_vex021AD[] = {
- instrux + 3075,
- instrux + 3076,
- instrux + 3077,
- instrux + 3078,
+static const struct itemplate * const itable_vex0219F[] = {
+ instrux + 3070,
+ instrux + 3071,
+ instrux + 3072,
+ instrux + 3073,
};
-static const struct itemplate * const itable_vex021AE[] = {
- instrux + 3031,
- instrux + 3032,
- instrux + 3033,
- instrux + 3034,
- instrux + 3035,
- instrux + 3036,
- instrux + 3037,
- instrux + 3038,
+static const struct itemplate * const itable_vex021A6[] = {
+ instrux + 2922,
+ instrux + 2923,
+ instrux + 2924,
+ instrux + 2925,
+ instrux + 2926,
+ instrux + 2927,
+ instrux + 2928,
+ instrux + 2929,
};
-static const struct itemplate * const itable_vex021AF[] = {
- instrux + 3087,
- instrux + 3088,
- instrux + 3089,
- instrux + 3090,
+static const struct itemplate * const itable_vex021A7[] = {
+ instrux + 2970,
+ instrux + 2971,
+ instrux + 2972,
+ instrux + 2973,
+ instrux + 2974,
+ instrux + 2975,
+ instrux + 2976,
+ instrux + 2977,
};
-static const struct itemplate * const itable_vex021B6[] = {
- instrux + 2943,
- instrux + 2944,
- instrux + 2945,
+static const struct itemplate * const itable_vex021A8[] = {
+ instrux + 2898,
+ instrux + 2899,
+ instrux + 2900,
+ instrux + 2901,
+ instrux + 2902,
+ instrux + 2903,
+ instrux + 2904,
+ instrux + 2905,
+};
+
+static const struct itemplate * const itable_vex021A9[] = {
+ instrux + 3038,
+ instrux + 3039,
+ instrux + 3040,
+ instrux + 3041,
+};
+
+static const struct itemplate * const itable_vex021AA[] = {
instrux + 2946,
instrux + 2947,
instrux + 2948,
instrux + 2949,
instrux + 2950,
+ instrux + 2951,
+ instrux + 2952,
+ instrux + 2953,
};
-static const struct itemplate * const itable_vex021B7[] = {
- instrux + 2991,
- instrux + 2992,
- instrux + 2993,
+static const struct itemplate * const itable_vex021AB[] = {
+ instrux + 3050,
+ instrux + 3051,
+ instrux + 3052,
+ instrux + 3053,
+};
+
+static const struct itemplate * const itable_vex021AC[] = {
instrux + 2994,
instrux + 2995,
instrux + 2996,
instrux + 2997,
instrux + 2998,
+ instrux + 2999,
+ instrux + 3000,
+ instrux + 3001,
+};
+
+static const struct itemplate * const itable_vex021AD[] = {
+ instrux + 3062,
+ instrux + 3063,
+ instrux + 3064,
+ instrux + 3065,
+};
+
+static const struct itemplate * const itable_vex021AE[] = {
+ instrux + 3018,
+ instrux + 3019,
+ instrux + 3020,
+ instrux + 3021,
+ instrux + 3022,
+ instrux + 3023,
+ instrux + 3024,
+ instrux + 3025,
+};
+
+static const struct itemplate * const itable_vex021AF[] = {
+ instrux + 3074,
+ instrux + 3075,
+ instrux + 3076,
+ instrux + 3077,
+};
+
+static const struct itemplate * const itable_vex021B6[] = {
+ instrux + 2930,
+ instrux + 2931,
+ instrux + 2932,
+ instrux + 2933,
+ instrux + 2934,
+ instrux + 2935,
+ instrux + 2936,
+ instrux + 2937,
+};
+
+static const struct itemplate * const itable_vex021B7[] = {
+ instrux + 2978,
+ instrux + 2979,
+ instrux + 2980,
+ instrux + 2981,
+ instrux + 2982,
+ instrux + 2983,
+ instrux + 2984,
+ instrux + 2985,
};
static const struct itemplate * const itable_vex021B8[] = {
- instrux + 2919,
- instrux + 2920,
- instrux + 2921,
- instrux + 2922,
- instrux + 2923,
- instrux + 2924,
- instrux + 2925,
- instrux + 2926,
+ instrux + 2906,
+ instrux + 2907,
+ instrux + 2908,
+ instrux + 2909,
+ instrux + 2910,
+ instrux + 2911,
+ instrux + 2912,
+ instrux + 2913,
};
static const struct itemplate * const itable_vex021B9[] = {
- instrux + 3055,
- instrux + 3056,
- instrux + 3057,
- instrux + 3058,
+ instrux + 3042,
+ instrux + 3043,
+ instrux + 3044,
+ instrux + 3045,
};
static const struct itemplate * const itable_vex021BA[] = {
- instrux + 2967,
- instrux + 2968,
- instrux + 2969,
- instrux + 2970,
- instrux + 2971,
- instrux + 2972,
- instrux + 2973,
- instrux + 2974,
+ instrux + 2954,
+ instrux + 2955,
+ instrux + 2956,
+ instrux + 2957,
+ instrux + 2958,
+ instrux + 2959,
+ instrux + 2960,
+ instrux + 2961,
};
static const struct itemplate * const itable_vex021BB[] = {
- instrux + 3067,
- instrux + 3068,
- instrux + 3069,
- instrux + 3070,
+ instrux + 3054,
+ instrux + 3055,
+ instrux + 3056,
+ instrux + 3057,
};
static const struct itemplate * const itable_vex021BC[] = {
- instrux + 3015,
- instrux + 3016,
- instrux + 3017,
- instrux + 3018,
- instrux + 3019,
- instrux + 3020,
- instrux + 3021,
- instrux + 3022,
+ instrux + 3002,
+ instrux + 3003,
+ instrux + 3004,
+ instrux + 3005,
+ instrux + 3006,
+ instrux + 3007,
+ instrux + 3008,
+ instrux + 3009,
};
static const struct itemplate * const itable_vex021BD[] = {
- instrux + 3079,
- instrux + 3080,
- instrux + 3081,
- instrux + 3082,
+ instrux + 3066,
+ instrux + 3067,
+ instrux + 3068,
+ instrux + 3069,
};
static const struct itemplate * const itable_vex021BE[] = {
- instrux + 3039,
- instrux + 3040,
- instrux + 3041,
- instrux + 3042,
- instrux + 3043,
- instrux + 3044,
- instrux + 3045,
- instrux + 3046,
+ instrux + 3026,
+ instrux + 3027,
+ instrux + 3028,
+ instrux + 3029,
+ instrux + 3030,
+ instrux + 3031,
+ instrux + 3032,
+ instrux + 3033,
};
static const struct itemplate * const itable_vex021BF[] = {
- instrux + 3091,
- instrux + 3092,
- instrux + 3093,
- instrux + 3094,
+ instrux + 3078,
+ instrux + 3079,
+ instrux + 3080,
+ instrux + 3081,
};
static const struct itemplate * const itable_vex021DB[] = {
- instrux + 1706,
+ instrux + 1693,
};
static const struct itemplate * const itable_vex021DC[] = {
- instrux + 1698,
- instrux + 1699,
+ instrux + 1685,
+ instrux + 1686,
};
static const struct itemplate * const itable_vex021DD[] = {
- instrux + 1700,
- instrux + 1701,
+ instrux + 1687,
+ instrux + 1688,
};
static const struct itemplate * const itable_vex021DE[] = {
- instrux + 1702,
- instrux + 1703,
+ instrux + 1689,
+ instrux + 1690,
};
static const struct itemplate * const itable_vex021DF[] = {
- instrux + 1704,
- instrux + 1705,
+ instrux + 1691,
+ instrux + 1692,
+};
+
+static const struct itemplate * const itable_vex021F7[] = {
+ instrux + 3741,
+ instrux + 3742,
+};
+
+static const struct itemplate * const itable_vex022F5[] = {
+ instrux + 3735,
+ instrux + 3736,
+};
+
+static const struct itemplate * const itable_vex022F7[] = {
+ instrux + 3739,
+ instrux + 3740,
+};
+
+static const struct itemplate * const itable_vex023F5[] = {
+ instrux + 3733,
+ instrux + 3734,
+};
+
+static const struct itemplate * const itable_vex023F6[] = {
+ instrux + 3731,
+ instrux + 3732,
+};
+
+static const struct itemplate * const itable_vex023F7[] = {
+ instrux + 3743,
+ instrux + 3744,
+};
+
+static const struct itemplate * const itable_vex03100[] = {
+ instrux + 3649,
+};
+
+static const struct itemplate * const itable_vex03101[] = {
+ instrux + 3646,
+};
+
+static const struct itemplate * const itable_vex03102[] = {
+ instrux + 3624,
+ instrux + 3625,
+ instrux + 3626,
+ instrux + 3627,
};
static const struct itemplate * const itable_vex03104[] = {
- instrux + 2621,
- instrux + 2622,
+ instrux + 2608,
+ instrux + 2609,
};
static const struct itemplate * const itable_vex03105[] = {
- instrux + 2617,
- instrux + 2618,
+ instrux + 2604,
+ instrux + 2605,
};
static const struct itemplate * const itable_vex03106[] = {
- instrux + 2623,
+ instrux + 2610,
};
static const struct itemplate * const itable_vex03108[] = {
- instrux + 2821,
- instrux + 2822,
+ instrux + 2808,
+ instrux + 2809,
};
static const struct itemplate * const itable_vex03109[] = {
- instrux + 2819,
- instrux + 2820,
+ instrux + 2806,
+ instrux + 2807,
};
static const struct itemplate * const itable_vex0310A[] = {
- instrux + 2825,
- instrux + 2826,
+ instrux + 2812,
+ instrux + 2813,
};
static const struct itemplate * const itable_vex0310B[] = {
- instrux + 2823,
- instrux + 2824,
+ instrux + 2810,
+ instrux + 2811,
};
static const struct itemplate * const itable_vex0310C[] = {
- instrux + 1748,
- instrux + 1749,
- instrux + 1750,
- instrux + 1751,
+ instrux + 1735,
+ instrux + 1736,
+ instrux + 1737,
+ instrux + 1738,
};
static const struct itemplate * const itable_vex0310D[] = {
- instrux + 1744,
- instrux + 1745,
- instrux + 1746,
- instrux + 1747,
+ instrux + 1731,
+ instrux + 1732,
+ instrux + 1733,
+ instrux + 1734,
};
static const struct itemplate * const itable_vex0310E[] = {
- instrux + 2593,
- instrux + 2594,
+ instrux + 2580,
+ instrux + 2581,
+ instrux + 3442,
+ instrux + 3443,
};
static const struct itemplate * const itable_vex0310F[] = {
- instrux + 2581,
- instrux + 2582,
+ instrux + 2568,
+ instrux + 2569,
+ instrux + 3430,
+ instrux + 3431,
};
static const struct itemplate * const itable_vex03114[] = {
- instrux + 2624,
- instrux + 2625,
- instrux + 2626,
+ instrux + 2611,
+ instrux + 2612,
+ instrux + 2613,
};
static const struct itemplate * const itable_vex03115[] = {
- instrux + 2629,
- instrux + 2630,
- instrux + 2631,
+ instrux + 2616,
+ instrux + 2617,
+ instrux + 2618,
};
static const struct itemplate * const itable_vex03116[] = {
- instrux + 2632,
- instrux + 2633,
- instrux + 2634,
+ instrux + 2619,
+ instrux + 2620,
+ instrux + 2621,
};
static const struct itemplate * const itable_vex03117[] = {
- instrux + 2391,
+ instrux + 2378,
};
static const struct itemplate * const itable_vex03118[] = {
- instrux + 2408,
+ instrux + 2395,
};
static const struct itemplate * const itable_vex03119[] = {
- instrux + 2390,
+ instrux + 2377,
};
static const struct itemplate * const itable_vex0311D[] = {
- instrux + 3108,
- instrux + 3109,
+ instrux + 3095,
+ instrux + 3096,
};
static const struct itemplate * const itable_vex03120[] = {
+ instrux + 2635,
+ instrux + 2636,
+ instrux + 2637,
+ instrux + 2638,
+ instrux + 2639,
+ instrux + 2640,
+};
+
+static const struct itemplate * const itable_vex03121[] = {
+ instrux + 2396,
+ instrux + 2397,
+};
+
+static const struct itemplate * const itable_vex03122[] = {
+ instrux + 2647,
instrux + 2648,
instrux + 2649,
instrux + 2650,
instrux + 2651,
instrux + 2652,
instrux + 2653,
+ instrux + 2654,
};
-static const struct itemplate * const itable_vex03121[] = {
- instrux + 2409,
- instrux + 2410,
+static const struct itemplate * const itable_vex03138[] = {
+ instrux + 3652,
+ instrux + 3653,
};
-static const struct itemplate * const itable_vex03122[] = {
- instrux + 2660,
- instrux + 2661,
- instrux + 2662,
- instrux + 2663,
- instrux + 2664,
- instrux + 2665,
- instrux + 2666,
- instrux + 2667,
+static const struct itemplate * const itable_vex03139[] = {
+ instrux + 3651,
};
static const struct itemplate * const itable_vex03140[] = {
- instrux + 2386,
- instrux + 2387,
- instrux + 2388,
- instrux + 2389,
+ instrux + 2373,
+ instrux + 2374,
+ instrux + 2375,
+ instrux + 2376,
};
static const struct itemplate * const itable_vex03141[] = {
- instrux + 2384,
- instrux + 2385,
+ instrux + 2371,
+ instrux + 2372,
};
static const struct itemplate * const itable_vex03142[] = {
- instrux + 2532,
- instrux + 2533,
+ instrux + 2519,
+ instrux + 2520,
+ instrux + 3401,
+ instrux + 3402,
};
static const struct itemplate * const itable_vex03144[] = {
- instrux + 2893,
- instrux + 2894,
- instrux + 2895,
- instrux + 2896,
- instrux + 2897,
- instrux + 2898,
- instrux + 2899,
- instrux + 2900,
- instrux + 2901,
- instrux + 2902,
+ instrux + 2880,
+ instrux + 2881,
+ instrux + 2882,
+ instrux + 2883,
+ instrux + 2884,
+ instrux + 2885,
+ instrux + 2886,
+ instrux + 2887,
+ instrux + 2888,
+ instrux + 2889,
+};
+
+static const struct itemplate * const itable_vex03146[] = {
+ instrux + 3650,
};
static const struct itemplate * const itable_vex0314A[] = {
- instrux + 1756,
- instrux + 1757,
- instrux + 1758,
- instrux + 1759,
+ instrux + 1743,
+ instrux + 1744,
+ instrux + 1745,
+ instrux + 1746,
};
static const struct itemplate * const itable_vex0314B[] = {
- instrux + 1752,
- instrux + 1753,
- instrux + 1754,
- instrux + 1755,
+ instrux + 1739,
+ instrux + 1740,
+ instrux + 1741,
+ instrux + 1742,
};
static const struct itemplate * const itable_vex0314C[] = {
- instrux + 2591,
- instrux + 2592,
+ instrux + 2578,
+ instrux + 2579,
+ instrux + 3440,
+ instrux + 3441,
};
static const struct itemplate * const itable_vex0315C[] = {
+ instrux + 3155,
+ instrux + 3156,
+ instrux + 3157,
+ instrux + 3158,
instrux + 3159,
instrux + 3160,
instrux + 3161,
instrux + 3162,
- instrux + 3163,
- instrux + 3164,
- instrux + 3165,
- instrux + 3166,
};
static const struct itemplate * const itable_vex0315D[] = {
+ instrux + 3147,
+ instrux + 3148,
+ instrux + 3149,
+ instrux + 3150,
instrux + 3151,
instrux + 3152,
instrux + 3153,
instrux + 3154,
- instrux + 3155,
- instrux + 3156,
- instrux + 3157,
- instrux + 3158,
};
static const struct itemplate * const itable_vex0315E[] = {
+ instrux + 3171,
+ instrux + 3172,
+ instrux + 3173,
+ instrux + 3174,
instrux + 3175,
instrux + 3176,
instrux + 3177,
instrux + 3178,
- instrux + 3179,
- instrux + 3180,
- instrux + 3181,
- instrux + 3182,
};
static const struct itemplate * const itable_vex0315F[] = {
+ instrux + 3163,
+ instrux + 3164,
+ instrux + 3165,
+ instrux + 3166,
instrux + 3167,
instrux + 3168,
instrux + 3169,
instrux + 3170,
- instrux + 3171,
- instrux + 3172,
- instrux + 3173,
- instrux + 3174,
};
static const struct itemplate * const itable_vex03160[] = {
- instrux + 2596,
+ instrux + 2583,
};
static const struct itemplate * const itable_vex03161[] = {
- instrux + 2595,
+ instrux + 2582,
};
static const struct itemplate * const itable_vex03162[] = {
- instrux + 2598,
+ instrux + 2585,
};
static const struct itemplate * const itable_vex03163[] = {
- instrux + 2597,
+ instrux + 2584,
};
static const struct itemplate * const itable_vex03168[] = {
+ instrux + 3131,
+ instrux + 3132,
+ instrux + 3133,
+ instrux + 3134,
instrux + 3135,
instrux + 3136,
instrux + 3137,
instrux + 3138,
- instrux + 3139,
- instrux + 3140,
- instrux + 3141,
- instrux + 3142,
};
static const struct itemplate * const itable_vex03169[] = {
+ instrux + 3123,
+ instrux + 3124,
+ instrux + 3125,
+ instrux + 3126,
instrux + 3127,
instrux + 3128,
instrux + 3129,
instrux + 3130,
- instrux + 3131,
- instrux + 3132,
- instrux + 3133,
- instrux + 3134,
};
static const struct itemplate * const itable_vex0316A[] = {
- instrux + 3147,
- instrux + 3148,
- instrux + 3149,
- instrux + 3150,
-};
-
-static const struct itemplate * const itable_vex0316B[] = {
instrux + 3143,
instrux + 3144,
instrux + 3145,
instrux + 3146,
};
+static const struct itemplate * const itable_vex0316B[] = {
+ instrux + 3139,
+ instrux + 3140,
+ instrux + 3141,
+ instrux + 3142,
+};
+
static const struct itemplate * const itable_vex0316C[] = {
+ instrux + 3187,
+ instrux + 3188,
+ instrux + 3189,
+ instrux + 3190,
instrux + 3191,
instrux + 3192,
instrux + 3193,
instrux + 3194,
- instrux + 3195,
- instrux + 3196,
- instrux + 3197,
- instrux + 3198,
};
static const struct itemplate * const itable_vex0316D[] = {
+ instrux + 3179,
+ instrux + 3180,
+ instrux + 3181,
+ instrux + 3182,
instrux + 3183,
instrux + 3184,
instrux + 3185,
instrux + 3186,
- instrux + 3187,
- instrux + 3188,
- instrux + 3189,
- instrux + 3190,
};
static const struct itemplate * const itable_vex0316E[] = {
- instrux + 3203,
- instrux + 3204,
- instrux + 3205,
- instrux + 3206,
-};
-
-static const struct itemplate * const itable_vex0316F[] = {
instrux + 3199,
instrux + 3200,
instrux + 3201,
instrux + 3202,
};
+static const struct itemplate * const itable_vex0316F[] = {
+ instrux + 3195,
+ instrux + 3196,
+ instrux + 3197,
+ instrux + 3198,
+};
+
static const struct itemplate * const itable_vex03178[] = {
+ instrux + 3211,
+ instrux + 3212,
+ instrux + 3213,
+ instrux + 3214,
instrux + 3215,
instrux + 3216,
instrux + 3217,
instrux + 3218,
- instrux + 3219,
- instrux + 3220,
- instrux + 3221,
- instrux + 3222,
};
static const struct itemplate * const itable_vex03179[] = {
+ instrux + 3203,
+ instrux + 3204,
+ instrux + 3205,
+ instrux + 3206,
instrux + 3207,
instrux + 3208,
instrux + 3209,
instrux + 3210,
- instrux + 3211,
- instrux + 3212,
- instrux + 3213,
- instrux + 3214,
};
static const struct itemplate * const itable_vex0317A[] = {
- instrux + 3227,
- instrux + 3228,
- instrux + 3229,
- instrux + 3230,
-};
-
-static const struct itemplate * const itable_vex0317B[] = {
instrux + 3223,
instrux + 3224,
instrux + 3225,
instrux + 3226,
};
+static const struct itemplate * const itable_vex0317B[] = {
+ instrux + 3219,
+ instrux + 3220,
+ instrux + 3221,
+ instrux + 3222,
+};
+
static const struct itemplate * const itable_vex0317C[] = {
+ instrux + 3235,
+ instrux + 3236,
+ instrux + 3237,
+ instrux + 3238,
instrux + 3239,
instrux + 3240,
instrux + 3241,
instrux + 3242,
- instrux + 3243,
- instrux + 3244,
- instrux + 3245,
- instrux + 3246,
};
static const struct itemplate * const itable_vex0317D[] = {
+ instrux + 3227,
+ instrux + 3228,
+ instrux + 3229,
+ instrux + 3230,
instrux + 3231,
instrux + 3232,
instrux + 3233,
instrux + 3234,
- instrux + 3235,
- instrux + 3236,
- instrux + 3237,
- instrux + 3238,
};
static const struct itemplate * const itable_vex0317E[] = {
- instrux + 3251,
- instrux + 3252,
- instrux + 3253,
- instrux + 3254,
-};
-
-static const struct itemplate * const itable_vex0317F[] = {
instrux + 3247,
instrux + 3248,
instrux + 3249,
instrux + 3250,
};
+static const struct itemplate * const itable_vex0317F[] = {
+ instrux + 3243,
+ instrux + 3244,
+ instrux + 3245,
+ instrux + 3246,
+};
+
static const struct itemplate * const itable_vex031DF[] = {
- instrux + 1707,
+ instrux + 1694,
+};
+
+static const struct itemplate * const itable_vex033F0[] = {
+ instrux + 3737,
+ instrux + 3738,
};
static const struct itemplate * const itable_xop08085[] = {
- instrux + 3335,
- instrux + 3336,
+ instrux + 3331,
+ instrux + 3332,
};
static const struct itemplate * const itable_xop08086[] = {
- instrux + 3333,
- instrux + 3334,
+ instrux + 3329,
+ instrux + 3330,
};
static const struct itemplate * const itable_xop08087[] = {
- instrux + 3331,
- instrux + 3332,
+ instrux + 3327,
+ instrux + 3328,
};
static const struct itemplate * const itable_xop0808E[] = {
- instrux + 3327,
- instrux + 3328,
+ instrux + 3323,
+ instrux + 3324,
};
static const struct itemplate * const itable_xop0808F[] = {
- instrux + 3329,
- instrux + 3330,
+ instrux + 3325,
+ instrux + 3326,
};
static const struct itemplate * const itable_xop08095[] = {
- instrux + 3339,
- instrux + 3340,
+ instrux + 3335,
+ instrux + 3336,
};
static const struct itemplate * const itable_xop08096[] = {
- instrux + 3337,
- instrux + 3338,
+ instrux + 3333,
+ instrux + 3334,
};
static const struct itemplate * const itable_xop08097[] = {
- instrux + 3325,
- instrux + 3326,
+ instrux + 3321,
+ instrux + 3322,
};
static const struct itemplate * const itable_xop0809E[] = {
- instrux + 3321,
- instrux + 3322,
+ instrux + 3317,
+ instrux + 3318,
};
static const struct itemplate * const itable_xop0809F[] = {
- instrux + 3323,
- instrux + 3324,
+ instrux + 3319,
+ instrux + 3320,
};
static const struct itemplate * const itable_xop080A2[] = {
+ instrux + 3263,
+ instrux + 3264,
+ instrux + 3265,
+ instrux + 3266,
instrux + 3267,
instrux + 3268,
instrux + 3269,
instrux + 3270,
- instrux + 3271,
- instrux + 3272,
- instrux + 3273,
- instrux + 3274,
};
static const struct itemplate * const itable_xop080A3[] = {
- instrux + 3345,
- instrux + 3346,
- instrux + 3347,
- instrux + 3348,
+ instrux + 3341,
+ instrux + 3342,
+ instrux + 3343,
+ instrux + 3344,
};
static const struct itemplate * const itable_xop080A6[] = {
- instrux + 3341,
- instrux + 3342,
+ instrux + 3337,
+ instrux + 3338,
};
static const struct itemplate * const itable_xop080B6[] = {
- instrux + 3343,
- instrux + 3344,
+ instrux + 3339,
+ instrux + 3340,
};
static const struct itemplate * const itable_xop080C0[] = {
- instrux + 3353,
- instrux + 3354,
+ instrux + 3349,
+ instrux + 3350,
};
static const struct itemplate * const itable_xop080C1[] = {
- instrux + 3371,
- instrux + 3372,
+ instrux + 3367,
+ instrux + 3368,
};
static const struct itemplate * const itable_xop080C2[] = {
- instrux + 3359,
- instrux + 3360,
+ instrux + 3355,
+ instrux + 3356,
};
static const struct itemplate * const itable_xop080C3[] = {
- instrux + 3365,
- instrux + 3366,
+ instrux + 3361,
+ instrux + 3362,
};
static const struct itemplate * const itable_xop080CC[] = {
- instrux + 3275,
- instrux + 3276,
+ instrux + 3271,
+ instrux + 3272,
};
static const struct itemplate * const itable_xop080CD[] = {
- instrux + 3289,
- instrux + 3290,
+ instrux + 3285,
+ instrux + 3286,
};
static const struct itemplate * const itable_xop080CE[] = {
- instrux + 3277,
- instrux + 3278,
+ instrux + 3273,
+ instrux + 3274,
};
static const struct itemplate * const itable_xop080CF[] = {
- instrux + 3279,
- instrux + 3280,
+ instrux + 3275,
+ instrux + 3276,
};
static const struct itemplate * const itable_xop080EC[] = {
- instrux + 3281,
- instrux + 3282,
+ instrux + 3277,
+ instrux + 3278,
};
static const struct itemplate * const itable_xop080ED[] = {
- instrux + 3287,
- instrux + 3288,
+ instrux + 3283,
+ instrux + 3284,
};
static const struct itemplate * const itable_xop080EE[] = {
- instrux + 3283,
- instrux + 3284,
+ instrux + 3279,
+ instrux + 3280,
};
static const struct itemplate * const itable_xop080EF[] = {
- instrux + 3285,
- instrux + 3286,
+ instrux + 3281,
+ instrux + 3282,
};
static const struct itemplate * const itable_xop09012[] = {
- instrux + 3119,
- instrux + 3120,
- instrux + 3121,
- instrux + 3122,
+ instrux + 3115,
+ instrux + 3116,
+ instrux + 3117,
+ instrux + 3118,
};
static const struct itemplate * const itable_xop09080[] = {
- instrux + 3259,
- instrux + 3260,
- instrux + 3261,
- instrux + 3262,
-};
-
-static const struct itemplate * const itable_xop09081[] = {
instrux + 3255,
instrux + 3256,
instrux + 3257,
instrux + 3258,
};
+static const struct itemplate * const itable_xop09081[] = {
+ instrux + 3251,
+ instrux + 3252,
+ instrux + 3253,
+ instrux + 3254,
+};
+
static const struct itemplate * const itable_xop09082[] = {
- instrux + 3265,
- instrux + 3266,
+ instrux + 3261,
+ instrux + 3262,
};
static const struct itemplate * const itable_xop09083[] = {
- instrux + 3263,
- instrux + 3264,
+ instrux + 3259,
+ instrux + 3260,
};
static const struct itemplate * const itable_xop09090[] = {
- instrux + 3349,
- instrux + 3350,
- instrux + 3351,
- instrux + 3352,
+ instrux + 3345,
+ instrux + 3346,
+ instrux + 3347,
+ instrux + 3348,
};
static const struct itemplate * const itable_xop09091[] = {
- instrux + 3367,
- instrux + 3368,
- instrux + 3369,
- instrux + 3370,
+ instrux + 3363,
+ instrux + 3364,
+ instrux + 3365,
+ instrux + 3366,
};
static const struct itemplate * const itable_xop09092[] = {
- instrux + 3355,
- instrux + 3356,
- instrux + 3357,
- instrux + 3358,
+ instrux + 3351,
+ instrux + 3352,
+ instrux + 3353,
+ instrux + 3354,
};
static const struct itemplate * const itable_xop09093[] = {
- instrux + 3361,
- instrux + 3362,
- instrux + 3363,
- instrux + 3364,
+ instrux + 3357,
+ instrux + 3358,
+ instrux + 3359,
+ instrux + 3360,
};
static const struct itemplate * const itable_xop09094[] = {
- instrux + 3389,
- instrux + 3390,
- instrux + 3391,
- instrux + 3392,
+ instrux + 3385,
+ instrux + 3386,
+ instrux + 3387,
+ instrux + 3388,
};
static const struct itemplate * const itable_xop09095[] = {
- instrux + 3401,
- instrux + 3402,
- instrux + 3403,
- instrux + 3404,
+ instrux + 3397,
+ instrux + 3398,
+ instrux + 3399,
+ instrux + 3400,
};
static const struct itemplate * const itable_xop09096[] = {
+ instrux + 3389,
+ instrux + 3390,
+ instrux + 3391,
+ instrux + 3392,
+};
+
+static const struct itemplate * const itable_xop09097[] = {
instrux + 3393,
instrux + 3394,
instrux + 3395,
instrux + 3396,
};
-static const struct itemplate * const itable_xop09097[] = {
- instrux + 3397,
- instrux + 3398,
- instrux + 3399,
- instrux + 3400,
+static const struct itemplate * const itable_xop09098[] = {
+ instrux + 3369,
+ instrux + 3370,
+ instrux + 3371,
+ instrux + 3372,
};
-static const struct itemplate * const itable_xop09098[] = {
+static const struct itemplate * const itable_xop09099[] = {
+ instrux + 3381,
+ instrux + 3382,
+ instrux + 3383,
+ instrux + 3384,
+};
+
+static const struct itemplate * const itable_xop0909A[] = {
instrux + 3373,
instrux + 3374,
instrux + 3375,
instrux + 3376,
};
-static const struct itemplate * const itable_xop09099[] = {
- instrux + 3385,
- instrux + 3386,
- instrux + 3387,
- instrux + 3388,
-};
-
-static const struct itemplate * const itable_xop0909A[] = {
+static const struct itemplate * const itable_xop0909B[] = {
instrux + 3377,
instrux + 3378,
instrux + 3379,
instrux + 3380,
};
-static const struct itemplate * const itable_xop0909B[] = {
- instrux + 3381,
- instrux + 3382,
- instrux + 3383,
- instrux + 3384,
-};
-
static const struct itemplate * const itable_xop090C1[] = {
- instrux + 3295,
- instrux + 3296,
+ instrux + 3291,
+ instrux + 3292,
};
static const struct itemplate * const itable_xop090C2[] = {
- instrux + 3291,
- instrux + 3292,
+ instrux + 3287,
+ instrux + 3288,
};
static const struct itemplate * const itable_xop090C3[] = {
- instrux + 3293,
- instrux + 3294,
+ instrux + 3289,
+ instrux + 3290,
};
static const struct itemplate * const itable_xop090C6[] = {
- instrux + 3311,
- instrux + 3312,
+ instrux + 3307,
+ instrux + 3308,
};
static const struct itemplate * const itable_xop090C7[] = {
- instrux + 3313,
- instrux + 3314,
+ instrux + 3309,
+ instrux + 3310,
};
static const struct itemplate * const itable_xop090CB[] = {
- instrux + 3297,
- instrux + 3298,
+ instrux + 3293,
+ instrux + 3294,
};
static const struct itemplate * const itable_xop090D1[] = {
- instrux + 3303,
- instrux + 3304,
+ instrux + 3299,
+ instrux + 3300,
};
static const struct itemplate * const itable_xop090D2[] = {
- instrux + 3299,
- instrux + 3300,
+ instrux + 3295,
+ instrux + 3296,
};
static const struct itemplate * const itable_xop090D3[] = {
- instrux + 3301,
- instrux + 3302,
+ instrux + 3297,
+ instrux + 3298,
};
static const struct itemplate * const itable_xop090D6[] = {
- instrux + 3307,
- instrux + 3308,
+ instrux + 3303,
+ instrux + 3304,
};
static const struct itemplate * const itable_xop090D7[] = {
- instrux + 3309,
- instrux + 3310,
+ instrux + 3305,
+ instrux + 3306,
};
static const struct itemplate * const itable_xop090DB[] = {
- instrux + 3305,
- instrux + 3306,
+ instrux + 3301,
+ instrux + 3302,
};
static const struct itemplate * const itable_xop090E1[] = {
- instrux + 3315,
- instrux + 3316,
+ instrux + 3311,
+ instrux + 3312,
};
static const struct itemplate * const itable_xop090E2[] = {
- instrux + 3319,
- instrux + 3320,
+ instrux + 3315,
+ instrux + 3316,
};
static const struct itemplate * const itable_xop090E3[] = {
- instrux + 3317,
- instrux + 3318,
+ instrux + 3313,
+ instrux + 3314,
};
static const struct itemplate * const itable_xop0A012[] = {
- instrux + 3123,
- instrux + 3124,
- instrux + 3125,
- instrux + 3126,
+ instrux + 3119,
+ instrux + 3120,
+ instrux + 3121,
+ instrux + 3122,
};
static const struct disasm_index itable_vex010[256] = {
@@ -10748,7 +11536,7 @@ static const struct disasm_index itable_vex011[256] = {
/* 0x26 */ { NULL, 0 },
/* 0x27 */ { NULL, 0 },
/* 0x28 */ { itable_vex01128, 2 },
- /* 0x29 */ { itable_vex01129, 4 },
+ /* 0x29 */ { itable_vex01129, 2 },
/* 0x2a */ { NULL, 0 },
/* 0x2b */ { itable_vex0112B, 2 },
/* 0x2c */ { NULL, 0 },
@@ -10762,7 +11550,7 @@ static const struct disasm_index itable_vex011[256] = {
/* 0x34 */ { NULL, 0 },
/* 0x35 */ { NULL, 0 },
/* 0x36 */ { NULL, 0 },
- /* 0x37 */ { itable_vex01137, 2 },
+ /* 0x37 */ { NULL, 0 },
/* 0x38 */ { NULL, 0 },
/* 0x39 */ { NULL, 0 },
/* 0x3a */ { NULL, 0 },
@@ -10803,29 +11591,29 @@ static const struct disasm_index itable_vex011[256] = {
/* 0x5d */ { itable_vex0115D, 4 },
/* 0x5e */ { itable_vex0115E, 4 },
/* 0x5f */ { itable_vex0115F, 4 },
- /* 0x60 */ { itable_vex01160, 2 },
- /* 0x61 */ { itable_vex01161, 2 },
- /* 0x62 */ { itable_vex01162, 2 },
- /* 0x63 */ { itable_vex01163, 2 },
- /* 0x64 */ { itable_vex01164, 2 },
- /* 0x65 */ { itable_vex01165, 2 },
- /* 0x66 */ { itable_vex01166, 2 },
- /* 0x67 */ { itable_vex01167, 2 },
- /* 0x68 */ { itable_vex01168, 2 },
- /* 0x69 */ { itable_vex01169, 2 },
- /* 0x6a */ { itable_vex0116A, 2 },
- /* 0x6b */ { itable_vex0116B, 2 },
- /* 0x6c */ { itable_vex0116C, 2 },
- /* 0x6d */ { itable_vex0116D, 2 },
+ /* 0x60 */ { itable_vex01160, 4 },
+ /* 0x61 */ { itable_vex01161, 4 },
+ /* 0x62 */ { itable_vex01162, 4 },
+ /* 0x63 */ { itable_vex01163, 4 },
+ /* 0x64 */ { itable_vex01164, 4 },
+ /* 0x65 */ { itable_vex01165, 4 },
+ /* 0x66 */ { itable_vex01166, 4 },
+ /* 0x67 */ { itable_vex01167, 4 },
+ /* 0x68 */ { itable_vex01168, 4 },
+ /* 0x69 */ { itable_vex01169, 4 },
+ /* 0x6a */ { itable_vex0116A, 4 },
+ /* 0x6b */ { itable_vex0116B, 4 },
+ /* 0x6c */ { itable_vex0116C, 4 },
+ /* 0x6d */ { itable_vex0116D, 4 },
/* 0x6e */ { itable_vex0116E, 2 },
/* 0x6f */ { itable_vex0116F, 3 },
- /* 0x70 */ { itable_vex01170, 1 },
- /* 0x71 */ { itable_vex01171, 6 },
- /* 0x72 */ { itable_vex01172, 6 },
- /* 0x73 */ { itable_vex01173, 8 },
- /* 0x74 */ { itable_vex01174, 2 },
- /* 0x75 */ { itable_vex01175, 2 },
- /* 0x76 */ { itable_vex01176, 2 },
+ /* 0x70 */ { itable_vex01170, 2 },
+ /* 0x71 */ { itable_vex01171, 12 },
+ /* 0x72 */ { itable_vex01172, 12 },
+ /* 0x73 */ { itable_vex01173, 16 },
+ /* 0x74 */ { itable_vex01174, 4 },
+ /* 0x75 */ { itable_vex01175, 4 },
+ /* 0x76 */ { itable_vex01176, 4 },
/* 0x77 */ { NULL, 0 },
/* 0x78 */ { NULL, 0 },
/* 0x79 */ { NULL, 0 },
@@ -10916,52 +11704,52 @@ static const struct disasm_index itable_vex011[256] = {
/* 0xce */ { NULL, 0 },
/* 0xcf */ { NULL, 0 },
/* 0xd0 */ { itable_vex011D0, 4 },
- /* 0xd1 */ { itable_vex011D1, 2 },
- /* 0xd2 */ { itable_vex011D2, 2 },
- /* 0xd3 */ { itable_vex011D3, 2 },
- /* 0xd4 */ { itable_vex011D4, 2 },
- /* 0xd5 */ { itable_vex011D5, 2 },
+ /* 0xd1 */ { itable_vex011D1, 4 },
+ /* 0xd2 */ { itable_vex011D2, 4 },
+ /* 0xd3 */ { itable_vex011D3, 4 },
+ /* 0xd4 */ { itable_vex011D4, 4 },
+ /* 0xd5 */ { itable_vex011D5, 4 },
/* 0xd6 */ { itable_vex011D6, 1 },
- /* 0xd7 */ { itable_vex011D7, 2 },
- /* 0xd8 */ { itable_vex011D8, 2 },
- /* 0xd9 */ { itable_vex011D9, 2 },
- /* 0xda */ { itable_vex011DA, 2 },
- /* 0xdb */ { itable_vex011DB, 2 },
- /* 0xdc */ { itable_vex011DC, 2 },
- /* 0xdd */ { itable_vex011DD, 2 },
- /* 0xde */ { itable_vex011DE, 2 },
- /* 0xdf */ { itable_vex011DF, 2 },
- /* 0xe0 */ { itable_vex011E0, 2 },
- /* 0xe1 */ { itable_vex011E1, 2 },
- /* 0xe2 */ { itable_vex011E2, 2 },
- /* 0xe3 */ { itable_vex011E3, 2 },
- /* 0xe4 */ { itable_vex011E4, 2 },
- /* 0xe5 */ { itable_vex011E5, 2 },
+ /* 0xd7 */ { itable_vex011D7, 4 },
+ /* 0xd8 */ { itable_vex011D8, 4 },
+ /* 0xd9 */ { itable_vex011D9, 4 },
+ /* 0xda */ { itable_vex011DA, 4 },
+ /* 0xdb */ { itable_vex011DB, 4 },
+ /* 0xdc */ { itable_vex011DC, 4 },
+ /* 0xdd */ { itable_vex011DD, 4 },
+ /* 0xde */ { itable_vex011DE, 4 },
+ /* 0xdf */ { itable_vex011DF, 4 },
+ /* 0xe0 */ { itable_vex011E0, 4 },
+ /* 0xe1 */ { itable_vex011E1, 4 },
+ /* 0xe2 */ { itable_vex011E2, 4 },
+ /* 0xe3 */ { itable_vex011E3, 4 },
+ /* 0xe4 */ { itable_vex011E4, 4 },
+ /* 0xe5 */ { itable_vex011E5, 4 },
/* 0xe6 */ { itable_vex011E6, 4 },
/* 0xe7 */ { itable_vex011E7, 3 },
- /* 0xe8 */ { itable_vex011E8, 2 },
- /* 0xe9 */ { itable_vex011E9, 2 },
- /* 0xea */ { itable_vex011EA, 2 },
- /* 0xeb */ { itable_vex011EB, 2 },
- /* 0xec */ { itable_vex011EC, 2 },
- /* 0xed */ { itable_vex011ED, 2 },
- /* 0xee */ { itable_vex011EE, 2 },
- /* 0xef */ { itable_vex011EF, 2 },
+ /* 0xe8 */ { itable_vex011E8, 4 },
+ /* 0xe9 */ { itable_vex011E9, 4 },
+ /* 0xea */ { itable_vex011EA, 4 },
+ /* 0xeb */ { itable_vex011EB, 4 },
+ /* 0xec */ { itable_vex011EC, 4 },
+ /* 0xed */ { itable_vex011ED, 4 },
+ /* 0xee */ { itable_vex011EE, 4 },
+ /* 0xef */ { itable_vex011EF, 4 },
/* 0xf0 */ { NULL, 0 },
- /* 0xf1 */ { itable_vex011F1, 2 },
- /* 0xf2 */ { itable_vex011F2, 2 },
- /* 0xf3 */ { itable_vex011F3, 2 },
- /* 0xf4 */ { itable_vex011F4, 2 },
- /* 0xf5 */ { itable_vex011F5, 2 },
- /* 0xf6 */ { itable_vex011F6, 2 },
+ /* 0xf1 */ { itable_vex011F1, 4 },
+ /* 0xf2 */ { itable_vex011F2, 4 },
+ /* 0xf3 */ { itable_vex011F3, 4 },
+ /* 0xf4 */ { itable_vex011F4, 4 },
+ /* 0xf5 */ { itable_vex011F5, 4 },
+ /* 0xf6 */ { itable_vex011F6, 4 },
/* 0xf7 */ { itable_vex011F7, 1 },
- /* 0xf8 */ { itable_vex011F8, 2 },
- /* 0xf9 */ { itable_vex011F9, 2 },
- /* 0xfa */ { itable_vex011FA, 2 },
- /* 0xfb */ { itable_vex011FB, 2 },
- /* 0xfc */ { itable_vex011FC, 2 },
- /* 0xfd */ { itable_vex011FD, 2 },
- /* 0xfe */ { itable_vex011FE, 2 },
+ /* 0xf8 */ { itable_vex011F8, 4 },
+ /* 0xf9 */ { itable_vex011F9, 4 },
+ /* 0xfa */ { itable_vex011FA, 4 },
+ /* 0xfb */ { itable_vex011FB, 4 },
+ /* 0xfc */ { itable_vex011FC, 4 },
+ /* 0xfd */ { itable_vex011FD, 4 },
+ /* 0xfe */ { itable_vex011FE, 4 },
/* 0xff */ { NULL, 0 },
};
@@ -11078,7 +11866,7 @@ static const struct disasm_index itable_vex012[256] = {
/* 0x6d */ { NULL, 0 },
/* 0x6e */ { NULL, 0 },
/* 0x6f */ { itable_vex0126F, 3 },
- /* 0x70 */ { itable_vex01270, 1 },
+ /* 0x70 */ { itable_vex01270, 2 },
/* 0x71 */ { NULL, 0 },
/* 0x72 */ { NULL, 0 },
/* 0x73 */ { NULL, 0 },
@@ -11337,7 +12125,7 @@ static const struct disasm_index itable_vex013[256] = {
/* 0x6d */ { NULL, 0 },
/* 0x6e */ { NULL, 0 },
/* 0x6f */ { NULL, 0 },
- /* 0x70 */ { itable_vex01370, 1 },
+ /* 0x70 */ { itable_vex01370, 2 },
/* 0x71 */ { NULL, 0 },
/* 0x72 */ { NULL, 0 },
/* 0x73 */ { NULL, 0 },
@@ -11483,73 +12271,73 @@ static const struct disasm_index itable_vex013[256] = {
/* 0xff */ { NULL, 0 },
};
-static const struct disasm_index itable_vex021[256] = {
- /* 0x00 */ { itable_vex02100, 2 },
- /* 0x01 */ { itable_vex02101, 2 },
- /* 0x02 */ { itable_vex02102, 2 },
- /* 0x03 */ { itable_vex02103, 2 },
- /* 0x04 */ { itable_vex02104, 2 },
- /* 0x05 */ { itable_vex02105, 2 },
- /* 0x06 */ { itable_vex02106, 2 },
- /* 0x07 */ { itable_vex02107, 2 },
- /* 0x08 */ { itable_vex02108, 2 },
- /* 0x09 */ { itable_vex02109, 2 },
- /* 0x0a */ { itable_vex0210A, 2 },
- /* 0x0b */ { itable_vex0210B, 2 },
- /* 0x0c */ { itable_vex0210C, 2 },
- /* 0x0d */ { itable_vex0210D, 2 },
- /* 0x0e */ { itable_vex0210E, 2 },
- /* 0x0f */ { itable_vex0210F, 2 },
+static const struct disasm_index itable_vex020[256] = {
+ /* 0x00 */ { NULL, 0 },
+ /* 0x01 */ { NULL, 0 },
+ /* 0x02 */ { NULL, 0 },
+ /* 0x03 */ { NULL, 0 },
+ /* 0x04 */ { NULL, 0 },
+ /* 0x05 */ { NULL, 0 },
+ /* 0x06 */ { NULL, 0 },
+ /* 0x07 */ { NULL, 0 },
+ /* 0x08 */ { NULL, 0 },
+ /* 0x09 */ { NULL, 0 },
+ /* 0x0a */ { NULL, 0 },
+ /* 0x0b */ { NULL, 0 },
+ /* 0x0c */ { NULL, 0 },
+ /* 0x0d */ { NULL, 0 },
+ /* 0x0e */ { NULL, 0 },
+ /* 0x0f */ { NULL, 0 },
/* 0x10 */ { NULL, 0 },
/* 0x11 */ { NULL, 0 },
/* 0x12 */ { NULL, 0 },
- /* 0x13 */ { itable_vex02113, 2 },
+ /* 0x13 */ { NULL, 0 },
/* 0x14 */ { NULL, 0 },
/* 0x15 */ { NULL, 0 },
/* 0x16 */ { NULL, 0 },
- /* 0x17 */ { itable_vex02117, 2 },
- /* 0x18 */ { itable_vex02118, 2 },
- /* 0x19 */ { itable_vex02119, 1 },
- /* 0x1a */ { itable_vex0211A, 1 },
+ /* 0x17 */ { NULL, 0 },
+ /* 0x18 */ { NULL, 0 },
+ /* 0x19 */ { NULL, 0 },
+ /* 0x1a */ { NULL, 0 },
/* 0x1b */ { NULL, 0 },
- /* 0x1c */ { itable_vex0211C, 1 },
- /* 0x1d */ { itable_vex0211D, 1 },
- /* 0x1e */ { itable_vex0211E, 1 },
+ /* 0x1c */ { NULL, 0 },
+ /* 0x1d */ { NULL, 0 },
+ /* 0x1e */ { NULL, 0 },
/* 0x1f */ { NULL, 0 },
- /* 0x20 */ { itable_vex02120, 1 },
- /* 0x21 */ { itable_vex02121, 1 },
- /* 0x22 */ { itable_vex02122, 1 },
- /* 0x23 */ { itable_vex02123, 1 },
- /* 0x24 */ { itable_vex02124, 1 },
- /* 0x25 */ { itable_vex02125, 1 },
+ /* 0x20 */ { NULL, 0 },
+ /* 0x21 */ { NULL, 0 },
+ /* 0x22 */ { NULL, 0 },
+ /* 0x23 */ { NULL, 0 },
+ /* 0x24 */ { NULL, 0 },
+ /* 0x25 */ { NULL, 0 },
/* 0x26 */ { NULL, 0 },
/* 0x27 */ { NULL, 0 },
- /* 0x28 */ { itable_vex02128, 2 },
+ /* 0x28 */ { NULL, 0 },
/* 0x29 */ { NULL, 0 },
- /* 0x2a */ { itable_vex0212A, 1 },
- /* 0x2b */ { itable_vex0212B, 2 },
- /* 0x2c */ { itable_vex0212C, 2 },
- /* 0x2d */ { itable_vex0212D, 2 },
- /* 0x2e */ { itable_vex0212E, 2 },
- /* 0x2f */ { itable_vex0212F, 2 },
- /* 0x30 */ { itable_vex02130, 1 },
- /* 0x31 */ { itable_vex02131, 1 },
- /* 0x32 */ { itable_vex02132, 1 },
- /* 0x33 */ { itable_vex02133, 1 },
- /* 0x34 */ { itable_vex02134, 1 },
- /* 0x35 */ { itable_vex02135, 1 },
+ /* 0x2a */ { NULL, 0 },
+ /* 0x2b */ { NULL, 0 },
+ /* 0x2c */ { NULL, 0 },
+ /* 0x2d */ { NULL, 0 },
+ /* 0x2e */ { NULL, 0 },
+ /* 0x2f */ { NULL, 0 },
+ /* 0x30 */ { NULL, 0 },
+ /* 0x31 */ { NULL, 0 },
+ /* 0x32 */ { NULL, 0 },
+ /* 0x33 */ { NULL, 0 },
+ /* 0x34 */ { NULL, 0 },
+ /* 0x35 */ { NULL, 0 },
/* 0x36 */ { NULL, 0 },
/* 0x37 */ { NULL, 0 },
- /* 0x38 */ { itable_vex02138, 2 },
- /* 0x39 */ { itable_vex02139, 2 },
- /* 0x3a */ { itable_vex0213A, 2 },
- /* 0x3b */ { itable_vex0213B, 2 },
- /* 0x3c */ { itable_vex0213C, 2 },
- /* 0x3d */ { itable_vex0213D, 2 },
- /* 0x3e */ { itable_vex0213E, 2 },
- /* 0x3f */ { itable_vex0213F, 2 },
- /* 0x40 */ { itable_vex02140, 2 },
- /* 0x41 */ { itable_vex02141, 1 },
+ /* 0x38 */ { NULL, 0 },
+ /* 0x39 */ { NULL, 0 },
+ /* 0x3a */ { NULL, 0 },
+ /* 0x3b */ { NULL, 0 },
+ /* 0x3c */ { NULL, 0 },
+ /* 0x3d */ { NULL, 0 },
+ /* 0x3e */ { NULL, 0 },
+ /* 0x3f */ { NULL, 0 },
+ /* 0x40 */ { NULL, 0 },
+ /* 0x41 */ { NULL, 0 },
/* 0x42 */ { NULL, 0 },
/* 0x43 */ { NULL, 0 },
/* 0x44 */ { NULL, 0 },
@@ -11634,6 +12422,265 @@ static const struct disasm_index itable_vex021[256] = {
/* 0x93 */ { NULL, 0 },
/* 0x94 */ { NULL, 0 },
/* 0x95 */ { NULL, 0 },
+ /* 0x96 */ { NULL, 0 },
+ /* 0x97 */ { NULL, 0 },
+ /* 0x98 */ { NULL, 0 },
+ /* 0x99 */ { NULL, 0 },
+ /* 0x9a */ { NULL, 0 },
+ /* 0x9b */ { NULL, 0 },
+ /* 0x9c */ { NULL, 0 },
+ /* 0x9d */ { NULL, 0 },
+ /* 0x9e */ { NULL, 0 },
+ /* 0x9f */ { NULL, 0 },
+ /* 0xa0 */ { NULL, 0 },
+ /* 0xa1 */ { NULL, 0 },
+ /* 0xa2 */ { NULL, 0 },
+ /* 0xa3 */ { NULL, 0 },
+ /* 0xa4 */ { NULL, 0 },
+ /* 0xa5 */ { NULL, 0 },
+ /* 0xa6 */ { NULL, 0 },
+ /* 0xa7 */ { NULL, 0 },
+ /* 0xa8 */ { NULL, 0 },
+ /* 0xa9 */ { NULL, 0 },
+ /* 0xaa */ { NULL, 0 },
+ /* 0xab */ { NULL, 0 },
+ /* 0xac */ { NULL, 0 },
+ /* 0xad */ { NULL, 0 },
+ /* 0xae */ { NULL, 0 },
+ /* 0xaf */ { NULL, 0 },
+ /* 0xb0 */ { NULL, 0 },
+ /* 0xb1 */ { NULL, 0 },
+ /* 0xb2 */ { NULL, 0 },
+ /* 0xb3 */ { NULL, 0 },
+ /* 0xb4 */ { NULL, 0 },
+ /* 0xb5 */ { NULL, 0 },
+ /* 0xb6 */ { NULL, 0 },
+ /* 0xb7 */ { NULL, 0 },
+ /* 0xb8 */ { NULL, 0 },
+ /* 0xb9 */ { NULL, 0 },
+ /* 0xba */ { NULL, 0 },
+ /* 0xbb */ { NULL, 0 },
+ /* 0xbc */ { NULL, 0 },
+ /* 0xbd */ { NULL, 0 },
+ /* 0xbe */ { NULL, 0 },
+ /* 0xbf */ { NULL, 0 },
+ /* 0xc0 */ { NULL, 0 },
+ /* 0xc1 */ { NULL, 0 },
+ /* 0xc2 */ { NULL, 0 },
+ /* 0xc3 */ { NULL, 0 },
+ /* 0xc4 */ { NULL, 0 },
+ /* 0xc5 */ { NULL, 0 },
+ /* 0xc6 */ { NULL, 0 },
+ /* 0xc7 */ { NULL, 0 },
+ /* 0xc8 */ { NULL, 0 },
+ /* 0xc9 */ { NULL, 0 },
+ /* 0xca */ { NULL, 0 },
+ /* 0xcb */ { NULL, 0 },
+ /* 0xcc */ { NULL, 0 },
+ /* 0xcd */ { NULL, 0 },
+ /* 0xce */ { NULL, 0 },
+ /* 0xcf */ { NULL, 0 },
+ /* 0xd0 */ { NULL, 0 },
+ /* 0xd1 */ { NULL, 0 },
+ /* 0xd2 */ { NULL, 0 },
+ /* 0xd3 */ { NULL, 0 },
+ /* 0xd4 */ { NULL, 0 },
+ /* 0xd5 */ { NULL, 0 },
+ /* 0xd6 */ { NULL, 0 },
+ /* 0xd7 */ { NULL, 0 },
+ /* 0xd8 */ { NULL, 0 },
+ /* 0xd9 */ { NULL, 0 },
+ /* 0xda */ { NULL, 0 },
+ /* 0xdb */ { NULL, 0 },
+ /* 0xdc */ { NULL, 0 },
+ /* 0xdd */ { NULL, 0 },
+ /* 0xde */ { NULL, 0 },
+ /* 0xdf */ { NULL, 0 },
+ /* 0xe0 */ { NULL, 0 },
+ /* 0xe1 */ { NULL, 0 },
+ /* 0xe2 */ { NULL, 0 },
+ /* 0xe3 */ { NULL, 0 },
+ /* 0xe4 */ { NULL, 0 },
+ /* 0xe5 */ { NULL, 0 },
+ /* 0xe6 */ { NULL, 0 },
+ /* 0xe7 */ { NULL, 0 },
+ /* 0xe8 */ { NULL, 0 },
+ /* 0xe9 */ { NULL, 0 },
+ /* 0xea */ { NULL, 0 },
+ /* 0xeb */ { NULL, 0 },
+ /* 0xec */ { NULL, 0 },
+ /* 0xed */ { NULL, 0 },
+ /* 0xee */ { NULL, 0 },
+ /* 0xef */ { NULL, 0 },
+ /* 0xf0 */ { NULL, 0 },
+ /* 0xf1 */ { NULL, 0 },
+ /* 0xf2 */ { itable_vex020F2, 2 },
+ /* 0xf3 */ { itable_vex020F3, 6 },
+ /* 0xf4 */ { NULL, 0 },
+ /* 0xf5 */ { itable_vex020F5, 2 },
+ /* 0xf6 */ { NULL, 0 },
+ /* 0xf7 */ { itable_vex020F7, 2 },
+ /* 0xf8 */ { NULL, 0 },
+ /* 0xf9 */ { NULL, 0 },
+ /* 0xfa */ { NULL, 0 },
+ /* 0xfb */ { NULL, 0 },
+ /* 0xfc */ { NULL, 0 },
+ /* 0xfd */ { NULL, 0 },
+ /* 0xfe */ { NULL, 0 },
+ /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_vex021[256] = {
+ /* 0x00 */ { itable_vex02100, 4 },
+ /* 0x01 */ { itable_vex02101, 4 },
+ /* 0x02 */ { itable_vex02102, 4 },
+ /* 0x03 */ { itable_vex02103, 4 },
+ /* 0x04 */ { itable_vex02104, 4 },
+ /* 0x05 */ { itable_vex02105, 4 },
+ /* 0x06 */ { itable_vex02106, 4 },
+ /* 0x07 */ { itable_vex02107, 4 },
+ /* 0x08 */ { itable_vex02108, 4 },
+ /* 0x09 */ { itable_vex02109, 4 },
+ /* 0x0a */ { itable_vex0210A, 4 },
+ /* 0x0b */ { itable_vex0210B, 4 },
+ /* 0x0c */ { itable_vex0210C, 2 },
+ /* 0x0d */ { itable_vex0210D, 2 },
+ /* 0x0e */ { itable_vex0210E, 2 },
+ /* 0x0f */ { itable_vex0210F, 2 },
+ /* 0x10 */ { NULL, 0 },
+ /* 0x11 */ { NULL, 0 },
+ /* 0x12 */ { NULL, 0 },
+ /* 0x13 */ { itable_vex02113, 2 },
+ /* 0x14 */ { NULL, 0 },
+ /* 0x15 */ { NULL, 0 },
+ /* 0x16 */ { itable_vex02116, 2 },
+ /* 0x17 */ { itable_vex02117, 2 },
+ /* 0x18 */ { itable_vex02118, 4 },
+ /* 0x19 */ { itable_vex02119, 2 },
+ /* 0x1a */ { itable_vex0211A, 1 },
+ /* 0x1b */ { NULL, 0 },
+ /* 0x1c */ { itable_vex0211C, 2 },
+ /* 0x1d */ { itable_vex0211D, 2 },
+ /* 0x1e */ { itable_vex0211E, 2 },
+ /* 0x1f */ { NULL, 0 },
+ /* 0x20 */ { itable_vex02120, 2 },
+ /* 0x21 */ { itable_vex02121, 3 },
+ /* 0x22 */ { itable_vex02122, 3 },
+ /* 0x23 */ { itable_vex02123, 2 },
+ /* 0x24 */ { itable_vex02124, 3 },
+ /* 0x25 */ { itable_vex02125, 2 },
+ /* 0x26 */ { NULL, 0 },
+ /* 0x27 */ { NULL, 0 },
+ /* 0x28 */ { itable_vex02128, 4 },
+ /* 0x29 */ { itable_vex02129, 4 },
+ /* 0x2a */ { itable_vex0212A, 2 },
+ /* 0x2b */ { itable_vex0212B, 4 },
+ /* 0x2c */ { itable_vex0212C, 2 },
+ /* 0x2d */ { itable_vex0212D, 2 },
+ /* 0x2e */ { itable_vex0212E, 2 },
+ /* 0x2f */ { itable_vex0212F, 2 },
+ /* 0x30 */ { itable_vex02130, 2 },
+ /* 0x31 */ { itable_vex02131, 3 },
+ /* 0x32 */ { itable_vex02132, 3 },
+ /* 0x33 */ { itable_vex02133, 2 },
+ /* 0x34 */ { itable_vex02134, 3 },
+ /* 0x35 */ { itable_vex02135, 2 },
+ /* 0x36 */ { itable_vex02136, 2 },
+ /* 0x37 */ { itable_vex02137, 4 },
+ /* 0x38 */ { itable_vex02138, 4 },
+ /* 0x39 */ { itable_vex02139, 4 },
+ /* 0x3a */ { itable_vex0213A, 4 },
+ /* 0x3b */ { itable_vex0213B, 4 },
+ /* 0x3c */ { itable_vex0213C, 4 },
+ /* 0x3d */ { itable_vex0213D, 4 },
+ /* 0x3e */ { itable_vex0213E, 4 },
+ /* 0x3f */ { itable_vex0213F, 4 },
+ /* 0x40 */ { itable_vex02140, 4 },
+ /* 0x41 */ { itable_vex02141, 1 },
+ /* 0x42 */ { NULL, 0 },
+ /* 0x43 */ { NULL, 0 },
+ /* 0x44 */ { NULL, 0 },
+ /* 0x45 */ { itable_vex02145, 8 },
+ /* 0x46 */ { itable_vex02146, 4 },
+ /* 0x47 */ { itable_vex02147, 8 },
+ /* 0x48 */ { NULL, 0 },
+ /* 0x49 */ { NULL, 0 },
+ /* 0x4a */ { NULL, 0 },
+ /* 0x4b */ { NULL, 0 },
+ /* 0x4c */ { NULL, 0 },
+ /* 0x4d */ { NULL, 0 },
+ /* 0x4e */ { NULL, 0 },
+ /* 0x4f */ { NULL, 0 },
+ /* 0x50 */ { NULL, 0 },
+ /* 0x51 */ { NULL, 0 },
+ /* 0x52 */ { NULL, 0 },
+ /* 0x53 */ { NULL, 0 },
+ /* 0x54 */ { NULL, 0 },
+ /* 0x55 */ { NULL, 0 },
+ /* 0x56 */ { NULL, 0 },
+ /* 0x57 */ { NULL, 0 },
+ /* 0x58 */ { itable_vex02158, 4 },
+ /* 0x59 */ { itable_vex02159, 4 },
+ /* 0x5a */ { itable_vex0215A, 1 },
+ /* 0x5b */ { NULL, 0 },
+ /* 0x5c */ { NULL, 0 },
+ /* 0x5d */ { NULL, 0 },
+ /* 0x5e */ { NULL, 0 },
+ /* 0x5f */ { NULL, 0 },
+ /* 0x60 */ { NULL, 0 },
+ /* 0x61 */ { NULL, 0 },
+ /* 0x62 */ { NULL, 0 },
+ /* 0x63 */ { NULL, 0 },
+ /* 0x64 */ { NULL, 0 },
+ /* 0x65 */ { NULL, 0 },
+ /* 0x66 */ { NULL, 0 },
+ /* 0x67 */ { NULL, 0 },
+ /* 0x68 */ { NULL, 0 },
+ /* 0x69 */ { NULL, 0 },
+ /* 0x6a */ { NULL, 0 },
+ /* 0x6b */ { NULL, 0 },
+ /* 0x6c */ { NULL, 0 },
+ /* 0x6d */ { NULL, 0 },
+ /* 0x6e */ { NULL, 0 },
+ /* 0x6f */ { NULL, 0 },
+ /* 0x70 */ { NULL, 0 },
+ /* 0x71 */ { NULL, 0 },
+ /* 0x72 */ { NULL, 0 },
+ /* 0x73 */ { NULL, 0 },
+ /* 0x74 */ { NULL, 0 },
+ /* 0x75 */ { NULL, 0 },
+ /* 0x76 */ { NULL, 0 },
+ /* 0x77 */ { NULL, 0 },
+ /* 0x78 */ { itable_vex02178, 4 },
+ /* 0x79 */ { itable_vex02179, 4 },
+ /* 0x7a */ { NULL, 0 },
+ /* 0x7b */ { NULL, 0 },
+ /* 0x7c */ { NULL, 0 },
+ /* 0x7d */ { NULL, 0 },
+ /* 0x7e */ { NULL, 0 },
+ /* 0x7f */ { NULL, 0 },
+ /* 0x80 */ { NULL, 0 },
+ /* 0x81 */ { NULL, 0 },
+ /* 0x82 */ { NULL, 0 },
+ /* 0x83 */ { NULL, 0 },
+ /* 0x84 */ { NULL, 0 },
+ /* 0x85 */ { NULL, 0 },
+ /* 0x86 */ { NULL, 0 },
+ /* 0x87 */ { NULL, 0 },
+ /* 0x88 */ { NULL, 0 },
+ /* 0x89 */ { NULL, 0 },
+ /* 0x8a */ { NULL, 0 },
+ /* 0x8b */ { NULL, 0 },
+ /* 0x8c */ { itable_vex0218C, 8 },
+ /* 0x8d */ { NULL, 0 },
+ /* 0x8e */ { itable_vex0218E, 8 },
+ /* 0x8f */ { NULL, 0 },
+ /* 0x90 */ { itable_vex02190, 4 },
+ /* 0x91 */ { itable_vex02191, 4 },
+ /* 0x92 */ { itable_vex02192, 5 },
+ /* 0x93 */ { itable_vex02193, 3 },
+ /* 0x94 */ { NULL, 0 },
+ /* 0x95 */ { NULL, 0 },
/* 0x96 */ { itable_vex02196, 8 },
/* 0x97 */ { itable_vex02197, 8 },
/* 0x98 */ { itable_vex02198, 8 },
@@ -11731,7 +12778,7 @@ static const struct disasm_index itable_vex021[256] = {
/* 0xf4 */ { NULL, 0 },
/* 0xf5 */ { NULL, 0 },
/* 0xf6 */ { NULL, 0 },
- /* 0xf7 */ { NULL, 0 },
+ /* 0xf7 */ { itable_vex021F7, 2 },
/* 0xf8 */ { NULL, 0 },
/* 0xf9 */ { NULL, 0 },
/* 0xfa */ { NULL, 0 },
@@ -11742,11 +12789,529 @@ static const struct disasm_index itable_vex021[256] = {
/* 0xff */ { NULL, 0 },
};
-static const struct disasm_index itable_vex031[256] = {
+static const struct disasm_index itable_vex022[256] = {
+ /* 0x00 */ { NULL, 0 },
+ /* 0x01 */ { NULL, 0 },
+ /* 0x02 */ { NULL, 0 },
+ /* 0x03 */ { NULL, 0 },
+ /* 0x04 */ { NULL, 0 },
+ /* 0x05 */ { NULL, 0 },
+ /* 0x06 */ { NULL, 0 },
+ /* 0x07 */ { NULL, 0 },
+ /* 0x08 */ { NULL, 0 },
+ /* 0x09 */ { NULL, 0 },
+ /* 0x0a */ { NULL, 0 },
+ /* 0x0b */ { NULL, 0 },
+ /* 0x0c */ { NULL, 0 },
+ /* 0x0d */ { NULL, 0 },
+ /* 0x0e */ { NULL, 0 },
+ /* 0x0f */ { NULL, 0 },
+ /* 0x10 */ { NULL, 0 },
+ /* 0x11 */ { NULL, 0 },
+ /* 0x12 */ { NULL, 0 },
+ /* 0x13 */ { NULL, 0 },
+ /* 0x14 */ { NULL, 0 },
+ /* 0x15 */ { NULL, 0 },
+ /* 0x16 */ { NULL, 0 },
+ /* 0x17 */ { NULL, 0 },
+ /* 0x18 */ { NULL, 0 },
+ /* 0x19 */ { NULL, 0 },
+ /* 0x1a */ { NULL, 0 },
+ /* 0x1b */ { NULL, 0 },
+ /* 0x1c */ { NULL, 0 },
+ /* 0x1d */ { NULL, 0 },
+ /* 0x1e */ { NULL, 0 },
+ /* 0x1f */ { NULL, 0 },
+ /* 0x20 */ { NULL, 0 },
+ /* 0x21 */ { NULL, 0 },
+ /* 0x22 */ { NULL, 0 },
+ /* 0x23 */ { NULL, 0 },
+ /* 0x24 */ { NULL, 0 },
+ /* 0x25 */ { NULL, 0 },
+ /* 0x26 */ { NULL, 0 },
+ /* 0x27 */ { NULL, 0 },
+ /* 0x28 */ { NULL, 0 },
+ /* 0x29 */ { NULL, 0 },
+ /* 0x2a */ { NULL, 0 },
+ /* 0x2b */ { NULL, 0 },
+ /* 0x2c */ { NULL, 0 },
+ /* 0x2d */ { NULL, 0 },
+ /* 0x2e */ { NULL, 0 },
+ /* 0x2f */ { NULL, 0 },
+ /* 0x30 */ { NULL, 0 },
+ /* 0x31 */ { NULL, 0 },
+ /* 0x32 */ { NULL, 0 },
+ /* 0x33 */ { NULL, 0 },
+ /* 0x34 */ { NULL, 0 },
+ /* 0x35 */ { NULL, 0 },
+ /* 0x36 */ { NULL, 0 },
+ /* 0x37 */ { NULL, 0 },
+ /* 0x38 */ { NULL, 0 },
+ /* 0x39 */ { NULL, 0 },
+ /* 0x3a */ { NULL, 0 },
+ /* 0x3b */ { NULL, 0 },
+ /* 0x3c */ { NULL, 0 },
+ /* 0x3d */ { NULL, 0 },
+ /* 0x3e */ { NULL, 0 },
+ /* 0x3f */ { NULL, 0 },
+ /* 0x40 */ { NULL, 0 },
+ /* 0x41 */ { NULL, 0 },
+ /* 0x42 */ { NULL, 0 },
+ /* 0x43 */ { NULL, 0 },
+ /* 0x44 */ { NULL, 0 },
+ /* 0x45 */ { NULL, 0 },
+ /* 0x46 */ { NULL, 0 },
+ /* 0x47 */ { NULL, 0 },
+ /* 0x48 */ { NULL, 0 },
+ /* 0x49 */ { NULL, 0 },
+ /* 0x4a */ { NULL, 0 },
+ /* 0x4b */ { NULL, 0 },
+ /* 0x4c */ { NULL, 0 },
+ /* 0x4d */ { NULL, 0 },
+ /* 0x4e */ { NULL, 0 },
+ /* 0x4f */ { NULL, 0 },
+ /* 0x50 */ { NULL, 0 },
+ /* 0x51 */ { NULL, 0 },
+ /* 0x52 */ { NULL, 0 },
+ /* 0x53 */ { NULL, 0 },
+ /* 0x54 */ { NULL, 0 },
+ /* 0x55 */ { NULL, 0 },
+ /* 0x56 */ { NULL, 0 },
+ /* 0x57 */ { NULL, 0 },
+ /* 0x58 */ { NULL, 0 },
+ /* 0x59 */ { NULL, 0 },
+ /* 0x5a */ { NULL, 0 },
+ /* 0x5b */ { NULL, 0 },
+ /* 0x5c */ { NULL, 0 },
+ /* 0x5d */ { NULL, 0 },
+ /* 0x5e */ { NULL, 0 },
+ /* 0x5f */ { NULL, 0 },
+ /* 0x60 */ { NULL, 0 },
+ /* 0x61 */ { NULL, 0 },
+ /* 0x62 */ { NULL, 0 },
+ /* 0x63 */ { NULL, 0 },
+ /* 0x64 */ { NULL, 0 },
+ /* 0x65 */ { NULL, 0 },
+ /* 0x66 */ { NULL, 0 },
+ /* 0x67 */ { NULL, 0 },
+ /* 0x68 */ { NULL, 0 },
+ /* 0x69 */ { NULL, 0 },
+ /* 0x6a */ { NULL, 0 },
+ /* 0x6b */ { NULL, 0 },
+ /* 0x6c */ { NULL, 0 },
+ /* 0x6d */ { NULL, 0 },
+ /* 0x6e */ { NULL, 0 },
+ /* 0x6f */ { NULL, 0 },
+ /* 0x70 */ { NULL, 0 },
+ /* 0x71 */ { NULL, 0 },
+ /* 0x72 */ { NULL, 0 },
+ /* 0x73 */ { NULL, 0 },
+ /* 0x74 */ { NULL, 0 },
+ /* 0x75 */ { NULL, 0 },
+ /* 0x76 */ { NULL, 0 },
+ /* 0x77 */ { NULL, 0 },
+ /* 0x78 */ { NULL, 0 },
+ /* 0x79 */ { NULL, 0 },
+ /* 0x7a */ { NULL, 0 },
+ /* 0x7b */ { NULL, 0 },
+ /* 0x7c */ { NULL, 0 },
+ /* 0x7d */ { NULL, 0 },
+ /* 0x7e */ { NULL, 0 },
+ /* 0x7f */ { NULL, 0 },
+ /* 0x80 */ { NULL, 0 },
+ /* 0x81 */ { NULL, 0 },
+ /* 0x82 */ { NULL, 0 },
+ /* 0x83 */ { NULL, 0 },
+ /* 0x84 */ { NULL, 0 },
+ /* 0x85 */ { NULL, 0 },
+ /* 0x86 */ { NULL, 0 },
+ /* 0x87 */ { NULL, 0 },
+ /* 0x88 */ { NULL, 0 },
+ /* 0x89 */ { NULL, 0 },
+ /* 0x8a */ { NULL, 0 },
+ /* 0x8b */ { NULL, 0 },
+ /* 0x8c */ { NULL, 0 },
+ /* 0x8d */ { NULL, 0 },
+ /* 0x8e */ { NULL, 0 },
+ /* 0x8f */ { NULL, 0 },
+ /* 0x90 */ { NULL, 0 },
+ /* 0x91 */ { NULL, 0 },
+ /* 0x92 */ { NULL, 0 },
+ /* 0x93 */ { NULL, 0 },
+ /* 0x94 */ { NULL, 0 },
+ /* 0x95 */ { NULL, 0 },
+ /* 0x96 */ { NULL, 0 },
+ /* 0x97 */ { NULL, 0 },
+ /* 0x98 */ { NULL, 0 },
+ /* 0x99 */ { NULL, 0 },
+ /* 0x9a */ { NULL, 0 },
+ /* 0x9b */ { NULL, 0 },
+ /* 0x9c */ { NULL, 0 },
+ /* 0x9d */ { NULL, 0 },
+ /* 0x9e */ { NULL, 0 },
+ /* 0x9f */ { NULL, 0 },
+ /* 0xa0 */ { NULL, 0 },
+ /* 0xa1 */ { NULL, 0 },
+ /* 0xa2 */ { NULL, 0 },
+ /* 0xa3 */ { NULL, 0 },
+ /* 0xa4 */ { NULL, 0 },
+ /* 0xa5 */ { NULL, 0 },
+ /* 0xa6 */ { NULL, 0 },
+ /* 0xa7 */ { NULL, 0 },
+ /* 0xa8 */ { NULL, 0 },
+ /* 0xa9 */ { NULL, 0 },
+ /* 0xaa */ { NULL, 0 },
+ /* 0xab */ { NULL, 0 },
+ /* 0xac */ { NULL, 0 },
+ /* 0xad */ { NULL, 0 },
+ /* 0xae */ { NULL, 0 },
+ /* 0xaf */ { NULL, 0 },
+ /* 0xb0 */ { NULL, 0 },
+ /* 0xb1 */ { NULL, 0 },
+ /* 0xb2 */ { NULL, 0 },
+ /* 0xb3 */ { NULL, 0 },
+ /* 0xb4 */ { NULL, 0 },
+ /* 0xb5 */ { NULL, 0 },
+ /* 0xb6 */ { NULL, 0 },
+ /* 0xb7 */ { NULL, 0 },
+ /* 0xb8 */ { NULL, 0 },
+ /* 0xb9 */ { NULL, 0 },
+ /* 0xba */ { NULL, 0 },
+ /* 0xbb */ { NULL, 0 },
+ /* 0xbc */ { NULL, 0 },
+ /* 0xbd */ { NULL, 0 },
+ /* 0xbe */ { NULL, 0 },
+ /* 0xbf */ { NULL, 0 },
+ /* 0xc0 */ { NULL, 0 },
+ /* 0xc1 */ { NULL, 0 },
+ /* 0xc2 */ { NULL, 0 },
+ /* 0xc3 */ { NULL, 0 },
+ /* 0xc4 */ { NULL, 0 },
+ /* 0xc5 */ { NULL, 0 },
+ /* 0xc6 */ { NULL, 0 },
+ /* 0xc7 */ { NULL, 0 },
+ /* 0xc8 */ { NULL, 0 },
+ /* 0xc9 */ { NULL, 0 },
+ /* 0xca */ { NULL, 0 },
+ /* 0xcb */ { NULL, 0 },
+ /* 0xcc */ { NULL, 0 },
+ /* 0xcd */ { NULL, 0 },
+ /* 0xce */ { NULL, 0 },
+ /* 0xcf */ { NULL, 0 },
+ /* 0xd0 */ { NULL, 0 },
+ /* 0xd1 */ { NULL, 0 },
+ /* 0xd2 */ { NULL, 0 },
+ /* 0xd3 */ { NULL, 0 },
+ /* 0xd4 */ { NULL, 0 },
+ /* 0xd5 */ { NULL, 0 },
+ /* 0xd6 */ { NULL, 0 },
+ /* 0xd7 */ { NULL, 0 },
+ /* 0xd8 */ { NULL, 0 },
+ /* 0xd9 */ { NULL, 0 },
+ /* 0xda */ { NULL, 0 },
+ /* 0xdb */ { NULL, 0 },
+ /* 0xdc */ { NULL, 0 },
+ /* 0xdd */ { NULL, 0 },
+ /* 0xde */ { NULL, 0 },
+ /* 0xdf */ { NULL, 0 },
+ /* 0xe0 */ { NULL, 0 },
+ /* 0xe1 */ { NULL, 0 },
+ /* 0xe2 */ { NULL, 0 },
+ /* 0xe3 */ { NULL, 0 },
+ /* 0xe4 */ { NULL, 0 },
+ /* 0xe5 */ { NULL, 0 },
+ /* 0xe6 */ { NULL, 0 },
+ /* 0xe7 */ { NULL, 0 },
+ /* 0xe8 */ { NULL, 0 },
+ /* 0xe9 */ { NULL, 0 },
+ /* 0xea */ { NULL, 0 },
+ /* 0xeb */ { NULL, 0 },
+ /* 0xec */ { NULL, 0 },
+ /* 0xed */ { NULL, 0 },
+ /* 0xee */ { NULL, 0 },
+ /* 0xef */ { NULL, 0 },
+ /* 0xf0 */ { NULL, 0 },
+ /* 0xf1 */ { NULL, 0 },
+ /* 0xf2 */ { NULL, 0 },
+ /* 0xf3 */ { NULL, 0 },
+ /* 0xf4 */ { NULL, 0 },
+ /* 0xf5 */ { itable_vex022F5, 2 },
+ /* 0xf6 */ { NULL, 0 },
+ /* 0xf7 */ { itable_vex022F7, 2 },
+ /* 0xf8 */ { NULL, 0 },
+ /* 0xf9 */ { NULL, 0 },
+ /* 0xfa */ { NULL, 0 },
+ /* 0xfb */ { NULL, 0 },
+ /* 0xfc */ { NULL, 0 },
+ /* 0xfd */ { NULL, 0 },
+ /* 0xfe */ { NULL, 0 },
+ /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_vex023[256] = {
/* 0x00 */ { NULL, 0 },
/* 0x01 */ { NULL, 0 },
/* 0x02 */ { NULL, 0 },
/* 0x03 */ { NULL, 0 },
+ /* 0x04 */ { NULL, 0 },
+ /* 0x05 */ { NULL, 0 },
+ /* 0x06 */ { NULL, 0 },
+ /* 0x07 */ { NULL, 0 },
+ /* 0x08 */ { NULL, 0 },
+ /* 0x09 */ { NULL, 0 },
+ /* 0x0a */ { NULL, 0 },
+ /* 0x0b */ { NULL, 0 },
+ /* 0x0c */ { NULL, 0 },
+ /* 0x0d */ { NULL, 0 },
+ /* 0x0e */ { NULL, 0 },
+ /* 0x0f */ { NULL, 0 },
+ /* 0x10 */ { NULL, 0 },
+ /* 0x11 */ { NULL, 0 },
+ /* 0x12 */ { NULL, 0 },
+ /* 0x13 */ { NULL, 0 },
+ /* 0x14 */ { NULL, 0 },
+ /* 0x15 */ { NULL, 0 },
+ /* 0x16 */ { NULL, 0 },
+ /* 0x17 */ { NULL, 0 },
+ /* 0x18 */ { NULL, 0 },
+ /* 0x19 */ { NULL, 0 },
+ /* 0x1a */ { NULL, 0 },
+ /* 0x1b */ { NULL, 0 },
+ /* 0x1c */ { NULL, 0 },
+ /* 0x1d */ { NULL, 0 },
+ /* 0x1e */ { NULL, 0 },
+ /* 0x1f */ { NULL, 0 },
+ /* 0x20 */ { NULL, 0 },
+ /* 0x21 */ { NULL, 0 },
+ /* 0x22 */ { NULL, 0 },
+ /* 0x23 */ { NULL, 0 },
+ /* 0x24 */ { NULL, 0 },
+ /* 0x25 */ { NULL, 0 },
+ /* 0x26 */ { NULL, 0 },
+ /* 0x27 */ { NULL, 0 },
+ /* 0x28 */ { NULL, 0 },
+ /* 0x29 */ { NULL, 0 },
+ /* 0x2a */ { NULL, 0 },
+ /* 0x2b */ { NULL, 0 },
+ /* 0x2c */ { NULL, 0 },
+ /* 0x2d */ { NULL, 0 },
+ /* 0x2e */ { NULL, 0 },
+ /* 0x2f */ { NULL, 0 },
+ /* 0x30 */ { NULL, 0 },
+ /* 0x31 */ { NULL, 0 },
+ /* 0x32 */ { NULL, 0 },
+ /* 0x33 */ { NULL, 0 },
+ /* 0x34 */ { NULL, 0 },
+ /* 0x35 */ { NULL, 0 },
+ /* 0x36 */ { NULL, 0 },
+ /* 0x37 */ { NULL, 0 },
+ /* 0x38 */ { NULL, 0 },
+ /* 0x39 */ { NULL, 0 },
+ /* 0x3a */ { NULL, 0 },
+ /* 0x3b */ { NULL, 0 },
+ /* 0x3c */ { NULL, 0 },
+ /* 0x3d */ { NULL, 0 },
+ /* 0x3e */ { NULL, 0 },
+ /* 0x3f */ { NULL, 0 },
+ /* 0x40 */ { NULL, 0 },
+ /* 0x41 */ { NULL, 0 },
+ /* 0x42 */ { NULL, 0 },
+ /* 0x43 */ { NULL, 0 },
+ /* 0x44 */ { NULL, 0 },
+ /* 0x45 */ { NULL, 0 },
+ /* 0x46 */ { NULL, 0 },
+ /* 0x47 */ { NULL, 0 },
+ /* 0x48 */ { NULL, 0 },
+ /* 0x49 */ { NULL, 0 },
+ /* 0x4a */ { NULL, 0 },
+ /* 0x4b */ { NULL, 0 },
+ /* 0x4c */ { NULL, 0 },
+ /* 0x4d */ { NULL, 0 },
+ /* 0x4e */ { NULL, 0 },
+ /* 0x4f */ { NULL, 0 },
+ /* 0x50 */ { NULL, 0 },
+ /* 0x51 */ { NULL, 0 },
+ /* 0x52 */ { NULL, 0 },
+ /* 0x53 */ { NULL, 0 },
+ /* 0x54 */ { NULL, 0 },
+ /* 0x55 */ { NULL, 0 },
+ /* 0x56 */ { NULL, 0 },
+ /* 0x57 */ { NULL, 0 },
+ /* 0x58 */ { NULL, 0 },
+ /* 0x59 */ { NULL, 0 },
+ /* 0x5a */ { NULL, 0 },
+ /* 0x5b */ { NULL, 0 },
+ /* 0x5c */ { NULL, 0 },
+ /* 0x5d */ { NULL, 0 },
+ /* 0x5e */ { NULL, 0 },
+ /* 0x5f */ { NULL, 0 },
+ /* 0x60 */ { NULL, 0 },
+ /* 0x61 */ { NULL, 0 },
+ /* 0x62 */ { NULL, 0 },
+ /* 0x63 */ { NULL, 0 },
+ /* 0x64 */ { NULL, 0 },
+ /* 0x65 */ { NULL, 0 },
+ /* 0x66 */ { NULL, 0 },
+ /* 0x67 */ { NULL, 0 },
+ /* 0x68 */ { NULL, 0 },
+ /* 0x69 */ { NULL, 0 },
+ /* 0x6a */ { NULL, 0 },
+ /* 0x6b */ { NULL, 0 },
+ /* 0x6c */ { NULL, 0 },
+ /* 0x6d */ { NULL, 0 },
+ /* 0x6e */ { NULL, 0 },
+ /* 0x6f */ { NULL, 0 },
+ /* 0x70 */ { NULL, 0 },
+ /* 0x71 */ { NULL, 0 },
+ /* 0x72 */ { NULL, 0 },
+ /* 0x73 */ { NULL, 0 },
+ /* 0x74 */ { NULL, 0 },
+ /* 0x75 */ { NULL, 0 },
+ /* 0x76 */ { NULL, 0 },
+ /* 0x77 */ { NULL, 0 },
+ /* 0x78 */ { NULL, 0 },
+ /* 0x79 */ { NULL, 0 },
+ /* 0x7a */ { NULL, 0 },
+ /* 0x7b */ { NULL, 0 },
+ /* 0x7c */ { NULL, 0 },
+ /* 0x7d */ { NULL, 0 },
+ /* 0x7e */ { NULL, 0 },
+ /* 0x7f */ { NULL, 0 },
+ /* 0x80 */ { NULL, 0 },
+ /* 0x81 */ { NULL, 0 },
+ /* 0x82 */ { NULL, 0 },
+ /* 0x83 */ { NULL, 0 },
+ /* 0x84 */ { NULL, 0 },
+ /* 0x85 */ { NULL, 0 },
+ /* 0x86 */ { NULL, 0 },
+ /* 0x87 */ { NULL, 0 },
+ /* 0x88 */ { NULL, 0 },
+ /* 0x89 */ { NULL, 0 },
+ /* 0x8a */ { NULL, 0 },
+ /* 0x8b */ { NULL, 0 },
+ /* 0x8c */ { NULL, 0 },
+ /* 0x8d */ { NULL, 0 },
+ /* 0x8e */ { NULL, 0 },
+ /* 0x8f */ { NULL, 0 },
+ /* 0x90 */ { NULL, 0 },
+ /* 0x91 */ { NULL, 0 },
+ /* 0x92 */ { NULL, 0 },
+ /* 0x93 */ { NULL, 0 },
+ /* 0x94 */ { NULL, 0 },
+ /* 0x95 */ { NULL, 0 },
+ /* 0x96 */ { NULL, 0 },
+ /* 0x97 */ { NULL, 0 },
+ /* 0x98 */ { NULL, 0 },
+ /* 0x99 */ { NULL, 0 },
+ /* 0x9a */ { NULL, 0 },
+ /* 0x9b */ { NULL, 0 },
+ /* 0x9c */ { NULL, 0 },
+ /* 0x9d */ { NULL, 0 },
+ /* 0x9e */ { NULL, 0 },
+ /* 0x9f */ { NULL, 0 },
+ /* 0xa0 */ { NULL, 0 },
+ /* 0xa1 */ { NULL, 0 },
+ /* 0xa2 */ { NULL, 0 },
+ /* 0xa3 */ { NULL, 0 },
+ /* 0xa4 */ { NULL, 0 },
+ /* 0xa5 */ { NULL, 0 },
+ /* 0xa6 */ { NULL, 0 },
+ /* 0xa7 */ { NULL, 0 },
+ /* 0xa8 */ { NULL, 0 },
+ /* 0xa9 */ { NULL, 0 },
+ /* 0xaa */ { NULL, 0 },
+ /* 0xab */ { NULL, 0 },
+ /* 0xac */ { NULL, 0 },
+ /* 0xad */ { NULL, 0 },
+ /* 0xae */ { NULL, 0 },
+ /* 0xaf */ { NULL, 0 },
+ /* 0xb0 */ { NULL, 0 },
+ /* 0xb1 */ { NULL, 0 },
+ /* 0xb2 */ { NULL, 0 },
+ /* 0xb3 */ { NULL, 0 },
+ /* 0xb4 */ { NULL, 0 },
+ /* 0xb5 */ { NULL, 0 },
+ /* 0xb6 */ { NULL, 0 },
+ /* 0xb7 */ { NULL, 0 },
+ /* 0xb8 */ { NULL, 0 },
+ /* 0xb9 */ { NULL, 0 },
+ /* 0xba */ { NULL, 0 },
+ /* 0xbb */ { NULL, 0 },
+ /* 0xbc */ { NULL, 0 },
+ /* 0xbd */ { NULL, 0 },
+ /* 0xbe */ { NULL, 0 },
+ /* 0xbf */ { NULL, 0 },
+ /* 0xc0 */ { NULL, 0 },
+ /* 0xc1 */ { NULL, 0 },
+ /* 0xc2 */ { NULL, 0 },
+ /* 0xc3 */ { NULL, 0 },
+ /* 0xc4 */ { NULL, 0 },
+ /* 0xc5 */ { NULL, 0 },
+ /* 0xc6 */ { NULL, 0 },
+ /* 0xc7 */ { NULL, 0 },
+ /* 0xc8 */ { NULL, 0 },
+ /* 0xc9 */ { NULL, 0 },
+ /* 0xca */ { NULL, 0 },
+ /* 0xcb */ { NULL, 0 },
+ /* 0xcc */ { NULL, 0 },
+ /* 0xcd */ { NULL, 0 },
+ /* 0xce */ { NULL, 0 },
+ /* 0xcf */ { NULL, 0 },
+ /* 0xd0 */ { NULL, 0 },
+ /* 0xd1 */ { NULL, 0 },
+ /* 0xd2 */ { NULL, 0 },
+ /* 0xd3 */ { NULL, 0 },
+ /* 0xd4 */ { NULL, 0 },
+ /* 0xd5 */ { NULL, 0 },
+ /* 0xd6 */ { NULL, 0 },
+ /* 0xd7 */ { NULL, 0 },
+ /* 0xd8 */ { NULL, 0 },
+ /* 0xd9 */ { NULL, 0 },
+ /* 0xda */ { NULL, 0 },
+ /* 0xdb */ { NULL, 0 },
+ /* 0xdc */ { NULL, 0 },
+ /* 0xdd */ { NULL, 0 },
+ /* 0xde */ { NULL, 0 },
+ /* 0xdf */ { NULL, 0 },
+ /* 0xe0 */ { NULL, 0 },
+ /* 0xe1 */ { NULL, 0 },
+ /* 0xe2 */ { NULL, 0 },
+ /* 0xe3 */ { NULL, 0 },
+ /* 0xe4 */ { NULL, 0 },
+ /* 0xe5 */ { NULL, 0 },
+ /* 0xe6 */ { NULL, 0 },
+ /* 0xe7 */ { NULL, 0 },
+ /* 0xe8 */ { NULL, 0 },
+ /* 0xe9 */ { NULL, 0 },
+ /* 0xea */ { NULL, 0 },
+ /* 0xeb */ { NULL, 0 },
+ /* 0xec */ { NULL, 0 },
+ /* 0xed */ { NULL, 0 },
+ /* 0xee */ { NULL, 0 },
+ /* 0xef */ { NULL, 0 },
+ /* 0xf0 */ { NULL, 0 },
+ /* 0xf1 */ { NULL, 0 },
+ /* 0xf2 */ { NULL, 0 },
+ /* 0xf3 */ { NULL, 0 },
+ /* 0xf4 */ { NULL, 0 },
+ /* 0xf5 */ { itable_vex023F5, 2 },
+ /* 0xf6 */ { itable_vex023F6, 2 },
+ /* 0xf7 */ { itable_vex023F7, 2 },
+ /* 0xf8 */ { NULL, 0 },
+ /* 0xf9 */ { NULL, 0 },
+ /* 0xfa */ { NULL, 0 },
+ /* 0xfb */ { NULL, 0 },
+ /* 0xfc */ { NULL, 0 },
+ /* 0xfd */ { NULL, 0 },
+ /* 0xfe */ { NULL, 0 },
+ /* 0xff */ { NULL, 0 },
+};
+
+static const struct disasm_index itable_vex031[256] = {
+ /* 0x00 */ { itable_vex03100, 1 },
+ /* 0x01 */ { itable_vex03101, 1 },
+ /* 0x02 */ { itable_vex03102, 4 },
+ /* 0x03 */ { NULL, 0 },
/* 0x04 */ { itable_vex03104, 2 },
/* 0x05 */ { itable_vex03105, 2 },
/* 0x06 */ { itable_vex03106, 1 },
@@ -11757,8 +13322,8 @@ static const struct disasm_index itable_vex031[256] = {
/* 0x0b */ { itable_vex0310B, 2 },
/* 0x0c */ { itable_vex0310C, 4 },
/* 0x0d */ { itable_vex0310D, 4 },
- /* 0x0e */ { itable_vex0310E, 2 },
- /* 0x0f */ { itable_vex0310F, 2 },
+ /* 0x0e */ { itable_vex0310E, 4 },
+ /* 0x0f */ { itable_vex0310F, 4 },
/* 0x10 */ { NULL, 0 },
/* 0x11 */ { NULL, 0 },
/* 0x12 */ { NULL, 0 },
@@ -11799,8 +13364,8 @@ static const struct disasm_index itable_vex031[256] = {
/* 0x35 */ { NULL, 0 },
/* 0x36 */ { NULL, 0 },
/* 0x37 */ { NULL, 0 },
- /* 0x38 */ { NULL, 0 },
- /* 0x39 */ { NULL, 0 },
+ /* 0x38 */ { itable_vex03138, 2 },
+ /* 0x39 */ { itable_vex03139, 1 },
/* 0x3a */ { NULL, 0 },
/* 0x3b */ { NULL, 0 },
/* 0x3c */ { NULL, 0 },
@@ -11809,17 +13374,17 @@ static const struct disasm_index itable_vex031[256] = {
/* 0x3f */ { NULL, 0 },
/* 0x40 */ { itable_vex03140, 4 },
/* 0x41 */ { itable_vex03141, 2 },
- /* 0x42 */ { itable_vex03142, 2 },
+ /* 0x42 */ { itable_vex03142, 4 },
/* 0x43 */ { NULL, 0 },
/* 0x44 */ { itable_vex03144, 10 },
/* 0x45 */ { NULL, 0 },
- /* 0x46 */ { NULL, 0 },
+ /* 0x46 */ { itable_vex03146, 1 },
/* 0x47 */ { NULL, 0 },
/* 0x48 */ { NULL, 0 },
/* 0x49 */ { NULL, 0 },
/* 0x4a */ { itable_vex0314A, 4 },
/* 0x4b */ { itable_vex0314B, 4 },
- /* 0x4c */ { itable_vex0314C, 2 },
+ /* 0x4c */ { itable_vex0314C, 4 },
/* 0x4d */ { NULL, 0 },
/* 0x4e */ { NULL, 0 },
/* 0x4f */ { NULL, 0 },
@@ -12001,6 +13566,265 @@ static const struct disasm_index itable_vex031[256] = {
/* 0xff */ { NULL, 0 },
};
+static const struct disasm_index itable_vex033[256] = {
+ /* 0x00 */ { NULL, 0 },
+ /* 0x01 */ { NULL, 0 },
+ /* 0x02 */ { NULL, 0 },
+ /* 0x03 */ { NULL, 0 },
+ /* 0x04 */ { NULL, 0 },
+ /* 0x05 */ { NULL, 0 },
+ /* 0x06 */ { NULL, 0 },
+ /* 0x07 */ { NULL, 0 },
+ /* 0x08 */ { NULL, 0 },
+ /* 0x09 */ { NULL, 0 },
+ /* 0x0a */ { NULL, 0 },
+ /* 0x0b */ { NULL, 0 },
+ /* 0x0c */ { NULL, 0 },
+ /* 0x0d */ { NULL, 0 },
+ /* 0x0e */ { NULL, 0 },
+ /* 0x0f */ { NULL, 0 },
+ /* 0x10 */ { NULL, 0 },
+ /* 0x11 */ { NULL, 0 },
+ /* 0x12 */ { NULL, 0 },
+ /* 0x13 */ { NULL, 0 },
+ /* 0x14 */ { NULL, 0 },
+ /* 0x15 */ { NULL, 0 },
+ /* 0x16 */ { NULL, 0 },
+ /* 0x17 */ { NULL, 0 },
+ /* 0x18 */ { NULL, 0 },
+ /* 0x19 */ { NULL, 0 },
+ /* 0x1a */ { NULL, 0 },
+ /* 0x1b */ { NULL, 0 },
+ /* 0x1c */ { NULL, 0 },
+ /* 0x1d */ { NULL, 0 },
+ /* 0x1e */ { NULL, 0 },
+ /* 0x1f */ { NULL, 0 },
+ /* 0x20 */ { NULL, 0 },
+ /* 0x21 */ { NULL, 0 },
+ /* 0x22 */ { NULL, 0 },
+ /* 0x23 */ { NULL, 0 },
+ /* 0x24 */ { NULL, 0 },
+ /* 0x25 */ { NULL, 0 },
+ /* 0x26 */ { NULL, 0 },
+ /* 0x27 */ { NULL, 0 },
+ /* 0x28 */ { NULL, 0 },
+ /* 0x29 */ { NULL, 0 },
+ /* 0x2a */ { NULL, 0 },
+ /* 0x2b */ { NULL, 0 },
+ /* 0x2c */ { NULL, 0 },
+ /* 0x2d */ { NULL, 0 },
+ /* 0x2e */ { NULL, 0 },
+ /* 0x2f */ { NULL, 0 },
+ /* 0x30 */ { NULL, 0 },
+ /* 0x31 */ { NULL, 0 },
+ /* 0x32 */ { NULL, 0 },
+ /* 0x33 */ { NULL, 0 },
+ /* 0x34 */ { NULL, 0 },
+ /* 0x35 */ { NULL, 0 },
+ /* 0x36 */ { NULL, 0 },
+ /* 0x37 */ { NULL, 0 },
+ /* 0x38 */ { NULL, 0 },
+ /* 0x39 */ { NULL, 0 },
+ /* 0x3a */ { NULL, 0 },
+ /* 0x3b */ { NULL, 0 },
+ /* 0x3c */ { NULL, 0 },
+ /* 0x3d */ { NULL, 0 },
+ /* 0x3e */ { NULL, 0 },
+ /* 0x3f */ { NULL, 0 },
+ /* 0x40 */ { NULL, 0 },
+ /* 0x41 */ { NULL, 0 },
+ /* 0x42 */ { NULL, 0 },
+ /* 0x43 */ { NULL, 0 },
+ /* 0x44 */ { NULL, 0 },
+ /* 0x45 */ { NULL, 0 },
+ /* 0x46 */ { NULL, 0 },
+ /* 0x47 */ { NULL, 0 },
+ /* 0x48 */ { NULL, 0 },
+ /* 0x49 */ { NULL, 0 },
+ /* 0x4a */ { NULL, 0 },
+ /* 0x4b */ { NULL, 0 },
+ /* 0x4c */ { NULL, 0 },
+ /* 0x4d */ { NULL, 0 },
+ /* 0x4e */ { NULL, 0 },
+ /* 0x4f */ { NULL, 0 },
+ /* 0x50 */ { NULL, 0 },
+ /* 0x51 */ { NULL, 0 },
+ /* 0x52 */ { NULL, 0 },
+ /* 0x53 */ { NULL, 0 },
+ /* 0x54 */ { NULL, 0 },
+ /* 0x55 */ { NULL, 0 },
+ /* 0x56 */ { NULL, 0 },
+ /* 0x57 */ { NULL, 0 },
+ /* 0x58 */ { NULL, 0 },
+ /* 0x59 */ { NULL, 0 },
+ /* 0x5a */ { NULL, 0 },
+ /* 0x5b */ { NULL, 0 },
+ /* 0x5c */ { NULL, 0 },
+ /* 0x5d */ { NULL, 0 },
+ /* 0x5e */ { NULL, 0 },
+ /* 0x5f */ { NULL, 0 },
+ /* 0x60 */ { NULL, 0 },
+ /* 0x61 */ { NULL, 0 },
+ /* 0x62 */ { NULL, 0 },
+ /* 0x63 */ { NULL, 0 },
+ /* 0x64 */ { NULL, 0 },
+ /* 0x65 */ { NULL, 0 },
+ /* 0x66 */ { NULL, 0 },
+ /* 0x67 */ { NULL, 0 },
+ /* 0x68 */ { NULL, 0 },
+ /* 0x69 */ { NULL, 0 },
+ /* 0x6a */ { NULL, 0 },
+ /* 0x6b */ { NULL, 0 },
+ /* 0x6c */ { NULL, 0 },
+ /* 0x6d */ { NULL, 0 },
+ /* 0x6e */ { NULL, 0 },
+ /* 0x6f */ { NULL, 0 },
+ /* 0x70 */ { NULL, 0 },
+ /* 0x71 */ { NULL, 0 },
+ /* 0x72 */ { NULL, 0 },
+ /* 0x73 */ { NULL, 0 },
+ /* 0x74 */ { NULL, 0 },
+ /* 0x75 */ { NULL, 0 },
+ /* 0x76 */ { NULL, 0 },
+ /* 0x77 */ { NULL, 0 },
+ /* 0x78 */ { NULL, 0 },
+ /* 0x79 */ { NULL, 0 },
+ /* 0x7a */ { NULL, 0 },
+ /* 0x7b */ { NULL, 0 },
+ /* 0x7c */ { NULL, 0 },
+ /* 0x7d */ { NULL, 0 },
+ /* 0x7e */ { NULL, 0 },
+ /* 0x7f */ { NULL, 0 },
+ /* 0x80 */ { NULL, 0 },
+ /* 0x81 */ { NULL, 0 },
+ /* 0x82 */ { NULL, 0 },
+ /* 0x83 */ { NULL, 0 },
+ /* 0x84 */ { NULL, 0 },
+ /* 0x85 */ { NULL, 0 },
+ /* 0x86 */ { NULL, 0 },
+ /* 0x87 */ { NULL, 0 },
+ /* 0x88 */ { NULL, 0 },
+ /* 0x89 */ { NULL, 0 },
+ /* 0x8a */ { NULL, 0 },
+ /* 0x8b */ { NULL, 0 },
+ /* 0x8c */ { NULL, 0 },
+ /* 0x8d */ { NULL, 0 },
+ /* 0x8e */ { NULL, 0 },
+ /* 0x8f */ { NULL, 0 },
+ /* 0x90 */ { NULL, 0 },
+ /* 0x91 */ { NULL, 0 },
+ /* 0x92 */ { NULL, 0 },
+ /* 0x93 */ { NULL, 0 },
+ /* 0x94 */ { NULL, 0 },
+ /* 0x95 */ { NULL, 0 },
+ /* 0x96 */ { NULL, 0 },
+ /* 0x97 */ { NULL, 0 },
+ /* 0x98 */ { NULL, 0 },
+ /* 0x99 */ { NULL, 0 },
+ /* 0x9a */ { NULL, 0 },
+ /* 0x9b */ { NULL, 0 },
+ /* 0x9c */ { NULL, 0 },
+ /* 0x9d */ { NULL, 0 },
+ /* 0x9e */ { NULL, 0 },
+ /* 0x9f */ { NULL, 0 },
+ /* 0xa0 */ { NULL, 0 },
+ /* 0xa1 */ { NULL, 0 },
+ /* 0xa2 */ { NULL, 0 },
+ /* 0xa3 */ { NULL, 0 },
+ /* 0xa4 */ { NULL, 0 },
+ /* 0xa5 */ { NULL, 0 },
+ /* 0xa6 */ { NULL, 0 },
+ /* 0xa7 */ { NULL, 0 },
+ /* 0xa8 */ { NULL, 0 },
+ /* 0xa9 */ { NULL, 0 },
+ /* 0xaa */ { NULL, 0 },
+ /* 0xab */ { NULL, 0 },
+ /* 0xac */ { NULL, 0 },
+ /* 0xad */ { NULL, 0 },
+ /* 0xae */ { NULL, 0 },
+ /* 0xaf */ { NULL, 0 },
+ /* 0xb0 */ { NULL, 0 },
+ /* 0xb1 */ { NULL, 0 },
+ /* 0xb2 */ { NULL, 0 },
+ /* 0xb3 */ { NULL, 0 },
+ /* 0xb4 */ { NULL, 0 },
+ /* 0xb5 */ { NULL, 0 },
+ /* 0xb6 */ { NULL, 0 },
+ /* 0xb7 */ { NULL, 0 },
+ /* 0xb8 */ { NULL, 0 },
+ /* 0xb9 */ { NULL, 0 },
+ /* 0xba */ { NULL, 0 },
+ /* 0xbb */ { NULL, 0 },
+ /* 0xbc */ { NULL, 0 },
+ /* 0xbd */ { NULL, 0 },
+ /* 0xbe */ { NULL, 0 },
+ /* 0xbf */ { NULL, 0 },
+ /* 0xc0 */ { NULL, 0 },
+ /* 0xc1 */ { NULL, 0 },
+ /* 0xc2 */ { NULL, 0 },
+ /* 0xc3 */ { NULL, 0 },
+ /* 0xc4 */ { NULL, 0 },
+ /* 0xc5 */ { NULL, 0 },
+ /* 0xc6 */ { NULL, 0 },
+ /* 0xc7 */ { NULL, 0 },
+ /* 0xc8 */ { NULL, 0 },
+ /* 0xc9 */ { NULL, 0 },
+ /* 0xca */ { NULL, 0 },
+ /* 0xcb */ { NULL, 0 },
+ /* 0xcc */ { NULL, 0 },
+ /* 0xcd */ { NULL, 0 },
+ /* 0xce */ { NULL, 0 },
+ /* 0xcf */ { NULL, 0 },
+ /* 0xd0 */ { NULL, 0 },
+ /* 0xd1 */ { NULL, 0 },
+ /* 0xd2 */ { NULL, 0 },
+ /* 0xd3 */ { NULL, 0 },
+ /* 0xd4 */ { NULL, 0 },
+ /* 0xd5 */ { NULL, 0 },
+ /* 0xd6 */ { NULL, 0 },
+ /* 0xd7 */ { NULL, 0 },
+ /* 0xd8 */ { NULL, 0 },
+ /* 0xd9 */ { NULL, 0 },
+ /* 0xda */ { NULL, 0 },
+ /* 0xdb */ { NULL, 0 },
+ /* 0xdc */ { NULL, 0 },
+ /* 0xdd */ { NULL, 0 },
+ /* 0xde */ { NULL, 0 },
+ /* 0xdf */ { NULL, 0 },
+ /* 0xe0 */ { NULL, 0 },
+ /* 0xe1 */ { NULL, 0 },
+ /* 0xe2 */ { NULL, 0 },
+ /* 0xe3 */ { NULL, 0 },
+ /* 0xe4 */ { NULL, 0 },
+ /* 0xe5 */ { NULL, 0 },
+ /* 0xe6 */ { NULL, 0 },
+ /* 0xe7 */ { NULL, 0 },
+ /* 0xe8 */ { NULL, 0 },
+ /* 0xe9 */ { NULL, 0 },
+ /* 0xea */ { NULL, 0 },
+ /* 0xeb */ { NULL, 0 },
+ /* 0xec */ { NULL, 0 },
+ /* 0xed */ { NULL, 0 },
+ /* 0xee */ { NULL, 0 },
+ /* 0xef */ { NULL, 0 },
+ /* 0xf0 */ { itable_vex033F0, 2 },
+ /* 0xf1 */ { NULL, 0 },
+ /* 0xf2 */ { NULL, 0 },
+ /* 0xf3 */ { NULL, 0 },
+ /* 0xf4 */ { NULL, 0 },
+ /* 0xf5 */ { NULL, 0 },
+ /* 0xf6 */ { NULL, 0 },
+ /* 0xf7 */ { NULL, 0 },
+ /* 0xf8 */ { NULL, 0 },
+ /* 0xf9 */ { NULL, 0 },
+ /* 0xfa */ { NULL, 0 },
+ /* 0xfb */ { NULL, 0 },
+ /* 0xfc */ { NULL, 0 },
+ /* 0xfd */ { NULL, 0 },
+ /* 0xfe */ { NULL, 0 },
+ /* 0xff */ { NULL, 0 },
+};
+
static const struct disasm_index itable_xop080[256] = {
/* 0x00 */ { NULL, 0 },
/* 0x01 */ { NULL, 0 },
@@ -12909,7 +14733,7 @@ static const struct disasm_index itable_0F38[256] = {
/* 0x7f */ { NULL, 0 },
/* 0x80 */ { itable_0F3880, 2 },
/* 0x81 */ { itable_0F3881, 2 },
- /* 0x82 */ { NULL, 0 },
+ /* 0x82 */ { itable_0F3882, 2 },
/* 0x83 */ { NULL, 0 },
/* 0x84 */ { NULL, 0 },
/* 0x85 */ { NULL, 0 },
@@ -13025,7 +14849,7 @@ static const struct disasm_index itable_0F38[256] = {
/* 0xf3 */ { NULL, 0 },
/* 0xf4 */ { NULL, 0 },
/* 0xf5 */ { NULL, 0 },
- /* 0xf6 */ { NULL, 0 },
+ /* 0xf6 */ { itable_0F38F6, 4 },
/* 0xf7 */ { NULL, 0 },
/* 0xf8 */ { NULL, 0 },
/* 0xf9 */ { NULL, 0 },
@@ -13816,7 +15640,7 @@ static const struct disasm_index itable_0FA7[256] = {
static const struct disasm_index itable_0F[256] = {
/* 0x00 */ { itable_0F00, 24 },
- /* 0x01 */ { itable_0F01, 33 },
+ /* 0x01 */ { itable_0F01, 38 },
/* 0x02 */ { itable_0F02, 10 },
/* 0x03 */ { itable_0F03, 10 },
/* 0x04 */ { NULL, 0 },
@@ -13831,8 +15655,8 @@ static const struct disasm_index itable_0F[256] = {
/* 0x0d */ { itable_0F0D, 2 },
/* 0x0e */ { itable_0F0E, 1 },
/* 0x0f */ { itable_0F0F, 26 },
- /* 0x10 */ { itable_0F10, 8 },
- /* 0x11 */ { itable_0F11, 8 },
+ /* 0x10 */ { itable_0F10, 7 },
+ /* 0x11 */ { itable_0F11, 6 },
/* 0x12 */ { itable_0F12, 5 },
/* 0x13 */ { itable_0F13, 2 },
/* 0x14 */ { itable_0F14, 2 },
@@ -13855,8 +15679,8 @@ static const struct disasm_index itable_0F[256] = {
/* 0x25 */ { NULL, 0 },
/* 0x26 */ { NULL, 0 },
/* 0x27 */ { NULL, 0 },
- /* 0x28 */ { itable_0F28, 4 },
- /* 0x29 */ { itable_0F29, 4 },
+ /* 0x28 */ { itable_0F28, 3 },
+ /* 0x29 */ { itable_0F29, 3 },
/* 0x2a */ { itable_0F2A, 6 },
/* 0x2b */ { itable_0F2B, 4 },
/* 0x2c */ { itable_0F2C, 8 },
@@ -13925,7 +15749,7 @@ static const struct disasm_index itable_0F[256] = {
/* 0x6b */ { itable_0F6B, 2 },
/* 0x6c */ { itable_0F6C, 1 },
/* 0x6d */ { itable_0F6D, 1 },
- /* 0x6e */ { itable_0F6E, 8 },
+ /* 0x6e */ { itable_0F6E, 5 },
/* 0x6f */ { itable_0F6F, 5 },
/* 0x70 */ { itable_0F70, 7 },
/* 0x71 */ { itable_0F71, 6 },
@@ -13941,7 +15765,7 @@ static const struct disasm_index itable_0F[256] = {
/* 0x7b */ { itable_0F7B, 1 },
/* 0x7c */ { itable_0F7C, 3 },
/* 0x7d */ { itable_0F7D, 3 },
- /* 0x7e */ { itable_0F7E, 10 },
+ /* 0x7e */ { itable_0F7E, 7 },
/* 0x7f */ { itable_0F7F, 5 },
/* 0x80 */ { itable_0F80, 3 },
/* 0x81 */ { itable_0F81, 3 },
@@ -14003,7 +15827,7 @@ static const struct disasm_index itable_0F[256] = {
/* 0xb9 */ { itable_0FB9, 1 },
/* 0xba */ { itable_0FBA, 12 },
/* 0xbb */ { itable_0FBB, 6 },
- /* 0xbc */ { itable_0FBC, 6 },
+ /* 0xbc */ { itable_0FBC, 9 },
/* 0xbd */ { itable_0FBD, 9 },
/* 0xbe */ { itable_0FBE, 4 },
/* 0xbf */ { itable_0FBF, 2 },
@@ -14013,8 +15837,8 @@ static const struct disasm_index itable_0F[256] = {
/* 0xc3 */ { itable_0FC3, 2 },
/* 0xc4 */ { itable_0FC4, 6 },
/* 0xc5 */ { itable_0FC5, 2 },
- /* 0xc6 */ { itable_0FC6, 4 },
- /* 0xc7 */ { itable_0FC7, 9 },
+ /* 0xc6 */ { itable_0FC6, 3 },
+ /* 0xc7 */ { itable_0FC7, 12 },
/* 0xc8 */ { itable_0FC8, 2 },
/* 0xc9 */ { itable_0FC9, 2 },
/* 0xca */ { itable_0FCA, 2 },
@@ -14214,9 +16038,9 @@ const struct disasm_index itable[256] = {
/* 0x89 */ { itable_89, 6 },
/* 0x8a */ { itable_8A, 2 },
/* 0x8b */ { itable_8B, 6 },
- /* 0x8c */ { itable_8C, 3 },
+ /* 0x8c */ { itable_8C, 4 },
/* 0x8d */ { itable_8D, 3 },
- /* 0x8e */ { itable_8E, 3 },
+ /* 0x8e */ { itable_8E, 4 },
/* 0x8f */ { itable_8F, 3 },
/* 0x90 */ { itable_90, 9 },
/* 0x91 */ { itable_91, 6 },
@@ -14272,8 +16096,8 @@ const struct disasm_index itable[256] = {
/* 0xc3 */ { itable_C3, 2 },
/* 0xc4 */ { itable_C4, 2 },
/* 0xc5 */ { itable_C5, 2 },
- /* 0xc6 */ { itable_C6, 2 },
- /* 0xc7 */ { itable_C7, 6 },
+ /* 0xc6 */ { itable_C6, 4 },
+ /* 0xc7 */ { itable_C7, 12 },
/* 0xc8 */ { itable_C8, 1 },
/* 0xc9 */ { itable_C9, 1 },
/* 0xca */ { itable_CA, 1 },
@@ -14329,7 +16153,7 @@ const struct disasm_index itable[256] = {
/* 0xfc */ { itable_FC, 1 },
/* 0xfd */ { itable_FD, 1 },
/* 0xfe */ { itable_FE, 2 },
- /* 0xff */ { itable_FF, 41 },
+ /* 0xff */ { itable_FF, 35 },
};
const struct disasm_index * const itable_vex[2][32][4] =
@@ -14337,8 +16161,8 @@ const struct disasm_index * const itable_vex[2][32][4] =
{
{ NULL, NULL, NULL, NULL, },
{ itable_vex010, itable_vex011, itable_vex012, itable_vex013, },
- { NULL, itable_vex021, NULL, NULL, },
- { NULL, itable_vex031, NULL, NULL, },
+ { itable_vex020, itable_vex021, itable_vex022, itable_vex023, },
+ { NULL, itable_vex031, NULL, itable_vex033, },
{ NULL, NULL, NULL, NULL, },
{ NULL, NULL, NULL, NULL, },
{ NULL, NULL, NULL, NULL, },
diff --git a/insnsi.h b/insnsi.h
index 13c6be4..4bc1c01 100644
--- a/insnsi.h
+++ b/insnsi.h
@@ -13,6 +13,7 @@ enum opcode {
I_AAM,
I_AAS,
I_ADC,
+ I_ADCX,
I_ADD,
I_ADDPD,
I_ADDPS,
@@ -20,6 +21,7 @@ enum opcode {
I_ADDSS,
I_ADDSUBPD,
I_ADDSUBPS,
+ I_ADOX,
I_AESDEC,
I_AESDECLAST,
I_AESENC,
@@ -27,6 +29,7 @@ enum opcode {
I_AESIMC,
I_AESKEYGENASSIST,
I_AND,
+ I_ANDN,
I_ANDNPD,
I_ANDNPS,
I_ANDPD,
@@ -34,10 +37,14 @@ enum opcode {
I_ARPL,
I_BB0_RESET,
I_BB1_RESET,
+ I_BEXTR,
I_BLENDPD,
I_BLENDPS,
I_BLENDVPD,
I_BLENDVPS,
+ I_BLSI,
+ I_BLSMSK,
+ I_BLSR,
I_BOUND,
I_BSF,
I_BSR,
@@ -46,10 +53,12 @@ enum opcode {
I_BTC,
I_BTR,
I_BTS,
+ I_BZHI,
I_CALL,
I_CBW,
I_CDQ,
I_CDQE,
+ I_CLAC,
I_CLC,
I_CLD,
I_CLFLUSH,
@@ -351,6 +360,7 @@ enum opcode {
I_INVEPT,
I_INVLPG,
I_INVLPGA,
+ I_INVPCID,
I_INVVPID,
I_IRET,
I_IRETD,
@@ -452,6 +462,7 @@ enum opcode {
I_MULPS,
I_MULSD,
I_MULSS,
+ I_MULX,
I_MWAIT,
I_NEG,
I_NOP,
@@ -506,7 +517,9 @@ enum opcode {
I_PCMPGTW,
I_PCMPISTRI,
I_PCMPISTRM,
+ I_PDEP,
I_PDISTIB,
+ I_PEXT,
I_PEXTRB,
I_PEXTRD,
I_PEXTRQ,
@@ -661,6 +674,7 @@ enum opcode {
I_RDMSR,
I_RDPMC,
I_RDRAND,
+ I_RDSEED,
I_RDSHR,
I_RDTSC,
I_RDTSCP,
@@ -676,6 +690,7 @@ enum opcode {
I_RETN,
I_ROL,
I_ROR,
+ I_RORX,
I_ROUNDPD,
I_ROUNDPS,
I_ROUNDSD,
@@ -690,6 +705,7 @@ enum opcode {
I_SAL,
I_SALC,
I_SAR,
+ I_SARX,
I_SBB,
I_SCASB,
I_SCASD,
@@ -699,8 +715,10 @@ enum opcode {
I_SGDT,
I_SHL,
I_SHLD,
+ I_SHLX,
I_SHR,
I_SHRD,
+ I_SHRX,
I_SHUFPD,
I_SHUFPS,
I_SIDT,
@@ -715,6 +733,7 @@ enum opcode {
I_SQRTPS,
I_SQRTSD,
I_SQRTSS,
+ I_STAC,
I_STC,
I_STD,
I_STGI,
@@ -739,6 +758,7 @@ enum opcode {
I_SYSEXIT,
I_SYSRET,
I_TEST,
+ I_TZCNT,
I_UCOMISD,
I_UCOMISS,
I_UD0,
@@ -772,6 +792,7 @@ enum opcode {
I_VBLENDVPD,
I_VBLENDVPS,
I_VBROADCASTF128,
+ I_VBROADCASTI128,
I_VBROADCASTSD,
I_VBROADCASTSS,
I_VCMPEQPD,
@@ -987,6 +1008,7 @@ enum opcode {
I_VERR,
I_VERW,
I_VEXTRACTF128,
+ I_VEXTRACTI128,
I_VEXTRACTPS,
I_VFMADD123PD,
I_VFMADD123PS,
@@ -1132,11 +1154,16 @@ enum opcode {
I_VFRCZPS,
I_VFRCZSD,
I_VFRCZSS,
+ I_VGATHERDPD,
+ I_VGATHERDPS,
+ I_VGATHERQPD,
+ I_VGATHERQPS,
I_VHADDPD,
I_VHADDPS,
I_VHSUBPD,
I_VHSUBPS,
I_VINSERTF128,
+ I_VINSERTI128,
I_VINSERTPS,
I_VLDDQU,
I_VLDMXCSR,
@@ -1150,6 +1177,7 @@ enum opcode {
I_VMAXSS,
I_VMCALL,
I_VMCLEAR,
+ I_VMFUNC,
I_VMINPD,
I_VMINPS,
I_VMINSD,
@@ -1221,8 +1249,13 @@ enum opcode {
I_VPANDN,
I_VPAVGB,
I_VPAVGW,
+ I_VPBLENDD,
I_VPBLENDVB,
I_VPBLENDW,
+ I_VPBROADCASTB,
+ I_VPBROADCASTD,
+ I_VPBROADCASTQ,
+ I_VPBROADCASTW,
I_VPCLMULHQHQDQ,
I_VPCLMULHQLQDQ,
I_VPCLMULLQHQDQ,
@@ -1250,12 +1283,21 @@ enum opcode {
I_VPCOMUW,
I_VPCOMW,
I_VPERM2F128,
+ I_VPERM2I128,
+ I_VPERMD,
I_VPERMILPD,
I_VPERMILPS,
+ I_VPERMPD,
+ I_VPERMPS,
+ I_VPERMQ,
I_VPEXTRB,
I_VPEXTRD,
I_VPEXTRQ,
I_VPEXTRW,
+ I_VPGATHERDD,
+ I_VPGATHERDQ,
+ I_VPGATHERQD,
+ I_VPGATHERQQ,
I_VPHADDBD,
I_VPHADDBQ,
I_VPHADDBW,
@@ -1296,6 +1338,8 @@ enum opcode {
I_VPMADCSWD,
I_VPMADDUBSW,
I_VPMADDWD,
+ I_VPMASKMOVD,
+ I_VPMASKMOVQ,
I_VPMAXSB,
I_VPMAXSD,
I_VPMAXSW,
@@ -1353,12 +1397,17 @@ enum opcode {
I_VPSLLD,
I_VPSLLDQ,
I_VPSLLQ,
+ I_VPSLLVD,
+ I_VPSLLVQ,
I_VPSLLW,
I_VPSRAD,
+ I_VPSRAVD,
I_VPSRAW,
I_VPSRLD,
I_VPSRLDQ,
I_VPSRLQ,
+ I_VPSRLVD,
+ I_VPSRLVQ,
I_VPSRLW,
I_VPSUBB,
I_VPSUBD,
@@ -1414,7 +1463,9 @@ enum opcode {
I_WRGSBASE,
I_WRMSR,
I_WRSHR,
+ I_XABORT,
I_XADD,
+ I_XBEGIN,
I_XBTS,
I_XCHG,
I_XCRYPTCBC,
@@ -1422,6 +1473,7 @@ enum opcode {
I_XCRYPTCTR,
I_XCRYPTECB,
I_XCRYPTOFB,
+ I_XEND,
I_XGETBV,
I_XLAT,
I_XLATB,
@@ -1438,6 +1490,7 @@ enum opcode {
I_XSHA1,
I_XSHA256,
I_XSTORE,
+ I_XTEST,
I_CMOVcc,
I_Jcc,
I_SETcc,
diff --git a/insnsn.c b/insnsn.c
index 409e268..ce08230 100644
--- a/insnsn.c
+++ b/insnsn.c
@@ -8,6 +8,7 @@ const char * const nasm_insn_names[] = {
"aam",
"aas",
"adc",
+ "adcx",
"add",
"addpd",
"addps",
@@ -15,6 +16,7 @@ const char * const nasm_insn_names[] = {
"addss",
"addsubpd",
"addsubps",
+ "adox",
"aesdec",
"aesdeclast",
"aesenc",
@@ -22,6 +24,7 @@ const char * const nasm_insn_names[] = {
"aesimc",
"aeskeygenassist",
"and",
+ "andn",
"andnpd",
"andnps",
"andpd",
@@ -29,10 +32,14 @@ const char * const nasm_insn_names[] = {
"arpl",
"bb0_reset",
"bb1_reset",
+ "bextr",
"blendpd",
"blendps",
"blendvpd",
"blendvps",
+ "blsi",
+ "blsmsk",
+ "blsr",
"bound",
"bsf",
"bsr",
@@ -41,10 +48,12 @@ const char * const nasm_insn_names[] = {
"btc",
"btr",
"bts",
+ "bzhi",
"call",
"cbw",
"cdq",
"cdqe",
+ "clac",
"clc",
"cld",
"clflush",
@@ -346,6 +355,7 @@ const char * const nasm_insn_names[] = {
"invept",
"invlpg",
"invlpga",
+ "invpcid",
"invvpid",
"iret",
"iretd",
@@ -447,6 +457,7 @@ const char * const nasm_insn_names[] = {
"mulps",
"mulsd",
"mulss",
+ "mulx",
"mwait",
"neg",
"nop",
@@ -501,7 +512,9 @@ const char * const nasm_insn_names[] = {
"pcmpgtw",
"pcmpistri",
"pcmpistrm",
+ "pdep",
"pdistib",
+ "pext",
"pextrb",
"pextrd",
"pextrq",
@@ -656,6 +669,7 @@ const char * const nasm_insn_names[] = {
"rdmsr",
"rdpmc",
"rdrand",
+ "rdseed",
"rdshr",
"rdtsc",
"rdtscp",
@@ -671,6 +685,7 @@ const char * const nasm_insn_names[] = {
"retn",
"rol",
"ror",
+ "rorx",
"roundpd",
"roundps",
"roundsd",
@@ -685,6 +700,7 @@ const char * const nasm_insn_names[] = {
"sal",
"salc",
"sar",
+ "sarx",
"sbb",
"scasb",
"scasd",
@@ -694,8 +710,10 @@ const char * const nasm_insn_names[] = {
"sgdt",
"shl",
"shld",
+ "shlx",
"shr",
"shrd",
+ "shrx",
"shufpd",
"shufps",
"sidt",
@@ -710,6 +728,7 @@ const char * const nasm_insn_names[] = {
"sqrtps",
"sqrtsd",
"sqrtss",
+ "stac",
"stc",
"std",
"stgi",
@@ -734,6 +753,7 @@ const char * const nasm_insn_names[] = {
"sysexit",
"sysret",
"test",
+ "tzcnt",
"ucomisd",
"ucomiss",
"ud0",
@@ -767,6 +787,7 @@ const char * const nasm_insn_names[] = {
"vblendvpd",
"vblendvps",
"vbroadcastf128",
+ "vbroadcasti128",
"vbroadcastsd",
"vbroadcastss",
"vcmpeqpd",
@@ -982,6 +1003,7 @@ const char * const nasm_insn_names[] = {
"verr",
"verw",
"vextractf128",
+ "vextracti128",
"vextractps",
"vfmadd123pd",
"vfmadd123ps",
@@ -1127,11 +1149,16 @@ const char * const nasm_insn_names[] = {
"vfrczps",
"vfrczsd",
"vfrczss",
+ "vgatherdpd",
+ "vgatherdps",
+ "vgatherqpd",
+ "vgatherqps",
"vhaddpd",
"vhaddps",
"vhsubpd",
"vhsubps",
"vinsertf128",
+ "vinserti128",
"vinsertps",
"vlddqu",
"vldmxcsr",
@@ -1145,6 +1172,7 @@ const char * const nasm_insn_names[] = {
"vmaxss",
"vmcall",
"vmclear",
+ "vmfunc",
"vminpd",
"vminps",
"vminsd",
@@ -1216,8 +1244,13 @@ const char * const nasm_insn_names[] = {
"vpandn",
"vpavgb",
"vpavgw",
+ "vpblendd",
"vpblendvb",
"vpblendw",
+ "vpbroadcastb",
+ "vpbroadcastd",
+ "vpbroadcastq",
+ "vpbroadcastw",
"vpclmulhqhqdq",
"vpclmulhqlqdq",
"vpclmullqhqdq",
@@ -1245,12 +1278,21 @@ const char * const nasm_insn_names[] = {
"vpcomuw",
"vpcomw",
"vperm2f128",
+ "vperm2i128",
+ "vpermd",
"vpermilpd",
"vpermilps",
+ "vpermpd",
+ "vpermps",
+ "vpermq",
"vpextrb",
"vpextrd",
"vpextrq",
"vpextrw",
+ "vpgatherdd",
+ "vpgatherdq",
+ "vpgatherqd",
+ "vpgatherqq",
"vphaddbd",
"vphaddbq",
"vphaddbw",
@@ -1291,6 +1333,8 @@ const char * const nasm_insn_names[] = {
"vpmadcswd",
"vpmaddubsw",
"vpmaddwd",
+ "vpmaskmovd",
+ "vpmaskmovq",
"vpmaxsb",
"vpmaxsd",
"vpmaxsw",
@@ -1348,12 +1392,17 @@ const char * const nasm_insn_names[] = {
"vpslld",
"vpslldq",
"vpsllq",
+ "vpsllvd",
+ "vpsllvq",
"vpsllw",
"vpsrad",
+ "vpsravd",
"vpsraw",
"vpsrld",
"vpsrldq",
"vpsrlq",
+ "vpsrlvd",
+ "vpsrlvq",
"vpsrlw",
"vpsubb",
"vpsubd",
@@ -1409,7 +1458,9 @@ const char * const nasm_insn_names[] = {
"wrgsbase",
"wrmsr",
"wrshr",
+ "xabort",
"xadd",
+ "xbegin",
"xbts",
"xchg",
"xcryptcbc",
@@ -1417,6 +1468,7 @@ const char * const nasm_insn_names[] = {
"xcryptctr",
"xcryptecb",
"xcryptofb",
+ "xend",
"xgetbv",
"xlat",
"xlatb",
@@ -1433,6 +1485,7 @@ const char * const nasm_insn_names[] = {
"xsha1",
"xsha256",
"xstore",
+ "xtest",
"cmov",
"j",
"set"
diff --git a/lcc/README b/lcc/README
deleted file mode 100644
index 569b9be..0000000
--- a/lcc/README
+++ /dev/null
@@ -1,52 +0,0 @@
-This directory contains the necessary files to port the C compiler
-``LCC'' (available by FTP from sunsite.doc.ic.ac.uk in the directory
-/computing/programming/languages/c/lcc) to compile for Linux (a.out
-or ELF) by using NASM as a back-end code generator.
-
-This patch has been tested on lcc version 3.6.
-
-To install:
-
-- Copy `x86nasm.md' into the `src' directory of the lcc tree.
-
-- Copy either `lin-elf.c' or `lin-aout.c' into the `etc' directory.
-
-- If you're installing for a.out, edit `x86nasm.md' and change the
- conditional after the comment reading "CHANGE THIS FOR a.out" in
- the `defsymbol' function from `#if 0' to `#if 1'.
-
-- Make the following changes to `bind.c' in the `src' directory:
-
- - Near the top of the file, add a line that reads
- extern Interface x86nasmIR;
-
- - In the `bindings' array, add the lines
- "x86-nasm", &x86nasmIR,
- "x86/nasm", &x86nasmIR,
- (in sensible looking places...)
-
- A sample `bind.c' has been provided to show what the result of
- this might look like. You might be able to get away with using it
- directly...
-
-- Modify the lcc makefile to include rules for x86nasm.o: this will
- have to be done in about three places. Just copy any line with
- `x86' on it and modify it to read `x86nasm' everywhere. (Except
- that in the list of object files that rcc is made up from, do
- remember to ensure that every line but the last has a trailing
- backslash...)
-
-- You may have to modify the contents of `lin-elf.c' or `lin-aout.c'
- to reflect the true locations of files such as crt0.o, crt1.o,
- ld-linux.so and so forth. If you don't know where to find these,
- compile a short C program with `gcc -v' and see what command line
- gcc feeds to `ld'.
-
-- You should now be able to build lcc, using `lin-elf.c' or
- `lin-aout.c' as the system-dependent part of the `lcc' wrapper
- program.
-
-- Symlink x86nasm.c into the `src' directory before attempting the
- triple test, or the compile will fail.
-
-- Now it should pass the triple test, on either ELF or a.out. Voila!
diff --git a/lcc/bind.c b/lcc/bind.c
deleted file mode 100644
index 286431d..0000000
--- a/lcc/bind.c
+++ /dev/null
@@ -1,23 +0,0 @@
-#include "c.h"
-extern Interface nullIR, symbolicIR;
-extern Interface mipsebIR, mipselIR;
-extern Interface sparcIR, solarisIR;
-extern Interface x86IR, x86nasmIR;
-Binding bindings[] = {
- "symbolic", &symbolicIR,
- "mips-irix", &mipsebIR,
- "mips-ultrix", &mipselIR,
- "sparc-sun", &sparcIR,
- "sparc-solaris", &solarisIR,
- "x86-dos", &x86IR,
- "x86-nasm", &x86nasmIR,
- "symbolic/irix", &symbolicIR, /* omit */
- "mips/irix", &mipsebIR, /* omit */
- "mips/ultrix", &mipselIR, /* omit */
- "sparc/sun", &sparcIR, /* omit */
- "sparc/solaris", &solarisIR, /* omit */
- "x86/dos", &x86IR, /* omit */
- "x86/nasm", &x86nasmIR, /* omit */
- "null", &nullIR,
- NULL, NULL
-};
diff --git a/lcc/lin-aout.c b/lcc/lin-aout.c
deleted file mode 100644
index e4ac48f..0000000
--- a/lcc/lin-aout.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/* x86 running linux and using nasm as a.out */
-
-#include <string.h>
-
-#ifndef LCCDIR
-#define LCCDIR "/usr/local/lib/lcc/"
-#endif
-
-#define NASMPATH "/usr/local/bin/nasm"
-
-char *cpp[] = { LCCDIR "cpp", "-D__STDC__=1",
- "-Di386", "-D__i386", "-D__i386__",
- "-Dlinux", "-D__linux", "-D__linux__",
- "-Dunix", "-D__unix", "-D__unix__",
- "$1", "$2", "$3", 0
-};
-char *include[] = { "-I" LCCDIR "include", "-I/usr/local/include",
- "-I/usr/include", 0
-};
-char *com[] = { LCCDIR "rcc", "-target=x86/nasm",
- "$1", "$2", "$3", 0
-};
-char *as[] = { NASMPATH, "-a", "-faout", "-o", "$3", "$1", "$2", 0 };
-char *ld[] = { "/usr/bin/ld", "-m", "i386linux",
- "-L/usr/i486-linuxaout/lib",
- "-o", "$3", "$1",
- "/usr/i486-linuxaout/lib/crt0.o",
- "$2", "", "-lc", 0
-};
-static char *bbexit = LCCDIR "bbexit.o";
-
-extern char *concat(char *, char *);
-extern int access(const char *, int);
-
-int option(char *arg)
-{
- if (strncmp(arg, "-lccdir=", 8) == 0) {
- cpp[0] = concat(&arg[8], "/cpp");
- include[0] = concat("-I", concat(&arg[8], "/include"));
- com[0] = concat(&arg[8], "/rcc");
- bbexit = concat(&arg[8], "/bbexit.o");
- } else if (strcmp(arg, "-g") == 0) ;
- else if (strcmp(arg, "-b") == 0 && access(bbexit, 4) == 0)
- ld[9] = bbexit;
- else
- return 0;
- return 1;
-}
diff --git a/lcc/lin-elf.c b/lcc/lin-elf.c
deleted file mode 100644
index 693309f..0000000
--- a/lcc/lin-elf.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/* x86 running linux and using nasm as ELF */
-
-#include <string.h>
-
-#ifndef LCCDIR
-#define LCCDIR "/usr/local/lib/lcc/"
-#endif
-
-#define NASMPATH "/usr/local/bin/nasm"
-
-char *cpp[] = { LCCDIR "cpp", "-D__STDC__=1",
- "-D__ELF__", "-Di386", "-D__i386", "-D__i386__",
- "-Dlinux", "-D__linux", "-D__linux__",
- "$1", "$2", "$3", 0
-};
-char *include[] = { "-I" LCCDIR "include", "-I/usr/local/include",
- "-I/usr/include", 0
-};
-char *com[] = { LCCDIR "rcc", "-target=x86/nasm",
- "$1", "$2", "$3", 0
-};
-char *as[] = { NASMPATH, "-a", "-felf", "-o", "$3", "$1", "$2", 0 };
-char *ld[] = { "/usr/bin/ld", "-m", "elf_i386",
- "-dynamic-linker", "/lib/ld-linux.so.1",
- "-L/usr/i486-linux/lib",
- "-o", "$3", "$1",
- "/usr/lib/crt1.o", "/usr/lib/crti.o", "/usr/lib/crtbegin.o",
- "$2", "",
- "-lc", "", "/usr/lib/crtend.o", "/usr/lib/crtn.o", 0
-};
-static char *bbexit = LCCDIR "bbexit.o";
-
-extern char *concat(char *, char *);
-extern int access(const char *, int);
-
-int option(char *arg)
-{
- if (strncmp(arg, "-lccdir=", 8) == 0) {
- cpp[0] = concat(&arg[8], "/cpp");
- include[0] = concat("-I", concat(&arg[8], "/include"));
- com[0] = concat(&arg[8], "/rcc");
- bbexit = concat(&arg[8], "/bbexit.o");
- } else if (strcmp(arg, "-g") == 0) ;
- else if (strcmp(arg, "-b") == 0 && access(bbexit, 4) == 0)
- ld[13] = bbexit;
- else
- return 0;
- return 1;
-}
diff --git a/lcc/x86nasm.md b/lcc/x86nasm.md
deleted file mode 100644
index 54d0be6..0000000
--- a/lcc/x86nasm.md
+++ /dev/null
@@ -1,703 +0,0 @@
-%{
-enum { EAX=0, ECX=1, EDX=2, EBX=3, ESI=6, EDI=7 };
-#include "c.h"
-#define NODEPTR_TYPE Node
-#define OP_LABEL(p) ((p)->op)
-#define LEFT_CHILD(p) ((p)->kids[0])
-#define RIGHT_CHILD(p) ((p)->kids[1])
-#define STATE_LABEL(p) ((p)->x.state)
-static void address ARGS((Symbol, Symbol, int));
-static void blkfetch ARGS((int, int, int, int));
-static void blkloop ARGS((int, int, int, int, int, int[]));
-static void blkstore ARGS((int, int, int, int));
-static void defaddress ARGS((Symbol));
-static void defconst ARGS((int, Value));
-static void defstring ARGS((int, char *));
-static void defsymbol ARGS((Symbol));
-static void doarg ARGS((Node));
-static void emit2 ARGS((Node));
-static void export ARGS((Symbol));
-static void clobber ARGS((Node));
-static void function ARGS((Symbol, Symbol [], Symbol [], int));
-static void global ARGS((Symbol));
-static void import ARGS((Symbol));
-static void local ARGS((Symbol));
-static void progbeg ARGS((int, char **));
-static void progend ARGS((void));
-static void segment ARGS((int));
-static void space ARGS((int));
-static void target ARGS((Node));
-static int ckstack ARGS((Node, int));
-static int memop ARGS((Node));
-static int sametree ARGS((Node, Node));
-static Symbol charreg[32], shortreg[32], intreg[32];
-static Symbol fltreg[32];
-
-static int cseg;
-
-static Symbol quo, rem;
-
-%}
-%start stmt
-%term ADDD=306 ADDF=305 ADDI=309 ADDP=311 ADDU=310
-%term ADDRFP=279
-%term ADDRGP=263
-%term ADDRLP=295
-%term ARGB=41 ARGD=34 ARGF=33 ARGI=37 ARGP=39
-%term ASGNB=57 ASGNC=51 ASGND=50 ASGNF=49 ASGNI=53 ASGNP=55 ASGNS=52
-%term BANDU=390
-%term BCOMU=406
-%term BORU=422
-%term BXORU=438
-%term CALLB=217 CALLD=210 CALLF=209 CALLI=213 CALLV=216
-%term CNSTC=19 CNSTD=18 CNSTF=17 CNSTI=21 CNSTP=23 CNSTS=20 CNSTU=22
-%term CVCI=85 CVCU=86
-%term CVDF=97 CVDI=101
-%term CVFD=114
-%term CVIC=131 CVID=130 CVIS=132 CVIU=134
-%term CVPU=150
-%term CVSI=165 CVSU=166
-%term CVUC=179 CVUI=181 CVUP=183 CVUS=180
-%term DIVD=450 DIVF=449 DIVI=453 DIVU=454
-%term EQD=482 EQF=481 EQI=485
-%term GED=498 GEF=497 GEI=501 GEU=502
-%term GTD=514 GTF=513 GTI=517 GTU=518
-%term INDIRB=73 INDIRC=67 INDIRD=66 INDIRF=65 INDIRI=69 INDIRP=71 INDIRS=68
-%term JUMPV=584
-%term LABELV=600
-%term LED=530 LEF=529 LEI=533 LEU=534
-%term LOADB=233 LOADC=227 LOADD=226 LOADF=225 LOADI=229 LOADP=231 LOADS=228 LOADU=230
-%term LSHI=341 LSHU=342
-%term LTD=546 LTF=545 LTI=549 LTU=550
-%term MODI=357 MODU=358
-%term MULD=466 MULF=465 MULI=469 MULU=470
-%term NED=562 NEF=561 NEI=565
-%term NEGD=194 NEGF=193 NEGI=197
-%term RETD=242 RETF=241 RETI=245
-%term RSHI=373 RSHU=374
-%term SUBD=322 SUBF=321 SUBI=325 SUBP=327 SUBU=326
-%term VREGP=615
-%%
-reg: INDIRC(VREGP) "# read register\n"
-reg: INDIRD(VREGP) "# read register\n"
-reg: INDIRF(VREGP) "# read register\n"
-reg: INDIRI(VREGP) "# read register\n"
-reg: INDIRP(VREGP) "# read register\n"
-reg: INDIRS(VREGP) "# read register\n"
-stmt: ASGNC(VREGP,reg) "# write register\n"
-stmt: ASGND(VREGP,reg) "# write register\n"
-stmt: ASGNF(VREGP,reg) "# write register\n"
-stmt: ASGNI(VREGP,reg) "# write register\n"
-stmt: ASGNP(VREGP,reg) "# write register\n"
-stmt: ASGNS(VREGP,reg) "# write register\n"
-con: CNSTC "%a"
-con: CNSTI "%a"
-con: CNSTP "%a"
-con: CNSTS "%a"
-con: CNSTU "%a"
-stmt: reg ""
-reg: CVIU(reg) "%0" notarget(a)
-reg: CVPU(reg) "%0" notarget(a)
-reg: CVUI(reg) "%0" notarget(a)
-reg: CVUP(reg) "%0" notarget(a)
-acon: ADDRGP "%a"
-acon: con "%0"
-base: ADDRGP "%a"
-base: reg "%0"
-base: ADDI(reg,acon) "%0 + (%1)"
-base: ADDP(reg,acon) "%0 + (%1)"
-base: ADDU(reg,acon) "%0 + (%1)"
-base: ADDRFP "ebp + %a"
-base: ADDRLP "ebp + %a"
-index: reg "%0"
-index: LSHI(reg,con1) "%0*2"
-index: LSHI(reg,con2) "%0*4"
-index: LSHI(reg,con3) "%0*8"
-
-con1: CNSTI "1" range(a, 1, 1)
-con1: CNSTU "1" range(a, 1, 1)
-con2: CNSTI "2" range(a, 2, 2)
-con2: CNSTU "2" range(a, 2, 2)
-con3: CNSTI "3" range(a, 3, 3)
-con3: CNSTU "3" range(a, 3, 3)
-index: LSHU(reg,con1) "%0*2"
-index: LSHU(reg,con2) "%0*4"
-index: LSHU(reg,con3) "%0*8"
-addr: base "[%0]"
-addr: ADDI(index,base) "[%1 + %0]"
-addr: ADDP(index,base) "[%1 + %0]"
-addr: ADDU(index,base) "[%1 + %0]"
-addr: index "[%0]"
-mem: INDIRC(addr) "byte %0"
-mem: INDIRI(addr) "dword %0"
-mem: INDIRP(addr) "dword %0"
-mem: INDIRS(addr) "word %0"
-rc: reg "%0"
-rc: con "%0"
-
-mr: reg "%0"
-mr: mem "%0"
-
-mrc0: mem "%0"
-mrc0: rc "%0"
-mrc1: mem "%0" 1
-mrc1: rc "%0"
-
-mrc3: mem "%0" 3
-mrc3: rc "%0"
-reg: addr "lea %c,%0\n" 1
-reg: mrc0 "mov %c,%0\n" 1
-reg: LOADC(reg) "mov %c,%0\n" move(a)
-reg: LOADI(reg) "mov %c,%0\n" move(a)
-reg: LOADP(reg) "mov %c,%0\n" move(a)
-reg: LOADS(reg) "mov %c,%0\n" move(a)
-reg: LOADU(reg) "mov %c,%0\n" move(a)
-reg: ADDI(reg,mrc1) "?mov %c,%0\nadd %c,%1\n" 1
-reg: ADDP(reg,mrc1) "?mov %c,%0\nadd %c,%1\n" 1
-reg: ADDU(reg,mrc1) "?mov %c,%0\nadd %c,%1\n" 1
-reg: SUBI(reg,mrc1) "?mov %c,%0\nsub %c,%1\n" 1
-reg: SUBP(reg,mrc1) "?mov %c,%0\nsub %c,%1\n" 1
-reg: SUBU(reg,mrc1) "?mov %c,%0\nsub %c,%1\n" 1
-reg: BANDU(reg,mrc1) "?mov %c,%0\nand %c,%1\n" 1
-reg: BORU(reg,mrc1) "?mov %c,%0\nor %c,%1\n" 1
-reg: BXORU(reg,mrc1) "?mov %c,%0\nxor %c,%1\n" 1
-stmt: ASGNI(addr,ADDI(mem,con1)) "inc %1\n" memop(a)
-stmt: ASGNI(addr,ADDU(mem,con1)) "inc %1\n" memop(a)
-stmt: ASGNP(addr,ADDP(mem,con1)) "inc %1\n" memop(a)
-stmt: ASGNI(addr,SUBI(mem,con1)) "dec %1\n" memop(a)
-stmt: ASGNI(addr,SUBU(mem,con1)) "dec %1\n" memop(a)
-stmt: ASGNP(addr,SUBP(mem,con1)) "dec %1\n" memop(a)
-stmt: ASGNI(addr,ADDI(mem,rc)) "add %1,%2\n" memop(a)
-stmt: ASGNI(addr,ADDU(mem,rc)) "add %1,%2\n" memop(a)
-stmt: ASGNI(addr,SUBI(mem,rc)) "sub %1,%2\n" memop(a)
-stmt: ASGNI(addr,SUBU(mem,rc)) "sub %1,%2\n" memop(a)
-
-stmt: ASGNI(addr,BANDU(mem,rc)) "and %1,%2\n" memop(a)
-stmt: ASGNI(addr,BORU(mem,rc)) "or %1,%2\n" memop(a)
-stmt: ASGNI(addr,BXORU(mem,rc)) "xor %1,%2\n" memop(a)
-reg: BCOMU(reg) "?mov %c,%0\nnot %c\n" 2
-reg: NEGI(reg) "?mov %c,%0\nneg %c\n" 2
-
-stmt: ASGNI(addr,BCOMU(mem)) "not %1\n" memop(a)
-stmt: ASGNI(addr,NEGI(mem)) "neg %1\n" memop(a)
-reg: LSHI(reg,rc5) "?mov %c,%0\nsal %c,%1\n" 2
-reg: LSHU(reg,rc5) "?mov %c,%0\nshl %c,%1\n" 2
-reg: RSHI(reg,rc5) "?mov %c,%0\nsar %c,%1\n" 2
-reg: RSHU(reg,rc5) "?mov %c,%0\nshr %c,%1\n" 2
-
-stmt: ASGNI(addr,LSHI(mem,rc5)) "sal %1,%2\n" memop(a)
-stmt: ASGNI(addr,LSHU(mem,rc5)) "shl %1,%2\n" memop(a)
-stmt: ASGNI(addr,RSHI(mem,rc5)) "sar %1,%2\n" memop(a)
-stmt: ASGNI(addr,RSHU(mem,rc5)) "shr %1,%2\n" memop(a)
-
-rc5: CNSTI "%a" range(a, 0, 31)
-rc5: reg "cl"
-reg: MULI(reg,mrc3) "?mov %c,%0\nimul %c,%1\n" 14
-reg: MULI(con,mr) "imul %c,%1,%0\n" 13
-reg: MULU(reg,mr) "mul %1\n" 13
-reg: DIVU(reg,reg) "xor edx,edx\ndiv %1\n"
-reg: MODU(reg,reg) "xor edx,edx\ndiv %1\n"
-reg: DIVI(reg,reg) "cdq\nidiv %1\n"
-reg: MODI(reg,reg) "cdq\nidiv %1\n"
-reg: CVIU(reg) "mov %c,%0\n" move(a)
-reg: CVPU(reg) "mov %c,%0\n" move(a)
-reg: CVUI(reg) "mov %c,%0\n" move(a)
-reg: CVUP(reg) "mov %c,%0\n" move(a)
-reg: CVCI(INDIRC(addr)) "movsx %c,byte %0\n" 3
-reg: CVCU(INDIRC(addr)) "movzx %c,byte %0\n" 3
-reg: CVSI(INDIRS(addr)) "movsx %c,word %0\n" 3
-reg: CVSU(INDIRS(addr)) "movzx %c,word %0\n" 3
-reg: CVCI(reg) "# extend\n" 3
-reg: CVCU(reg) "# extend\n" 3
-reg: CVSI(reg) "# extend\n" 3
-reg: CVSU(reg) "# extend\n" 3
-
-reg: CVIC(reg) "# truncate\n" 1
-reg: CVIS(reg) "# truncate\n" 1
-reg: CVUC(reg) "# truncate\n" 1
-reg: CVUS(reg) "# truncate\n" 1
-stmt: ASGNC(addr,rc) "mov byte %0,%1\n" 1
-stmt: ASGNI(addr,rc) "mov dword %0,%1\n" 1
-stmt: ASGNP(addr,rc) "mov dword %0,%1\n" 1
-stmt: ASGNS(addr,rc) "mov word %0,%1\n" 1
-stmt: ARGI(mrc3) "push dword %0\n" 1
-stmt: ARGP(mrc3) "push dword %0\n" 1
-stmt: ASGNB(reg,INDIRB(reg)) "mov ecx,%a\nrep movsb\n"
-stmt: ARGB(INDIRB(reg)) "sub esp,%a\nmov edi,esp\nmov ecx,%a\nrep movsb\n"
-
-memf: INDIRD(addr) "qword %0"
-memf: INDIRF(addr) "dword %0"
-memf: CVFD(INDIRF(addr)) "dword %0"
-reg: memf "fld %0\n" 3
-stmt: ASGND(addr,reg) "fstp qword %0\n" 7
-stmt: ASGNF(addr,reg) "fstp dword %0\n" 7
-stmt: ASGNF(addr,CVDF(reg)) "fstp dword %0\n" 7
-stmt: ARGD(reg) "sub esp,8\nfstp qword [esp]\n"
-stmt: ARGF(reg) "sub esp,4\nfstp dword [esp]\n"
-reg: NEGD(reg) "fchs\n"
-reg: NEGF(reg) "fchs\n"
-reg: ADDD(reg,memf) "fadd %1\n"
-reg: ADDD(reg,reg) "faddp st1\n"
-reg: ADDF(reg,memf) "fadd %1\n"
-reg: ADDF(reg,reg) "faddp st1\n"
-reg: DIVD(reg,memf) "fdiv %1\n"
-reg: DIVD(reg,reg) "fdivp st1\n"
-reg: DIVF(reg,memf) "fdiv %1\n"
-reg: DIVF(reg,reg) "fdivp st1\n"
-reg: MULD(reg,memf) "fmul %1\n"
-reg: MULD(reg,reg) "fmulp st1\n"
-reg: MULF(reg,memf) "fmul %1\n"
-reg: MULF(reg,reg) "fmulp st1\n"
-reg: SUBD(reg,memf) "fsub %1\n"
-reg: SUBD(reg,reg) "fsubp st1\n"
-reg: SUBF(reg,memf) "fsub %1\n"
-reg: SUBF(reg,reg) "fsubp st1\n"
-reg: CVFD(reg) "# CVFD\n"
-reg: CVDF(reg) "sub esp,4\nfstp dword [esp]\nfld dword [esp]\nadd esp,4\n" 12
-
-stmt: ASGNI(addr,CVDI(reg)) "fistp dword %0\n" 29
-reg: CVDI(reg) "sub esp,4\nfistp dword [esp]\npop %c\n" 31
-
-reg: CVID(INDIRI(addr)) "fild dword %0\n" 10
-reg: CVID(reg) "push %0\nfild dword [esp]\nadd esp,4\n" 12
-
-addrj: ADDRGP "%a"
-addrj: reg "%0" 2
-addrj: mem "%0" 2
-
-stmt: JUMPV(addrj) "jmp %0\n" 3
-stmt: LABELV "%a:\n"
-stmt: EQI(mem,rc) "cmp %0,%1\nje near %a\n" 5
-stmt: GEI(mem,rc) "cmp %0,%1\njge near %a\n" 5
-stmt: GTI(mem,rc) "cmp %0,%1\njg near %a\n" 5
-stmt: LEI(mem,rc) "cmp %0,%1\njle near %a\n" 5
-stmt: LTI(mem,rc) "cmp %0,%1\njl near %a\n" 5
-stmt: NEI(mem,rc) "cmp %0,%1\njne near %a\n" 5
-stmt: GEU(mem,rc) "cmp %0,%1\njae near %a\n" 5
-stmt: GTU(mem,rc) "cmp %0,%1\nja near %a\n" 5
-stmt: LEU(mem,rc) "cmp %0,%1\njbe near %a\n" 5
-stmt: LTU(mem,rc) "cmp %0,%1\njb near %a\n" 5
-stmt: EQI(reg,mrc1) "cmp %0,%1\nje near %a\n" 4
-stmt: GEI(reg,mrc1) "cmp %0,%1\njge near %a\n" 4
-stmt: GTI(reg,mrc1) "cmp %0,%1\njg near %a\n" 4
-stmt: LEI(reg,mrc1) "cmp %0,%1\njle near %a\n" 4
-stmt: LTI(reg,mrc1) "cmp %0,%1\njl near %a\n" 4
-stmt: NEI(reg,mrc1) "cmp %0,%1\njne near %a\n" 4
-
-stmt: GEU(reg,mrc1) "cmp %0,%1\njae near %a\n" 4
-stmt: GTU(reg,mrc1) "cmp %0,%1\nja near %a\n" 4
-stmt: LEU(reg,mrc1) "cmp %0,%1\njbe near %a\n" 4
-stmt: LTU(reg,mrc1) "cmp %0,%1\njb near %a\n" 4
-cmpf: memf " %0"
-cmpf: reg "p"
-stmt: EQD(cmpf,reg) "fcomp%0\nfstsw ax\nsahf\nje near %a\n"
-stmt: GED(cmpf,reg) "fcomp%0\nfstsw ax\nsahf\njbe near %a\n"
-stmt: GTD(cmpf,reg) "fcomp%0\nfstsw ax\nsahf\njb near %a\n"
-stmt: LED(cmpf,reg) "fcomp%0\nfstsw ax\nsahf\njae near %a\n"
-stmt: LTD(cmpf,reg) "fcomp%0\nfstsw ax\nsahf\nja near %a\n"
-stmt: NED(cmpf,reg) "fcomp%0\nfstsw ax\nsahf\njne near %a\n"
-
-stmt: EQF(cmpf,reg) "fcomp%0\nfstsw ax\nsahf\nje near %a\n"
-stmt: GEF(cmpf,reg) "fcomp%0\nfstsw ax\nsahf\njbe near %a\n"
-stmt: GTF(cmpf,reg) "fcomp%0\nfstsw ax\nsahf\njb near %a\n"
-stmt: LEF(cmpf,reg) "fcomp%0\nfstsw ax\nsahf\njae near %a\n"
-stmt: LTF(cmpf,reg) "fcomp%0\nfstsw ax\nsahf\nja near %a\n"
-stmt: NEF(cmpf,reg) "fcomp%0\nfstsw ax\nsahf\njne near %a\n"
-reg: CALLI(addrj) "call %0\nadd esp,%a\n"
-stmt: CALLV(addrj) "call %0\nadd esp,%a\n"
-reg: CALLF(addrj) "call %0\nadd esp,%a\n"
-reg: CALLD(addrj) "call %0\nadd esp,%a\n"
-
-stmt: RETI(reg) "# ret\n"
-stmt: RETF(reg) "# ret\n"
-stmt: RETD(reg) "# ret\n"
-%%
-static void progbeg(argc, argv) int argc; char *argv[]; {
- int i;
-
- {
- union {
- char c;
- int i;
- } u;
- u.i = 0;
- u.c = 1;
- swap = (u.i == 1) != IR->little_endian;
- }
- parseflags(argc, argv);
- intreg[EAX] = mkreg("eax", EAX, 1, IREG);
- intreg[EDX] = mkreg("edx", EDX, 1, IREG);
- intreg[ECX] = mkreg("ecx", ECX, 1, IREG);
- intreg[EBX] = mkreg("ebx", EBX, 1, IREG);
- intreg[ESI] = mkreg("esi", ESI, 1, IREG);
- intreg[EDI] = mkreg("edi", EDI, 1, IREG);
- shortreg[EAX] = mkreg("ax", EAX, 1, IREG);
- shortreg[ECX] = mkreg("cx", ECX, 1, IREG);
- shortreg[EDX] = mkreg("dx", EDX, 1, IREG);
- shortreg[EBX] = mkreg("bx", EBX, 1, IREG);
- shortreg[ESI] = mkreg("si", ESI, 1, IREG);
- shortreg[EDI] = mkreg("di", EDI, 1, IREG);
-
- charreg[EAX] = mkreg("al", EAX, 1, IREG);
- charreg[ECX] = mkreg("cl", ECX, 1, IREG);
- charreg[EDX] = mkreg("dl", EDX, 1, IREG);
- charreg[EBX] = mkreg("bl", EBX, 1, IREG);
- for (i = 0; i < 8; i++)
- fltreg[i] = mkreg("%d", i, 0, FREG);
- rmap[C] = mkwildcard(charreg);
- rmap[S] = mkwildcard(shortreg);
- rmap[P] = rmap[B] = rmap[U] = rmap[I] = mkwildcard(intreg);
- rmap[F] = rmap[D] = mkwildcard(fltreg);
- tmask[IREG] = (1<<EDI) | (1<<ESI) | (1<<EBX)
- | (1<<EDX) | (1<<ECX) | (1<<EAX);
- vmask[IREG] = 0;
- tmask[FREG] = 0xff;
- vmask[FREG] = 0;
- cseg = 0;
- quo = mkreg("eax", EAX, 1, IREG);
- quo->x.regnode->mask |= 1<<EDX;
- rem = mkreg("edx", EDX, 1, IREG);
- rem->x.regnode->mask |= 1<<EAX;
-}
-static void segment(n) int n; {
- if (n == cseg)
- return;
- cseg = n;
- if (cseg == CODE)
- print("[section .text]\n");
- else if (cseg == DATA || cseg == LIT)
- print("[section .data]\n");
- else if (cseg == BSS)
- print("[section .bss]\n");
-}
-static void progend() {
-
-}
-static void target(p) Node p; {
- assert(p);
- switch (p->op) {
- case RSHI: case RSHU: case LSHI: case LSHU:
- if (generic(p->kids[1]->op) != CNST
- && !( generic(p->kids[1]->op) == INDIR
- && p->kids[1]->kids[0]->op == VREG+P
- && p->kids[1]->syms[RX]->u.t.cse
- && generic(p->kids[1]->syms[RX]->u.t.cse->op) == CNST
-)) {
- rtarget(p, 1, intreg[ECX]);
- setreg(p, intreg[EAX]);
- }
- break;
- case MULU:
- setreg(p, quo);
- rtarget(p, 0, intreg[EAX]);
- break;
- case DIVI: case DIVU:
- setreg(p, quo);
- rtarget(p, 0, intreg[EAX]);
- rtarget(p, 1, intreg[ECX]);
- break;
- case MODI: case MODU:
- setreg(p, rem);
- rtarget(p, 0, intreg[EAX]);
- rtarget(p, 1, intreg[ECX]);
- break;
- case ASGNB:
- rtarget(p, 0, intreg[EDI]);
- rtarget(p->kids[1], 0, intreg[ESI]);
- break;
- case ARGB:
- rtarget(p->kids[0], 0, intreg[ESI]);
- break;
- case CALLI: case CALLV:
- setreg(p, intreg[EAX]);
- break;
- case RETI:
- rtarget(p, 0, intreg[EAX]);
- break;
- }
-}
-
-static void clobber(p) Node p; {
- static int nstack = 0;
-
- assert(p);
- nstack = ckstack(p, nstack);
- assert(p->count > 0 || nstack == 0);
- switch (p->op) {
- case ASGNB: case ARGB:
- spill(1<<ECX | 1<<ESI | 1<<EDI, IREG, p);
- break;
- case EQD: case LED: case GED: case LTD: case GTD: case NED:
- case EQF: case LEF: case GEF: case LTF: case GTF: case NEF:
- spill(1<<EAX, IREG, p);
- break;
- case CALLD: case CALLF:
- spill(1<<EDX | 1<<EAX, IREG, p);
- break;
- }
-}
-#define isfp(p) (optype((p)->op)==F || optype((p)->op)==D)
-
-static int ckstack(p, n) Node p; int n; {
- int i;
-
- for (i = 0; i < NELEMS(p->x.kids) && p->x.kids[i]; i++)
- if (isfp(p->x.kids[i]))
- n--;
- if (isfp(p) && p->count > 0)
- n++;
- if (n > 8)
- error("expression too complicated\n");
- debug(fprint(2, "(ckstack(%x)=%d)\n", p, n));
- assert(n >= 0);
- return n;
-}
-static int memop(p) Node p; {
- assert(p);
- assert(generic(p->op) == ASGN);
- assert(p->kids[0]);
- assert(p->kids[1]);
- if (generic(p->kids[1]->kids[0]->op) == INDIR
- && sametree(p->kids[0], p->kids[1]->kids[0]->kids[0]))
- return 3;
- else
- return LBURG_MAX;
-}
-static int sametree(p, q) Node p, q; {
- return p == NULL && q == NULL
- || p && q && p->op == q->op && p->syms[0] == q->syms[0]
- && sametree(p->kids[0], q->kids[0])
- && sametree(p->kids[1], q->kids[1]);
-}
-static void emit2(p) Node p; {
-#define preg(f) ((f)[getregnum(p->x.kids[0])]->x.name)
-
- if (p->op == CVCI)
- print("movsx %s,%s\n", p->syms[RX]->x.name
-, preg(charreg));
- else if (p->op == CVCU)
- print("movzx %s,%s\n", p->syms[RX]->x.name
-, preg(charreg));
- else if (p->op == CVSI)
- print("movsx %s,%s\n", p->syms[RX]->x.name
-, preg(shortreg));
- else if (p->op == CVSU)
- print("movzx %s,%s\n", p->syms[RX]->x.name
-, preg(shortreg));
- else if (p->op == CVIC || p->op == CVIS
- || p->op == CVUC || p->op == CVUS) {
- char *dst = shortreg[getregnum(p)]->x.name;
- char *src = preg(shortreg);
- if (dst != src)
- print("mov %s,%s\n", dst, src);
- }
-}
-
-static void doarg(p) Node p; {
- assert(p && p->syms[0]);
- mkactual(4, p->syms[0]->u.c.v.i);
-}
-static void blkfetch(k, off, reg, tmp)
-int k, off, reg, tmp; {}
-static void blkstore(k, off, reg, tmp)
-int k, off, reg, tmp; {}
-static void blkloop(dreg, doff, sreg, soff, size, tmps)
-int dreg, doff, sreg, soff, size, tmps[]; {}
-static void local(p) Symbol p; {
- if (isfloat(p->type))
- p->sclass = AUTO;
- if (askregvar(p, rmap[ttob(p->type)]) == 0)
- mkauto(p);
-}
-static void function(f, caller, callee, n)
-Symbol f, callee[], caller[]; int n; {
- int i;
-
- print("%s:\n", f->x.name);
- print("push ebx\n");
- print("push esi\n");
- print("push edi\n");
- print("push ebp\n");
- print("mov ebp,esp\n");
-usedmask[0] = usedmask[1] = 0;
-freemask[0] = freemask[1] = ~(unsigned)0;
- offset = 16 + 4;
- for (i = 0; callee[i]; i++) {
- Symbol p = callee[i];
- Symbol q = caller[i];
- assert(q);
- p->x.offset = q->x.offset = offset;
- p->x.name = q->x.name = stringf("%d", p->x.offset);
- p->sclass = q->sclass = AUTO;
- offset += roundup(q->type->size, 4);
- }
- assert(caller[i] == 0);
- offset = maxoffset = 0;
- gencode(caller, callee);
- framesize = roundup(maxoffset, 4);
- if (framesize > 0)
- print("sub esp,%d\n", framesize);
- emitcode();
- print("mov esp,ebp\n");
- print("pop ebp\n");
- print("pop edi\n");
- print("pop esi\n");
- print("pop ebx\n");
- print("ret\n");
-}
-static void defsymbol(p) Symbol p; {
- if (p->scope >= LOCAL && p->sclass == STATIC)
- p->x.name = stringf("L%d", genlabel(1));
- else if (p->generated)
- p->x.name = stringf("$L%s", p->name);
- else if (p->scope == GLOBAL || p->sclass == EXTERN)
- /* CHANGE THIS FOR a.out */
-#if 0
- p->x.name = stringf("$_%s", p->name);
-#else
- p->x.name = stringf("$%s", p->name);
-#endif
- else if (p->scope == CONSTANTS
- && (isint(p->type) || isptr(p->type))
- && p->name[0] == '0' && p->name[1] == 'x')
- p->x.name = stringf("0%sH", &p->name[2]);
- else
- p->x.name = p->name;
-}
-static void address(q, p, n) Symbol q, p; int n; {
- if (p->scope == GLOBAL
- || p->sclass == STATIC || p->sclass == EXTERN)
- q->x.name = stringf("%s%s%d",
- p->x.name, n >= 0 ? "+" : "", n);
- else {
- q->x.offset = p->x.offset + n;
- q->x.name = stringd(q->x.offset);
- }
-}
-static void defconst(ty, v) int ty; Value v; {
- switch (ty) {
- case C: print("db %d\n", v.uc); return;
- case S: print("dw %d\n", v.ss); return;
- case I: print("dd %d\n", v.i ); return;
- case U: print("dd 0%xH\n", v.u ); return;
- case P: print("dd 0%xH\n", v.p ); return;
- case F:
- print("dd 0%xH\n", *(unsigned *)&v.f);
- return;
- case D: {
- unsigned *p = (unsigned *)&v.d;
- print("dd 0%xH,0%xH\n", p[swap], p[1 - swap]);
- return;
- }
- }
- assert(0);
-}
-static void defaddress(p) Symbol p; {
- print("dd %s\n", p->x.name);
-}
-static void defstring(n, str) int n; char *str; {
- char *s;
- int inquote = 1;
-
- print("db '");
-
- for (s = str; s < str + n; s++)
- {
- if ((*s & 0x7F) == *s && *s >= ' ' && *s != '\'') {
- if (!inquote){
- print(", '");
- inquote = 1;
- }
- print("%c",*s);
- }
- else
- {
- if (inquote){
- print("', ");
- inquote = 0;
- }
- else
- print(", ");
- print("%d",*s);
- }
- }
- if (inquote) print("'");
- print("\n");
-}
-static void export(p) Symbol p; {
- print("[global %s]\n", p->x.name);
-}
-static void import(p) Symbol p; {
- if (p->ref > 0) {
- print("[extern %s]\n", p->x.name);
- }
-}
-static void global(p) Symbol p; {
- int i;
-
- if (p->u.seg == BSS)
- print("resb ($-$$) & %d\n",
- p->type->align > 4 ? 3 : p->type->align-1);
- else
- print("times ($-$$) & %d nop\n",
- p->type->align > 4 ? 3 : p->type->align-1);
- print("%s:\n", p->x.name);
- if (p->u.seg == BSS)
- print("resb %d\n", p->type->size);
-}
-static void space(n) int n; {
- int i;
-
- if (cseg != BSS)
- print("times %d db 0\n", n);
-}
-Interface x86nasmIR = {
- 1, 1, 0, /* char */
- 2, 2, 0, /* short */
- 4, 4, 0, /* int */
- 4, 4, 1, /* float */
- 8, 4, 1, /* double */
- 4, 4, 0, /* T * */
- 0, 4, 0, /* struct; so that ARGB keeps stack aligned */
- 1, /* little_endian */
- 0, /* mulops_calls */
- 0, /* wants_callb */
- 1, /* wants_argb */
- 0, /* left_to_right */
- 0, /* wants_dag */
- address,
- blockbeg,
- blockend,
- defaddress,
- defconst,
- defstring,
- defsymbol,
- emit,
- export,
- function,
- gen,
- global,
- import,
- local,
- progbeg,
- progend,
- segment,
- space,
- 0, 0, 0, 0, 0, 0, 0,
- {1, blkfetch, blkstore, blkloop,
- _label,
- _rule,
- _nts,
- _kids,
- _opname,
- _arity,
- _string,
- _templates,
- _isinstruction,
- _ntname,
- emit2,
- doarg,
- target,
- clobber,
-}
-};
diff --git a/macros.c b/macros.c
index 8f97009..6b6dcf2 100644
--- a/macros.c
+++ b/macros.c
@@ -4,6 +4,7 @@
* version.mac
* ./macros/altreg.mac
* ./macros/fp.mac
+ * ./macros/ifunc.mac
* ./macros/smartalign.mac
* ./output/outaout.mac
* ./output/outas86.mac
@@ -168,12 +169,12 @@ const unsigned char nasm_stdmac[] = {
/* From version.mac */
/* 1701 */ 195,'_','_','N','A','S','M','_','M','A','J','O','R','_','_',' ','2',0,
- /* 1719 */ 195,'_','_','N','A','S','M','_','M','I','N','O','R','_','_',' ','9',0,
- /* 1737 */ 195,'_','_','N','A','S','M','_','S','U','B','M','I','N','O','R','_','_',' ','8',0,
- /* 1758 */ 195,'_','_','N','A','S','M','_','P','A','T','C','H','L','E','V','E','L','_','_',' ','0',0,
- /* 1781 */ 195,'_','_','N','A','S','M','_','V','E','R','S','I','O','N','_','I','D','_','_',' ','0','0','2','0','9','0','8','0','0','h',0,
- /* 1813 */ 195,'_','_','N','A','S','M','_','V','E','R','_','_',' ', 34,'2','.','0','9','.','0','8', 34,0,
- /* 1837 */ 0
+ /* 1719 */ 195,'_','_','N','A','S','M','_','M','I','N','O','R','_','_',' ','1','0',0,
+ /* 1738 */ 195,'_','_','N','A','S','M','_','S','U','B','M','I','N','O','R','_','_',' ','7',0,
+ /* 1759 */ 195,'_','_','N','A','S','M','_','P','A','T','C','H','L','E','V','E','L','_','_',' ','0',0,
+ /* 1782 */ 195,'_','_','N','A','S','M','_','V','E','R','S','I','O','N','_','I','D','_','_',' ','0','0','2','0','A','0','7','0','0','h',0,
+ /* 1814 */ 195,'_','_','N','A','S','M','_','V','E','R','_','_',' ', 34,'2','.','1','0','.','0','7', 34,0,
+ /* 1838 */ 0
};
#endif
@@ -258,6 +259,19 @@ static const unsigned char nasm_stdmac_fp[] = {
#endif
#if 1
+static const unsigned char nasm_stdmac_ifunc[] = {
+ /* From ./macros/ifunc.mac */
+ /* 0 */ 195,'_','_','U','S','E','_','I','F','U','N','C','_','_',0,
+ /* 15 */ 209,'i','l','o','g','2','(','x',')', 9,'(','_','_','i','l','o','g','2','e','_','_','(','x',')',')',0,
+ /* 41 */ 209,'i','l','o','g','2','e','(','x',')', 9,'(','_','_','i','l','o','g','2','e','_','_','(','x',')',')',0,
+ /* 68 */ 209,'i','l','o','g','2','w','(','x',')', 9,'(','_','_','i','l','o','g','2','w','_','_','(','x',')',')',0,
+ /* 95 */ 209,'i','l','o','g','2','f','(','x',')', 9,'(','_','_','i','l','o','g','2','f','_','_','(','x',')',')',0,
+ /* 122 */ 209,'i','l','o','g','2','c','(','x',')', 9,'(','_','_','i','l','o','g','2','c','_','_','(','x',')',')',0,
+ /* 149 */ 0
+};
+#endif
+
+#if 1
static const unsigned char nasm_stdmac_smartalign[] = {
/* From ./macros/smartalign.mac */
/* 0 */ 195,'_','_','U','S','E','_','S','M','A','R','T','A','L','I','G','N','_','_',0,
@@ -526,21 +540,22 @@ const unsigned char *nasm_stdmac_find_package(const char *package)
static const struct {
const char *package;
const unsigned char *macros;
- } packages[3] = {
+ } packages[4] = {
{ "altreg", nasm_stdmac_altreg },
{ "fp", nasm_stdmac_fp },
+ { "ifunc", nasm_stdmac_ifunc },
{ "smartalign", nasm_stdmac_smartalign },
};
#define UNUSED 16383
static const int16_t hash1[4] = {
0,
- UNUSED,
- 1,
+ 0,
+ 2,
-1,
};
static const int16_t hash2[4] = {
1,
- UNUSED,
+ 2,
UNUSED,
UNUSED,
};
@@ -553,7 +568,7 @@ const unsigned char *nasm_stdmac_find_package(const char *package)
k2 = (uint32_t)(crc >> 32);
ix = hash1[k1 & 0x3] + hash2[k2 & 0x3];
- if (ix >= 3)
+ if (ix >= 4)
return NULL;
if (nasm_stricmp(packages[ix].package, package))
diff --git a/macros.pl b/macros.pl
index 911da8d..14524ec 100755
--- a/macros.pl
+++ b/macros.pl
@@ -57,12 +57,14 @@ sub charcify(@) {
if ($o < 32 || $o > 126 || $c eq '"' || $c eq "\\") {
$l .= sprintf("%3d,", $o);
} else {
+ $c =~ s/\'/\\'/; # << sanitize single quote.
$l .= "\'".$c."\',";
}
}
return $l;
}
+
#
# Generate macros.c
#
diff --git a/macros/ifunc.mac b/macros/ifunc.mac
new file mode 100644
index 0000000..fc0d313
--- /dev/null
+++ b/macros/ifunc.mac
@@ -0,0 +1,46 @@
+;; --------------------------------------------------------------------------
+;;
+;; Copyright 2012 The NASM Authors - All Rights Reserved
+;; See the file AUTHORS included with the NASM distribution for
+;; the specific copyright holders.
+;;
+;; Redistribution and use in source and binary forms, with or without
+;; modification, are permitted provided that the following
+;; conditions are met:
+;;
+;; * Redistributions of source code must retain the above copyright
+;; notice, this list of conditions and the following disclaimer.
+;; * Redistributions in binary form must reproduce the above
+;; copyright notice, this list of conditions and the following
+;; disclaimer in the documentation and/or other materials provided
+;; with the distribution.
+;;
+;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+;; CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+;; INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+;; MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+;; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+;; NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+;; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+;; HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+;; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+;; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;; EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+;; --------------------------------------------------------------------------
+
+;;
+;; ifunc.mac
+;;
+;; Integer function utility macros
+;;
+
+USE: ifunc
+
+%idefine ilog2(x) (__ilog2e__(x))
+%idefine ilog2e(x) (__ilog2e__(x))
+%idefine ilog2w(x) (__ilog2w__(x))
+%idefine ilog2f(x) (__ilog2f__(x))
+%idefine ilog2c(x) (__ilog2c__(x))
diff --git a/misc/release b/misc/release
index 9b8cffa..0abaf77 100755
--- a/misc/release
+++ b/misc/release
@@ -50,14 +50,16 @@ cd ..
# Clean up any previous attempt
rm -f ../nasm-"$version".tar.gz ../nasm-"$version"-xdoc.tar.gz
rm -f ../nasm-"$version".tar.bz2 ../nasm-"$version"-xdoc.tar.bz2
+rm -f ../nasm-"$version".tar.xz ../nasm-"$version"-xdoc.tar.xz
rm -f ../nasm-"$version".zip ../nasm-"$version"-xdoc.zip
# Create tarfile (Unix convention: file includes prefix)
mv nasm nasm-"$version"
tar cvvf nasm-"$version".tar nasm-"$version"
-bzip2 -9k nasm-"$version".tar
-gzip -9 nasm-"$version".tar
-mv nasm-"$version".tar.gz nasm-"$version".tar.bz2 ..
+xz -9ek nasm-"$version".tar
+bzip2 -9k nasm-"$version".tar
+gzip -9 nasm-"$version".tar
+mv nasm-"$version".tar.gz nasm-"$version".tar.bz2 nasm-"$version".tar.xz ..
# Create zipfile (DOS convention: no prefix, convert file endings)
cd nasm-"$version"
@@ -78,12 +80,15 @@ cd ..
# Remove non-documentation
cat main | xargs rm -f
+# Delete empty subdirectories
+find nasm-"$version"/doc -type d -exec rmdir '{}' \; 2>/dev/null || true
# Create doc tarfile
tar cvvf nasm-"$version"-xdoc.tar nasm-"$version"/doc
-bzip2 -9k nasm-"$version"-xdoc.tar
-gzip -9 nasm-"$version"-xdoc.tar
-mv nasm-"$version"-xdoc.tar.gz nasm-"$version"-xdoc.tar.bz2 ..
+xz -9ek nasm-"$version"-xdoc.tar
+bzip2 -9k nasm-"$version"-xdoc.tar
+gzip -9 nasm-"$version"-xdoc.tar
+mv nasm-"$version"-xdoc.tar.gz nasm-"$version"-xdoc.tar.bz2 nasm-"$version"-xdoc.tar.xz ..
# Create doc zipfile (DOS convention: no prefix, convert file endings)
# (Note: generating Win .hlp files requires additional tools)
diff --git a/misc/tag-release b/misc/tag-release
index c42bbd5..62e3eba 100755
--- a/misc/tag-release
+++ b/misc/tag-release
@@ -43,8 +43,10 @@ git commit -m "NASM $version"
git tag -a -m "NASM $version" "$tag"
if [ $push = 1 ]; then
- echo "git push $repo $branch"
- echo "git push $repo $tag"
- echo "git push --tags $repo"
+ set -x
+ git push $repo $branch
+ git push $repo $tag
+ git push --tags $repo
+ set +x
fi
diff --git a/nasm.1 b/nasm.1
index 257517e..bca0cd5 100644
--- a/nasm.1
+++ b/nasm.1
@@ -150,13 +150,13 @@ Emit phony target
Optimize branch offsets.
.ti
.B \-O0
-:No optimization (default)
+:No optimization
.ti
.B \-O1
:Minimal optimization
.ti
.B \-Ox
-:Multipass optimization (recommended)
+:Multipass optimization (default)
.TP
.BI \-o " outfile"
Specifies a precise name for the output file, overriding
diff --git a/nasm.c b/nasm.c
index 36be46e..2ee319f 100644
--- a/nasm.c
+++ b/nasm.c
@@ -1,6 +1,6 @@
/* ----------------------------------------------------------------------- *
*
- * Copyright 1996-2011 The NASM Authors - All Rights Reserved
+ * Copyright 1996-2012 The NASM Authors - All Rights Reserved
* See the file AUTHORS included with the NASM distribution for
* the specific copyright holders.
*
@@ -122,7 +122,8 @@ static struct RAA *offsets;
static struct SAA *forwrefs; /* keep track of forward references */
static const struct forwrefinfo *forwref;
-static Preproc *preproc;
+static struct preproc_ops *preproc;
+
enum op_type {
op_normal, /* Preprocess and assemble */
op_preprocess, /* Preprocess only */
@@ -160,21 +161,8 @@ static const struct warning {
{"float-underflow", "floating point underflow", false},
{"float-toolong", "too many digits in floating-point number", true},
{"user", "%warning directives", true},
-};
-
-/*
- * This is a null preprocessor which just copies lines from input
- * to output. It's used when someone explicitly requests that NASM
- * not preprocess their source file.
- */
-
-static void no_pp_reset(char *, int, ListGen *, StrList **);
-static char *no_pp_getline(void);
-static void no_pp_cleanup(int);
-static Preproc no_pp = {
- no_pp_reset,
- no_pp_getline,
- no_pp_cleanup
+ {"lock", "lock prefix on unlockable instructions", true},
+ {"hle", "invalid hle prefixes", true},
};
/*
@@ -189,6 +177,8 @@ static bool want_usage;
static bool terminate_after_phase;
int user_nolist = 0; /* fbk 9/2/00 */
+static char *quote_for_make(const char *str);
+
static void nasm_fputs(const char *line, FILE * outfile)
{
if (outfile) {
@@ -229,13 +219,13 @@ static void define_macros_early(void)
lt = *lt_p;
strftime(temp, sizeof temp, "__DATE__=\"%Y-%m-%d\"", &lt);
- pp_pre_define(temp);
+ preproc->pre_define(temp);
strftime(temp, sizeof temp, "__DATE_NUM__=%Y%m%d", &lt);
- pp_pre_define(temp);
+ preproc->pre_define(temp);
strftime(temp, sizeof temp, "__TIME__=\"%H:%M:%S\"", &lt);
- pp_pre_define(temp);
+ preproc->pre_define(temp);
strftime(temp, sizeof temp, "__TIME_NUM__=%H%M%S", &lt);
- pp_pre_define(temp);
+ preproc->pre_define(temp);
}
gm_p = gmtime(&official_compile_time);
@@ -243,13 +233,13 @@ static void define_macros_early(void)
gm = *gm_p;
strftime(temp, sizeof temp, "__UTC_DATE__=\"%Y-%m-%d\"", &gm);
- pp_pre_define(temp);
+ preproc->pre_define(temp);
strftime(temp, sizeof temp, "__UTC_DATE_NUM__=%Y%m%d", &gm);
- pp_pre_define(temp);
+ preproc->pre_define(temp);
strftime(temp, sizeof temp, "__UTC_TIME__=\"%H:%M:%S\"", &gm);
- pp_pre_define(temp);
+ preproc->pre_define(temp);
strftime(temp, sizeof temp, "__UTC_TIME_NUM__=%H%M%S", &gm);
- pp_pre_define(temp);
+ preproc->pre_define(temp);
}
if (gm_p)
@@ -261,7 +251,7 @@ static void define_macros_early(void)
if (posix_time) {
snprintf(temp, sizeof temp, "__POSIX_TIME__=%"PRId64, posix_time);
- pp_pre_define(temp);
+ preproc->pre_define(temp);
}
}
@@ -276,7 +266,7 @@ static void define_macros_late(void)
*/
snprintf(temp, sizeof(temp), "__OUTPUT_FORMAT__=%s",
ofmt_alias ? ofmt_alias->shortname : ofmt->shortname);
- pp_pre_define(temp);
+ preproc->pre_define(temp);
}
static void emit_dependencies(StrList *list)
@@ -298,13 +288,15 @@ static void emit_dependencies(StrList *list)
linepos = fprintf(deps, "%s:", depend_target);
list_for_each(l, list) {
- len = strlen(l->str);
- if (linepos + len > 62) {
+ char *file = quote_for_make(l->str);
+ len = strlen(file);
+ if (linepos + len > 62 && linepos > 1) {
fprintf(deps, " \\\n ");
linepos = 1;
}
- fprintf(deps, " %s", l->str);
+ fprintf(deps, " %s", file);
linepos += len+1;
+ nasm_free(file);
}
fprintf(deps, "\n\n");
@@ -358,7 +350,7 @@ int main(int argc, char **argv)
ofmt->current_dfmt = &null_debug_form;
if (ofmt->stdmac)
- pp_extra_stdmac(ofmt->stdmac);
+ preproc->extra_stdmac(ofmt->stdmac);
parser_global_info(&location);
eval_global_info(ofmt, lookup_label, &location);
@@ -368,7 +360,7 @@ int main(int argc, char **argv)
depend_ptr = (depend_file || (operating_mode == op_depend))
? &depend_list : NULL;
if (!depend_target)
- depend_target = outname;
+ depend_target = quote_for_make(outname);
switch (operating_mode) {
case op_depend:
@@ -376,7 +368,7 @@ int main(int argc, char **argv)
char *line;
if (depend_missing_ok)
- pp_include_path(NULL); /* "assume generated" */
+ preproc->include_path(NULL); /* "assume generated" */
preproc->reset(inname, 0, &nasmlist, depend_ptr);
if (outname[0] == '\0')
@@ -406,8 +398,9 @@ int main(int argc, char **argv)
location.known = false;
- /* pass = 1; */
+ /* pass = 1; */
preproc->reset(inname, 3, &nasmlist, depend_ptr);
+ memcpy(warning_on, warning_on_global, (ERR_WARN_MAX+1) * sizeof(bool));
while ((line = preproc->getline())) {
/*
@@ -714,22 +707,22 @@ static bool process_arg(char *p, char *q)
case 'p': /* pre-include */
case 'P':
- pp_pre_include(param);
+ preproc->pre_include(param);
break;
case 'd': /* pre-define */
case 'D':
- pp_pre_define(param);
+ preproc->pre_define(param);
break;
case 'u': /* un-define */
case 'U':
- pp_pre_undefine(param);
+ preproc->pre_undefine(param);
break;
case 'i': /* include search path */
case 'I':
- pp_include_path(param);
+ preproc->include_path(param);
break;
case 'l': /* listing file */
@@ -790,9 +783,9 @@ static bool process_arg(char *p, char *q)
" -I<path> adds a pathname to the include file path\n");
printf
(" -O<digit> optimize branch offsets\n"
- " -O0: No optimization (default)\n"
+ " -O0: No optimization\n"
" -O1: Minimal optimization\n"
- " -Ox: Multipass optimization (recommended)\n\n"
+ " -Ox: Multipass optimization (default)\n\n"
" -P<file> pre-includes a file\n"
" -D<macro>[=<value>] pre-defines a macro\n"
" -U<macro> undefines a macro\n"
@@ -844,7 +837,7 @@ static bool process_arg(char *p, char *q)
break;
case 'a': /* assemble only - don't preprocess */
- preproc = &no_pp;
+ preproc = &preproc_nop;
break;
case 'W':
@@ -866,20 +859,22 @@ static bool process_arg(char *p, char *q)
param++;
set_warning:
- for (i = 0; i <= ERR_WARN_MAX; i++)
- if (!nasm_stricmp(param, warnings[i].name))
- break;
- if (i <= ERR_WARN_MAX)
- warning_on_global[i] = do_warn;
- else if (!nasm_stricmp(param, "all"))
- for (i = 1; i <= ERR_WARN_MAX; i++)
- warning_on_global[i] = do_warn;
- else if (!nasm_stricmp(param, "none"))
- for (i = 1; i <= ERR_WARN_MAX; i++)
- warning_on_global[i] = !do_warn;
- else
- nasm_error(ERR_NONFATAL | ERR_NOFILE | ERR_USAGE,
- "invalid warning `%s'", param);
+ for (i = 0; i <= ERR_WARN_MAX; i++) {
+ if (!nasm_stricmp(param, warnings[i].name))
+ break;
+ }
+ if (i <= ERR_WARN_MAX) {
+ warning_on_global[i] = do_warn;
+ } else if (!nasm_stricmp(param, "all")) {
+ for (i = 1; i <= ERR_WARN_MAX; i++)
+ warning_on_global[i] = do_warn;
+ } else if (!nasm_stricmp(param, "none")) {
+ for (i = 1; i <= ERR_WARN_MAX; i++)
+ warning_on_global[i] = !do_warn;
+ } else {
+ nasm_error(ERR_NONFATAL | ERR_NOFILE | ERR_USAGE,
+ "invalid warning `%s'", param);
+ }
break;
case 'M':
@@ -1092,18 +1087,18 @@ static void process_response_file(const char *file)
static void parse_cmdline(int argc, char **argv)
{
FILE *rfile;
- char *envreal, *envcopy = NULL, *p, *arg;
+ char *envreal, *envcopy = NULL, *p;
int i;
*inname = *outname = *listname = *errname = '\0';
+
for (i = 0; i <= ERR_WARN_MAX; i++)
- warning_on_global[i] = warnings[i].enabled;
+ warning_on_global[i] = warnings[i].enabled;
/*
* First, process the NASMENV environment variable.
*/
envreal = getenv("NASMENV");
- arg = NULL;
if (envreal) {
envcopy = nasm_strdup(envreal);
process_args(envcopy);
@@ -1114,23 +1109,24 @@ static void parse_cmdline(int argc, char **argv)
* Now process the actual command line.
*/
while (--argc) {
- bool advance;
+ bool advance;
argv++;
if (argv[0][0] == '@') {
- /* We have a response file, so process this as a set of
+ /*
+ * We have a response file, so process this as a set of
* arguments like the environment variable. This allows us
* to have multiple arguments on a single line, which is
* different to the -@resp file processing below for regular
* NASM.
*/
- process_response_file(argv[0]+1);
+ process_response_file(argv[0]+1);
argc--;
argv++;
}
if (!stopoptions && argv[0][0] == '-' && argv[0][1] == '@') {
- p = get_param(argv[0], argc > 1 ? argv[1] : NULL, &advance);
+ p = get_param(argv[0], argc > 1 ? argv[1] : NULL, &advance);
if (p) {
- rfile = fopen(p, "r");
+ rfile = fopen(p, "r");
if (rfile) {
process_respfile(rfile);
fclose(rfile);
@@ -1143,27 +1139,29 @@ static void parse_cmdline(int argc, char **argv)
argv += advance, argc -= advance;
}
- /* Look for basic command line typos. This definitely doesn't
- catch all errors, but it might help cases of fumbled fingers. */
+ /*
+ * Look for basic command line typos. This definitely doesn't
+ * catch all errors, but it might help cases of fumbled fingers.
+ */
if (!*inname)
nasm_error(ERR_NONFATAL | ERR_NOFILE | ERR_USAGE,
- "no input file specified");
- else if (!strcmp(inname, errname) ||
- !strcmp(inname, outname) ||
- !strcmp(inname, listname) ||
- (depend_file && !strcmp(inname, depend_file)))
- nasm_error(ERR_FATAL | ERR_NOFILE | ERR_USAGE,
- "file `%s' is both input and output file",
- inname);
+ "no input file specified");
+ else if (!strcmp(inname, errname) ||
+ !strcmp(inname, outname) ||
+ !strcmp(inname, listname) ||
+ (depend_file && !strcmp(inname, depend_file)))
+ nasm_error(ERR_FATAL | ERR_NOFILE | ERR_USAGE,
+ "file `%s' is both input and output file",
+ inname);
if (*errname) {
- error_file = fopen(errname, "w");
- if (!error_file) {
- error_file = stderr; /* Revert to default! */
- nasm_error(ERR_FATAL | ERR_NOFILE | ERR_USAGE,
- "cannot open file `%s' for error messages",
- errname);
- }
+ error_file = fopen(errname, "w");
+ if (!error_file) {
+ error_file = stderr; /* Revert to default! */
+ nasm_error(ERR_FATAL | ERR_NOFILE | ERR_USAGE,
+ "cannot open file `%s' for error messages",
+ errname);
+ }
}
}
@@ -1248,10 +1246,22 @@ static void assemble_file(char *fname, StrList **depend_ptr)
}
break;
case D_SECTALIGN: /* [SECTALIGN n] */
- {
- if (*value) {
- unsigned int align = atoi(value);
- if (!is_power2(align)) {
+ if (*value) {
+ stdscan_reset();
+ stdscan_set(value);
+ tokval.t_type = TOKEN_INVALID;
+ e = evaluate(stdscan, NULL, &tokval, NULL, pass2, nasm_error, NULL);
+ if (e) {
+ unsigned int align = (unsigned int)e->value;
+ if ((uint64_t)e->value > 0x7fffffff) {
+ /*
+ * FIXME: Please make some sane message here
+ * ofmt should have some 'check' method which
+ * would report segment alignment bounds.
+ */
+ nasm_error(ERR_FATAL,
+ "incorrect segment alignment `%s'", value);
+ } else if (!is_power2(align)) {
nasm_error(ERR_NONFATAL,
"segment alignment `%s' is not power of two",
value);
@@ -1895,15 +1905,20 @@ static void nasm_verror_vc(int severity, const char *fmt, va_list ap)
*/
static bool is_suppressed_warning(int severity)
{
- /*
- * See if it's a suppressed warning.
- */
- return (severity & ERR_MASK) == ERR_WARNING &&
- (((severity & ERR_WARN_MASK) != 0 &&
- !warning_on[(severity & ERR_WARN_MASK) >> ERR_WARN_SHR]) ||
- /* See if it's a pass-one only warning and we're not in pass one. */
- ((severity & ERR_PASS1) && pass0 != 1) ||
- ((severity & ERR_PASS2) && pass0 != 2));
+ /* Not a warning at all */
+ if ((severity & ERR_MASK) != ERR_WARNING)
+ return false;
+
+ /* See if it's a pass-one only warning and we're not in pass one. */
+ if (((severity & ERR_PASS1) && pass0 != 1) ||
+ ((severity & ERR_PASS2) && pass0 != 2))
+ return true;
+
+ /* Might be a warning but suppresed explicitly */
+ if (severity & ERR_WARN_MASK)
+ return !warning_on[WARN_IDX(severity)];
+ else
+ return false;
}
/**
@@ -1957,7 +1972,8 @@ static void nasm_verror_common(int severity, const char *fmt, va_list args)
/* no further action, by definition */
break;
case ERR_WARNING:
- if (warning_on[0]) /* Treat warnings as errors */
+ /* Treat warnings as errors */
+ if (warning_on[WARN_IDX(ERR_WARN_TERM)])
terminate_after_phase = true;
break;
case ERR_NONFATAL:
@@ -1986,101 +2002,6 @@ static void usage(void)
fputs("type `nasm -h' for help\n", error_file);
}
-#define BUF_DELTA 512
-
-static FILE *no_pp_fp;
-static ListGen *no_pp_list;
-static int32_t no_pp_lineinc;
-
-static void no_pp_reset(char *file, int pass, ListGen * listgen,
- StrList **deplist)
-{
- src_set_fname(nasm_strdup(file));
- src_set_linnum(0);
- no_pp_lineinc = 1;
- no_pp_fp = fopen(file, "r");
- if (!no_pp_fp)
- nasm_error(ERR_FATAL | ERR_NOFILE,
- "unable to open input file `%s'", file);
- no_pp_list = listgen;
- (void)pass; /* placate compilers */
-
- if (deplist) {
- StrList *sl = nasm_malloc(strlen(file)+1+sizeof sl->next);
- sl->next = NULL;
- strcpy(sl->str, file);
- *deplist = sl;
- }
-}
-
-static char *no_pp_getline(void)
-{
- char *buffer, *p, *q;
- int bufsize;
-
- bufsize = BUF_DELTA;
- buffer = nasm_malloc(BUF_DELTA);
- src_set_linnum(src_get_linnum() + no_pp_lineinc);
-
- while (1) { /* Loop to handle %line */
-
- p = buffer;
- while (1) { /* Loop to handle long lines */
- q = fgets(p, bufsize - (p - buffer), no_pp_fp);
- if (!q)
- break;
- p += strlen(p);
- if (p > buffer && p[-1] == '\n')
- break;
- if (p - buffer > bufsize - 10) {
- int offset;
- offset = p - buffer;
- bufsize += BUF_DELTA;
- buffer = nasm_realloc(buffer, bufsize);
- p = buffer + offset;
- }
- }
-
- if (!q && p == buffer) {
- nasm_free(buffer);
- return NULL;
- }
-
- /*
- * Play safe: remove CRs, LFs and any spurious ^Zs, if any of
- * them are present at the end of the line.
- */
- buffer[strcspn(buffer, "\r\n\032")] = '\0';
-
- if (!nasm_strnicmp(buffer, "%line", 5)) {
- int32_t ln;
- int li;
- char *nm = nasm_malloc(strlen(buffer));
- if (sscanf(buffer + 5, "%"PRId32"+%d %s", &ln, &li, nm) == 3) {
- nasm_free(src_set_fname(nm));
- src_set_linnum(ln);
- no_pp_lineinc = li;
- continue;
- }
- nasm_free(nm);
- }
- break;
- }
-
- no_pp_list->line(LIST_READ, buffer);
-
- return buffer;
-}
-
-static void no_pp_cleanup(int pass)
-{
- (void)pass; /* placate GCC */
- if (no_pp_fp) {
- fclose(no_pp_fp);
- no_pp_fp = NULL;
- }
-}
-
static uint32_t get_cpu(char *value)
{
if (!strcmp(value, "8086"))
diff --git a/nasm.h b/nasm.h
index ff77553..7422635 100644
--- a/nasm.h
+++ b/nasm.h
@@ -1,6 +1,6 @@
/* ----------------------------------------------------------------------- *
*
- * Copyright 1996-2011 The NASM Authors - All Rights Reserved
+ * Copyright 1996-2012 The NASM Authors - All Rights Reserved
* See the file AUTHORS included with the NASM distribution for
* the specific copyright holders.
*
@@ -44,8 +44,8 @@
#include <inttypes.h>
#include "nasmlib.h"
#include "preproc.h"
-#include "insnsi.h" /* For enum opcode */
-#include "directiv.h" /* For enum directive */
+#include "insnsi.h" /* For enum opcode */
+#include "directiv.h" /* For enum directive */
#include "opflags.h"
#include "regs.h"
@@ -82,7 +82,7 @@
struct ofmt;
/*
- * values for the `type' parameter to an output function.
+ * Values for the `type' parameter to an output function.
*
* Exceptions are OUT_RELxADR, which denote an x-byte relocation
* which will be a relative jump. For this we need to know the
@@ -99,36 +99,31 @@ struct ofmt;
* array.
*/
enum out_type {
- OUT_RAWDATA, /* Plain bytes */
- OUT_ADDRESS, /* An address (symbol value) */
- OUT_RESERVE, /* Reserved bytes (RESB et al) */
- OUT_REL1ADR, /* 1-byte relative address */
- OUT_REL2ADR, /* 2-byte relative address */
- OUT_REL4ADR, /* 4-byte relative address */
- OUT_REL8ADR, /* 8-byte relative address */
+ OUT_RAWDATA, /* Plain bytes */
+ OUT_ADDRESS, /* An address (symbol value) */
+ OUT_RESERVE, /* Reserved bytes (RESB et al) */
+ OUT_REL1ADR, /* 1-byte relative address */
+ OUT_REL2ADR, /* 2-byte relative address */
+ OUT_REL4ADR, /* 4-byte relative address */
+ OUT_REL8ADR, /* 8-byte relative address */
};
/*
- * -----------------------
- * Other function typedefs
- * -----------------------
+ * A label-lookup function.
*/
+typedef bool (*lfunc)(char *label, int32_t *segment, int64_t *offset);
/*
- * A label-lookup function should look like this.
- */
-typedef bool (*lfunc) (char *label, int32_t *segment, int64_t *offset);
-
-/*
- * And a label-definition function like this. The boolean parameter
+ * And a label-definition function. The boolean parameter
* `is_norm' states whether the label is a `normal' label (which
* should affect the local-label system), or something odder like
* an EQU or a segment-base symbol, which shouldn't.
*/
typedef void (*ldfunc)(char *label, int32_t segment, int64_t offset,
- char *special, bool is_norm, bool isextrn);
+ char *special, bool is_norm, bool isextrn);
+
void define_label(char *label, int32_t segment, int64_t offset,
- char *special, bool is_norm, bool isextrn);
+ char *special, bool is_norm, bool isextrn);
/*
* List-file generators should look like this:
@@ -140,12 +135,12 @@ typedef struct {
* called. The `char *' parameter is the file name to write the
* listing to.
*/
- void (*init) (char *, efunc);
+ void (*init)(char *fname, efunc error);
/*
* Called to clear stuff up and close the listing file.
*/
- void (*cleanup) (void);
+ void (*cleanup)(void);
/*
* Called to output binary data. Parameters are: the offset;
@@ -158,7 +153,7 @@ typedef struct {
* work with when doing things like uplevel(LIST_TIMES) or
* uplevel(LIST_INCBIN).
*/
- void (*output) (int32_t, const void *, enum out_type, uint64_t);
+ void (*output)(int32_t offset, const void *data, enum out_type type, uint64_t size);
/*
* Called to send a text line to the listing generator. The
@@ -166,7 +161,7 @@ typedef struct {
* whether the line came directly from an input file or is the
* result of a multi-line macro expansion.
*/
- void (*line) (int, char *);
+ void (*line)(int type, char *line);
/*
* Called to change one of the various levelled mechanisms in
@@ -181,12 +176,12 @@ typedef struct {
* macro, so anything under that level won't be expanded unless
* it includes another file.
*/
- void (*uplevel) (int);
+ void (*uplevel)(int type);
/*
* Reverse the effects of uplevel.
*/
- void (*downlevel) (int);
+ void (*downlevel)(int type);
/*
* Called on a warning or error, with the error message.
@@ -198,28 +193,39 @@ typedef struct {
* Token types returned by the scanner, in addition to ordinary
* ASCII character values, and zero for end-of-string.
*/
-enum token_type { /* token types, other than chars */
- TOKEN_INVALID = -1, /* a placeholder value */
- TOKEN_EOS = 0, /* end of string */
- TOKEN_EQ = '=', TOKEN_GT = '>', TOKEN_LT = '<', /* aliases */
- TOKEN_ID = 256, /* identifier */
- TOKEN_NUM, /* numeric constant */
- TOKEN_ERRNUM, /* malformed numeric constant */
- TOKEN_STR, /* string constant */
- TOKEN_ERRSTR, /* unterminated string constant */
- TOKEN_FLOAT, /* floating-point constant */
- TOKEN_REG, /* register name */
- TOKEN_INSN, /* instruction name */
- TOKEN_HERE, TOKEN_BASE, /* $ and $$ */
- TOKEN_SPECIAL, /* BYTE, WORD, DWORD, QWORD, FAR, NEAR, etc */
- TOKEN_PREFIX, /* A32, O16, LOCK, REPNZ, TIMES, etc */
- TOKEN_SHL, TOKEN_SHR, /* << and >> */
- TOKEN_SDIV, TOKEN_SMOD, /* // and %% */
- TOKEN_GE, TOKEN_LE, TOKEN_NE, /* >=, <= and <> (!= is same as <>) */
- TOKEN_DBL_AND, TOKEN_DBL_OR, TOKEN_DBL_XOR, /* &&, || and ^^ */
- TOKEN_SEG, TOKEN_WRT, /* SEG and WRT */
- TOKEN_FLOATIZE, /* __floatX__ */
- TOKEN_STRFUNC, /* __utf16__, __utf32__ */
+enum token_type { /* token types, other than chars */
+ TOKEN_INVALID = -1, /* a placeholder value */
+ TOKEN_EOS = 0, /* end of string */
+ TOKEN_EQ = '=',
+ TOKEN_GT = '>',
+ TOKEN_LT = '<', /* aliases */
+ TOKEN_ID = 256, /* identifier */
+ TOKEN_NUM, /* numeric constant */
+ TOKEN_ERRNUM, /* malformed numeric constant */
+ TOKEN_STR, /* string constant */
+ TOKEN_ERRSTR, /* unterminated string constant */
+ TOKEN_FLOAT, /* floating-point constant */
+ TOKEN_REG, /* register name */
+ TOKEN_INSN, /* instruction name */
+ TOKEN_HERE, /* $ */
+ TOKEN_BASE, /* $$ */
+ TOKEN_SPECIAL, /* BYTE, WORD, DWORD, QWORD, FAR, NEAR, etc */
+ TOKEN_PREFIX, /* A32, O16, LOCK, REPNZ, TIMES, etc */
+ TOKEN_SHL, /* << */
+ TOKEN_SHR, /* >> */
+ TOKEN_SDIV, /* // */
+ TOKEN_SMOD, /* %% */
+ TOKEN_GE, /* >= */
+ TOKEN_LE, /* <= */
+ TOKEN_NE, /* <> (!= is same as <>) */
+ TOKEN_DBL_AND, /* && */
+ TOKEN_DBL_OR, /* || */
+ TOKEN_DBL_XOR, /* ^^ */
+ TOKEN_SEG, /* SEG */
+ TOKEN_WRT, /* WRT */
+ TOKEN_FLOATIZE, /* __floatX__ */
+ TOKEN_STRFUNC, /* __utf16*__, __utf32*__ */
+ TOKEN_IFUNC, /* __ilog2*__ */
};
enum floatize {
@@ -236,7 +242,18 @@ enum floatize {
/* Must match the list in string_transform(), in strfunc.c */
enum strfunc {
STRFUNC_UTF16,
+ STRFUNC_UTF16LE,
+ STRFUNC_UTF16BE,
STRFUNC_UTF32,
+ STRFUNC_UTF32LE,
+ STRFUNC_UTF32BE,
+};
+
+enum ifunc {
+ IFUNC_ILOG2E,
+ IFUNC_ILOG2W,
+ IFUNC_ILOG2F,
+ IFUNC_ILOG2C,
};
size_t string_transform(char *, size_t, char **, enum strfunc);
@@ -251,16 +268,17 @@ size_t string_transform(char *, size_t, char **, enum strfunc);
* `t_type' field in the structure.
*/
struct tokenval {
- enum token_type t_type;
- char *t_charptr;
- int64_t t_integer, t_inttwo;
+ char *t_charptr;
+ int64_t t_integer;
+ int64_t t_inttwo;
+ enum token_type t_type;
};
-typedef int (*scanner) (void *private_data, struct tokenval * tv);
+typedef int (*scanner)(void *private_data, struct tokenval *tv);
struct location {
int64_t offset;
int32_t segment;
- int known;
+ int known;
};
/*
@@ -283,14 +301,14 @@ typedef struct {
/*
* Library routines to manipulate expression data types.
*/
-int is_reloc(expr *);
-int is_simple(expr *);
-int is_really_simple(expr *);
-int is_unknown(expr *);
-int is_just_unknown(expr *);
-int64_t reloc_value(expr *);
-int32_t reloc_seg(expr *);
-int32_t reloc_wrt(expr *);
+int is_reloc(expr *vect);
+int is_simple(expr *vect);
+int is_really_simple(expr *vect);
+int is_unknown(expr *vect);
+int is_just_unknown(expr *vect);
+int64_t reloc_value(expr *vect);
+int32_t reloc_seg(expr *vect);
+int32_t reloc_wrt(expr *vect);
/*
* The evaluator can also return hints about which of two registers
@@ -299,7 +317,7 @@ int32_t reloc_wrt(expr *);
*/
struct eval_hints {
int64_t base;
- int type;
+ int type;
};
/*
@@ -327,59 +345,68 @@ struct eval_hints {
* the base register in complex effective addresses.
*/
#define CRITICAL 0x100
-typedef expr *(*evalfunc) (scanner sc, void *scprivate,
- struct tokenval * tv, int *fwref, int critical,
- efunc error, struct eval_hints * hints);
+typedef expr *(*evalfunc)(scanner sc, void *scprivate,
+ struct tokenval *tv, int *fwref, int critical,
+ efunc error, struct eval_hints *hints);
/*
- * Special values for expr->type. These come after EXPR_REG_END
- * as defined in regs.h.
+ * Special values for expr->type.
+ * These come after EXPR_REG_END as defined in regs.h.
*/
-
-#define EXPR_UNKNOWN (EXPR_REG_END+1) /* forward references */
-#define EXPR_SIMPLE (EXPR_REG_END+2)
-#define EXPR_WRT (EXPR_REG_END+3)
-#define EXPR_SEGBASE (EXPR_REG_END+4)
+#define EXPR_UNKNOWN (EXPR_REG_END+1) /* forward references */
+#define EXPR_SIMPLE (EXPR_REG_END+2)
+#define EXPR_WRT (EXPR_REG_END+3)
+#define EXPR_SEGBASE (EXPR_REG_END+4)
/*
- * Linked list of strings...
+ * Linked list of strings
*/
typedef struct string_list {
- struct string_list *next;
- char str[1];
+ struct string_list *next;
+ char str[1];
} StrList;
/*
* preprocessors ought to look like this:
*/
-typedef struct preproc_ops {
+struct preproc_ops {
/*
* Called at the start of a pass; given a file name, the number
* of the pass, an error reporting function, an evaluator
* function, and a listing generator to talk to.
*/
- void (*reset) (char *, int, ListGen *, StrList **);
+ void (*reset)(char *file, int pass, ListGen *listgen, StrList **deplist);
/*
* Called to fetch a line of preprocessed source. The line
* returned has been malloc'ed, and so should be freed after
* use.
*/
- char *(*getline) (void);
+ char *(*getline)(void);
- /*
- * Called at the end of a pass.
- */
- void (*cleanup) (int);
-} Preproc;
+ /* Called at the end of a pass */
+ void (*cleanup)(int pass);
+
+ /* Additional macros specific to output format */
+ void (*extra_stdmac)(macros_t *macros);
+
+ /* Early definitions and undefinitions for macros */
+ void (*pre_define)(char *definition);
+ void (*pre_undefine)(char *definition);
+
+ /* Include file from command line */
+ void (*pre_include)(char *fname);
+
+ /* Include path from command line */
+ void (*include_path)(char *path);
+};
-extern Preproc nasmpp;
+extern struct preproc_ops nasmpp;
+extern struct preproc_ops preproc_nop;
/*
- * ----------------------------------------------------------------
* Some lexical properties of the NASM source language, included
- * here because they are shared between the parser and preprocessor
- * ----------------------------------------------------------------
+ * here because they are shared between the parser and preprocessor.
*/
/*
@@ -390,26 +417,33 @@ extern Preproc nasmpp;
* start.
*/
-#define isidstart(c) ( nasm_isalpha(c) || (c)=='_' || (c)=='.' || (c)=='?' \
- || (c)=='@' )
-#define isidchar(c) ( isidstart(c) || nasm_isdigit(c) || \
- (c)=='$' || (c)=='#' || (c)=='~' )
+#define isidstart(c) (nasm_isalpha(c) || \
+ (c) == '_' || \
+ (c) == '.' || \
+ (c) == '?' || \
+ (c) == '@')
-/* Ditto for numeric constants. */
-
-#define isnumstart(c) ( nasm_isdigit(c) || (c)=='$' )
-#define isnumchar(c) ( nasm_isalnum(c) || (c)=='_' )
+#define isidchar(c) (isidstart(c) || \
+ nasm_isdigit(c) || \
+ (c) == '$' || \
+ (c) == '#' || \
+ (c) == '~')
-/* This returns the numeric value of a given 'digit'. */
+/* Ditto for numeric constants. */
-#define numvalue(c) ((c)>='a' ? (c)-'a'+10 : (c)>='A' ? (c)-'A'+10 : (c)-'0')
+#define isnumstart(c) (nasm_isdigit(c) || (c) == '$')
+#define isnumchar(c) (nasm_isalnum(c) || (c) == '_')
/*
* Data-type flags that get passed to listing-file routines.
*/
enum {
- LIST_READ, LIST_MACRO, LIST_MACRO_NOLIST, LIST_INCLUDE,
- LIST_INCBIN, LIST_TIMES
+ LIST_READ,
+ LIST_MACRO,
+ LIST_MACRO_NOLIST,
+ LIST_INCLUDE,
+ LIST_INCBIN,
+ LIST_TIMES
};
/*
@@ -425,7 +459,7 @@ static inline bool is_register(int reg)
return reg >= EXPR_REG_START && reg < REG_ENUM_LIMIT;
}
-enum ccode { /* condition code names */
+enum ccode { /* condition code names */
C_A, C_AE, C_B, C_BE, C_C, C_E, C_G, C_GE, C_L, C_LE, C_NA, C_NAE,
C_NB, C_NBE, C_NC, C_NE, C_NG, C_NGE, C_NL, C_NLE, C_NO, C_NP,
C_NS, C_NZ, C_O, C_P, C_PE, C_PO, C_S, C_Z,
@@ -435,25 +469,23 @@ enum ccode { /* condition code names */
/*
* REX flags
*/
-#define REX_REAL 0x4f /* Actual REX prefix bits */
-#define REX_B 0x01 /* ModRM r/m extension */
-#define REX_X 0x02 /* SIB index extension */
-#define REX_R 0x04 /* ModRM reg extension */
-#define REX_W 0x08 /* 64-bit operand size */
-#define REX_L 0x20 /* Use LOCK prefix instead of REX.R */
-#define REX_P 0x40 /* REX prefix present/required */
-#define REX_H 0x80 /* High register present, REX forbidden */
-#define REX_D 0x0100 /* Instruction uses DREX instead of REX */
-#define REX_OC 0x0200 /* DREX suffix has the OC0 bit set */
-#define REX_V 0x0400 /* Instruction uses VEX/XOP instead of REX */
-#define REX_NH 0x0800 /* Instruction which doesn't use high regs */
+#define REX_REAL 0x4f /* Actual REX prefix bits */
+#define REX_B 0x01 /* ModRM r/m extension */
+#define REX_X 0x02 /* SIB index extension */
+#define REX_R 0x04 /* ModRM reg extension */
+#define REX_W 0x08 /* 64-bit operand size */
+#define REX_L 0x20 /* Use LOCK prefix instead of REX.R */
+#define REX_P 0x40 /* REX prefix present/required */
+#define REX_H 0x80 /* High register present, REX forbidden */
+#define REX_V 0x0100 /* Instruction uses VEX/XOP instead of REX */
+#define REX_NH 0x0200 /* Instruction which doesn't use high regs */
/*
* REX_V "classes" (prefixes which behave like VEX)
*/
enum vex_class {
- RV_VEX = 0, /* C4/C5 */
- RV_XOP = 1 /* 8F */
+ RV_VEX = 0, /* C4/C5 */
+ RV_XOP = 1 /* 8F */
};
/*
@@ -461,114 +493,123 @@ enum vex_class {
* prefixes, we must ensure the enumerations for prefixes and
* register names do not overlap.
*/
-enum prefixes { /* instruction prefixes */
+enum prefixes { /* instruction prefixes */
P_none = 0,
PREFIX_ENUM_START = REG_ENUM_LIMIT,
P_A16 = PREFIX_ENUM_START, P_A32, P_A64, P_ASP,
P_LOCK, P_O16, P_O32, P_O64, P_OSP,
P_REP, P_REPE, P_REPNE, P_REPNZ, P_REPZ, P_TIMES,
- P_WAIT,
+ P_WAIT, P_XACQUIRE, P_XRELEASE,
PREFIX_ENUM_LIMIT
};
-enum extop_type { /* extended operand types */
+enum extop_type { /* extended operand types */
EOT_NOTHING,
- EOT_DB_STRING, /* Byte string */
- EOT_DB_STRING_FREE, /* Byte string which should be nasm_free'd*/
- EOT_DB_NUMBER, /* Integer */
+ EOT_DB_STRING, /* Byte string */
+ EOT_DB_STRING_FREE, /* Byte string which should be nasm_free'd*/
+ EOT_DB_NUMBER, /* Integer */
};
-enum ea_flags { /* special EA flags */
- EAF_BYTEOFFS = 1, /* force offset part to byte size */
- EAF_WORDOFFS = 2, /* force offset part to [d]word size */
- EAF_TIMESTWO = 4, /* really do EAX*2 not EAX+EAX */
- EAF_REL = 8, /* IP-relative addressing */
- EAF_ABS = 16, /* non-IP-relative addressing */
- EAF_FSGS = 32 /* fs/gs segment override present */
+enum ea_flags { /* special EA flags */
+ EAF_BYTEOFFS = 1, /* force offset part to byte size */
+ EAF_WORDOFFS = 2, /* force offset part to [d]word size */
+ EAF_TIMESTWO = 4, /* really do EAX*2 not EAX+EAX */
+ EAF_REL = 8, /* IP-relative addressing */
+ EAF_ABS = 16, /* non-IP-relative addressing */
+ EAF_FSGS = 32 /* fs/gs segment override present */
};
-enum eval_hint { /* values for `hinttype' */
- EAH_NOHINT = 0, /* no hint at all - our discretion */
- EAH_MAKEBASE = 1, /* try to make given reg the base */
- EAH_NOTBASE = 2 /* try _not_ to make reg the base */
+enum eval_hint { /* values for `hinttype' */
+ EAH_NOHINT = 0, /* no hint at all - our discretion */
+ EAH_MAKEBASE = 1, /* try to make given reg the base */
+ EAH_NOTBASE = 2 /* try _not_ to make reg the base */
};
-typedef struct operand { /* operand to an instruction */
- opflags_t type; /* type of operand */
- int disp_size; /* 0 means default; 16; 32; 64 */
- enum reg_enum basereg, indexreg; /* address registers */
- int scale; /* index scale */
- int hintbase;
- enum eval_hint hinttype; /* hint as to real base register */
- int32_t segment; /* immediate segment, if needed */
- int64_t offset; /* any immediate number */
- int32_t wrt; /* segment base it's relative to */
- int eaflags; /* special EA flags */
- int opflags; /* see OPFLAG_* defines below */
+typedef struct operand { /* operand to an instruction */
+ opflags_t type; /* type of operand */
+ int disp_size; /* 0 means default; 16; 32; 64 */
+ enum reg_enum basereg;
+ enum reg_enum indexreg; /* address registers */
+ int scale; /* index scale */
+ int hintbase;
+ enum eval_hint hinttype; /* hint as to real base register */
+ int32_t segment; /* immediate segment, if needed */
+ int64_t offset; /* any immediate number */
+ int32_t wrt; /* segment base it's relative to */
+ int eaflags; /* special EA flags */
+ int opflags; /* see OPFLAG_* defines below */
} operand;
-#define OPFLAG_FORWARD 1 /* operand is a forward reference */
-#define OPFLAG_EXTERN 2 /* operand is an external reference */
-#define OPFLAG_UNKNOWN 4 /* operand is an unknown reference */
- /* (always a forward reference also) */
-
-typedef struct extop { /* extended operand */
- struct extop *next; /* linked list */
- char *stringval; /* if it's a string, then here it is */
- size_t stringlen; /* ... and here's how long it is */
- int64_t offset; /* ... it's given here ... */
- int32_t segment; /* if it's a number/address, then... */
- int32_t wrt; /* ... and here */
- enum extop_type type; /* defined above */
+#define OPFLAG_FORWARD 1 /* operand is a forward reference */
+#define OPFLAG_EXTERN 2 /* operand is an external reference */
+#define OPFLAG_UNKNOWN 4 /* operand is an unknown reference
+ * (always a forward reference also)
+ */
+
+typedef struct extop { /* extended operand */
+ struct extop *next; /* linked list */
+ char *stringval; /* if it's a string, then here it is */
+ size_t stringlen; /* ... and here's how long it is */
+ int64_t offset; /* ... it's given here ... */
+ int32_t segment; /* if it's a number/address, then... */
+ int32_t wrt; /* ... and here */
+ enum extop_type type; /* defined above */
} extop;
-/* Prefix positions: each type of prefix goes in a specific slot.
- This affects the final ordering of the assembled output, which
- shouldn't matter to the processor, but if you have stylistic
- preferences, you can change this. REX prefixes are handled
- differently for the time being.
+enum ea_type {
+ EA_INVALID, /* Not a valid EA at all */
+ EA_SCALAR, /* Scalar EA */
+ EA_XMMVSIB, /* XMM vector EA */
+ EA_YMMVSIB, /* XMM vector EA */
+};
- Note that LOCK and REP are in the same slot. This is
- an x86 architectural constraint. */
+/*
+ * Prefix positions: each type of prefix goes in a specific slot.
+ * This affects the final ordering of the assembled output, which
+ * shouldn't matter to the processor, but if you have stylistic
+ * preferences, you can change this. REX prefixes are handled
+ * differently for the time being.
+ *
+ * LOCK and REP used to be one slot; this is no longer the case since
+ * the introduction of HLE.
+ */
enum prefix_pos {
- PPS_WAIT, /* WAIT (technically not a prefix!) */
- PPS_LREP, /* Lock or REP prefix */
- PPS_SEG, /* Segment override prefix */
- PPS_OSIZE, /* Operand size prefix */
- PPS_ASIZE, /* Address size prefix */
- MAXPREFIX /* Total number of prefix slots */
+ PPS_WAIT, /* WAIT (technically not a prefix!) */
+ PPS_REP, /* REP/HLE prefix */
+ PPS_LOCK, /* LOCK prefix */
+ PPS_SEG, /* Segment override prefix */
+ PPS_OSIZE, /* Operand size prefix */
+ PPS_ASIZE, /* Address size prefix */
+ MAXPREFIX /* Total number of prefix slots */
};
/* If you need to change this, also change it in insns.pl */
#define MAX_OPERANDS 5
-typedef struct insn { /* an instruction itself */
- char *label; /* the label defined, or NULL */
- enum prefixes prefixes[MAXPREFIX]; /* instruction prefixes, if any */
- enum opcode opcode; /* the opcode - not just the string */
- enum ccode condition; /* the condition code, if Jcc/SETcc */
- int operands; /* how many operands? 0-3
- * (more if db et al) */
- int addr_size; /* address size */
- operand oprs[MAX_OPERANDS]; /* the operands, defined as above */
- extop *eops; /* extended operands */
- int eops_float; /* true if DD and floating */
- int32_t times; /* repeat count (TIMES prefix) */
- bool forw_ref; /* is there a forward reference? */
- int rex; /* Special REX Prefix */
- int drexdst; /* Destination register for DREX/VEX suffix */
- int vex_cm; /* Class and M field for VEX prefix */
- int vex_wlp; /* W, P and L information for VEX prefix */
+typedef struct insn { /* an instruction itself */
+ char *label; /* the label defined, or NULL */
+ int prefixes[MAXPREFIX]; /* instruction prefixes, if any */
+ enum opcode opcode; /* the opcode - not just the string */
+ enum ccode condition; /* the condition code, if Jcc/SETcc */
+ int operands; /* how many operands? 0-3 (more if db et al) */
+ int addr_size; /* address size */
+ operand oprs[MAX_OPERANDS]; /* the operands, defined as above */
+ extop *eops; /* extended operands */
+ int eops_float; /* true if DD and floating */
+ int32_t times; /* repeat count (TIMES prefix) */
+ bool forw_ref; /* is there a forward reference? */
+ int rex; /* Special REX Prefix */
+ int vexreg; /* Register encoded in VEX prefix */
+ int vex_cm; /* Class and M field for VEX prefix */
+ int vex_wlp; /* W, P and L information for VEX prefix */
} insn;
enum geninfo { GI_SWITCH };
+
/*
- * ------------------------------------------------------------
* The data structure defining an output format driver, and the
* interfaces to the functions therein.
- * ------------------------------------------------------------
*/
-
struct ofmt {
/*
* This is a short (one-liner) description of the type of
@@ -584,7 +625,7 @@ struct ofmt {
/*
* Output format flags.
*/
-#define OFMT_TEXT 1 /* Text file format */
+#define OFMT_TEXT 1 /* Text file format */
unsigned int flags;
/*
@@ -623,7 +664,7 @@ struct ofmt {
* and the second parameter gives the value. This function returns
* 1 if recognized, 0 if unrecognized
*/
- int (*setinfo) (enum geninfo type, char **string);
+ int (*setinfo)(enum geninfo type, char **string);
/*
* This procedure is called by assemble() to write actual
@@ -634,9 +675,9 @@ struct ofmt {
* The `type' argument specifies the type of output data, and
* usually the size as well: its contents are described below.
*/
- void (*output) (int32_t segto, const void *data,
- enum out_type type, uint64_t size,
- int32_t segment, int32_t wrt);
+ void (*output)(int32_t segto, const void *data,
+ enum out_type type, uint64_t size,
+ int32_t segment, int32_t wrt);
/*
* This procedure is called once for every symbol defined in
@@ -666,8 +707,8 @@ struct ofmt {
* been an EXTERN, a COMMON or a GLOBAL. The distinction should
* be obvious to the output format from the other parameters.
*/
- void (*symdef) (char *name, int32_t segment, int64_t offset,
- int is_global, char *special);
+ void (*symdef)(char *name, int32_t segment, int64_t offset,
+ int is_global, char *special);
/*
* This procedure is called when the source code requests a
@@ -684,7 +725,7 @@ struct ofmt {
* the segment, by setting `*bits' to 16 or 32. Or, if it
* doesn't wish to define a default, it can leave `bits' alone.
*/
- int32_t (*section) (char *name, int pass, int *bits);
+ int32_t (*section)(char *name, int pass, int *bits);
/*
* This procedure is called to modify section alignment,
@@ -705,7 +746,7 @@ struct ofmt {
* responsible for throwing an error condition if that occurs
* in pass two or in a critical expression.
*/
- int32_t (*segbase) (int32_t segment);
+ int32_t (*segbase)(int32_t segment);
/*
* This procedure is called to allow the output driver to
@@ -740,7 +781,7 @@ struct ofmt {
* The parameter `outname' points to an area of storage
* guaranteed to be at least FILENAME_MAX in size.
*/
- void (*filename) (char *inname, char *outname);
+ void (*filename)(char *inname, char *outname);
/*
* This procedure is called after assembly finishes, to allow
@@ -751,7 +792,7 @@ struct ofmt {
* One thing the cleanup routine should always do is to close
* the output file pointer.
*/
- void (*cleanup) (int debuginfo);
+ void (*cleanup)(int debuginfo);
};
/*
@@ -803,7 +844,7 @@ struct dfmt {
*/
void (*debug_deflabel)(char *name, int32_t segment, int64_t offset,
- int is_global, char *special);
+ int is_global, char *special);
/*
* debug_directive - called whenever a DEBUG directive other than 'LINE'
* is encountered. 'directive' contains the first parameter to the
@@ -859,29 +900,34 @@ extern const struct dfmt *dfmt;
#define TY_EXTERN 0xF0
#define TY_EQU 0xF8
-#define TYM_TYPE(x) ((x) & 0xF8)
+#define TYM_TYPE(x) ((x) & 0xF8)
#define TYM_ELEMENTS(x) (((x) & 0xFFFFFF00) >> 8)
-#define TYS_ELEMENTS(x) ((x) << 8)
-
-/*
- * -----
- * Special tokens
- * -----
- */
+#define TYS_ELEMENTS(x) ((x) << 8)
enum special_tokens {
- SPECIAL_ENUM_START = PREFIX_ENUM_LIMIT,
- S_ABS = SPECIAL_ENUM_START,
- S_BYTE, S_DWORD, S_FAR, S_LONG, S_NEAR, S_NOSPLIT,
- S_OWORD, S_QWORD, S_REL, S_SHORT, S_STRICT, S_TO, S_TWORD, S_WORD, S_YWORD,
+ SPECIAL_ENUM_START = PREFIX_ENUM_LIMIT,
+ S_ABS = SPECIAL_ENUM_START,
+ S_BYTE,
+ S_DWORD,
+ S_FAR,
+ S_LONG,
+ S_NEAR,
+ S_NOSPLIT,
+ S_OWORD,
+ S_QWORD,
+ S_REL,
+ S_SHORT,
+ S_STRICT,
+ S_TO,
+ S_TWORD,
+ S_WORD,
+ S_YWORD,
SPECIAL_ENUM_LIMIT
};
/*
- * -----
* Global modes
- * -----
*/
/*
@@ -893,13 +939,13 @@ enum special_tokens {
*/
extern int pass0;
-extern int passn; /* Actual pass number */
+extern int passn; /* Actual pass number */
extern bool tasm_compatible_mode;
extern int optimizing;
extern int globalbits; /* 16, 32 or 64-bit mode */
-extern int globalrel; /* default to relative addressing? */
-extern int maxbits; /* max bits supported by output */
+extern int globalrel; /* default to relative addressing? */
+extern int maxbits; /* max bits supported by output */
/*
* NASM version strings, defined in ver.c
diff --git a/nasm.nsi b/nasm.nsi
index 48feaa9..7daea6c 100644
--- a/nasm.nsi
+++ b/nasm.nsi
@@ -106,6 +106,7 @@ Section "NASM" SecNasm
;Store shortcuts folder
WriteRegStr HKCU "Software\${PRODUCT_SHORT_NAME}\" "lnk" $SMPROGRAMS\$StartMenuFolder
+ WriteRegStr HKCU "Software\${PRODUCT_SHORT_NAME}\" "bat-lnk" $DESKTOP\${PRODUCT_SHORT_NAME}.lnk
;
; the bat we need
@@ -183,13 +184,43 @@ SectionEnd
Section "Uninstall"
;
; files on HDD
- RMDir /r /rebootok "$INSTDIR"
- Delete /rebootok "$DESKTOP\${PRODUCT_SHORT_NAME}.lnk"
+ IfFileExists "$INSTDIR" +3 +1
+ MessageBox MB_OK "No files found, aborting."
+ Abort
+ MessageBox MB_YESNO "The following directory will be deleted$\n$INSTDIR" IDYES rm_instdir_true IDNO rm_instdir_false
+ rm_instdir_true:
+ RMDir /r /rebootok "$INSTDIR"
+ rm_instdir_false:
+
+ ;
+ ; Desktop link
+ ReadRegStr $0 HKCU Software\${PRODUCT_SHORT_NAME} "bat-lnk"
+ StrCmp $0 0 +1 +3
+ MessageBox MB_OK "Invalid path to a bat-lnk file, aborting"
+ Abort
+ IfFileExists $0 +3 +1
+ MessageBox MB_OK "No bat-lnk files found, aborting."
+ Abort
+ MessageBox MB_YESNO "The following file will be deleted$\n$0" IDYES rm_batlinks_true IDNO rm_batlinks_false
+ rm_batlinks_true:
+ Delete /rebootok "$0"
+ RMDir "$0"
+ rm_batlinks_false:
+
;
- ; Start Menu folder
+ ; Start menu folder
ReadRegStr $0 HKCU Software\${PRODUCT_SHORT_NAME} "lnk"
- Delete /rebootok "$0\*"
- RMDir "$0"
+ StrCmp $0 0 +1 +3
+ MessageBox MB_OK "Invalid path to a lnk file, aborting"
+ Abort
+ IfFileExists $0 +3 +1
+ MessageBox MB_OK "No lnk files found, aborting."
+ Abort
+ MessageBox MB_YESNO "The following directory will be deleted$\n$0" IDYES rm_links_true IDNO rm_links_false
+ rm_links_true:
+ Delete /rebootok "$0\*"
+ RMDir "$0"
+ rm_links_false:
DeleteRegKey /ifempty HKCU "Software\${PRODUCT_SHORT_NAME}"
SectionEnd
diff --git a/nasm.spec b/nasm.spec
index 30c322a..4add84a 100644
--- a/nasm.spec
+++ b/nasm.spec
@@ -1,24 +1,24 @@
# -*- coding: utf-8 -*-
-%define nasm_version 2.09.08
+%define nasm_version 2.10.07
Summary: The Netwide Assembler, a portable x86 assembler with Intel-like syntax
Name: nasm
-Version: 2.09.08
+Version: 2.10.07
Release: 1
License: BSD
Group: Development/Languages
-Source: http://www.nasm.us/pub/nasm/releasebuilds/%{nasm_version}/nasm-%{nasm_version}.tar.bz2
+Source: http://www.nasm.us/pub/nasm/releasebuilds/%{nasm_version}/nasm-%{nasm_version}.tar.xz
URL: http://www.nasm.us/
BuildRoot: /tmp/rpm-build-nasm
Prefix: %{_prefix}
-BuildPrereq: perl
+BuildRequires: perl
BuildRoot: %{_tmppath}/%{name}-%{version}-%{release}-root-%(%{__id_u} -n)
-Requires(post): /sbin/install-info
-Requires(preun): /sbin/install-info
%package doc
Summary: Extensive documentation for NASM
Group: Development/Languages
-Prereq: /sbin/install-info
+BuildRequires: ghostscript, texinfo
+Requires(post): /sbin/install-info
+Requires(preun): /sbin/install-info
%package rdoff
Summary: Tools for the RDOFF binary format, sometimes used with NASM.
diff --git a/nasm.spec.in b/nasm.spec.in
index 1b70521..dde8cec 100644
--- a/nasm.spec.in
+++ b/nasm.spec.in
@@ -6,19 +6,19 @@ Version: @@NASM_MANGLED_VER@@
Release: 1
License: BSD
Group: Development/Languages
-Source: http://www.nasm.us/pub/nasm/releasebuilds/%{nasm_version}/nasm-%{nasm_version}.tar.bz2
+Source: http://www.nasm.us/pub/nasm/releasebuilds/%{nasm_version}/nasm-%{nasm_version}.tar.xz
URL: http://www.nasm.us/
BuildRoot: /tmp/rpm-build-nasm
Prefix: %{_prefix}
-BuildPrereq: perl
+BuildRequires: perl
BuildRoot: %{_tmppath}/%{name}-%{version}-%{release}-root-%(%{__id_u} -n)
-Requires(post): /sbin/install-info
-Requires(preun): /sbin/install-info
%package doc
Summary: Extensive documentation for NASM
Group: Development/Languages
-Prereq: /sbin/install-info
+BuildRequires: ghostscript, texinfo
+Requires(post): /sbin/install-info
+Requires(preun): /sbin/install-info
%package rdoff
Summary: Tools for the RDOFF binary format, sometimes used with NASM.
diff --git a/nasmlib.c b/nasmlib.c
index d70f6c2..2367ff3 100644
--- a/nasmlib.c
+++ b/nasmlib.c
@@ -1,6 +1,6 @@
/* ----------------------------------------------------------------------- *
*
- * Copyright 1996-2010 The NASM Authors - All Rights Reserved
+ * Copyright 1996-2012 The NASM Authors - All Rights Reserved
* See the file AUTHORS included with the NASM distribution for
* the specific copyright holders.
*
@@ -291,8 +291,7 @@ char *nasm_strsep(char **stringp, const char *delim)
#endif
-#define lib_isnumchar(c) (nasm_isalnum(c) || (c) == '$' || (c) == '_')
-#define numvalue(c) ((c)>='a' ? (c)-'a'+10 : (c)>='A' ? (c)-'A'+10 : (c)-'0')
+#define lib_isnumchar(c) (nasm_isalnum(c) || (c) == '$' || (c) == '_')
static int radix_letter(char c)
{
@@ -564,7 +563,8 @@ void standard_extension(char *inname, char *outname, char *extension)
*/
static const char *prefix_names[] = {
"a16", "a32", "a64", "asp", "lock", "o16", "o32", "o64", "osp",
- "rep", "repe", "repne", "repnz", "repz", "times", "wait"
+ "rep", "repe", "repne", "repnz", "repz", "times", "wait",
+ "xacquire", "xrelease"
};
const char *prefix_name(int token)
@@ -737,9 +737,9 @@ char *nasm_get_word(char *p, char **tail)
*/
char *nasm_opt_val(char *p, char **val, char **next)
{
- char *q, *opt, *nxt;
+ char *q, *nxt;
- opt = *val = *next = NULL;
+ *val = *next = NULL;
p = nasm_get_word(p, &nxt);
if (!p)
@@ -775,35 +775,24 @@ char *nasm_opt_val(char *p, char **val, char **next)
*/
int idata_bytes(int opcode)
{
- int ret;
switch (opcode) {
case I_DB:
- ret = 1;
- break;
+ return 1;
case I_DW:
- ret = 2;
- break;
+ return 2;
case I_DD:
- ret = 4;
- break;
+ return 4;
case I_DQ:
- ret = 8;
- break;
+ return 8;
case I_DT:
- ret = 10;
- break;
+ return 10;
case I_DO:
- ret = 16;
- break;
+ return 16;
case I_DY:
- ret = 32;
- break;
+ return 32;
case I_none:
- ret = -1;
- break;
+ return -1;
default:
- ret = 0;
- break;
+ return 0;
}
- return ret;
}
diff --git a/nasmlib.h b/nasmlib.h
index 2c335e1..2210748 100644
--- a/nasmlib.h
+++ b/nasmlib.h
@@ -116,8 +116,10 @@ void nasm_set_verror(vefunc);
#define ERR_WARN_MASK 0xFFFFF000 /* the mask for this feature */
#define ERR_WARN_SHR 12 /* how far to shift right */
-#define WARN(x) ((x) << ERR_WARN_SHR)
+#define WARN(x) ((x) << ERR_WARN_SHR)
+#define WARN_IDX(x) (((x) & ERR_WARN_MASK) >> ERR_WARN_SHR)
+#define ERR_WARN_TERM WARN( 0) /* treat warnings as errors */
#define ERR_WARN_MNP WARN( 1) /* macro-num-parameters warning */
#define ERR_WARN_MSR WARN( 2) /* macro self-reference */
#define ERR_WARN_MDP WARN( 3) /* macro default parameters check */
@@ -130,7 +132,9 @@ void nasm_set_verror(vefunc);
#define ERR_WARN_FL_UNDERFLOW WARN( 9) /* FP underflow */
#define ERR_WARN_FL_TOOLONG WARN(10) /* FP too many digits */
#define ERR_WARN_USER WARN(11) /* %warning directives */
-#define ERR_WARN_MAX 11 /* the highest numbered one */
+#define ERR_WARN_LOCK WARN(12) /* bad LOCK prefixes */
+#define ERR_WARN_HLE WARN(13) /* bad HLE prefixes */
+#define ERR_WARN_MAX 13 /* the highest numbered one */
/*
* Wrappers around malloc, realloc and free. nasm_malloc will
@@ -205,6 +209,8 @@ int nasm_memicmp(const char *, const char *, size_t);
char *nasm_strsep(char **stringp, const char *delim);
#endif
+/* This returns the numeric value of a given 'digit'. */
+#define numvalue(c) ((c) >= 'a' ? (c) - 'a' + 10 : (c) >= 'A' ? (c) - 'A' + 10 : (c) - '0')
/*
* Convert a string into a number, using NASM number rules. Sets
@@ -246,12 +252,29 @@ void standard_extension(char *inname, char *outname, char *extension);
*
* list_for_each - regular iterator over list
* list_for_each_safe - the same but safe against list items removal
+ * list_last - find the last element in a list
*/
#define list_for_each(pos, head) \
for (pos = head; pos; pos = pos->next)
#define list_for_each_safe(pos, n, head) \
for (pos = head, n = (pos ? pos->next : NULL); pos; \
pos = n, n = (n ? n->next : NULL))
+#define list_last(pos, head) \
+ for (pos = head; pos && pos->next; pos = pos->next) \
+ ;
+#define list_reverse(head, prev, next) \
+ do { \
+ if (!head || !head->next) \
+ break; \
+ prev = NULL; \
+ while (head) { \
+ next = head->next; \
+ head->next = prev; \
+ prev = head; \
+ head = next; \
+ } \
+ head = prev; \
+ } while (0)
/*
* Power of 2 align helpers
diff --git a/opflags.h b/opflags.h
index b491244..883d13b 100644
--- a/opflags.h
+++ b/opflags.h
@@ -1,6 +1,6 @@
/* ----------------------------------------------------------------------- *
*
- * Copyright 1996-2009 The NASM Authors - All Rights Reserved
+ * Copyright 1996-2012 The NASM Authors - All Rights Reserved
* See the file AUTHORS included with the NASM distribution for
* the specific copyright holders.
*
@@ -51,189 +51,194 @@
* (class & ~operand) == 0
*
* if and only if "operand" belongs to class type "class".
+ */
+
+typedef uint64_t opflags_t;
+
+#define OP_GENMASK(bits, shift) (((UINT64_C(1) << (bits)) - 1) << (shift))
+#define OP_GENBIT(bit, shift) (UINT64_C(1) << ((shift) + (bit)))
+
+/*
+ * Type of operand: memory reference, register, etc.
*
- * The bits are assigned as follows:
- *
- * Bits 0-7, 23, 29: sizes
- * 0: 8 bits (BYTE)
- * 1: 16 bits (WORD)
- * 2: 32 bits (DWORD)
- * 3: 64 bits (QWORD)
- * 4: 80 bits (TWORD)
- * 5: FAR
- * 6: NEAR
- * 7: SHORT
- * 23: 256 bits (YWORD)
- * 29: 128 bits (OWORD)
- *
- * Bits 8-11 modifiers
- * 8: TO
- * 9: COLON
- * 10: STRICT
- * 11: (reserved)
- *
- * Bits 12-15: type of operand
- * 12: REGISTER
- * 13: IMMEDIATE
- * 14: MEMORY (always has REGMEM attribute as well)
- * 15: REGMEM (valid EA operand)
- *
- * Bits 16-19, 28: subclasses
- * With REG_CDT:
- * 16: REG_CREG (CRx)
- * 17: REG_DREG (DRx)
- * 18: REG_TREG (TRx)
-
- * With REG_GPR:
- * 16: REG_ACCUM (AL, AX, EAX, RAX)
- * 17: REG_COUNT (CL, CX, ECX, RCX)
- * 18: REG_DATA (DL, DX, EDX, RDX)
- * 19: REG_HIGH (AH, CH, DH, BH)
- * 28: REG_NOTACC (not REG_ACCUM)
- *
- * With REG_SREG:
- * 16: REG_CS
- * 17: REG_DESS (DS, ES, SS)
- * 18: REG_FSGS
- * 19: REG_SEG67
- *
- * With FPUREG:
- * 16: FPU0
- *
- * With XMMREG:
- * 16: XMM0
- *
- * With YMMREG:
- * 16: YMM0
+ * Bits: 0 - 3
+ */
+#define OPTYPE_SHIFT (0)
+#define OPTYPE_BITS (4)
+#define OPTYPE_MASK OP_GENMASK(OPTYPE_BITS, OPTYPE_SHIFT)
+#define GEN_OPTYPE(bit) OP_GENBIT(bit, OPTYPE_SHIFT)
+
+/*
+ * Modifiers.
*
- * With MEMORY:
- * 16: MEM_OFFS (this is a simple offset)
- * 17: IP_REL (IP-relative offset)
+ * Bits: 4 - 6
+ */
+#define MODIFIER_SHIFT (4)
+#define MODIFIER_BITS (3)
+#define MODIFIER_MASK OP_GENMASK(MODIFIER_BITS, MODIFIER_SHIFT)
+#define GEN_MODIFIER(bit) OP_GENBIT(bit, MODIFIER_SHIFT)
+
+/*
+ * Register classes.
*
- * With IMMEDIATE:
- * 16: UNITY (1)
- * 17: BYTENESS16 (-128..127)
- * 18: BYTENESS32 (-128..127)
- * 19: BYTENESS64 (-128..127)
+ * Bits: 7 - 16
+ */
+#define REG_CLASS_SHIFT (7)
+#define REG_CLASS_BITS (10)
+#define REG_CLASS_MASK OP_GENMASK(REG_CLASS_BITS, REG_CLASS_SHIFT)
+#define GEN_REG_CLASS(bit) OP_GENBIT(bit, REG_CLASS_SHIFT)
+
+/*
+ * Subclasses. Depends on type of operand.
*
- * Bits 20-22, 24-27: register classes
- * 20: REG_CDT (CRx, DRx, TRx)
- * 21: RM_GPR (REG_GPR) (integer register)
- * 22: REG_SREG
- * 24: FPUREG
- * 25: RM_MMX (MMXREG)
- * 26: RM_XMM (XMMREG)
- * 27: RM_YMM (YMMREG)
+ * Bits: 17 - 24
+ */
+#define SUBCLASS_SHIFT (17)
+#define SUBCLASS_BITS (8)
+#define SUBCLASS_MASK OP_GENMASK(SUBCLASS_BITS, SUBCLASS_SHIFT)
+#define GEN_SUBCLASS(bit) OP_GENBIT(bit, SUBCLASS_SHIFT)
+
+/*
+ * Special flags. Context dependant.
*
- * Bit 31 is currently unallocated.
+ * Bits: 25 - 31
+ */
+#define SPECIAL_SHIFT (25)
+#define SPECIAL_BITS (7)
+#define SPECIAL_MASK OP_GENMASK(SPECIAL_BITS, SPECIAL_SHIFT)
+#define GEN_SPECIAL(bit) OP_GENBIT(bit, SPECIAL_SHIFT)
+
+/*
+ * Sizes of the operands and attributes.
*
- * 30: SAME_AS
- * Special flag only used in instruction patterns; means this operand
- * has to be identical to another operand. Currently only supported
- * for registers.
+ * Bits: 32 - 42
+ */
+#define SIZE_SHIFT (32)
+#define SIZE_BITS (11)
+#define SIZE_MASK OP_GENMASK(SIZE_BITS, SIZE_SHIFT)
+#define GEN_SIZE(bit) OP_GENBIT(bit, SIZE_SHIFT)
+
+/*
+ * Bits distribution (counted from 0)
+ *
+ * 6 5 4 3 2 1
+ * 3210987654321098765432109876543210987654321098765432109876543210
+ * |
+ * | dword bound
+ *
+ * ............................................................1111 optypes
+ * .........................................................111.... modifiers
+ * ...............................................1111111111....... register classes
+ * .......................................11111111................. subclasses
+ * ................................1111111......................... specials
+ * .....................11111111111................................ sizes
*/
-typedef uint32_t opflags_t;
-
-/* Size, and other attributes, of the operand */
-#define BITS8 0x00000001U
-#define BITS16 0x00000002U
-#define BITS32 0x00000004U
-#define BITS64 0x00000008U /* x64 and FPU only */
-#define BITS80 0x00000010U /* FPU only */
-#define BITS128 0x20000000U
-#define BITS256 0x00800000U
-#define FAR 0x00000020U /* grotty: this means 16:16 or */
- /* 16:32, like in CALL/JMP */
-#define NEAR 0x00000040U
-#define SHORT 0x00000080U /* and this means what it says :) */
-
-#define SIZE_MASK 0x208000FFU /* all the size attributes */
-
-/* Modifiers */
-#define MODIFIER_MASK 0x00000f00U
-#define TO 0x00000100U /* reverse effect in FADD, FSUB &c */
-#define COLON 0x00000200U /* operand is followed by a colon */
-#define STRICT 0x00000400U /* do not optimize this operand */
-
-/* Type of operand: memory reference, register, etc. */
-#define OPTYPE_MASK 0x0000f000U
-#define REGISTER 0x00001000U /* register number in 'basereg' */
-#define IMMEDIATE 0x00002000U
-#define MEMORY 0x0000c000U
-#define REGMEM 0x00008000U /* for r/m, ie EA, operands */
+#define REGISTER GEN_OPTYPE(0) /* register number in 'basereg' */
+#define IMMEDIATE GEN_OPTYPE(1)
+#define REGMEM GEN_OPTYPE(2) /* for r/m, ie EA, operands */
+#define MEMORY (GEN_OPTYPE(3) | REGMEM)
+
+#define BITS8 GEN_SIZE(0) /* 8 bits (BYTE) */
+#define BITS16 GEN_SIZE(1) /* 16 bits (WORD) */
+#define BITS32 GEN_SIZE(2) /* 32 bits (DWORD) */
+#define BITS64 GEN_SIZE(3) /* 64 bits (QWORD), x64 and FPU only */
+#define BITS80 GEN_SIZE(4) /* 80 bits (TWORD), FPU only */
+#define BITS128 GEN_SIZE(5) /* 128 bits (OWORD) */
+#define BITS256 GEN_SIZE(6) /* 256 bits (YWORD) */
+#define BITS512 GEN_SIZE(7) /* 512 bits (ZWORD) */
+#define FAR GEN_SIZE(8) /* grotty: this means 16:16 or 16:32, like in CALL/JMP */
+#define NEAR GEN_SIZE(9)
+#define SHORT GEN_SIZE(10) /* and this means what it says :) */
+
+#define TO GEN_MODIFIER(0) /* reverse effect in FADD, FSUB &c */
+#define COLON GEN_MODIFIER(1) /* operand is followed by a colon */
+#define STRICT GEN_MODIFIER(2) /* do not optimize this operand */
+
+#define REG_CLASS_CDT GEN_REG_CLASS(0)
+#define REG_CLASS_GPR GEN_REG_CLASS(1)
+#define REG_CLASS_SREG GEN_REG_CLASS(2)
+#define REG_CLASS_FPUREG GEN_REG_CLASS(3)
+#define REG_CLASS_RM_MMX GEN_REG_CLASS(4)
+#define REG_CLASS_RM_XMM GEN_REG_CLASS(5)
+#define REG_CLASS_RM_YMM GEN_REG_CLASS(6)
#define is_class(class, op) (!((opflags_t)(class) & ~(opflags_t)(op)))
+#define IS_SREG(op) is_class(REG_SREG, nasm_reg_flags[(op)])
+#define IS_FSGS(op) is_class(REG_FSGS, nasm_reg_flags[(op)])
+
/* Register classes */
-#define REG_EA 0x00009000U /* 'normal' reg, qualifies as EA */
-#define RM_GPR 0x00208000U /* integer operand */
-#define REG_GPR 0x00209000U /* integer register */
-#define REG8 0x00209001U /* 8-bit GPR */
-#define REG16 0x00209002U /* 16-bit GPR */
-#define REG32 0x00209004U /* 32-bit GPR */
-#define REG64 0x00209008U /* 64-bit GPR */
-#define FPUREG 0x01001000U /* floating point stack registers */
-#define FPU0 0x01011000U /* FPU stack register zero */
-#define RM_MMX 0x02008000U /* MMX operand */
-#define MMXREG 0x02009000U /* MMX register */
-#define RM_XMM 0x04008000U /* XMM (SSE) operand */
-#define XMMREG 0x04009000U /* XMM (SSE) register */
-#define XMM0 0x04019000U /* XMM register zero */
-#define RM_YMM 0x08008000U /* YMM (AVX) operand */
-#define YMMREG 0x08009000U /* YMM (AVX) register */
-#define YMM0 0x08019000U /* YMM register zero */
-#define REG_CDT 0x00101004U /* CRn, DRn and TRn */
-#define REG_CREG 0x00111004U /* CRn */
-#define REG_DREG 0x00121004U /* DRn */
-#define REG_TREG 0x00141004U /* TRn */
-#define REG_SREG 0x00401002U /* any segment register */
-#define REG_CS 0x00411002U /* CS */
-#define REG_DESS 0x00421002U /* DS, ES, SS */
-#define REG_FSGS 0x00441002U /* FS, GS */
-#define REG_SEG67 0x00481002U /* Unimplemented segment registers */
-
-#define REG_RIP 0x00801008U /* RIP relative addressing */
-#define REG_EIP 0x00801004U /* EIP relative addressing */
+#define REG_EA ( REGMEM | REGISTER) /* 'normal' reg, qualifies as EA */
+#define RM_GPR ( REG_CLASS_GPR | REGMEM) /* integer operand */
+#define REG_GPR ( REG_CLASS_GPR | REGMEM | REGISTER) /* integer register */
+#define REG8 ( REG_CLASS_GPR | BITS8 | REGMEM | REGISTER) /* 8-bit GPR */
+#define REG16 ( REG_CLASS_GPR | BITS16 | REGMEM | REGISTER) /* 16-bit GPR */
+#define REG32 ( REG_CLASS_GPR | BITS32 | REGMEM | REGISTER) /* 32-bit GPR */
+#define REG64 ( REG_CLASS_GPR | BITS64 | REGMEM | REGISTER) /* 64-bit GPR */
+#define FPUREG ( REG_CLASS_FPUREG | REGISTER) /* floating point stack registers */
+#define FPU0 (GEN_SUBCLASS(1) | REG_CLASS_FPUREG | REGISTER) /* FPU stack register zero */
+#define RM_MMX ( REG_CLASS_RM_MMX | REGMEM) /* MMX operand */
+#define MMXREG ( REG_CLASS_RM_MMX | REGMEM | REGISTER) /* MMX register */
+#define RM_XMM ( REG_CLASS_RM_XMM | REGMEM) /* XMM (SSE) operand */
+#define XMMREG ( REG_CLASS_RM_XMM | REGMEM | REGISTER) /* XMM (SSE) register */
+#define XMM0 (GEN_SUBCLASS(1) | REG_CLASS_RM_XMM | REGMEM | REGISTER) /* XMM register zero */
+#define RM_YMM ( REG_CLASS_RM_YMM | REGMEM) /* YMM (AVX) operand */
+#define YMMREG ( REG_CLASS_RM_YMM | REGMEM | REGISTER) /* YMM (AVX) register */
+#define YMM0 (GEN_SUBCLASS(1) | REG_CLASS_RM_YMM | REGMEM | REGISTER) /* YMM register zero */
+#define REG_CDT ( REG_CLASS_CDT | BITS32 | REGISTER) /* CRn, DRn and TRn */
+#define REG_CREG (GEN_SUBCLASS(1) | REG_CLASS_CDT | BITS32 | REGISTER) /* CRn */
+#define REG_DREG (GEN_SUBCLASS(2) | REG_CLASS_CDT | BITS32 | REGISTER) /* DRn */
+#define REG_TREG (GEN_SUBCLASS(3) | REG_CLASS_CDT | BITS32 | REGISTER) /* TRn */
+#define REG_SREG ( REG_CLASS_SREG | BITS16 | REGISTER) /* any segment register */
+#define REG_CS (GEN_SUBCLASS(1) | REG_CLASS_SREG | BITS16 | REGISTER) /* CS */
+#define REG_DESS (GEN_SUBCLASS(2) | REG_CLASS_SREG | BITS16 | REGISTER) /* DS, ES, SS */
+#define REG_FSGS (GEN_SUBCLASS(3) | REG_CLASS_SREG | BITS16 | REGISTER) /* FS, GS */
+#define REG_SEG67 (GEN_SUBCLASS(4) | REG_CLASS_SREG | BITS16 | REGISTER) /* Unimplemented segment registers */
/* Special GPRs */
-#define REG_SMASK 0x100f0000U /* a mask for the following */
-#define REG_ACCUM 0x00219000U /* accumulator: AL, AX, EAX, RAX */
-#define REG_AL 0x00219001U
-#define REG_AX 0x00219002U
-#define REG_EAX 0x00219004U
-#define REG_RAX 0x00219008U
-#define REG_COUNT 0x10229000U /* counter: CL, CX, ECX, RCX */
-#define REG_CL 0x10229001U
-#define REG_CX 0x10229002U
-#define REG_ECX 0x10229004U
-#define REG_RCX 0x10229008U
-#define REG_DL 0x10249001U /* data: DL, DX, EDX, RDX */
-#define REG_DX 0x10249002U
-#define REG_EDX 0x10249004U
-#define REG_RDX 0x10249008U
-#define REG_HIGH 0x10289001U /* high regs: AH, CH, DH, BH */
-#define REG_NOTACC 0x10000000U /* non-accumulator register */
-#define REG8NA 0x10209001U /* 8-bit non-acc GPR */
-#define REG16NA 0x10209002U /* 16-bit non-acc GPR */
-#define REG32NA 0x10209004U /* 32-bit non-acc GPR */
-#define REG64NA 0x10209008U /* 64-bit non-acc GPR */
+#define REG_SMASK SUBCLASS_MASK /* a mask for the following */
+#define REG_ACCUM (GEN_SUBCLASS(1) | REG_CLASS_GPR | REGMEM | REGISTER) /* accumulator: AL, AX, EAX, RAX */
+#define REG_AL (GEN_SUBCLASS(1) | REG_CLASS_GPR | BITS8 | REGMEM | REGISTER)
+#define REG_AX (GEN_SUBCLASS(1) | REG_CLASS_GPR | BITS16 | REGMEM | REGISTER)
+#define REG_EAX (GEN_SUBCLASS(1) | REG_CLASS_GPR | BITS32 | REGMEM | REGISTER)
+#define REG_RAX (GEN_SUBCLASS(1) | REG_CLASS_GPR | BITS64 | REGMEM | REGISTER)
+#define REG_COUNT (GEN_SUBCLASS(5) | GEN_SUBCLASS(2) | REG_CLASS_GPR | REGMEM | REGISTER) /* counter: CL, CX, ECX, RCX */
+#define REG_CL (GEN_SUBCLASS(5) | GEN_SUBCLASS(2) | REG_CLASS_GPR | BITS8 | REGMEM | REGISTER)
+#define REG_CX (GEN_SUBCLASS(5) | GEN_SUBCLASS(2) | REG_CLASS_GPR | BITS16 | REGMEM | REGISTER)
+#define REG_ECX (GEN_SUBCLASS(5) | GEN_SUBCLASS(2) | REG_CLASS_GPR | BITS32 | REGMEM | REGISTER)
+#define REG_RCX (GEN_SUBCLASS(5) | GEN_SUBCLASS(2) | REG_CLASS_GPR | BITS64 | REGMEM | REGISTER)
+#define REG_DL (GEN_SUBCLASS(5) | GEN_SUBCLASS(3) | REG_CLASS_GPR | BITS8 | REGMEM | REGISTER) /* data: DL, DX, EDX, RDX */
+#define REG_DX (GEN_SUBCLASS(5) | GEN_SUBCLASS(3) | REG_CLASS_GPR | BITS16 | REGMEM | REGISTER)
+#define REG_EDX (GEN_SUBCLASS(5) | GEN_SUBCLASS(3) | REG_CLASS_GPR | BITS32 | REGMEM | REGISTER)
+#define REG_RDX (GEN_SUBCLASS(5) | GEN_SUBCLASS(3) | REG_CLASS_GPR | BITS64 | REGMEM | REGISTER)
+#define REG_HIGH (GEN_SUBCLASS(5) | GEN_SUBCLASS(4) | REG_CLASS_GPR | BITS8 | REGMEM | REGISTER) /* high regs: AH, CH, DH, BH */
+#define REG_NOTACC GEN_SUBCLASS(5) /* non-accumulator register */
+#define REG8NA (GEN_SUBCLASS(5) | REG_CLASS_GPR | BITS8 | REGMEM | REGISTER) /* 8-bit non-acc GPR */
+#define REG16NA (GEN_SUBCLASS(5) | REG_CLASS_GPR | BITS16 | REGMEM | REGISTER) /* 16-bit non-acc GPR */
+#define REG32NA (GEN_SUBCLASS(5) | REG_CLASS_GPR | BITS32 | REGMEM | REGISTER) /* 32-bit non-acc GPR */
+#define REG64NA (GEN_SUBCLASS(5) | REG_CLASS_GPR | BITS64 | REGMEM | REGISTER) /* 64-bit non-acc GPR */
/* special types of EAs */
-#define MEM_OFFS 0x0001c000U /* simple [address] offset - absolute! */
-#define IP_REL 0x0002c000U /* IP-relative offset */
+#define MEM_OFFS (GEN_SUBCLASS(1) | MEMORY) /* simple [address] offset - absolute! */
+#define IP_REL (GEN_SUBCLASS(2) | MEMORY) /* IP-relative offset */
/* memory which matches any type of r/m operand */
-#define MEMORY_ANY (MEMORY|RM_GPR|RM_MMX|RM_XMM|RM_YMM)
+#define MEMORY_ANY (MEMORY | RM_GPR | RM_MMX | RM_XMM | RM_YMM)
/* special type of immediate operand */
-#define UNITY 0x00012000U /* for shift/rotate instructions */
-#define SBYTE16 0x00022000U /* for op r16,immediate instrs. */
-#define SBYTE32 0x00042000U /* for op r32,immediate instrs. */
-#define SBYTE64 0x00082000U /* for op r64,immediate instrs. */
-#define BYTENESS 0x000e0000U /* for testing for byteness */
+#define UNITY (GEN_SUBCLASS(1) | IMMEDIATE) /* for shift/rotate instructions */
+#define SBYTE16 (GEN_SUBCLASS(2) | IMMEDIATE) /* for op r16,immediate instrs. */
+#define SBYTE32 (GEN_SUBCLASS(3) | IMMEDIATE) /* for op r32,immediate instrs. */
+#define SBYTE64 (GEN_SUBCLASS(4) | IMMEDIATE) /* for op r64,immediate instrs. */
+#define SDWORD64 (GEN_SUBCLASS(5) | IMMEDIATE) /* for op r64,simm32 instrs. */
+#define UDWORD64 (GEN_SUBCLASS(0) | IMMEDIATE) /* for op r64,uimm32 instrs. */
+
+#define BYTENESS (GEN_SUBCLASS(2) | \
+ GEN_SUBCLASS(3) | \
+ GEN_SUBCLASS(4)) /* for testing for byteness */
/* special flags */
-#define SAME_AS 0x40000000U
+#define SAME_AS GEN_SPECIAL(0)
#endif /* NASM_OPFLAGS_H */
diff --git a/output/outbin.c b/output/outbin.c
index 97a29a8..21c042d 100644
--- a/output/outbin.c
+++ b/output/outbin.c
@@ -130,7 +130,7 @@ static struct Section {
struct bin_label *labels; /* linked-list of label handles for map output. */
struct bin_label **labels_end; /* Holds address of end of labels list. */
- struct Section *ifollows; /* Points to previous section (implicit follows). */
+ struct Section *prev; /* Points to previous section (implicit follows). */
struct Section *next; /* This links sections with a defined start address. */
/* The extended bin format allows for sections to have a "virtual"
@@ -201,28 +201,22 @@ static struct Section *find_section_by_index(int32_t index)
}
static struct Section *create_section(char *name)
-{ /* Create a new section. */
- last_section->next = nasm_malloc(sizeof(struct Section));
- last_section->next->ifollows = last_section;
- last_section = last_section->next;
- last_section->labels = NULL;
- last_section->labels_end = &(last_section->labels);
-
- /* Initialize section attributes. */
- last_section->name = nasm_strdup(name);
- last_section->contents = saa_init(1L);
- last_section->follows = last_section->vfollows = 0;
- last_section->length = 0;
- last_section->flags = 0;
- last_section->align = 0;
- last_section->valign = 0;
- last_section->start = 0;
- last_section->vstart = 0;
- last_section->next = NULL;
+{
+ struct Section *s = nasm_zalloc(sizeof(*s));
+
+ s->prev = last_section;
+ s->name = nasm_strdup(name);
+ s->labels_end = &(s->labels);
+ s->contents = saa_init(1L);
/* Register our sections with NASM. */
- last_section->vstart_index = seg_alloc();
- last_section->start_index = seg_alloc();
+ s->vstart_index = seg_alloc();
+ s->start_index = seg_alloc();
+
+ /* FIXME: Append to a tail, we need some helper */
+ last_section->next = s;
+ last_section = s;
+
return last_section;
}
@@ -489,9 +483,9 @@ static void bin_cleanup(int debuginfo)
nasm_error(ERR_FATAL|ERR_NOFILE,
"section %s vfollows unknown section (%s)",
g->name, g->vfollows);
- } else if (g->ifollows != NULL)
- for (s = sections; s && (s != g->ifollows); s = s->next) ;
- /* The .bss section is the only one with ifollows = NULL.
+ } else if (g->prev != NULL)
+ for (s = sections; s && (s != g->prev); s = s->next) ;
+ /* The .bss section is the only one with prev = NULL.
In this case we implicitly follow the last progbits
section. */
else
@@ -1262,7 +1256,7 @@ static int32_t bin_secname(char *name, int pass, int *bits)
sec->flags |= TYPE_DEFINED | TYPE_PROGBITS;
else if (!strcmp(name, ".bss")) {
sec->flags |= TYPE_DEFINED | TYPE_NOBITS;
- sec->ifollows = NULL;
+ sec->prev = NULL;
}
}
@@ -1433,18 +1427,13 @@ static void binfmt_init(void)
nsl_tail = &no_seg_labels;
/* Create default section (.text). */
- sections = last_section = nasm_malloc(sizeof(struct Section));
- last_section->next = NULL;
- last_section->name = nasm_strdup(".text");
- last_section->contents = saa_init(1L);
- last_section->follows = last_section->vfollows = 0;
- last_section->ifollows = NULL;
- last_section->length = 0;
- last_section->flags = TYPE_DEFINED | TYPE_PROGBITS;
- last_section->labels = NULL;
- last_section->labels_end = &(last_section->labels);
- last_section->start_index = seg_alloc();
- last_section->vstart_index = seg_alloc();
+ sections = last_section = nasm_zalloc(sizeof(struct Section));
+ last_section->name = nasm_strdup(".text");
+ last_section->contents = saa_init(1L);
+ last_section->flags = TYPE_DEFINED | TYPE_PROGBITS;
+ last_section->labels_end = &(last_section->labels);
+ last_section->start_index = seg_alloc();
+ last_section->vstart_index = seg_alloc();
}
/* Generate binary file output */
diff --git a/output/outcoff.c b/output/outcoff.c
index 5c1de01..6c72806 100644
--- a/output/outcoff.c
+++ b/output/outcoff.c
@@ -285,16 +285,11 @@ static int coff_make_section(char *name, uint32_t flags)
{
struct Section *s;
- s = nasm_malloc(sizeof(*s));
+ s = nasm_zalloc(sizeof(*s));
if (flags != BSS_FLAGS)
s->data = saa_init(1);
- else
- s->data = NULL;
- s->head = NULL;
s->tail = &s->head;
- s->len = 0;
- s->nrelocs = 0;
if (!strcmp(name, ".text"))
s->index = def_seg;
else
diff --git a/output/outelf.c b/output/outelf.c
index 6d43b86..9ec0035 100644
--- a/output/outelf.c
+++ b/output/outelf.c
@@ -48,7 +48,7 @@
#include "output/elf.h"
#include "output/outelf.h"
-#if defined(OF_ELF32) || defined(OF_ELF64)
+#if defined(OF_ELF32) || defined(OF_ELF64) || defined(OF_ELFX32)
const struct elf_known_section elf_known_sections[] = {
{ ".text", SHT_PROGBITS, SHF_ALLOC|SHF_EXECINSTR, 16 },
@@ -120,4 +120,4 @@ void section_attrib(char *name, char *attr, int pass,
}
}
-#endif /* defined(OF_ELF32) || defined(OF_ELF64) */
+#endif /* defined(OF_ELF32) || defined(OF_ELF64) || defined(OF_ELFX32) */
diff --git a/output/outelf32.c b/output/outelf32.c
index a85acf0..00b3f5e 100644
--- a/output/outelf32.c
+++ b/output/outelf32.c
@@ -153,11 +153,11 @@ struct symlininfo {
};
struct linelist {
- struct symlininfo info;
- int line;
- char *filename;
struct linelist *next;
struct linelist *last;
+ struct symlininfo info;
+ char *filename;
+ int line;
};
struct sectlist {
@@ -300,25 +300,21 @@ static int elf_make_section(char *name, int type, int flags, int align)
{
struct Section *s;
- s = nasm_malloc(sizeof(*s));
+ s = nasm_zalloc(sizeof(*s));
if (type != SHT_NOBITS)
s->data = saa_init(1L);
- s->head = NULL;
s->tail = &s->head;
- s->len = s->size = 0;
- s->nrelocs = 0;
if (!strcmp(name, ".text"))
s->index = def_seg;
else
s->index = seg_alloc();
add_sectname("", name);
- s->name = nasm_malloc(1 + strlen(name));
- strcpy(s->name, name);
- s->type = type;
- s->flags = flags;
- s->align = align;
- s->gsyms = NULL;
+
+ s->name = nasm_strdup(name);
+ s->type = type;
+ s->flags = flags;
+ s->align = align;
if (nsects >= sectlen)
sects = nasm_realloc(sects, (sectlen += SECT_DELTA) * sizeof(*sects));
@@ -606,16 +602,12 @@ static void elf_add_reloc(struct Section *sect, int32_t segment, int type)
{
struct Reloc *r;
- r = *sect->tail = nasm_malloc(sizeof(struct Reloc));
+ r = *sect->tail = nasm_zalloc(sizeof(struct Reloc));
sect->tail = &r->next;
- r->next = NULL;
r->address = sect->len;
- if (segment == NO_SEG)
- r->symbol = 0;
- else {
+ if (segment != NO_SEG) {
int i;
- r->symbol = 0;
for (i = 0; i < nsects; i++)
if (segment == sects[i]->index)
r->symbol = i + 2;
@@ -672,8 +664,9 @@ static int32_t elf_add_gsym_reloc(struct Section *sect,
s = sects[i];
break;
}
+
if (!s) {
- if (exact && offset != 0)
+ if (exact && offset)
nasm_error(ERR_NONFATAL, "unable to find a suitable global symbol"
" for this reference");
else
@@ -691,11 +684,11 @@ static int32_t elf_add_gsym_reloc(struct Section *sect,
r = *sect->tail = nasm_malloc(sizeof(struct Reloc));
sect->tail = &r->next;
- r->next = NULL;
- r->address = sect->len;
- r->symbol = GLOBAL_TEMP_BASE + sym->globnum;
- r->type = type;
+ r->next = NULL;
+ r->address = sect->len;
+ r->symbol = GLOBAL_TEMP_BASE + sym->globnum;
+ r->type = type;
sect->nrelocs++;
@@ -1029,7 +1022,7 @@ static void elf_write(void)
/* .shstrtab */
elf_section_header(p - shstrtab, SHT_STRTAB, 0, shstrtab, false,
- shstrtablen, 0, 0, 1, 0);
+ shstrtablen, 0, 0, 1, 0);
p += strlen(p) + 1;
/* .symtab */
@@ -1274,10 +1267,6 @@ static struct SAA *elf_build_reltab(int32_t *len, struct Reloc *r)
while (r) {
int32_t sym = r->symbol;
- /*
- * Create a real symbol index; the +2 refers to the two special
- * entries, the null entry and the filename entry.
- */
if (sym >= GLOBAL_TEMP_BASE)
sym += global_offset;
diff --git a/output/outelf64.c b/output/outelf64.c
index 9807c2a..9776972 100644
--- a/output/outelf64.c
+++ b/output/outelf64.c
@@ -155,11 +155,11 @@ struct symlininfo {
};
struct linelist {
- struct symlininfo info;
- int line;
- char *filename;
struct linelist *next;
struct linelist *last;
+ struct symlininfo info;
+ char *filename;
+ int line;
};
struct sectlist {
@@ -308,25 +308,21 @@ static int elf_make_section(char *name, int type, int flags, int align)
{
struct Section *s;
- s = nasm_malloc(sizeof(*s));
+ s = nasm_zalloc(sizeof(*s));
if (type != SHT_NOBITS)
s->data = saa_init(1L);
- s->head = NULL;
s->tail = &s->head;
- s->len = s->size = 0;
- s->nrelocs = 0;
if (!strcmp(name, ".text"))
s->index = def_seg;
else
s->index = seg_alloc();
add_sectname("", name);
- s->name = nasm_malloc(1 + strlen(name));
- strcpy(s->name, name);
- s->type = type;
- s->flags = flags;
- s->align = align;
- s->gsyms = NULL;
+
+ s->name = nasm_strdup(name);
+ s->type = type;
+ s->flags = flags;
+ s->align = align;
if (nsects >= sectlen)
sects = nasm_realloc(sects, (sectlen += SECT_DELTA) * sizeof(*sects));
@@ -614,17 +610,15 @@ static void elf_add_reloc(struct Section *sect, int32_t segment,
int64_t offset, int type)
{
struct Reloc *r;
- r = *sect->tail = nasm_malloc(sizeof(struct Reloc));
+
+ r = *sect->tail = nasm_zalloc(sizeof(struct Reloc));
sect->tail = &r->next;
- r->next = NULL;
r->address = sect->len;
r->offset = offset;
- if (segment == NO_SEG)
- r->symbol = 0;
- else {
+
+ if (segment != NO_SEG) {
int i;
- r->symbol = 0;
for (i = 0; i < nsects; i++)
if (segment == sects[i]->index)
r->symbol = i + 2;
@@ -715,13 +709,11 @@ static void elf_out(int32_t segto, const void *data,
int32_t segment, int32_t wrt)
{
struct Section *s;
- int64_t addr, zero;
+ int64_t addr;
int reltype, bytes;
int i;
static struct symlininfo sinfo;
- zero = 0;
-
#if defined(DEBUG) && DEBUG>2
if (data)
nasm_error(ERR_DEBUG,
@@ -1414,6 +1406,7 @@ static void elf_sect_write(struct Section *sect, const void *data, size_t len)
saa_wbytes(sect->data, data, len);
sect->len += len;
}
+
static void elf_sect_writeaddr(struct Section *sect, int64_t data, size_t len)
{
saa_writeaddr(sect->data, data, len);
@@ -1452,7 +1445,7 @@ static int elf_directive(enum directives directive, char *value, int pass)
switch (directive) {
case D_OSABI:
if (pass == 2)
- return 1; /* ignore in pass 2 */
+ return 1; /* ignore in pass 2 */
n = readnum(value, &err);
if (err) {
@@ -1692,9 +1685,7 @@ static void stabs64_generate(void)
ptr = stabslines;
- allfiles = (char **)nasm_malloc(numlinestabs * sizeof(char *));
- for (i = 0; i < numlinestabs; i++)
- allfiles[i] = 0;
+ allfiles = (char **)nasm_zalloc(numlinestabs * sizeof(char *));
numfiles = 0;
while (ptr) {
if (numfiles == 0) {
@@ -2068,26 +2059,26 @@ static void dwarf64_generate(void)
/* build line section */
/* prolog */
plines = saa_init(1L);
- saa_write8(plines,1); /* Minimum Instruction Length */
- saa_write8(plines,1); /* Initial value of 'is_stmt' */
- saa_write8(plines,line_base); /* Line Base */
- saa_write8(plines,line_range); /* Line Range */
- saa_write8(plines,opcode_base); /* Opcode Base */
+ saa_write8(plines,1); /* Minimum Instruction Length */
+ saa_write8(plines,1); /* Initial value of 'is_stmt' */
+ saa_write8(plines,line_base); /* Line Base */
+ saa_write8(plines,line_range); /* Line Range */
+ saa_write8(plines,opcode_base); /* Opcode Base */
/* standard opcode lengths (# of LEB128u operands) */
- saa_write8(plines,0); /* Std opcode 1 length */
- saa_write8(plines,1); /* Std opcode 2 length */
- saa_write8(plines,1); /* Std opcode 3 length */
- saa_write8(plines,1); /* Std opcode 4 length */
- saa_write8(plines,1); /* Std opcode 5 length */
- saa_write8(plines,0); /* Std opcode 6 length */
- saa_write8(plines,0); /* Std opcode 7 length */
- saa_write8(plines,0); /* Std opcode 8 length */
- saa_write8(plines,1); /* Std opcode 9 length */
- saa_write8(plines,0); /* Std opcode 10 length */
- saa_write8(plines,0); /* Std opcode 11 length */
- saa_write8(plines,1); /* Std opcode 12 length */
- /* Directory Table */
- saa_write8(plines,0); /* End of table */
+ saa_write8(plines,0); /* Std opcode 1 length */
+ saa_write8(plines,1); /* Std opcode 2 length */
+ saa_write8(plines,1); /* Std opcode 3 length */
+ saa_write8(plines,1); /* Std opcode 4 length */
+ saa_write8(plines,1); /* Std opcode 5 length */
+ saa_write8(plines,0); /* Std opcode 6 length */
+ saa_write8(plines,0); /* Std opcode 7 length */
+ saa_write8(plines,0); /* Std opcode 8 length */
+ saa_write8(plines,1); /* Std opcode 9 length */
+ saa_write8(plines,0); /* Std opcode 10 length */
+ saa_write8(plines,0); /* Std opcode 11 length */
+ saa_write8(plines,1); /* Std opcode 12 length */
+ /* Directory Table */
+ saa_write8(plines,0); /* End of table */
/* File Name Table */
ftentry = dwarf_flist;
for (indx = 0;indx<dwarf_numfiles;indx++)
diff --git a/output/outelfx32.c b/output/outelfx32.c
new file mode 100644
index 0000000..914a83e
--- /dev/null
+++ b/output/outelfx32.c
@@ -0,0 +1,2194 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 2012 The NASM Authors - All Rights Reserved
+ * See the file AUTHORS included with the NASM distribution for
+ * the specific copyright holders.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following
+ * conditions are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * outelfx32.c output routines for the Netwide Assembler to produce
+ * ELF32 (x86_64) object file format
+ */
+
+#include "compiler.h"
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <ctype.h>
+#include <inttypes.h>
+
+#include "nasm.h"
+#include "nasmlib.h"
+#include "saa.h"
+#include "raa.h"
+#include "stdscan.h"
+#include "eval.h"
+#include "output/outform.h"
+#include "output/outlib.h"
+#include "rbtree.h"
+
+#include "output/dwarf.h"
+#include "output/stabs.h"
+#include "output/outelf.h"
+
+#ifdef OF_ELFX32
+
+/*
+ * Relocation types.
+ */
+struct Reloc {
+ struct Reloc *next;
+ int32_t address; /* relative to _start_ of section */
+ int32_t symbol; /* symbol index */
+ int32_t offset; /* symbol addend */
+ int type; /* type of relocation */
+};
+
+struct Symbol {
+ struct rbtree symv; /* symbol value and rbtree of globals */
+ int32_t strpos; /* string table position of name */
+ int32_t section; /* section ID of the symbol */
+ int type; /* symbol type */
+ int other; /* symbol visibility */
+ int32_t size; /* size of symbol */
+ int32_t globnum; /* symbol table offset if global */
+ struct Symbol *nextfwd; /* list of unresolved-size symbols */
+ char *name; /* used temporarily if in above list */
+};
+
+struct Section {
+ struct SAA *data;
+ uint32_t len, size, nrelocs;
+ int32_t index; /* index into sects array */
+ int type; /* SHT_PROGBITS or SHT_NOBITS */
+ uint32_t align; /* alignment: power of two */
+ uint32_t flags; /* section flags */
+ char *name;
+ struct SAA *rel;
+ uint32_t rellen;
+ struct Reloc *head, **tail;
+ struct rbtree *gsyms; /* global symbols in section */
+};
+
+#define SECT_DELTA 32
+static struct Section **sects;
+static int nsects, sectlen;
+
+#define SHSTR_DELTA 256
+static char *shstrtab;
+static int shstrtablen, shstrtabsize;
+
+static struct SAA *syms;
+static uint32_t nlocals, nglobs, ndebugs; /* Symbol counts */
+
+static int32_t def_seg;
+
+static struct RAA *bsym;
+
+static struct SAA *strs;
+static uint32_t strslen;
+
+static struct Symbol *fwds;
+
+static char elf_module[FILENAME_MAX];
+
+static uint8_t elf_osabi = 0; /* Default OSABI = 0 (System V or Linux) */
+static uint8_t elf_abiver = 0; /* Current ABI version */
+
+extern struct ofmt of_elfx32;
+
+static struct ELF_SECTDATA {
+ void *data;
+ int32_t len;
+ bool is_saa;
+} *elf_sects;
+static int elf_nsect, nsections;
+static int32_t elf_foffs;
+
+static void elf_write(void);
+static void elf_sect_write(struct Section *, const void *, size_t);
+static void elf_sect_writeaddr(struct Section *, int32_t, size_t);
+static void elf_section_header(int, int, uint32_t, void *, bool, uint32_t, int, int,
+ int, int);
+static void elf_write_sections(void);
+static struct SAA *elf_build_symtab(int32_t *, int32_t *);
+static struct SAA *elf_build_reltab(uint32_t *, struct Reloc *);
+static void add_sectname(char *, char *);
+
+struct erel {
+ int offset, info;
+};
+
+struct symlininfo {
+ int offset;
+ int section; /* index into sects[] */
+ int segto; /* internal section number */
+ char *name; /* shallow-copied pointer of section name */
+};
+
+struct linelist {
+ struct linelist *next;
+ struct linelist *last;
+ struct symlininfo info;
+ char *filename;
+ int line;
+};
+
+struct sectlist {
+ struct SAA *psaa;
+ int section;
+ int line;
+ int offset;
+ int file;
+ struct sectlist *next;
+ struct sectlist *last;
+};
+
+/* common debug variables */
+static int currentline = 1;
+static int debug_immcall = 0;
+
+/* stabs debug variables */
+static struct linelist *stabslines = 0;
+static int numlinestabs = 0;
+static char *stabs_filename = 0;
+static uint8_t *stabbuf = 0, *stabstrbuf = 0, *stabrelbuf = 0;
+static int stablen, stabstrlen, stabrellen;
+
+/* dwarf debug variables */
+static struct linelist *dwarf_flist = 0, *dwarf_clist = 0, *dwarf_elist = 0;
+static struct sectlist *dwarf_fsect = 0, *dwarf_csect = 0, *dwarf_esect = 0;
+static int dwarf_numfiles = 0, dwarf_nsections;
+static uint8_t *arangesbuf = 0, *arangesrelbuf = 0, *pubnamesbuf = 0, *infobuf = 0, *inforelbuf = 0,
+ *abbrevbuf = 0, *linebuf = 0, *linerelbuf = 0, *framebuf = 0, *locbuf = 0;
+static int8_t line_base = -5, line_range = 14, opcode_base = 13;
+static int arangeslen, arangesrellen, pubnameslen, infolen, inforellen,
+ abbrevlen, linelen, linerellen, framelen, loclen;
+static int32_t dwarf_infosym, dwarf_abbrevsym, dwarf_linesym;
+
+
+static struct dfmt df_dwarf;
+static struct dfmt df_stabs;
+static struct Symbol *lastsym;
+
+/* common debugging routines */
+static void debugx32_typevalue(int32_t);
+static void debugx32_deflabel(char *, int32_t, int64_t, int, char *);
+static void debugx32_directive(const char *, const char *);
+
+/* stabs debugging routines */
+static void stabsx32_linenum(const char *filename, int32_t linenumber, int32_t);
+static void stabsx32_output(int, void *);
+static void stabsx32_generate(void);
+static void stabsx32_cleanup(void);
+
+/* dwarf debugging routines */
+static void dwarfx32_init(void);
+static void dwarfx32_linenum(const char *filename, int32_t linenumber, int32_t);
+static void dwarfx32_output(int, void *);
+static void dwarfx32_generate(void);
+static void dwarfx32_cleanup(void);
+static void dwarfx32_findfile(const char *);
+static void dwarfx32_findsect(const int);
+
+/*
+ * Special section numbers which are used to define ELF special
+ * symbols, which can be used with WRT to provide PIC relocation
+ * types.
+ */
+static int32_t elf_gotpc_sect, elf_gotoff_sect;
+static int32_t elf_got_sect, elf_plt_sect;
+static int32_t elf_sym_sect;
+static int32_t elf_gottpoff_sect;
+
+static void elf_init(void)
+{
+ maxbits = 64;
+ sects = NULL;
+ nsects = sectlen = 0;
+ syms = saa_init((int32_t)sizeof(struct Symbol));
+ nlocals = nglobs = ndebugs = 0;
+ bsym = raa_init();
+ strs = saa_init(1L);
+ saa_wbytes(strs, "\0", 1L);
+ saa_wbytes(strs, elf_module, strlen(elf_module)+1);
+ strslen = 2 + strlen(elf_module);
+ shstrtab = NULL;
+ shstrtablen = shstrtabsize = 0;;
+ add_sectname("", "");
+
+ fwds = NULL;
+
+ elf_gotpc_sect = seg_alloc();
+ define_label("..gotpc", elf_gotpc_sect + 1, 0L, NULL, false, false);
+ elf_gotoff_sect = seg_alloc();
+ define_label("..gotoff", elf_gotoff_sect + 1, 0L, NULL, false, false);
+ elf_got_sect = seg_alloc();
+ define_label("..got", elf_got_sect + 1, 0L, NULL, false, false);
+ elf_plt_sect = seg_alloc();
+ define_label("..plt", elf_plt_sect + 1, 0L, NULL, false, false);
+ elf_sym_sect = seg_alloc();
+ define_label("..sym", elf_sym_sect + 1, 0L, NULL, false, false);
+ elf_gottpoff_sect = seg_alloc();
+ define_label("..gottpoff", elf_gottpoff_sect + 1, 0L, NULL, false, false);
+
+ def_seg = seg_alloc();
+
+}
+
+static void elf_cleanup(int debuginfo)
+{
+ struct Reloc *r;
+ int i;
+
+ (void)debuginfo;
+
+ elf_write();
+ for (i = 0; i < nsects; i++) {
+ if (sects[i]->type != SHT_NOBITS)
+ saa_free(sects[i]->data);
+ if (sects[i]->head)
+ saa_free(sects[i]->rel);
+ while (sects[i]->head) {
+ r = sects[i]->head;
+ sects[i]->head = sects[i]->head->next;
+ nasm_free(r);
+ }
+ }
+ nasm_free(sects);
+ saa_free(syms);
+ raa_free(bsym);
+ saa_free(strs);
+ if (of_elfx32.current_dfmt) {
+ of_elfx32.current_dfmt->cleanup();
+ }
+}
+
+/* add entry to the elf .shstrtab section */
+static void add_sectname(char *firsthalf, char *secondhalf)
+{
+ int len = strlen(firsthalf) + strlen(secondhalf);
+ while (shstrtablen + len + 1 > shstrtabsize)
+ shstrtab = nasm_realloc(shstrtab, (shstrtabsize += SHSTR_DELTA));
+ strcpy(shstrtab + shstrtablen, firsthalf);
+ strcat(shstrtab + shstrtablen, secondhalf);
+ shstrtablen += len + 1;
+}
+
+static int elf_make_section(char *name, int type, int flags, int align)
+{
+ struct Section *s;
+
+ s = nasm_zalloc(sizeof(*s));
+
+ if (type != SHT_NOBITS)
+ s->data = saa_init(1L);
+ s->tail = &s->head;
+ if (!strcmp(name, ".text"))
+ s->index = def_seg;
+ else
+ s->index = seg_alloc();
+ add_sectname("", name);
+
+ s->name = nasm_strdup(name);
+ s->type = type;
+ s->flags = flags;
+ s->align = align;
+
+ if (nsects >= sectlen)
+ sects = nasm_realloc(sects, (sectlen += SECT_DELTA) * sizeof(*sects));
+ sects[nsects++] = s;
+
+ return nsects - 1;
+}
+
+static int32_t elf_section_names(char *name, int pass, int *bits)
+{
+ char *p;
+ uint32_t flags, flags_and, flags_or;
+ uint64_t align;
+ int type, i;
+
+ /*
+ * Default is 64 bits.
+ */
+ if (!name) {
+ *bits = 64;
+ return def_seg;
+ }
+
+ p = nasm_skip_word(name);
+ if (*p)
+ *p++ = '\0';
+ flags_and = flags_or = type = align = 0;
+
+ section_attrib(name, p, pass, &flags_and,
+ &flags_or, &align, &type);
+
+ if (!strcmp(name, ".shstrtab") ||
+ !strcmp(name, ".symtab") ||
+ !strcmp(name, ".strtab")) {
+ nasm_error(ERR_NONFATAL, "attempt to redefine reserved section"
+ "name `%s'", name);
+ return NO_SEG;
+ }
+
+ for (i = 0; i < nsects; i++)
+ if (!strcmp(name, sects[i]->name))
+ break;
+ if (i == nsects) {
+ const struct elf_known_section *ks = elf_known_sections;
+
+ while (ks->name) {
+ if (!strcmp(name, ks->name))
+ break;
+ ks++;
+ }
+
+ type = type ? type : ks->type;
+ align = align ? align : ks->align;
+ flags = (ks->flags & ~flags_and) | flags_or;
+
+ i = elf_make_section(name, type, flags, align);
+ } else if (pass == 1) {
+ if ((type && sects[i]->type != type)
+ || (align && sects[i]->align != align)
+ || (flags_and && ((sects[i]->flags & flags_and) != flags_or)))
+ nasm_error(ERR_WARNING, "incompatible section attributes ignored on"
+ " redeclaration of section `%s'", name);
+ }
+
+ return sects[i]->index;
+}
+
+static void elf_deflabel(char *name, int32_t segment, int64_t offset,
+ int is_global, char *special)
+{
+ int pos = strslen;
+ struct Symbol *sym;
+ bool special_used = false;
+
+#if defined(DEBUG) && DEBUG>2
+ nasm_error(ERR_DEBUG,
+ " elf_deflabel: %s, seg=%"PRIx32", off=%"PRIx64", is_global=%d, %s\n",
+ name, segment, offset, is_global, special);
+#endif
+ if (name[0] == '.' && name[1] == '.' && name[2] != '@') {
+ /*
+ * This is a NASM special symbol. We never allow it into
+ * the ELF symbol table, even if it's a valid one. If it
+ * _isn't_ a valid one, we should barf immediately.
+ */
+ if (strcmp(name, "..gotpc") && strcmp(name, "..gotoff") &&
+ strcmp(name, "..got") && strcmp(name, "..plt") &&
+ strcmp(name, "..sym") && strcmp(name, "..gottpoff"))
+ nasm_error(ERR_NONFATAL, "unrecognised special symbol `%s'", name);
+ return;
+ }
+
+ if (is_global == 3) {
+ struct Symbol **s;
+ /*
+ * Fix up a forward-reference symbol size from the first
+ * pass.
+ */
+ for (s = &fwds; *s; s = &(*s)->nextfwd)
+ if (!strcmp((*s)->name, name)) {
+ struct tokenval tokval;
+ expr *e;
+ char *p = nasm_skip_spaces(nasm_skip_word(special));
+
+ stdscan_reset();
+ stdscan_set(p);
+ tokval.t_type = TOKEN_INVALID;
+ e = evaluate(stdscan, NULL, &tokval, NULL, 1, nasm_error, NULL);
+ if (e) {
+ if (!is_simple(e))
+ nasm_error(ERR_NONFATAL, "cannot use relocatable"
+ " expression as symbol size");
+ else
+ (*s)->size = reloc_value(e);
+ }
+
+ /*
+ * Remove it from the list of unresolved sizes.
+ */
+ nasm_free((*s)->name);
+ *s = (*s)->nextfwd;
+ return;
+ }
+ return; /* it wasn't an important one */
+ }
+
+ saa_wbytes(strs, name, (int32_t)(1 + strlen(name)));
+ strslen += 1 + strlen(name);
+
+ lastsym = sym = saa_wstruct(syms);
+
+ memset(&sym->symv, 0, sizeof(struct rbtree));
+
+ sym->strpos = pos;
+ sym->type = is_global ? SYM_GLOBAL : SYM_LOCAL;
+ sym->other = STV_DEFAULT;
+ sym->size = 0;
+ if (segment == NO_SEG)
+ sym->section = SHN_ABS;
+ else {
+ int i;
+ sym->section = SHN_UNDEF;
+ if (segment == def_seg) {
+ /* we have to be sure at least text section is there */
+ int tempint;
+ if (segment != elf_section_names(".text", 2, &tempint))
+ nasm_error(ERR_PANIC, "strange segment conditions in ELF driver");
+ }
+ for (i = 0; i < nsects; i++) {
+ if (segment == sects[i]->index) {
+ sym->section = i + 1;
+ break;
+ }
+ }
+ }
+
+ if (is_global == 2) {
+ sym->size = offset;
+ sym->symv.key = 0;
+ sym->section = SHN_COMMON;
+ /*
+ * We have a common variable. Check the special text to see
+ * if it's a valid number and power of two; if so, store it
+ * as the alignment for the common variable.
+ */
+ if (special) {
+ bool err;
+ sym->symv.key = readnum(special, &err);
+ if (err)
+ nasm_error(ERR_NONFATAL, "alignment constraint `%s' is not a"
+ " valid number", special);
+ else if ((sym->symv.key | (sym->symv.key - 1)) != 2 * sym->symv.key - 1)
+ nasm_error(ERR_NONFATAL, "alignment constraint `%s' is not a"
+ " power of two", special);
+ }
+ special_used = true;
+ } else
+ sym->symv.key = (sym->section == SHN_UNDEF ? 0 : offset);
+
+ if (sym->type == SYM_GLOBAL) {
+ /*
+ * If sym->section == SHN_ABS, then the first line of the
+ * else section would cause a core dump, because its a reference
+ * beyond the end of the section array.
+ * This behaviour is exhibited by this code:
+ * GLOBAL crash_nasm
+ * crash_nasm equ 0
+ * To avoid such a crash, such requests are silently discarded.
+ * This may not be the best solution.
+ */
+ if (sym->section == SHN_UNDEF || sym->section == SHN_COMMON) {
+ bsym = raa_write(bsym, segment, nglobs);
+ } else if (sym->section != SHN_ABS) {
+ /*
+ * This is a global symbol; so we must add it to the rbtree
+ * of global symbols in its section.
+ *
+ * In addition, we check the special text for symbol
+ * type and size information.
+ */
+ sects[sym->section-1]->gsyms =
+ rb_insert(sects[sym->section-1]->gsyms, &sym->symv);
+
+ if (special) {
+ int n = strcspn(special, " \t");
+
+ if (!nasm_strnicmp(special, "function", n))
+ sym->type |= STT_FUNC;
+ else if (!nasm_strnicmp(special, "data", n) ||
+ !nasm_strnicmp(special, "object", n))
+ sym->type |= STT_OBJECT;
+ else if (!nasm_strnicmp(special, "notype", n))
+ sym->type |= STT_NOTYPE;
+ else
+ nasm_error(ERR_NONFATAL, "unrecognised symbol type `%.*s'",
+ n, special);
+ special += n;
+
+ special = nasm_skip_spaces(special);
+ if (*special) {
+ n = strcspn(special, " \t");
+ if (!nasm_strnicmp(special, "default", n))
+ sym->other = STV_DEFAULT;
+ else if (!nasm_strnicmp(special, "internal", n))
+ sym->other = STV_INTERNAL;
+ else if (!nasm_strnicmp(special, "hidden", n))
+ sym->other = STV_HIDDEN;
+ else if (!nasm_strnicmp(special, "protected", n))
+ sym->other = STV_PROTECTED;
+ else
+ n = 0;
+ special += n;
+ }
+
+ if (*special) {
+ struct tokenval tokval;
+ expr *e;
+ int fwd = 0;
+ char *saveme = stdscan_get();
+
+ while (special[n] && nasm_isspace(special[n]))
+ n++;
+ /*
+ * We have a size expression; attempt to
+ * evaluate it.
+ */
+ stdscan_reset();
+ stdscan_set(special + n);
+ tokval.t_type = TOKEN_INVALID;
+ e = evaluate(stdscan, NULL, &tokval, &fwd, 0, nasm_error,
+ NULL);
+ if (fwd) {
+ sym->nextfwd = fwds;
+ fwds = sym;
+ sym->name = nasm_strdup(name);
+ } else if (e) {
+ if (!is_simple(e))
+ nasm_error(ERR_NONFATAL, "cannot use relocatable"
+ " expression as symbol size");
+ else
+ sym->size = reloc_value(e);
+ }
+ stdscan_set(saveme);
+ }
+ special_used = true;
+ }
+ /*
+ * If TLS segment, mark symbol accordingly.
+ */
+ if (sects[sym->section - 1]->flags & SHF_TLS) {
+ sym->type &= 0xf0;
+ sym->type |= STT_TLS;
+ }
+ }
+ sym->globnum = nglobs;
+ nglobs++;
+ } else
+ nlocals++;
+
+ if (special && !special_used)
+ nasm_error(ERR_NONFATAL, "no special symbol features supported here");
+}
+
+static void elf_add_reloc(struct Section *sect, int32_t segment,
+ int32_t offset, int type)
+{
+ struct Reloc *r;
+
+ r = *sect->tail = nasm_zalloc(sizeof(struct Reloc));
+ sect->tail = &r->next;
+
+ r->address = sect->len;
+ r->offset = offset;
+
+ if (segment != NO_SEG) {
+ int i;
+ for (i = 0; i < nsects; i++)
+ if (segment == sects[i]->index)
+ r->symbol = i + 2;
+ if (!r->symbol)
+ r->symbol = GLOBAL_TEMP_BASE + raa_read(bsym, segment);
+ }
+ r->type = type;
+
+ sect->nrelocs++;
+}
+
+/*
+ * This routine deals with ..got and ..sym relocations: the more
+ * complicated kinds. In shared-library writing, some relocations
+ * with respect to global symbols must refer to the precise symbol
+ * rather than referring to an offset from the base of the section
+ * _containing_ the symbol. Such relocations call to this routine,
+ * which searches the symbol list for the symbol in question.
+ *
+ * R_X86_64_GOT32 references require the _exact_ symbol address to be
+ * used; R_X86_64_32 references can be at an offset from the symbol.
+ * The boolean argument `exact' tells us this.
+ *
+ * Return value is the adjusted value of `addr', having become an
+ * offset from the symbol rather than the section. Should always be
+ * zero when returning from an exact call.
+ *
+ * Limitation: if you define two symbols at the same place,
+ * confusion will occur.
+ *
+ * Inefficiency: we search, currently, using a linked list which
+ * isn't even necessarily sorted.
+ */
+static void elf_add_gsym_reloc(struct Section *sect,
+ int32_t segment, uint32_t offset, int32_t pcrel,
+ int type, bool exact)
+{
+ struct Reloc *r;
+ struct Section *s;
+ struct Symbol *sym;
+ struct rbtree *srb;
+ int i;
+
+ /*
+ * First look up the segment/offset pair and find a global
+ * symbol corresponding to it. If it's not one of our segments,
+ * then it must be an external symbol, in which case we're fine
+ * doing a normal elf_add_reloc after first sanity-checking
+ * that the offset from the symbol is zero.
+ */
+ s = NULL;
+ for (i = 0; i < nsects; i++)
+ if (segment == sects[i]->index) {
+ s = sects[i];
+ break;
+ }
+
+ if (!s) {
+ if (exact && offset)
+ nasm_error(ERR_NONFATAL, "invalid access to an external symbol");
+ else
+ elf_add_reloc(sect, segment, offset - pcrel, type);
+ return;
+ }
+
+ srb = rb_search(s->gsyms, offset);
+ if (!srb || (exact && srb->key != offset)) {
+ nasm_error(ERR_NONFATAL, "unable to find a suitable global symbol"
+ " for this reference");
+ return;
+ }
+ sym = container_of(srb, struct Symbol, symv);
+
+ r = *sect->tail = nasm_malloc(sizeof(struct Reloc));
+ sect->tail = &r->next;
+ r->next = NULL;
+
+ r->address = sect->len;
+ r->offset = offset - pcrel - sym->symv.key;
+ r->symbol = GLOBAL_TEMP_BASE + sym->globnum;
+ r->type = type;
+
+ sect->nrelocs++;
+}
+
+static void elf_out(int32_t segto, const void *data,
+ enum out_type type, uint64_t size,
+ int32_t segment, int32_t wrt)
+{
+ struct Section *s;
+ int32_t addr;
+ int reltype, bytes;
+ int i;
+ static struct symlininfo sinfo;
+
+#if defined(DEBUG) && DEBUG>2
+ if (data)
+ nasm_error(ERR_DEBUG,
+ " elf_out line: %d type: %x seg: %"PRIx32" segto: %"PRIx32" bytes: %"PRIx64" data: %"PRIx64"\n",
+ currentline, type, segment, segto, size, *(int64_t *)data);
+ else
+ nasm_error(ERR_DEBUG,
+ " elf_out line: %d type: %x seg: %"PRIx32" segto: %"PRIx32" bytes: %"PRIx64"\n",
+ currentline, type, segment, segto, size);
+#endif
+
+ /*
+ * handle absolute-assembly (structure definitions)
+ */
+ if (segto == NO_SEG) {
+ if (type != OUT_RESERVE)
+ nasm_error(ERR_NONFATAL, "attempt to assemble code in [ABSOLUTE]"
+ " space");
+ return;
+ }
+
+ s = NULL;
+ for (i = 0; i < nsects; i++)
+ if (segto == sects[i]->index) {
+ s = sects[i];
+ break;
+ }
+ if (!s) {
+ int tempint; /* ignored */
+ if (segto != elf_section_names(".text", 2, &tempint))
+ nasm_error(ERR_PANIC, "strange segment conditions in ELF driver");
+ else {
+ s = sects[nsects - 1];
+ i = nsects - 1;
+ }
+ }
+
+ /* again some stabs debugging stuff */
+ if (of_elfx32.current_dfmt) {
+ sinfo.offset = s->len;
+ sinfo.section = i;
+ sinfo.segto = segto;
+ sinfo.name = s->name;
+ of_elfx32.current_dfmt->debug_output(TY_DEBUGSYMLIN, &sinfo);
+ }
+ /* end of debugging stuff */
+
+ if (s->type == SHT_NOBITS && type != OUT_RESERVE) {
+ nasm_error(ERR_WARNING, "attempt to initialize memory in"
+ " BSS section `%s': ignored", s->name);
+ s->len += realsize(type, size);
+ return;
+ }
+
+ switch (type) {
+ case OUT_RESERVE:
+ if (s->type == SHT_PROGBITS) {
+ nasm_error(ERR_WARNING, "uninitialized space declared in"
+ " non-BSS section `%s': zeroing", s->name);
+ elf_sect_write(s, NULL, size);
+ } else
+ s->len += size;
+ break;
+
+ case OUT_RAWDATA:
+ if (segment != NO_SEG)
+ nasm_error(ERR_PANIC, "OUT_RAWDATA with other than NO_SEG");
+ elf_sect_write(s, data, size);
+ break;
+
+ case OUT_ADDRESS:
+ addr = *(int64_t *)data;
+ if (segment == NO_SEG) {
+ /* Do nothing */
+ } else if (segment % 2) {
+ nasm_error(ERR_NONFATAL, "ELF format does not support"
+ " segment base references");
+ } else {
+ if (wrt == NO_SEG) {
+ switch ((int)size) {
+ case 1:
+ elf_add_reloc(s, segment, addr, R_X86_64_8);
+ break;
+ case 2:
+ elf_add_reloc(s, segment, addr, R_X86_64_16);
+ break;
+ case 4:
+ elf_add_reloc(s, segment, addr, R_X86_64_32);
+ break;
+ case 8:
+ elf_add_reloc(s, segment, addr, R_X86_64_64);
+ break;
+ default:
+ nasm_error(ERR_PANIC, "internal error elfx32-hpa-871");
+ break;
+ }
+ addr = 0;
+ } else if (wrt == elf_gotpc_sect + 1) {
+ /*
+ * The user will supply GOT relative to $$. ELF
+ * will let us have GOT relative to $. So we
+ * need to fix up the data item by $-$$.
+ */
+ addr += s->len;
+ elf_add_reloc(s, segment, addr, R_X86_64_GOTPC32);
+ addr = 0;
+ } else if (wrt == elf_gotoff_sect + 1) {
+ nasm_error(ERR_NONFATAL, "ELFX32 doesn't support "
+ "R_X86_64_GOTOFF64");
+ } else if (wrt == elf_got_sect + 1) {
+ switch ((int)size) {
+ case 4:
+ elf_add_gsym_reloc(s, segment, addr, 0,
+ R_X86_64_GOT32, true);
+ addr = 0;
+ break;
+ default:
+ nasm_error(ERR_NONFATAL, "invalid ..got reference");
+ break;
+ }
+ } else if (wrt == elf_sym_sect + 1) {
+ switch ((int)size) {
+ case 1:
+ elf_add_gsym_reloc(s, segment, addr, 0,
+ R_X86_64_8, false);
+ addr = 0;
+ break;
+ case 2:
+ elf_add_gsym_reloc(s, segment, addr, 0,
+ R_X86_64_16, false);
+ addr = 0;
+ break;
+ case 4:
+ elf_add_gsym_reloc(s, segment, addr, 0,
+ R_X86_64_32, false);
+ addr = 0;
+ break;
+ case 8:
+ elf_add_gsym_reloc(s, segment, addr, 0,
+ R_X86_64_64, false);
+ addr = 0;
+ break;
+ default:
+ nasm_error(ERR_PANIC, "internal error elfx32-hpa-903");
+ break;
+ }
+ } else if (wrt == elf_plt_sect + 1) {
+ nasm_error(ERR_NONFATAL, "ELF format cannot produce non-PC-"
+ "relative PLT references");
+ } else {
+ nasm_error(ERR_NONFATAL, "ELF format does not support this"
+ " use of WRT");
+ }
+ }
+ elf_sect_writeaddr(s, addr, size);
+ break;
+
+ case OUT_REL1ADR:
+ reltype = R_X86_64_PC8;
+ bytes = 1;
+ goto rel12adr;
+
+ case OUT_REL2ADR:
+ reltype = R_X86_64_PC16;
+ bytes = 2;
+ goto rel12adr;
+
+ rel12adr:
+ addr = *(int64_t *)data - size;
+ if (segment == segto)
+ nasm_error(ERR_PANIC, "intra-segment OUT_REL1ADR");
+ if (segment == NO_SEG) {
+ /* Do nothing */
+ } else if (segment % 2) {
+ nasm_error(ERR_NONFATAL, "ELF format does not support"
+ " segment base references");
+ } else {
+ if (wrt == NO_SEG) {
+ elf_add_reloc(s, segment, addr, reltype);
+ addr = 0;
+ } else {
+ nasm_error(ERR_NONFATAL,
+ "Unsupported non-32-bit ELF relocation");
+ }
+ }
+ elf_sect_writeaddr(s, addr, bytes);
+ break;
+
+ case OUT_REL4ADR:
+ addr = *(int64_t *)data - size;
+ if (segment == segto)
+ nasm_error(ERR_PANIC, "intra-segment OUT_REL4ADR");
+ if (segment == NO_SEG) {
+ /* Do nothing */
+ } else if (segment % 2) {
+ nasm_error(ERR_NONFATAL, "ELFX32 format does not support"
+ " segment base references");
+ } else {
+ if (wrt == NO_SEG) {
+ elf_add_reloc(s, segment, addr, R_X86_64_PC32);
+ addr = 0;
+ } else if (wrt == elf_plt_sect + 1) {
+ elf_add_gsym_reloc(s, segment, addr+size, size,
+ R_X86_64_PLT32, true);
+ addr = 0;
+ } else if (wrt == elf_gotpc_sect + 1 ||
+ wrt == elf_got_sect + 1) {
+ elf_add_gsym_reloc(s, segment, addr+size, size,
+ R_X86_64_GOTPCREL, true);
+ addr = 0;
+ } else if (wrt == elf_gotoff_sect + 1 ||
+ wrt == elf_got_sect + 1) {
+ nasm_error(ERR_NONFATAL, "invalid ..gotoff reference");
+ } else if (wrt == elf_gottpoff_sect + 1) {
+ elf_add_gsym_reloc(s, segment, addr+size, size,
+ R_X86_64_GOTTPOFF, true);
+ addr = 0;
+ } else {
+ nasm_error(ERR_NONFATAL, "ELFX32 format does not support this"
+ " use of WRT");
+ }
+ }
+ elf_sect_writeaddr(s, addr, 4);
+ break;
+
+ case OUT_REL8ADR:
+ nasm_error(ERR_NONFATAL,
+ "32-bit ELF format does not support 64-bit relocations");
+ addr = 0;
+ elf_sect_writeaddr(s, addr, 8);
+ break;
+ }
+}
+
+static void elf_write(void)
+{
+ int align;
+ char *p;
+ int i;
+
+ struct SAA *symtab;
+ int32_t symtablen, symtablocal;
+
+ /*
+ * Work out how many sections we will have. We have SHN_UNDEF,
+ * then the flexible user sections, then the fixed sections
+ * `.shstrtab', `.symtab' and `.strtab', then optionally
+ * relocation sections for the user sections.
+ */
+ nsections = sec_numspecial + 1;
+ if (of_elfx32.current_dfmt == &df_stabs)
+ nsections += 3;
+ else if (of_elfx32.current_dfmt == &df_dwarf)
+ nsections += 10;
+
+ add_sectname("", ".shstrtab");
+ add_sectname("", ".symtab");
+ add_sectname("", ".strtab");
+ for (i = 0; i < nsects; i++) {
+ nsections++; /* for the section itself */
+ if (sects[i]->head) {
+ nsections++; /* for its relocations */
+ add_sectname(".rela", sects[i]->name);
+ }
+ }
+
+ if (of_elfx32.current_dfmt == &df_stabs) {
+ /* in case the debug information is wanted, just add these three sections... */
+ add_sectname("", ".stab");
+ add_sectname("", ".stabstr");
+ add_sectname(".rel", ".stab");
+ }
+
+ else if (of_elfx32.current_dfmt == &df_dwarf) {
+ /* the dwarf debug standard specifies the following ten sections,
+ not all of which are currently implemented,
+ although all of them are defined. */
+ add_sectname("", ".debug_aranges");
+ add_sectname(".rela", ".debug_aranges");
+ add_sectname("", ".debug_pubnames");
+ add_sectname("", ".debug_info");
+ add_sectname(".rela", ".debug_info");
+ add_sectname("", ".debug_abbrev");
+ add_sectname("", ".debug_line");
+ add_sectname(".rela", ".debug_line");
+ add_sectname("", ".debug_frame");
+ add_sectname("", ".debug_loc");
+ }
+
+ /*
+ * Output the ELF header.
+ */
+ fwrite("\177ELF\1\1\1", 7, 1, ofile);
+ fputc(elf_osabi, ofile);
+ fputc(elf_abiver, ofile);
+ fwritezero(7, ofile);
+ fwriteint16_t(ET_REL, ofile); /* relocatable file */
+ fwriteint16_t(EM_X86_64, ofile); /* processor ID */
+ fwriteint32_t(1L, ofile); /* EV_CURRENT file format version */
+ fwriteint32_t(0L, ofile); /* no entry point */
+ fwriteint32_t(0L, ofile); /* no program header table */
+ fwriteint32_t(0x40L, ofile); /* section headers straight after
+ * ELF header plus alignment */
+ fwriteint32_t(0L, ofile); /* X86_64 defines no special flags */
+ fwriteint16_t(0x34, ofile); /* size of ELF header */
+ fwriteint16_t(0, ofile); /* no program header table, again */
+ fwriteint16_t(0, ofile); /* still no program header table */
+ fwriteint16_t(sizeof(Elf32_Shdr), ofile); /* size of section header */
+ fwriteint16_t(nsections, ofile); /* number of sections */
+ fwriteint16_t(sec_shstrtab, ofile); /* string table section index for
+ * section header table */
+ fwriteint32_t(0L, ofile); /* align to 0x40 bytes */
+ fwriteint32_t(0L, ofile);
+ fwriteint32_t(0L, ofile);
+
+ /*
+ * Build the symbol table and relocation tables.
+ */
+ symtab = elf_build_symtab(&symtablen, &symtablocal);
+ for (i = 0; i < nsects; i++)
+ if (sects[i]->head)
+ sects[i]->rel = elf_build_reltab(&sects[i]->rellen,
+ sects[i]->head);
+
+ /*
+ * Now output the section header table.
+ */
+
+ elf_foffs = 0x40 + sizeof(Elf32_Shdr) * nsections;
+ align = ALIGN(elf_foffs, SEC_FILEALIGN) - elf_foffs;
+ elf_foffs += align;
+ elf_nsect = 0;
+ elf_sects = nasm_malloc(sizeof(*elf_sects) * nsections);
+
+ /* SHN_UNDEF */
+ elf_section_header(0, SHT_NULL, 0, NULL, false, 0, SHN_UNDEF, 0, 0, 0);
+ p = shstrtab + 1;
+
+ /* The normal sections */
+ for (i = 0; i < nsects; i++) {
+ elf_section_header(p - shstrtab, sects[i]->type, sects[i]->flags,
+ (sects[i]->type == SHT_PROGBITS ?
+ sects[i]->data : NULL), true,
+ sects[i]->len, 0, 0, sects[i]->align, 0);
+ p += strlen(p) + 1;
+ }
+
+ /* .shstrtab */
+ elf_section_header(p - shstrtab, SHT_STRTAB, 0, shstrtab, false,
+ shstrtablen, 0, 0, 1, 0);
+ p += strlen(p) + 1;
+
+ /* .symtab */
+ elf_section_header(p - shstrtab, SHT_SYMTAB, 0, symtab, true,
+ symtablen, sec_strtab, symtablocal, 4, 16);
+ p += strlen(p) + 1;
+
+ /* .strtab */
+ elf_section_header(p - shstrtab, SHT_STRTAB, 0, strs, true,
+ strslen, 0, 0, 1, 0);
+ p += strlen(p) + 1;
+
+ /* The relocation sections */
+ for (i = 0; i < nsects; i++)
+ if (sects[i]->head) {
+ elf_section_header(p - shstrtab, SHT_RELA, 0, sects[i]->rel, true,
+ sects[i]->rellen, sec_symtab, i + 1, 4, 12);
+ p += strlen(p) + 1;
+ }
+
+ if (of_elfx32.current_dfmt == &df_stabs) {
+ /* for debugging information, create the last three sections
+ which are the .stab , .stabstr and .rel.stab sections respectively */
+
+ /* this function call creates the stab sections in memory */
+ stabsx32_generate();
+
+ if (stabbuf && stabstrbuf && stabrelbuf) {
+ elf_section_header(p - shstrtab, SHT_PROGBITS, 0, stabbuf, false,
+ stablen, sec_stabstr, 0, 4, 12);
+ p += strlen(p) + 1;
+
+ elf_section_header(p - shstrtab, SHT_STRTAB, 0, stabstrbuf, false,
+ stabstrlen, 0, 0, 4, 0);
+ p += strlen(p) + 1;
+
+ /* link -> symtable info -> section to refer to */
+ elf_section_header(p - shstrtab, SHT_REL, 0, stabrelbuf, false,
+ stabrellen, sec_symtab, sec_stab, 4, 8);
+ p += strlen(p) + 1;
+ }
+ } else if (of_elfx32.current_dfmt == &df_dwarf) {
+ /* for dwarf debugging information, create the ten dwarf sections */
+
+ /* this function call creates the dwarf sections in memory */
+ if (dwarf_fsect)
+ dwarfx32_generate();
+
+ elf_section_header(p - shstrtab, SHT_PROGBITS, 0, arangesbuf, false,
+ arangeslen, 0, 0, 1, 0);
+ p += strlen(p) + 1;
+
+ elf_section_header(p - shstrtab, SHT_RELA, 0, arangesrelbuf, false,
+ arangesrellen, sec_symtab, sec_debug_aranges, 1, 12);
+ p += strlen(p) + 1;
+
+ elf_section_header(p - shstrtab, SHT_PROGBITS, 0, pubnamesbuf, false,
+ pubnameslen, 0, 0, 1, 0);
+ p += strlen(p) + 1;
+
+ elf_section_header(p - shstrtab, SHT_PROGBITS, 0, infobuf, false,
+ infolen, 0, 0, 1, 0);
+ p += strlen(p) + 1;
+
+ elf_section_header(p - shstrtab, SHT_RELA, 0, inforelbuf, false,
+ inforellen, sec_symtab, sec_debug_info, 1, 12);
+ p += strlen(p) + 1;
+
+ elf_section_header(p - shstrtab, SHT_PROGBITS, 0, abbrevbuf, false,
+ abbrevlen, 0, 0, 1, 0);
+ p += strlen(p) + 1;
+
+ elf_section_header(p - shstrtab, SHT_PROGBITS, 0, linebuf, false,
+ linelen, 0, 0, 1, 0);
+ p += strlen(p) + 1;
+
+ elf_section_header(p - shstrtab, SHT_RELA, 0, linerelbuf, false,
+ linerellen, sec_symtab, sec_debug_line, 1, 12);
+ p += strlen(p) + 1;
+
+ elf_section_header(p - shstrtab, SHT_PROGBITS, 0, framebuf, false,
+ framelen, 0, 0, 8, 0);
+ p += strlen(p) + 1;
+
+ elf_section_header(p - shstrtab, SHT_PROGBITS, 0, locbuf, false,
+ loclen, 0, 0, 1, 0);
+ p += strlen(p) + 1;
+ }
+ fwritezero(align, ofile);
+
+ /*
+ * Now output the sections.
+ */
+ elf_write_sections();
+
+ nasm_free(elf_sects);
+ saa_free(symtab);
+}
+
+static struct SAA *elf_build_symtab(int32_t *len, int32_t *local)
+{
+ struct SAA *s = saa_init(1L);
+ struct Symbol *sym;
+ uint8_t entry[24], *p;
+ int i;
+
+ *len = *local = 0;
+
+ /*
+ * First, an all-zeros entry, required by the ELF spec.
+ */
+ saa_wbytes(s, NULL, 16L); /* null symbol table entry */
+ *len += 16;
+ (*local)++;
+
+ /*
+ * Next, an entry for the file name.
+ */
+ p = entry;
+ WRITELONG(p, 1); /* we know it's 1st entry in strtab */
+ WRITELONG(p, 0); /* no value */
+ WRITELONG(p, 0); /* no size either */
+ WRITESHORT(p, STT_FILE); /* type FILE */
+ WRITESHORT(p, SHN_ABS);
+ saa_wbytes(s, entry, 16L);
+ *len += 16;
+ (*local)++;
+
+ /*
+ * Now some standard symbols defining the segments, for relocation
+ * purposes.
+ */
+ for (i = 1; i <= nsects; i++) {
+ p = entry;
+ WRITELONG(p, 0); /* no symbol name */
+ WRITELONG(p, 0); /* offset zero */
+ WRITELONG(p, 0); /* size zero */
+ WRITESHORT(p, STT_SECTION); /* type, binding, and visibility */
+ WRITESHORT(p, i); /* section id */
+ saa_wbytes(s, entry, 16L);
+ *len += 16;
+ (*local)++;
+ }
+
+
+ /*
+ * Now the other local symbols.
+ */
+ saa_rewind(syms);
+ while ((sym = saa_rstruct(syms))) {
+ if (sym->type & SYM_GLOBAL)
+ continue;
+ p = entry;
+ WRITELONG(p, sym->strpos); /* index into symbol string table */
+ WRITELONG(p, sym->symv.key); /* value of symbol */
+ WRITELONG(p, sym->size); /* size of symbol */
+ WRITECHAR(p, sym->type); /* type and binding */
+ WRITECHAR(p, sym->other); /* visibility */
+ WRITESHORT(p, sym->section); /* index into section header table */
+ saa_wbytes(s, entry, 16L);
+ *len += 16;
+ (*local)++;
+ }
+ /*
+ * dwarf needs symbols for debug sections
+ * which are relocation targets.
+ */
+ if (of_elfx32.current_dfmt == &df_dwarf) {
+ dwarf_infosym = *local;
+ p = entry;
+ WRITELONG(p, 0); /* no symbol name */
+ WRITELONG(p, 0); /* offset zero */
+ WRITELONG(p, 0); /* size zero */
+ WRITESHORT(p, STT_SECTION); /* type, binding, and visibility */
+ WRITESHORT(p, sec_debug_info); /* section id */
+ saa_wbytes(s, entry, 16L);
+ *len += 16;
+ (*local)++;
+ dwarf_abbrevsym = *local;
+ p = entry;
+ WRITELONG(p, 0); /* no symbol name */
+ WRITELONG(p, 0); /* offset zero */
+ WRITELONG(p, 0); /* size zero */
+ WRITESHORT(p, STT_SECTION); /* type, binding, and visibility */
+ WRITESHORT(p, sec_debug_abbrev); /* section id */
+ saa_wbytes(s, entry, 16L);
+ *len += 16;
+ (*local)++;
+ dwarf_linesym = *local;
+ p = entry;
+ WRITELONG(p, 0); /* no symbol name */
+ WRITELONG(p, 0); /* offset zero */
+ WRITELONG(p, 0); /* size zero */
+ WRITESHORT(p, STT_SECTION); /* type, binding, and visibility */
+ WRITESHORT(p, sec_debug_line); /* section id */
+ saa_wbytes(s, entry, 16L);
+ *len += 16;
+ (*local)++;
+ }
+
+ /*
+ * Now the global symbols.
+ */
+ saa_rewind(syms);
+ while ((sym = saa_rstruct(syms))) {
+ if (!(sym->type & SYM_GLOBAL))
+ continue;
+ p = entry;
+ WRITELONG(p, sym->strpos);
+ WRITELONG(p, sym->symv.key);
+ WRITELONG(p, sym->size);
+ WRITECHAR(p, sym->type); /* type and binding */
+ WRITECHAR(p, sym->other); /* visibility */
+ WRITESHORT(p, sym->section);
+ saa_wbytes(s, entry, 16L);
+ *len += 16;
+ }
+
+ return s;
+}
+
+static struct SAA *elf_build_reltab(uint32_t *len, struct Reloc *r)
+{
+ struct SAA *s;
+ uint8_t *p, entry[12];
+ int32_t global_offset;
+
+ if (!r)
+ return NULL;
+
+ s = saa_init(1L);
+ *len = 0;
+
+ /*
+ * How to onvert from a global placeholder to a real symbol index;
+ * the +2 refers to the two special entries, the null entry and
+ * the filename entry.
+ */
+ global_offset = -GLOBAL_TEMP_BASE + nsects + nlocals + ndebugs + 2;
+
+ while (r) {
+ int32_t sym = r->symbol;
+
+ if (sym >= GLOBAL_TEMP_BASE)
+ sym += global_offset;
+
+ p = entry;
+ WRITELONG(p, r->address);
+ WRITELONG(p, (sym << 8) + r->type);
+ WRITELONG(p, r->offset);
+ saa_wbytes(s, entry, 12L);
+ *len += 12;
+
+ r = r->next;
+ }
+
+ return s;
+}
+
+static void elf_section_header(int name, int type, uint32_t flags,
+ void *data, bool is_saa, uint32_t datalen,
+ int link, int info, int align, int eltsize)
+{
+ elf_sects[elf_nsect].data = data;
+ elf_sects[elf_nsect].len = datalen;
+ elf_sects[elf_nsect].is_saa = is_saa;
+ elf_nsect++;
+
+ fwriteint32_t((int32_t)name, ofile);
+ fwriteint32_t((int32_t)type, ofile);
+ fwriteint32_t((int32_t)flags, ofile);
+ fwriteint32_t(0L, ofile); /* no address, ever, in object files */
+ fwriteint32_t(type == 0 ? 0L : elf_foffs, ofile);
+ fwriteint32_t(datalen, ofile);
+ if (data)
+ elf_foffs += ALIGN(datalen, SEC_FILEALIGN);
+ fwriteint32_t((int32_t)link, ofile);
+ fwriteint32_t((int32_t)info, ofile);
+ fwriteint32_t((int32_t)align, ofile);
+ fwriteint32_t((int32_t)eltsize, ofile);
+}
+
+static void elf_write_sections(void)
+{
+ int i;
+ for (i = 0; i < elf_nsect; i++)
+ if (elf_sects[i].data) {
+ int32_t len = elf_sects[i].len;
+ int32_t reallen = ALIGN(len, SEC_FILEALIGN);
+ int32_t align = reallen - len;
+ if (elf_sects[i].is_saa)
+ saa_fpwrite(elf_sects[i].data, ofile);
+ else
+ fwrite(elf_sects[i].data, len, 1, ofile);
+ fwritezero(align, ofile);
+ }
+}
+
+static void elf_sect_write(struct Section *sect, const void *data, size_t len)
+{
+ saa_wbytes(sect->data, data, len);
+ sect->len += len;
+}
+static void elf_sect_writeaddr(struct Section *sect, int32_t data, size_t len)
+{
+ saa_writeaddr(sect->data, data, len);
+ sect->len += len;
+}
+
+static void elf_sectalign(int32_t seg, unsigned int value)
+{
+ struct Section *s = NULL;
+ int i;
+
+ for (i = 0; i < nsects; i++) {
+ if (sects[i]->index == seg) {
+ s = sects[i];
+ break;
+ }
+ }
+ if (!s || !is_power2(value))
+ return;
+
+ if (value > s->align)
+ s->align = value;
+}
+
+static int32_t elf_segbase(int32_t segment)
+{
+ return segment;
+}
+
+static int elf_directive(enum directives directive, char *value, int pass)
+{
+ bool err;
+ int64_t n;
+ char *p;
+
+ switch (directive) {
+ case D_OSABI:
+ if (pass == 2)
+ return 1; /* ignore in pass 2 */
+
+ n = readnum(value, &err);
+ if (err) {
+ nasm_error(ERR_NONFATAL, "`osabi' directive requires a parameter");
+ return 1;
+ }
+ if (n < 0 || n > 255) {
+ nasm_error(ERR_NONFATAL, "valid osabi numbers are 0 to 255");
+ return 1;
+ }
+ elf_osabi = n;
+ elf_abiver = 0;
+
+ if ((p = strchr(value,',')) == NULL)
+ return 1;
+
+ n = readnum(p+1, &err);
+ if (err || n < 0 || n > 255) {
+ nasm_error(ERR_NONFATAL, "invalid ABI version number (valid: 0 to 255)");
+ return 1;
+ }
+
+ elf_abiver = n;
+ return 1;
+
+ default:
+ return 0;
+ }
+}
+
+static void elf_filename(char *inname, char *outname)
+{
+ strcpy(elf_module, inname);
+ standard_extension(inname, outname, ".o");
+}
+
+extern macros_t elf_stdmac[];
+
+static int elf_set_info(enum geninfo type, char **val)
+{
+ (void)type;
+ (void)val;
+ return 0;
+}
+static struct dfmt df_dwarf = {
+ "ELFX32 (x86-64) dwarf debug format for Linux/Unix",
+ "dwarf",
+ dwarfx32_init,
+ dwarfx32_linenum,
+ debugx32_deflabel,
+ debugx32_directive,
+ debugx32_typevalue,
+ dwarfx32_output,
+ dwarfx32_cleanup
+};
+static struct dfmt df_stabs = {
+ "ELFX32 (x86-64) stabs debug format for Linux/Unix",
+ "stabs",
+ null_debug_init,
+ stabsx32_linenum,
+ debugx32_deflabel,
+ debugx32_directive,
+ debugx32_typevalue,
+ stabsx32_output,
+ stabsx32_cleanup
+};
+
+struct dfmt *elfx32_debugs_arr[3] = { &df_dwarf, &df_stabs, NULL };
+
+struct ofmt of_elfx32 = {
+ "ELFX32 (x86_64) object files (e.g. Linux)",
+ "elfx32",
+ 0,
+ elfx32_debugs_arr,
+ &df_stabs,
+ elf_stdmac,
+ elf_init,
+ elf_set_info,
+ elf_out,
+ elf_deflabel,
+ elf_section_names,
+ elf_sectalign,
+ elf_segbase,
+ elf_directive,
+ elf_filename,
+ elf_cleanup
+};
+
+/* common debugging routines */
+static void debugx32_deflabel(char *name, int32_t segment, int64_t offset,
+ int is_global, char *special)
+{
+ (void)name;
+ (void)segment;
+ (void)offset;
+ (void)is_global;
+ (void)special;
+}
+
+static void debugx32_directive(const char *directive, const char *params)
+{
+ (void)directive;
+ (void)params;
+}
+
+static void debugx32_typevalue(int32_t type)
+{
+ int32_t stype, ssize;
+ switch (TYM_TYPE(type)) {
+ case TY_LABEL:
+ ssize = 0;
+ stype = STT_NOTYPE;
+ break;
+ case TY_BYTE:
+ ssize = 1;
+ stype = STT_OBJECT;
+ break;
+ case TY_WORD:
+ ssize = 2;
+ stype = STT_OBJECT;
+ break;
+ case TY_DWORD:
+ ssize = 4;
+ stype = STT_OBJECT;
+ break;
+ case TY_FLOAT:
+ ssize = 4;
+ stype = STT_OBJECT;
+ break;
+ case TY_QWORD:
+ ssize = 8;
+ stype = STT_OBJECT;
+ break;
+ case TY_TBYTE:
+ ssize = 10;
+ stype = STT_OBJECT;
+ break;
+ case TY_OWORD:
+ ssize = 16;
+ stype = STT_OBJECT;
+ break;
+ case TY_YWORD:
+ ssize = 32;
+ stype = STT_OBJECT;
+ break;
+ case TY_COMMON:
+ ssize = 0;
+ stype = STT_COMMON;
+ break;
+ case TY_SEG:
+ ssize = 0;
+ stype = STT_SECTION;
+ break;
+ case TY_EXTERN:
+ ssize = 0;
+ stype = STT_NOTYPE;
+ break;
+ case TY_EQU:
+ ssize = 0;
+ stype = STT_NOTYPE;
+ break;
+ default:
+ ssize = 0;
+ stype = STT_NOTYPE;
+ break;
+ }
+ if (stype == STT_OBJECT && lastsym && !lastsym->type) {
+ lastsym->size = ssize;
+ lastsym->type = stype;
+ }
+}
+
+/* stabs debugging routines */
+
+static void stabsx32_linenum(const char *filename, int32_t linenumber, int32_t segto)
+{
+ (void)segto;
+ if (!stabs_filename) {
+ stabs_filename = (char *)nasm_malloc(strlen(filename) + 1);
+ strcpy(stabs_filename, filename);
+ } else {
+ if (strcmp(stabs_filename, filename)) {
+ /* yep, a memory leak...this program is one-shot anyway, so who cares...
+ in fact, this leak comes in quite handy to maintain a list of files
+ encountered so far in the symbol lines... */
+
+ /* why not nasm_free(stabs_filename); we're done with the old one */
+
+ stabs_filename = (char *)nasm_malloc(strlen(filename) + 1);
+ strcpy(stabs_filename, filename);
+ }
+ }
+ debug_immcall = 1;
+ currentline = linenumber;
+}
+
+
+static void stabsx32_output(int type, void *param)
+{
+ struct symlininfo *s;
+ struct linelist *el;
+ if (type == TY_DEBUGSYMLIN) {
+ if (debug_immcall) {
+ s = (struct symlininfo *)param;
+ if (!(sects[s->section]->flags & SHF_EXECINSTR))
+ return; /* line info is only collected for executable sections */
+ numlinestabs++;
+ el = (struct linelist *)nasm_malloc(sizeof(struct linelist));
+ el->info.offset = s->offset;
+ el->info.section = s->section;
+ el->info.name = s->name;
+ el->line = currentline;
+ el->filename = stabs_filename;
+ el->next = 0;
+ if (stabslines) {
+ stabslines->last->next = el;
+ stabslines->last = el;
+ } else {
+ stabslines = el;
+ stabslines->last = el;
+ }
+ }
+ }
+ debug_immcall = 0;
+}
+
+/* for creating the .stab , .stabstr and .rel.stab sections in memory */
+
+static void stabsx32_generate(void)
+{
+ int i, numfiles, strsize, numstabs = 0, currfile, mainfileindex;
+ uint8_t *sbuf, *ssbuf, *rbuf, *sptr, *rptr;
+ char **allfiles;
+ int *fileidx;
+
+ struct linelist *ptr;
+
+ ptr = stabslines;
+
+ allfiles = (char **)nasm_zalloc(numlinestabs * sizeof(char *));
+ numfiles = 0;
+ while (ptr) {
+ if (numfiles == 0) {
+ allfiles[0] = ptr->filename;
+ numfiles++;
+ } else {
+ for (i = 0; i < numfiles; i++) {
+ if (!strcmp(allfiles[i], ptr->filename))
+ break;
+ }
+ if (i >= numfiles) {
+ allfiles[i] = ptr->filename;
+ numfiles++;
+ }
+ }
+ ptr = ptr->next;
+ }
+ strsize = 1;
+ fileidx = (int *)nasm_malloc(numfiles * sizeof(int));
+ for (i = 0; i < numfiles; i++) {
+ fileidx[i] = strsize;
+ strsize += strlen(allfiles[i]) + 1;
+ }
+ mainfileindex = 0;
+ for (i = 0; i < numfiles; i++) {
+ if (!strcmp(allfiles[i], elf_module)) {
+ mainfileindex = i;
+ break;
+ }
+ }
+
+ /*
+ * worst case size of the stab buffer would be:
+ * the sourcefiles changes each line, which would mean 1 SOL, 1 SYMLIN per line
+ * plus one "ending" entry
+ */
+ sbuf = (uint8_t *)nasm_malloc((numlinestabs * 2 + 4) *
+ sizeof(struct stabentry));
+ ssbuf = (uint8_t *)nasm_malloc(strsize);
+ rbuf = (uint8_t *)nasm_malloc(numlinestabs * 8 * (2 + 3));
+ rptr = rbuf;
+
+ for (i = 0; i < numfiles; i++)
+ strcpy((char *)ssbuf + fileidx[i], allfiles[i]);
+ ssbuf[0] = 0;
+
+ stabstrlen = strsize; /* set global variable for length of stab strings */
+
+ sptr = sbuf;
+ ptr = stabslines;
+ numstabs = 0;
+
+ if (ptr) {
+ /*
+ * this is the first stab, its strx points to the filename of the
+ * the source-file, the n_desc field should be set to the number
+ * of remaining stabs
+ */
+ WRITE_STAB(sptr, fileidx[0], 0, 0, 0, strlen(allfiles[0] + 12));
+
+ /* this is the stab for the main source file */
+ WRITE_STAB(sptr, fileidx[mainfileindex], N_SO, 0, 0, 0);
+
+ /* relocation table entry */
+
+ /*
+ * Since the symbol table has two entries before
+ * the section symbols, the index in the info.section
+ * member must be adjusted by adding 2
+ */
+
+ WRITELONG(rptr, (sptr - sbuf) - 4);
+ WRITELONG(rptr, ((ptr->info.section + 2) << 8) | R_X86_64_32);
+
+ numstabs++;
+ currfile = mainfileindex;
+ }
+
+ while (ptr) {
+ if (strcmp(allfiles[currfile], ptr->filename)) {
+ /* oops file has changed... */
+ for (i = 0; i < numfiles; i++)
+ if (!strcmp(allfiles[i], ptr->filename))
+ break;
+ currfile = i;
+ WRITE_STAB(sptr, fileidx[currfile], N_SOL, 0, 0,
+ ptr->info.offset);
+ numstabs++;
+
+ /* relocation table entry */
+
+ WRITELONG(rptr, (sptr - sbuf) - 4);
+ WRITELONG(rptr, ((ptr->info.section + 2) << 8) | R_X86_64_32);
+ }
+
+ WRITE_STAB(sptr, 0, N_SLINE, 0, ptr->line, ptr->info.offset);
+ numstabs++;
+
+ /* relocation table entry */
+
+ WRITELONG(rptr, (sptr - sbuf) - 4);
+ WRITELONG(rptr, ((ptr->info.section + 2) << 8) | R_X86_64_32);
+
+ ptr = ptr->next;
+
+ }
+
+ /* this is an "ending" token */
+ WRITE_STAB(sptr, 0, N_SO, 0, 0, 0);
+ numstabs++;
+
+ ((struct stabentry *)sbuf)->n_desc = numstabs;
+
+ nasm_free(allfiles);
+ nasm_free(fileidx);
+
+ stablen = (sptr - sbuf);
+ stabrellen = (rptr - rbuf);
+ stabrelbuf = rbuf;
+ stabbuf = sbuf;
+ stabstrbuf = ssbuf;
+}
+
+static void stabsx32_cleanup(void)
+{
+ struct linelist *ptr, *del;
+ if (!stabslines)
+ return;
+
+ ptr = stabslines;
+ while (ptr) {
+ del = ptr;
+ ptr = ptr->next;
+ nasm_free(del);
+ }
+
+ nasm_free(stabbuf);
+ nasm_free(stabrelbuf);
+ nasm_free(stabstrbuf);
+}
+
+/* dwarf routines */
+
+static void dwarfx32_init(void)
+{
+ ndebugs = 3; /* 3 debug symbols */
+}
+
+static void dwarfx32_linenum(const char *filename, int32_t linenumber,
+ int32_t segto)
+{
+ (void)segto;
+ dwarfx32_findfile(filename);
+ debug_immcall = 1;
+ currentline = linenumber;
+}
+
+/* called from elf_out with type == TY_DEBUGSYMLIN */
+static void dwarfx32_output(int type, void *param)
+{
+ int ln, aa, inx, maxln, soc;
+ struct symlininfo *s;
+ struct SAA *plinep;
+
+ (void)type;
+
+ s = (struct symlininfo *)param;
+
+ /* line number info is only gathered for executable sections */
+ if (!(sects[s->section]->flags & SHF_EXECINSTR))
+ return;
+
+ /* Check if section index has changed */
+ if (!(dwarf_csect && (dwarf_csect->section) == (s->section)))
+ dwarfx32_findsect(s->section);
+
+ /* do nothing unless line or file has changed */
+ if (!debug_immcall)
+ return;
+
+ ln = currentline - dwarf_csect->line;
+ aa = s->offset - dwarf_csect->offset;
+ inx = dwarf_clist->line;
+ plinep = dwarf_csect->psaa;
+ /* check for file change */
+ if (!(inx == dwarf_csect->file)) {
+ saa_write8(plinep,DW_LNS_set_file);
+ saa_write8(plinep,inx);
+ dwarf_csect->file = inx;
+ }
+ /* check for line change */
+ if (ln) {
+ /* test if in range of special op code */
+ maxln = line_base + line_range;
+ soc = (ln - line_base) + (line_range * aa) + opcode_base;
+ if (ln >= line_base && ln < maxln && soc < 256) {
+ saa_write8(plinep,soc);
+ } else {
+ saa_write8(plinep,DW_LNS_advance_line);
+ saa_wleb128s(plinep,ln);
+ if (aa) {
+ saa_write8(plinep,DW_LNS_advance_pc);
+ saa_wleb128u(plinep,aa);
+ }
+ }
+ dwarf_csect->line = currentline;
+ dwarf_csect->offset = s->offset;
+ }
+
+ /* show change handled */
+ debug_immcall = 0;
+}
+
+
+static void dwarfx32_generate(void)
+{
+ uint8_t *pbuf;
+ int indx;
+ struct linelist *ftentry;
+ struct SAA *paranges, *ppubnames, *pinfo, *pabbrev, *plines, *plinep;
+ struct SAA *parangesrel, *plinesrel, *pinforel;
+ struct sectlist *psect;
+ size_t saalen, linepoff, totlen, highaddr;
+
+ /* write epilogues for each line program range */
+ /* and build aranges section */
+ paranges = saa_init(1L);
+ parangesrel = saa_init(1L);
+ saa_write16(paranges,3); /* dwarf version */
+ saa_write32(parangesrel, paranges->datalen+4);
+ saa_write32(parangesrel, (dwarf_infosym << 8) + R_X86_64_32); /* reloc to info */
+ saa_write32(parangesrel, 0);
+ saa_write32(paranges,0); /* offset into info */
+ saa_write8(paranges,4); /* pointer size */
+ saa_write8(paranges,0); /* not segmented */
+ saa_write32(paranges,0); /* padding */
+ /* iterate though sectlist entries */
+ psect = dwarf_fsect;
+ totlen = 0;
+ highaddr = 0;
+ for (indx = 0; indx < dwarf_nsections; indx++)
+ {
+ plinep = psect->psaa;
+ /* Line Number Program Epilogue */
+ saa_write8(plinep,2); /* std op 2 */
+ saa_write8(plinep,(sects[psect->section]->len)-psect->offset);
+ saa_write8(plinep,DW_LNS_extended_op);
+ saa_write8(plinep,1); /* operand length */
+ saa_write8(plinep,DW_LNE_end_sequence);
+ totlen += plinep->datalen;
+ /* range table relocation entry */
+ saa_write32(parangesrel, paranges->datalen + 4);
+ saa_write32(parangesrel, ((uint32_t) (psect->section + 2) << 8) + R_X86_64_32);
+ saa_write32(parangesrel, (uint32_t) 0);
+ /* range table entry */
+ saa_write32(paranges,0x0000); /* range start */
+ saa_write32(paranges,sects[psect->section]->len); /* range length */
+ highaddr += sects[psect->section]->len;
+ /* done with this entry */
+ psect = psect->next;
+ }
+ saa_write32(paranges,0); /* null address */
+ saa_write32(paranges,0); /* null length */
+ saalen = paranges->datalen;
+ arangeslen = saalen + 4;
+ arangesbuf = pbuf = nasm_malloc(arangeslen);
+ WRITELONG(pbuf,saalen); /* initial length */
+ saa_rnbytes(paranges, pbuf, saalen);
+ saa_free(paranges);
+
+ /* build rela.aranges section */
+ arangesrellen = saalen = parangesrel->datalen;
+ arangesrelbuf = pbuf = nasm_malloc(arangesrellen);
+ saa_rnbytes(parangesrel, pbuf, saalen);
+ saa_free(parangesrel);
+
+ /* build pubnames section */
+ ppubnames = saa_init(1L);
+ saa_write16(ppubnames,3); /* dwarf version */
+ saa_write32(ppubnames,0); /* offset into info */
+ saa_write32(ppubnames,0); /* space used in info */
+ saa_write32(ppubnames,0); /* end of list */
+ saalen = ppubnames->datalen;
+ pubnameslen = saalen + 4;
+ pubnamesbuf = pbuf = nasm_malloc(pubnameslen);
+ WRITELONG(pbuf,saalen); /* initial length */
+ saa_rnbytes(ppubnames, pbuf, saalen);
+ saa_free(ppubnames);
+
+ /* build info section */
+ pinfo = saa_init(1L);
+ pinforel = saa_init(1L);
+ saa_write16(pinfo,3); /* dwarf version */
+ saa_write32(pinforel, pinfo->datalen + 4);
+ saa_write32(pinforel, (dwarf_abbrevsym << 8) + R_X86_64_32); /* reloc to abbrev */
+ saa_write32(pinforel, 0);
+ saa_write32(pinfo,0); /* offset into abbrev */
+ saa_write8(pinfo,4); /* pointer size */
+ saa_write8(pinfo,1); /* abbrviation number LEB128u */
+ saa_write32(pinforel, pinfo->datalen + 4);
+ saa_write32(pinforel, ((dwarf_fsect->section + 2) << 8) + R_X86_64_32);
+ saa_write32(pinforel, 0);
+ saa_write32(pinfo,0); /* DW_AT_low_pc */
+ saa_write32(pinforel, pinfo->datalen + 4);
+ saa_write32(pinforel, ((dwarf_fsect->section + 2) << 8) + R_X86_64_32);
+ saa_write32(pinforel, 0);
+ saa_write32(pinfo,highaddr); /* DW_AT_high_pc */
+ saa_write32(pinforel, pinfo->datalen + 4);
+ saa_write32(pinforel, (dwarf_linesym << 8) + R_X86_64_32); /* reloc to line */
+ saa_write32(pinforel, 0);
+ saa_write32(pinfo,0); /* DW_AT_stmt_list */
+ saa_wbytes(pinfo, elf_module, strlen(elf_module)+1);
+ saa_wbytes(pinfo, nasm_signature, strlen(nasm_signature)+1);
+ saa_write16(pinfo,DW_LANG_Mips_Assembler);
+ saa_write8(pinfo,2); /* abbrviation number LEB128u */
+ saa_write32(pinforel, pinfo->datalen + 4);
+ saa_write32(pinforel, ((dwarf_fsect->section + 2) << 8) + R_X86_64_32);
+ saa_write32(pinforel, 0);
+ saa_write32(pinfo,0); /* DW_AT_low_pc */
+ saa_write32(pinfo,0); /* DW_AT_frame_base */
+ saa_write8(pinfo,0); /* end of entries */
+ saalen = pinfo->datalen;
+ infolen = saalen + 4;
+ infobuf = pbuf = nasm_malloc(infolen);
+ WRITELONG(pbuf,saalen); /* initial length */
+ saa_rnbytes(pinfo, pbuf, saalen);
+ saa_free(pinfo);
+
+ /* build rela.info section */
+ inforellen = saalen = pinforel->datalen;
+ inforelbuf = pbuf = nasm_malloc(inforellen);
+ saa_rnbytes(pinforel, pbuf, saalen);
+ saa_free(pinforel);
+
+ /* build abbrev section */
+ pabbrev = saa_init(1L);
+ saa_write8(pabbrev,1); /* entry number LEB128u */
+ saa_write8(pabbrev,DW_TAG_compile_unit); /* tag LEB128u */
+ saa_write8(pabbrev,1); /* has children */
+ /* the following attributes and forms are all LEB128u values */
+ saa_write8(pabbrev,DW_AT_low_pc);
+ saa_write8(pabbrev,DW_FORM_addr);
+ saa_write8(pabbrev,DW_AT_high_pc);
+ saa_write8(pabbrev,DW_FORM_addr);
+ saa_write8(pabbrev,DW_AT_stmt_list);
+ saa_write8(pabbrev,DW_FORM_data4);
+ saa_write8(pabbrev,DW_AT_name);
+ saa_write8(pabbrev,DW_FORM_string);
+ saa_write8(pabbrev,DW_AT_producer);
+ saa_write8(pabbrev,DW_FORM_string);
+ saa_write8(pabbrev,DW_AT_language);
+ saa_write8(pabbrev,DW_FORM_data2);
+ saa_write16(pabbrev,0); /* end of entry */
+ /* LEB128u usage same as above */
+ saa_write8(pabbrev,2); /* entry number */
+ saa_write8(pabbrev,DW_TAG_subprogram);
+ saa_write8(pabbrev,0); /* no children */
+ saa_write8(pabbrev,DW_AT_low_pc);
+ saa_write8(pabbrev,DW_FORM_addr);
+ saa_write8(pabbrev,DW_AT_frame_base);
+ saa_write8(pabbrev,DW_FORM_data4);
+ saa_write16(pabbrev,0); /* end of entry */
+ abbrevlen = saalen = pabbrev->datalen;
+ abbrevbuf = pbuf = nasm_malloc(saalen);
+ saa_rnbytes(pabbrev, pbuf, saalen);
+ saa_free(pabbrev);
+
+ /* build line section */
+ /* prolog */
+ plines = saa_init(1L);
+ saa_write8(plines,1); /* Minimum Instruction Length */
+ saa_write8(plines,1); /* Initial value of 'is_stmt' */
+ saa_write8(plines,line_base); /* Line Base */
+ saa_write8(plines,line_range); /* Line Range */
+ saa_write8(plines,opcode_base); /* Opcode Base */
+ /* standard opcode lengths (# of LEB128u operands) */
+ saa_write8(plines,0); /* Std opcode 1 length */
+ saa_write8(plines,1); /* Std opcode 2 length */
+ saa_write8(plines,1); /* Std opcode 3 length */
+ saa_write8(plines,1); /* Std opcode 4 length */
+ saa_write8(plines,1); /* Std opcode 5 length */
+ saa_write8(plines,0); /* Std opcode 6 length */
+ saa_write8(plines,0); /* Std opcode 7 length */
+ saa_write8(plines,0); /* Std opcode 8 length */
+ saa_write8(plines,1); /* Std opcode 9 length */
+ saa_write8(plines,0); /* Std opcode 10 length */
+ saa_write8(plines,0); /* Std opcode 11 length */
+ saa_write8(plines,1); /* Std opcode 12 length */
+ /* Directory Table */
+ saa_write8(plines,0); /* End of table */
+ /* File Name Table */
+ ftentry = dwarf_flist;
+ for (indx = 0;indx<dwarf_numfiles;indx++)
+ {
+ saa_wbytes(plines, ftentry->filename, (int32_t)(strlen(ftentry->filename) + 1));
+ saa_write8(plines,0); /* directory LEB128u */
+ saa_write8(plines,0); /* time LEB128u */
+ saa_write8(plines,0); /* size LEB128u */
+ ftentry = ftentry->next;
+ }
+ saa_write8(plines,0); /* End of table */
+ linepoff = plines->datalen;
+ linelen = linepoff + totlen + 10;
+ linebuf = pbuf = nasm_malloc(linelen);
+ WRITELONG(pbuf,linelen-4); /* initial length */
+ WRITESHORT(pbuf,3); /* dwarf version */
+ WRITELONG(pbuf,linepoff); /* offset to line number program */
+ /* write line header */
+ saalen = linepoff;
+ saa_rnbytes(plines, pbuf, saalen); /* read a given no. of bytes */
+ pbuf += linepoff;
+ saa_free(plines);
+ /* concatonate line program ranges */
+ linepoff += 13;
+ plinesrel = saa_init(1L);
+ psect = dwarf_fsect;
+ for (indx = 0; indx < dwarf_nsections; indx++) {
+ saa_write32(plinesrel, linepoff);
+ saa_write32(plinesrel, ((psect->section + 2) << 8) + R_X86_64_32);
+ saa_write32(plinesrel, 0);
+ plinep = psect->psaa;
+ saalen = plinep->datalen;
+ saa_rnbytes(plinep, pbuf, saalen);
+ pbuf += saalen;
+ linepoff += saalen;
+ saa_free(plinep);
+ /* done with this entry */
+ psect = psect->next;
+ }
+
+
+ /* build rela.lines section */
+ linerellen =saalen = plinesrel->datalen;
+ linerelbuf = pbuf = nasm_malloc(linerellen);
+ saa_rnbytes(plinesrel, pbuf, saalen);
+ saa_free(plinesrel);
+
+ /* build frame section */
+ framelen = 4;
+ framebuf = pbuf = nasm_malloc(framelen);
+ WRITELONG(pbuf,framelen-4); /* initial length */
+
+ /* build loc section */
+ loclen = 16;
+ locbuf = pbuf = nasm_malloc(loclen);
+ WRITELONG(pbuf,0); /* null beginning offset */
+ WRITELONG(pbuf,0); /* null ending offset */
+}
+
+static void dwarfx32_cleanup(void)
+{
+ nasm_free(arangesbuf);
+ nasm_free(arangesrelbuf);
+ nasm_free(pubnamesbuf);
+ nasm_free(infobuf);
+ nasm_free(inforelbuf);
+ nasm_free(abbrevbuf);
+ nasm_free(linebuf);
+ nasm_free(linerelbuf);
+ nasm_free(framebuf);
+ nasm_free(locbuf);
+}
+
+static void dwarfx32_findfile(const char * fname)
+{
+ int finx;
+ struct linelist *match;
+
+ /* return if fname is current file name */
+ if (dwarf_clist && !(strcmp(fname, dwarf_clist->filename)))
+ return;
+
+ /* search for match */
+ match = 0;
+ if (dwarf_flist) {
+ match = dwarf_flist;
+ for (finx = 0; finx < dwarf_numfiles; finx++) {
+ if (!(strcmp(fname, match->filename))) {
+ dwarf_clist = match;
+ return;
+ }
+ }
+ }
+
+ /* add file name to end of list */
+ dwarf_clist = (struct linelist *)nasm_malloc(sizeof(struct linelist));
+ dwarf_numfiles++;
+ dwarf_clist->line = dwarf_numfiles;
+ dwarf_clist->filename = nasm_malloc(strlen(fname) + 1);
+ strcpy(dwarf_clist->filename,fname);
+ dwarf_clist->next = 0;
+ if (!dwarf_flist) { /* if first entry */
+ dwarf_flist = dwarf_elist = dwarf_clist;
+ dwarf_clist->last = 0;
+ } else { /* chain to previous entry */
+ dwarf_elist->next = dwarf_clist;
+ dwarf_elist = dwarf_clist;
+ }
+}
+
+static void dwarfx32_findsect(const int index)
+{
+ int sinx;
+ struct sectlist *match;
+ struct SAA *plinep;
+
+ /* return if index is current section index */
+ if (dwarf_csect && (dwarf_csect->section == index))
+ return;
+
+ /* search for match */
+ match = 0;
+ if (dwarf_fsect) {
+ match = dwarf_fsect;
+ for (sinx = 0; sinx < dwarf_nsections; sinx++) {
+ if ((match->section == index)) {
+ dwarf_csect = match;
+ return;
+ }
+ match = match->next;
+ }
+ }
+
+ /* add entry to end of list */
+ dwarf_csect = (struct sectlist *)nasm_malloc(sizeof(struct sectlist));
+ dwarf_nsections++;
+ dwarf_csect->psaa = plinep = saa_init(1L);
+ dwarf_csect->line = 1;
+ dwarf_csect->offset = 0;
+ dwarf_csect->file = 1;
+ dwarf_csect->section = index;
+ dwarf_csect->next = 0;
+ /* set relocatable address at start of line program */
+ saa_write8(plinep,DW_LNS_extended_op);
+ saa_write8(plinep,5); /* operand length */
+ saa_write8(plinep,DW_LNE_set_address);
+ saa_write32(plinep,0); /* Start Address */
+
+ if (!dwarf_fsect) { /* if first entry */
+ dwarf_fsect = dwarf_esect = dwarf_csect;
+ dwarf_csect->last = 0;
+ } else { /* chain to previous entry */
+ dwarf_esect->next = dwarf_csect;
+ dwarf_esect = dwarf_csect;
+ }
+}
+
+#endif /* OF_ELFX32 */
diff --git a/output/outform.h b/output/outform.h
index 4b809b7..d37a61b 100644
--- a/output/outform.h
+++ b/output/outform.h
@@ -106,6 +106,9 @@
#ifndef OF_ELF32
#define OF_ELF32
#endif
+#ifndef OF_ELFX32
+#define OF_ELFX32
+#endif
#ifndef OF_ELF64
#define OF_ELF64
#endif
@@ -179,6 +182,9 @@
#ifndef OF_ELF64
#define OF_ELF64
#endif
+#ifndef OF_ELFX32
+#define OF_ELFX32
+#endif
#endif
#ifdef OF_OTHERS
@@ -215,6 +221,9 @@
#ifdef OF_NO_ELF64
#undef OF_ELF64
#endif
+#ifdef OF_NO_ELFX32
+#undef OF_ELFX32
+#endif
#ifdef OF_NO_AOUT
#undef OF_AOUT
#endif
@@ -260,6 +269,7 @@ extern struct ofmt of_aout;
extern struct ofmt of_aoutb;
extern struct ofmt of_coff;
extern struct ofmt of_elf32;
+extern struct ofmt of_elfx32;
extern struct ofmt of_elf64;
extern struct ofmt of_as86;
extern struct ofmt of_obj;
@@ -299,6 +309,9 @@ static struct ofmt *drivers[] = {
#ifdef OF_ELF64
&of_elf64,
#endif
+#ifdef OF_ELFX32
+ &of_elfx32,
+#endif
#ifdef OF_AS86
&of_as86,
#endif
diff --git a/output/outieee.c b/output/outieee.c
index a8f6901..94d5e59 100644
--- a/output/outieee.c
+++ b/output/outieee.c
@@ -139,22 +139,22 @@ static struct ExtBack {
/* NOTE: the first segment MUST be the lineno segment */
static struct ieeeSection {
- struct ieeeObjData *data, *datacurr;
struct ieeeSection *next;
+ char *name;
+ struct ieeeObjData *data, *datacurr;
struct ieeeFixupp *fptr, *flptr;
int32_t index; /* the NASM segment id */
int32_t ieee_index; /* the OBJ-file segment index */
int32_t currentpos;
int32_t align; /* can be SEG_ABS + absolute addr */
int32_t startpos;
+ int32_t use32; /* is this segment 32-bit? */
+ struct ieeePublic *pubhead, **pubtail, *lochead, **loctail;
enum {
CMB_PRIVATE = 0,
CMB_PUBLIC = 2,
CMB_COMMON = 6
} combine;
- int32_t use32; /* is this segment 32-bit? */
- struct ieeePublic *pubhead, **pubtail, *lochead, **loctail;
- char *name;
} *seghead, **segtail, *ieee_seg_needs_update;
struct ieeeObjData {
diff --git a/output/outmac64.c b/output/outmac64.c
index f633db0..358ae6e 100644
--- a/output/outmac64.c
+++ b/output/outmac64.c
@@ -299,19 +299,20 @@ static uint8_t get_section_fileindex_by_index(const int32_t index)
static struct symbol *get_closest_section_symbol_by_offset(uint8_t fileindex, int64_t offset)
{
- struct symbol *sym;
+ struct symbol *nearest = NULL;
+ struct symbol *sym;
- for (sym = syms; sym != NULL; sym = sym->next) {
- if ((sym->sect != NO_SECT) &&
- (sym->sect == fileindex) &&
- ((int64_t)sym->value >= offset))
- return sym;
- }
+ for (sym = syms; sym; sym = sym->next) {
+ if ((sym->sect != NO_SECT) && (sym->sect == fileindex)) {
+ if ((int64_t)sym->value > offset)
+ break;
+ nearest = sym;
+ }
+ }
- return NULL;
+ return nearest;
}
-
/*
* Special section numbers which are used to define Mach-O special
* symbols, which can be used with WRT to provide PIC relocation
@@ -579,7 +580,7 @@ static void macho_output(int32_t secto, const void *data,
case OUT_REL4ADR:
p = mydata;
- WRITELONG(p, *(int64_t *)data);
+ WRITELONG(p, *(int64_t *)data + 4 - size);
if (section == secto)
nasm_error(ERR_PANIC, "intra-section OUT_REL4ADR");
diff --git a/output/outobj.c b/output/outobj.c
index b07a7e4..6fa5419 100644
--- a/output/outobj.c
+++ b/output/outobj.c
@@ -570,11 +570,15 @@ static struct ExtBack {
static struct Segment {
struct Segment *next;
+ char *name;
int32_t index; /* the NASM segment id */
int32_t obj_index; /* the OBJ-file segment index */
struct Group *grp; /* the group it beint32_ts to */
uint32_t currentpos;
int32_t align; /* can be SEG_ABS + absolute addr */
+ struct Public *pubhead, **pubtail, *lochead, **loctail;
+ char *segclass, *overlay; /* `class' is a C++ keyword :-) */
+ ObjRecord *orp;
enum {
CMB_PRIVATE = 0,
CMB_PUBLIC = 2,
@@ -582,10 +586,6 @@ static struct Segment {
CMB_COMMON = 6
} combine;
bool use32; /* is this segment 32-bit? */
- struct Public *pubhead, **pubtail, *lochead, **loctail;
- char *name;
- char *segclass, *overlay; /* `class' is a C++ keyword :-) */
- ObjRecord *orp;
} *seghead, **segtail, *obj_seg_needs_update;
static struct Group {
diff --git a/parser.c b/parser.c
index f3c60b2..889adf3 100644
--- a/parser.c
+++ b/parser.c
@@ -68,7 +68,7 @@ void parser_global_info(struct location * locp)
location = locp;
}
-static int prefix_slot(enum prefixes prefix)
+static int prefix_slot(int prefix)
{
switch (prefix) {
case P_WAIT:
@@ -81,12 +81,15 @@ static int prefix_slot(enum prefixes prefix)
case R_GS:
return PPS_SEG;
case P_LOCK:
+ return PPS_LOCK;
case P_REP:
case P_REPE:
case P_REPZ:
case P_REPNE:
case P_REPNZ:
- return PPS_LREP;
+ case P_XACQUIRE:
+ case P_XRELEASE:
+ return PPS_REP;
case P_O16:
case P_O32:
case P_O64:
@@ -192,34 +195,38 @@ static void process_size_override(insn *result, int operand)
insn *parse_line(int pass, char *buffer, insn *result, ldfunc ldef)
{
+ bool insn_is_label = false;
+ struct eval_hints hints;
int operand;
int critical;
- struct eval_hints hints;
- int j;
bool first;
- bool insn_is_label = false;
bool recover;
+ int j;
restart_parse:
- first = true;
- result->forw_ref = false;
+ first = true;
+ result->forw_ref = false;
stdscan_reset();
stdscan_set(buffer);
i = stdscan(NULL, &tokval);
- result->label = NULL; /* Assume no label */
- result->eops = NULL; /* must do this, whatever happens */
- result->operands = 0; /* must initialize this */
+ result->label = NULL; /* Assume no label */
+ result->eops = NULL; /* must do this, whatever happens */
+ result->operands = 0; /* must initialize this */
- if (i == 0) { /* blank line - ignore */
- result->opcode = I_none; /* and no instruction either */
+ /* Ignore blank lines */
+ if (i == TOKEN_EOS) {
+ result->opcode = I_none;
return result;
}
- if (i != TOKEN_ID && i != TOKEN_INSN && i != TOKEN_PREFIX &&
- (i != TOKEN_REG || (REG_SREG & ~nasm_reg_flags[tokval.t_integer]))) {
- nasm_error(ERR_NONFATAL, "label or instruction expected"
- " at start of line");
+
+ if (i != TOKEN_ID &&
+ i != TOKEN_INSN &&
+ i != TOKEN_PREFIX &&
+ (i != TOKEN_REG || !IS_SREG(tokval.t_integer))) {
+ nasm_error(ERR_NONFATAL,
+ "label or instruction expected at start of line");
result->opcode = I_none;
return result;
}
@@ -248,8 +255,9 @@ restart_parse:
}
}
- if (i == 0) {
- result->opcode = I_none; /* this line contains just a label */
+ /* Just a label here */
+ if (i == TOKEN_EOS) {
+ result->opcode = I_none;
return result;
}
@@ -258,8 +266,7 @@ restart_parse:
result->times = 1L;
while (i == TOKEN_PREFIX ||
- (i == TOKEN_REG && !(REG_SREG & ~nasm_reg_flags[tokval.t_integer])))
- {
+ (i == TOKEN_REG && IS_SREG(tokval.t_integer))) {
first = false;
/*
@@ -269,8 +276,7 @@ restart_parse:
expr *value;
i = stdscan(NULL, &tokval);
- value =
- evaluate(stdscan, NULL, &tokval, NULL, pass0, nasm_error, NULL);
+ value = evaluate(stdscan, NULL, &tokval, NULL, pass0, nasm_error, NULL);
i = tokval.t_type;
if (!value) { /* but, error in evaluator */
result->opcode = I_none; /* unrecoverable parse error: */
@@ -307,9 +313,10 @@ restart_parse:
int j;
enum prefixes pfx;
- for (j = 0; j < MAXPREFIX; j++)
+ for (j = 0; j < MAXPREFIX; j++) {
if ((pfx = result->prefixes[j]) != P_none)
break;
+ }
if (i == 0 && pfx != P_none) {
/*
@@ -317,10 +324,10 @@ restart_parse:
* instruction. This is allowed: at this point we
* invent a notional instruction of RESB 0.
*/
- result->opcode = I_RESB;
- result->operands = 1;
- result->oprs[0].type = IMMEDIATE;
- result->oprs[0].offset = 0L;
+ result->opcode = I_RESB;
+ result->operands = 1;
+ result->oprs[0].type = IMMEDIATE;
+ result->oprs[0].offset = 0L;
result->oprs[0].segment = result->oprs[0].wrt = NO_SEG;
return result;
} else {
@@ -361,7 +368,7 @@ restart_parse:
*/
while (1) {
i = stdscan(NULL, &tokval);
- if (i == 0)
+ if (i == TOKEN_EOS)
break;
else if (first && i == ':') {
insn_is_label = true;
@@ -381,9 +388,9 @@ restart_parse:
* a string used as part of an expression...
*/
if (i == TOKEN_STR && is_comma_next()) {
- eop->type = EOT_DB_STRING;
- eop->stringval = tokval.t_charptr;
- eop->stringlen = tokval.t_inttwo;
+ eop->type = EOT_DB_STRING;
+ eop->stringval = tokval.t_charptr;
+ eop->stringlen = tokval.t_inttwo;
i = stdscan(NULL, &tokval); /* eat the comma */
} else if (i == TOKEN_STRFUNC) {
bool parens = false;
@@ -494,13 +501,13 @@ is_expression:
* arguments. However, we'd better check first that it
* _is_ a comma.
*/
- if (i == 0) /* also could be EOL */
+ if (i == TOKEN_EOS) /* also could be EOL */
break;
if (i != ',') {
nasm_error(ERR_NONFATAL, "comma expected after operand %d",
- oper_num);
- result->opcode = I_none; /* unrecoverable parse error: */
- return result; /* ignore this instruction */
+ oper_num);
+ result->opcode = I_none;/* unrecoverable parse error: */
+ return result; /* ignore this instruction */
}
}
@@ -515,15 +522,15 @@ is_expression:
else if (result->eops->next &&
result->eops->next->type != EOT_DB_NUMBER)
nasm_error(ERR_NONFATAL, "`incbin': second parameter is"
- " non-numeric");
+ " non-numeric");
else if (result->eops->next && result->eops->next->next &&
result->eops->next->next->type != EOT_DB_NUMBER)
nasm_error(ERR_NONFATAL, "`incbin': third parameter is"
- " non-numeric");
+ " non-numeric");
else if (result->eops->next && result->eops->next->next &&
result->eops->next->next->next)
nasm_error(ERR_NONFATAL,
- "`incbin': more than three parameters");
+ "`incbin': more than three parameters");
else
return result;
/*
@@ -541,8 +548,10 @@ is_expression:
return result;
}
- /* right. Now we begin to parse the operands. There may be up to four
- * of these, separated by commas, and terminated by a zero token. */
+ /*
+ * Now we begin to parse the operands. There may be up to four
+ * of these, separated by commas, and terminated by a zero token.
+ */
for (operand = 0; operand < MAX_OPERANDS; operand++) {
expr *value; /* used most of the time */
@@ -551,11 +560,11 @@ is_expression:
int setsize = 0;
result->oprs[operand].disp_size = 0; /* have to zero this whatever */
- result->oprs[operand].eaflags = 0; /* and this */
- result->oprs[operand].opflags = 0;
+ result->oprs[operand].eaflags = 0; /* and this */
+ result->oprs[operand].opflags = 0;
i = stdscan(NULL, &tokval);
- if (i == 0)
+ if (i == TOKEN_EOS)
break; /* end of operands: get out of here */
else if (first && i == ':') {
insn_is_label = true;
@@ -655,15 +664,16 @@ is_expression:
/*
* Process the segment override.
*/
- if (value[1].type != 0 || value->value != 1 ||
- REG_SREG & ~nasm_reg_flags[value->type])
+ if (value[1].type != 0 ||
+ value->value != 1 ||
+ !IS_SREG(value->type))
nasm_error(ERR_NONFATAL, "invalid segment override");
else if (result->prefixes[PPS_SEG])
nasm_error(ERR_NONFATAL,
"instruction has conflicting segment overrides");
else {
result->prefixes[PPS_SEG] = value->type;
- if (!(REG_FSGS & ~nasm_reg_flags[value->type]))
+ if (IS_FSGS(value->type))
result->oprs[operand].eaflags |= EAF_FSGS;
}
@@ -834,22 +844,23 @@ is_expression:
result->oprs[operand].offset = o;
} else { /* it's not a memory reference */
if (is_just_unknown(value)) { /* it's immediate but unknown */
- result->oprs[operand].type |= IMMEDIATE;
- result->oprs[operand].opflags |= OPFLAG_UNKNOWN;
- result->oprs[operand].offset = 0; /* don't care */
- result->oprs[operand].segment = NO_SEG; /* don't care again */
- result->oprs[operand].wrt = NO_SEG; /* still don't care */
-
- if(optimizing >= 0 && !(result->oprs[operand].type & STRICT))
- {
+ result->oprs[operand].type |= IMMEDIATE;
+ result->oprs[operand].opflags |= OPFLAG_UNKNOWN;
+ result->oprs[operand].offset = 0; /* don't care */
+ result->oprs[operand].segment = NO_SEG; /* don't care again */
+ result->oprs[operand].wrt = NO_SEG; /* still don't care */
+
+ if(optimizing >= 0 && !(result->oprs[operand].type & STRICT)) {
/* Be optimistic */
- result->oprs[operand].type |= SBYTE16 | SBYTE32 | SBYTE64;
+ result->oprs[operand].type |=
+ SBYTE16 | SBYTE32 | SBYTE64 | UDWORD64 | SDWORD64;
}
} else if (is_reloc(value)) { /* it's immediate */
- result->oprs[operand].type |= IMMEDIATE;
- result->oprs[operand].offset = reloc_value(value);
- result->oprs[operand].segment = reloc_seg(value);
- result->oprs[operand].wrt = reloc_wrt(value);
+ result->oprs[operand].type |= IMMEDIATE;
+ result->oprs[operand].offset = reloc_value(value);
+ result->oprs[operand].segment = reloc_seg(value);
+ result->oprs[operand].wrt = reloc_wrt(value);
+
if (is_simple(value)) {
if (reloc_value(value) == 1)
result->oprs[operand].type |= UNITY;
@@ -859,16 +870,21 @@ is_expression:
int32_t v32 = (int32_t)v64;
int16_t v16 = (int16_t)v32;
- if (v64 >= -128 && v64 <= 127)
+ if (v64 >= -128 && v64 <= 127)
result->oprs[operand].type |= SBYTE64;
- if (v32 >= -128 && v32 <= 127)
+ if (v32 >= -128 && v32 <= 127)
result->oprs[operand].type |= SBYTE32;
- if (v16 >= -128 && v16 <= 127)
+ if (v16 >= -128 && v16 <= 127)
result->oprs[operand].type |= SBYTE16;
+ if ((uint64_t)v64 <= UINT64_C(0xffffffff))
+ result->oprs[operand].type |= UDWORD64;
+ if (v64 >= -INT64_C(0x80000000) &&
+ v64 <= INT64_C(0x7fffffff))
+ result->oprs[operand].type |= SDWORD64;
}
}
} else { /* it's a register */
- unsigned int rs;
+ opflags_t rs;
if (value->type >= EXPR_SIMPLE || value->value != 1) {
nasm_error(ERR_NONFATAL, "invalid operand type");
@@ -896,10 +912,10 @@ is_expression:
} else
rs = 0;
- result->oprs[operand].type &= TO;
- result->oprs[operand].type |= REGISTER;
- result->oprs[operand].type |= nasm_reg_flags[value->type];
- result->oprs[operand].basereg = value->type;
+ result->oprs[operand].type &= TO;
+ result->oprs[operand].type |= REGISTER;
+ result->oprs[operand].type |= nasm_reg_flags[value->type];
+ result->oprs[operand].basereg = value->type;
if (rs && (result->oprs[operand].type & SIZE_MASK) != rs)
nasm_error(ERR_WARNING | ERR_PASS1,
@@ -951,13 +967,14 @@ is_expression:
static int is_comma_next(void)
{
+ struct tokenval tv;
char *p;
int i;
- struct tokenval tv;
p = stdscan_get();
i = stdscan(NULL, &tv);
stdscan_set(p);
+
return (i == ',' || i == ';' || !i);
}
diff --git a/perllib/phash.ph b/perllib/phash.ph
index 6b31f0a..8142c4e 100644
--- a/perllib/phash.ph
+++ b/perllib/phash.ph
@@ -146,7 +146,7 @@ sub gen_perfect_hash($) {
# Minimal power of 2 value for N with enough wiggle room.
# The scaling constant must be larger than 0.5 in order for the
# algorithm to ever terminate.
- my $room = scalar(@keys)*0.8;
+ my $room = int(scalar(@keys)*0.8);
$n = 1;
while ($n < $room) {
$n <<= 1;
@@ -161,7 +161,7 @@ sub gen_perfect_hash($) {
for ($j = 0; $j < $maxj; $j++) {
$sv = $random_sv_vectors[$j];
@hashinfo = gen_hash_n($n, $sv, $href, $run++);
- return @hashinfo if (defined(@hashinfo));
+ return @hashinfo if (@hashinfo);
}
$n <<= 1;
}
@@ -170,32 +170,6 @@ sub gen_perfect_hash($) {
}
#
-# Read input file
-#
-sub read_input() {
- my $key,$val;
- my %out;
- my $x = 0;
-
- while (defined($l = <STDIN>)) {
- chomp $l;
- $l =~ s/\s*(\#.*|)$//;
-
- next if ($l eq '');
-
- if ($l =~ /^([^=]+)\=([^=]+)$/) {
- $out{$1} = $2;
- $x = $2;
- } else {
- $out{$l} = $x;
- }
- $x++;
- }
-
- return %out;
-}
-
-#
# Verify that the hash table is actually correct...
#
sub verify_hash_table($$)
diff --git a/phash.pl b/phash.pl
index e1071b2..3ef6e71 100755
--- a/phash.pl
+++ b/phash.pl
@@ -38,6 +38,32 @@
require 'phash.ph';
#
+# Read input file
+#
+sub read_input() {
+ my $key,$val;
+ my %out;
+ my $x = 0;
+
+ while (defined($l = <STDIN>)) {
+ chomp $l;
+ $l =~ s/\s*(\#.*|)$//;
+
+ next if ($l eq '');
+
+ if ($l =~ /^([^=]+)\=([^=]+)$/) {
+ $out{$1} = $2;
+ $x = $2;
+ } else {
+ $out{$l} = $x;
+ }
+ $x++;
+ }
+
+ return %out;
+}
+
+#
# Main program
#
sub main() {
@@ -49,7 +75,7 @@ sub main() {
%data = read_input();
@hashinfo = gen_perfect_hash(\%data);
- if (!defined(@hashinfo)) {
+ if (!@hashinfo) {
die "$0: no hash found\n";
}
diff --git a/pptok.pl b/pptok.pl
index c9738d3..be85b94 100755
--- a/pptok.pl
+++ b/pptok.pl
@@ -164,7 +164,7 @@ if ($what eq 'c') {
}
my @hashinfo = gen_perfect_hash(\%tokens);
- if (!defined(@hashinfo)) {
+ if (!@hashinfo) {
die "$0: no hash found\n";
}
diff --git a/preproc-nop.c b/preproc-nop.c
new file mode 100644
index 0000000..b43bd80
--- /dev/null
+++ b/preproc-nop.c
@@ -0,0 +1,184 @@
+/* ----------------------------------------------------------------------- *
+ *
+ * Copyright 1996-2012 The NASM Authors - All Rights Reserved
+ * See the file AUTHORS included with the NASM distribution for
+ * the specific copyright holders.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following
+ * conditions are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above
+ * copyright notice, this list of conditions and the following
+ * disclaimer in the documentation and/or other materials provided
+ * with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
+ * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
+ * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * This is a null preprocessor which just copies lines from input
+ * to output. It's used when someone explicitly requests that NASM
+ * not preprocess their source file.
+ */
+
+#include "compiler.h"
+
+#include <stdio.h>
+#include <stdarg.h>
+#include <stdlib.h>
+#include <string.h>
+#include <ctype.h>
+#include <inttypes.h>
+#include <limits.h>
+#include <time.h>
+
+#include "nasm.h"
+#include "nasmlib.h"
+#include "preproc.h"
+
+#define BUF_DELTA 512
+
+static FILE *nop_fp;
+static ListGen *nop_list;
+static int32_t nop_lineinc;
+
+static void nop_reset(char *file, int pass, ListGen *listgen, StrList **deplist)
+{
+ src_set_fname(nasm_strdup(file));
+ src_set_linnum(0);
+ nop_lineinc = 1;
+ nop_fp = fopen(file, "r");
+
+ if (!nop_fp)
+ nasm_error(ERR_FATAL | ERR_NOFILE,
+ "unable to open input file `%s'", file);
+ nop_list = listgen;
+ (void)pass; /* placate compilers */
+
+ if (deplist) {
+ StrList *sl = nasm_malloc(strlen(file)+1+sizeof sl->next);
+ sl->next = NULL;
+ strcpy(sl->str, file);
+ *deplist = sl;
+ }
+}
+
+static char *nop_getline(void)
+{
+ char *buffer, *p, *q;
+ int bufsize;
+
+ bufsize = BUF_DELTA;
+ buffer = nasm_malloc(BUF_DELTA);
+ src_set_linnum(src_get_linnum() + nop_lineinc);
+
+ while (1) { /* Loop to handle %line */
+
+ p = buffer;
+ while (1) { /* Loop to handle long lines */
+ q = fgets(p, bufsize - (p - buffer), nop_fp);
+ if (!q)
+ break;
+ p += strlen(p);
+ if (p > buffer && p[-1] == '\n')
+ break;
+ if (p - buffer > bufsize - 10) {
+ int offset;
+ offset = p - buffer;
+ bufsize += BUF_DELTA;
+ buffer = nasm_realloc(buffer, bufsize);
+ p = buffer + offset;
+ }
+ }
+
+ if (!q && p == buffer) {
+ nasm_free(buffer);
+ return NULL;
+ }
+
+ /*
+ * Play safe: remove CRs, LFs and any spurious ^Zs, if any of
+ * them are present at the end of the line.
+ */
+ buffer[strcspn(buffer, "\r\n\032")] = '\0';
+
+ if (!nasm_strnicmp(buffer, "%line", 5)) {
+ int32_t ln;
+ int li;
+ char *nm = nasm_malloc(strlen(buffer));
+ if (sscanf(buffer + 5, "%"PRId32"+%d %s", &ln, &li, nm) == 3) {
+ nasm_free(src_set_fname(nm));
+ src_set_linnum(ln);
+ nop_lineinc = li;
+ continue;
+ }
+ nasm_free(nm);
+ }
+ break;
+ }
+
+ nop_list->line(LIST_READ, buffer);
+
+ return buffer;
+}
+
+static void nop_cleanup(int pass)
+{
+ (void)pass; /* placate GCC */
+ if (nop_fp) {
+ fclose(nop_fp);
+ nop_fp = NULL;
+ }
+}
+
+static void nop_extra_stdmac(macros_t *macros)
+{
+ (void)macros;
+}
+
+static void nop_pre_define(char *definition)
+{
+ (void)definition;
+}
+
+static void nop_pre_undefine(char *definition)
+{
+ (void)definition;
+}
+
+static void nop_pre_include(char *fname)
+{
+ (void)fname;
+}
+
+static void nop_include_path(char *path)
+{
+ (void)path;
+}
+
+struct preproc_ops preproc_nop = {
+ nop_reset,
+ nop_getline,
+ nop_cleanup,
+ nop_extra_stdmac,
+ nop_pre_define,
+ nop_pre_undefine,
+ nop_pre_include,
+ nop_include_path
+};
diff --git a/preproc.c b/preproc.c
index 07179e1..9d65917 100644
--- a/preproc.c
+++ b/preproc.c
@@ -1,6 +1,6 @@
/* ----------------------------------------------------------------------- *
*
- * Copyright 1996-2010 The NASM Authors - All Rights Reserved
+ * Copyright 1996-2012 The NASM Authors - All Rights Reserved
* See the file AUTHORS included with the NASM distribution for
* the specific copyright holders.
*
@@ -213,6 +213,7 @@ enum pp_token_type {
};
#define PP_CONCAT_MASK(x) (1 << (x))
+#define PP_CONCAT_MATCH(t, mask) (PP_CONCAT_MASK((t)->type) & mask)
struct tokseq_match {
int mask_head;
@@ -458,8 +459,7 @@ static Blocks blocks = { NULL, NULL };
static Token *expand_mmac_params(Token * tline);
static Token *expand_smacro(Token * tline);
static Token *expand_id(Token * tline);
-static Context *get_ctx(const char *name, const char **namep,
- bool all_contexts);
+static Context *get_ctx(const char *name, const char **namep);
static void make_tok_num(Token * tok, int64_t val);
static void error(int severity, const char *fmt, ...);
static void error_precond(int severity, const char *fmt, ...);
@@ -799,81 +799,80 @@ static char *line_from_stdmac(void)
return line;
}
-#define BUF_DELTA 512
-/*
- * Read a line from the top file in istk, handling multiple CR/LFs
- * at the end of the line read, and handling spurious ^Zs. Will
- * return lines from the standard macro set if this has not already
- * been done.
- */
static char *read_line(void)
{
- char *buffer, *p, *q;
- int bufsize, continued_count;
-
- /*
- * standart macros set (predefined) goes first
- */
+ unsigned int size, c, next;
+ const unsigned int delta = 512;
+ const unsigned int pad = 8;
+ unsigned int nr_cont = 0;
+ bool cont = false;
+ char *buffer, *p;
+
+ /* Standart macros set (predefined) goes first */
p = line_from_stdmac();
if (p)
return p;
- /*
- * regular read from a file
- */
- bufsize = BUF_DELTA;
- buffer = nasm_malloc(BUF_DELTA);
- p = buffer;
- continued_count = 0;
- while (1) {
- q = fgets(p, bufsize - (p - buffer), istk->fp);
- if (!q)
+ size = delta;
+ p = buffer = nasm_malloc(size);
+
+ for (;;) {
+ c = fgetc(istk->fp);
+ if ((int)(c) == EOF) {
+ p[0] = 0;
break;
- p += strlen(p);
- if (p > buffer && p[-1] == '\n') {
- /*
- * Convert backslash-CRLF line continuation sequences into
- * nothing at all (for DOS and Windows)
- */
- if (((p - 2) > buffer) && (p[-3] == '\\') && (p[-2] == '\r')) {
- p -= 3;
- *p = 0;
- continued_count++;
+ }
+
+ switch (c) {
+ case '\r':
+ next = fgetc(istk->fp);
+ if (next != '\n')
+ ungetc(next, istk->fp);
+ if (cont) {
+ cont = false;
+ continue;
}
- /*
- * Also convert backslash-LF line continuation sequences into
- * nothing at all (for Unix)
- */
- else if (((p - 1) > buffer) && (p[-2] == '\\')) {
- p -= 2;
- *p = 0;
- continued_count++;
- } else {
- break;
+ break;
+
+ case '\n':
+ if (cont) {
+ cont = false;
+ continue;
}
+ break;
+
+ case '\\':
+ next = fgetc(istk->fp);
+ ungetc(next, istk->fp);
+ if (next == '\r' || next == '\n') {
+ cont = true;
+ nr_cont++;
+ continue;
+ }
+ break;
}
- if (p - buffer > bufsize - 10) {
- int32_t offset = p - buffer;
- bufsize += BUF_DELTA;
- buffer = nasm_realloc(buffer, bufsize);
- p = buffer + offset; /* prevent stale-pointer problems */
+
+ if (c == '\r' || c == '\n') {
+ *p++ = 0;
+ break;
}
+
+ if (p >= (buffer + size - pad)) {
+ buffer = nasm_realloc(buffer, size + delta);
+ p = buffer + size - pad;
+ size += delta;
+ }
+
+ *p++ = (unsigned char)c;
}
- if (!q && p == buffer) {
+ if (p == buffer) {
nasm_free(buffer);
return NULL;
}
src_set_linnum(src_get_linnum() + istk->lineinc +
- (continued_count * istk->lineinc));
-
- /*
- * Play safe: remove CRs as well as LFs, if any of either are
- * present at the end of the line.
- */
- while (--p >= buffer && (*p == '\n' || *p == '\r'))
- *p = '\0';
+ (nr_cont * istk->lineinc));
/*
* Handle spurious ^Z, which may be inserted into source files
@@ -1280,7 +1279,7 @@ static char *detoken(Token * tlist, bool expand_locals)
t->text[0] == '%' && t->text[1] == '$') {
const char *q;
char *p;
- Context *ctx = get_ctx(t->text, &q, false);
+ Context *ctx = get_ctx(t->text, &q);
if (ctx) {
char buffer[40];
snprintf(buffer, sizeof(buffer), "..@%"PRIu32".", ctx->number);
@@ -1445,19 +1444,13 @@ static int mmemcmp(const char *p, const char *q, size_t l, bool casesense)
* NULL, having _already_ reported an error condition, if the
* context stack isn't deep enough for the supplied number of $
* signs.
- * If all_contexts == true, contexts that enclose current are
- * also scanned for such smacro, until it is found; if not -
- * only the context that directly results from the number of $'s
- * in variable's name.
*
* If "namep" is non-NULL, set it to the pointer to the macro name
* tail, i.e. the part beyond %$...
*/
-static Context *get_ctx(const char *name, const char **namep,
- bool all_contexts)
+static Context *get_ctx(const char *name, const char **namep)
{
Context *ctx;
- SMacro *m;
int i;
if (namep)
@@ -1488,47 +1481,7 @@ static Context *get_ctx(const char *name, const char **namep,
if (namep)
*namep = name;
- if (!all_contexts)
- return ctx;
-
- /*
- * NOTE: In 2.10 we will not need lookup in extarnal
- * contexts, so this is a gentle way to inform users
- * about their source code need to be updated
- */
-
- /* first round -- check the current context */
- m = hash_findix(&ctx->localmac, name);
- while (m) {
- if (!mstrcmp(m->name, name, m->casesense))
- return ctx;
- m = m->next;
- }
-
- /* second round - external contexts */
- while ((ctx = ctx->next)) {
- /* Search for this smacro in found context */
- m = hash_findix(&ctx->localmac, name);
- while (m) {
- if (!mstrcmp(m->name, name, m->casesense)) {
- /* NOTE: deprecated as of 2.10 */
- static int once = 0;
- if (!once) {
- error(ERR_WARNING, "context-local macro expansion"
- " fall-through (automatic searching of outer"
- " contexts) will be deprecated starting in"
- " NASM 2.10, please see the NASM Manual for"
- " more information");
- once = 1;
- }
- error(ERR_WARNING, "`%s': context-local macro expansion fall-through", name);
- return ctx;
- }
- m = m->next;
- }
- }
-
- return NULL;
+ return ctx;
}
/*
@@ -1634,7 +1587,7 @@ smacro_defined(Context * ctx, const char *name, int nparam, SMacro ** defn,
smtbl = &ctx->localmac;
} else if (name[0] == '%' && name[1] == '$') {
if (cstk)
- ctx = get_ctx(name, &name, false);
+ ctx = get_ctx(name, &name);
if (!ctx)
return false; /* got to return _something_ */
smtbl = &ctx->localmac;
@@ -3042,7 +2995,7 @@ issue_error:
return DIRECTIVE_FOUND;
}
- ctx = get_ctx(tline->text, &mname, false);
+ ctx = get_ctx(tline->text, &mname);
last = tline;
param_start = tline = tline->next;
nparam = 0;
@@ -3135,7 +3088,7 @@ issue_error:
}
/* Find the context that symbol belongs to */
- ctx = get_ctx(tline->text, &mname, false);
+ ctx = get_ctx(tline->text, &mname);
undef_smacro(ctx, mname);
free_tlist(origline);
return DIRECTIVE_FOUND;
@@ -3156,7 +3109,7 @@ issue_error:
return DIRECTIVE_FOUND;
}
- ctx = get_ctx(tline->text, &mname, false);
+ ctx = get_ctx(tline->text, &mname);
last = tline;
tline = expand_smacro(tline->next);
last->next = NULL;
@@ -3197,7 +3150,7 @@ issue_error:
free_tlist(origline);
return DIRECTIVE_FOUND;
}
- ctx = get_ctx(tline->text, &mname, false);
+ ctx = get_ctx(tline->text, &mname);
last = tline;
tline = expand_smacro(tline->next);
last->next = NULL;
@@ -3252,7 +3205,7 @@ issue_error:
free_tlist(origline);
return DIRECTIVE_FOUND;
}
- ctx = get_ctx(tline->text, &mname, false);
+ ctx = get_ctx(tline->text, &mname);
last = tline;
tline = expand_smacro(tline->next);
last->next = NULL;
@@ -3313,7 +3266,7 @@ issue_error:
free_tlist(origline);
return DIRECTIVE_FOUND;
}
- ctx = get_ctx(tline->text, &mname, false);
+ ctx = get_ctx(tline->text, &mname);
last = tline;
tline = expand_smacro(tline->next);
last->next = NULL;
@@ -3359,7 +3312,7 @@ issue_error:
free_tlist(origline);
return DIRECTIVE_FOUND;
}
- ctx = get_ctx(tline->text, &mname, false);
+ ctx = get_ctx(tline->text, &mname);
last = tline;
tline = expand_smacro(tline->next);
last->next = NULL;
@@ -3424,7 +3377,7 @@ issue_error:
free_tlist(origline);
return DIRECTIVE_FOUND;
}
- ctx = get_ctx(tline->text, &mname, false);
+ ctx = get_ctx(tline->text, &mname);
last = tline;
tline = expand_smacro(tline->next);
last->next = NULL;
@@ -3526,7 +3479,7 @@ issue_error:
free_tlist(origline);
return DIRECTIVE_FOUND;
}
- ctx = get_ctx(tline->text, &mname, false);
+ ctx = get_ctx(tline->text, &mname);
last = tline;
tline = expand_smacro(tline->next);
last->next = NULL;
@@ -3617,7 +3570,6 @@ issue_error:
static int find_cc(Token * t)
{
Token *tt;
- int i, j, k, m;
if (!t)
return -1; /* Probably a %+ without a space */
@@ -3630,133 +3582,160 @@ static int find_cc(Token * t)
if (tt && (tt->type != TOK_OTHER || strcmp(tt->text, ",")))
return -1;
- i = -1;
- j = ARRAY_SIZE(conditions);
- while (j - i > 1) {
- k = (j + i) / 2;
- m = nasm_stricmp(t->text, conditions[k]);
- if (m == 0) {
- i = k;
- j = -2;
- break;
- } else if (m < 0) {
- j = k;
- } else
- i = k;
- }
- if (j != -2)
- return -1;
- return i;
+ return bsii(t->text, (const char **)conditions, ARRAY_SIZE(conditions));
}
+/*
+ * This routines walks over tokens strem and hadnles tokens
+ * pasting, if @handle_explicit passed then explicit pasting
+ * term is handled, otherwise -- implicit pastings only.
+ */
static bool paste_tokens(Token **head, const struct tokseq_match *m,
- int mnum, bool handle_paste_tokens)
+ size_t mnum, bool handle_explicit)
{
- Token **tail, *t, *tt;
- Token **paste_head;
- bool did_paste = false;
- char *tmp;
- int i;
+ Token *tok, *next, **prev_next, **prev_nonspace;
+ bool pasted = false;
+ char *buf, *p;
+ size_t len, i;
+
+ /*
+ * The last token before pasting. We need it
+ * to be able to connect new handled tokens.
+ * In other words if there were a tokens stream
+ *
+ * A -> B -> C -> D
+ *
+ * and we've joined tokens B and C, the resulting
+ * stream should be
+ *
+ * A -> BC -> D
+ */
+ tok = *head;
+ prev_next = NULL;
- /* Now handle token pasting... */
- paste_head = NULL;
- tail = head;
- while ((t = *tail) && (tt = t->next)) {
- switch (t->type) {
+ if (!tok_type_(tok, TOK_WHITESPACE) && !tok_type_(tok, TOK_PASTE))
+ prev_nonspace = head;
+ else
+ prev_nonspace = NULL;
+
+ while (tok && (next = tok->next)) {
+
+ switch (tok->type) {
case TOK_WHITESPACE:
- if (tt->type == TOK_WHITESPACE) {
- /* Zap adjacent whitespace tokens */
- t->next = delete_Token(tt);
- } else {
- /* Do not advance paste_head here */
- tail = &t->next;
- }
+ /* Zap redundant whitespaces */
+ while (tok_type_(next, TOK_WHITESPACE))
+ next = delete_Token(next);
+ tok->next = next;
break;
- case TOK_PASTE: /* %+ */
- if (handle_paste_tokens) {
- /* Zap %+ and whitespace tokens to the right */
- while (t && (t->type == TOK_WHITESPACE ||
- t->type == TOK_PASTE))
- t = *tail = delete_Token(t);
- if (!paste_head || !t)
- break; /* Nothing to paste with */
- tail = paste_head;
- t = *tail;
- tt = t->next;
- while (tok_type_(tt, TOK_WHITESPACE))
- tt = t->next = delete_Token(tt);
- if (tt) {
- tmp = nasm_strcat(t->text, tt->text);
- delete_Token(t);
- tt = delete_Token(tt);
- t = *tail = tokenize(tmp);
- nasm_free(tmp);
- while (t->next) {
- tail = &t->next;
- t = t->next;
- }
- t->next = tt; /* Attach the remaining token chain */
- did_paste = true;
- }
- paste_head = tail;
- tail = &t->next;
+
+ case TOK_PASTE:
+ /* Explicit pasting */
+ if (!handle_explicit)
break;
- }
- /* else fall through */
+ next = delete_Token(tok);
+
+ while (tok_type_(next, TOK_WHITESPACE))
+ next = delete_Token(next);
+
+ if (!pasted)
+ pasted = true;
+
+ /* No ending token */
+ if (!next)
+ error(ERR_FATAL, "No rvalue found on pasting");
+
+ /* Left pasting token is start of line */
+ if (!prev_nonspace)
+ error(ERR_FATAL, "No lvalue found on pasting");
+
+ tok = *prev_nonspace;
+ while (tok_type_(tok, TOK_WHITESPACE))
+ tok = delete_Token(tok);
+ len = strlen(tok->text);
+ len += strlen(next->text);
+
+ p = buf = nasm_malloc(len + 1);
+ strcpy(p, tok->text);
+ p = strchr(p, '\0');
+ strcpy(p, next->text);
+
+ delete_Token(tok);
+
+ tok = tokenize(buf);
+ nasm_free(buf);
+
+ *prev_nonspace = tok;
+ while (tok && tok->next)
+ tok = tok->next;
+
+ tok->next = delete_Token(next);
+
+ /* Restart from pasted tokens head */
+ tok = *prev_nonspace;
+ break;
+
default:
- /*
- * Concatenation of tokens might look nontrivial
- * but in real it's pretty simple -- the caller
- * prepares the masks of token types to be concatenated
- * and we simply find matched sequences and slip
- * them together
- */
+ /* implicit pasting */
for (i = 0; i < mnum; i++) {
- if (PP_CONCAT_MASK(t->type) & m[i].mask_head) {
- size_t len = 0;
- char *tmp, *p;
+ if (!(PP_CONCAT_MATCH(tok, m[i].mask_head)))
+ continue;
- while (tt && (PP_CONCAT_MASK(tt->type) & m[i].mask_tail)) {
- len += strlen(tt->text);
- tt = tt->next;
- }
+ len = 0;
+ while (next && PP_CONCAT_MATCH(next, m[i].mask_tail)) {
+ len += strlen(next->text);
+ next = next->next;
+ }
- /*
- * Now tt points to the first token after
- * the potential paste area...
- */
- if (tt != t->next) {
- /* We have at least two tokens... */
- len += strlen(t->text);
- p = tmp = nasm_malloc(len+1);
- while (t != tt) {
- strcpy(p, t->text);
- p = strchr(p, '\0');
- t = delete_Token(t);
- }
- t = *tail = tokenize(tmp);
- nasm_free(tmp);
- while (t->next) {
- tail = &t->next;
- t = t->next;
- }
- t->next = tt; /* Attach the remaining token chain */
- did_paste = true;
- }
- paste_head = tail;
- tail = &t->next;
+ /* No match */
+ if (tok == next)
break;
+
+ len += strlen(tok->text);
+ p = buf = nasm_malloc(len + 1);
+
+ while (tok != next) {
+ strcpy(p, tok->text);
+ p = strchr(p, '\0');
+ tok = delete_Token(tok);
}
+
+ tok = tokenize(buf);
+ nasm_free(buf);
+
+ if (prev_next)
+ *prev_next = tok;
+ else
+ *head = tok;
+
+ /*
+ * Connect pasted into original stream,
+ * ie A -> new-tokens -> B
+ */
+ while (tok && tok->next)
+ tok = tok->next;
+ tok->next = next;
+
+ if (!pasted)
+ pasted = true;
+
+ /* Restart from pasted tokens head */
+ tok = prev_next ? *prev_next : *head;
}
- if (i >= mnum) { /* no match */
- tail = &t->next;
- if (!tok_type_(t->next, TOK_WHITESPACE))
- paste_head = tail;
- }
+
break;
}
+
+ prev_next = &tok->next;
+
+ if (tok->next &&
+ !tok_type_(tok->next, TOK_WHITESPACE) &&
+ !tok_type_(tok->next, TOK_PASTE))
+ prev_nonspace = prev_next;
+
+ tok = tok->next;
}
- return did_paste;
+
+ return pasted;
}
/*
@@ -4069,7 +4048,7 @@ again:
if (tline->type == TOK_ID) {
head = (SMacro *)hash_findix(&smacros, mname);
} else if (tline->type == TOK_PREPROC_ID) {
- ctx = get_ctx(mname, &mname, true);
+ ctx = get_ctx(mname, &mname);
head = ctx ? (SMacro *)hash_findix(&ctx->localmac, mname) : NULL;
} else
head = NULL;
@@ -4581,7 +4560,7 @@ static int expand_mmacro(Token * tline)
Token *startline = tline;
Token *label = NULL;
int dont_prepend = 0;
- Token **params, *t, *mtok, *tt;
+ Token **params, *t, *tt;
MMacro *m;
Line *l, *ll;
int i, nparam, *paramlen;
@@ -4592,7 +4571,6 @@ static int expand_mmacro(Token * tline)
/* if (!tok_type_(t, TOK_ID)) Lino 02/25/02 */
if (!tok_type_(t, TOK_ID) && !tok_type_(t, TOK_PREPROC_ID))
return 0;
- mtok = t;
m = is_mmacro(t, &params);
if (m) {
mname = t->text;
@@ -5128,7 +5106,7 @@ static void pp_cleanup(int pass)
}
}
-void pp_include_path(char *path)
+static void pp_include_path(char *path)
{
IncPath *i;
@@ -5146,7 +5124,7 @@ void pp_include_path(char *path)
}
}
-void pp_pre_include(char *fname)
+static void pp_pre_include(char *fname)
{
Token *inc, *space, *name;
Line *l;
@@ -5162,7 +5140,7 @@ void pp_pre_include(char *fname)
predef = l;
}
-void pp_pre_define(char *definition)
+static void pp_pre_define(char *definition)
{
Token *def, *space;
Line *l;
@@ -5184,7 +5162,7 @@ void pp_pre_define(char *definition)
predef = l;
}
-void pp_pre_undefine(char *definition)
+static void pp_pre_undefine(char *definition)
{
Token *def, *space;
Line *l;
@@ -5200,27 +5178,7 @@ void pp_pre_undefine(char *definition)
predef = l;
}
-/*
- * Added by Keith Kanios:
- *
- * This function is used to assist with "runtime" preprocessor
- * directives. (e.g. pp_runtime("%define __BITS__ 64");)
- *
- * ERRORS ARE IGNORED HERE, SO MAKE COMPLETELY SURE THAT YOU
- * PASS A VALID STRING TO THIS FUNCTION!!!!!
- */
-
-void pp_runtime(char *definition)
-{
- Token *def;
-
- def = tokenize(definition);
- if (do_directive(def) == NO_DIRECTIVE_FOUND)
- free_tlist(def);
-
-}
-
-void pp_extra_stdmac(macros_t *macros)
+static void pp_extra_stdmac(macros_t *macros)
{
extrastdmac = macros;
}
@@ -5233,8 +5191,13 @@ static void make_tok_num(Token * tok, int64_t val)
tok->type = TOK_NUMBER;
}
-Preproc nasmpp = {
+struct preproc_ops nasmpp = {
pp_reset,
pp_getline,
- pp_cleanup
+ pp_cleanup,
+ pp_extra_stdmac,
+ pp_pre_define,
+ pp_pre_undefine,
+ pp_pre_include,
+ pp_include_path
};
diff --git a/preproc.h b/preproc.h
index e48adda..fdda37c 100644
--- a/preproc.h
+++ b/preproc.h
@@ -47,11 +47,5 @@ extern const uint8_t pp_directives_len[];
typedef const unsigned char macros_t;
enum preproc_token pp_token_hash(const char *token);
-void pp_include_path(char *);
-void pp_pre_include(char *);
-void pp_pre_define(char *);
-void pp_pre_undefine(char *);
-void pp_runtime(char *);
-void pp_extra_stdmac(macros_t *);
#endif
diff --git a/quote.c b/quote.c
index e45dfb2..fe1c97d 100644
--- a/quote.c
+++ b/quote.c
@@ -42,8 +42,6 @@
#include "nasmlib.h"
#include "quote.h"
-#define numvalue(c) ((c)>='a' ? (c)-'a'+10 : (c)>='A' ? (c)-'A'+10 : (c)-'0')
-
char *nasm_quote(char *str, size_t len)
{
char c, c1, *p, *q, *nstr, *ep;
diff --git a/rdoff/Makefile.in b/rdoff/Makefile.in
index 93f2e2a..41fc5f1 100644
--- a/rdoff/Makefile.in
+++ b/rdoff/Makefile.in
@@ -29,8 +29,10 @@ INSTALL_DATA = @INSTALL_DATA@
LN_S = @LN_S@
MKDIR = mkdir
-LDRDFLIBS = rdoff.o nasmlib.o symtab.o collectn.o rdlib.o segtab.o hash.o
-RDXLIBS = rdoff.o rdfload.o symtab.o collectn.o hash.o
+LDRDFLIBS = rdoff.$(O) symtab.$(O) collectn.$(O) \
+ rdlib.$(O) segtab.$(O) hash.$(O)
+RDXLIBS = rdoff.$(O) rdfload.$(O) symtab.$(O) collectn.$(O) hash.$(O)
+NASMLIB = ../nasmlib.$(O)
# Binary suffixes
O = @OBJEXT@
@@ -48,14 +50,14 @@ all: $(PROGRAMS)
rdfdump$(X): rdfdump.$(O) rdoff.$(O)
$(CC) $(LDFLAGS) -o rdfdump$(X) rdfdump.$(O) rdoff.$(O)
-ldrdf$(X): ldrdf.$(O) $(LDRDFLIBS)
- $(CC) $(LDFLAGS) -o ldrdf$(X) ldrdf.$(O) $(LDRDFLIBS)
-rdx$(X): rdx.$(O) $(RDXLIBS)
- $(CC) $(LDFLAGS) -o rdx$(X) rdx.$(O) $(RDXLIBS)
+ldrdf$(X): ldrdf.$(O) $(LDRDFLIBS) $(NASMLIB)
+ $(CC) $(LDFLAGS) -o ldrdf$(X) ldrdf.$(O) $(LDRDFLIBS) $(NASMLIB)
+rdx$(X): rdx.$(O) $(RDXLIBS) $(NASMLIB)
+ $(CC) $(LDFLAGS) -o rdx$(X) rdx.$(O) $(RDXLIBS) $(NASMLIB)
rdflib$(X): rdflib.$(O)
$(CC) $(LDFLAGS) -o rdflib$(X) rdflib.$(O)
-rdf2bin$(X): rdf2bin.$(O) $(RDXLIBS) nasmlib.$(O)
- $(CC) $(LDFLAGS) -o rdf2bin$(X) rdf2bin.$(O) $(RDXLIBS) nasmlib.$(O)
+rdf2bin$(X): rdf2bin.$(O) $(RDXLIBS) $(NASMLIB)
+ $(CC) $(LDFLAGS) -o rdf2bin$(X) rdf2bin.$(O) $(RDXLIBS) $(NASMLIB)
rdf2com$(X):
rm -f rdf2com$(X) && $(LN_S) rdf2bin$(X) rdf2com$(X)
rdf2ith$(X):
@@ -78,10 +80,6 @@ rdlib.$(O): rdlib.c rdlib.h
rdflib.$(O): rdflib.c
segtab.$(O): segtab.c
-nasmlib.$(O): $(top_srcdir)/nasmlib.c
- cd .. && $(MAKE) nasmlib.$(O)
- cp ../nasmlib.$(O) .
-
clean:
rm -f *.$(O) $(PROGRAMS)
diff --git a/saa.c b/saa.c
index 157aba3..6719584 100644
--- a/saa.c
+++ b/saa.c
@@ -342,6 +342,7 @@ void saa_write64(struct SAA *s, uint64_t v)
b[5] = v >> 40;
b[6] = v >> 48;
b[7] = v >> 56;
+
saa_wbytes(s, b, 8);
}
@@ -358,7 +359,7 @@ void saa_writeaddr(struct SAA *s, uint64_t v, size_t len)
b[6] = v >> 48;
b[7] = v >> 56;
- saa_wbytes(s, &v, len);
+ saa_wbytes(s, b, len);
}
#endif /* WORDS_LITTLEENDIAN */
diff --git a/strfunc.c b/strfunc.c
index a34f738..4b5af40 100644
--- a/strfunc.c
+++ b/strfunc.c
@@ -111,6 +111,84 @@ static size_t utf8_to_16le(uint8_t *str, size_t len, char *op)
}
/*
+ * Convert a string in UTF-8 format to UTF-16BE
+ */
+static size_t utf8_to_16be(uint8_t *str, size_t len, char *op)
+{
+#define EMIT(x) \
+ do { \
+ uint16_t _y = (x); \
+ if (op) { \
+ WRITECHAR(op, _y >> 8); \
+ WRITECHAR(op, _y); \
+ } \
+ outlen++; \
+ } while (0) \
+
+ size_t outlen = 0;
+ int expect = 0;
+ uint8_t c;
+ uint32_t v = 0, vmin = 0;
+
+ while (len--) {
+ c = *str++;
+
+ if (expect) {
+ if ((c & 0xc0) != 0x80) {
+ expect = 0;
+ return -1;
+ } else {
+ v = (v << 6) | (c & 0x3f);
+ if (!--expect) {
+ if (v < vmin || v > 0x10ffff ||
+ (v >= 0xd800 && v <= 0xdfff)) {
+ return -1;
+ } else if (v > 0xffff) {
+ v -= 0x10000;
+ EMIT(0xdc00 | (v & 0x3ff));
+ EMIT(0xd800 | (v >> 10));
+ } else {
+ EMIT(v);
+ }
+ }
+ continue;
+ }
+ }
+
+ if (c < 0x80) {
+ EMIT(c);
+ } else if (c < 0xc0 || c >= 0xfe) {
+ /* Invalid UTF-8 */
+ return -1;
+ } else if (c < 0xe0) {
+ v = c & 0x1f;
+ expect = 1;
+ vmin = 0x80;
+ } else if (c < 0xf0) {
+ v = c & 0x0f;
+ expect = 2;
+ vmin = 0x800;
+ } else if (c < 0xf8) {
+ v = c & 0x07;
+ expect = 3;
+ vmin = 0x10000;
+ } else if (c < 0xfc) {
+ v = c & 0x03;
+ expect = 4;
+ vmin = 0x200000;
+ } else {
+ v = c & 0x01;
+ expect = 5;
+ vmin = 0x4000000;
+ }
+ }
+
+ return expect ? (size_t)-1 : outlen << 1;
+
+#undef EMIT
+}
+
+/*
* Convert a string in UTF-8 format to UTF-32LE
*/
static size_t utf8_to_32le(uint8_t *str, size_t len, char *op)
@@ -174,6 +252,80 @@ static size_t utf8_to_32le(uint8_t *str, size_t len, char *op)
#undef EMIT
}
+/*
+ * Convert a string in UTF-8 format to UTF-32BE
+ */
+static size_t utf8_to_32be(uint8_t *str, size_t len, char *op)
+{
+#define EMIT(x) \
+ do { \
+ uint32_t _y = (x); \
+ if (op) { \
+ WRITECHAR(op,_y >> 24); \
+ WRITECHAR(op,_y >> 16); \
+ WRITECHAR(op,_y >> 8); \
+ WRITECHAR(op,_y); \
+ } \
+ outlen++; \
+ } while (0)
+
+ size_t outlen = 0;
+ int expect = 0;
+ uint8_t c;
+ uint32_t v = 0, vmin = 0;
+
+ while (len--) {
+ c = *str++;
+
+ if (expect) {
+ if ((c & 0xc0) != 0x80) {
+ return -1;
+ } else {
+ v = (v << 6) | (c & 0x3f);
+ if (!--expect) {
+ if (v < vmin || (v >= 0xd800 && v <= 0xdfff)) {
+ return -1;
+ } else {
+ EMIT(v);
+ }
+ }
+ continue;
+ }
+ }
+
+ if (c < 0x80) {
+ EMIT(c);
+ } else if (c < 0xc0 || c >= 0xfe) {
+ /* Invalid UTF-8 */
+ return -1;
+ } else if (c < 0xe0) {
+ v = c & 0x1f;
+ expect = 1;
+ vmin = 0x80;
+ } else if (c < 0xf0) {
+ v = c & 0x0f;
+ expect = 2;
+ vmin = 0x800;
+ } else if (c < 0xf8) {
+ v = c & 0x07;
+ expect = 3;
+ vmin = 0x10000;
+ } else if (c < 0xfc) {
+ v = c & 0x03;
+ expect = 4;
+ vmin = 0x200000;
+ } else {
+ v = c & 0x01;
+ expect = 5;
+ vmin = 0x4000000;
+ }
+ }
+
+ return expect ? (size_t)-1 : outlen << 2;
+
+#undef EMIT
+}
+
typedef size_t (*transform_func)(uint8_t *, size_t, char *);
/*
@@ -186,7 +338,11 @@ size_t string_transform(char *str, size_t len, char **out, enum strfunc func)
/* This should match enum strfunc in nasm.h */
static const transform_func str_transforms[] = {
utf8_to_16le,
+ utf8_to_16le,
+ utf8_to_16be,
+ utf8_to_32le,
utf8_to_32le,
+ utf8_to_32be,
};
transform_func transform = str_transforms[func];
size_t outlen;
diff --git a/test/align13.asm b/test/align13.asm
index 556373f..4a41a77 100644
--- a/test/align13.asm
+++ b/test/align13.asm
@@ -1,3 +1,6 @@
+;Testname=unoptimized; Arguments=-O0 -fbin -oalign13.bin; Files=stdout stderr align13.bin
+;Testname=optimized; Arguments=-Ox -fbin -oalign13.bin; Files=stdout stderr align13.bin
+
; Test of non-power-of-2 alignment
bits 32
diff --git a/test/align13s.asm b/test/align13s.asm
index dab21a2..7f78317 100644
--- a/test/align13s.asm
+++ b/test/align13s.asm
@@ -1,4 +1,8 @@
+;Testname=unoptimized; Arguments=-O0 -fbin -oalign13s.bin; Files=stdout stderr align13s.bin
+;Testname=optimized; Arguments=-Ox -fbin -oalign13s.bin; Files=stdout stderr align13s.bin
+
; Test of non-power-of-2 alignment
+
%use smartalign
bits 32
diff --git a/test/alonesym-obj.asm b/test/alonesym-obj.asm
index 6be4d5d..8db3a2c 100644
--- a/test/alonesym-obj.asm
+++ b/test/alonesym-obj.asm
@@ -1,3 +1,6 @@
+;Testname=unoptimized; Arguments=-O0 -fobj -oalonesym-obj.obj; Files=stdout stderr alonesym-obj.obj
+;Testname=optimized; Arguments=-Ox -fobj -oalonesym-obj.obj; Files=stdout stderr alonesym-obj.obj
+
section DOS32DATA align=16 public use32 FLAT class=DOS32DATA
global sym0000
diff --git a/test/avx2.asm b/test/avx2.asm
new file mode 100644
index 0000000..b622851
--- /dev/null
+++ b/test/avx2.asm
@@ -0,0 +1,1608 @@
+; AVX testcases from gas
+;------------------------
+
+;
+; This file is taken from there
+; http://sourceware.org/ml/binutils/2011-06/msg00150.html
+; So the original author is "H.J. Lu" <hongjiu dot lu at intel dot com>
+;
+; nasm64developer adopted it for the nasm testing suite
+
+%macro testcase 2
+ %ifdef BIN
+ db %1
+ %endif
+ %ifdef SRC
+ %2
+ %endif
+%endmacro
+
+bits 32
+
+; b/gas/testsuite/gas/i386/avx-gather-intel.d
+testcase { 0xc4, 0xe2, 0xe9, 0x92, 0x4c, 0x7d, 0x00 }, { vgatherdpd xmm1,QWORD [ebp+xmm7*2+0x0],xmm2 }
+testcase { 0xc4, 0xe2, 0xe9, 0x93, 0x4c, 0x7d, 0x00 }, { vgatherqpd xmm1,QWORD [ebp+xmm7*2+0x0],xmm2 }
+testcase { 0xc4, 0xe2, 0xed, 0x92, 0x4c, 0x7d, 0x00 }, { vgatherdpd ymm1,QWORD [ebp+xmm7*2+0x0],ymm2 }
+testcase { 0xc4, 0xe2, 0xed, 0x93, 0x4c, 0x7d, 0x00 }, { vgatherqpd ymm1,QWORD [ebp+ymm7*2+0x0],ymm2 }
+testcase { 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0x25, 0x08, 0x00, 0x00, 0x00 }, { vgatherdpd ymm6,QWORD [xmm4*1+0x8],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0x25, 0xf8, 0xff, 0xff, 0xff }, { vgatherdpd ymm6,QWORD [xmm4*1-0x8],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0x25, 0x00, 0x00, 0x00, 0x00 }, { vgatherdpd ymm6,QWORD [xmm4*1+0x0],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0x25, 0x98, 0x02, 0x00, 0x00 }, { vgatherdpd ymm6,QWORD [xmm4*1+0x298],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0xe5, 0x08, 0x00, 0x00, 0x00 }, { vgatherdpd ymm6,QWORD [xmm4*8+0x8],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0xe5, 0xf8, 0xff, 0xff, 0xff }, { vgatherdpd ymm6,QWORD [xmm4*8-0x8],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0xe5, 0x00, 0x00, 0x00, 0x00 }, { vgatherdpd ymm6,QWORD [xmm4*8+0x0],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0xe5, 0x98, 0x02, 0x00, 0x00 }, { vgatherdpd ymm6,QWORD [xmm4*8+0x298],ymm5 }
+testcase { 0xc4, 0xe2, 0x69, 0x92, 0x4c, 0x7d, 0x00 }, { vgatherdps xmm1,DWORD [ebp+xmm7*2+0x0],xmm2 }
+testcase { 0xc4, 0xe2, 0x69, 0x93, 0x4c, 0x7d, 0x00 }, { vgatherqps xmm1,DWORD [ebp+xmm7*2+0x0],xmm2 }
+testcase { 0xc4, 0xe2, 0x6d, 0x92, 0x4c, 0x7d, 0x00 }, { vgatherdps ymm1,DWORD [ebp+ymm7*2+0x0],ymm2 }
+testcase { 0xc4, 0xe2, 0x6d, 0x93, 0x4c, 0x7d, 0x00 }, { vgatherqps xmm1,DWORD [ebp+ymm7*2+0x0],xmm2 }
+testcase { 0xc4, 0xe2, 0x51, 0x92, 0x34, 0x25, 0x08, 0x00, 0x00, 0x00 }, { vgatherdps xmm6,DWORD [xmm4*1+0x8],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x92, 0x34, 0x25, 0xf8, 0xff, 0xff, 0xff }, { vgatherdps xmm6,DWORD [xmm4*1-0x8],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x92, 0x34, 0x25, 0x00, 0x00, 0x00, 0x00 }, { vgatherdps xmm6,DWORD [xmm4*1+0x0],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x92, 0x34, 0x25, 0x98, 0x02, 0x00, 0x00 }, { vgatherdps xmm6,DWORD [xmm4*1+0x298],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x92, 0x34, 0xe5, 0x08, 0x00, 0x00, 0x00 }, { vgatherdps xmm6,DWORD [xmm4*8+0x8],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x92, 0x34, 0xe5, 0xf8, 0xff, 0xff, 0xff }, { vgatherdps xmm6,DWORD [xmm4*8-0x8],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x92, 0x34, 0xe5, 0x00, 0x00, 0x00, 0x00 }, { vgatherdps xmm6,DWORD [xmm4*8+0x0],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x92, 0x34, 0xe5, 0x98, 0x02, 0x00, 0x00 }, { vgatherdps xmm6,DWORD [xmm4*8+0x298],xmm5 }
+testcase { 0xc4, 0xe2, 0x69, 0x90, 0x4c, 0x7d, 0x00 }, { vpgatherdd xmm1,DWORD [ebp+xmm7*2+0x0],xmm2 }
+testcase { 0xc4, 0xe2, 0x69, 0x91, 0x4c, 0x7d, 0x00 }, { vpgatherqd xmm1,DWORD [ebp+xmm7*2+0x0],xmm2 }
+testcase { 0xc4, 0xe2, 0x6d, 0x90, 0x4c, 0x7d, 0x00 }, { vpgatherdd ymm1,DWORD [ebp+ymm7*2+0x0],ymm2 }
+testcase { 0xc4, 0xe2, 0x6d, 0x91, 0x4c, 0x7d, 0x00 }, { vpgatherqd xmm1,DWORD [ebp+ymm7*2+0x0],xmm2 }
+testcase { 0xc4, 0xe2, 0x51, 0x90, 0x34, 0x25, 0x08, 0x00, 0x00, 0x00 }, { vpgatherdd xmm6,DWORD [xmm4*1+0x8],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x90, 0x34, 0x25, 0xf8, 0xff, 0xff, 0xff }, { vpgatherdd xmm6,DWORD [xmm4*1-0x8],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x90, 0x34, 0x25, 0x00, 0x00, 0x00, 0x00 }, { vpgatherdd xmm6,DWORD [xmm4*1+0x0],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x90, 0x34, 0x25, 0x98, 0x02, 0x00, 0x00 }, { vpgatherdd xmm6,DWORD [xmm4*1+0x298],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x90, 0x34, 0xe5, 0x08, 0x00, 0x00, 0x00 }, { vpgatherdd xmm6,DWORD [xmm4*8+0x8],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x90, 0x34, 0xe5, 0xf8, 0xff, 0xff, 0xff }, { vpgatherdd xmm6,DWORD [xmm4*8-0x8],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x90, 0x34, 0xe5, 0x00, 0x00, 0x00, 0x00 }, { vpgatherdd xmm6,DWORD [xmm4*8+0x0],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x90, 0x34, 0xe5, 0x98, 0x02, 0x00, 0x00 }, { vpgatherdd xmm6,DWORD [xmm4*8+0x298],xmm5 }
+testcase { 0xc4, 0xe2, 0xe9, 0x90, 0x4c, 0x7d, 0x00 }, { vpgatherdq xmm1,QWORD [ebp+xmm7*2+0x0],xmm2 }
+testcase { 0xc4, 0xe2, 0xe9, 0x91, 0x4c, 0x7d, 0x00 }, { vpgatherqq xmm1,QWORD [ebp+xmm7*2+0x0],xmm2 }
+testcase { 0xc4, 0xe2, 0xed, 0x90, 0x4c, 0x7d, 0x00 }, { vpgatherdq ymm1,QWORD [ebp+xmm7*2+0x0],ymm2 }
+testcase { 0xc4, 0xe2, 0xed, 0x91, 0x4c, 0x7d, 0x00 }, { vpgatherqq ymm1,QWORD [ebp+ymm7*2+0x0],ymm2 }
+testcase { 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0x25, 0x08, 0x00, 0x00, 0x00 }, { vpgatherdq ymm6,QWORD [xmm4*1+0x8],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0x25, 0xf8, 0xff, 0xff, 0xff }, { vpgatherdq ymm6,QWORD [xmm4*1-0x8],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0x25, 0x00, 0x00, 0x00, 0x00 }, { vpgatherdq ymm6,QWORD [xmm4*1+0x0],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0x25, 0x98, 0x02, 0x00, 0x00 }, { vpgatherdq ymm6,QWORD [xmm4*1+0x298],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0xe5, 0x08, 0x00, 0x00, 0x00 }, { vpgatherdq ymm6,QWORD [xmm4*8+0x8],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0xe5, 0xf8, 0xff, 0xff, 0xff }, { vpgatherdq ymm6,QWORD [xmm4*8-0x8],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0xe5, 0x00, 0x00, 0x00, 0x00 }, { vpgatherdq ymm6,QWORD [xmm4*8+0x0],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0xe5, 0x98, 0x02, 0x00, 0x00 }, { vpgatherdq ymm6,QWORD [xmm4*8+0x298],ymm5 }
+
+; b/gas/testsuite/gas/i386/avx2-intel.d
+testcase { 0xc4, 0xe2, 0x5d, 0x8c, 0x31 }, { vpmaskmovd ymm6,ymm4,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x8e, 0x21 }, { vpmaskmovd YWORD [ecx],ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0xdd, 0x8c, 0x31 }, { vpmaskmovq ymm6,ymm4,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0xcd, 0x8e, 0x21 }, { vpmaskmovq YWORD [ecx],ymm6,ymm4 }
+testcase { 0xc4, 0xe3, 0xfd, 0x01, 0xd6, 0x07 }, { vpermpd ymm2,ymm6,0x7 }
+testcase { 0xc4, 0xe3, 0xfd, 0x01, 0x31, 0x07 }, { vpermpd ymm6,YWORD [ecx],0x7 }
+testcase { 0xc4, 0xe3, 0xfd, 0x00, 0xd6, 0x07 }, { vpermq ymm2,ymm6,0x7 }
+testcase { 0xc4, 0xe3, 0xfd, 0x00, 0x31, 0x07 }, { vpermq ymm6,YWORD [ecx],0x7 }
+testcase { 0xc4, 0xe2, 0x4d, 0x36, 0xd4 }, { vpermd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x36, 0x11 }, { vpermd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x16, 0xd4 }, { vpermps ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x16, 0x11 }, { vpermps ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x47, 0xd4 }, { vpsllvd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x47, 0x11 }, { vpsllvd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0xcd, 0x47, 0xd4 }, { vpsllvq ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0xcd, 0x47, 0x11 }, { vpsllvq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x46, 0xd4 }, { vpsravd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x46, 0x11 }, { vpsravd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x45, 0xd4 }, { vpsrlvd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x45, 0x11 }, { vpsrlvd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0xcd, 0x45, 0xd4 }, { vpsrlvq ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0xcd, 0x45, 0x11 }, { vpsrlvq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x2a, 0x21 }, { vmovntdqa ymm4,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x19, 0xf4 }, { vbroadcastsd ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x18, 0xf4 }, { vbroadcastss ymm6,xmm4 }
+testcase { 0xc4, 0xe3, 0x4d, 0x02, 0xd4, 0x07 }, { vpblendd ymm2,ymm6,ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x02, 0x11, 0x07 }, { vpblendd ymm2,ymm6,YWORD [ecx],0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x46, 0xd4, 0x07 }, { vperm2i128 ymm2,ymm6,ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x46, 0x11, 0x07 }, { vperm2i128 ymm2,ymm6,YWORD [ecx],0x7 }
+testcase { 0xc4, 0xe3, 0x5d, 0x38, 0xf4, 0x07 }, { vinserti128 ymm6,ymm4,xmm4,0x7 }
+testcase { 0xc4, 0xe3, 0x5d, 0x38, 0x31, 0x07 }, { vinserti128 ymm6,ymm4,OWORD [ecx],0x7 }
+testcase { 0xc4, 0xe2, 0x7d, 0x5a, 0x21 }, { vbroadcasti128 ymm4,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x49, 0x47, 0xd4 }, { vpsllvd xmm2,xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x49, 0x47, 0x39 }, { vpsllvd xmm7,xmm6,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0xc9, 0x47, 0xd4 }, { vpsllvq xmm2,xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0xc9, 0x47, 0x39 }, { vpsllvq xmm7,xmm6,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x49, 0x46, 0xd4 }, { vpsravd xmm2,xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x49, 0x46, 0x39 }, { vpsravd xmm7,xmm6,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x49, 0x45, 0xd4 }, { vpsrlvd xmm2,xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x49, 0x45, 0x39 }, { vpsrlvd xmm7,xmm6,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0xc9, 0x45, 0xd4 }, { vpsrlvq xmm2,xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0xc9, 0x45, 0x39 }, { vpsrlvq xmm7,xmm6,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x59, 0x8c, 0x31 }, { vpmaskmovd xmm6,xmm4,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0xd9, 0x8c, 0x31 }, { vpmaskmovq xmm6,xmm4,OWORD [ecx] }
+testcase { 0xc4, 0xe3, 0x7d, 0x39, 0xe6, 0x07 }, { vextracti128 xmm6,ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x7d, 0x39, 0x21, 0x07 }, { vextracti128 OWORD [ecx],ymm4,0x7 }
+testcase { 0xc4, 0xe2, 0x49, 0x8e, 0x21 }, { vpmaskmovd OWORD [ecx],xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0xc9, 0x8e, 0x21 }, { vpmaskmovq OWORD [ecx],xmm6,xmm4 }
+testcase { 0xc4, 0xe3, 0x49, 0x02, 0xd4, 0x07 }, { vpblendd xmm2,xmm6,xmm4,0x7 }
+testcase { 0xc4, 0xe3, 0x49, 0x02, 0x11, 0x07 }, { vpblendd xmm2,xmm6,OWORD [ecx],0x7 }
+testcase { 0xc4, 0xe2, 0x79, 0x59, 0xf4 }, { vpbroadcastq xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x79, 0x59, 0x21 }, { vpbroadcastq xmm4,QWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x59, 0xf4 }, { vpbroadcastq ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x59, 0x21 }, { vpbroadcastq ymm4,QWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x58, 0xe4 }, { vpbroadcastd ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x58, 0x21 }, { vpbroadcastd ymm4,DWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x79, 0x58, 0xf4 }, { vpbroadcastd xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x79, 0x58, 0x21 }, { vpbroadcastd xmm4,DWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x79, 0x79, 0xf4 }, { vpbroadcastw xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x79, 0x79, 0x21 }, { vpbroadcastw xmm4,WORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x79, 0xf4 }, { vpbroadcastw ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x79, 0x21 }, { vpbroadcastw ymm4,WORD [ecx] }
+testcase { 0xc4, 0xe2, 0x79, 0x78, 0xf4 }, { vpbroadcastb xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x79, 0x78, 0x21 }, { vpbroadcastb xmm4,BYTE [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x78, 0xf4 }, { vpbroadcastb ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x78, 0x21 }, { vpbroadcastb ymm4,BYTE [ecx] }
+testcase { 0xc4, 0xe2, 0x79, 0x18, 0xf4 }, { vbroadcastss xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x5d, 0x8c, 0x31 }, { vpmaskmovd ymm6,ymm4,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x8e, 0x21 }, { vpmaskmovd YWORD [ecx],ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x5d, 0x8c, 0x31 }, { vpmaskmovd ymm6,ymm4,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x8e, 0x21 }, { vpmaskmovd YWORD [ecx],ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0xdd, 0x8c, 0x31 }, { vpmaskmovq ymm6,ymm4,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0xcd, 0x8e, 0x21 }, { vpmaskmovq YWORD [ecx],ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0xdd, 0x8c, 0x31 }, { vpmaskmovq ymm6,ymm4,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0xcd, 0x8e, 0x21 }, { vpmaskmovq YWORD [ecx],ymm6,ymm4 }
+testcase { 0xc4, 0xe3, 0xfd, 0x01, 0xd6, 0x07 }, { vpermpd ymm2,ymm6,0x7 }
+testcase { 0xc4, 0xe3, 0xfd, 0x01, 0x31, 0x07 }, { vpermpd ymm6,YWORD [ecx],0x7 }
+testcase { 0xc4, 0xe3, 0xfd, 0x01, 0x31, 0x07 }, { vpermpd ymm6,YWORD [ecx],0x7 }
+testcase { 0xc4, 0xe3, 0xfd, 0x00, 0xd6, 0x07 }, { vpermq ymm2,ymm6,0x7 }
+testcase { 0xc4, 0xe3, 0xfd, 0x00, 0x31, 0x07 }, { vpermq ymm6,YWORD [ecx],0x7 }
+testcase { 0xc4, 0xe3, 0xfd, 0x00, 0x31, 0x07 }, { vpermq ymm6,YWORD [ecx],0x7 }
+testcase { 0xc4, 0xe2, 0x4d, 0x36, 0xd4 }, { vpermd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x36, 0x11 }, { vpermd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x36, 0x11 }, { vpermd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x16, 0xd4 }, { vpermps ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x16, 0x11 }, { vpermps ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x16, 0x11 }, { vpermps ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x47, 0xd4 }, { vpsllvd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x47, 0x11 }, { vpsllvd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x47, 0x11 }, { vpsllvd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0xcd, 0x47, 0xd4 }, { vpsllvq ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0xcd, 0x47, 0x11 }, { vpsllvq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0xcd, 0x47, 0x11 }, { vpsllvq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x46, 0xd4 }, { vpsravd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x46, 0x11 }, { vpsravd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x46, 0x11 }, { vpsravd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x45, 0xd4 }, { vpsrlvd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x45, 0x11 }, { vpsrlvd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x45, 0x11 }, { vpsrlvd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0xcd, 0x45, 0xd4 }, { vpsrlvq ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0xcd, 0x45, 0x11 }, { vpsrlvq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0xcd, 0x45, 0x11 }, { vpsrlvq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x2a, 0x21 }, { vmovntdqa ymm4,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x2a, 0x21 }, { vmovntdqa ymm4,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x19, 0xf4 }, { vbroadcastsd ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x18, 0xf4 }, { vbroadcastss ymm6,xmm4 }
+testcase { 0xc4, 0xe3, 0x4d, 0x02, 0xd4, 0x07 }, { vpblendd ymm2,ymm6,ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x02, 0x11, 0x07 }, { vpblendd ymm2,ymm6,YWORD [ecx],0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x02, 0x11, 0x07 }, { vpblendd ymm2,ymm6,YWORD [ecx],0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x46, 0xd4, 0x07 }, { vperm2i128 ymm2,ymm6,ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x46, 0x11, 0x07 }, { vperm2i128 ymm2,ymm6,YWORD [ecx],0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x46, 0x11, 0x07 }, { vperm2i128 ymm2,ymm6,YWORD [ecx],0x7 }
+testcase { 0xc4, 0xe3, 0x5d, 0x38, 0xf4, 0x07 }, { vinserti128 ymm6,ymm4,xmm4,0x7 }
+testcase { 0xc4, 0xe3, 0x5d, 0x38, 0x31, 0x07 }, { vinserti128 ymm6,ymm4,OWORD [ecx],0x7 }
+testcase { 0xc4, 0xe3, 0x5d, 0x38, 0x31, 0x07 }, { vinserti128 ymm6,ymm4,OWORD [ecx],0x7 }
+testcase { 0xc4, 0xe2, 0x7d, 0x5a, 0x21 }, { vbroadcasti128 ymm4,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x5a, 0x21 }, { vbroadcasti128 ymm4,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x49, 0x47, 0xd4 }, { vpsllvd xmm2,xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x49, 0x47, 0x39 }, { vpsllvd xmm7,xmm6,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x49, 0x47, 0x39 }, { vpsllvd xmm7,xmm6,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0xc9, 0x47, 0xd4 }, { vpsllvq xmm2,xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0xc9, 0x47, 0x39 }, { vpsllvq xmm7,xmm6,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0xc9, 0x47, 0x39 }, { vpsllvq xmm7,xmm6,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x49, 0x46, 0xd4 }, { vpsravd xmm2,xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x49, 0x46, 0x39 }, { vpsravd xmm7,xmm6,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x49, 0x46, 0x39 }, { vpsravd xmm7,xmm6,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x49, 0x45, 0xd4 }, { vpsrlvd xmm2,xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x49, 0x45, 0x39 }, { vpsrlvd xmm7,xmm6,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x49, 0x45, 0x39 }, { vpsrlvd xmm7,xmm6,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0xc9, 0x45, 0xd4 }, { vpsrlvq xmm2,xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0xc9, 0x45, 0x39 }, { vpsrlvq xmm7,xmm6,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0xc9, 0x45, 0x39 }, { vpsrlvq xmm7,xmm6,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x59, 0x8c, 0x31 }, { vpmaskmovd xmm6,xmm4,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x59, 0x8c, 0x31 }, { vpmaskmovd xmm6,xmm4,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0xd9, 0x8c, 0x31 }, { vpmaskmovq xmm6,xmm4,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0xd9, 0x8c, 0x31 }, { vpmaskmovq xmm6,xmm4,OWORD [ecx] }
+testcase { 0xc4, 0xe3, 0x7d, 0x39, 0xe6, 0x07 }, { vextracti128 xmm6,ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x7d, 0x39, 0x21, 0x07 }, { vextracti128 OWORD [ecx],ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x7d, 0x39, 0x21, 0x07 }, { vextracti128 OWORD [ecx],ymm4,0x7 }
+testcase { 0xc4, 0xe2, 0x49, 0x8e, 0x21 }, { vpmaskmovd OWORD [ecx],xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x49, 0x8e, 0x21 }, { vpmaskmovd OWORD [ecx],xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0xc9, 0x8e, 0x21 }, { vpmaskmovq OWORD [ecx],xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0xc9, 0x8e, 0x21 }, { vpmaskmovq OWORD [ecx],xmm6,xmm4 }
+testcase { 0xc4, 0xe3, 0x49, 0x02, 0xd4, 0x07 }, { vpblendd xmm2,xmm6,xmm4,0x7 }
+testcase { 0xc4, 0xe3, 0x49, 0x02, 0x11, 0x07 }, { vpblendd xmm2,xmm6,OWORD [ecx],0x7 }
+testcase { 0xc4, 0xe3, 0x49, 0x02, 0x11, 0x07 }, { vpblendd xmm2,xmm6,OWORD [ecx],0x7 }
+testcase { 0xc4, 0xe2, 0x79, 0x59, 0xf4 }, { vpbroadcastq xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x79, 0x59, 0x21 }, { vpbroadcastq xmm4,QWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x79, 0x59, 0x21 }, { vpbroadcastq xmm4,QWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x59, 0xf4 }, { vpbroadcastq ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x59, 0x21 }, { vpbroadcastq ymm4,QWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x59, 0x21 }, { vpbroadcastq ymm4,QWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x58, 0xe4 }, { vpbroadcastd ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x58, 0x21 }, { vpbroadcastd ymm4,DWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x58, 0x21 }, { vpbroadcastd ymm4,DWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x79, 0x58, 0xf4 }, { vpbroadcastd xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x79, 0x58, 0x21 }, { vpbroadcastd xmm4,DWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x79, 0x58, 0x21 }, { vpbroadcastd xmm4,DWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x79, 0x79, 0xf4 }, { vpbroadcastw xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x79, 0x79, 0x21 }, { vpbroadcastw xmm4,WORD [ecx] }
+testcase { 0xc4, 0xe2, 0x79, 0x79, 0x21 }, { vpbroadcastw xmm4,WORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x79, 0xf4 }, { vpbroadcastw ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x79, 0x21 }, { vpbroadcastw ymm4,WORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x79, 0x21 }, { vpbroadcastw ymm4,WORD [ecx] }
+testcase { 0xc4, 0xe2, 0x79, 0x78, 0xf4 }, { vpbroadcastb xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x79, 0x78, 0x21 }, { vpbroadcastb xmm4,BYTE [ecx] }
+testcase { 0xc4, 0xe2, 0x79, 0x78, 0x21 }, { vpbroadcastb xmm4,BYTE [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x78, 0xf4 }, { vpbroadcastb ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x78, 0x21 }, { vpbroadcastb ymm4,BYTE [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x78, 0x21 }, { vpbroadcastb ymm4,BYTE [ecx] }
+testcase { 0xc4, 0xe2, 0x79, 0x18, 0xf4 }, { vbroadcastss xmm6,xmm4 }
+
+; b/gas/testsuite/gas/i386/avx256int-intel.d
+testcase { 0xc5, 0xfd, 0xd7, 0xcc }, { vpmovmskb ecx,ymm4 }
+testcase { 0xc5, 0xed, 0x72, 0xf6, 0x07 }, { vpslld ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x73, 0xfe, 0x07 }, { vpslldq ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x73, 0xf6, 0x07 }, { vpsllq ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x71, 0xf6, 0x07 }, { vpsllw ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x72, 0xe6, 0x07 }, { vpsrad ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x71, 0xe6, 0x07 }, { vpsraw ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x72, 0xd6, 0x07 }, { vpsrld ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x73, 0xde, 0x07 }, { vpsrldq ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x73, 0xd6, 0x07 }, { vpsrlq ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x71, 0xd6, 0x07 }, { vpsrlw ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xfd, 0x70, 0xd6, 0x07 }, { vpshufd ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xfd, 0x70, 0x31, 0x07 }, { vpshufd ymm6,YWORD [ecx],0x7 }
+testcase { 0xc5, 0xfe, 0x70, 0xd6, 0x07 }, { vpshufhw ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xfe, 0x70, 0x31, 0x07 }, { vpshufhw ymm6,YWORD [ecx],0x7 }
+testcase { 0xc5, 0xff, 0x70, 0xd6, 0x07 }, { vpshuflw ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xff, 0x70, 0x31, 0x07 }, { vpshuflw ymm6,YWORD [ecx],0x7 }
+testcase { 0xc5, 0xcd, 0x6b, 0xd4 }, { vpackssdw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x6b, 0x11 }, { vpackssdw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x63, 0xd4 }, { vpacksswb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x63, 0x11 }, { vpacksswb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x2b, 0xd4 }, { vpackusdw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x2b, 0x11 }, { vpackusdw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x67, 0xd4 }, { vpackuswb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x67, 0x11 }, { vpackuswb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xfc, 0xd4 }, { vpaddb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xfc, 0x11 }, { vpaddb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xfd, 0xd4 }, { vpaddw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xfd, 0x11 }, { vpaddw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xfe, 0xd4 }, { vpaddd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xfe, 0x11 }, { vpaddd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xd4, 0xd4 }, { vpaddq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xd4, 0x11 }, { vpaddq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xec, 0xd4 }, { vpaddsb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xec, 0x11 }, { vpaddsb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xed, 0xd4 }, { vpaddsw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xed, 0x11 }, { vpaddsw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xdc, 0xd4 }, { vpaddusb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xdc, 0x11 }, { vpaddusb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xdd, 0xd4 }, { vpaddusw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xdd, 0x11 }, { vpaddusw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xdb, 0xd4 }, { vpand ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xdb, 0x11 }, { vpand ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xdf, 0xd4 }, { vpandn ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xdf, 0x11 }, { vpandn ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xe0, 0xd4 }, { vpavgb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xe0, 0x11 }, { vpavgb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xe3, 0xd4 }, { vpavgw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xe3, 0x11 }, { vpavgw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x74, 0xd4 }, { vpcmpeqb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x74, 0x11 }, { vpcmpeqb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x75, 0xd4 }, { vpcmpeqw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x75, 0x11 }, { vpcmpeqw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x76, 0xd4 }, { vpcmpeqd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x76, 0x11 }, { vpcmpeqd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x29, 0xd4 }, { vpcmpeqq ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x29, 0x11 }, { vpcmpeqq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x64, 0xd4 }, { vpcmpgtb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x64, 0x11 }, { vpcmpgtb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x65, 0xd4 }, { vpcmpgtw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x65, 0x11 }, { vpcmpgtw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x66, 0xd4 }, { vpcmpgtd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x66, 0x11 }, { vpcmpgtd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x37, 0xd4 }, { vpcmpgtq ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x37, 0x11 }, { vpcmpgtq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x01, 0xd4 }, { vphaddw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x01, 0x11 }, { vphaddw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x02, 0xd4 }, { vphaddd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x02, 0x11 }, { vphaddd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x03, 0xd4 }, { vphaddsw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x03, 0x11 }, { vphaddsw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x05, 0xd4 }, { vphsubw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x05, 0x11 }, { vphsubw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x06, 0xd4 }, { vphsubd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x06, 0x11 }, { vphsubd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x07, 0xd4 }, { vphsubsw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x07, 0x11 }, { vphsubsw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xf5, 0xd4 }, { vpmaddwd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xf5, 0x11 }, { vpmaddwd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x04, 0xd4 }, { vpmaddubsw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x04, 0x11 }, { vpmaddubsw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3c, 0xd4 }, { vpmaxsb ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x3c, 0x11 }, { vpmaxsb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xee, 0xd4 }, { vpmaxsw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xee, 0x11 }, { vpmaxsw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3d, 0xd4 }, { vpmaxsd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x3d, 0x11 }, { vpmaxsd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xde, 0xd4 }, { vpmaxub ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xde, 0x11 }, { vpmaxub ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3e, 0xd4 }, { vpmaxuw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x3e, 0x11 }, { vpmaxuw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3f, 0xd4 }, { vpmaxud ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x3f, 0x11 }, { vpmaxud ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x38, 0xd4 }, { vpminsb ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x38, 0x11 }, { vpminsb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xea, 0xd4 }, { vpminsw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xea, 0x11 }, { vpminsw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x39, 0xd4 }, { vpminsd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x39, 0x11 }, { vpminsd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xda, 0xd4 }, { vpminub ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xda, 0x11 }, { vpminub ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3a, 0xd4 }, { vpminuw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x3a, 0x11 }, { vpminuw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3b, 0xd4 }, { vpminud ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x3b, 0x11 }, { vpminud ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xe4, 0xd4 }, { vpmulhuw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xe4, 0x11 }, { vpmulhuw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x0b, 0xd4 }, { vpmulhrsw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x0b, 0x11 }, { vpmulhrsw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xe5, 0xd4 }, { vpmulhw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xe5, 0x11 }, { vpmulhw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xd5, 0xd4 }, { vpmullw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xd5, 0x11 }, { vpmullw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x40, 0xd4 }, { vpmulld ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x40, 0x11 }, { vpmulld ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xf4, 0xd4 }, { vpmuludq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xf4, 0x11 }, { vpmuludq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x28, 0xd4 }, { vpmuldq ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x28, 0x11 }, { vpmuldq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xeb, 0xd4 }, { vpor ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xeb, 0x11 }, { vpor ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xf6, 0xd4 }, { vpsadbw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xf6, 0x11 }, { vpsadbw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x00, 0xd4 }, { vpshufb ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x00, 0x11 }, { vpshufb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x08, 0xd4 }, { vpsignb ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x08, 0x11 }, { vpsignb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x09, 0xd4 }, { vpsignw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x09, 0x11 }, { vpsignw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x0a, 0xd4 }, { vpsignd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x0a, 0x11 }, { vpsignd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xf8, 0xd4 }, { vpsubb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xf8, 0x11 }, { vpsubb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xf9, 0xd4 }, { vpsubw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xf9, 0x11 }, { vpsubw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xfa, 0xd4 }, { vpsubd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xfa, 0x11 }, { vpsubd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xfb, 0xd4 }, { vpsubq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xfb, 0x11 }, { vpsubq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xe8, 0xd4 }, { vpsubsb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xe8, 0x11 }, { vpsubsb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xe9, 0xd4 }, { vpsubsw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xe9, 0x11 }, { vpsubsw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xd8, 0xd4 }, { vpsubusb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xd8, 0x11 }, { vpsubusb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xd9, 0xd4 }, { vpsubusw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xd9, 0x11 }, { vpsubusw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x68, 0xd4 }, { vpunpckhbw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x68, 0x11 }, { vpunpckhbw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x69, 0xd4 }, { vpunpckhwd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x69, 0x11 }, { vpunpckhwd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x6a, 0xd4 }, { vpunpckhdq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x6a, 0x11 }, { vpunpckhdq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x6d, 0xd4 }, { vpunpckhqdq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x6d, 0x11 }, { vpunpckhqdq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x60, 0xd4 }, { vpunpcklbw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x60, 0x11 }, { vpunpcklbw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x61, 0xd4 }, { vpunpcklwd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x61, 0x11 }, { vpunpcklwd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x62, 0xd4 }, { vpunpckldq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x62, 0x11 }, { vpunpckldq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x6c, 0xd4 }, { vpunpcklqdq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x6c, 0x11 }, { vpunpcklqdq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xef, 0xd4 }, { vpxor ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xef, 0x11 }, { vpxor ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x1c, 0xf4 }, { vpabsb ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x1c, 0x21 }, { vpabsb ymm4,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x1d, 0xf4 }, { vpabsw ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x1d, 0x21 }, { vpabsw ymm4,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x1e, 0xf4 }, { vpabsd ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x1e, 0x21 }, { vpabsd ymm4,YWORD [ecx] }
+testcase { 0xc4, 0xe3, 0x4d, 0x42, 0xd4, 0x07 }, { vmpsadbw ymm2,ymm6,ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x42, 0x11, 0x07 }, { vmpsadbw ymm2,ymm6,YWORD [ecx],0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x0f, 0xd4, 0x07 }, { vpalignr ymm2,ymm6,ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x0f, 0x11, 0x07 }, { vpalignr ymm2,ymm6,YWORD [ecx],0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x0e, 0xd4, 0x07 }, { vpblendw ymm2,ymm6,ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x0e, 0x11, 0x07 }, { vpblendw ymm2,ymm6,YWORD [ecx],0x7 }
+testcase { 0xc4, 0xe3, 0x6d, 0x4c, 0xfe, 0x40 }, { vpblendvb ymm7,ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe3, 0x6d, 0x4c, 0x39, 0x40 }, { vpblendvb ymm7,ymm2,YWORD [ecx],ymm4 }
+testcase { 0xc5, 0xcd, 0xf1, 0xd4 }, { vpsllw ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xf1, 0x11 }, { vpsllw ymm2,ymm6,OWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xf2, 0xd4 }, { vpslld ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xf2, 0x11 }, { vpslld ymm2,ymm6,OWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xf3, 0xd4 }, { vpsllq ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xf3, 0x11 }, { vpsllq ymm2,ymm6,OWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xe1, 0xd4 }, { vpsraw ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xe1, 0x11 }, { vpsraw ymm2,ymm6,OWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xe2, 0xd4 }, { vpsrad ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xe2, 0x11 }, { vpsrad ymm2,ymm6,OWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xd1, 0xd4 }, { vpsrlw ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xd1, 0x11 }, { vpsrlw ymm2,ymm6,OWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xd2, 0xd4 }, { vpsrld ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xd2, 0x11 }, { vpsrld ymm2,ymm6,OWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xd3, 0xd4 }, { vpsrlq ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xd3, 0x11 }, { vpsrlq ymm2,ymm6,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x20, 0xe4 }, { vpmovsxbw ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x20, 0x21 }, { vpmovsxbw ymm4,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x23, 0xe4 }, { vpmovsxwd ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x23, 0x21 }, { vpmovsxwd ymm4,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x25, 0xe4 }, { vpmovsxdq ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x25, 0x21 }, { vpmovsxdq ymm4,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x30, 0xe4 }, { vpmovzxbw ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x30, 0x21 }, { vpmovzxbw ymm4,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x33, 0xe4 }, { vpmovzxwd ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x33, 0x21 }, { vpmovzxwd ymm4,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x35, 0xe4 }, { vpmovzxdq ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x35, 0x21 }, { vpmovzxdq ymm4,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x21, 0xf4 }, { vpmovsxbd ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x21, 0x21 }, { vpmovsxbd ymm4,QWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x24, 0xf4 }, { vpmovsxwq ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x24, 0x21 }, { vpmovsxwq ymm4,QWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x31, 0xf4 }, { vpmovzxbd ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x31, 0x21 }, { vpmovzxbd ymm4,QWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x34, 0xf4 }, { vpmovzxwq ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x34, 0x21 }, { vpmovzxwq ymm4,QWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x22, 0xe4 }, { vpmovsxbq ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x22, 0x21 }, { vpmovsxbq ymm4,DWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x32, 0xe4 }, { vpmovzxbq ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x32, 0x21 }, { vpmovzxbq ymm4,DWORD [ecx] }
+testcase { 0xc5, 0xfd, 0xd7, 0xcc }, { vpmovmskb ecx,ymm4 }
+testcase { 0xc5, 0xed, 0x72, 0xf6, 0x07 }, { vpslld ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x73, 0xfe, 0x07 }, { vpslldq ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x73, 0xf6, 0x07 }, { vpsllq ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x71, 0xf6, 0x07 }, { vpsllw ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x72, 0xe6, 0x07 }, { vpsrad ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x71, 0xe6, 0x07 }, { vpsraw ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x72, 0xd6, 0x07 }, { vpsrld ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x73, 0xde, 0x07 }, { vpsrldq ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x73, 0xd6, 0x07 }, { vpsrlq ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x71, 0xd6, 0x07 }, { vpsrlw ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xfd, 0x70, 0xd6, 0x07 }, { vpshufd ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xfd, 0x70, 0x31, 0x07 }, { vpshufd ymm6,YWORD [ecx],0x7 }
+testcase { 0xc5, 0xfd, 0x70, 0x31, 0x07 }, { vpshufd ymm6,YWORD [ecx],0x7 }
+testcase { 0xc5, 0xfe, 0x70, 0xd6, 0x07 }, { vpshufhw ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xfe, 0x70, 0x31, 0x07 }, { vpshufhw ymm6,YWORD [ecx],0x7 }
+testcase { 0xc5, 0xfe, 0x70, 0x31, 0x07 }, { vpshufhw ymm6,YWORD [ecx],0x7 }
+testcase { 0xc5, 0xff, 0x70, 0xd6, 0x07 }, { vpshuflw ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xff, 0x70, 0x31, 0x07 }, { vpshuflw ymm6,YWORD [ecx],0x7 }
+testcase { 0xc5, 0xff, 0x70, 0x31, 0x07 }, { vpshuflw ymm6,YWORD [ecx],0x7 }
+testcase { 0xc5, 0xcd, 0x6b, 0xd4 }, { vpackssdw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x6b, 0x11 }, { vpackssdw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x6b, 0x11 }, { vpackssdw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x63, 0xd4 }, { vpacksswb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x63, 0x11 }, { vpacksswb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x63, 0x11 }, { vpacksswb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x2b, 0xd4 }, { vpackusdw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x2b, 0x11 }, { vpackusdw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x2b, 0x11 }, { vpackusdw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x67, 0xd4 }, { vpackuswb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x67, 0x11 }, { vpackuswb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x67, 0x11 }, { vpackuswb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xfc, 0xd4 }, { vpaddb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xfc, 0x11 }, { vpaddb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xfc, 0x11 }, { vpaddb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xfd, 0xd4 }, { vpaddw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xfd, 0x11 }, { vpaddw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xfd, 0x11 }, { vpaddw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xfe, 0xd4 }, { vpaddd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xfe, 0x11 }, { vpaddd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xfe, 0x11 }, { vpaddd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xd4, 0xd4 }, { vpaddq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xd4, 0x11 }, { vpaddq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xd4, 0x11 }, { vpaddq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xec, 0xd4 }, { vpaddsb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xec, 0x11 }, { vpaddsb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xec, 0x11 }, { vpaddsb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xed, 0xd4 }, { vpaddsw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xed, 0x11 }, { vpaddsw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xed, 0x11 }, { vpaddsw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xdc, 0xd4 }, { vpaddusb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xdc, 0x11 }, { vpaddusb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xdc, 0x11 }, { vpaddusb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xdd, 0xd4 }, { vpaddusw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xdd, 0x11 }, { vpaddusw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xdd, 0x11 }, { vpaddusw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xdb, 0xd4 }, { vpand ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xdb, 0x11 }, { vpand ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xdb, 0x11 }, { vpand ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xdf, 0xd4 }, { vpandn ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xdf, 0x11 }, { vpandn ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xdf, 0x11 }, { vpandn ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xe0, 0xd4 }, { vpavgb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xe0, 0x11 }, { vpavgb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xe0, 0x11 }, { vpavgb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xe3, 0xd4 }, { vpavgw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xe3, 0x11 }, { vpavgw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xe3, 0x11 }, { vpavgw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x74, 0xd4 }, { vpcmpeqb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x74, 0x11 }, { vpcmpeqb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x74, 0x11 }, { vpcmpeqb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x75, 0xd4 }, { vpcmpeqw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x75, 0x11 }, { vpcmpeqw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x75, 0x11 }, { vpcmpeqw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x76, 0xd4 }, { vpcmpeqd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x76, 0x11 }, { vpcmpeqd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x76, 0x11 }, { vpcmpeqd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x29, 0xd4 }, { vpcmpeqq ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x29, 0x11 }, { vpcmpeqq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x29, 0x11 }, { vpcmpeqq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x64, 0xd4 }, { vpcmpgtb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x64, 0x11 }, { vpcmpgtb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x64, 0x11 }, { vpcmpgtb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x65, 0xd4 }, { vpcmpgtw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x65, 0x11 }, { vpcmpgtw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x65, 0x11 }, { vpcmpgtw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x66, 0xd4 }, { vpcmpgtd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x66, 0x11 }, { vpcmpgtd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x66, 0x11 }, { vpcmpgtd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x37, 0xd4 }, { vpcmpgtq ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x37, 0x11 }, { vpcmpgtq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x37, 0x11 }, { vpcmpgtq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x01, 0xd4 }, { vphaddw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x01, 0x11 }, { vphaddw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x01, 0x11 }, { vphaddw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x02, 0xd4 }, { vphaddd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x02, 0x11 }, { vphaddd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x02, 0x11 }, { vphaddd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x03, 0xd4 }, { vphaddsw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x03, 0x11 }, { vphaddsw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x03, 0x11 }, { vphaddsw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x05, 0xd4 }, { vphsubw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x05, 0x11 }, { vphsubw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x05, 0x11 }, { vphsubw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x06, 0xd4 }, { vphsubd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x06, 0x11 }, { vphsubd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x06, 0x11 }, { vphsubd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x07, 0xd4 }, { vphsubsw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x07, 0x11 }, { vphsubsw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x07, 0x11 }, { vphsubsw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xf5, 0xd4 }, { vpmaddwd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xf5, 0x11 }, { vpmaddwd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xf5, 0x11 }, { vpmaddwd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x04, 0xd4 }, { vpmaddubsw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x04, 0x11 }, { vpmaddubsw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x04, 0x11 }, { vpmaddubsw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3c, 0xd4 }, { vpmaxsb ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x3c, 0x11 }, { vpmaxsb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3c, 0x11 }, { vpmaxsb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xee, 0xd4 }, { vpmaxsw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xee, 0x11 }, { vpmaxsw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xee, 0x11 }, { vpmaxsw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3d, 0xd4 }, { vpmaxsd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x3d, 0x11 }, { vpmaxsd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3d, 0x11 }, { vpmaxsd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xde, 0xd4 }, { vpmaxub ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xde, 0x11 }, { vpmaxub ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xde, 0x11 }, { vpmaxub ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3e, 0xd4 }, { vpmaxuw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x3e, 0x11 }, { vpmaxuw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3e, 0x11 }, { vpmaxuw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3f, 0xd4 }, { vpmaxud ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x3f, 0x11 }, { vpmaxud ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3f, 0x11 }, { vpmaxud ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x38, 0xd4 }, { vpminsb ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x38, 0x11 }, { vpminsb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x38, 0x11 }, { vpminsb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xea, 0xd4 }, { vpminsw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xea, 0x11 }, { vpminsw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xea, 0x11 }, { vpminsw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x39, 0xd4 }, { vpminsd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x39, 0x11 }, { vpminsd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x39, 0x11 }, { vpminsd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xda, 0xd4 }, { vpminub ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xda, 0x11 }, { vpminub ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xda, 0x11 }, { vpminub ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3a, 0xd4 }, { vpminuw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x3a, 0x11 }, { vpminuw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3a, 0x11 }, { vpminuw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3b, 0xd4 }, { vpminud ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x3b, 0x11 }, { vpminud ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3b, 0x11 }, { vpminud ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xe4, 0xd4 }, { vpmulhuw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xe4, 0x11 }, { vpmulhuw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xe4, 0x11 }, { vpmulhuw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x0b, 0xd4 }, { vpmulhrsw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x0b, 0x11 }, { vpmulhrsw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x0b, 0x11 }, { vpmulhrsw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xe5, 0xd4 }, { vpmulhw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xe5, 0x11 }, { vpmulhw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xe5, 0x11 }, { vpmulhw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xd5, 0xd4 }, { vpmullw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xd5, 0x11 }, { vpmullw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xd5, 0x11 }, { vpmullw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x40, 0xd4 }, { vpmulld ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x40, 0x11 }, { vpmulld ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x40, 0x11 }, { vpmulld ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xf4, 0xd4 }, { vpmuludq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xf4, 0x11 }, { vpmuludq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xf4, 0x11 }, { vpmuludq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x28, 0xd4 }, { vpmuldq ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x28, 0x11 }, { vpmuldq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x28, 0x11 }, { vpmuldq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xeb, 0xd4 }, { vpor ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xeb, 0x11 }, { vpor ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xeb, 0x11 }, { vpor ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xf6, 0xd4 }, { vpsadbw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xf6, 0x11 }, { vpsadbw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xf6, 0x11 }, { vpsadbw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x00, 0xd4 }, { vpshufb ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x00, 0x11 }, { vpshufb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x00, 0x11 }, { vpshufb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x08, 0xd4 }, { vpsignb ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x08, 0x11 }, { vpsignb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x08, 0x11 }, { vpsignb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x09, 0xd4 }, { vpsignw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x09, 0x11 }, { vpsignw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x09, 0x11 }, { vpsignw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x0a, 0xd4 }, { vpsignd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x0a, 0x11 }, { vpsignd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x0a, 0x11 }, { vpsignd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xf8, 0xd4 }, { vpsubb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xf8, 0x11 }, { vpsubb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xf8, 0x11 }, { vpsubb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xf9, 0xd4 }, { vpsubw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xf9, 0x11 }, { vpsubw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xf9, 0x11 }, { vpsubw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xfa, 0xd4 }, { vpsubd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xfa, 0x11 }, { vpsubd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xfa, 0x11 }, { vpsubd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xfb, 0xd4 }, { vpsubq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xfb, 0x11 }, { vpsubq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xfb, 0x11 }, { vpsubq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xe8, 0xd4 }, { vpsubsb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xe8, 0x11 }, { vpsubsb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xe8, 0x11 }, { vpsubsb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xe9, 0xd4 }, { vpsubsw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xe9, 0x11 }, { vpsubsw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xe9, 0x11 }, { vpsubsw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xd8, 0xd4 }, { vpsubusb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xd8, 0x11 }, { vpsubusb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xd8, 0x11 }, { vpsubusb ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xd9, 0xd4 }, { vpsubusw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xd9, 0x11 }, { vpsubusw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xd9, 0x11 }, { vpsubusw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x68, 0xd4 }, { vpunpckhbw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x68, 0x11 }, { vpunpckhbw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x68, 0x11 }, { vpunpckhbw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x69, 0xd4 }, { vpunpckhwd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x69, 0x11 }, { vpunpckhwd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x69, 0x11 }, { vpunpckhwd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x6a, 0xd4 }, { vpunpckhdq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x6a, 0x11 }, { vpunpckhdq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x6a, 0x11 }, { vpunpckhdq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x6d, 0xd4 }, { vpunpckhqdq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x6d, 0x11 }, { vpunpckhqdq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x6d, 0x11 }, { vpunpckhqdq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x60, 0xd4 }, { vpunpcklbw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x60, 0x11 }, { vpunpcklbw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x60, 0x11 }, { vpunpcklbw ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x61, 0xd4 }, { vpunpcklwd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x61, 0x11 }, { vpunpcklwd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x61, 0x11 }, { vpunpcklwd ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x62, 0xd4 }, { vpunpckldq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x62, 0x11 }, { vpunpckldq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x62, 0x11 }, { vpunpckldq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x6c, 0xd4 }, { vpunpcklqdq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x6c, 0x11 }, { vpunpcklqdq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0x6c, 0x11 }, { vpunpcklqdq ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xef, 0xd4 }, { vpxor ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xef, 0x11 }, { vpxor ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xef, 0x11 }, { vpxor ymm2,ymm6,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x1c, 0xf4 }, { vpabsb ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x1c, 0x21 }, { vpabsb ymm4,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x1c, 0x21 }, { vpabsb ymm4,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x1d, 0xf4 }, { vpabsw ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x1d, 0x21 }, { vpabsw ymm4,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x1d, 0x21 }, { vpabsw ymm4,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x1e, 0xf4 }, { vpabsd ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x1e, 0x21 }, { vpabsd ymm4,YWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x1e, 0x21 }, { vpabsd ymm4,YWORD [ecx] }
+testcase { 0xc4, 0xe3, 0x4d, 0x42, 0xd4, 0x07 }, { vmpsadbw ymm2,ymm6,ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x42, 0x11, 0x07 }, { vmpsadbw ymm2,ymm6,YWORD [ecx],0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x42, 0x11, 0x07 }, { vmpsadbw ymm2,ymm6,YWORD [ecx],0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x0f, 0xd4, 0x07 }, { vpalignr ymm2,ymm6,ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x0f, 0x11, 0x07 }, { vpalignr ymm2,ymm6,YWORD [ecx],0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x0f, 0x11, 0x07 }, { vpalignr ymm2,ymm6,YWORD [ecx],0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x0e, 0xd4, 0x07 }, { vpblendw ymm2,ymm6,ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x0e, 0x11, 0x07 }, { vpblendw ymm2,ymm6,YWORD [ecx],0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x0e, 0x11, 0x07 }, { vpblendw ymm2,ymm6,YWORD [ecx],0x7 }
+testcase { 0xc4, 0xe3, 0x6d, 0x4c, 0xfe, 0x40 }, { vpblendvb ymm7,ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe3, 0x6d, 0x4c, 0x39, 0x40 }, { vpblendvb ymm7,ymm2,YWORD [ecx],ymm4 }
+testcase { 0xc4, 0xe3, 0x6d, 0x4c, 0x39, 0x40 }, { vpblendvb ymm7,ymm2,YWORD [ecx],ymm4 }
+testcase { 0xc5, 0xcd, 0xf1, 0xd4 }, { vpsllw ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xf1, 0x11 }, { vpsllw ymm2,ymm6,OWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xf1, 0x11 }, { vpsllw ymm2,ymm6,OWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xf2, 0xd4 }, { vpslld ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xf2, 0x11 }, { vpslld ymm2,ymm6,OWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xf2, 0x11 }, { vpslld ymm2,ymm6,OWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xf3, 0xd4 }, { vpsllq ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xf3, 0x11 }, { vpsllq ymm2,ymm6,OWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xf3, 0x11 }, { vpsllq ymm2,ymm6,OWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xe1, 0xd4 }, { vpsraw ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xe1, 0x11 }, { vpsraw ymm2,ymm6,OWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xe1, 0x11 }, { vpsraw ymm2,ymm6,OWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xe2, 0xd4 }, { vpsrad ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xe2, 0x11 }, { vpsrad ymm2,ymm6,OWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xe2, 0x11 }, { vpsrad ymm2,ymm6,OWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xd1, 0xd4 }, { vpsrlw ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xd1, 0x11 }, { vpsrlw ymm2,ymm6,OWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xd1, 0x11 }, { vpsrlw ymm2,ymm6,OWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xd2, 0xd4 }, { vpsrld ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xd2, 0x11 }, { vpsrld ymm2,ymm6,OWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xd2, 0x11 }, { vpsrld ymm2,ymm6,OWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xd3, 0xd4 }, { vpsrlq ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xd3, 0x11 }, { vpsrlq ymm2,ymm6,OWORD [ecx] }
+testcase { 0xc5, 0xcd, 0xd3, 0x11 }, { vpsrlq ymm2,ymm6,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x20, 0xe4 }, { vpmovsxbw ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x20, 0x21 }, { vpmovsxbw ymm4,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x20, 0x21 }, { vpmovsxbw ymm4,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x23, 0xe4 }, { vpmovsxwd ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x23, 0x21 }, { vpmovsxwd ymm4,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x23, 0x21 }, { vpmovsxwd ymm4,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x25, 0xe4 }, { vpmovsxdq ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x25, 0x21 }, { vpmovsxdq ymm4,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x25, 0x21 }, { vpmovsxdq ymm4,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x30, 0xe4 }, { vpmovzxbw ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x30, 0x21 }, { vpmovzxbw ymm4,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x30, 0x21 }, { vpmovzxbw ymm4,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x33, 0xe4 }, { vpmovzxwd ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x33, 0x21 }, { vpmovzxwd ymm4,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x33, 0x21 }, { vpmovzxwd ymm4,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x35, 0xe4 }, { vpmovzxdq ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x35, 0x21 }, { vpmovzxdq ymm4,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x35, 0x21 }, { vpmovzxdq ymm4,OWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x21, 0xf4 }, { vpmovsxbd ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x21, 0x21 }, { vpmovsxbd ymm4,QWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x21, 0x21 }, { vpmovsxbd ymm4,QWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x24, 0xf4 }, { vpmovsxwq ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x24, 0x21 }, { vpmovsxwq ymm4,QWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x24, 0x21 }, { vpmovsxwq ymm4,QWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x31, 0xf4 }, { vpmovzxbd ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x31, 0x21 }, { vpmovzxbd ymm4,QWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x31, 0x21 }, { vpmovzxbd ymm4,QWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x34, 0xf4 }, { vpmovzxwq ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x34, 0x21 }, { vpmovzxwq ymm4,QWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x34, 0x21 }, { vpmovzxwq ymm4,QWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x22, 0xe4 }, { vpmovsxbq ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x22, 0x21 }, { vpmovsxbq ymm4,DWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x22, 0x21 }, { vpmovsxbq ymm4,DWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x32, 0xe4 }, { vpmovzxbq ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x32, 0x21 }, { vpmovzxbq ymm4,DWORD [ecx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x32, 0x21 }, { vpmovzxbq ymm4,DWORD [ecx] }
+
+bits 64
+
+; b/gas/testsuite/gas/i386/x86-64-avx-gather-intel.d
+testcase { 0xc4, 0xe2, 0xe9, 0x92, 0x4c, 0x7d, 0x00 }, { vgatherdpd xmm1,QWORD [rbp+xmm7*2+0x0],xmm2 }
+testcase { 0xc4, 0xe2, 0xe9, 0x93, 0x4c, 0x7d, 0x00 }, { vgatherqpd xmm1,QWORD [rbp+xmm7*2+0x0],xmm2 }
+testcase { 0xc4, 0xe2, 0xed, 0x92, 0x4c, 0x7d, 0x00 }, { vgatherdpd ymm1,QWORD [rbp+xmm7*2+0x0],ymm2 }
+testcase { 0xc4, 0xe2, 0xed, 0x93, 0x4c, 0x7d, 0x00 }, { vgatherqpd ymm1,QWORD [rbp+ymm7*2+0x0],ymm2 }
+testcase { 0xc4, 0x02, 0x99, 0x92, 0x5c, 0x75, 0x00 }, { vgatherdpd xmm11,QWORD [r13+xmm14*2+0x0],xmm12 }
+testcase { 0xc4, 0x02, 0x99, 0x93, 0x5c, 0x75, 0x00 }, { vgatherqpd xmm11,QWORD [r13+xmm14*2+0x0],xmm12 }
+testcase { 0xc4, 0x02, 0x9d, 0x92, 0x5c, 0x75, 0x00 }, { vgatherdpd ymm11,QWORD [r13+xmm14*2+0x0],ymm12 }
+testcase { 0xc4, 0x02, 0x9d, 0x93, 0x5c, 0x75, 0x00 }, { vgatherqpd ymm11,QWORD [r13+ymm14*2+0x0],ymm12 }
+testcase { 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0x25, 0x08, 0x00, 0x00, 0x00 }, { vgatherdpd ymm6,QWORD [xmm4*1+0x8],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0x25, 0xf8, 0xff, 0xff, 0xff }, { vgatherdpd ymm6,QWORD [xmm4*1-0x8],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0x25, 0x00, 0x00, 0x00, 0x00 }, { vgatherdpd ymm6,QWORD [xmm4*1+0x0],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0x25, 0x98, 0x02, 0x00, 0x00 }, { vgatherdpd ymm6,QWORD [xmm4*1+0x298],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0xe5, 0x08, 0x00, 0x00, 0x00 }, { vgatherdpd ymm6,QWORD [xmm4*8+0x8],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0xe5, 0xf8, 0xff, 0xff, 0xff }, { vgatherdpd ymm6,QWORD [xmm4*8-0x8],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0xe5, 0x00, 0x00, 0x00, 0x00 }, { vgatherdpd ymm6,QWORD [xmm4*8+0x0],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x92, 0x34, 0xe5, 0x98, 0x02, 0x00, 0x00 }, { vgatherdpd ymm6,QWORD [xmm4*8+0x298],ymm5 }
+testcase { 0xc4, 0xa2, 0xd5, 0x92, 0x34, 0x35, 0x08, 0x00, 0x00, 0x00 }, { vgatherdpd ymm6,QWORD [xmm14*1+0x8],ymm5 }
+testcase { 0xc4, 0xa2, 0xd5, 0x92, 0x34, 0x35, 0xf8, 0xff, 0xff, 0xff }, { vgatherdpd ymm6,QWORD [xmm14*1-0x8],ymm5 }
+testcase { 0xc4, 0xa2, 0xd5, 0x92, 0x34, 0x35, 0x00, 0x00, 0x00, 0x00 }, { vgatherdpd ymm6,QWORD [xmm14*1+0x0],ymm5 }
+testcase { 0xc4, 0xa2, 0xd5, 0x92, 0x34, 0x35, 0x98, 0x02, 0x00, 0x00 }, { vgatherdpd ymm6,QWORD [xmm14*1+0x298],ymm5 }
+testcase { 0xc4, 0xa2, 0xd5, 0x92, 0x34, 0xf5, 0x08, 0x00, 0x00, 0x00 }, { vgatherdpd ymm6,QWORD [xmm14*8+0x8],ymm5 }
+testcase { 0xc4, 0xa2, 0xd5, 0x92, 0x34, 0xf5, 0xf8, 0xff, 0xff, 0xff }, { vgatherdpd ymm6,QWORD [xmm14*8-0x8],ymm5 }
+testcase { 0xc4, 0xa2, 0xd5, 0x92, 0x34, 0xf5, 0x00, 0x00, 0x00, 0x00 }, { vgatherdpd ymm6,QWORD [xmm14*8+0x0],ymm5 }
+testcase { 0xc4, 0xa2, 0xd5, 0x92, 0x34, 0xf5, 0x98, 0x02, 0x00, 0x00 }, { vgatherdpd ymm6,QWORD [xmm14*8+0x298],ymm5 }
+testcase { 0xc4, 0xe2, 0x69, 0x92, 0x4c, 0x7d, 0x00 }, { vgatherdps xmm1,DWORD [rbp+xmm7*2+0x0],xmm2 }
+testcase { 0xc4, 0xe2, 0x69, 0x93, 0x4c, 0x7d, 0x00 }, { vgatherqps xmm1,DWORD [rbp+xmm7*2+0x0],xmm2 }
+testcase { 0xc4, 0xe2, 0x6d, 0x92, 0x4c, 0x7d, 0x00 }, { vgatherdps ymm1,DWORD [rbp+ymm7*2+0x0],ymm2 }
+testcase { 0xc4, 0xe2, 0x6d, 0x93, 0x4c, 0x7d, 0x00 }, { vgatherqps xmm1,DWORD [rbp+ymm7*2+0x0],xmm2 }
+testcase { 0xc4, 0x02, 0x19, 0x92, 0x5c, 0x75, 0x00 }, { vgatherdps xmm11,DWORD [r13+xmm14*2+0x0],xmm12 }
+testcase { 0xc4, 0x02, 0x19, 0x93, 0x5c, 0x75, 0x00 }, { vgatherqps xmm11,DWORD [r13+xmm14*2+0x0],xmm12 }
+testcase { 0xc4, 0x02, 0x1d, 0x92, 0x5c, 0x75, 0x00 }, { vgatherdps ymm11,DWORD [r13+ymm14*2+0x0],ymm12 }
+testcase { 0xc4, 0x02, 0x1d, 0x93, 0x5c, 0x75, 0x00 }, { vgatherqps xmm11,DWORD [r13+ymm14*2+0x0],xmm12 }
+testcase { 0xc4, 0xe2, 0x51, 0x92, 0x34, 0x25, 0x08, 0x00, 0x00, 0x00 }, { vgatherdps xmm6,DWORD [xmm4*1+0x8],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x92, 0x34, 0x25, 0xf8, 0xff, 0xff, 0xff }, { vgatherdps xmm6,DWORD [xmm4*1-0x8],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x92, 0x34, 0x25, 0x00, 0x00, 0x00, 0x00 }, { vgatherdps xmm6,DWORD [xmm4*1+0x0],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x92, 0x34, 0x25, 0x98, 0x02, 0x00, 0x00 }, { vgatherdps xmm6,DWORD [xmm4*1+0x298],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x92, 0x34, 0xe5, 0x08, 0x00, 0x00, 0x00 }, { vgatherdps xmm6,DWORD [xmm4*8+0x8],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x92, 0x34, 0xe5, 0xf8, 0xff, 0xff, 0xff }, { vgatherdps xmm6,DWORD [xmm4*8-0x8],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x92, 0x34, 0xe5, 0x00, 0x00, 0x00, 0x00 }, { vgatherdps xmm6,DWORD [xmm4*8+0x0],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x92, 0x34, 0xe5, 0x98, 0x02, 0x00, 0x00 }, { vgatherdps xmm6,DWORD [xmm4*8+0x298],xmm5 }
+testcase { 0xc4, 0xa2, 0x51, 0x92, 0x34, 0x35, 0x08, 0x00, 0x00, 0x00 }, { vgatherdps xmm6,DWORD [xmm14*1+0x8],xmm5 }
+testcase { 0xc4, 0xa2, 0x51, 0x92, 0x34, 0x35, 0xf8, 0xff, 0xff, 0xff }, { vgatherdps xmm6,DWORD [xmm14*1-0x8],xmm5 }
+testcase { 0xc4, 0xa2, 0x51, 0x92, 0x34, 0x35, 0x00, 0x00, 0x00, 0x00 }, { vgatherdps xmm6,DWORD [xmm14*1+0x0],xmm5 }
+testcase { 0xc4, 0xa2, 0x51, 0x92, 0x34, 0x35, 0x98, 0x02, 0x00, 0x00 }, { vgatherdps xmm6,DWORD [xmm14*1+0x298],xmm5 }
+testcase { 0xc4, 0xa2, 0x51, 0x92, 0x34, 0xf5, 0x08, 0x00, 0x00, 0x00 }, { vgatherdps xmm6,DWORD [xmm14*8+0x8],xmm5 }
+testcase { 0xc4, 0xa2, 0x51, 0x92, 0x34, 0xf5, 0xf8, 0xff, 0xff, 0xff }, { vgatherdps xmm6,DWORD [xmm14*8-0x8],xmm5 }
+testcase { 0xc4, 0xa2, 0x51, 0x92, 0x34, 0xf5, 0x00, 0x00, 0x00, 0x00 }, { vgatherdps xmm6,DWORD [xmm14*8+0x0],xmm5 }
+testcase { 0xc4, 0xa2, 0x51, 0x92, 0x34, 0xf5, 0x98, 0x02, 0x00, 0x00 }, { vgatherdps xmm6,DWORD [xmm14*8+0x298],xmm5 }
+testcase { 0xc4, 0xe2, 0x69, 0x90, 0x4c, 0x7d, 0x00 }, { vpgatherdd xmm1,DWORD [rbp+xmm7*2+0x0],xmm2 }
+testcase { 0xc4, 0xe2, 0x69, 0x91, 0x4c, 0x7d, 0x00 }, { vpgatherqd xmm1,DWORD [rbp+xmm7*2+0x0],xmm2 }
+testcase { 0xc4, 0xe2, 0x6d, 0x90, 0x4c, 0x7d, 0x00 }, { vpgatherdd ymm1,DWORD [rbp+ymm7*2+0x0],ymm2 }
+testcase { 0xc4, 0xe2, 0x6d, 0x91, 0x4c, 0x7d, 0x00 }, { vpgatherqd xmm1,DWORD [rbp+ymm7*2+0x0],xmm2 }
+testcase { 0xc4, 0x02, 0x19, 0x90, 0x5c, 0x75, 0x00 }, { vpgatherdd xmm11,DWORD [r13+xmm14*2+0x0],xmm12 }
+testcase { 0xc4, 0x02, 0x19, 0x91, 0x5c, 0x75, 0x00 }, { vpgatherqd xmm11,DWORD [r13+xmm14*2+0x0],xmm12 }
+testcase { 0xc4, 0x02, 0x1d, 0x90, 0x5c, 0x75, 0x00 }, { vpgatherdd ymm11,DWORD [r13+ymm14*2+0x0],ymm12 }
+testcase { 0xc4, 0x02, 0x1d, 0x91, 0x5c, 0x75, 0x00 }, { vpgatherqd xmm11,DWORD [r13+ymm14*2+0x0],xmm12 }
+testcase { 0xc4, 0xe2, 0x51, 0x90, 0x34, 0x25, 0x08, 0x00, 0x00, 0x00 }, { vpgatherdd xmm6,DWORD [xmm4*1+0x8],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x90, 0x34, 0x25, 0xf8, 0xff, 0xff, 0xff }, { vpgatherdd xmm6,DWORD [xmm4*1-0x8],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x90, 0x34, 0x25, 0x00, 0x00, 0x00, 0x00 }, { vpgatherdd xmm6,DWORD [xmm4*1+0x0],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x90, 0x34, 0x25, 0x98, 0x02, 0x00, 0x00 }, { vpgatherdd xmm6,DWORD [xmm4*1+0x298],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x90, 0x34, 0xe5, 0x08, 0x00, 0x00, 0x00 }, { vpgatherdd xmm6,DWORD [xmm4*8+0x8],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x90, 0x34, 0xe5, 0xf8, 0xff, 0xff, 0xff }, { vpgatherdd xmm6,DWORD [xmm4*8-0x8],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x90, 0x34, 0xe5, 0x00, 0x00, 0x00, 0x00 }, { vpgatherdd xmm6,DWORD [xmm4*8+0x0],xmm5 }
+testcase { 0xc4, 0xe2, 0x51, 0x90, 0x34, 0xe5, 0x98, 0x02, 0x00, 0x00 }, { vpgatherdd xmm6,DWORD [xmm4*8+0x298],xmm5 }
+testcase { 0xc4, 0xa2, 0x51, 0x90, 0x34, 0x35, 0x08, 0x00, 0x00, 0x00 }, { vpgatherdd xmm6,DWORD [xmm14*1+0x8],xmm5 }
+testcase { 0xc4, 0xa2, 0x51, 0x90, 0x34, 0x35, 0xf8, 0xff, 0xff, 0xff }, { vpgatherdd xmm6,DWORD [xmm14*1-0x8],xmm5 }
+testcase { 0xc4, 0xa2, 0x51, 0x90, 0x34, 0x35, 0x00, 0x00, 0x00, 0x00 }, { vpgatherdd xmm6,DWORD [xmm14*1+0x0],xmm5 }
+testcase { 0xc4, 0xa2, 0x51, 0x90, 0x34, 0x35, 0x98, 0x02, 0x00, 0x00 }, { vpgatherdd xmm6,DWORD [xmm14*1+0x298],xmm5 }
+testcase { 0xc4, 0xa2, 0x51, 0x90, 0x34, 0xf5, 0x08, 0x00, 0x00, 0x00 }, { vpgatherdd xmm6,DWORD [xmm14*8+0x8],xmm5 }
+testcase { 0xc4, 0xa2, 0x51, 0x90, 0x34, 0xf5, 0xf8, 0xff, 0xff, 0xff }, { vpgatherdd xmm6,DWORD [xmm14*8-0x8],xmm5 }
+testcase { 0xc4, 0xa2, 0x51, 0x90, 0x34, 0xf5, 0x00, 0x00, 0x00, 0x00 }, { vpgatherdd xmm6,DWORD [xmm14*8+0x0],xmm5 }
+testcase { 0xc4, 0xa2, 0x51, 0x90, 0x34, 0xf5, 0x98, 0x02, 0x00, 0x00 }, { vpgatherdd xmm6,DWORD [xmm14*8+0x298],xmm5 }
+testcase { 0xc4, 0xe2, 0xe9, 0x90, 0x4c, 0x7d, 0x00 }, { vpgatherdq xmm1,QWORD [rbp+xmm7*2+0x0],xmm2 }
+testcase { 0xc4, 0xe2, 0xe9, 0x91, 0x4c, 0x7d, 0x00 }, { vpgatherqq xmm1,QWORD [rbp+xmm7*2+0x0],xmm2 }
+testcase { 0xc4, 0xe2, 0xed, 0x90, 0x4c, 0x7d, 0x00 }, { vpgatherdq ymm1,QWORD [rbp+xmm7*2+0x0],ymm2 }
+testcase { 0xc4, 0xe2, 0xed, 0x91, 0x4c, 0x7d, 0x00 }, { vpgatherqq ymm1,QWORD [rbp+ymm7*2+0x0],ymm2 }
+testcase { 0xc4, 0x02, 0x99, 0x90, 0x5c, 0x75, 0x00 }, { vpgatherdq xmm11,QWORD [r13+xmm14*2+0x0],xmm12 }
+testcase { 0xc4, 0x02, 0x99, 0x91, 0x5c, 0x75, 0x00 }, { vpgatherqq xmm11,QWORD [r13+xmm14*2+0x0],xmm12 }
+testcase { 0xc4, 0x02, 0x9d, 0x90, 0x5c, 0x75, 0x00 }, { vpgatherdq ymm11,QWORD [r13+xmm14*2+0x0],ymm12 }
+testcase { 0xc4, 0x02, 0x9d, 0x91, 0x5c, 0x75, 0x00 }, { vpgatherqq ymm11,QWORD [r13+ymm14*2+0x0],ymm12 }
+testcase { 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0x25, 0x08, 0x00, 0x00, 0x00 }, { vpgatherdq ymm6,QWORD [xmm4*1+0x8],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0x25, 0xf8, 0xff, 0xff, 0xff }, { vpgatherdq ymm6,QWORD [xmm4*1-0x8],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0x25, 0x00, 0x00, 0x00, 0x00 }, { vpgatherdq ymm6,QWORD [xmm4*1+0x0],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0x25, 0x98, 0x02, 0x00, 0x00 }, { vpgatherdq ymm6,QWORD [xmm4*1+0x298],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0xe5, 0x08, 0x00, 0x00, 0x00 }, { vpgatherdq ymm6,QWORD [xmm4*8+0x8],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0xe5, 0xf8, 0xff, 0xff, 0xff }, { vpgatherdq ymm6,QWORD [xmm4*8-0x8],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0xe5, 0x00, 0x00, 0x00, 0x00 }, { vpgatherdq ymm6,QWORD [xmm4*8+0x0],ymm5 }
+testcase { 0xc4, 0xe2, 0xd5, 0x90, 0x34, 0xe5, 0x98, 0x02, 0x00, 0x00 }, { vpgatherdq ymm6,QWORD [xmm4*8+0x298],ymm5 }
+testcase { 0xc4, 0xa2, 0xd5, 0x90, 0x34, 0x35, 0x08, 0x00, 0x00, 0x00 }, { vpgatherdq ymm6,QWORD [xmm14*1+0x8],ymm5 }
+testcase { 0xc4, 0xa2, 0xd5, 0x90, 0x34, 0x35, 0xf8, 0xff, 0xff, 0xff }, { vpgatherdq ymm6,QWORD [xmm14*1-0x8],ymm5 }
+testcase { 0xc4, 0xa2, 0xd5, 0x90, 0x34, 0x35, 0x00, 0x00, 0x00, 0x00 }, { vpgatherdq ymm6,QWORD [xmm14*1+0x0],ymm5 }
+testcase { 0xc4, 0xa2, 0xd5, 0x90, 0x34, 0x35, 0x98, 0x02, 0x00, 0x00 }, { vpgatherdq ymm6,QWORD [xmm14*1+0x298],ymm5 }
+testcase { 0xc4, 0xa2, 0xd5, 0x90, 0x34, 0xf5, 0x08, 0x00, 0x00, 0x00 }, { vpgatherdq ymm6,QWORD [xmm14*8+0x8],ymm5 }
+testcase { 0xc4, 0xa2, 0xd5, 0x90, 0x34, 0xf5, 0xf8, 0xff, 0xff, 0xff }, { vpgatherdq ymm6,QWORD [xmm14*8-0x8],ymm5 }
+testcase { 0xc4, 0xa2, 0xd5, 0x90, 0x34, 0xf5, 0x00, 0x00, 0x00, 0x00 }, { vpgatherdq ymm6,QWORD [xmm14*8+0x0],ymm5 }
+testcase { 0xc4, 0xa2, 0xd5, 0x90, 0x34, 0xf5, 0x98, 0x02, 0x00, 0x00 }, { vpgatherdq ymm6,QWORD [xmm14*8+0x298],ymm5 }
+
+; b/gas/testsuite/gas/i386/x86-64-avx2-intel.d
+testcase { 0xc4, 0xe2, 0x5d, 0x8c, 0x31 }, { vpmaskmovd ymm6,ymm4,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x8e, 0x21 }, { vpmaskmovd YWORD [rcx],ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0xdd, 0x8c, 0x31 }, { vpmaskmovq ymm6,ymm4,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0xcd, 0x8e, 0x21 }, { vpmaskmovq YWORD [rcx],ymm6,ymm4 }
+testcase { 0xc4, 0xe3, 0xfd, 0x01, 0xd6, 0x07 }, { vpermpd ymm2,ymm6,0x7 }
+testcase { 0xc4, 0xe3, 0xfd, 0x01, 0x31, 0x07 }, { vpermpd ymm6,YWORD [rcx],0x7 }
+testcase { 0xc4, 0xe3, 0xfd, 0x00, 0xd6, 0x07 }, { vpermq ymm2,ymm6,0x7 }
+testcase { 0xc4, 0xe3, 0xfd, 0x00, 0x31, 0x07 }, { vpermq ymm6,YWORD [rcx],0x7 }
+testcase { 0xc4, 0xe2, 0x4d, 0x36, 0xd4 }, { vpermd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x36, 0x11 }, { vpermd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x16, 0xd4 }, { vpermps ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x16, 0x11 }, { vpermps ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x47, 0xd4 }, { vpsllvd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x47, 0x11 }, { vpsllvd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0xcd, 0x47, 0xd4 }, { vpsllvq ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0xcd, 0x47, 0x11 }, { vpsllvq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x46, 0xd4 }, { vpsravd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x46, 0x11 }, { vpsravd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x45, 0xd4 }, { vpsrlvd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x45, 0x11 }, { vpsrlvd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0xcd, 0x45, 0xd4 }, { vpsrlvq ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0xcd, 0x45, 0x11 }, { vpsrlvq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x2a, 0x21 }, { vmovntdqa ymm4,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x19, 0xf4 }, { vbroadcastsd ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x18, 0xf4 }, { vbroadcastss ymm6,xmm4 }
+testcase { 0xc4, 0xe3, 0x4d, 0x02, 0xd4, 0x07 }, { vpblendd ymm2,ymm6,ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x02, 0x11, 0x07 }, { vpblendd ymm2,ymm6,YWORD [rcx],0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x46, 0xd4, 0x07 }, { vperm2i128 ymm2,ymm6,ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x46, 0x11, 0x07 }, { vperm2i128 ymm2,ymm6,YWORD [rcx],0x7 }
+testcase { 0xc4, 0xe3, 0x5d, 0x38, 0xf4, 0x07 }, { vinserti128 ymm6,ymm4,xmm4,0x7 }
+testcase { 0xc4, 0xe3, 0x5d, 0x38, 0x31, 0x07 }, { vinserti128 ymm6,ymm4,OWORD [rcx],0x7 }
+testcase { 0xc4, 0xe2, 0x7d, 0x5a, 0x21 }, { vbroadcasti128 ymm4,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x49, 0x47, 0xd4 }, { vpsllvd xmm2,xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x49, 0x47, 0x39 }, { vpsllvd xmm7,xmm6,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0xc9, 0x47, 0xd4 }, { vpsllvq xmm2,xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0xc9, 0x47, 0x39 }, { vpsllvq xmm7,xmm6,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x49, 0x46, 0xd4 }, { vpsravd xmm2,xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x49, 0x46, 0x39 }, { vpsravd xmm7,xmm6,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x49, 0x45, 0xd4 }, { vpsrlvd xmm2,xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x49, 0x45, 0x39 }, { vpsrlvd xmm7,xmm6,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0xc9, 0x45, 0xd4 }, { vpsrlvq xmm2,xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0xc9, 0x45, 0x39 }, { vpsrlvq xmm7,xmm6,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x59, 0x8c, 0x31 }, { vpmaskmovd xmm6,xmm4,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0xd9, 0x8c, 0x31 }, { vpmaskmovq xmm6,xmm4,OWORD [rcx] }
+testcase { 0xc4, 0xe3, 0x7d, 0x39, 0xe6, 0x07 }, { vextracti128 xmm6,ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x7d, 0x39, 0x21, 0x07 }, { vextracti128 OWORD [rcx],ymm4,0x7 }
+testcase { 0xc4, 0xe2, 0x49, 0x8e, 0x21 }, { vpmaskmovd OWORD [rcx],xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0xc9, 0x8e, 0x21 }, { vpmaskmovq OWORD [rcx],xmm6,xmm4 }
+testcase { 0xc4, 0xe3, 0x49, 0x02, 0xd4, 0x07 }, { vpblendd xmm2,xmm6,xmm4,0x7 }
+testcase { 0xc4, 0xe3, 0x49, 0x02, 0x11, 0x07 }, { vpblendd xmm2,xmm6,OWORD [rcx],0x7 }
+testcase { 0xc4, 0xe2, 0x79, 0x59, 0xf4 }, { vpbroadcastq xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x79, 0x59, 0x21 }, { vpbroadcastq xmm4,QWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x59, 0xf4 }, { vpbroadcastq ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x59, 0x21 }, { vpbroadcastq ymm4,QWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x58, 0xe4 }, { vpbroadcastd ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x58, 0x21 }, { vpbroadcastd ymm4,DWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x79, 0x58, 0xf4 }, { vpbroadcastd xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x79, 0x58, 0x21 }, { vpbroadcastd xmm4,DWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x79, 0x79, 0xf4 }, { vpbroadcastw xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x79, 0x79, 0x21 }, { vpbroadcastw xmm4,WORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x79, 0xf4 }, { vpbroadcastw ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x79, 0x21 }, { vpbroadcastw ymm4,WORD [rcx] }
+testcase { 0xc4, 0xe2, 0x79, 0x78, 0xf4 }, { vpbroadcastb xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x79, 0x78, 0x21 }, { vpbroadcastb xmm4,BYTE [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x78, 0xf4 }, { vpbroadcastb ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x78, 0x21 }, { vpbroadcastb ymm4,BYTE [rcx] }
+testcase { 0xc4, 0xe2, 0x79, 0x18, 0xf4 }, { vbroadcastss xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x5d, 0x8c, 0x31 }, { vpmaskmovd ymm6,ymm4,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x8e, 0x21 }, { vpmaskmovd YWORD [rcx],ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x5d, 0x8c, 0x31 }, { vpmaskmovd ymm6,ymm4,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x8e, 0x21 }, { vpmaskmovd YWORD [rcx],ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0xdd, 0x8c, 0x31 }, { vpmaskmovq ymm6,ymm4,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0xcd, 0x8e, 0x21 }, { vpmaskmovq YWORD [rcx],ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0xdd, 0x8c, 0x31 }, { vpmaskmovq ymm6,ymm4,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0xcd, 0x8e, 0x21 }, { vpmaskmovq YWORD [rcx],ymm6,ymm4 }
+testcase { 0xc4, 0xe3, 0xfd, 0x01, 0xd6, 0x07 }, { vpermpd ymm2,ymm6,0x7 }
+testcase { 0xc4, 0xe3, 0xfd, 0x01, 0x31, 0x07 }, { vpermpd ymm6,YWORD [rcx],0x7 }
+testcase { 0xc4, 0xe3, 0xfd, 0x01, 0x31, 0x07 }, { vpermpd ymm6,YWORD [rcx],0x7 }
+testcase { 0xc4, 0xe3, 0xfd, 0x00, 0xd6, 0x07 }, { vpermq ymm2,ymm6,0x7 }
+testcase { 0xc4, 0xe3, 0xfd, 0x00, 0x31, 0x07 }, { vpermq ymm6,YWORD [rcx],0x7 }
+testcase { 0xc4, 0xe3, 0xfd, 0x00, 0x31, 0x07 }, { vpermq ymm6,YWORD [rcx],0x7 }
+testcase { 0xc4, 0xe2, 0x4d, 0x36, 0xd4 }, { vpermd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x36, 0x11 }, { vpermd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x36, 0x11 }, { vpermd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x16, 0xd4 }, { vpermps ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x16, 0x11 }, { vpermps ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x16, 0x11 }, { vpermps ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x47, 0xd4 }, { vpsllvd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x47, 0x11 }, { vpsllvd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x47, 0x11 }, { vpsllvd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0xcd, 0x47, 0xd4 }, { vpsllvq ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0xcd, 0x47, 0x11 }, { vpsllvq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0xcd, 0x47, 0x11 }, { vpsllvq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x46, 0xd4 }, { vpsravd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x46, 0x11 }, { vpsravd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x46, 0x11 }, { vpsravd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x45, 0xd4 }, { vpsrlvd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x45, 0x11 }, { vpsrlvd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x45, 0x11 }, { vpsrlvd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0xcd, 0x45, 0xd4 }, { vpsrlvq ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0xcd, 0x45, 0x11 }, { vpsrlvq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0xcd, 0x45, 0x11 }, { vpsrlvq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x2a, 0x21 }, { vmovntdqa ymm4,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x2a, 0x21 }, { vmovntdqa ymm4,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x19, 0xf4 }, { vbroadcastsd ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x18, 0xf4 }, { vbroadcastss ymm6,xmm4 }
+testcase { 0xc4, 0xe3, 0x4d, 0x02, 0xd4, 0x07 }, { vpblendd ymm2,ymm6,ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x02, 0x11, 0x07 }, { vpblendd ymm2,ymm6,YWORD [rcx],0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x02, 0x11, 0x07 }, { vpblendd ymm2,ymm6,YWORD [rcx],0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x46, 0xd4, 0x07 }, { vperm2i128 ymm2,ymm6,ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x46, 0x11, 0x07 }, { vperm2i128 ymm2,ymm6,YWORD [rcx],0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x46, 0x11, 0x07 }, { vperm2i128 ymm2,ymm6,YWORD [rcx],0x7 }
+testcase { 0xc4, 0xe3, 0x5d, 0x38, 0xf4, 0x07 }, { vinserti128 ymm6,ymm4,xmm4,0x7 }
+testcase { 0xc4, 0xe3, 0x5d, 0x38, 0x31, 0x07 }, { vinserti128 ymm6,ymm4,OWORD [rcx],0x7 }
+testcase { 0xc4, 0xe3, 0x5d, 0x38, 0x31, 0x07 }, { vinserti128 ymm6,ymm4,OWORD [rcx],0x7 }
+testcase { 0xc4, 0xe2, 0x7d, 0x5a, 0x21 }, { vbroadcasti128 ymm4,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x5a, 0x21 }, { vbroadcasti128 ymm4,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x49, 0x47, 0xd4 }, { vpsllvd xmm2,xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x49, 0x47, 0x39 }, { vpsllvd xmm7,xmm6,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x49, 0x47, 0x39 }, { vpsllvd xmm7,xmm6,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0xc9, 0x47, 0xd4 }, { vpsllvq xmm2,xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0xc9, 0x47, 0x39 }, { vpsllvq xmm7,xmm6,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0xc9, 0x47, 0x39 }, { vpsllvq xmm7,xmm6,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x49, 0x46, 0xd4 }, { vpsravd xmm2,xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x49, 0x46, 0x39 }, { vpsravd xmm7,xmm6,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x49, 0x46, 0x39 }, { vpsravd xmm7,xmm6,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x49, 0x45, 0xd4 }, { vpsrlvd xmm2,xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x49, 0x45, 0x39 }, { vpsrlvd xmm7,xmm6,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x49, 0x45, 0x39 }, { vpsrlvd xmm7,xmm6,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0xc9, 0x45, 0xd4 }, { vpsrlvq xmm2,xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0xc9, 0x45, 0x39 }, { vpsrlvq xmm7,xmm6,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0xc9, 0x45, 0x39 }, { vpsrlvq xmm7,xmm6,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x59, 0x8c, 0x31 }, { vpmaskmovd xmm6,xmm4,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x59, 0x8c, 0x31 }, { vpmaskmovd xmm6,xmm4,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0xd9, 0x8c, 0x31 }, { vpmaskmovq xmm6,xmm4,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0xd9, 0x8c, 0x31 }, { vpmaskmovq xmm6,xmm4,OWORD [rcx] }
+testcase { 0xc4, 0xe3, 0x7d, 0x39, 0xe6, 0x07 }, { vextracti128 xmm6,ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x7d, 0x39, 0x21, 0x07 }, { vextracti128 OWORD [rcx],ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x7d, 0x39, 0x21, 0x07 }, { vextracti128 OWORD [rcx],ymm4,0x7 }
+testcase { 0xc4, 0xe2, 0x49, 0x8e, 0x21 }, { vpmaskmovd OWORD [rcx],xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x49, 0x8e, 0x21 }, { vpmaskmovd OWORD [rcx],xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0xc9, 0x8e, 0x21 }, { vpmaskmovq OWORD [rcx],xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0xc9, 0x8e, 0x21 }, { vpmaskmovq OWORD [rcx],xmm6,xmm4 }
+testcase { 0xc4, 0xe3, 0x49, 0x02, 0xd4, 0x07 }, { vpblendd xmm2,xmm6,xmm4,0x7 }
+testcase { 0xc4, 0xe3, 0x49, 0x02, 0x11, 0x07 }, { vpblendd xmm2,xmm6,OWORD [rcx],0x7 }
+testcase { 0xc4, 0xe3, 0x49, 0x02, 0x11, 0x07 }, { vpblendd xmm2,xmm6,OWORD [rcx],0x7 }
+testcase { 0xc4, 0xe2, 0x79, 0x59, 0xf4 }, { vpbroadcastq xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x79, 0x59, 0x21 }, { vpbroadcastq xmm4,QWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x79, 0x59, 0x21 }, { vpbroadcastq xmm4,QWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x59, 0xf4 }, { vpbroadcastq ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x59, 0x21 }, { vpbroadcastq ymm4,QWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x59, 0x21 }, { vpbroadcastq ymm4,QWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x58, 0xe4 }, { vpbroadcastd ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x58, 0x21 }, { vpbroadcastd ymm4,DWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x58, 0x21 }, { vpbroadcastd ymm4,DWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x79, 0x58, 0xf4 }, { vpbroadcastd xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x79, 0x58, 0x21 }, { vpbroadcastd xmm4,DWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x79, 0x58, 0x21 }, { vpbroadcastd xmm4,DWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x79, 0x79, 0xf4 }, { vpbroadcastw xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x79, 0x79, 0x21 }, { vpbroadcastw xmm4,WORD [rcx] }
+testcase { 0xc4, 0xe2, 0x79, 0x79, 0x21 }, { vpbroadcastw xmm4,WORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x79, 0xf4 }, { vpbroadcastw ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x79, 0x21 }, { vpbroadcastw ymm4,WORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x79, 0x21 }, { vpbroadcastw ymm4,WORD [rcx] }
+testcase { 0xc4, 0xe2, 0x79, 0x78, 0xf4 }, { vpbroadcastb xmm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x79, 0x78, 0x21 }, { vpbroadcastb xmm4,BYTE [rcx] }
+testcase { 0xc4, 0xe2, 0x79, 0x78, 0x21 }, { vpbroadcastb xmm4,BYTE [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x78, 0xf4 }, { vpbroadcastb ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x78, 0x21 }, { vpbroadcastb ymm4,BYTE [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x78, 0x21 }, { vpbroadcastb ymm4,BYTE [rcx] }
+testcase { 0xc4, 0xe2, 0x79, 0x18, 0xf4 }, { vbroadcastss xmm6,xmm4 }
+
+; b/gas/testsuite/gas/i386/x86-64-avx256int-intel.d
+testcase { 0xc5, 0xfd, 0xd7, 0xcc }, { vpmovmskb ecx,ymm4 }
+testcase { 0xc5, 0xfd, 0xd7, 0xcc }, { vpmovmskb ecx,ymm4 }
+testcase { 0xc5, 0xed, 0x72, 0xf6, 0x07 }, { vpslld ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x73, 0xfe, 0x07 }, { vpslldq ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x73, 0xf6, 0x07 }, { vpsllq ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x71, 0xf6, 0x07 }, { vpsllw ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x72, 0xe6, 0x07 }, { vpsrad ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x71, 0xe6, 0x07 }, { vpsraw ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x72, 0xd6, 0x07 }, { vpsrld ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x73, 0xde, 0x07 }, { vpsrldq ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x73, 0xd6, 0x07 }, { vpsrlq ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x71, 0xd6, 0x07 }, { vpsrlw ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xfd, 0x70, 0xd6, 0x07 }, { vpshufd ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xfd, 0x70, 0x31, 0x07 }, { vpshufd ymm6,YWORD [rcx],0x7 }
+testcase { 0xc5, 0xfe, 0x70, 0xd6, 0x07 }, { vpshufhw ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xfe, 0x70, 0x31, 0x07 }, { vpshufhw ymm6,YWORD [rcx],0x7 }
+testcase { 0xc5, 0xff, 0x70, 0xd6, 0x07 }, { vpshuflw ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xff, 0x70, 0x31, 0x07 }, { vpshuflw ymm6,YWORD [rcx],0x7 }
+testcase { 0xc5, 0xcd, 0x6b, 0xd4 }, { vpackssdw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x6b, 0x11 }, { vpackssdw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x63, 0xd4 }, { vpacksswb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x63, 0x11 }, { vpacksswb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x2b, 0xd4 }, { vpackusdw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x2b, 0x11 }, { vpackusdw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x67, 0xd4 }, { vpackuswb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x67, 0x11 }, { vpackuswb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xfc, 0xd4 }, { vpaddb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xfc, 0x11 }, { vpaddb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xfd, 0xd4 }, { vpaddw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xfd, 0x11 }, { vpaddw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xfe, 0xd4 }, { vpaddd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xfe, 0x11 }, { vpaddd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xd4, 0xd4 }, { vpaddq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xd4, 0x11 }, { vpaddq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xec, 0xd4 }, { vpaddsb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xec, 0x11 }, { vpaddsb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xed, 0xd4 }, { vpaddsw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xed, 0x11 }, { vpaddsw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xdc, 0xd4 }, { vpaddusb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xdc, 0x11 }, { vpaddusb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xdd, 0xd4 }, { vpaddusw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xdd, 0x11 }, { vpaddusw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xdb, 0xd4 }, { vpand ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xdb, 0x11 }, { vpand ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xdf, 0xd4 }, { vpandn ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xdf, 0x11 }, { vpandn ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xe0, 0xd4 }, { vpavgb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xe0, 0x11 }, { vpavgb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xe3, 0xd4 }, { vpavgw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xe3, 0x11 }, { vpavgw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x74, 0xd4 }, { vpcmpeqb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x74, 0x11 }, { vpcmpeqb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x75, 0xd4 }, { vpcmpeqw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x75, 0x11 }, { vpcmpeqw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x76, 0xd4 }, { vpcmpeqd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x76, 0x11 }, { vpcmpeqd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x29, 0xd4 }, { vpcmpeqq ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x29, 0x11 }, { vpcmpeqq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x64, 0xd4 }, { vpcmpgtb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x64, 0x11 }, { vpcmpgtb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x65, 0xd4 }, { vpcmpgtw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x65, 0x11 }, { vpcmpgtw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x66, 0xd4 }, { vpcmpgtd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x66, 0x11 }, { vpcmpgtd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x37, 0xd4 }, { vpcmpgtq ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x37, 0x11 }, { vpcmpgtq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x01, 0xd4 }, { vphaddw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x01, 0x11 }, { vphaddw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x02, 0xd4 }, { vphaddd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x02, 0x11 }, { vphaddd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x03, 0xd4 }, { vphaddsw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x03, 0x11 }, { vphaddsw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x05, 0xd4 }, { vphsubw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x05, 0x11 }, { vphsubw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x06, 0xd4 }, { vphsubd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x06, 0x11 }, { vphsubd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x07, 0xd4 }, { vphsubsw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x07, 0x11 }, { vphsubsw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xf5, 0xd4 }, { vpmaddwd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xf5, 0x11 }, { vpmaddwd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x04, 0xd4 }, { vpmaddubsw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x04, 0x11 }, { vpmaddubsw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3c, 0xd4 }, { vpmaxsb ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x3c, 0x11 }, { vpmaxsb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xee, 0xd4 }, { vpmaxsw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xee, 0x11 }, { vpmaxsw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3d, 0xd4 }, { vpmaxsd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x3d, 0x11 }, { vpmaxsd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xde, 0xd4 }, { vpmaxub ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xde, 0x11 }, { vpmaxub ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3e, 0xd4 }, { vpmaxuw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x3e, 0x11 }, { vpmaxuw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3f, 0xd4 }, { vpmaxud ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x3f, 0x11 }, { vpmaxud ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x38, 0xd4 }, { vpminsb ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x38, 0x11 }, { vpminsb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xea, 0xd4 }, { vpminsw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xea, 0x11 }, { vpminsw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x39, 0xd4 }, { vpminsd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x39, 0x11 }, { vpminsd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xda, 0xd4 }, { vpminub ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xda, 0x11 }, { vpminub ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3a, 0xd4 }, { vpminuw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x3a, 0x11 }, { vpminuw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3b, 0xd4 }, { vpminud ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x3b, 0x11 }, { vpminud ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xe4, 0xd4 }, { vpmulhuw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xe4, 0x11 }, { vpmulhuw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x0b, 0xd4 }, { vpmulhrsw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x0b, 0x11 }, { vpmulhrsw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xe5, 0xd4 }, { vpmulhw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xe5, 0x11 }, { vpmulhw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xd5, 0xd4 }, { vpmullw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xd5, 0x11 }, { vpmullw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x40, 0xd4 }, { vpmulld ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x40, 0x11 }, { vpmulld ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xf4, 0xd4 }, { vpmuludq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xf4, 0x11 }, { vpmuludq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x28, 0xd4 }, { vpmuldq ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x28, 0x11 }, { vpmuldq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xeb, 0xd4 }, { vpor ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xeb, 0x11 }, { vpor ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xf6, 0xd4 }, { vpsadbw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xf6, 0x11 }, { vpsadbw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x00, 0xd4 }, { vpshufb ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x00, 0x11 }, { vpshufb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x08, 0xd4 }, { vpsignb ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x08, 0x11 }, { vpsignb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x09, 0xd4 }, { vpsignw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x09, 0x11 }, { vpsignw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x0a, 0xd4 }, { vpsignd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x0a, 0x11 }, { vpsignd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xf8, 0xd4 }, { vpsubb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xf8, 0x11 }, { vpsubb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xf9, 0xd4 }, { vpsubw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xf9, 0x11 }, { vpsubw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xfa, 0xd4 }, { vpsubd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xfa, 0x11 }, { vpsubd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xfb, 0xd4 }, { vpsubq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xfb, 0x11 }, { vpsubq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xe8, 0xd4 }, { vpsubsb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xe8, 0x11 }, { vpsubsb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xe9, 0xd4 }, { vpsubsw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xe9, 0x11 }, { vpsubsw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xd8, 0xd4 }, { vpsubusb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xd8, 0x11 }, { vpsubusb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xd9, 0xd4 }, { vpsubusw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xd9, 0x11 }, { vpsubusw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x68, 0xd4 }, { vpunpckhbw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x68, 0x11 }, { vpunpckhbw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x69, 0xd4 }, { vpunpckhwd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x69, 0x11 }, { vpunpckhwd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x6a, 0xd4 }, { vpunpckhdq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x6a, 0x11 }, { vpunpckhdq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x6d, 0xd4 }, { vpunpckhqdq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x6d, 0x11 }, { vpunpckhqdq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x60, 0xd4 }, { vpunpcklbw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x60, 0x11 }, { vpunpcklbw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x61, 0xd4 }, { vpunpcklwd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x61, 0x11 }, { vpunpcklwd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x62, 0xd4 }, { vpunpckldq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x62, 0x11 }, { vpunpckldq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x6c, 0xd4 }, { vpunpcklqdq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x6c, 0x11 }, { vpunpcklqdq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xef, 0xd4 }, { vpxor ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xef, 0x11 }, { vpxor ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x1c, 0xf4 }, { vpabsb ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x1c, 0x21 }, { vpabsb ymm4,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x1d, 0xf4 }, { vpabsw ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x1d, 0x21 }, { vpabsw ymm4,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x1e, 0xf4 }, { vpabsd ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x1e, 0x21 }, { vpabsd ymm4,YWORD [rcx] }
+testcase { 0xc4, 0xe3, 0x4d, 0x42, 0xd4, 0x07 }, { vmpsadbw ymm2,ymm6,ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x42, 0x11, 0x07 }, { vmpsadbw ymm2,ymm6,YWORD [rcx],0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x0f, 0xd4, 0x07 }, { vpalignr ymm2,ymm6,ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x0f, 0x11, 0x07 }, { vpalignr ymm2,ymm6,YWORD [rcx],0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x0e, 0xd4, 0x07 }, { vpblendw ymm2,ymm6,ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x0e, 0x11, 0x07 }, { vpblendw ymm2,ymm6,YWORD [rcx],0x7 }
+testcase { 0xc4, 0xe3, 0x6d, 0x4c, 0xfe, 0x40 }, { vpblendvb ymm7,ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe3, 0x6d, 0x4c, 0x39, 0x40 }, { vpblendvb ymm7,ymm2,YWORD [rcx],ymm4 }
+testcase { 0xc5, 0xcd, 0xf1, 0xd4 }, { vpsllw ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xf1, 0x11 }, { vpsllw ymm2,ymm6,OWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xf2, 0xd4 }, { vpslld ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xf2, 0x11 }, { vpslld ymm2,ymm6,OWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xf3, 0xd4 }, { vpsllq ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xf3, 0x11 }, { vpsllq ymm2,ymm6,OWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xe1, 0xd4 }, { vpsraw ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xe1, 0x11 }, { vpsraw ymm2,ymm6,OWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xe2, 0xd4 }, { vpsrad ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xe2, 0x11 }, { vpsrad ymm2,ymm6,OWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xd1, 0xd4 }, { vpsrlw ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xd1, 0x11 }, { vpsrlw ymm2,ymm6,OWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xd2, 0xd4 }, { vpsrld ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xd2, 0x11 }, { vpsrld ymm2,ymm6,OWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xd3, 0xd4 }, { vpsrlq ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xd3, 0x11 }, { vpsrlq ymm2,ymm6,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x20, 0xe4 }, { vpmovsxbw ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x20, 0x21 }, { vpmovsxbw ymm4,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x23, 0xe4 }, { vpmovsxwd ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x23, 0x21 }, { vpmovsxwd ymm4,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x25, 0xe4 }, { vpmovsxdq ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x25, 0x21 }, { vpmovsxdq ymm4,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x30, 0xe4 }, { vpmovzxbw ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x30, 0x21 }, { vpmovzxbw ymm4,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x33, 0xe4 }, { vpmovzxwd ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x33, 0x21 }, { vpmovzxwd ymm4,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x35, 0xe4 }, { vpmovzxdq ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x35, 0x21 }, { vpmovzxdq ymm4,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x21, 0xf4 }, { vpmovsxbd ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x21, 0x21 }, { vpmovsxbd ymm4,QWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x24, 0xf4 }, { vpmovsxwq ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x24, 0x21 }, { vpmovsxwq ymm4,QWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x31, 0xf4 }, { vpmovzxbd ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x31, 0x21 }, { vpmovzxbd ymm4,QWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x34, 0xf4 }, { vpmovzxwq ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x34, 0x21 }, { vpmovzxwq ymm4,QWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x22, 0xe4 }, { vpmovsxbq ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x22, 0x21 }, { vpmovsxbq ymm4,DWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x32, 0xe4 }, { vpmovzxbq ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x32, 0x21 }, { vpmovzxbq ymm4,DWORD [rcx] }
+testcase { 0xc5, 0xfd, 0xd7, 0xcc }, { vpmovmskb ecx,ymm4 }
+testcase { 0xc5, 0xfd, 0xd7, 0xcc }, { vpmovmskb ecx,ymm4 }
+testcase { 0xc5, 0xed, 0x72, 0xf6, 0x07 }, { vpslld ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x73, 0xfe, 0x07 }, { vpslldq ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x73, 0xf6, 0x07 }, { vpsllq ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x71, 0xf6, 0x07 }, { vpsllw ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x72, 0xe6, 0x07 }, { vpsrad ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x71, 0xe6, 0x07 }, { vpsraw ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x72, 0xd6, 0x07 }, { vpsrld ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x73, 0xde, 0x07 }, { vpsrldq ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x73, 0xd6, 0x07 }, { vpsrlq ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xed, 0x71, 0xd6, 0x07 }, { vpsrlw ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xfd, 0x70, 0xd6, 0x07 }, { vpshufd ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xfd, 0x70, 0x31, 0x07 }, { vpshufd ymm6,YWORD [rcx],0x7 }
+testcase { 0xc5, 0xfd, 0x70, 0x31, 0x07 }, { vpshufd ymm6,YWORD [rcx],0x7 }
+testcase { 0xc5, 0xfe, 0x70, 0xd6, 0x07 }, { vpshufhw ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xfe, 0x70, 0x31, 0x07 }, { vpshufhw ymm6,YWORD [rcx],0x7 }
+testcase { 0xc5, 0xfe, 0x70, 0x31, 0x07 }, { vpshufhw ymm6,YWORD [rcx],0x7 }
+testcase { 0xc5, 0xff, 0x70, 0xd6, 0x07 }, { vpshuflw ymm2,ymm6,0x7 }
+testcase { 0xc5, 0xff, 0x70, 0x31, 0x07 }, { vpshuflw ymm6,YWORD [rcx],0x7 }
+testcase { 0xc5, 0xff, 0x70, 0x31, 0x07 }, { vpshuflw ymm6,YWORD [rcx],0x7 }
+testcase { 0xc5, 0xcd, 0x6b, 0xd4 }, { vpackssdw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x6b, 0x11 }, { vpackssdw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x6b, 0x11 }, { vpackssdw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x63, 0xd4 }, { vpacksswb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x63, 0x11 }, { vpacksswb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x63, 0x11 }, { vpacksswb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x2b, 0xd4 }, { vpackusdw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x2b, 0x11 }, { vpackusdw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x2b, 0x11 }, { vpackusdw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x67, 0xd4 }, { vpackuswb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x67, 0x11 }, { vpackuswb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x67, 0x11 }, { vpackuswb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xfc, 0xd4 }, { vpaddb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xfc, 0x11 }, { vpaddb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xfc, 0x11 }, { vpaddb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xfd, 0xd4 }, { vpaddw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xfd, 0x11 }, { vpaddw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xfd, 0x11 }, { vpaddw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xfe, 0xd4 }, { vpaddd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xfe, 0x11 }, { vpaddd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xfe, 0x11 }, { vpaddd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xd4, 0xd4 }, { vpaddq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xd4, 0x11 }, { vpaddq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xd4, 0x11 }, { vpaddq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xec, 0xd4 }, { vpaddsb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xec, 0x11 }, { vpaddsb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xec, 0x11 }, { vpaddsb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xed, 0xd4 }, { vpaddsw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xed, 0x11 }, { vpaddsw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xed, 0x11 }, { vpaddsw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xdc, 0xd4 }, { vpaddusb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xdc, 0x11 }, { vpaddusb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xdc, 0x11 }, { vpaddusb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xdd, 0xd4 }, { vpaddusw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xdd, 0x11 }, { vpaddusw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xdd, 0x11 }, { vpaddusw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xdb, 0xd4 }, { vpand ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xdb, 0x11 }, { vpand ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xdb, 0x11 }, { vpand ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xdf, 0xd4 }, { vpandn ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xdf, 0x11 }, { vpandn ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xdf, 0x11 }, { vpandn ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xe0, 0xd4 }, { vpavgb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xe0, 0x11 }, { vpavgb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xe0, 0x11 }, { vpavgb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xe3, 0xd4 }, { vpavgw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xe3, 0x11 }, { vpavgw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xe3, 0x11 }, { vpavgw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x74, 0xd4 }, { vpcmpeqb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x74, 0x11 }, { vpcmpeqb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x74, 0x11 }, { vpcmpeqb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x75, 0xd4 }, { vpcmpeqw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x75, 0x11 }, { vpcmpeqw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x75, 0x11 }, { vpcmpeqw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x76, 0xd4 }, { vpcmpeqd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x76, 0x11 }, { vpcmpeqd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x76, 0x11 }, { vpcmpeqd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x29, 0xd4 }, { vpcmpeqq ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x29, 0x11 }, { vpcmpeqq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x29, 0x11 }, { vpcmpeqq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x64, 0xd4 }, { vpcmpgtb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x64, 0x11 }, { vpcmpgtb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x64, 0x11 }, { vpcmpgtb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x65, 0xd4 }, { vpcmpgtw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x65, 0x11 }, { vpcmpgtw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x65, 0x11 }, { vpcmpgtw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x66, 0xd4 }, { vpcmpgtd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x66, 0x11 }, { vpcmpgtd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x66, 0x11 }, { vpcmpgtd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x37, 0xd4 }, { vpcmpgtq ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x37, 0x11 }, { vpcmpgtq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x37, 0x11 }, { vpcmpgtq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x01, 0xd4 }, { vphaddw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x01, 0x11 }, { vphaddw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x01, 0x11 }, { vphaddw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x02, 0xd4 }, { vphaddd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x02, 0x11 }, { vphaddd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x02, 0x11 }, { vphaddd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x03, 0xd4 }, { vphaddsw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x03, 0x11 }, { vphaddsw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x03, 0x11 }, { vphaddsw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x05, 0xd4 }, { vphsubw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x05, 0x11 }, { vphsubw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x05, 0x11 }, { vphsubw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x06, 0xd4 }, { vphsubd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x06, 0x11 }, { vphsubd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x06, 0x11 }, { vphsubd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x07, 0xd4 }, { vphsubsw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x07, 0x11 }, { vphsubsw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x07, 0x11 }, { vphsubsw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xf5, 0xd4 }, { vpmaddwd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xf5, 0x11 }, { vpmaddwd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xf5, 0x11 }, { vpmaddwd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x04, 0xd4 }, { vpmaddubsw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x04, 0x11 }, { vpmaddubsw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x04, 0x11 }, { vpmaddubsw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3c, 0xd4 }, { vpmaxsb ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x3c, 0x11 }, { vpmaxsb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3c, 0x11 }, { vpmaxsb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xee, 0xd4 }, { vpmaxsw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xee, 0x11 }, { vpmaxsw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xee, 0x11 }, { vpmaxsw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3d, 0xd4 }, { vpmaxsd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x3d, 0x11 }, { vpmaxsd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3d, 0x11 }, { vpmaxsd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xde, 0xd4 }, { vpmaxub ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xde, 0x11 }, { vpmaxub ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xde, 0x11 }, { vpmaxub ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3e, 0xd4 }, { vpmaxuw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x3e, 0x11 }, { vpmaxuw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3e, 0x11 }, { vpmaxuw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3f, 0xd4 }, { vpmaxud ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x3f, 0x11 }, { vpmaxud ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3f, 0x11 }, { vpmaxud ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x38, 0xd4 }, { vpminsb ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x38, 0x11 }, { vpminsb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x38, 0x11 }, { vpminsb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xea, 0xd4 }, { vpminsw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xea, 0x11 }, { vpminsw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xea, 0x11 }, { vpminsw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x39, 0xd4 }, { vpminsd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x39, 0x11 }, { vpminsd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x39, 0x11 }, { vpminsd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xda, 0xd4 }, { vpminub ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xda, 0x11 }, { vpminub ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xda, 0x11 }, { vpminub ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3a, 0xd4 }, { vpminuw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x3a, 0x11 }, { vpminuw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3a, 0x11 }, { vpminuw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3b, 0xd4 }, { vpminud ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x3b, 0x11 }, { vpminud ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x3b, 0x11 }, { vpminud ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xe4, 0xd4 }, { vpmulhuw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xe4, 0x11 }, { vpmulhuw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xe4, 0x11 }, { vpmulhuw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x0b, 0xd4 }, { vpmulhrsw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x0b, 0x11 }, { vpmulhrsw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x0b, 0x11 }, { vpmulhrsw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xe5, 0xd4 }, { vpmulhw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xe5, 0x11 }, { vpmulhw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xe5, 0x11 }, { vpmulhw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xd5, 0xd4 }, { vpmullw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xd5, 0x11 }, { vpmullw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xd5, 0x11 }, { vpmullw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x40, 0xd4 }, { vpmulld ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x40, 0x11 }, { vpmulld ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x40, 0x11 }, { vpmulld ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xf4, 0xd4 }, { vpmuludq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xf4, 0x11 }, { vpmuludq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xf4, 0x11 }, { vpmuludq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x28, 0xd4 }, { vpmuldq ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x28, 0x11 }, { vpmuldq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x28, 0x11 }, { vpmuldq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xeb, 0xd4 }, { vpor ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xeb, 0x11 }, { vpor ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xeb, 0x11 }, { vpor ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xf6, 0xd4 }, { vpsadbw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xf6, 0x11 }, { vpsadbw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xf6, 0x11 }, { vpsadbw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x00, 0xd4 }, { vpshufb ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x00, 0x11 }, { vpshufb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x00, 0x11 }, { vpshufb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x08, 0xd4 }, { vpsignb ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x08, 0x11 }, { vpsignb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x08, 0x11 }, { vpsignb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x09, 0xd4 }, { vpsignw ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x09, 0x11 }, { vpsignw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x09, 0x11 }, { vpsignw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x0a, 0xd4 }, { vpsignd ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x4d, 0x0a, 0x11 }, { vpsignd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x4d, 0x0a, 0x11 }, { vpsignd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xf8, 0xd4 }, { vpsubb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xf8, 0x11 }, { vpsubb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xf8, 0x11 }, { vpsubb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xf9, 0xd4 }, { vpsubw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xf9, 0x11 }, { vpsubw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xf9, 0x11 }, { vpsubw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xfa, 0xd4 }, { vpsubd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xfa, 0x11 }, { vpsubd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xfa, 0x11 }, { vpsubd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xfb, 0xd4 }, { vpsubq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xfb, 0x11 }, { vpsubq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xfb, 0x11 }, { vpsubq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xe8, 0xd4 }, { vpsubsb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xe8, 0x11 }, { vpsubsb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xe8, 0x11 }, { vpsubsb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xe9, 0xd4 }, { vpsubsw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xe9, 0x11 }, { vpsubsw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xe9, 0x11 }, { vpsubsw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xd8, 0xd4 }, { vpsubusb ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xd8, 0x11 }, { vpsubusb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xd8, 0x11 }, { vpsubusb ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xd9, 0xd4 }, { vpsubusw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xd9, 0x11 }, { vpsubusw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xd9, 0x11 }, { vpsubusw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x68, 0xd4 }, { vpunpckhbw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x68, 0x11 }, { vpunpckhbw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x68, 0x11 }, { vpunpckhbw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x69, 0xd4 }, { vpunpckhwd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x69, 0x11 }, { vpunpckhwd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x69, 0x11 }, { vpunpckhwd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x6a, 0xd4 }, { vpunpckhdq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x6a, 0x11 }, { vpunpckhdq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x6a, 0x11 }, { vpunpckhdq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x6d, 0xd4 }, { vpunpckhqdq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x6d, 0x11 }, { vpunpckhqdq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x6d, 0x11 }, { vpunpckhqdq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x60, 0xd4 }, { vpunpcklbw ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x60, 0x11 }, { vpunpcklbw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x60, 0x11 }, { vpunpcklbw ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x61, 0xd4 }, { vpunpcklwd ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x61, 0x11 }, { vpunpcklwd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x61, 0x11 }, { vpunpcklwd ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x62, 0xd4 }, { vpunpckldq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x62, 0x11 }, { vpunpckldq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x62, 0x11 }, { vpunpckldq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x6c, 0xd4 }, { vpunpcklqdq ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0x6c, 0x11 }, { vpunpcklqdq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0x6c, 0x11 }, { vpunpcklqdq ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xef, 0xd4 }, { vpxor ymm2,ymm6,ymm4 }
+testcase { 0xc5, 0xcd, 0xef, 0x11 }, { vpxor ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xef, 0x11 }, { vpxor ymm2,ymm6,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x1c, 0xf4 }, { vpabsb ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x1c, 0x21 }, { vpabsb ymm4,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x1c, 0x21 }, { vpabsb ymm4,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x1d, 0xf4 }, { vpabsw ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x1d, 0x21 }, { vpabsw ymm4,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x1d, 0x21 }, { vpabsw ymm4,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x1e, 0xf4 }, { vpabsd ymm6,ymm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x1e, 0x21 }, { vpabsd ymm4,YWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x1e, 0x21 }, { vpabsd ymm4,YWORD [rcx] }
+testcase { 0xc4, 0xe3, 0x4d, 0x42, 0xd4, 0x07 }, { vmpsadbw ymm2,ymm6,ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x42, 0x11, 0x07 }, { vmpsadbw ymm2,ymm6,YWORD [rcx],0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x42, 0x11, 0x07 }, { vmpsadbw ymm2,ymm6,YWORD [rcx],0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x0f, 0xd4, 0x07 }, { vpalignr ymm2,ymm6,ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x0f, 0x11, 0x07 }, { vpalignr ymm2,ymm6,YWORD [rcx],0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x0f, 0x11, 0x07 }, { vpalignr ymm2,ymm6,YWORD [rcx],0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x0e, 0xd4, 0x07 }, { vpblendw ymm2,ymm6,ymm4,0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x0e, 0x11, 0x07 }, { vpblendw ymm2,ymm6,YWORD [rcx],0x7 }
+testcase { 0xc4, 0xe3, 0x4d, 0x0e, 0x11, 0x07 }, { vpblendw ymm2,ymm6,YWORD [rcx],0x7 }
+testcase { 0xc4, 0xe3, 0x6d, 0x4c, 0xfe, 0x40 }, { vpblendvb ymm7,ymm2,ymm6,ymm4 }
+testcase { 0xc4, 0xe3, 0x6d, 0x4c, 0x39, 0x40 }, { vpblendvb ymm7,ymm2,YWORD [rcx],ymm4 }
+testcase { 0xc4, 0xe3, 0x6d, 0x4c, 0x39, 0x40 }, { vpblendvb ymm7,ymm2,YWORD [rcx],ymm4 }
+testcase { 0xc5, 0xcd, 0xf1, 0xd4 }, { vpsllw ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xf1, 0x11 }, { vpsllw ymm2,ymm6,OWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xf1, 0x11 }, { vpsllw ymm2,ymm6,OWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xf2, 0xd4 }, { vpslld ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xf2, 0x11 }, { vpslld ymm2,ymm6,OWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xf2, 0x11 }, { vpslld ymm2,ymm6,OWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xf3, 0xd4 }, { vpsllq ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xf3, 0x11 }, { vpsllq ymm2,ymm6,OWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xf3, 0x11 }, { vpsllq ymm2,ymm6,OWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xe1, 0xd4 }, { vpsraw ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xe1, 0x11 }, { vpsraw ymm2,ymm6,OWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xe1, 0x11 }, { vpsraw ymm2,ymm6,OWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xe2, 0xd4 }, { vpsrad ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xe2, 0x11 }, { vpsrad ymm2,ymm6,OWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xe2, 0x11 }, { vpsrad ymm2,ymm6,OWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xd1, 0xd4 }, { vpsrlw ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xd1, 0x11 }, { vpsrlw ymm2,ymm6,OWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xd1, 0x11 }, { vpsrlw ymm2,ymm6,OWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xd2, 0xd4 }, { vpsrld ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xd2, 0x11 }, { vpsrld ymm2,ymm6,OWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xd2, 0x11 }, { vpsrld ymm2,ymm6,OWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xd3, 0xd4 }, { vpsrlq ymm2,ymm6,xmm4 }
+testcase { 0xc5, 0xcd, 0xd3, 0x11 }, { vpsrlq ymm2,ymm6,OWORD [rcx] }
+testcase { 0xc5, 0xcd, 0xd3, 0x11 }, { vpsrlq ymm2,ymm6,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x20, 0xe4 }, { vpmovsxbw ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x20, 0x21 }, { vpmovsxbw ymm4,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x20, 0x21 }, { vpmovsxbw ymm4,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x23, 0xe4 }, { vpmovsxwd ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x23, 0x21 }, { vpmovsxwd ymm4,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x23, 0x21 }, { vpmovsxwd ymm4,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x25, 0xe4 }, { vpmovsxdq ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x25, 0x21 }, { vpmovsxdq ymm4,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x25, 0x21 }, { vpmovsxdq ymm4,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x30, 0xe4 }, { vpmovzxbw ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x30, 0x21 }, { vpmovzxbw ymm4,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x30, 0x21 }, { vpmovzxbw ymm4,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x33, 0xe4 }, { vpmovzxwd ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x33, 0x21 }, { vpmovzxwd ymm4,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x33, 0x21 }, { vpmovzxwd ymm4,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x35, 0xe4 }, { vpmovzxdq ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x35, 0x21 }, { vpmovzxdq ymm4,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x35, 0x21 }, { vpmovzxdq ymm4,OWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x21, 0xf4 }, { vpmovsxbd ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x21, 0x21 }, { vpmovsxbd ymm4,QWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x21, 0x21 }, { vpmovsxbd ymm4,QWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x24, 0xf4 }, { vpmovsxwq ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x24, 0x21 }, { vpmovsxwq ymm4,QWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x24, 0x21 }, { vpmovsxwq ymm4,QWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x31, 0xf4 }, { vpmovzxbd ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x31, 0x21 }, { vpmovzxbd ymm4,QWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x31, 0x21 }, { vpmovzxbd ymm4,QWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x34, 0xf4 }, { vpmovzxwq ymm6,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x34, 0x21 }, { vpmovzxwq ymm4,QWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x34, 0x21 }, { vpmovzxwq ymm4,QWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x22, 0xe4 }, { vpmovsxbq ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x22, 0x21 }, { vpmovsxbq ymm4,DWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x22, 0x21 }, { vpmovsxbq ymm4,DWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x32, 0xe4 }, { vpmovzxbq ymm4,xmm4 }
+testcase { 0xc4, 0xe2, 0x7d, 0x32, 0x21 }, { vpmovzxbq ymm4,DWORD [rcx] }
+testcase { 0xc4, 0xe2, 0x7d, 0x32, 0x21 }, { vpmovzxbq ymm4,DWORD [rcx] }
+
+; EOF
diff --git a/test/bcd.asm b/test/bcd.asm
index bb45ca6..b58d81a 100644
--- a/test/bcd.asm
+++ b/test/bcd.asm
@@ -1,3 +1,5 @@
+;Testname=optimized; Arguments=-Ox -fbin -obcd.bin; Files=stdout stderr bcd.bin
+
dt 765432109876543210p
dt -765432109876543210p
dt +765432109876543210p
diff --git a/test/br2003451.asm b/test/br2003451.asm
index fb309a9..74e3234 100644
--- a/test/br2003451.asm
+++ b/test/br2003451.asm
@@ -1,3 +1,5 @@
+;Testname=optimized; Arguments=-Ox -fbin -obr2003451.bin; Files=stdout stderr br2003451.bin
+
cpu 8086
org 0
diff --git a/test/br2030823.asm b/test/br2030823.asm
index ce7ba43..fd8f5eb 100644
--- a/test/br2030823.asm
+++ b/test/br2030823.asm
@@ -1,4 +1,6 @@
- bits 64
+;Testname=optimized; Arguments=-Ox -fbin -obr2030823.bin; Files=stdout stderr br2030823.bin
+
+bits 64
VFMADDPD xmm0, xmm1, [0], xmm3
VFMADDPD xmm0, xmm1, xmm2, [0]
VFMADDPD ymm0, ymm1, [0], ymm3
diff --git a/test/br3005117.asm b/test/br3005117.asm
index 4e7a5b5..66a46f8 100644
--- a/test/br3005117.asm
+++ b/test/br3005117.asm
@@ -1,3 +1,5 @@
+;Testname=br3005117; Arguments=-Ox -felf -obr3005117.o; Files=stdout stderr br3005117.o
+
%macro B_STRUC 1-*
%push foo
%define %$strucname %1
diff --git a/test/br3026808.asm b/test/br3026808.asm
index 5c61c95..d84923a 100644
--- a/test/br3026808.asm
+++ b/test/br3026808.asm
@@ -1,3 +1,5 @@
+;Testname=br3026808; Arguments=-Ox -fbin -obr3026808.o; Files=stdout stderr br3026808.o
+
%imacro proc 1
%push proc
%assign %$arg 1
diff --git a/test/br3028880.asm b/test/br3028880.asm
index 20c8bd0..b6b2cf2 100644
--- a/test/br3028880.asm
+++ b/test/br3028880.asm
@@ -1,3 +1,5 @@
+;Testname=br3028880; Arguments=-Ox -fbin -obr3028880.o; Files=stdout stderr br3028880.o
+
%macro import 1
%define %%incfile %!PROJECTBASEDIR/%{1}.inc
%endmacro
diff --git a/test/br3058845.asm b/test/br3058845.asm
index b0de560..c42f5d5 100644
--- a/test/br3058845.asm
+++ b/test/br3058845.asm
@@ -11,4 +11,4 @@ cmp eax, 0xFFFF_FFFF
BITS 64
cmp ax, 0xFFFF
-cmp eax, 0xFFFF_FFFF ; shouldn't warn, but does currently
+cmp eax, 0xFFFF_FFFF
diff --git a/test/br3066383.asm b/test/br3066383.asm
index 09222ac..d6a8646 100644
--- a/test/br3066383.asm
+++ b/test/br3066383.asm
@@ -1,3 +1,5 @@
+;Testname=br3066383; Arguments=-Ox -fbin -obr3066383.bin; Files=stdout stderr br3066383.bin
+
;
; this is a for BR3005117
; http://sourceforge.net/tracker/?func=detail&aid=3005117&group_id=6208&atid=106208
diff --git a/test/br3074517.asm b/test/br3074517.asm
new file mode 100644
index 0000000..9697809
--- /dev/null
+++ b/test/br3074517.asm
@@ -0,0 +1,12 @@
+;%define UNDEFINED
+%macro macro 0
+ %ifndef UNDEFINED
+ %rep 1
+ %fatal This should display "fatal: (m:3)"
+ %endrep
+ %endif
+ %fatal This should display "fatal: (m:6)" if 'UNDEFINED' defined
+%endmacro
+
+macro
+
diff --git a/test/br3092924.asm b/test/br3092924.asm
new file mode 100644
index 0000000..3f9cde0
--- /dev/null
+++ b/test/br3092924.asm
@@ -0,0 +1,25 @@
+%define RNUM 0x10000 ; max of relocations in a section is 0xffff
+
+section .data1
+ r1 dd RNUM
+
+section .data2
+ r2 dd RNUM
+
+%macro x1 1
+ mov eax, [r1 + %1]
+%endmacro
+
+%macro x2 1
+ mov eax, [r2 + %1]
+%endmacro
+
+section .text1
+
+ %assign i 0
+ %rep RNUM
+ x1 i
+ x2 i
+ %assign i i+1
+ %endrep
+
diff --git a/test/br3104312.asm b/test/br3104312.asm
new file mode 100644
index 0000000..0dee16b
--- /dev/null
+++ b/test/br3104312.asm
@@ -0,0 +1,11 @@
+%if 1 < 8000_0002h
+ %warning No bug with 8000_0002h
+%else
+ %warning Bug with 8000_0002h
+%endif
+
+%if 1 < 8000_0001h
+ %warning No bug with 8000_0001h
+%else
+ %warning Bug with 8000_0001h
+%endif
diff --git a/test/br3385573.asm b/test/br3385573.asm
new file mode 100644
index 0000000..a6e3aba
--- /dev/null
+++ b/test/br3385573.asm
@@ -0,0 +1,11 @@
+;Testname=unoptimized; Arguments=-O0 -fbin -obr3385573.bin; Files=stdout stderr br3385573.bin
+;Testname=optimized; Arguments=-Ox -fbin -obr3385573.bin; Files=stdout stderr br3385573.bin
+[bits 64]
+
+ vpmovsxbw ymm1, xmm2
+ vpsllw ymm1, ymm2, 3
+ vpslld ymm1, ymm2, 3
+ vpsllq ymm1, ymm2, 3
+ vpsrld ymm1, ymm2, 3
+ vpsrad ymm1, ymm2, 3
+ vpermq ymm1, [rsi], 9
diff --git a/test/hle.asm b/test/hle.asm
new file mode 100644
index 0000000..e59b4f5
--- /dev/null
+++ b/test/hle.asm
@@ -0,0 +1,19 @@
+ bits 32
+
+ xacquire lock add [esi],eax
+ xacquire xchg [eax],ebx
+ xrelease lock mov [eax],ecx
+ xrelease mov [eax],ecx
+ xacquire add ecx,[eax]
+ xrelease mov [eax],ecx
+
+ ; Different opcodes!
+ mov [sym],eax
+ xrelease mov [sym],eax
+ xacquire mov [sym],eax
+
+ mov [sym],al
+ xrelease mov [sym],al
+ xacquire mov [sym],al
+
+sym dd 0
diff --git a/test/ilog2.asm b/test/ilog2.asm
new file mode 100644
index 0000000..2796af8
--- /dev/null
+++ b/test/ilog2.asm
@@ -0,0 +1,271 @@
+%use ifunc
+
+ db ilog2(0x1)
+ db ilog2(0x2)
+ db ilog2(0x4)
+ db ilog2(0x8)
+ db ilog2(0x10)
+ db ilog2(0x20)
+ db ilog2(0x40)
+ db ilog2(0x80)
+ db ilog2(0x100)
+ db ilog2(0x200)
+ db ilog2(0x400)
+ db ilog2(0x800)
+ db ilog2(0x1000)
+ db ilog2(0x2000)
+ db ilog2(0x4000)
+ db ilog2(0x8000)
+ db ilog2(0x10000)
+ db ilog2(0x20000)
+ db ilog2(0x40000)
+ db ilog2(0x80000)
+ db ilog2(0x100000)
+ db ilog2(0x200000)
+ db ilog2(0x400000)
+ db ilog2(0x800000)
+ db ilog2(0x1000000)
+ db ilog2(0x2000000)
+ db ilog2(0x4000000)
+ db ilog2(0x8000000)
+ db ilog2(0x10000000)
+ db ilog2(0x20000000)
+ db ilog2(0x40000000)
+ db ilog2(0x80000000)
+
+ db ilog2w(0x1)
+ db ilog2w(0x2)
+ db ilog2w(0x4)
+ db ilog2w(0x8)
+ db ilog2w(0x10)
+ db ilog2w(0x20)
+ db ilog2w(0x40)
+ db ilog2w(0x80)
+ db ilog2w(0x100)
+ db ilog2w(0x200)
+ db ilog2w(0x400)
+ db ilog2w(0x800)
+ db ilog2w(0x1000)
+ db ilog2w(0x2000)
+ db ilog2w(0x4000)
+ db ilog2w(0x8000)
+ db ilog2w(0x10000)
+ db ilog2w(0x20000)
+ db ilog2w(0x40000)
+ db ilog2w(0x80000)
+ db ilog2w(0x100000)
+ db ilog2w(0x200000)
+ db ilog2w(0x400000)
+ db ilog2w(0x800000)
+ db ilog2w(0x1000000)
+ db ilog2w(0x2000000)
+ db ilog2w(0x4000000)
+ db ilog2w(0x8000000)
+ db ilog2w(0x10000000)
+ db ilog2w(0x20000000)
+ db ilog2w(0x40000000)
+ db ilog2w(0x80000000)
+
+ db ilog2f(0x1)
+ db ilog2f(0x2)
+ db ilog2f(0x4)
+ db ilog2f(0x8)
+ db ilog2f(0x10)
+ db ilog2f(0x20)
+ db ilog2f(0x40)
+ db ilog2f(0x80)
+ db ilog2f(0x100)
+ db ilog2f(0x200)
+ db ilog2f(0x400)
+ db ilog2f(0x800)
+ db ilog2f(0x1000)
+ db ilog2f(0x2000)
+ db ilog2f(0x4000)
+ db ilog2f(0x8000)
+ db ilog2f(0x10000)
+ db ilog2f(0x20000)
+ db ilog2f(0x40000)
+ db ilog2f(0x80000)
+ db ilog2f(0x100000)
+ db ilog2f(0x200000)
+ db ilog2f(0x400000)
+ db ilog2f(0x800000)
+ db ilog2f(0x1000000)
+ db ilog2f(0x2000000)
+ db ilog2f(0x4000000)
+ db ilog2f(0x8000000)
+ db ilog2f(0x10000000)
+ db ilog2f(0x20000000)
+ db ilog2f(0x40000000)
+ db ilog2f(0x80000000)
+
+ db ilog2c(0x1)
+ db ilog2c(0x2)
+ db ilog2c(0x4)
+ db ilog2c(0x8)
+ db ilog2c(0x10)
+ db ilog2c(0x20)
+ db ilog2c(0x40)
+ db ilog2c(0x80)
+ db ilog2c(0x100)
+ db ilog2c(0x200)
+ db ilog2c(0x400)
+ db ilog2c(0x800)
+ db ilog2c(0x1000)
+ db ilog2c(0x2000)
+ db ilog2c(0x4000)
+ db ilog2c(0x8000)
+ db ilog2c(0x10000)
+ db ilog2c(0x20000)
+ db ilog2c(0x40000)
+ db ilog2c(0x80000)
+ db ilog2c(0x100000)
+ db ilog2c(0x200000)
+ db ilog2c(0x400000)
+ db ilog2c(0x800000)
+ db ilog2c(0x1000000)
+ db ilog2c(0x2000000)
+ db ilog2c(0x4000000)
+ db ilog2c(0x8000000)
+ db ilog2c(0x10000000)
+ db ilog2c(0x20000000)
+ db ilog2c(0x40000000)
+ db ilog2c(0x80000000)
+
+%ifdef ERROR
+ db ilog2(0x0)
+ db ilog2(0x3)
+ db ilog2(0x5)
+ db ilog2(0x9)
+ db ilog2(0x10)
+ db ilog2(0x30)
+ db ilog2(0x50)
+ db ilog2(0x90)
+ db ilog2(0x100)
+ db ilog2(0x300)
+ db ilog2(0x500)
+ db ilog2(0x900)
+ db ilog2(0x1000)
+ db ilog2(0x3000)
+ db ilog2(0x5000)
+ db ilog2(0x9000)
+ db ilog2(0x10000)
+ db ilog2(0x30000)
+ db ilog2(0x50000)
+ db ilog2(0x90000)
+ db ilog2(0x100000)
+ db ilog2(0x300000)
+ db ilog2(0x500000)
+ db ilog2(0x900000)
+ db ilog2(0x1000000)
+ db ilog2(0x3000000)
+ db ilog2(0x5000000)
+ db ilog2(0x9000000)
+ db ilog2(0x10000000)
+ db ilog2(0x30000000)
+ db ilog2(0x50000000)
+ db ilog2(0x90000000)
+%endif
+
+%ifdef WARNING
+ db ilog2w(0x0)
+ db ilog2w(0x3)
+ db ilog2w(0x5)
+ db ilog2w(0x9)
+ db ilog2w(0x10)
+ db ilog2w(0x30)
+ db ilog2w(0x50)
+ db ilog2w(0x90)
+ db ilog2w(0x100)
+ db ilog2w(0x300)
+ db ilog2w(0x500)
+ db ilog2w(0x900)
+ db ilog2w(0x1000)
+ db ilog2w(0x3000)
+ db ilog2w(0x5000)
+ db ilog2w(0x9000)
+ db ilog2w(0x10000)
+ db ilog2w(0x30000)
+ db ilog2w(0x50000)
+ db ilog2w(0x90000)
+ db ilog2w(0x100000)
+ db ilog2w(0x300000)
+ db ilog2w(0x500000)
+ db ilog2w(0x900000)
+ db ilog2w(0x1000000)
+ db ilog2w(0x3000000)
+ db ilog2w(0x5000000)
+ db ilog2w(0x9000000)
+ db ilog2w(0x10000000)
+ db ilog2w(0x30000000)
+ db ilog2w(0x50000000)
+ db ilog2w(0x90000000)
+%endif
+
+ db ilog2f(0x0)
+ db ilog2f(0x1)
+ db ilog2f(0x3)
+ db ilog2f(0x5)
+ db ilog2f(0x9)
+ db ilog2f(0x10)
+ db ilog2f(0x30)
+ db ilog2f(0x50)
+ db ilog2f(0x90)
+ db ilog2f(0x100)
+ db ilog2f(0x300)
+ db ilog2f(0x500)
+ db ilog2f(0x900)
+ db ilog2f(0x1000)
+ db ilog2f(0x3000)
+ db ilog2f(0x5000)
+ db ilog2f(0x9000)
+ db ilog2f(0x10000)
+ db ilog2f(0x30000)
+ db ilog2f(0x50000)
+ db ilog2f(0x90000)
+ db ilog2f(0x100000)
+ db ilog2f(0x300000)
+ db ilog2f(0x500000)
+ db ilog2f(0x900000)
+ db ilog2f(0x1000000)
+ db ilog2f(0x3000000)
+ db ilog2f(0x5000000)
+ db ilog2f(0x9000000)
+ db ilog2f(0x10000000)
+ db ilog2f(0x30000000)
+ db ilog2f(0x50000000)
+ db ilog2f(0x90000000)
+
+ db ilog2c(0x0)
+ db ilog2c(0x1)
+ db ilog2c(0x3)
+ db ilog2c(0x5)
+ db ilog2c(0x9)
+ db ilog2c(0x10)
+ db ilog2c(0x30)
+ db ilog2c(0x50)
+ db ilog2c(0x90)
+ db ilog2c(0x100)
+ db ilog2c(0x300)
+ db ilog2c(0x500)
+ db ilog2c(0x900)
+ db ilog2c(0x1000)
+ db ilog2c(0x3000)
+ db ilog2c(0x5000)
+ db ilog2c(0x9000)
+ db ilog2c(0x10000)
+ db ilog2c(0x30000)
+ db ilog2c(0x50000)
+ db ilog2c(0x90000)
+ db ilog2c(0x100000)
+ db ilog2c(0x300000)
+ db ilog2c(0x500000)
+ db ilog2c(0x900000)
+ db ilog2c(0x1000000)
+ db ilog2c(0x3000000)
+ db ilog2c(0x5000000)
+ db ilog2c(0x9000000)
+ db ilog2c(0x10000000)
+ db ilog2c(0x30000000)
+ db ilog2c(0x50000000)
+ db ilog2c(0x90000000)
diff --git a/test/imm64.asm b/test/imm64.asm
index d90a064..a114044 100644
--- a/test/imm64.asm
+++ b/test/imm64.asm
@@ -9,3 +9,53 @@
mov [rax],dword 11223344h ; 32-bit operation
mov qword [rax],11223344h
mov qword [rax],dword 11223344h
+
+ mov rax,0_ffffffff_8899aabbh
+ mov rax,dword 0_ffffffff_8899aabbh
+ mov eax,0_ffffffff_8899aabbh
+ mov [rax],dword 0_ffffffff_8899aabbh ; 32-bit operation
+ mov qword [rax],0_ffffffff_8899aabbh
+ mov qword [rax],dword 0_ffffffff_8899aabbh
+
+ mov rax,7fffffffh
+ mov rax,80000000h
+ mov rax,0_ffffffffh
+ mov rax,1_00000000h
+ mov rax,0_ffffffff_7fffffffh
+ mov rax,0_ffffffff_80000000h
+
+ mov rax,0_11223344_8899aabbh
+ mov rax,dword 0_11223344_8899aabbh
+ mov eax,0_11223344_8899aabbh
+ mov [rax],dword 0_11223344_8899aabbh ; 32-bit operation
+ mov qword [rax],0_11223344_8899aabbh
+ mov qword [rax],dword 0_11223344_8899aabbh
+
+ mov rax,strict 11223344h
+ mov rax,strict dword 11223344h
+ mov eax,strict 11223344h
+ mov [rax],strict dword 11223344h ; 32-bit operation
+ mov qword [rax],strict 11223344h
+ mov qword [rax],strict dword 11223344h
+
+ mov rax,strict 0_ffffffff_8899aabbh
+ mov rax,strict dword 0_ffffffff_8899aabbh
+ mov eax,strict 0_ffffffff_8899aabbh
+ mov [rax],strict dword 0_ffffffff_8899aabbh ; 32-bit operation
+ mov qword [rax],strict 0_ffffffff_8899aabbh
+ mov qword [rax],strict dword 0_ffffffff_8899aabbh
+
+ mov rax,strict 7fffffffh
+ mov rax,strict 80000000h
+ mov rax,strict 0_ffffffffh
+ mov rax,strict 1_00000000h
+ mov rax,strict 0_ffffffff_7fffffffh
+ mov rax,strict 0_ffffffff_80000000h
+
+ mov rax,strict 0_11223344_8899aabbh
+ mov rax,strict dword 0_11223344_8899aabbh
+ mov eax,strict 0_11223344_8899aabbh
+ mov [rax],strict dword 0_11223344_8899aabbh ; 32-bit operation
+ mov qword [rax],strict 0_11223344_8899aabbh
+ mov qword [rax],strict dword 0_11223344_8899aabbh
+
diff --git a/test/jmp64.asm b/test/jmp64.asm
index f007b9e..616b0e6 100644
--- a/test/jmp64.asm
+++ b/test/jmp64.asm
@@ -4,12 +4,16 @@
jmp rcx
jmp [rax]
jmp qword [rax]
+ jmp near [rax]
+ jmp near qword [rax]
jmp far [rax]
jmp far dword [rax]
jmp far qword [rax]
call rcx
call [rax]
call qword [rax]
+ call near [rax]
+ call near qword [rax]
call far [rax]
call far dword [rax]
call far qword [rax]
diff --git a/test/movd.asm b/test/movd.asm
new file mode 100644
index 0000000..42df0af
--- /dev/null
+++ b/test/movd.asm
@@ -0,0 +1,12 @@
+;Testname=optimized; Arguments=-Ox -fbin -omovd.bin; Files=stdout stderr movd.bin
+[BITS 32]
+ movd mm0,eax
+ movd mm0,[eax]
+ movd [eax],mm0
+ movd eax,mm0
+
+ movd xmm0,eax
+ movd xmm0,[eax]
+
+ movd [eax],xmm0
+ movd eax,xmm0
diff --git a/test/movd64.asm b/test/movd64.asm
new file mode 100644
index 0000000..b328c34
--- /dev/null
+++ b/test/movd64.asm
@@ -0,0 +1,15 @@
+ bits 64
+
+ movd r8d, mm1
+ movd r8, mm1
+ movq r8, mm1
+
+ movd [rax], mm1
+ movq [rax], mm1
+ movd dword [rax], mm1
+; movq dword [rax], mm1
+ movd qword [rax], mm1
+ movq qword [rax], mm1
+
+; movd mm2, mm1
+ movq mm2, mm1
diff --git a/test/prefix66.asm b/test/prefix66.asm
new file mode 100644
index 0000000..4d9eb00
--- /dev/null
+++ b/test/prefix66.asm
@@ -0,0 +1,28 @@
+;Testname=test; Arguments=-fbin -oprefix66.bin; Files=stdout stderr prefix66.bin
+
+BITS 16
+cmp ax, 1
+o16 cmp ax, 1
+o32 cmp ax, 1
+
+cmp eax, 1
+o16 cmp eax, 1
+o32 cmp eax, 1
+
+BITS 32
+cmp ax, 1
+o16 cmp ax, 1
+o32 cmp ax, 1
+
+cmp eax, 1
+o16 cmp eax, 1
+o32 cmp eax, 1
+
+BITS 64
+cmp ax, 1
+o16 cmp ax, 1
+o32 cmp ax, 1
+
+cmp eax, 1
+o16 cmp eax, 1
+o32 cmp eax, 1
diff --git a/test/sreg.asm b/test/sreg.asm
new file mode 100644
index 0000000..11449a5
--- /dev/null
+++ b/test/sreg.asm
@@ -0,0 +1,65 @@
+ bits 64
+ mov es,rax
+ mov ss,rax
+ mov ds,rax
+ mov fs,rax
+ mov gs,rax
+ mov es,eax
+ mov ss,eax
+ mov ds,eax
+ mov fs,eax
+ mov gs,eax
+ mov es,ax
+ mov ss,ax
+ mov ds,ax
+ mov fs,ax
+ mov gs,ax
+ mov es,[rsi]
+ mov ss,[rsi]
+ mov ds,[rsi]
+ mov fs,[rsi]
+ mov gs,[rsi]
+ mov es,word [rsi]
+ mov ss,word [rsi]
+ mov ds,word [rsi]
+ mov fs,word [rsi]
+ mov gs,word [rsi]
+ mov es,qword [rsi]
+ mov ss,qword [rsi]
+ mov ds,qword [rsi]
+ mov fs,qword [rsi]
+ mov gs,qword [rsi]
+ mov rax,es
+ mov rax,cs
+ mov rax,ss
+ mov rax,ds
+ mov rax,fs
+ mov rax,gs
+ mov eax,es
+ mov eax,ss
+ mov eax,ds
+ mov eax,fs
+ mov eax,fs
+ mov ax,es
+ mov ax,ss
+ mov ax,ds
+ mov ax,fs
+ mov ax,gs
+ mov [rdi],es
+ mov [rdi],cs
+ mov [rdi],ss
+ mov [rdi],ds
+ mov [rdi],fs
+ mov [rdi],gs
+ mov word [rdi],es
+ mov word [rdi],cs
+ mov word [rdi],ss
+ mov word [rdi],ds
+ mov word [rdi],fs
+ mov word [rdi],gs
+ mov qword [rdi],es
+ mov qword [rdi],cs
+ mov qword [rdi],ss
+ mov qword [rdi],ds
+ mov qword [rdi],fs
+ mov qword [rdi],gs
diff --git a/test/utf.asm b/test/utf.asm
index 4b894f8..00207dc 100644
--- a/test/utf.asm
+++ b/test/utf.asm
@@ -2,6 +2,10 @@
;Testname=error; Arguments=-fbin -outf.bin -DERROR; Files=stdout stderr utf.bin
%define u(x) __utf16__(x)
%define w(x) __utf32__(x)
+%define ul(x) __utf16le__(x)
+%define wl(x) __utf32le__(x)
+%define ub(x) __utf16be__(x)
+%define wb(x) __utf32be__(x)
db `Test \u306a\U0001abcd\n`
dw u(`Test \u306a\U0001abcd\n`)
@@ -21,10 +25,58 @@
mov ebx,u(`\U0001abcd`)
mov ecx,w(`\U0001abcd`)
+ db `Test \u306a\U0001abcd\n`
+ dw ul(`Test \u306a\U0001abcd\n`)
+ dd wl(`Test \u306a\U0001abcd\n`)
+
+ db `\u306a`
+ db `\xe3\x81\xaa`
+
+ dw __utf16le__ "Hello, World!"
+
+ nop
+
+ mov ax,ul(`a`)
+ mov bx,ul(`\u306a`)
+ mov cx,ul(`\xe3\x81\xaa`)
+ mov eax,ul(`ab`)
+ mov ebx,ul(`\U0001abcd`)
+ mov ecx,wl(`\U0001abcd`)
+
+ db `Test \u306a\U0001abcd\n`
+ dw ub(`Test \u306a\U0001abcd\n`)
+ dd wb(`Test \u306a\U0001abcd\n`)
+
+ db `\u306a`
+ db `\xe3\x81\xaa`
+
+ dw __utf16be__ "Hello, World!"
+
+ nop
+
+ mov ax,ub(`a`)
+ mov bx,ub(`\u306a`)
+ mov cx,ub(`\xe3\x81\xaa`)
+ mov eax,ub(`ab`)
+ mov ebx,ub(`\U0001abcd`)
+ mov ecx,wb(`\U0001abcd`)
+
%ifdef ERROR
dw __utf16__ 33
dw __utf16__, 46
dw __utf16__("Hello, World!",16)
dw __utf16__("Hello, World!",16
dw u(`\xff`)
+
+ dw __utf16le__ 33
+ dw __utf16le__, 46
+ dw __utf16le__("Hello, World!",16)
+ dw __utf16le__("Hello, World!",16
+ dw ul(`\xff`)
+
+ dw __utf16be__ 33
+ dw __utf16be__, 46
+ dw __utf16be__("Hello, World!",16)
+ dw __utf16be__("Hello, World!",16
+ dw ub(`\xff`)
%endif
diff --git a/test/vgather.asm b/test/vgather.asm
new file mode 100644
index 0000000..4012bf2
--- /dev/null
+++ b/test/vgather.asm
@@ -0,0 +1,76 @@
+ bits 64
+
+ vgatherdpd xmm0,[rcx+xmm2],xmm3
+ vgatherqpd xmm0,[rcx+xmm2],xmm3
+ vgatherdpd ymm0,[rcx+xmm2],ymm3
+ vgatherqpd ymm0,[rcx+ymm2],ymm3
+
+ vgatherdpd xmm0,[rcx+xmm2*1],xmm3
+ vgatherqpd xmm0,[rcx+xmm2*1],xmm3
+ vgatherdpd ymm0,[rcx+xmm2*1],ymm3
+ vgatherqpd ymm0,[rcx+ymm2*1],ymm3
+
+ vgatherdpd xmm0,[rcx+xmm2*2],xmm3
+ vgatherqpd xmm0,[rcx+xmm2*2],xmm3
+ vgatherdpd ymm0,[rcx+xmm2*2],ymm3
+ vgatherqpd ymm0,[rcx+ymm2*2],ymm3
+
+ vgatherdpd xmm0,[rcx+xmm2*4],xmm3
+ vgatherqpd xmm0,[rcx+xmm2*4],xmm3
+ vgatherdpd ymm0,[rcx+xmm2*4],ymm3
+ vgatherqpd ymm0,[rcx+ymm2*4],ymm3
+
+ vgatherdpd xmm0,[rcx+xmm2*8],xmm3
+ vgatherqpd xmm0,[rcx+xmm2*8],xmm3
+ vgatherdpd ymm0,[rcx+xmm2*8],ymm3
+ vgatherqpd ymm0,[rcx+ymm2*8],ymm3
+
+ vgatherdpd xmm0,[xmm2],xmm3
+ vgatherqpd xmm0,[xmm2],xmm3
+ vgatherdpd ymm0,[xmm2],ymm3
+ vgatherqpd ymm0,[ymm2],ymm3
+
+ vgatherdpd xmm0,[xmm2*1],xmm3
+ vgatherqpd xmm0,[xmm2*1],xmm3
+ vgatherdpd ymm0,[xmm2*1],ymm3
+ vgatherqpd ymm0,[ymm2*1],ymm3
+
+ vgatherdpd xmm0,[xmm2*2],xmm3
+ vgatherqpd xmm0,[xmm2*2],xmm3
+ vgatherdpd ymm0,[xmm2*2],ymm3
+ vgatherqpd ymm0,[ymm2*2],ymm3
+
+ vgatherdpd xmm0,[xmm2*4],xmm3
+ vgatherqpd xmm0,[xmm2*4],xmm3
+ vgatherdpd ymm0,[xmm2*4],ymm3
+ vgatherqpd ymm0,[ymm2*4],ymm3
+
+ vgatherdpd xmm0,[xmm2*8],xmm3
+ vgatherqpd xmm0,[xmm2*8],xmm3
+ vgatherdpd ymm0,[xmm2*8],ymm3
+ vgatherqpd ymm0,[ymm2*8],ymm3
+
+ vgatherdpd xmm0,[xmm2+rcx],xmm3
+ vgatherqpd xmm0,[xmm2+rcx],xmm3
+ vgatherdpd ymm0,[xmm2+rcx],ymm3
+ vgatherqpd ymm0,[ymm2+rcx],ymm3
+
+ vgatherdpd xmm0,[xmm2*1+rcx],xmm3
+ vgatherqpd xmm0,[xmm2*1+rcx],xmm3
+ vgatherdpd ymm0,[xmm2*1+rcx],ymm3
+ vgatherqpd ymm0,[ymm2*1+rcx],ymm3
+
+ vgatherdpd xmm0,[xmm2*2+rcx],xmm3
+ vgatherqpd xmm0,[xmm2*2+rcx],xmm3
+ vgatherdpd ymm0,[xmm2*2+rcx],ymm3
+ vgatherqpd ymm0,[ymm2*2+rcx],ymm3
+
+ vgatherdpd xmm0,[xmm2*4+rcx],xmm3
+ vgatherqpd xmm0,[xmm2*4+rcx],xmm3
+ vgatherdpd ymm0,[xmm2*4+rcx],ymm3
+ vgatherqpd ymm0,[ymm2*4+rcx],ymm3
+
+ vgatherdpd xmm0,[xmm2*8+rcx],xmm3
+ vgatherqpd xmm0,[xmm2*8+rcx],xmm3
+ vgatherdpd ymm0,[xmm2*8+rcx],ymm3
+ vgatherqpd ymm0,[ymm2*8+rcx],ymm3
diff --git a/tokens.dat b/tokens.dat
index c7d3b97..c2df469 100644
--- a/tokens.dat
+++ b/tokens.dat
@@ -1,6 +1,6 @@
## --------------------------------------------------------------------------
##
-## Copyright 1996-2009 The NASM Authors - All Rights Reserved
+## Copyright 1996-2012 The NASM Authors - All Rights Reserved
## See the file AUTHORS included with the NASM distribution for
## the specific copyright holders.
##
@@ -52,6 +52,8 @@ repnz
repz
times
wait
+xacquire
+xrelease
% TOKEN_SPECIAL, 0, S_*
abs
@@ -89,7 +91,17 @@ __float128h__
% TOKEN_STRFUNC, 0, STRFUNC_{__*__}
__utf16__
+__utf16le__
+__utf16be__
__utf32__
+__utf32le__
+__utf32be__
+
+% TOKEN_IFUNC, 0, IFUNC_{__*__}
+__ilog2e__
+__ilog2w__
+__ilog2f__
+__ilog2c__
% TOKEN_*, 0, 0
seg
diff --git a/tokhash.c b/tokhash.c
index db9a4a5..f01e310 100644
--- a/tokhash.c
+++ b/tokhash.c
@@ -45,9 +45,9 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
0,
0,
- 0,
+ 3049,
UNUSED,
- 906,
+ 907,
0,
0,
UNUSED,
@@ -73,7 +73,7 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
UNUSED,
0,
- 765,
+ 775,
0,
0,
UNUSED,
@@ -108,10 +108,10 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
UNUSED,
UNUSED,
- 948,
- 509,
+ 950,
+ 3609,
0,
- 375,
+ 322,
0,
UNUSED,
0,
@@ -119,28 +119,28 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
0,
0,
UNUSED,
- 252,
- -2219,
- 1132,
+ 253,
+ 725,
+ 1180,
UNUSED,
UNUSED,
0,
0,
0,
- -328,
+ -329,
0,
UNUSED,
UNUSED,
UNUSED,
- -1265,
- 1066,
+ -1319,
+ 1072,
0,
UNUSED,
+ 2973,
0,
+ 125,
0,
- 78,
- 0,
- -369,
+ -370,
UNUSED,
UNUSED,
UNUSED,
@@ -149,7 +149,7 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
-4,
UNUSED,
UNUSED,
- 197,
+ 198,
UNUSED,
UNUSED,
UNUSED,
@@ -160,26 +160,26 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
UNUSED,
0,
- -193,
+ -194,
UNUSED,
UNUSED,
0,
0,
- UNUSED,
+ 0,
UNUSED,
UNUSED,
0,
- 304,
+ 356,
553,
0,
UNUSED,
- 954,
+ 910,
0,
UNUSED,
UNUSED,
UNUSED,
0,
- -1879,
+ -1928,
UNUSED,
UNUSED,
UNUSED,
@@ -199,13 +199,13 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
0,
0,
- 2638,
+ 2643,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- -1934,
+ 1061,
UNUSED,
UNUSED,
UNUSED,
@@ -215,7 +215,7 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
UNUSED,
UNUSED,
- 811,
+ 812,
0,
UNUSED,
UNUSED,
@@ -223,22 +223,22 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
0,
UNUSED,
0,
- 1808,
- 0,
+ 1864,
+ -164,
0,
UNUSED,
0,
0,
UNUSED,
0,
- 1568,
+ 1621,
UNUSED,
UNUSED,
UNUSED,
- -44,
+ 6,
UNUSED,
UNUSED,
- 355,
+ 402,
UNUSED,
UNUSED,
0,
@@ -247,10 +247,10 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
0,
0,
UNUSED,
- 803,
+ 805,
UNUSED,
UNUSED,
- 983,
+ 985,
0,
UNUSED,
UNUSED,
@@ -276,24 +276,24 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
0,
0,
- 559,
- 362,
+ 560,
+ 363,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- 1065,
+ 1067,
0,
UNUSED,
- -802,
+ -858,
0,
- 1468,
+ 1521,
103,
UNUSED,
UNUSED,
0,
UNUSED,
- 1750,
+ 1803,
184,
UNUSED,
0,
@@ -301,23 +301,23 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
UNUSED,
UNUSED,
- -1709,
- 1205,
+ -1717,
+ 1207,
UNUSED,
UNUSED,
UNUSED,
- 760,
+ 762,
239,
0,
0,
UNUSED,
0,
UNUSED,
- -190,
+ -189,
UNUSED,
UNUSED,
UNUSED,
- 566,
+ 3590,
UNUSED,
0,
UNUSED,
@@ -327,13 +327,13 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
UNUSED,
0,
- -311,
- 0,
+ -308,
+ -2560,
0,
UNUSED,
0,
0,
- 971,
+ 977,
UNUSED,
UNUSED,
UNUSED,
@@ -348,20 +348,20 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
0,
UNUSED,
0,
- 1087,
+ 1089,
UNUSED,
178,
0,
0,
UNUSED,
0,
- 763,
+ 765,
UNUSED,
UNUSED,
0,
0,
0,
- 1179,
+ 1235,
UNUSED,
UNUSED,
UNUSED,
@@ -372,34 +372,34 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
0,
UNUSED,
- 119,
- 1377,
+ 170,
+ 1384,
-275,
UNUSED,
105,
UNUSED,
- 22,
+ 3071,
UNUSED,
0,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- 1189,
+ 1191,
0,
UNUSED,
0,
- 215,
+ 217,
UNUSED,
- 970,
+ 1022,
UNUSED,
- 16,
- -1843,
+ 17,
+ -1948,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- 1104,
+ 1106,
UNUSED,
UNUSED,
UNUSED,
@@ -410,7 +410,7 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
UNUSED,
UNUSED,
- 1351,
+ 1403,
UNUSED,
UNUSED,
UNUSED,
@@ -419,26 +419,26 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
0,
UNUSED,
0,
- 1399,
+ 1406,
UNUSED,
UNUSED,
70,
- 1257,
+ 1259,
UNUSED,
0,
- UNUSED,
+ 18,
75,
- 1454,
- 1397,
+ 1507,
+ 1404,
UNUSED,
0,
0,
UNUSED,
0,
- 1975,
+ 2029,
0,
UNUSED,
- 1178,
+ 1180,
0,
0,
0,
@@ -446,24 +446,24 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
0,
0,
UNUSED,
- 1498,
- 46,
+ 1501,
+ 47,
UNUSED,
0,
-334,
UNUSED,
- UNUSED,
+ -1802,
0,
UNUSED,
0,
- 808,
+ 810,
UNUSED,
0,
- 1251,
+ 1253,
UNUSED,
96,
UNUSED,
- UNUSED,
+ 0,
-431,
UNUSED,
UNUSED,
@@ -474,53 +474,53 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
272,
0,
0,
- 464,
- -1893,
- 1927,
- -739,
- 847,
- 0,
+ 474,
+ -1900,
+ 1980,
+ -790,
+ 895,
0,
- 1443,
+ 1362,
+ 1450,
UNUSED,
0,
0,
- -356,
+ -357,
UNUSED,
- 321,
+ 322,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- 713,
- 457,
- -913,
- 1001,
- 1897,
+ 714,
+ 458,
+ -914,
+ 1003,
+ 1951,
UNUSED,
0,
26,
- 707,
+ 658,
UNUSED,
- 1335,
+ 1337,
0,
- 1153,
+ 1155,
UNUSED,
UNUSED,
UNUSED,
0,
- 325,
+ 326,
0,
UNUSED,
0,
UNUSED,
0,
- 343,
- 922,
+ 391,
+ 924,
0,
-378,
- 450,
- 806,
+ 451,
+ 3741,
UNUSED,
UNUSED,
UNUSED,
@@ -531,75 +531,75 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
UNUSED,
UNUSED,
- 1162,
- 415,
+ 1164,
+ 416,
UNUSED,
UNUSED,
- -869,
+ -921,
UNUSED,
UNUSED,
UNUSED,
- 1465,
+ 1518,
UNUSED,
- 763,
- 998,
+ 818,
+ 1000,
UNUSED,
- -653,
+ -654,
UNUSED,
UNUSED,
0,
UNUSED,
0,
- 911,
- 2021,
+ 967,
+ 2024,
UNUSED,
UNUSED,
-43,
UNUSED,
UNUSED,
- 629,
- 884,
- 1547,
- 2549,
- 1191,
+ 630,
+ 886,
+ 1600,
+ 2552,
+ 1146,
UNUSED,
0,
UNUSED,
0,
- 205,
+ 206,
UNUSED,
UNUSED,
0,
- 939,
+ 941,
UNUSED,
610,
- 1436,
+ 1443,
UNUSED,
- 1065,
+ 1125,
UNUSED,
0,
- 1258,
- -783,
+ 1260,
+ 2265,
0,
- 526,
+ 527,
UNUSED,
UNUSED,
UNUSED,
0,
- -646,
+ -697,
0,
0,
11,
-124,
- 0,
+ -147,
UNUSED,
0,
UNUSED,
- -37,
- -1627,
+ -39,
+ -1680,
0,
0,
- 604,
+ 605,
UNUSED,
0,
68,
@@ -609,9 +609,9 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
0,
UNUSED,
0,
- -1562,
+ -1569,
0,
- -611,
+ -662,
UNUSED,
0,
UNUSED,
@@ -619,126 +619,126 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
-9,
UNUSED,
- 1798,
- 905,
+ 1801,
+ 907,
UNUSED,
UNUSED,
0,
UNUSED,
- -1141,
+ -1143,
UNUSED,
95,
UNUSED,
UNUSED,
- 1356,
+ 1358,
-260,
UNUSED,
0,
0,
0,
- -1768,
+ -1771,
UNUSED,
- -1003,
+ 1993,
0,
UNUSED,
- 1011,
- 0,
+ 1013,
+ 1270,
0,
- 1686,
+ 1739,
UNUSED,
UNUSED,
0,
- 0,
+ 1311,
UNUSED,
UNUSED,
0,
- 58,
+ 105,
0,
UNUSED,
- 596,
+ 601,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- 2491,
+ 2604,
0,
- 446,
+ 447,
UNUSED,
- 2109,
+ 2163,
UNUSED,
UNUSED,
0,
0,
- 542,
+ 543,
UNUSED,
324,
- 363,
- UNUSED,
+ 3285,
UNUSED,
UNUSED,
+ 0,
UNUSED,
- -879,
- 424,
- 342,
- -1036,
+ -885,
+ 425,
+ 343,
+ 2012,
0,
UNUSED,
UNUSED,
- 1898,
+ 909,
0,
UNUSED,
0,
- 1224,
+ 1226,
0,
0,
UNUSED,
UNUSED,
- 253,
+ 254,
0,
- UNUSED,
- -1809,
+ 1492,
+ -1912,
227,
- 1392,
- -1904,
- 323,
+ 1399,
+ -1958,
+ 324,
UNUSED,
0,
0,
UNUSED,
UNUSED,
- 743,
- -1884,
- -937,
- -197,
- 725,
- 581,
- 1048,
+ 744,
+ 1112,
+ 1975,
+ -201,
+ 726,
+ 582,
+ 1004,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- 1144,
- 910,
+ 1197,
+ 962,
0,
- 1514,
- 722,
+ 1522,
+ 724,
UNUSED,
UNUSED,
- 1384,
+ 1391,
UNUSED,
UNUSED,
- 2295,
+ 2302,
0,
UNUSED,
UNUSED,
UNUSED,
0,
UNUSED,
- -628,
+ -629,
UNUSED,
UNUSED,
UNUSED,
- 2755,
+ 2809,
UNUSED,
UNUSED,
55,
@@ -746,36 +746,36 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
UNUSED,
UNUSED,
- 0,
+ -152,
UNUSED,
UNUSED,
0,
UNUSED,
0,
- 361,
+ 362,
0,
UNUSED,
-316,
UNUSED,
- 1276,
+ 1278,
UNUSED,
- 135,
+ 136,
UNUSED,
9,
- 1503,
+ 1556,
UNUSED,
UNUSED,
- 951,
- 1415,
+ 953,
+ 1422,
UNUSED,
- 418,
+ 423,
UNUSED,
-249,
- -906,
+ -908,
UNUSED,
- 1190,
- 216,
- -279,
+ 1192,
+ 217,
+ -325,
UNUSED,
UNUSED,
UNUSED,
@@ -785,104 +785,104 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
0,
77,
- -148,
+ -194,
UNUSED,
UNUSED,
0,
-20,
UNUSED,
179,
- -588,
+ -691,
UNUSED,
UNUSED,
0,
UNUSED,
- -548,
- 1726,
- 664,
+ -553,
+ 1781,
+ 665,
UNUSED,
UNUSED,
0,
- 402,
+ 403,
-174,
- 1088,
+ 1144,
UNUSED,
53,
- -373,
+ 2675,
175,
- 1410,
+ 1463,
UNUSED,
UNUSED,
- -646,
+ 614,
0,
0,
- 2319,
+ 2332,
UNUSED,
0,
- 1127,
- -196,
- 950,
+ 1183,
+ -200,
+ 998,
-196,
- -358,
+ -359,
UNUSED,
- 1120,
- -676,
+ 1176,
+ 681,
UNUSED,
-17,
UNUSED,
UNUSED,
- 218,
+ 219,
UNUSED,
UNUSED,
- 1200,
- 710,
+ 1467,
+ 715,
UNUSED,
- 807,
- 1262,
+ 809,
+ 1264,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- 1420,
+ 1427,
UNUSED,
UNUSED,
- 1618,
+ 1671,
UNUSED,
- 1193,
+ 1195,
UNUSED,
0,
99,
- 661,
+ 717,
UNUSED,
0,
- -1193,
+ 1719,
0,
UNUSED,
- 783,
+ 834,
UNUSED,
- 221,
- 728,
+ 272,
+ 3783,
UNUSED,
UNUSED,
- 867,
+ 869,
0,
- 520,
- 906,
+ 3544,
+ 908,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- -865,
+ -866,
UNUSED,
- 723,
+ 725,
UNUSED,
- 10,
- 0,
+ 5,
+ 1468,
UNUSED,
- 1817,
- 927,
- 669,
- 816,
+ 1870,
+ 929,
+ 722,
+ 818,
-358,
UNUSED,
UNUSED,
@@ -891,205 +891,205 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
UNUSED,
281,
- 786,
+ 787,
0,
UNUSED,
UNUSED,
UNUSED,
0,
- 857,
+ 864,
UNUSED,
- -1783,
+ -1836,
UNUSED,
- -801,
+ -852,
UNUSED,
0,
- 750,
- 627,
- 484,
+ 751,
+ 3729,
+ 439,
-159,
UNUSED,
- -283,
- 1429,
- UNUSED,
+ -288,
+ 1487,
UNUSED,
UNUSED,
- 1153,
UNUSED,
- 380,
+ 1205,
+ 0,
+ 382,
-375,
- 640,
- 240,
- 1460,
- 674,
- 2889,
- -1085,
+ 641,
+ 241,
+ 1513,
+ 675,
+ 2893,
+ -1092,
UNUSED,
UNUSED,
- 317,
+ 318,
UNUSED,
- 410,
+ 411,
148,
UNUSED,
- 1045,
+ 1047,
UNUSED,
- 556,
+ 557,
UNUSED,
- -530,
+ -531,
UNUSED,
0,
UNUSED,
- 1428,
+ 1435,
UNUSED,
UNUSED,
- 680,
- 854,
- 1952,
+ 681,
+ 856,
+ 2006,
UNUSED,
UNUSED,
- -752,
- 244,
- UNUSED,
+ -754,
+ 245,
UNUSED,
- 1099,
UNUSED,
- 290,
- -558,
- -536,
- -700,
+ 1151,
UNUSED,
+ 291,
+ -559,
+ -535,
+ -705,
UNUSED,
+ 0,
UNUSED,
UNUSED,
- 1515,
+ 1518,
UNUSED,
UNUSED,
- 1577,
+ 1630,
-346,
- 897,
+ 899,
UNUSED,
UNUSED,
45,
- 1076,
+ 1129,
UNUSED,
- -1215,
+ 1696,
0,
- 1004,
- UNUSED,
+ 1006,
UNUSED,
UNUSED,
- -1012,
- 565,
0,
- 251,
+ -1065,
+ 566,
+ 0,
+ 252,
44,
- 199,
+ 200,
81,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
0,
- 371,
+ 370,
0,
UNUSED,
- -988,
- -498,
- -1117,
- -15,
+ -989,
+ -549,
+ -1221,
+ -61,
0,
- 469,
- 1732,
+ 470,
+ 1785,
0,
- 704,
- 308,
+ 706,
+ 309,
UNUSED,
UNUSED,
-407,
- 977,
+ 979,
0,
UNUSED,
- UNUSED,
+ 0,
UNUSED,
0,
0,
- 272,
+ 273,
UNUSED,
- 619,
- -387,
- 833,
+ 620,
+ -440,
+ 835,
UNUSED,
- 276,
- 0,
+ 281,
+ 3164,
UNUSED,
UNUSED,
- 426,
+ 427,
-200,
UNUSED,
- 1010,
+ 1012,
25,
0,
- 1418,
+ 1425,
UNUSED,
- -431,
- 244,
+ -432,
+ 245,
UNUSED,
UNUSED,
- 651,
+ 652,
UNUSED,
- -1161,
+ -1213,
UNUSED,
- 444,
+ 445,
UNUSED,
- 288,
+ 290,
UNUSED,
UNUSED,
UNUSED,
- -457,
+ -508,
UNUSED,
- 563,
+ 564,
0,
UNUSED,
UNUSED,
UNUSED,
- 77,
- -8,
+ 27,
+ -7,
UNUSED,
- 1649,
- 557,
+ 1702,
+ 558,
0,
UNUSED,
0,
UNUSED,
- 489,
+ 490,
UNUSED,
UNUSED,
UNUSED,
- 808,
- -1335,
+ 857,
+ -1336,
199,
- 1404,
- 1118,
- 321,
+ 1411,
+ 1120,
+ 322,
UNUSED,
- 1706,
+ 1761,
UNUSED,
402,
UNUSED,
- 1210,
+ 1217,
UNUSED,
UNUSED,
UNUSED,
- 1600,
+ 1653,
UNUSED,
UNUSED,
0,
UNUSED,
- 1639,
+ 1692,
0,
UNUSED,
UNUSED,
- 1483,
+ 1536,
UNUSED,
UNUSED,
UNUSED,
@@ -1098,30 +1098,30 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
-263,
UNUSED,
-58,
- 1453,
+ 1460,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- 1163,
- -211,
+ 1165,
+ -262,
152,
- -328,
+ -329,
UNUSED,
- 858,
- 729,
+ 913,
+ 731,
168,
+ 1500,
+ 943,
+ 277,
+ -411,
UNUSED,
- 941,
- 276,
- -410,
- UNUSED,
- 2427,
- 740,
+ 2436,
+ 742,
UNUSED,
UNUSED,
UNUSED,
- 668,
+ 673,
UNUSED,
0,
0,
@@ -1129,100 +1129,100 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
-170,
UNUSED,
- 1054,
+ 1056,
UNUSED,
UNUSED,
UNUSED,
- 697,
+ 702,
UNUSED,
UNUSED,
-284,
- 1190,
+ 1242,
414,
UNUSED,
- -30,
- 0,
- 0,
- -731,
+ 3019,
+ 1504,
+ -271,
+ -778,
UNUSED,
UNUSED,
- -471,
+ -472,
UNUSED,
- 834,
+ 836,
-160,
- 474,
+ 475,
UNUSED,
UNUSED,
UNUSED,
- 1119,
- 233,
+ 1121,
+ -2327,
UNUSED,
- 869,
- 1018,
+ 871,
+ 1070,
UNUSED,
0,
- 1123,
+ 1125,
UNUSED,
UNUSED,
UNUSED,
- -2021,
+ -2125,
UNUSED,
- 1054,
+ 1060,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- 1127,
- 1082,
+ 1129,
+ 1084,
0,
- 407,
+ 408,
UNUSED,
- 1628,
- 1135,
- -260,
+ 1681,
+ 1137,
+ -261,
0,
- 510,
+ 511,
UNUSED,
- 1140,
+ 1147,
UNUSED,
- 232,
+ 233,
0,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- 495,
- 1246,
+ 496,
+ 1248,
UNUSED,
0,
UNUSED,
- -494,
+ -495,
UNUSED,
UNUSED,
UNUSED,
- 1117,
+ 1119,
-210,
UNUSED,
UNUSED,
UNUSED,
- -805,
- 2398,
+ 2107,
+ 2401,
UNUSED,
0,
- 164,
- 1435,
+ 161,
+ 1442,
UNUSED,
UNUSED,
UNUSED,
- 702,
+ 704,
UNUSED,
- 477,
- -400,
- 636,
- -1354,
- 1670,
- -676,
- 1249,
+ 478,
+ -401,
+ 637,
+ -1361,
+ 1723,
+ -678,
+ 1297,
UNUSED,
UNUSED,
19,
@@ -1237,165 +1237,165 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
UNUSED,
UNUSED,
- 1917,
+ 1920,
60,
UNUSED,
UNUSED,
UNUSED,
- 367,
+ 368,
UNUSED,
UNUSED,
- 642,
+ 644,
UNUSED,
0,
86,
- 253,
- UNUSED,
+ 254,
UNUSED,
UNUSED,
UNUSED,
- 1346,
- 1390,
UNUSED,
+ 1348,
+ 1397,
UNUSED,
- 747,
UNUSED,
+ 749,
+ 1376,
UNUSED,
- 1519,
+ 1572,
UNUSED,
UNUSED,
395,
- 977,
- 1604,
+ 979,
+ 1657,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- 1536,
- 692,
+ 1538,
+ 694,
UNUSED,
- 53,
- 400,
- 827,
- 614,
+ 52,
+ 401,
+ 829,
+ 615,
UNUSED,
- 327,
- -930,
+ 328,
+ -936,
UNUSED,
UNUSED,
0,
- -1563,
+ 1432,
UNUSED,
UNUSED,
0,
0,
0,
- 1623,
+ 1676,
0,
0,
- 990,
+ 992,
0,
UNUSED,
UNUSED,
- 1719,
- 256,
+ 1774,
+ 258,
UNUSED,
- -112,
+ -117,
UNUSED,
-62,
- 398,
- 949,
- UNUSED,
- 1936,
+ 399,
+ 951,
UNUSED,
+ 1940,
UNUSED,
- 204,
- 235,
UNUSED,
+ 205,
+ 286,
UNUSED,
UNUSED,
- -2549,
- 811,
UNUSED,
- 1098,
- 78,
+ -2558,
+ 817,
UNUSED,
+ 4149,
+ 33,
UNUSED,
UNUSED,
UNUSED,
- 212,
+ 182,
+ 213,
UNUSED,
0,
UNUSED,
UNUSED,
- 1558,
+ 1611,
UNUSED,
- 1725,
- 291,
- -545,
+ 1780,
+ 292,
+ -503,
UNUSED,
- 120,
- 933,
- 1430,
+ -2440,
+ 935,
+ 1437,
UNUSED,
- -937,
- 1230,
- -24,
+ -989,
+ 4165,
+ -74,
-240,
UNUSED,
- 1234,
+ 1286,
UNUSED,
145,
UNUSED,
UNUSED,
+ 1507,
+ 763,
UNUSED,
- 761,
- UNUSED,
- 364,
- 1089,
- 343,
+ 369,
+ 1091,
+ 344,
UNUSED,
- -1613,
- -217,
+ -1668,
+ -222,
UNUSED,
UNUSED,
- 1142,
- 368,
- 1698,
+ 1144,
+ 369,
+ 1751,
UNUSED,
UNUSED,
UNUSED,
- -803,
- 1426,
- 1341,
- 917,
+ -805,
+ 1433,
+ 1343,
+ 919,
UNUSED,
- 1007,
- 1279,
+ 1056,
+ 1281,
-177,
UNUSED,
- 649,
+ 650,
UNUSED,
UNUSED,
UNUSED,
- 1583,
- 1638,
- UNUSED,
- 975,
+ 1636,
+ 1691,
UNUSED,
- 1334,
+ 977,
UNUSED,
- 842,
+ 1336,
UNUSED,
+ 844,
+ 0,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- 1601,
- 0,
- 1971,
+ 1654,
+ 1652,
+ 2024,
UNUSED,
UNUSED,
UNUSED,
@@ -1403,71 +1403,71 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
84,
UNUSED,
UNUSED,
- 484,
- 939,
+ 485,
+ 941,
UNUSED,
- 1566,
+ 1619,
UNUSED,
- 753,
- -934,
- -1642,
- 417,
- -43,
- 887,
- -1918,
+ 755,
+ -985,
+ -1747,
+ 418,
+ 3006,
+ 889,
+ 1077,
UNUSED,
- -619,
+ -624,
-53,
- 163,
+ 214,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- 1507,
- 432,
+ 1560,
+ 433,
UNUSED,
UNUSED,
0,
UNUSED,
- -451,
+ -456,
UNUSED,
0,
UNUSED,
- 1253,
- 1652,
+ 1254,
+ 1702,
UNUSED,
175,
UNUSED,
UNUSED,
- 397,
- 1474,
- 1132,
- 967,
- 487,
+ 3451,
+ 1527,
+ 1130,
+ 969,
+ 534,
UNUSED,
- 1127,
+ 1129,
UNUSED,
UNUSED,
- 1414,
- 901,
+ 1421,
+ 903,
UNUSED,
- 823,
+ 825,
35,
- 633,
+ 634,
UNUSED,
UNUSED,
UNUSED,
- 300,
- 1097,
+ 301,
+ 1098,
UNUSED,
- 2067,
- -517,
+ 2070,
+ -570,
UNUSED,
- 1024,
- 456,
- 582,
+ -16,
+ 457,
+ 583,
UNUSED,
- 1462,
+ 1515,
UNUSED,
UNUSED,
UNUSED,
@@ -1475,264 +1475,264 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
UNUSED,
-550,
- 822,
+ 824,
UNUSED,
- 848,
- 1964,
+ 849,
+ 1967,
UNUSED,
0,
0,
- 1107,
+ 1109,
UNUSED,
- 1544,
+ 1597,
UNUSED,
- -1883,
- -392,
+ 1112,
+ -447,
UNUSED,
- -508,
+ -510,
UNUSED,
UNUSED,
- 947,
- 745,
- 840,
+ 949,
+ 747,
+ 842,
UNUSED,
- -295,
- 1026,
- 1655,
- 1520,
+ -346,
+ 1028,
+ 1712,
+ 1573,
UNUSED,
- 1671,
+ 1724,
UNUSED,
- 1489,
- 340,
+ 1542,
+ 3314,
UNUSED,
- -582,
+ -583,
UNUSED,
58,
UNUSED,
UNUSED,
- 351,
- 836,
- 600,
+ 352,
+ 838,
+ 601,
UNUSED,
- 386,
- -2108,
- 504,
+ 387,
+ 937,
+ 505,
0,
UNUSED,
UNUSED,
126,
- 1095,
+ 1097,
UNUSED,
159,
UNUSED,
UNUSED,
- 1411,
- UNUSED,
+ 1418,
UNUSED,
- 1128,
UNUSED,
- 506,
- 1105,
- 1001,
+ 1130,
+ 1248,
+ 507,
+ 1157,
+ 1003,
UNUSED,
UNUSED,
0,
- 346,
- 1339,
- 865,
+ 297,
+ 1341,
+ 867,
0,
UNUSED,
UNUSED,
- 579,
- 475,
+ 580,
+ 476,
UNUSED,
UNUSED,
278,
UNUSED,
-184,
- 1068,
- 1135,
+ 1070,
+ 1187,
UNUSED,
UNUSED,
- 1542,
+ 1595,
UNUSED,
UNUSED,
0,
UNUSED,
- 838,
- 1625,
- 872,
- 1237,
+ 890,
+ 1678,
+ 874,
+ 1239,
UNUSED,
- 1575,
+ 1628,
21,
UNUSED,
- 626,
- 885,
+ 627,
+ 887,
UNUSED,
UNUSED,
-124,
- 1245,
+ 1247,
0,
28,
+ 292,
UNUSED,
UNUSED,
UNUSED,
+ 1895,
+ 5,
UNUSED,
- 1833,
- -42,
- UNUSED,
- -446,
- 1005,
+ -496,
+ 1007,
UNUSED,
UNUSED,
UNUSED,
- 843,
+ 845,
0,
UNUSED,
UNUSED,
UNUSED,
- 1061,
+ 1063,
118,
- 1033,
- 570,
- 1302,
- 2372,
- 535,
+ 989,
+ 571,
+ 1304,
+ 2427,
+ 536,
UNUSED,
- 813,
+ 815,
UNUSED,
- 581,
- 2070,
+ 582,
+ 2073,
UNUSED,
UNUSED,
- 548,
+ 549,
UNUSED,
UNUSED,
480,
- 1372,
+ 1379,
UNUSED,
0,
- 707,
- UNUSED,
+ 709,
UNUSED,
+ 1498,
UNUSED,
- 384,
- 530,
- 1486,
- -668,
- 2615,
+ 434,
+ 531,
+ 1539,
+ -619,
+ 2719,
UNUSED,
- -278,
+ -329,
UNUSED,
UNUSED,
0,
UNUSED,
- 617,
+ 618,
UNUSED,
56,
UNUSED,
- -112,
+ -62,
UNUSED,
0,
UNUSED,
UNUSED,
- 307,
- -667,
+ 308,
+ -723,
UNUSED,
173,
- 1389,
- 1345,
- 235,
- -559,
+ 1396,
+ 740,
+ 186,
+ -561,
-150,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
-469,
- 749,
- 697,
- 480,
+ 751,
+ 699,
+ 481,
UNUSED,
- 1106,
+ 1108,
UNUSED,
UNUSED,
- 262,
- 645,
- 931,
+ 263,
+ 646,
+ 932,
UNUSED,
UNUSED,
-190,
+ 2100,
+ 1051,
+ 1615,
UNUSED,
- 1049,
- 1562,
- UNUSED,
- -800,
+ -851,
UNUSED,
UNUSED,
UNUSED,
- -562,
+ -613,
0,
-437,
UNUSED,
UNUSED,
- 1017,
+ 1019,
0,
- 928,
- -624,
- -95,
- 180,
- 1691,
- UNUSED,
+ 930,
+ -625,
+ 2953,
+ 135,
+ 702,
UNUSED,
- 538,
UNUSED,
- -640,
- 678,
+ 585,
UNUSED,
- 467,
- 121,
+ -641,
+ 679,
UNUSED,
- -91,
- 700,
+ 468,
+ 122,
UNUSED,
+ -145,
+ 752,
UNUSED,
UNUSED,
+ 1502,
UNUSED,
- 2030,
- 1331,
- 382,
- 849,
- 780,
- 318,
- 1410,
- 1241,
+ 2092,
+ 1333,
+ 383,
+ 851,
+ 782,
+ 319,
+ 1417,
+ 1248,
UNUSED,
UNUSED,
- 565,
+ 566,
UNUSED,
- 1403,
- 208,
- 443,
+ 1410,
+ 209,
+ 444,
UNUSED,
- -572,
- 378,
+ -623,
+ 379,
UNUSED,
UNUSED,
48,
UNUSED,
UNUSED,
- 75,
+ 76,
UNUSED,
UNUSED,
- 240,
- 0,
- -211,
+ 241,
+ 90,
+ 2703,
UNUSED,
UNUSED,
- -176,
+ -177,
UNUSED,
UNUSED,
19,
@@ -1740,123 +1740,123 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
UNUSED,
UNUSED,
- 893,
- 1267,
- -101,
+ 891,
+ 1269,
+ -147,
UNUSED,
UNUSED,
UNUSED,
- 2033,
- 528,
- 296,
- 987,
+ 2088,
+ 529,
+ 297,
+ 989,
UNUSED,
UNUSED,
- -32,
- 335,
+ 19,
+ 336,
UNUSED,
- 1196,
- 1181,
- 940,
+ 1198,
+ 1237,
+ 946,
UNUSED,
UNUSED,
UNUSED,
- 1262,
- 7,
- 1655,
- 1177,
+ 1264,
+ -1488,
+ 1708,
+ 1179,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
-105,
- 1602,
+ 1655,
0,
UNUSED,
- 909,
- UNUSED,
- 263,
+ 911,
+ 1487,
+ 259,
138,
UNUSED,
UNUSED,
- 1481,
- 1263,
+ 1534,
+ 1270,
0,
- UNUSED,
- -437,
- 379,
- 55,
- 1369,
+ 823,
+ -438,
+ 380,
+ 9,
+ 1371,
UNUSED,
UNUSED,
- 211,
+ 212,
UNUSED,
UNUSED,
- -141,
- 880,
+ -192,
+ 882,
UNUSED,
- 1748,
- 1285,
- 864,
+ 1751,
+ 1287,
+ 920,
UNUSED,
UNUSED,
- 823,
+ 825,
UNUSED,
UNUSED,
- 898,
+ 899,
UNUSED,
- 1651,
- 785,
+ 1704,
+ 834,
UNUSED,
UNUSED,
-122,
- 1210,
- 1683,
- -685,
- 391,
- 540,
- 1066,
- 352,
+ 1310,
+ 1736,
+ -738,
+ 392,
+ 541,
+ 1068,
+ 353,
UNUSED,
- 577,
+ 578,
UNUSED,
346,
- 1148,
+ 1150,
UNUSED,
- 862,
+ 813,
UNUSED,
- -2197,
- 1072,
+ -2201,
+ 1123,
UNUSED,
- 855,
- -297,
- 2030,
+ 857,
+ -348,
+ 2084,
UNUSED,
- 55,
+ 56,
-276,
UNUSED,
- 1525,
- 383,
+ 1578,
+ 384,
UNUSED,
UNUSED,
UNUSED,
- 517,
+ 518,
UNUSED,
- 1894,
+ 4829,
UNUSED,
- 953,
+ 955,
UNUSED,
- 269,
+ 270,
UNUSED,
- 1207,
- 247,
- -698,
+ 167,
+ 248,
+ -751,
UNUSED,
UNUSED,
- 713,
- 868,
+ 715,
+ 870,
UNUSED,
- 260,
+ 261,
UNUSED,
UNUSED,
UNUSED,
@@ -1864,208 +1864,208 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
407,
UNUSED,
UNUSED,
- -863,
- 1067,
+ -865,
+ 1069,
0,
- 1136,
- 507,
- 791,
+ 1137,
+ 508,
+ 793,
UNUSED,
- 1669,
+ 1722,
UNUSED,
482,
- 936,
- 1291,
- 1027,
- -56,
+ 938,
+ 1293,
+ 1029,
+ 2993,
UNUSED,
- -352,
+ -358,
UNUSED,
- 461,
- 1002,
- 886,
+ 462,
+ 1004,
+ 888,
UNUSED,
- -410,
+ -411,
UNUSED,
- -956,
+ -1008,
UNUSED,
342,
UNUSED,
UNUSED,
UNUSED,
- 1882,
+ 1944,
UNUSED,
- 1536,
- 768,
- 1036,
- 222,
- UNUSED,
- -1012,
+ 1589,
+ 770,
+ 1038,
+ 223,
UNUSED,
+ 2035,
UNUSED,
- 840,
- 1484,
UNUSED,
- 570,
+ 842,
+ 1537,
UNUSED,
- 1051,
+ 571,
UNUSED,
- 299,
+ 1053,
UNUSED,
+ 300,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- 719,
UNUSED,
- 1340,
- -756,
+ 720,
+ 537,
+ 1342,
+ -807,
UNUSED,
0,
- 740,
- 798,
- UNUSED,
- 723,
+ 741,
+ 804,
UNUSED,
- 1744,
+ 716,
UNUSED,
- 991,
+ 1801,
UNUSED,
+ 993,
UNUSED,
+ 1754,
UNUSED,
- 1176,
- -628,
+ 1178,
+ -679,
UNUSED,
- -1942,
- 1511,
- -473,
- -719,
- 995,
+ 1053,
+ 1564,
+ -524,
+ -770,
+ 997,
UNUSED,
- -353,
+ -403,
UNUSED,
- -112,
+ -117,
UNUSED,
- 758,
- 1515,
+ 3733,
+ 1568,
UNUSED,
UNUSED,
0,
UNUSED,
- 295,
- 722,
- 1260,
+ 153,
+ 678,
+ 1262,
UNUSED,
UNUSED,
- 1234,
+ 1236,
UNUSED,
- 340,
+ 341,
UNUSED,
- 1348,
- 1001,
- 1305,
+ 1351,
+ 1057,
+ 1307,
UNUSED,
- -105,
- 642,
+ -106,
+ 643,
UNUSED,
- 1665,
- 418,
+ 1718,
+ 419,
40,
- 346,
- 625,
- 1843,
- 756,
+ 347,
+ 626,
+ 1897,
+ 758,
UNUSED,
- -902,
+ -953,
UNUSED,
- 125,
- 1228,
+ 176,
+ 1235,
UNUSED,
2,
10,
UNUSED,
- 651,
- -377,
- 1959,
- -929,
+ 652,
+ -428,
+ 2063,
+ 2118,
51,
UNUSED,
UNUSED,
- 1460,
+ 1462,
UNUSED,
UNUSED,
- -600,
+ -602,
UNUSED,
- 847,
+ 849,
UNUSED,
- 904,
+ 956,
UNUSED,
- 1215,
- 1585,
- 331,
+ 1217,
+ 1638,
+ 332,
43,
- 1390,
+ 1446,
388,
- 108,
+ 3157,
-62,
- 1552,
- UNUSED,
+ 1605,
UNUSED,
+ 1470,
141,
46,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- -369,
- 275,
+ -422,
+ 276,
UNUSED,
- 1189,
- -50,
+ 1191,
+ -55,
UNUSED,
- 888,
+ 890,
UNUSED,
- 32,
- -804,
- 929,
+ 29,
+ -856,
+ 931,
UNUSED,
- 338,
+ 339,
22,
-70,
- 249,
+ 254,
UNUSED,
- 1006,
+ 1058,
UNUSED,
UNUSED,
- 51,
+ 52,
-160,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- 654,
- 1212,
+ 655,
+ 1214,
UNUSED,
UNUSED,
UNUSED,
- 861,
+ 863,
UNUSED,
UNUSED,
- -1815,
- 773,
+ -1918,
+ 775,
UNUSED,
UNUSED,
- 332,
- -888,
+ 333,
+ 468,
UNUSED,
- 536,
+ 537,
UNUSED,
- 63,
- 1337,
- 583,
- 1593,
- -1178,
+ 64,
+ 1339,
+ 587,
+ 1646,
+ -1226,
UNUSED,
UNUSED,
};
@@ -2108,18 +2108,18 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
0,
UNUSED,
- 676,
+ 677,
UNUSED,
0,
UNUSED,
0,
0,
UNUSED,
- 311,
+ 362,
0,
UNUSED,
UNUSED,
- 3566,
+ 624,
UNUSED,
UNUSED,
UNUSED,
@@ -2148,12 +2148,12 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
UNUSED,
0,
- -947,
- 651,
+ -998,
+ 653,
0,
UNUSED,
0,
- 3512,
+ 570,
UNUSED,
UNUSED,
UNUSED,
@@ -2162,7 +2162,7 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
0,
UNUSED,
UNUSED,
- 587,
+ 589,
0,
UNUSED,
0,
@@ -2171,7 +2171,7 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
0,
UNUSED,
UNUSED,
- 357,
+ -2741,
UNUSED,
UNUSED,
0,
@@ -2179,27 +2179,27 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
0,
0,
UNUSED,
- -564,
+ -615,
0,
-66,
- 1220,
+ 1222,
UNUSED,
0,
0,
- 1109,
+ 1111,
0,
UNUSED,
UNUSED,
- -1306,
+ -1358,
0,
- 711,
+ 713,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
78,
0,
- -583,
+ -631,
UNUSED,
UNUSED,
0,
@@ -2208,43 +2208,43 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
UNUSED,
UNUSED,
- 2700,
+ 2709,
UNUSED,
UNUSED,
0,
- 223,
- 1609,
+ 224,
+ 1708,
0,
- 696,
- UNUSED,
- 945,
+ 747,
+ 0,
+ 947,
0,
UNUSED,
- -866,
+ -868,
UNUSED,
UNUSED,
UNUSED,
- -740,
+ -742,
0,
UNUSED,
0,
UNUSED,
UNUSED,
- -1250,
- 2207,
+ -1252,
+ -838,
UNUSED,
0,
0,
UNUSED,
UNUSED,
UNUSED,
- 1469,
+ 1522,
UNUSED,
UNUSED,
171,
UNUSED,
0,
- 1545,
+ 1598,
UNUSED,
0,
UNUSED,
@@ -2259,57 +2259,57 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
0,
0,
- 912,
+ 914,
UNUSED,
0,
- 791,
+ 847,
UNUSED,
UNUSED,
0,
- 313,
+ 314,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
0,
- -583,
+ -638,
0,
0,
UNUSED,
UNUSED,
UNUSED,
0,
- 764,
- 430,
- 1254,
+ 811,
+ 431,
+ 1256,
UNUSED,
0,
- 1616,
+ 1618,
UNUSED,
- 1115,
+ 1122,
UNUSED,
- 1077,
+ 1079,
0,
0,
0,
- 2169,
+ -876,
UNUSED,
0,
UNUSED,
0,
UNUSED,
- -174,
- 1501,
- 398,
+ -220,
+ 1554,
+ 444,
UNUSED,
- 2485,
+ 2539,
UNUSED,
310,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- 2227,
+ 2230,
UNUSED,
UNUSED,
0,
@@ -2318,7 +2318,7 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
0,
UNUSED,
- 2886,
+ -57,
0,
0,
0,
@@ -2329,103 +2329,103 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
0,
0,
- 696,
+ 697,
0,
UNUSED,
UNUSED,
UNUSED,
0,
0,
- 2649,
- 449,
- 3468,
+ 2659,
+ 450,
+ 526,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
0,
UNUSED,
- -819,
+ -821,
UNUSED,
UNUSED,
0,
UNUSED,
0,
0,
- 1328,
+ 1376,
UNUSED,
UNUSED,
UNUSED,
0,
- 1463,
+ 1516,
UNUSED,
- -609,
- 1505,
+ -660,
+ 1558,
UNUSED,
UNUSED,
143,
UNUSED,
0,
- 1391,
- 456,
- 516,
+ -1520,
+ 448,
+ 517,
0,
UNUSED,
- UNUSED,
+ 922,
UNUSED,
0,
- 690,
+ 692,
0,
0,
UNUSED,
- 1996,
+ 2045,
UNUSED,
UNUSED,
UNUSED,
- -1024,
+ -1084,
UNUSED,
- 1044,
+ 1046,
UNUSED,
0,
- -1208,
+ -1214,
UNUSED,
- -427,
+ -481,
0,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- 129,
+ 175,
UNUSED,
0,
UNUSED,
- 2511,
- UNUSED,
+ 2566,
UNUSED,
UNUSED,
+ 1496,
UNUSED,
UNUSED,
0,
UNUSED,
- -604,
+ -558,
0,
- 1046,
+ 1048,
-241,
UNUSED,
UNUSED,
- 1723,
+ 1778,
UNUSED,
UNUSED,
0,
UNUSED,
- 1026,
+ -2021,
UNUSED,
UNUSED,
- -761,
+ -767,
0,
- 343,
- 383,
+ 340,
+ 384,
124,
0,
UNUSED,
@@ -2434,19 +2434,19 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
0,
UNUSED,
UNUSED,
- 419,
- 1101,
- 0,
+ 420,
+ 1103,
+ -2933,
0,
- 2578,
+ -416,
UNUSED,
- 2532,
+ -462,
0,
UNUSED,
0,
421,
- 1437,
- UNUSED,
+ 1444,
+ 0,
0,
UNUSED,
UNUSED,
@@ -2454,84 +2454,84 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
UNUSED,
UNUSED,
- 311,
+ 312,
UNUSED,
UNUSED,
- 365,
+ 366,
UNUSED,
-200,
0,
0,
- UNUSED,
- 1133,
- -656,
- 1001,
- 182,
+ 0,
+ 1135,
+ -711,
+ 1002,
+ 183,
UNUSED,
0,
0,
- 3226,
+ 3282,
UNUSED,
- 1183,
+ 1185,
UNUSED,
UNUSED,
- 725,
+ 727,
0,
UNUSED,
0,
0,
- 2367,
+ 2371,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
0,
UNUSED,
- 655,
- 1700,
+ 706,
+ 1755,
0,
UNUSED,
- 428,
+ 379,
38,
UNUSED,
0,
- -572,
+ -573,
UNUSED,
UNUSED,
- 408,
+ 362,
UNUSED,
0,
- 1534,
+ 1587,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
217,
- 2339,
- UNUSED,
+ 2348,
+ 2463,
0,
UNUSED,
0,
- 1728,
+ 1781,
0,
- 2254,
+ 2309,
0,
- -718,
+ -768,
240,
UNUSED,
UNUSED,
UNUSED,
- 1424,
+ 1431,
UNUSED,
UNUSED,
0,
- 1724,
- 239,
+ 1779,
+ 244,
UNUSED,
UNUSED,
UNUSED,
- 429,
+ -2543,
UNUSED,
UNUSED,
UNUSED,
@@ -2541,88 +2541,88 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
0,
UNUSED,
- 3305,
+ 3463,
UNUSED,
0,
0,
0,
- 1637,
- 2131,
+ 1644,
+ 2140,
0,
- 1131,
+ 1134,
UNUSED,
-234,
0,
0,
- UNUSED,
0,
- -826,
- 924,
+ 0,
+ -878,
+ -1998,
UNUSED,
UNUSED,
- 1429,
- 800,
+ 1482,
+ 802,
0,
0,
UNUSED,
- -180,
- 2627,
- 2013,
+ -181,
+ 2732,
+ 2119,
UNUSED,
- 991,
+ 993,
-177,
-122,
0,
UNUSED,
- 105,
- 481,
+ 59,
+ -2567,
0,
- 1707,
+ 1762,
UNUSED,
760,
UNUSED,
UNUSED,
UNUSED,
- 509,
- UNUSED,
+ 510,
UNUSED,
UNUSED,
+ 0,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- 1015,
+ 1067,
164,
UNUSED,
0,
- -87,
- 224,
- UNUSED,
- 27,
- -313,
+ -138,
+ 225,
UNUSED,
+ 26,
+ -314,
+ 0,
0,
0,
UNUSED,
UNUSED,
0,
- -170,
- 2717,
- -966,
+ -221,
+ 2768,
+ -1018,
UNUSED,
- 3155,
- 0,
+ 3261,
+ -265,
UNUSED,
0,
- 688,
+ 689,
0,
0,
UNUSED,
-103,
- 1378,
+ 1431,
UNUSED,
UNUSED,
- 1020,
+ 1022,
UNUSED,
0,
UNUSED,
@@ -2631,7 +2631,7 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
0,
UNUSED,
- 984,
+ 986,
0,
UNUSED,
UNUSED,
@@ -2639,291 +2639,291 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
0,
0,
UNUSED,
- 2159,
+ -751,
0,
- 762,
+ 764,
UNUSED,
0,
- 907,
+ 959,
UNUSED,
UNUSED,
- 878,
+ 885,
UNUSED,
- -1000,
- 320,
- -462,
- -572,
+ -1060,
+ 321,
+ -518,
+ -573,
UNUSED,
- 0,
+ 1042,
-361,
- 75,
+ 80,
0,
UNUSED,
- 1219,
- 880,
+ 1272,
+ 931,
UNUSED,
UNUSED,
0,
UNUSED,
UNUSED,
- 421,
+ 476,
UNUSED,
- 1186,
- -1640,
+ 1188,
+ -1646,
0,
UNUSED,
0,
UNUSED,
0,
UNUSED,
- 1621,
- 2067,
+ 1674,
+ 2120,
0,
UNUSED,
-176,
-172,
UNUSED,
UNUSED,
- UNUSED,
+ 0,
UNUSED,
UNUSED,
0,
UNUSED,
- 1885,
+ 1938,
0,
UNUSED,
0,
UNUSED,
0,
UNUSED,
- 903,
- 404,
+ 905,
+ 405,
0,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- 187,
- 132,
+ 186,
+ 133,
0,
UNUSED,
- 1606,
+ 1659,
0,
- 1321,
+ 1323,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- -62,
- 1374,
+ -58,
+ 1431,
UNUSED,
- 851,
- 725,
+ 853,
+ 730,
0,
UNUSED,
UNUSED,
- 1086,
+ 1088,
UNUSED,
163,
UNUSED,
- 623,
- 969,
+ 675,
+ 1021,
UNUSED,
UNUSED,
UNUSED,
- 1620,
- 559,
+ 1673,
+ 561,
UNUSED,
0,
UNUSED,
UNUSED,
- -1003,
- 1408,
+ -1055,
+ 1415,
UNUSED,
- 245,
+ 246,
0,
UNUSED,
UNUSED,
- 1506,
+ 1559,
0,
- 1288,
+ 1289,
UNUSED,
UNUSED,
- 641,
+ 642,
UNUSED,
UNUSED,
UNUSED,
- 403,
- -529,
- -360,
- -1228,
+ 404,
+ -3462,
+ -410,
+ -1230,
UNUSED,
UNUSED,
0,
- -893,
- 1373,
+ -894,
+ 1380,
0,
- 659,
+ 710,
UNUSED,
- 999,
- 1225,
+ 1001,
+ 1227,
UNUSED,
177,
- 1357,
- 52,
+ 1359,
+ 3,
UNUSED,
- -263,
+ -272,
UNUSED,
0,
0,
108,
UNUSED,
- 1560,
- -1044,
+ 1613,
+ -1045,
UNUSED,
- -766,
+ -768,
UNUSED,
23,
UNUSED,
UNUSED,
UNUSED,
+ 607,
0,
- 0,
- 797,
+ 798,
0,
UNUSED,
- 1050,
+ 1056,
UNUSED,
UNUSED,
UNUSED,
- 1355,
- -215,
- -27,
+ 1357,
+ -214,
+ -78,
UNUSED,
UNUSED,
- 739,
+ 741,
UNUSED,
- -509,
+ -511,
UNUSED,
- 864,
+ 866,
UNUSED,
UNUSED,
- 1141,
- 941,
+ 1143,
+ 942,
0,
UNUSED,
UNUSED,
0,
0,
- 1257,
- -58,
- 1151,
+ 1259,
+ -63,
+ 1153,
0,
37,
UNUSED,
UNUSED,
UNUSED,
- 1383,
+ 1390,
0,
- 1110,
+ 1112,
225,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- 552,
- 799,
- 189,
- 455,
+ 553,
+ 801,
+ 190,
+ 456,
UNUSED,
- -1351,
- -256,
- 84,
- 564,
+ -1412,
+ -3279,
+ 85,
+ 565,
UNUSED,
UNUSED,
UNUSED,
0,
- 494,
+ 495,
UNUSED,
UNUSED,
- 154,
+ 155,
UNUSED,
- 355,
+ 356,
0,
UNUSED,
- 355,
+ 309,
0,
- 1718,
- 1182,
- 484,
+ 1773,
+ 1184,
+ 539,
UNUSED,
UNUSED,
0,
0,
UNUSED,
UNUSED,
- 598,
+ 599,
UNUSED,
0,
- 550,
+ 551,
UNUSED,
0,
UNUSED,
72,
UNUSED,
UNUSED,
- 933,
+ 934,
0,
- 1609,
+ 1662,
184,
- 1158,
+ 1160,
10,
UNUSED,
UNUSED,
- 471,
+ 472,
UNUSED,
UNUSED,
UNUSED,
0,
- 208,
+ -2841,
460,
- 1508,
- 1800,
- 637,
- 237,
+ 1561,
+ 1808,
+ 638,
+ 238,
-105,
0,
UNUSED,
UNUSED,
0,
- 385,
+ 386,
UNUSED,
0,
0,
UNUSED,
- 541,
- -921,
+ 592,
+ -927,
18,
UNUSED,
UNUSED,
0,
- 148,
+ 199,
0,
- 293,
- 273,
+ 294,
+ 274,
UNUSED,
UNUSED,
- 672,
+ 673,
351,
UNUSED,
0,
-311,
UNUSED,
- 262,
+ -2787,
0,
- -565,
+ -567,
0,
UNUSED,
UNUSED,
@@ -2931,55 +2931,55 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
UNUSED,
UNUSED,
- 994,
- 824,
- UNUSED,
- 476,
+ 996,
+ 826,
+ 0,
+ 477,
UNUSED,
UNUSED,
- 523,
+ 524,
UNUSED,
UNUSED,
0,
UNUSED,
- 505,
- 1391,
+ 506,
+ 1398,
UNUSED,
UNUSED,
0,
- 730,
+ 778,
UNUSED,
78,
UNUSED,
- 997,
+ 999,
0,
0,
- 605,
- 459,
+ 606,
+ 460,
UNUSED,
- 1534,
+ 1587,
-15,
0,
- 804,
+ 806,
UNUSED,
UNUSED,
- 488,
+ 489,
140,
- 484,
- UNUSED,
+ 485,
+ 1239,
0,
UNUSED,
-344,
0,
UNUSED,
- -611,
+ -612,
UNUSED,
- 464,
+ 465,
UNUSED,
UNUSED,
- -607,
- 220,
- 824,
+ -608,
+ 221,
+ 825,
UNUSED,
0,
0,
@@ -2991,332 +2991,332 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
UNUSED,
UNUSED,
- 1617,
+ 1670,
UNUSED,
UNUSED,
134,
UNUSED,
- -308,
- 515,
+ -313,
+ 512,
0,
-596,
UNUSED,
- 485,
- 1197,
+ 486,
+ 1199,
UNUSED,
- 390,
- 760,
+ 391,
+ 711,
0,
UNUSED,
UNUSED,
- UNUSED,
+ 38,
UNUSED,
58,
UNUSED,
- 1063,
- 1198,
- 1517,
+ 1065,
+ 1200,
+ 1519,
132,
52,
- 2005,
- 790,
+ 2059,
+ 792,
UNUSED,
UNUSED,
- 1487,
+ 1489,
UNUSED,
0,
- 533,
- UNUSED,
+ 534,
UNUSED,
- 700,
+ 0,
+ 702,
UNUSED,
UNUSED,
0,
- 753,
- 1253,
+ 754,
+ 1255,
UNUSED,
- 1649,
+ 1704,
UNUSED,
UNUSED,
- 605,
+ 561,
0,
- 635,
+ 636,
UNUSED,
- 341,
+ -2759,
0,
128,
0,
- 278,
+ 279,
UNUSED,
- 1753,
+ -1241,
0,
- 1047,
- 1991,
+ 1049,
+ 2046,
UNUSED,
UNUSED,
- 424,
+ 475,
UNUSED,
UNUSED,
UNUSED,
- 1370,
+ 1377,
UNUSED,
0,
UNUSED,
UNUSED,
39,
UNUSED,
- 1239,
- 301,
+ 1241,
+ 302,
0,
- 1223,
- 1532,
- -729,
+ -1824,
+ 1585,
+ -730,
UNUSED,
UNUSED,
UNUSED,
- -767,
- 520,
+ -768,
+ 521,
-124,
- -129,
+ -175,
UNUSED,
0,
0,
UNUSED,
- -588,
- 358,
- -1198,
+ -589,
+ 359,
+ -1199,
UNUSED,
UNUSED,
UNUSED,
- 703,
- 1509,
+ 706,
+ 1562,
UNUSED,
UNUSED,
- -525,
- 1671,
+ -526,
+ 1673,
UNUSED,
- 1599,
+ 1652,
UNUSED,
0,
UNUSED,
- 477,
- 1659,
+ 478,
+ 1712,
0,
UNUSED,
- 680,
+ 681,
UNUSED,
94,
UNUSED,
- 1704,
+ 1759,
UNUSED,
UNUSED,
UNUSED,
- -623,
- UNUSED,
- 1327,
+ -624,
UNUSED,
+ 1330,
UNUSED,
UNUSED,
- 1425,
UNUSED,
- 777,
- 1569,
+ 1432,
UNUSED,
- 630,
+ 778,
+ 1575,
UNUSED,
- -139,
- 1122,
+ 631,
+ 1481,
+ -144,
+ 1271,
0,
UNUSED,
- 774,
+ 776,
-102,
- 231,
- 1495,
- 486,
+ 232,
+ 1548,
+ 487,
-300,
217,
- 1028,
- 1175,
- 825,
- 565,
- 1115,
- -1380,
+ 1030,
+ 1177,
+ 830,
+ 566,
+ 1117,
+ -1432,
UNUSED,
- 703,
- 1193,
- 1677,
+ 705,
+ 1195,
+ 1730,
UNUSED,
- 1474,
+ 1527,
442,
UNUSED,
- 329,
- 2551,
- 1107,
- 1246,
- 1695,
+ 330,
+ 2656,
+ -161,
+ 1249,
+ 1748,
UNUSED,
- 737,
+ 739,
UNUSED,
- 1713,
+ 1766,
0,
UNUSED,
UNUSED,
226,
- UNUSED,
+ 516,
-330,
- 1080,
+ 1082,
UNUSED,
- 1523,
+ 1576,
0,
UNUSED,
- 1471,
+ 1524,
-188,
- 1541,
- 894,
- 1104,
+ 1594,
+ 896,
+ 1106,
UNUSED,
- 1661,
+ 1714,
UNUSED,
UNUSED,
- 706,
+ 708,
0,
UNUSED,
- UNUSED,
+ 935,
0,
UNUSED,
UNUSED,
UNUSED,
- 2944,
- 593,
- 742,
+ 3051,
+ 594,
+ 744,
0,
UNUSED,
UNUSED,
-844,
18,
UNUSED,
- 892,
+ 894,
UNUSED,
UNUSED,
- 995,
- -934,
- -307,
+ 1049,
+ -935,
+ -308,
UNUSED,
- -232,
+ 810,
-383,
- 835,
+ 837,
UNUSED,
UNUSED,
+ 1299,
+ 1546,
UNUSED,
- 1493,
- UNUSED,
- 576,
+ 623,
UNUSED,
- 1533,
+ 1586,
UNUSED,
UNUSED,
- 1309,
- 1199,
- -523,
+ 1311,
+ 1201,
+ -524,
UNUSED,
UNUSED,
- 491,
+ 542,
UNUSED,
- 669,
- 1708,
+ 670,
+ 1763,
UNUSED,
- 1307,
- -962,
+ 1309,
+ -1013,
UNUSED,
UNUSED,
UNUSED,
- -1236,
- 1013,
- 410,
+ -1288,
+ 1015,
+ 461,
179,
0,
- -98,
+ -94,
UNUSED,
181,
0,
- 1559,
+ 301,
UNUSED,
- -394,
- 2480,
+ -349,
+ 2589,
UNUSED,
- 232,
- 1111,
+ 233,
+ 1384,
107,
- 853,
- 1557,
+ 904,
+ 1560,
0,
UNUSED,
UNUSED,
- 753,
+ -2294,
UNUSED,
UNUSED,
UNUSED,
49,
0,
- 1395,
+ 1447,
UNUSED,
- 1385,
+ 1392,
UNUSED,
- -362,
- -1345,
+ -363,
+ -1347,
UNUSED,
- 983,
+ 989,
UNUSED,
- 1711,
- -574,
- 797,
- 1199,
+ 1766,
+ -629,
+ 799,
+ 1252,
UNUSED,
- 537,
+ 538,
0,
-234,
UNUSED,
UNUSED,
- 1231,
+ 1233,
UNUSED,
317,
- 1492,
- 566,
- -1161,
- 929,
- -726,
- 1593,
+ 1545,
+ 567,
+ -1213,
+ 927,
+ -727,
+ 1595,
UNUSED,
UNUSED,
-438,
-12,
UNUSED,
- 718,
- 965,
- 1412,
- -1544,
- 1089,
+ 720,
+ 1017,
+ 1419,
+ -1596,
+ -1958,
0,
UNUSED,
UNUSED,
- 1103,
- 687,
+ 1105,
+ 734,
UNUSED,
UNUSED,
89,
- 1646,
+ 1699,
UNUSED,
- 1033,
+ 1034,
UNUSED,
- 405,
+ 406,
UNUSED,
UNUSED,
- 1052,
- 57,
- 1766,
- 667,
- 1543,
- 1713,
+ -414,
+ 56,
+ 1871,
+ 664,
+ 1596,
+ 1818,
UNUSED,
UNUSED,
UNUSED,
@@ -3326,235 +3326,235 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
59,
15,
UNUSED,
- 559,
- 179,
- 1452,
+ 560,
+ -2843,
+ 1459,
-78,
- 1159,
- 729,
+ 1161,
+ 772,
0,
UNUSED,
- 348,
- 1590,
- 390,
+ 349,
+ 1643,
+ 391,
UNUSED,
UNUSED,
- 396,
+ 397,
UNUSED,
- 1516,
- 365,
+ 1569,
+ 366,
UNUSED,
- 1676,
+ 1729,
UNUSED,
- 206,
- 1587,
+ 207,
+ 1640,
0,
0,
UNUSED,
24,
UNUSED,
- 219,
- 1236,
+ 220,
+ 1288,
UNUSED,
- 412,
- 1204,
+ 413,
+ -1843,
UNUSED,
- 902,
- 916,
- 280,
- -1474,
+ 904,
+ 918,
+ 281,
+ -1527,
UNUSED,
UNUSED,
163,
UNUSED,
UNUSED,
0,
- 1584,
+ 1642,
UNUSED,
- 1591,
- 1396,
- 1342,
- 448,
- 590,
+ 1644,
+ 41,
+ 1344,
+ 449,
+ 591,
UNUSED,
- 1083,
+ 1085,
UNUSED,
UNUSED,
- 1491,
- 401,
+ 1493,
+ 402,
UNUSED,
- 912,
+ 914,
UNUSED,
230,
UNUSED,
- -609,
- -506,
- 1059,
+ -615,
+ -561,
+ 1061,
UNUSED,
- 942,
- 1490,
+ 944,
+ 1543,
79,
- 521,
- 1073,
- 393,
+ 522,
+ 1075,
+ 394,
UNUSED,
UNUSED,
0,
UNUSED,
0,
- 1221,
+ 1223,
UNUSED,
UNUSED,
- -906,
- 1930,
- 1693,
+ -912,
+ 2036,
+ 1746,
UNUSED,
- 1530,
- 700,
- 1672,
- 344,
+ 1583,
+ -2462,
+ 1725,
+ 345,
UNUSED,
UNUSED,
UNUSED,
- 1356,
+ 1407,
UNUSED,
0,
UNUSED,
- UNUSED,
+ 1508,
0,
UNUSED,
25,
- 0,
+ 1495,
UNUSED,
- 771,
+ 772,
UNUSED,
- 371,
+ 424,
UNUSED,
- 252,
- 436,
+ 253,
+ 437,
UNUSED,
- -511,
+ -559,
UNUSED,
- 875,
- -740,
+ 876,
+ -741,
UNUSED,
0,
- 1596,
- 1077,
- 1203,
- 1572,
+ 1649,
+ -389,
+ 1205,
+ 1574,
UNUSED,
- 1656,
- 374,
+ 1709,
+ 375,
27,
- 1684,
- 493,
- 192,
- 1144,
- 1246,
+ 1737,
+ 494,
+ 2753,
+ 1146,
+ -1801,
0,
- 1518,
- 1702,
- UNUSED,
+ 1571,
+ 1757,
UNUSED,
UNUSED,
+ 1237,
0,
- 1233,
+ 1239,
UNUSED,
155,
UNUSED,
- 1104,
+ 1156,
UNUSED,
UNUSED,
- 462,
- 1300,
+ -1189,
+ 1302,
UNUSED,
- -182,
+ -40,
UNUSED,
UNUSED,
0,
UNUSED,
- 1255,
- UNUSED,
+ 1262,
UNUSED,
- 229,
- 268,
UNUSED,
+ 230,
+ 269,
+ 1479,
UNUSED,
- 1092,
- 2267,
+ 1094,
+ 2271,
-23,
- 1117,
+ 1119,
0,
UNUSED,
UNUSED,
- -464,
+ -465,
384,
- 1475,
- UNUSED,
+ 1528,
UNUSED,
- -1237,
UNUSED,
- 1128,
+ -1244,
UNUSED,
+ 1180,
UNUSED,
- 938,
- -1474,
- 932,
- 1325,
- 876,
- 820,
UNUSED,
+ 939,
+ -1527,
+ 984,
+ 1327,
+ 878,
+ 822,
UNUSED,
UNUSED,
UNUSED,
- 1065,
UNUSED,
+ 1067,
UNUSED,
UNUSED,
- 1303,
UNUSED,
+ 1469,
+ 1473,
UNUSED,
- 445,
+ 446,
UNUSED,
- 1223,
+ -1689,
UNUSED,
UNUSED,
UNUSED,
- -38,
- -870,
+ -43,
+ -871,
UNUSED,
-129,
- 1519,
+ 1572,
UNUSED,
0,
-30,
UNUSED,
69,
- -858,
- 940,
- 163,
- UNUSED,
- 980,
+ -860,
+ 942,
+ 113,
+ 876,
+ 1032,
60,
UNUSED,
- 548,
- -707,
- UNUSED,
+ 549,
+ -709,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
+ 220,
UNUSED,
UNUSED,
- 432,
+ 483,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- 1235,
+ 1287,
UNUSED,
109,
UNUSED,
@@ -3569,127 +3569,127 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
161,
421,
UNUSED,
- 1595,
+ 1648,
UNUSED,
- 465,
+ 466,
UNUSED,
UNUSED,
23,
- 1557,
- 1491,
+ 1660,
+ 1544,
89,
- -427,
+ -428,
0,
UNUSED,
UNUSED,
UNUSED,
- 2101,
+ 2209,
UNUSED,
UNUSED,
0,
UNUSED,
+ 1464,
+ -180,
+ -1796,
+ -528,
+ 1131,
+ -657,
+ -2797,
+ 916,
UNUSED,
- -129,
- -1793,
- -527,
- 1129,
- -606,
- 176,
- 865,
- UNUSED,
- 483,
- -173,
- 629,
+ 484,
+ -179,
+ 630,
UNUSED,
- 965,
- 439,
+ 967,
+ 440,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- 1525,
+ 1578,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- 667,
- 293,
+ -2381,
+ 339,
0,
- 555,
+ 556,
0,
- 1588,
- 2433,
+ 1641,
+ 2438,
UNUSED,
UNUSED,
- 298,
+ 299,
0,
- 2436,
+ 2541,
UNUSED,
UNUSED,
- -1099,
+ -1101,
UNUSED,
UNUSED,
- 304,
+ 257,
UNUSED,
- 856,
- 962,
+ 858,
+ 964,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- 205,
+ 206,
UNUSED,
- 726,
- -1166,
- 1218,
+ 777,
+ -1173,
+ 1220,
UNUSED,
57,
- 454,
- -40,
+ 455,
+ -41,
UNUSED,
UNUSED,
- -666,
+ -667,
UNUSED,
- 1316,
+ 1276,
382,
UNUSED,
UNUSED,
- 416,
- UNUSED,
+ 417,
UNUSED,
- 1478,
- 859,
- 573,
- -1049,
UNUSED,
- 988,
- 946,
+ 1531,
+ 861,
+ 620,
+ -1101,
+ 1690,
+ 990,
+ 948,
67,
- 732,
- 726,
+ -2315,
+ 3288,
-191,
- 260,
- 1512,
- 1266,
+ -1243,
+ 1565,
+ 1320,
79,
- 239,
+ 392,
UNUSED,
UNUSED,
- 729,
- 1088,
- 1024,
- -600,
- -819,
- 481,
+ 731,
+ 1094,
+ 975,
+ -601,
+ -871,
+ 482,
UNUSED,
UNUSED,
- 1192,
+ 1194,
0,
UNUSED,
UNUSED,
0,
- -658,
+ -659,
UNUSED,
116,
UNUSED,
@@ -3697,199 +3697,198 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
13,
122,
- 1177,
- UNUSED,
+ 1179,
UNUSED,
UNUSED,
+ 1505,
UNUSED,
137,
0,
UNUSED,
UNUSED,
UNUSED,
- 251,
+ 297,
UNUSED,
UNUSED,
UNUSED,
94,
- 1455,
+ 1462,
UNUSED,
UNUSED,
UNUSED,
- 1891,
+ 1895,
UNUSED,
- 1312,
- UNUSED,
- 1367,
- 716,
- 1633,
- 346,
- 1431,
+ 1365,
UNUSED,
+ 1374,
+ 718,
+ 1686,
+ 299,
+ 1438,
UNUSED,
+ 3333,
UNUSED,
UNUSED,
UNUSED,
- 406,
- 783,
+ 407,
+ 785,
146,
- -1098,
+ -1150,
147,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
- 2206,
- 303,
- 963,
- 1026,
- 33,
- UNUSED,
- 1506,
+ 2215,
+ 304,
+ -1957,
+ 1032,
+ 37,
UNUSED,
+ 1559,
UNUSED,
- 2361,
+ 633,
+ 2467,
UNUSED,
- -821,
- -748,
- -750,
- 1133,
+ -822,
+ -749,
+ -752,
+ 1135,
UNUSED,
UNUSED,
- 802,
+ 804,
25,
UNUSED,
- 682,
- UNUSED,
- 1081,
- 380,
+ 683,
UNUSED,
+ -274,
+ 381,
+ 1482,
UNUSED,
- 833,
+ 836,
UNUSED,
- 461,
- 288,
+ 462,
+ 289,
UNUSED,
UNUSED,
UNUSED,
- 213,
- 825,
- 1604,
- 1445,
- 585,
+ 214,
+ 826,
+ 1657,
+ 1452,
+ 586,
UNUSED,
- -380,
- 1642,
+ -335,
+ 1695,
UNUSED,
UNUSED,
- 1690,
+ 1694,
UNUSED,
- 1304,
+ 1306,
UNUSED,
UNUSED,
81,
UNUSED,
UNUSED,
UNUSED,
- 479,
+ 480,
UNUSED,
- -364,
- 634,
+ -417,
+ 685,
UNUSED,
- 1827,
+ 1831,
UNUSED,
- 3175,
- 786,
- -302,
+ 182,
+ 788,
+ -303,
UNUSED,
UNUSED,
- 839,
- 1079,
- 806,
+ 841,
+ 1081,
+ 857,
139,
- 1350,
+ 1352,
UNUSED,
- 797,
+ 798,
UNUSED,
- 183,
- 396,
+ 184,
+ 397,
UNUSED,
UNUSED,
UNUSED,
- 322,
- 356,
- 705,
- 195,
- 1625,
+ 233,
+ 357,
+ 707,
+ 196,
+ 1678,
UNUSED,
UNUSED,
- 284,
+ 288,
UNUSED,
UNUSED,
UNUSED,
- 717,
- 741,
+ 719,
+ 743,
0,
- 1537,
- 575,
- 400,
- 925,
- 1042,
- 1419,
+ 1590,
+ 576,
+ 451,
+ 927,
+ 1044,
+ 1426,
UNUSED,
- -260,
- 683,
- 1137,
- 1229,
- 919,
- 1021,
+ -3234,
+ 684,
+ 1139,
+ 1232,
+ 921,
+ 1023,
UNUSED,
- 1712,
+ 1767,
0,
- 1272,
- UNUSED,
- -896,
+ 1274,
+ -124,
+ -898,
0,
- 695,
- 1338,
+ 697,
+ 1340,
UNUSED,
UNUSED,
- 286,
+ 287,
UNUSED,
UNUSED,
UNUSED,
- 1479,
+ 1532,
UNUSED,
158,
UNUSED,
- 1979,
- 119,
+ 2042,
+ 116,
UNUSED,
- 1093,
+ 1095,
UNUSED,
-25,
- 3335,
- 576,
+ 393,
+ 577,
UNUSED,
-249,
- 1549,
- 114,
- 485,
- -349,
+ 1602,
+ 115,
+ 494,
+ -400,
UNUSED,
- 413,
+ 414,
UNUSED,
- -218,
- -568,
- 221,
+ -219,
+ -569,
+ 222,
228,
- 1554,
- -1243,
+ 1607,
+ -1295,
UNUSED,
0,
- 1548,
- 1727,
- UNUSED,
+ 1601,
+ 1782,
UNUSED,
UNUSED,
UNUSED,
@@ -3897,207 +3896,208 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
UNUSED,
UNUSED,
+ 487,
UNUSED,
- -95,
+ -96,
UNUSED,
UNUSED,
4,
- 548,
+ 552,
UNUSED,
UNUSED,
0,
- 1634,
- 225,
+ 1687,
+ 176,
UNUSED,
UNUSED,
- 525,
+ 526,
UNUSED,
- 596,
- -987,
+ 597,
+ -988,
130,
- 489,
- 921,
+ 540,
+ 922,
UNUSED,
- 1585,
+ 1643,
UNUSED,
UNUSED,
- -735,
+ -786,
UNUSED,
- 1640,
+ 1693,
UNUSED,
UNUSED,
- -880,
+ -882,
UNUSED,
UNUSED,
UNUSED,
- 940,
- -864,
+ 947,
+ -916,
UNUSED,
- -634,
+ -635,
UNUSED,
UNUSED,
- 326,
- 748,
+ 327,
+ 750,
UNUSED,
- 591,
+ 592,
UNUSED,
- 781,
- 532,
+ 783,
+ 533,
119,
UNUSED,
- -379,
- UNUSED,
- 3560,
- 1094,
+ -380,
+ 670,
+ 3566,
+ 1096,
UNUSED,
UNUSED,
UNUSED,
UNUSED,
42,
UNUSED,
- 976,
- 848,
+ 978,
+ 850,
UNUSED,
- 234,
+ 235,
UNUSED,
UNUSED,
UNUSED,
- 545,
+ -2503,
UNUSED,
- -685,
+ -736,
UNUSED,
- 287,
- 3070,
+ 288,
+ 3175,
UNUSED,
- 60,
- 1477,
- -923,
- -1232,
+ 56,
+ 1530,
+ -975,
+ -1239,
UNUSED,
UNUSED,
UNUSED,
- 1130,
- 681,
+ 1132,
+ 682,
UNUSED,
- -962,
+ -1016,
-40,
UNUSED,
UNUSED,
- 281,
- 1529,
+ 282,
+ 1582,
UNUSED,
- -1057,
- -582,
- 1429,
+ -1058,
+ -633,
+ 1436,
UNUSED,
UNUSED,
- 959,
+ 961,
UNUSED,
- -1874,
- -267,
+ -1876,
+ -3366,
UNUSED,
- 1070,
+ 1073,
UNUSED,
- -1360,
+ -1414,
UNUSED,
- 1298,
- 622,
+ 1300,
+ 623,
UNUSED,
UNUSED,
- 534,
- 1455,
- 549,
+ 535,
+ 1457,
+ 550,
UNUSED,
UNUSED,
- 1308,
+ 1310,
UNUSED,
- -749,
- 295,
- 201,
+ -800,
+ 296,
+ 202,
UNUSED,
UNUSED,
- 624,
+ 675,
UNUSED,
- 979,
- 689,
- 1141,
+ 981,
+ 691,
+ 1143,
UNUSED,
- 914,
+ -2133,
UNUSED,
- 1113,
+ 1115,
UNUSED,
- 910,
- 148,
- 302,
- 1058,
- 219,
- 437,
+ -2061,
+ 194,
+ 303,
+ 1060,
+ 220,
+ 438,
UNUSED,
UNUSED,
- 860,
- -574,
- 5,
- 1248,
+ 862,
+ -626,
+ 2565,
+ 3810,
UNUSED,
UNUSED,
- 1614,
+ 1667,
UNUSED,
- 2660,
+ 2669,
UNUSED,
- 1386,
- -171,
- 665,
- 758,
+ 1393,
+ -217,
+ 666,
+ 760,
UNUSED,
305,
- 1161,
+ 1214,
UNUSED,
- 666,
- 798,
+ 667,
+ 800,
UNUSED,
89,
- 498,
+ 549,
UNUSED,
- 1250,
- 1611,
+ 1252,
+ 1664,
UNUSED,
UNUSED,
-168,
UNUSED,
- -1259,
+ -1261,
UNUSED,
- 1264,
- 935,
+ 1266,
+ 937,
UNUSED,
UNUSED,
- 672,
- -1534,
+ 673,
+ -1587,
UNUSED,
63,
UNUSED,
+ 368,
+ 122,
UNUSED,
- 72,
- UNUSED,
- 1210,
+ 1212,
UNUSED,
UNUSED,
- 602,
+ 603,
UNUSED,
76,
- 1032,
- 231,
+ 1034,
+ 233,
UNUSED,
- 1352,
+ -1695,
235,
UNUSED,
- 1635,
+ 1688,
74,
- 319,
- UNUSED,
- -748,
+ 320,
UNUSED,
+ -799,
UNUSED,
UNUSED,
+ 1477,
UNUSED,
UNUSED,
UNUSED,
@@ -4106,20 +4106,20 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
UNUSED,
UNUSED,
UNUSED,
- 489,
- 1641,
- -1048,
+ 540,
+ 1694,
+ -1108,
UNUSED,
- 1310,
+ 1312,
UNUSED,
UNUSED,
- 130,
+ -2919,
135,
UNUSED,
UNUSED,
- 491,
+ 492,
};
- static const struct tokendata tokendata[1732] = {
+ static const struct tokendata tokendata[1795] = {
{ "db", TOKEN_INSN, C_none, I_DB },
{ "dw", TOKEN_INSN, C_none, I_DW },
{ "dd", TOKEN_INSN, C_none, I_DD },
@@ -4302,6 +4302,7 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
{ "int3", TOKEN_INSN, C_none, I_INT3 },
{ "into", TOKEN_INSN, C_none, I_INTO },
{ "invd", TOKEN_INSN, C_none, I_INVD },
+ { "invpcid", TOKEN_INSN, C_none, I_INVPCID },
{ "invlpg", TOKEN_INSN, C_none, I_INVLPG },
{ "invlpga", TOKEN_INSN, C_none, I_INVLPGA },
{ "iret", TOKEN_INSN, C_none, I_IRET },
@@ -4811,6 +4812,7 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
{ "movsldup", TOKEN_INSN, C_none, I_MOVSLDUP },
{ "vmcall", TOKEN_INSN, C_none, I_VMCALL },
{ "vmclear", TOKEN_INSN, C_none, I_VMCLEAR },
+ { "vmfunc", TOKEN_INSN, C_none, I_VMFUNC },
{ "vmlaunch", TOKEN_INSN, C_none, I_VMLAUNCH },
{ "vmload", TOKEN_INSN, C_none, I_VMLOAD },
{ "vmmcall", TOKEN_INSN, C_none, I_VMMCALL },
@@ -5490,6 +5492,11 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
{ "wrgsbase", TOKEN_INSN, C_none, I_WRGSBASE },
{ "vcvtph2ps", TOKEN_INSN, C_none, I_VCVTPH2PS },
{ "vcvtps2ph", TOKEN_INSN, C_none, I_VCVTPS2PH },
+ { "adcx", TOKEN_INSN, C_none, I_ADCX },
+ { "adox", TOKEN_INSN, C_none, I_ADOX },
+ { "rdseed", TOKEN_INSN, C_none, I_RDSEED },
+ { "clac", TOKEN_INSN, C_none, I_CLAC },
+ { "stac", TOKEN_INSN, C_none, I_STAC },
{ "xstore", TOKEN_INSN, C_none, I_XSTORE },
{ "xcryptecb", TOKEN_INSN, C_none, I_XCRYPTECB },
{ "xcryptcbc", TOKEN_INSN, C_none, I_XCRYPTCBC },
@@ -5576,6 +5583,52 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
{ "vpshld", TOKEN_INSN, C_none, I_VPSHLD },
{ "vpshlq", TOKEN_INSN, C_none, I_VPSHLQ },
{ "vpshlw", TOKEN_INSN, C_none, I_VPSHLW },
+ { "vbroadcasti128", TOKEN_INSN, C_none, I_VBROADCASTI128 },
+ { "vpblendd", TOKEN_INSN, C_none, I_VPBLENDD },
+ { "vpbroadcastb", TOKEN_INSN, C_none, I_VPBROADCASTB },
+ { "vpbroadcastw", TOKEN_INSN, C_none, I_VPBROADCASTW },
+ { "vpbroadcastd", TOKEN_INSN, C_none, I_VPBROADCASTD },
+ { "vpbroadcastq", TOKEN_INSN, C_none, I_VPBROADCASTQ },
+ { "vpermd", TOKEN_INSN, C_none, I_VPERMD },
+ { "vpermpd", TOKEN_INSN, C_none, I_VPERMPD },
+ { "vpermps", TOKEN_INSN, C_none, I_VPERMPS },
+ { "vpermq", TOKEN_INSN, C_none, I_VPERMQ },
+ { "vperm2i128", TOKEN_INSN, C_none, I_VPERM2I128 },
+ { "vextracti128", TOKEN_INSN, C_none, I_VEXTRACTI128 },
+ { "vinserti128", TOKEN_INSN, C_none, I_VINSERTI128 },
+ { "vpmaskmovd", TOKEN_INSN, C_none, I_VPMASKMOVD },
+ { "vpmaskmovq", TOKEN_INSN, C_none, I_VPMASKMOVQ },
+ { "vpsllvd", TOKEN_INSN, C_none, I_VPSLLVD },
+ { "vpsllvq", TOKEN_INSN, C_none, I_VPSLLVQ },
+ { "vpsravd", TOKEN_INSN, C_none, I_VPSRAVD },
+ { "vpsrlvd", TOKEN_INSN, C_none, I_VPSRLVD },
+ { "vpsrlvq", TOKEN_INSN, C_none, I_VPSRLVQ },
+ { "vgatherdpd", TOKEN_INSN, C_none, I_VGATHERDPD },
+ { "vgatherqpd", TOKEN_INSN, C_none, I_VGATHERQPD },
+ { "vgatherdps", TOKEN_INSN, C_none, I_VGATHERDPS },
+ { "vgatherqps", TOKEN_INSN, C_none, I_VGATHERQPS },
+ { "vpgatherdd", TOKEN_INSN, C_none, I_VPGATHERDD },
+ { "vpgatherqd", TOKEN_INSN, C_none, I_VPGATHERQD },
+ { "vpgatherdq", TOKEN_INSN, C_none, I_VPGATHERDQ },
+ { "vpgatherqq", TOKEN_INSN, C_none, I_VPGATHERQQ },
+ { "xabort", TOKEN_INSN, C_none, I_XABORT },
+ { "xbegin", TOKEN_INSN, C_none, I_XBEGIN },
+ { "xend", TOKEN_INSN, C_none, I_XEND },
+ { "xtest", TOKEN_INSN, C_none, I_XTEST },
+ { "tzcnt", TOKEN_INSN, C_none, I_TZCNT },
+ { "andn", TOKEN_INSN, C_none, I_ANDN },
+ { "bextr", TOKEN_INSN, C_none, I_BEXTR },
+ { "blsi", TOKEN_INSN, C_none, I_BLSI },
+ { "blsmsk", TOKEN_INSN, C_none, I_BLSMSK },
+ { "blsr", TOKEN_INSN, C_none, I_BLSR },
+ { "bzhi", TOKEN_INSN, C_none, I_BZHI },
+ { "mulx", TOKEN_INSN, C_none, I_MULX },
+ { "pdep", TOKEN_INSN, C_none, I_PDEP },
+ { "pext", TOKEN_INSN, C_none, I_PEXT },
+ { "rorx", TOKEN_INSN, C_none, I_RORX },
+ { "sarx", TOKEN_INSN, C_none, I_SARX },
+ { "shlx", TOKEN_INSN, C_none, I_SHLX },
+ { "shrx", TOKEN_INSN, C_none, I_SHRX },
{ "hint_nop0", TOKEN_INSN, C_none, I_HINT_NOP0 },
{ "hint_nop1", TOKEN_INSN, C_none, I_HINT_NOP1 },
{ "hint_nop2", TOKEN_INSN, C_none, I_HINT_NOP2 },
@@ -5820,6 +5873,8 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
{ "repz", TOKEN_PREFIX, 0, P_REPZ },
{ "times", TOKEN_PREFIX, 0, P_TIMES },
{ "wait", TOKEN_PREFIX, 0, P_WAIT },
+ { "xacquire", TOKEN_PREFIX, 0, P_XACQUIRE },
+ { "xrelease", TOKEN_PREFIX, 0, P_XRELEASE },
{ "abs", TOKEN_SPECIAL, 0, S_ABS },
{ "byte", TOKEN_SPECIAL, 0, S_BYTE },
{ "dword", TOKEN_SPECIAL, 0, S_DWORD },
@@ -5849,7 +5904,15 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
{ "__float128l__", TOKEN_FLOATIZE, 0, FLOAT_128L },
{ "__float128h__", TOKEN_FLOATIZE, 0, FLOAT_128H },
{ "__utf16__", TOKEN_STRFUNC, 0, STRFUNC_UTF16 },
+ { "__utf16le__", TOKEN_STRFUNC, 0, STRFUNC_UTF16LE },
+ { "__utf16be__", TOKEN_STRFUNC, 0, STRFUNC_UTF16BE },
{ "__utf32__", TOKEN_STRFUNC, 0, STRFUNC_UTF32 },
+ { "__utf32le__", TOKEN_STRFUNC, 0, STRFUNC_UTF32LE },
+ { "__utf32be__", TOKEN_STRFUNC, 0, STRFUNC_UTF32BE },
+ { "__ilog2e__", TOKEN_IFUNC, 0, IFUNC_ILOG2E },
+ { "__ilog2w__", TOKEN_IFUNC, 0, IFUNC_ILOG2W },
+ { "__ilog2f__", TOKEN_IFUNC, 0, IFUNC_ILOG2F },
+ { "__ilog2c__", TOKEN_IFUNC, 0, IFUNC_ILOG2C },
{ "seg", TOKEN_SEG, 0, 0 },
{ "wrt", TOKEN_WRT, 0, 0 },
};
@@ -5863,7 +5926,7 @@ int nasm_token_hash(const char *token, struct tokenval *tv)
k2 = (uint32_t)(crc >> 32);
ix = hash1[k1 & 0x7ff] + hash2[k2 & 0x7ff];
- if (ix >= 1732)
+ if (ix >= 1795)
return tv->t_type = TOKEN_ID;
data = &tokendata[ix];
diff --git a/tokhash.pl b/tokhash.pl
index 0c69c03..6c05802 100755
--- a/tokhash.pl
+++ b/tokhash.pl
@@ -183,7 +183,7 @@ if ($output eq 'h') {
#
@hashinfo = gen_perfect_hash(\%tokens);
- if (!defined(@hashinfo)) {
+ if (!@hashinfo) {
die "$0: no hash found\n";
}
diff --git a/version b/version
index 54985ae..80278b5 100644
--- a/version
+++ b/version
@@ -1 +1 @@
-2.09.08
+2.10.07
diff --git a/version.h b/version.h
index 7f87a82..fbda4d1 100644
--- a/version.h
+++ b/version.h
@@ -1,9 +1,9 @@
#ifndef NASM_VERSION_H
#define NASM_VERSION_H
#define NASM_MAJOR_VER 2
-#define NASM_MINOR_VER 9
-#define NASM_SUBMINOR_VER 8
+#define NASM_MINOR_VER 10
+#define NASM_SUBMINOR_VER 7
#define NASM_PATCHLEVEL_VER 0
-#define NASM_VERSION_ID 0x02090800
-#define NASM_VER "2.09.08"
+#define NASM_VERSION_ID 0x020a0700
+#define NASM_VER "2.10.07"
#endif /* NASM_VERSION_H */
diff --git a/version.mac b/version.mac
index cbe4f98..a7abb76 100644
--- a/version.mac
+++ b/version.mac
@@ -1,6 +1,6 @@
%define __NASM_MAJOR__ 2
-%define __NASM_MINOR__ 9
-%define __NASM_SUBMINOR__ 8
+%define __NASM_MINOR__ 10
+%define __NASM_SUBMINOR__ 7
%define __NASM_PATCHLEVEL__ 0
-%define __NASM_VERSION_ID__ 002090800h
-%define __NASM_VER__ "2.09.08"
+%define __NASM_VERSION_ID__ 0020A0700h
+%define __NASM_VER__ "2.10.07"
diff --git a/version.mak b/version.mak
index 636c426..57fc9d8 100644
--- a/version.mak
+++ b/version.mak
@@ -1,5 +1,5 @@
-NASM_VER=2.09.08
+NASM_VER=2.10.07
NASM_MAJOR_VER=2
-NASM_MINOR_VER=9
-NASM_SUBMINOR_VER=8
+NASM_MINOR_VER=10
+NASM_SUBMINOR_VER=7
NASM_PATCHLEVEL_VER=0
diff --git a/version.nsh b/version.nsh
index bb47f33..eb9f25e 100644
--- a/version.nsh
+++ b/version.nsh
@@ -1,5 +1,5 @@
-!define VERSION "2.09.08"
-!define MAJOR_VER 9
-!define MINOR_VER 9
-!define SUBMINOR_VER 8
+!define VERSION "2.10.07"
+!define MAJOR_VER 10
+!define MINOR_VER 10
+!define SUBMINOR_VER 7
!define PATCHLEVEL_VER 0
diff --git a/version.sed b/version.sed
index 5e3e137..c228f3c 100644
--- a/version.sed
+++ b/version.sed
@@ -1,9 +1,9 @@
s/@@NASM_MAJOR@@/2/g
-s/@@NASM_MINOR@@/9/g
-s/@@NASM_SUBMINOR@@/8/g
+s/@@NASM_MINOR@@/10/g
+s/@@NASM_SUBMINOR@@/7/g
s/@@NASM_PATCHLEVEL@@/0/g
s/@@NASM_SNAPSHOT@@/0/g
-s/@@NASM_VERSION_ID@@/34146304/g
-s/@@NASM_VERSION_XID@@/0x02090800/g
-s/@@NASM_VER@@/2.09.08/g
-s/@@NASM_MANGLED_VER@@/2.09.08/g
+s/@@NASM_VERSION_ID@@/34211584/g
+s/@@NASM_VERSION_XID@@/0x020a0700/g
+s/@@NASM_VER@@/2.10.07/g
+s/@@NASM_MANGLED_VER@@/2.10.07/g