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authorIan Romanick <ian.d.romanick@intel.com>2019-02-27 15:52:18 -0800
committerDylan Baker <dylan@pnwbakers.com>2019-03-07 09:09:20 -0800
commit1cae37f6d3e31ac12914d10b62d62c4ddc89611c (patch)
tree70c9d989bebdd0fa8946456ccbd79175100bad81 /src
parent0bc03198239699095ddd809d87ae37b536d3b892 (diff)
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intel/fs: nir_op_extract_i8 extracts a byte, not a word
Fixes: 6ac2d169019 ("i965/fs: Fix extract_i8/u8 to a 64-bit destination") Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (cherry picked from commit 4aaf139ea4cc7c4703e1906e0074f87f76c8e4cc)
Diffstat (limited to 'src')
-rw-r--r--src/intel/compiler/brw_fs_nir.cpp6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index d9cfaeb0631..9b5b94650c6 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -1493,7 +1493,7 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
* Use two instructions and a word or DWord intermediate integer type.
*/
if (nir_dest_bit_size(instr->dest.dest) == 64) {
- const brw_reg_type type = brw_int_type(2, instr->op == nir_op_extract_i8);
+ const brw_reg_type type = brw_int_type(1, instr->op == nir_op_extract_i8);
if (instr->op == nir_op_extract_i8) {
/* If we need to sign extend, extract to a word first */
@@ -1502,7 +1502,9 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
bld.MOV(result, w_temp);
} else {
/* Otherwise use an AND with 0xff and a word type */
- bld.AND(result, subscript(op[0], type, byte / 2), brw_imm_uw(0xff));
+ bld.AND(result,
+ subscript(op[0], BRW_REGISTER_TYPE_UW, byte / 2),
+ brw_imm_uw(0xff));
}
} else {
const brw_reg_type type = brw_int_type(1, instr->op == nir_op_extract_i8);