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| author | Dave Airlie <airlied@redhat.com> | 2023-12-21 10:39:08 +1000 |
|---|---|---|
| committer | Eric Engestrom <eric@engestrom.ch> | 2024-01-09 19:37:45 +0000 |
| commit | 10bb376e09b1e2d328980446bfc5a227f9821fbd (patch) | |
| tree | 16a0c33168dc60d4bc943ce35b6a171d11e03a22 | |
| parent | 8ee03f2437d4469b161148698720c7734e86f19c (diff) | |
| download | mesa-10bb376e09b1e2d328980446bfc5a227f9821fbd.tar.gz mesa-10bb376e09b1e2d328980446bfc5a227f9821fbd.tar.bz2 mesa-10bb376e09b1e2d328980446bfc5a227f9821fbd.zip | |
intel/compiler: reemit boolean resolve for inverted if on gen5
Gen5 adds some boolean conversion instructions after nir emits,
but that nir srcs don't line up with them, so reemit the boolean
conversion if we reemit the inot.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 31b5f5a51f3a ("nir/opt_if: Simplify if's with general conditions")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26782>
(cherry picked from commit 56a72e014fcda3c52cf119115cb71fce2fad86d8)
| -rw-r--r-- | .pick_status.json | 2 | ||||
| -rw-r--r-- | src/intel/compiler/brw_fs_nir.cpp | 11 |
2 files changed, 12 insertions, 1 deletions
diff --git a/.pick_status.json b/.pick_status.json index 086c6d6f1e5..334507ad35e 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1414,7 +1414,7 @@ "description": "intel/compiler: reemit boolean resolve for inverted if on gen5", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "31b5f5a51f3a3d19600dd43bf6ab49bab98a9bbe", "notes": null diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index b9f7366763b..9bb62ec7401 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -361,6 +361,17 @@ fs_visitor::nir_emit_if(nir_if *if_stmt) invert = true; cond_reg = get_nir_src(cond->src[0].src); cond_reg = offset(cond_reg, bld, cond->src[0].swizzle[0]); + + if (devinfo->ver <= 5 && + (cond->instr.pass_flags & BRW_NIR_BOOLEAN_MASK) == BRW_NIR_BOOLEAN_NEEDS_RESOLVE) { + /* redo boolean resolve on gen5 */ + fs_reg masked = bld.vgrf(BRW_REGISTER_TYPE_D); + bld.AND(masked, cond_reg, brw_imm_d(1)); + masked.negate = true; + fs_reg tmp = bld.vgrf(cond_reg.type); + bld.MOV(retype(tmp, BRW_REGISTER_TYPE_D), masked); + cond_reg = tmp; + } } else { invert = false; cond_reg = get_nir_src(if_stmt->condition); |