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| author | Christophe Lyon <christophe.lyon@linaro.org> | 2017-01-24 20:25:42 +0000 |
|---|---|---|
| committer | Yvan Roux <yvan.roux@linaro.org> | 2017-01-30 13:23:20 +0000 |
| commit | 433a8e10b4a470426ecf85dc87767ce0b32a8f42 (patch) | |
| tree | 934e07789f1ba8465317d7f0a94c4a303e202a97 | |
| parent | 998004928bf3843e399afdbf947ddb0e6a50f9d2 (diff) | |
| download | linaro-gcc-433a8e10b4a470426ecf85dc87767ce0b32a8f42.tar.gz linaro-gcc-433a8e10b4a470426ecf85dc87767ce0b32a8f42.tar.bz2 linaro-gcc-433a8e10b4a470426ecf85dc87767ce0b32a8f42.zip | |
gcc/
Backport from trunk r242471.
2016-11-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/78364
* config/arm/arm.md (*extv_reg): Restrict operands 2 and 3 to the
proper ranges for an SBFX instruction.
(extzv_t2): Likewise for UBFX.
Change-Id: I94a24294a7de7cf1c02fd841f4b184206520542e
| -rw-r--r-- | gcc/config/arm/arm.md | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 0150ba0e8fb..37d0987bc7d 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -4559,9 +4559,11 @@ (define_insn "*extv_reg" [(set (match_operand:SI 0 "s_register_operand" "=r") (sign_extract:SI (match_operand:SI 1 "s_register_operand" "r") - (match_operand:SI 2 "const_int_M_operand" "M") - (match_operand:SI 3 "const_int_M_operand" "M")))] - "arm_arch_thumb2" + (match_operand:SI 2 "const_int_operand" "n") + (match_operand:SI 3 "const_int_operand" "n")))] + "arm_arch_thumb2 + && IN_RANGE (INTVAL (operands[3]), 0, 31) + && IN_RANGE (INTVAL (operands[2]), 1, 32 - INTVAL (operands[3]))" "sbfx%?\t%0, %1, %3, %2" [(set_attr "length" "4") (set_attr "predicable" "yes") @@ -4572,9 +4574,11 @@ (define_insn "extzv_t2" [(set (match_operand:SI 0 "s_register_operand" "=r") (zero_extract:SI (match_operand:SI 1 "s_register_operand" "r") - (match_operand:SI 2 "const_int_M_operand" "M") - (match_operand:SI 3 "const_int_M_operand" "M")))] - "arm_arch_thumb2" + (match_operand:SI 2 "const_int_operand" "n") + (match_operand:SI 3 "const_int_operand" "n")))] + "arm_arch_thumb2 + && IN_RANGE (INTVAL (operands[3]), 0, 31) + && IN_RANGE (INTVAL (operands[2]), 1, 32 - INTVAL (operands[3]))" "ubfx%?\t%0, %1, %3, %2" [(set_attr "length" "4") (set_attr "predicable" "yes") |