diff options
author | rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-08-18 12:37:27 +0000 |
---|---|---|
committer | rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-08-18 12:37:27 +0000 |
commit | 7013e87c514a70ba6ea24d9d7e16165730752543 (patch) | |
tree | be86e26d9b32f132c267f39e263298c225c62ae9 | |
parent | b72d459f396af780bd6506f992b421663c4bb676 (diff) | |
download | linaro-gcc-7013e87c514a70ba6ea24d9d7e16165730752543.tar.gz linaro-gcc-7013e87c514a70ba6ea24d9d7e16165730752543.tar.bz2 linaro-gcc-7013e87c514a70ba6ea24d9d7e16165730752543.zip |
gcc/
* rtl.h (set_src_cost, get_full_set_src_cost): New functions.
* auto-inc-dec.c (attempt_change): Use set_src_cost instead of
rtx_cost.
* calls.c (precompute_register_parameters): Likewise.
* combine.c (expand_compound_operation, make_extraction): Likewise.
(force_to_mode, distribute_and_simplify_rtx): Likewise.
* dse.c (find_shift_sequence): Likewise.
* expmed.c (init_expmed, expand_mult, expand_smod_pow2): Likewise.
* expr.c (compress_float_constant): Likewise.
* fwprop.c (should_replace_address, try_fwprop_subst): Likewise.
* gcse.c (want_to_gcse_p): Likewise.
* ifcvt.c (noce_try_sign_mask): Likewise.
* loop-doloop.c (doloop_optimize): Likewise.
* loop-invariant.c (create_new_invariant): Likewise.
* optabs.c (avoid_expensive_constant): Likewise.
* postreload.c (reload_cse_simplify_set, reload_cse_simplify_operands)
(try_replace_in_use, reload_cse_move2add): Likewise.
* reload1.c (calculate_elim_costs_all_insns): Likewise.
(note_reg_elim_costly): Likewise.
* rtlanal.c (insn_rtx_cost): Likewise.
* simplify-rtx.c (simplify_binary_operation_1): Likewise.
* stmt.c (lshift_cheap_p): Likewise.
* tree-ssa-loop-ivopts.c (seq_cost, computation_cost): Likewise.
* config/avr/avr.c (final_prescan_insn): Likewise.
* config/bfin/bfin.c (bfin_rtx_costs): Likewise.
* config/mips/mips.c (mips_binary_cost, mips_rtx_costs): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@177851 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r-- | gcc/ChangeLog | 29 | ||||
-rw-r--r-- | gcc/auto-inc-dec.c | 4 | ||||
-rw-r--r-- | gcc/calls.c | 2 | ||||
-rw-r--r-- | gcc/combine.c | 24 | ||||
-rw-r--r-- | gcc/config/avr/avr.c | 2 | ||||
-rw-r--r-- | gcc/config/bfin/bfin.c | 4 | ||||
-rw-r--r-- | gcc/config/mips/mips.c | 30 | ||||
-rw-r--r-- | gcc/dse.c | 2 | ||||
-rw-r--r-- | gcc/expmed.c | 41 | ||||
-rw-r--r-- | gcc/expr.c | 10 | ||||
-rw-r--r-- | gcc/fwprop.c | 8 | ||||
-rw-r--r-- | gcc/gcse.c | 4 | ||||
-rw-r--r-- | gcc/ifcvt.c | 2 | ||||
-rw-r--r-- | gcc/loop-doloop.c | 2 | ||||
-rw-r--r-- | gcc/loop-invariant.c | 2 | ||||
-rw-r--r-- | gcc/optabs.c | 2 | ||||
-rw-r--r-- | gcc/postreload.c | 22 | ||||
-rw-r--r-- | gcc/reload1.c | 5 | ||||
-rw-r--r-- | gcc/rtl.h | 18 | ||||
-rw-r--r-- | gcc/rtlanal.c | 2 | ||||
-rw-r--r-- | gcc/simplify-rtx.c | 4 | ||||
-rw-r--r-- | gcc/stmt.c | 4 | ||||
-rw-r--r-- | gcc/tree-ssa-loop-ivopts.c | 4 |
23 files changed, 141 insertions, 86 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f3a95bb3b0b..a0fdc127e91 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,34 @@ 2011-08-18 Richard Sandiford <richard.sandiford@linaro.org> + * rtl.h (set_src_cost, get_full_set_src_cost): New functions. + * auto-inc-dec.c (attempt_change): Use set_src_cost instead of + rtx_cost. + * calls.c (precompute_register_parameters): Likewise. + * combine.c (expand_compound_operation, make_extraction): Likewise. + (force_to_mode, distribute_and_simplify_rtx): Likewise. + * dse.c (find_shift_sequence): Likewise. + * expmed.c (init_expmed, expand_mult, expand_smod_pow2): Likewise. + * expr.c (compress_float_constant): Likewise. + * fwprop.c (should_replace_address, try_fwprop_subst): Likewise. + * gcse.c (want_to_gcse_p): Likewise. + * ifcvt.c (noce_try_sign_mask): Likewise. + * loop-doloop.c (doloop_optimize): Likewise. + * loop-invariant.c (create_new_invariant): Likewise. + * optabs.c (avoid_expensive_constant): Likewise. + * postreload.c (reload_cse_simplify_set, reload_cse_simplify_operands) + (try_replace_in_use, reload_cse_move2add): Likewise. + * reload1.c (calculate_elim_costs_all_insns): Likewise. + (note_reg_elim_costly): Likewise. + * rtlanal.c (insn_rtx_cost): Likewise. + * simplify-rtx.c (simplify_binary_operation_1): Likewise. + * stmt.c (lshift_cheap_p): Likewise. + * tree-ssa-loop-ivopts.c (seq_cost, computation_cost): Likewise. + * config/avr/avr.c (final_prescan_insn): Likewise. + * config/bfin/bfin.c (bfin_rtx_costs): Likewise. + * config/mips/mips.c (mips_binary_cost, mips_rtx_costs): Likewise. + +2011-08-18 Richard Sandiford <richard.sandiford@linaro.org> + * rtl.h (set_rtx_cost, get_full_set_rtx_cost): New functions. * auto-inc-dec.c (attempt_change): Use set_rtx_cost. * cfgloopanal.c (seq_cost): Likewise. diff --git a/gcc/auto-inc-dec.c b/gcc/auto-inc-dec.c index 0444daecf9b..1c9edf85925 100644 --- a/gcc/auto-inc-dec.c +++ b/gcc/auto-inc-dec.c @@ -483,9 +483,9 @@ attempt_change (rtx new_addr, rtx inc_reg) PUT_MODE (mem_tmp, mode); XEXP (mem_tmp, 0) = new_addr; - old_cost = (rtx_cost (mem, SET, speed) + old_cost = (set_src_cost (mem, speed) + set_rtx_cost (PATTERN (inc_insn.insn), speed)); - new_cost = rtx_cost (mem_tmp, SET, speed); + new_cost = set_src_cost (mem_tmp, speed); /* The first item of business is to see if this is profitable. */ if (old_cost < new_cost) diff --git a/gcc/calls.c b/gcc/calls.c index 26c320095e0..a6e96e48575 100644 --- a/gcc/calls.c +++ b/gcc/calls.c @@ -742,7 +742,7 @@ precompute_register_parameters (int num_actuals, struct arg_data *args, || (GET_CODE (args[i].value) == SUBREG && REG_P (SUBREG_REG (args[i].value))))) && args[i].mode != BLKmode - && rtx_cost (args[i].value, SET, optimize_insn_for_speed_p ()) + && set_src_cost (args[i].value, optimize_insn_for_speed_p ()) > COSTS_N_INSNS (1) && ((*reg_parm_seen && targetm.small_register_classes_for_mode_p (args[i].mode)) diff --git a/gcc/combine.c b/gcc/combine.c index c24f08114cb..f355f016dfd 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -6827,11 +6827,11 @@ expand_compound_operation (rtx x) rtx temp2 = expand_compound_operation (temp); /* Make sure this is a profitable operation. */ - if (rtx_cost (x, SET, optimize_this_for_speed_p) - > rtx_cost (temp2, SET, optimize_this_for_speed_p)) + if (set_src_cost (x, optimize_this_for_speed_p) + > set_src_cost (temp2, optimize_this_for_speed_p)) return temp2; - else if (rtx_cost (x, SET, optimize_this_for_speed_p) - > rtx_cost (temp, SET, optimize_this_for_speed_p)) + else if (set_src_cost (x, optimize_this_for_speed_p) + > set_src_cost (temp, optimize_this_for_speed_p)) return temp; else return x; @@ -7253,8 +7253,8 @@ make_extraction (enum machine_mode mode, rtx inner, HOST_WIDE_INT pos, /* Prefer ZERO_EXTENSION, since it gives more information to backends. */ - if (rtx_cost (temp, SET, optimize_this_for_speed_p) - <= rtx_cost (temp1, SET, optimize_this_for_speed_p)) + if (set_src_cost (temp, optimize_this_for_speed_p) + <= set_src_cost (temp1, optimize_this_for_speed_p)) return temp; return temp1; } @@ -7455,8 +7455,8 @@ make_extraction (enum machine_mode mode, rtx inner, HOST_WIDE_INT pos, /* Prefer ZERO_EXTENSION, since it gives more information to backends. */ - if (rtx_cost (temp1, SET, optimize_this_for_speed_p) - < rtx_cost (temp, SET, optimize_this_for_speed_p)) + if (set_src_cost (temp1, optimize_this_for_speed_p) + < set_src_cost (temp, optimize_this_for_speed_p)) temp = temp1; } pos_rtx = temp; @@ -8223,8 +8223,8 @@ force_to_mode (rtx x, enum machine_mode mode, unsigned HOST_WIDE_INT mask, y = simplify_gen_binary (AND, GET_MODE (x), XEXP (x, 0), GEN_INT (cval)); - if (rtx_cost (y, SET, optimize_this_for_speed_p) - < rtx_cost (x, SET, optimize_this_for_speed_p)) + if (set_src_cost (y, optimize_this_for_speed_p) + < set_src_cost (x, optimize_this_for_speed_p)) x = y; } @@ -9377,8 +9377,8 @@ distribute_and_simplify_rtx (rtx x, int n) tmp = apply_distributive_law (simplify_gen_binary (inner_code, mode, new_op0, new_op1)); if (GET_CODE (tmp) != outer_code - && rtx_cost (tmp, SET, optimize_this_for_speed_p) - < rtx_cost (x, SET, optimize_this_for_speed_p)) + && (set_src_cost (tmp, optimize_this_for_speed_p) + < set_src_cost (x, optimize_this_for_speed_p))) return tmp; return NULL_RTX; diff --git a/gcc/config/avr/avr.c b/gcc/config/avr/avr.c index 6bb236cb584..79cf0a5bffd 100644 --- a/gcc/config/avr/avr.c +++ b/gcc/config/avr/avr.c @@ -1637,7 +1637,7 @@ final_prescan_insn (rtx insn, rtx *operand ATTRIBUTE_UNUSED, if (set) fprintf (asm_out_file, "/* DEBUG: cost = %d. */\n", - rtx_cost (SET_SRC (set), SET, optimize_insn_for_speed_p())); + set_src_cost (SET_SRC (set), optimize_insn_for_speed_p ())); else fprintf (asm_out_file, "/* DEBUG: pattern-cost = %d. */\n", rtx_cost (PATTERN (insn), INSN, optimize_insn_for_speed_p())); diff --git a/gcc/config/bfin/bfin.c b/gcc/config/bfin/bfin.c index f5b45dc0efb..8cd315d9e76 100644 --- a/gcc/config/bfin/bfin.c +++ b/gcc/config/bfin/bfin.c @@ -2837,11 +2837,11 @@ bfin_rtx_costs (rtx x, int code_i, int outer_code_i, int *total, bool speed) *total = cost2; if (GET_CODE (op0) != REG && (GET_CODE (op0) != SUBREG || GET_CODE (SUBREG_REG (op0)) != REG)) - *total += rtx_cost (op0, SET, speed); + *total += set_src_cost (op0, speed); #if 0 /* We'd like to do this for accuracy, but it biases the loop optimizer towards creating too many induction variables. */ if (!reg_or_7bit_operand (op1, SImode)) - *total += rtx_cost (op1, SET, speed); + *total += set_src_cost (op1, speed); #endif } else if (GET_MODE (x) == DImode) diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 89371734d4e..88988b66ca2 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -3333,7 +3333,7 @@ mips_binary_cost (rtx x, int single_cost, int double_cost, bool speed) else cost = single_cost; return (cost - + rtx_cost (XEXP (x, 0), SET, speed) + + set_src_cost (XEXP (x, 0), speed) + rtx_cost (XEXP (x, 1), GET_CODE (x), speed)); } @@ -3550,7 +3550,7 @@ mips_rtx_costs (rtx x, int code, int outer_code, int *total, bool speed) && UINTVAL (XEXP (x, 1)) == 0xffffffff) { *total = (mips_zero_extend_cost (mode, XEXP (x, 0)) - + rtx_cost (XEXP (x, 0), SET, speed)); + + set_src_cost (XEXP (x, 0), speed)); return true; } /* Fall through. */ @@ -3585,7 +3585,7 @@ mips_rtx_costs (rtx x, int code, int outer_code, int *total, bool speed) case LO_SUM: /* Low-part immediates need an extended MIPS16 instruction. */ *total = (COSTS_N_INSNS (TARGET_MIPS16 ? 2 : 1) - + rtx_cost (XEXP (x, 0), SET, speed)); + + set_src_cost (XEXP (x, 0), speed)); return true; case LT: @@ -3626,17 +3626,17 @@ mips_rtx_costs (rtx x, int code, int outer_code, int *total, bool speed) if (GET_CODE (op0) == MULT && GET_CODE (XEXP (op0, 0)) == NEG) { *total = (mips_fp_mult_cost (mode) - + rtx_cost (XEXP (XEXP (op0, 0), 0), SET, speed) - + rtx_cost (XEXP (op0, 1), SET, speed) - + rtx_cost (op1, SET, speed)); + + set_src_cost (XEXP (XEXP (op0, 0), 0), speed) + + set_src_cost (XEXP (op0, 1), speed) + + set_src_cost (op1, speed)); return true; } if (GET_CODE (op1) == MULT) { *total = (mips_fp_mult_cost (mode) - + rtx_cost (op0, SET, speed) - + rtx_cost (XEXP (op1, 0), SET, speed) - + rtx_cost (XEXP (op1, 1), SET, speed)); + + set_src_cost (op0, speed) + + set_src_cost (XEXP (op1, 0), speed) + + set_src_cost (XEXP (op1, 1), speed)); return true; } } @@ -3678,9 +3678,9 @@ mips_rtx_costs (rtx x, int code, int outer_code, int *total, bool speed) && GET_CODE (XEXP (op, 0)) == MULT) { *total = (mips_fp_mult_cost (mode) - + rtx_cost (XEXP (XEXP (op, 0), 0), SET, speed) - + rtx_cost (XEXP (XEXP (op, 0), 1), SET, speed) - + rtx_cost (XEXP (op, 1), SET, speed)); + + set_src_cost (XEXP (XEXP (op, 0), 0), speed) + + set_src_cost (XEXP (XEXP (op, 0), 1), speed) + + set_src_cost (XEXP (op, 1), speed)); return true; } } @@ -3718,10 +3718,10 @@ mips_rtx_costs (rtx x, int code, int outer_code, int *total, bool speed) if (outer_code == SQRT || GET_CODE (XEXP (x, 1)) == SQRT) /* An rsqrt<mode>a or rsqrt<mode>b pattern. Count the division as being free. */ - *total = rtx_cost (XEXP (x, 1), SET, speed); + *total = set_src_cost (XEXP (x, 1), speed); else *total = (mips_fp_div_cost (mode) - + rtx_cost (XEXP (x, 1), SET, speed)); + + set_src_cost (XEXP (x, 1), speed)); return true; } /* Fall through. */ @@ -3749,7 +3749,7 @@ mips_rtx_costs (rtx x, int code, int outer_code, int *total, bool speed) && CONST_INT_P (XEXP (x, 1)) && exact_log2 (INTVAL (XEXP (x, 1))) >= 0) { - *total = COSTS_N_INSNS (2) + rtx_cost (XEXP (x, 0), SET, speed); + *total = COSTS_N_INSNS (2) + set_src_cost (XEXP (x, 0), speed); return true; } *total = COSTS_N_INSNS (mips_idiv_insns ()); diff --git a/gcc/dse.c b/gcc/dse.c index 8bad4ef04ac..ef1b50c5315 100644 --- a/gcc/dse.c +++ b/gcc/dse.c @@ -1709,7 +1709,7 @@ find_shift_sequence (int access_size, byte = subreg_lowpart_offset (read_mode, new_mode); ret = simplify_subreg (read_mode, ret, new_mode, byte); if (ret && CONSTANT_P (ret) - && rtx_cost (ret, SET, speed) <= COSTS_N_INSNS (1)) + && set_src_cost (ret, speed) <= COSTS_N_INSNS (1)) return ret; } } diff --git a/gcc/expmed.c b/gcc/expmed.c index 92167f148ab..f75ea7acd61 100644 --- a/gcc/expmed.c +++ b/gcc/expmed.c @@ -196,7 +196,7 @@ init_expmed (void) for (speed = 0; speed < 2; speed++) { crtl->maybe_hot_insn_p = speed; - zero_cost[speed] = rtx_cost (const0_rtx, SET, speed); + zero_cost[speed] = set_src_cost (const0_rtx, speed); for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; @@ -217,15 +217,15 @@ init_expmed (void) PUT_MODE (&all.shift_sub0, mode); PUT_MODE (&all.shift_sub1, mode); - add_cost[speed][mode] = rtx_cost (&all.plus, SET, speed); - neg_cost[speed][mode] = rtx_cost (&all.neg, SET, speed); - mul_cost[speed][mode] = rtx_cost (&all.mult, SET, speed); - sdiv_cost[speed][mode] = rtx_cost (&all.sdiv, SET, speed); - udiv_cost[speed][mode] = rtx_cost (&all.udiv, SET, speed); + add_cost[speed][mode] = set_src_cost (&all.plus, speed); + neg_cost[speed][mode] = set_src_cost (&all.neg, speed); + mul_cost[speed][mode] = set_src_cost (&all.mult, speed); + sdiv_cost[speed][mode] = set_src_cost (&all.sdiv, speed); + udiv_cost[speed][mode] = set_src_cost (&all.udiv, speed); - sdiv_pow2_cheap[speed][mode] = (rtx_cost (&all.sdiv_32, SET, speed) + sdiv_pow2_cheap[speed][mode] = (set_src_cost (&all.sdiv_32, speed) <= 2 * add_cost[speed][mode]); - smod_pow2_cheap[speed][mode] = (rtx_cost (&all.smod_32, SET, speed) + smod_pow2_cheap[speed][mode] = (set_src_cost (&all.smod_32, speed) <= 4 * add_cost[speed][mode]); wider_mode = GET_MODE_WIDER_MODE (mode); @@ -237,9 +237,9 @@ init_expmed (void) XEXP (&all.wide_lshr, 1) = GEN_INT (GET_MODE_BITSIZE (mode)); mul_widen_cost[speed][wider_mode] - = rtx_cost (&all.wide_mult, SET, speed); + = set_src_cost (&all.wide_mult, speed); mul_highpart_cost[speed][mode] - = rtx_cost (&all.wide_trunc, SET, speed); + = set_src_cost (&all.wide_trunc, speed); } shift_cost[speed][mode][0] = 0; @@ -252,10 +252,13 @@ init_expmed (void) XEXP (&all.shift, 1) = cint[m]; XEXP (&all.shift_mult, 1) = pow2[m]; - shift_cost[speed][mode][m] = rtx_cost (&all.shift, SET, speed); - shiftadd_cost[speed][mode][m] = rtx_cost (&all.shift_add, SET, speed); - shiftsub0_cost[speed][mode][m] = rtx_cost (&all.shift_sub0, SET, speed); - shiftsub1_cost[speed][mode][m] = rtx_cost (&all.shift_sub1, SET, speed); + shift_cost[speed][mode][m] = set_src_cost (&all.shift, speed); + shiftadd_cost[speed][mode][m] = set_src_cost (&all.shift_add, + speed); + shiftsub0_cost[speed][mode][m] = set_src_cost (&all.shift_sub0, + speed); + shiftsub1_cost[speed][mode][m] = set_src_cost (&all.shift_sub1, + speed); } } } @@ -3077,8 +3080,9 @@ expand_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target, result is interpreted as an unsigned coefficient. Exclude cost of op0 from max_cost to match the cost calculation of the synth_mult. */ - max_cost = rtx_cost (gen_rtx_MULT (mode, fake_reg, op1), SET, speed) - - neg_cost[speed][mode]; + max_cost = (set_src_cost (gen_rtx_MULT (mode, fake_reg, op1), + speed) + - neg_cost[speed][mode]); if (max_cost > 0 && choose_mult_variant (mode, -INTVAL (op1), &algorithm, &variant, max_cost)) @@ -3121,7 +3125,7 @@ expand_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target, /* Exclude cost of op0 from max_cost to match the cost calculation of the synth_mult. */ - max_cost = rtx_cost (gen_rtx_MULT (mode, fake_reg, op1), SET, speed); + max_cost = set_src_cost (gen_rtx_MULT (mode, fake_reg, op1), speed); if (choose_mult_variant (mode, coeff, &algorithm, &variant, max_cost)) return expand_mult_const (mode, op0, coeff, target, @@ -3610,7 +3614,8 @@ expand_smod_pow2 (enum machine_mode mode, rtx op0, HOST_WIDE_INT d) temp = gen_rtx_LSHIFTRT (mode, result, shift); if (optab_handler (lshr_optab, mode) == CODE_FOR_nothing - || rtx_cost (temp, SET, optimize_insn_for_speed_p ()) > COSTS_N_INSNS (2)) + || (set_src_cost (temp, optimize_insn_for_speed_p ()) + > COSTS_N_INSNS (2))) { temp = expand_binop (mode, xor_optab, op0, signmask, NULL_RTX, 1, OPTAB_LIB_WIDEN); diff --git a/gcc/expr.c b/gcc/expr.c index 03a05f37362..7257c8bde16 100644 --- a/gcc/expr.c +++ b/gcc/expr.c @@ -3398,9 +3398,9 @@ compress_float_constant (rtx x, rtx y) REAL_VALUE_FROM_CONST_DOUBLE (r, y); if (targetm.legitimate_constant_p (dstmode, y)) - oldcost = rtx_cost (y, SET, speed); + oldcost = set_src_cost (y, speed); else - oldcost = rtx_cost (force_const_mem (dstmode, y), SET, speed); + oldcost = set_src_cost (force_const_mem (dstmode, y), speed); for (srcmode = GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (orig_srcmode)); srcmode != orig_srcmode; @@ -3427,7 +3427,8 @@ compress_float_constant (rtx x, rtx y) if (!insn_operand_matches (ic, 1, trunc_y)) continue; /* This is valid, but may not be cheaper than the original. */ - newcost = rtx_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), SET, speed); + newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), + speed); if (oldcost < newcost) continue; } @@ -3435,7 +3436,8 @@ compress_float_constant (rtx x, rtx y) { trunc_y = force_const_mem (srcmode, trunc_y); /* This is valid, but may not be cheaper than the original. */ - newcost = rtx_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), SET, speed); + newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), + speed); if (oldcost < newcost) continue; trunc_y = validize_mem (trunc_y); diff --git a/gcc/fwprop.c b/gcc/fwprop.c index 5db9ed88887..236dda2dea5 100644 --- a/gcc/fwprop.c +++ b/gcc/fwprop.c @@ -409,11 +409,11 @@ should_replace_address (rtx old_rtx, rtx new_rtx, enum machine_mode mode, - address_cost (new_rtx, mode, as, speed)); /* If the addresses have equivalent cost, prefer the new address - if it has the highest `rtx_cost'. That has the potential of + if it has the highest `set_src_cost'. That has the potential of eliminating the most insns without additional costs, and it is the same that cse.c used to do. */ if (gain == 0) - gain = rtx_cost (new_rtx, SET, speed) - rtx_cost (old_rtx, SET, speed); + gain = set_src_cost (new_rtx, speed) - set_src_cost (old_rtx, speed); return (gain > 0); } @@ -963,7 +963,7 @@ try_fwprop_subst (df_ref use, rtx *loc, rtx new_rtx, rtx def_insn, bool set_reg_ multiple sets. If so, assume the cost of the new instruction is not greater than the old one. */ if (set) - old_cost = rtx_cost (SET_SRC (set), SET, speed); + old_cost = set_src_cost (SET_SRC (set), speed); if (dump_file) { fprintf (dump_file, "\nIn insn %d, replacing\n ", INSN_UID (insn)); @@ -984,7 +984,7 @@ try_fwprop_subst (df_ref use, rtx *loc, rtx new_rtx, rtx def_insn, bool set_reg_ else if (DF_REF_TYPE (use) == DF_REF_REG_USE && set - && rtx_cost (SET_SRC (set), SET, speed) > old_cost) + && set_src_cost (SET_SRC (set), speed) > old_cost) { if (dump_file) fprintf (dump_file, "Changes to insn %d not profitable\n", diff --git a/gcc/gcse.c b/gcc/gcse.c index c371f827d22..8adbc38bc0b 100644 --- a/gcc/gcse.c +++ b/gcc/gcse.c @@ -732,7 +732,7 @@ want_to_gcse_p (rtx x, int *max_distance_ptr) /* GCSE'ing constants: We do not specifically distinguish between constant and non-constant - expressions in PRE and Hoist. We use rtx_cost below to limit + expressions in PRE and Hoist. We use set_src_cost below to limit the maximum distance simple expressions can travel. Nevertheless, constants are much easier to GCSE, and, hence, @@ -773,7 +773,7 @@ want_to_gcse_p (rtx x, int *max_distance_ptr) gcc_assert (!optimize_function_for_speed_p (cfun) && optimize_function_for_size_p (cfun)); - cost = rtx_cost (x, SET, 0); + cost = set_src_cost (x, 0); if (cost < COSTS_N_INSNS (GCSE_UNRESTRICTED_COST)) { diff --git a/gcc/ifcvt.c b/gcc/ifcvt.c index 41bc0121316..cf3d245e707 100644 --- a/gcc/ifcvt.c +++ b/gcc/ifcvt.c @@ -2126,7 +2126,7 @@ noce_try_sign_mask (struct noce_if_info *if_info) && (if_info->insn_b == NULL_RTX || BLOCK_FOR_INSN (if_info->insn_b) == if_info->test_bb)); if (!(t_unconditional - || (rtx_cost (t, SET, optimize_bb_for_speed_p (if_info->test_bb)) + || (set_src_cost (t, optimize_bb_for_speed_p (if_info->test_bb)) < COSTS_N_INSNS (2)))) return FALSE; diff --git a/gcc/loop-doloop.c b/gcc/loop-doloop.c index f8429c4fd28..a7e264f2c8d 100644 --- a/gcc/loop-doloop.c +++ b/gcc/loop-doloop.c @@ -655,7 +655,7 @@ doloop_optimize (struct loop *loop) max_cost = COSTS_N_INSNS (PARAM_VALUE (PARAM_MAX_ITERATIONS_COMPUTATION_COST)); - if (rtx_cost (desc->niter_expr, SET, optimize_loop_for_speed_p (loop)) + if (set_src_cost (desc->niter_expr, optimize_loop_for_speed_p (loop)) > max_cost) { if (dump_file) diff --git a/gcc/loop-invariant.c b/gcc/loop-invariant.c index 61ca446f079..b69254b2daa 100644 --- a/gcc/loop-invariant.c +++ b/gcc/loop-invariant.c @@ -719,7 +719,7 @@ create_new_invariant (struct def *def, rtx insn, bitmap depends_on, } else { - inv->cost = rtx_cost (SET_SRC (set), SET, speed); + inv->cost = set_src_cost (SET_SRC (set), speed); inv->cheap_address = false; } diff --git a/gcc/optabs.c b/gcc/optabs.c index 99228f36d8f..195853401e5 100644 --- a/gcc/optabs.c +++ b/gcc/optabs.c @@ -1218,7 +1218,7 @@ avoid_expensive_constant (enum machine_mode mode, optab binoptab, if (mode != VOIDmode && optimize && CONSTANT_P (x) - && rtx_cost (x, binoptab->code, speed) > rtx_cost (x, SET, speed)) + && rtx_cost (x, binoptab->code, speed) > set_src_cost (x, speed)) { if (CONST_INT_P (x)) { diff --git a/gcc/postreload.c b/gcc/postreload.c index 88b401f511c..0e50d85a13c 100644 --- a/gcc/postreload.c +++ b/gcc/postreload.c @@ -275,7 +275,7 @@ reload_cse_simplify_set (rtx set, rtx insn) old_cost = register_move_cost (GET_MODE (src), REGNO_REG_CLASS (REGNO (src)), dclass); else - old_cost = rtx_cost (src, SET, speed); + old_cost = set_src_cost (src, speed); for (l = val->locs; l; l = l->next) { @@ -310,7 +310,7 @@ reload_cse_simplify_set (rtx set, rtx insn) this_rtx = GEN_INT (this_val); } #endif - this_cost = rtx_cost (this_rtx, SET, speed); + this_cost = set_src_cost (this_rtx, speed); } else if (REG_P (this_rtx)) { @@ -318,7 +318,7 @@ reload_cse_simplify_set (rtx set, rtx insn) if (extend_op != UNKNOWN) { this_rtx = gen_rtx_fmt_e (extend_op, word_mode, this_rtx); - this_cost = rtx_cost (this_rtx, SET, speed); + this_cost = set_src_cost (this_rtx, speed); } else #endif @@ -579,10 +579,12 @@ reload_cse_simplify_operands (rtx insn, rtx testreg) && recog_data.alternative_enabled_p[j] && reg_fits_class_p (testreg, rclass, 0, mode) && (!CONST_INT_P (recog_data.operand[i]) - || (rtx_cost (recog_data.operand[i], SET, - optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn))) - > rtx_cost (testreg, SET, - optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn)))))) + || (set_src_cost (recog_data.operand[i], + optimize_bb_for_speed_p + (BLOCK_FOR_INSN (insn))) + > set_src_cost (testreg, + optimize_bb_for_speed_p + (BLOCK_FOR_INSN (insn)))))) { alternative_nregs[j]++; op_alt_regno[i][j] = regno; @@ -916,12 +918,12 @@ try_replace_in_use (struct reg_use *use, rtx reg, rtx src) && CONSTANT_P (XEXP (SET_SRC (new_set), 1))) { rtx new_src; - int old_cost = rtx_cost (SET_SRC (new_set), SET, speed); + int old_cost = set_src_cost (SET_SRC (new_set), speed); gcc_assert (rtx_equal_p (XEXP (SET_SRC (new_set), 0), reg)); new_src = simplify_replace_rtx (SET_SRC (new_set), reg, src); - if (rtx_cost (new_src, SET, speed) <= old_cost + if (set_src_cost (new_src, speed) <= old_cost && validate_change (use_insn, &SET_SRC (new_set), new_src, 0)) return true; @@ -1936,7 +1938,7 @@ reload_cse_move2add (rtx first) get_full_set_rtx_cost (set, &oldcst); SET_SRC (set) = tem; - get_full_rtx_cost (tem, SET, &newcst); + get_full_set_src_cost (tem, &newcst); SET_SRC (set) = old_src; costs_add_n_insns (&oldcst, 1); diff --git a/gcc/reload1.c b/gcc/reload1.c index ba6ce37da9d..7e4e092d469 100644 --- a/gcc/reload1.c +++ b/gcc/reload1.c @@ -1646,8 +1646,7 @@ calculate_elim_costs_all_insns (void) { rtx t = eliminate_regs_1 (SET_SRC (set), VOIDmode, insn, false, true); - int cost = rtx_cost (t, SET, - optimize_bb_for_speed_p (bb)); + int cost = set_src_cost (t, optimize_bb_for_speed_p (bb)); int freq = REG_FREQ_FROM_BB (bb); reg_equiv_init_cost[regno] = cost * freq; @@ -2505,7 +2504,7 @@ note_reg_elim_costly (rtx *px, void *data) { rtx t = reg_equiv_invariant (REGNO (x)); rtx new_rtx = eliminate_regs_1 (t, Pmode, insn, true, true); - int cost = rtx_cost (new_rtx, SET, optimize_bb_for_speed_p (elim_bb)); + int cost = set_src_cost (new_rtx, optimize_bb_for_speed_p (elim_bb)); int freq = REG_FREQ_FROM_BB (elim_bb); if (cost != 0) diff --git a/gcc/rtl.h b/gcc/rtl.h index 84166c47fc2..4f126865dea 100644 --- a/gcc/rtl.h +++ b/gcc/rtl.h @@ -1234,6 +1234,24 @@ get_full_set_rtx_cost (rtx x, struct full_rtx_costs *c) { get_full_rtx_cost (x, INSN, c); } + +/* Return the cost of moving X into a register, relative to the cost + of a register move. SPEED_P is true if optimizing for speed rather + than size. */ + +static inline int +set_src_cost (rtx x, bool speed_p) +{ + return rtx_cost (x, SET, speed_p); +} + +/* Like set_src_cost, but return both the speed and size costs in C. */ + +static inline void +get_full_set_src_cost (rtx x, struct full_rtx_costs *c) +{ + get_full_rtx_cost (x, SET, c); +} #endif /* 1 if RTX is a subreg containing a reg that is already known to be diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c index 4b71b1ed879..348371d2ddb 100644 --- a/gcc/rtlanal.c +++ b/gcc/rtlanal.c @@ -4782,7 +4782,7 @@ insn_rtx_cost (rtx pat, bool speed) else return 0; - cost = rtx_cost (SET_SRC (set), SET, speed); + cost = set_src_cost (SET_SRC (set), speed); return cost > 0 ? cost : COSTS_N_INSNS (1); } diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index 2d7d8dd03f9..eb328e521d4 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -2033,7 +2033,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, coeff = immed_double_int_const (val, mode); tem = simplify_gen_binary (MULT, mode, lhs, coeff); - return rtx_cost (tem, SET, speed) <= rtx_cost (orig, SET, speed) + return set_src_cost (tem, speed) <= set_src_cost (orig, speed) ? tem : 0; } } @@ -2214,7 +2214,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode, coeff = immed_double_int_const (val, mode); tem = simplify_gen_binary (MULT, mode, lhs, coeff); - return rtx_cost (tem, SET, speed) <= rtx_cost (orig, SET, speed) + return set_src_cost (tem, speed) <= set_src_cost (orig, speed) ? tem : 0; } } diff --git a/gcc/stmt.c b/gcc/stmt.c index be21a5708cf..06d60762011 100644 --- a/gcc/stmt.c +++ b/gcc/stmt.c @@ -2134,8 +2134,8 @@ bool lshift_cheap_p (void) if (!init[speed_p]) { rtx reg = gen_rtx_REG (word_mode, 10000); - int cost = rtx_cost (gen_rtx_ASHIFT (word_mode, const1_rtx, reg), SET, - speed_p); + int cost = set_src_cost (gen_rtx_ASHIFT (word_mode, const1_rtx, reg), + speed_p); cheap[speed_p] = cost < COSTS_N_INSNS (3); init[speed_p] = true; } diff --git a/gcc/tree-ssa-loop-ivopts.c b/gcc/tree-ssa-loop-ivopts.c index 6cf14383f6c..c9398270d28 100644 --- a/gcc/tree-ssa-loop-ivopts.c +++ b/gcc/tree-ssa-loop-ivopts.c @@ -2754,7 +2754,7 @@ seq_cost (rtx seq, bool speed) { set = single_set (seq); if (set) - cost += rtx_cost (SET_SRC (set), SET, speed); + cost += set_src_cost (SET_SRC (set), speed); else cost++; } @@ -2876,7 +2876,7 @@ computation_cost (tree expr, bool speed) cost += address_cost (XEXP (rslt, 0), TYPE_MODE (type), TYPE_ADDR_SPACE (type), speed); else if (!REG_P (rslt)) - cost += rtx_cost (rslt, SET, speed); + cost += set_src_cost (rslt, speed); return cost; } |