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2014-09-05Add phantom slice support on IVB+Zhong Li1-0/+12
HW requires driver to add a phantom slice when FirstMbX and FirstMbY are not 0, in order to avc decoding error concealment. Otherwise, GPU may hang. This patch is a workround for bug: https://bugs.freedesktop.org/show_bug.cgi?id=81447 v1->v2: Follow haihao's suggestion to use common funcion of gen6 phantom slice. v2->v3: Remove an extraneous newline. Signed-off-by: Zhong Li <zhong.li@intel.com> Reviewed-by: Xiang Haihao <haihao.xiang@intel.com> Gwenole Beauchesne <gwenole.beauchesne@intel.com> (cherry picked from commit 9672c5ab17c32f25ce1bbdb883abda689440b116)
2014-06-16decoder: h264: fix frame store logic for MVC.Gwenole Beauchesne1-1/+3
In strict MVC decoding mode, when only the necessary set of inter-view reference pictures are passed to the ReferenceFrames array for decoding the current picture, we should not re-use a frame store id that might be needed for decoding another view component in the same access unit. One way to solve this problem is to track when the VA surface in a specified frame store id was last referenced. So, a "ref_age" field is introduced to the GenFrameStore struct and is updated whenever the surface is being referenced. Additionally, the list of retired refs candidates (free_refs) is kept ordered by increasing ref_age. That way, we can immediately know what is the oldest frame store id to recycle. Let deltaAge = CurrAge - RefAge: If deltaAge > 1, we know for sure that the VA surface is gone ; If deltaAge = 1, the surface could be re-used for inter prediction ; If deltaAge = 0, the surface could be re-used for inter-view prediction. The ref_age in each Frame Store entry is always current, i.e. it is the same for all reference frames that intervened in the decoding process of all inter view components of the previous access unit. The age tracks access units. v2: used a more correct representation of age, instead of POC [Yakui] v3: minor optimization for detecting changes of access unit [Haihao] Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com> (cherry picked from commit 3b5eb0522fbfe1220dcd0c0bb093a93cfc25e22c)
2014-06-16surface: drop SURFACE_DISPLAYED flag.Gwenole Beauchesne1-2/+4
The optimization by which the VA surface storage is deallocated after it is displayed and not used for reference or vaDeriveImage() purposes cannot be implemented safely. We need to honour explicit lifetimes defined by the upper codec layer. Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com> (cherry picked from commit 84926ace7a2c5b88df1ada167a1c273128469aad)
2014-06-16decoder: h264: expose the set of supported MVC profiles.Gwenole Beauchesne1-0/+2
H.264 MVC decoding support is defined as follows: - Stereo High profile on Sandybridge and newer ; - Multiview High profile on Haswell and newer. Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com> (cherry picked from commit 1f244834dedb7b46863b315a898d8649d01c5f58) Conflicts: src/i965_device_info.c src/i965_drv_video.c src/va_backend_compat.h
2014-06-16decoder: h264: factor out look ups for VA/H264 picture info.Gwenole Beauchesne1-19/+7
Add new avc_find_picture() helper function to search for a VAPictureH264 struct based on the supplied VA surface id. Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com> (cherry picked from commit 3f4f9fc2893af24b7e88f44b6350a5a74d49f0c2)
2014-06-16Define i965_CreateSurfaces in header file explicitly to avoid multiple ↵Zhao Yakui1-8/+0
declaration Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> (cherry picked from commit 8b3945aa5df443e93a3f5e6e97dffb1574e2a936)
2014-06-06mpeg2: calculate the slice data length on IVBXiang, Haihao1-2/+27
Sometimes pending datas are added in slice data buffer, however HW requires slice data length excludes pending datas, otherwise the behavior is undefined https://bugs.freedesktop.org/show_bug.cgi?id=77041 Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> (cherry picked from commit a9004e6c5c7f33cd1e33e4dab92a5a0017714bbd)
2014-06-02decoder: h264: optimize support for grayscale surfaces.Gwenole Beauchesne1-1/+5
Optimize support for grayscale surfaces in two aspects: (i) space by only allocating the luminance component ; (ii) speed by avoiding initialization of the (now inexistent) chrominance planes. Keep backward compatibility with older codec layers that only supported YUV 4:2:0 and not grayscale formats properly. v2: fix check for extra H.264 chroma formats [Haihao] Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
2014-06-02decoder: h264: factor out allocation of reconstructed surfaces.Gwenole Beauchesne1-11/+1
Add new avc_ensure_surface_bo() helper function to factor out the allocatiion and initialization processes of the reconstructed VA surface buffer stores. Keep preferred native format (NV12) and initialize chroma values to 0.0 (0x80) when needed for "fake" grayscale (Y800) surfaces implemented on top of existing NV12. Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
2014-05-26Simplify some macrosXiang, Haihao1-2/+2
Now it can directly use the information in intel_device_info instead of checking the pci id. Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> (cherry picked from commit f1b3f83953cd5f6e39900d98b4858a7cb825dee0) Conflicts: src/gen8_post_processing.c src/i965_post_processing.c src/intel_driver.h
2014-04-23Use the VA_FOURCC_ABCD constant to replace the VA_FOURCC(A,B,C,D)Zhao Yakui1-13/+13
This is helpful to avoid the typo error when using VA_FOURCC(A, B, C, D). Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> (cherry picked from commit acea969011bceee36a57fe2c0e4ee96c0c5e79c7)
2014-04-23Define i965_DestroySurfaces in header file explicitly to avoid multiple ↵Zhao Yakui1-4/+0
declaration Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> (cherry picked from commit af0687252bfc6f81ff5361feedba7ec8989b3555)
2014-02-27Update the MFX_AVC_IMAGE_STATE to follow the specZhao Yakui1-2/+2
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
2013-12-03H.264: Support Constrained Baseline profile instead of Baseline profileXiang, Haihao1-2/+2
GENx doesn't support FMO/ASO, so remove the support of Baseline profile for conformance testing. In addition, add the support for Constrained Baseline profile. Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2013-06-21Update the supported render target format and pixel formatXiang, Haihao1-17/+26
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2013-05-20Use IMC3 for JPEG decodingXiang, Haihao1-1/+1
To match the pre-defined VA FOURCC in va.h Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2013-04-03Merge branch 'master' into stagingXiang, Haihao1-30/+2
Conflicts: NEWS configure.ac src/Makefile.am src/gen6_mfc.c src/gen6_mfd.c src/gen6_vme.c src/gen6_vme.h src/gen75_mfc.c src/gen75_mfd.c src/gen75_vme.c src/gen75_vpp_vebox.c src/gen75_vpp_vebox.h src/gen7_mfd.c src/i965_avc_bsd.c src/i965_decoder.h src/i965_decoder_utils.c src/i965_defines.h src/i965_drv_video.c src/i965_drv_video.h src/i965_encoder.c src/i965_encoder.h src/i965_output_dri.c src/i965_post_processing.c src/i965_post_processing.h src/i965_render.c src/i965_structs.h src/intel_driver.c src/object_heap.c src/shaders/post_processing/Common/AYUV_Load_16x8.asm src/shaders/post_processing/Common/AYUV_Load_16x8.inc src/shaders/post_processing/Common/Init_All_Regs.asm src/shaders/post_processing/Makefile.am src/shaders/post_processing/gen5_6/Common/AYUV_Load_16x8.asm src/shaders/post_processing/gen5_6/Common/AYUV_Load_16x8.inc src/shaders/post_processing/gen5_6/Common/Init_All_Regs.asm src/shaders/post_processing/gen5_6/Common/NV12_Load_8x4.asm src/shaders/post_processing/gen5_6/Common/RGBX_Load_16x8.asm src/shaders/post_processing/gen5_6/Common/RGBX_Load_16x8.inc src/shaders/post_processing/gen5_6/Makefile.am src/shaders/post_processing/gen5_6/nv12_avs_nv12.g4b.gen5 src/shaders/post_processing/gen5_6/nv12_avs_nv12.g6b src/shaders/post_processing/gen5_6/nv12_dn_nv12.g4b.gen5 src/shaders/post_processing/gen5_6/nv12_dn_nv12.g6b src/shaders/post_processing/gen5_6/nv12_dndi_nv12.g4b.gen5 src/shaders/post_processing/gen5_6/nv12_dndi_nv12.g6b src/shaders/post_processing/gen5_6/nv12_load_save_nv12.g4b.gen5 src/shaders/post_processing/gen5_6/nv12_load_save_nv12.g6b src/shaders/post_processing/gen5_6/nv12_load_save_pa.g4b.gen5 src/shaders/post_processing/gen5_6/nv12_load_save_pa.g6b src/shaders/post_processing/gen5_6/nv12_load_save_pl3.g4b.gen5 src/shaders/post_processing/gen5_6/nv12_load_save_pl3.g6b src/shaders/post_processing/gen5_6/pa_load_save_nv12.g4b.gen5 src/shaders/post_processing/gen5_6/pa_load_save_nv12.g6b src/shaders/post_processing/gen5_6/pa_load_save_pl3.g4b.gen5 src/shaders/post_processing/gen5_6/pa_load_save_pl3.g6b src/shaders/post_processing/gen5_6/pl3_load_save_nv12.g4b.gen5 src/shaders/post_processing/gen5_6/pl3_load_save_nv12.g6b src/shaders/post_processing/gen5_6/pl3_load_save_pa.g4b.gen5 src/shaders/post_processing/gen5_6/pl3_load_save_pa.g6b src/shaders/post_processing/gen5_6/pl3_load_save_pl3.g4b.gen5 src/shaders/post_processing/gen5_6/pl3_load_save_pl3.g6b src/shaders/post_processing/gen7/EOT.g4a src/shaders/post_processing/gen7/Makefile.am src/shaders/post_processing/gen7/PA_AVS_Buf_0.g4a src/shaders/post_processing/gen7/PA_AVS_Buf_1.g4a src/shaders/post_processing/gen7/PA_AVS_Buf_2.g4a src/shaders/post_processing/gen7/PA_AVS_Buf_3.g4a src/shaders/post_processing/gen7/PL2_AVS_Buf_0.g4a src/shaders/post_processing/gen7/PL2_AVS_Buf_1.g4a src/shaders/post_processing/gen7/PL2_AVS_Buf_2.g4a src/shaders/post_processing/gen7/PL2_AVS_Buf_3.g4a src/shaders/post_processing/gen7/PL3_AVS_Buf_0.g4a src/shaders/post_processing/gen7/PL3_AVS_Buf_1.g4a src/shaders/post_processing/gen7/PL3_AVS_Buf_2.g4a src/shaders/post_processing/gen7/PL3_AVS_Buf_3.g4a src/shaders/post_processing/gen7/Save_AVS_NV12.g4a src/shaders/post_processing/gen7/Save_AVS_PA.g4a src/shaders/post_processing/gen7/Save_AVS_PL3.g4a src/shaders/post_processing/gen7/Save_AVS_RGB.g4a src/shaders/post_processing/gen7/Set_AVS_Buf_0123_BGRA.g4a src/shaders/post_processing/gen7/Set_AVS_Buf_0123_PL2.g4a src/shaders/post_processing/gen7/Set_AVS_Buf_0123_PL3.g4a src/shaders/post_processing/gen7/Set_AVS_Buf_0123_VUYA.g4a src/shaders/post_processing/gen7/Set_AVS_Buf_0123_VYUA.g4a src/shaders/post_processing/gen7/Set_Layer_0.g4a src/shaders/post_processing/gen7/VP_Setup.g4a src/shaders/vme/Makefile.am src/shaders/vme/inter_frame_haswell.asm src/shaders/vme/inter_frame_haswell.g75b src/shaders/vme/intra_frame_haswell.asm src/shaders/vme/intra_frame_haswell.g75b src/shaders/vme/vme75.inc src/shaders/vme/vme7_mpeg2.inc
2013-03-15Fix potential buffer overflow for JPEG decodingXiang, Haihao1-1/+7
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2013-03-15Decoder: use surface object for the workaroundXiang, Haihao1-3/+4
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2013-03-15Decoder: directly use surface object for decodingXiang, Haihao1-168/+31
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2013-03-15Decoder: check whether the surface for decoding output is validXiang, Haihao1-21/+20
In addition, uses the corresponding surface object directly. Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2013-03-15Return the status when running the pipelineXiang, Haihao1-1/+3
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2013-03-12Fix H264 YUV400 surface render issue on IVBLi Xiaowei1-0/+11
All decoded frame are considered as NV12 format in driver, for YUV400 stream format decoding senerios, we need set the chroma component of NV12 to a constant value(0x80), otherwise the converted ARGB from NV12 format is not correct and cause blue screen when rending. Signed-off-by: Li Xiaowei <xiaowei.a.li@intel.com>
2013-02-22Update the size of DMV buffer for H.264 decoding on IVBXiang, Haihao1-2/+2
It is at least width_in_mbs * align(height_in_mbs, 2) * 64. Use width_in_mbs * (height_in_mbs + 1) * 64 in the driver. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=59050 Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> (cherry picked from commit 00f65b78e6de520a4820702207ce098c6b073724)
2013-02-22Update the size of DMV buffer for H.264 decoding on IVBXiang, Haihao1-2/+2
It is at least width_in_mbs * align(height_in_mbs, 2) * 64. Use width_in_mbs * (height_in_mbs + 1) * 64 in the driver. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=59050 Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2013-01-23Fill the bitplane for VC1 skip picture decodingLi, Xiaowei A1-2/+8
This is a workaround for VC1 skip picture, the corresponding bit value in bitplane should be 1 for skip picture, but sometimes application pass down wrong value. Signed-off-by: Li,Xiaowei <xiaowei.a.li@intel.com> (cherry picked from commit a76acf6441a414bb5dd601485ed8ed790218bb13)
2013-01-23Enlarge deblocking filter row store for VC-1 decodingXiang, Haihao1-1/+1
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> (cherry picked from commit e8d3f90fc18ca3726e6b34156ba56ee92c2a2524)
2013-01-23Enlarge deblocking filter row store for VC-1 decodingXiang, Haihao1-1/+1
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2013-01-09Use the internal CondOver flagXiang, Haihao1-4/+4
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> (cherry picked from commit 2cb319923b6ae5c1b2c643534d7a97911b9bd54e)
2013-01-09No overlap smoothing for B frame in Main and Simple profilesXiang, Haihao1-2/+3
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=58448 Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> (cherry picked from commit 660cb88ec00a896eefc9580e691d0a07fb2870ec)
2013-01-09Use the internal CondOver flagXiang, Haihao1-4/+4
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2013-01-09No overlap smoothing for B frame in Main and Simple profilesXiang, Haihao1-2/+3
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=58448 Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2013-01-09workaround to set VC1 overlap filter flagLi, Xiaowei A1-3/+20
Signed-off-by: Li,Xiaowei <xiaowei.a.li@intel.com> (cherry picked from commit a6dfb8f7fb601f102b414ac0c9088b5b8e88060f)
2013-01-08Always set Fix_Prev_Mb_skipped in AVC_BSD_OBJECT commandXiang, Haihao1-0/+1
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57720 Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> (cherry picked from commit f750d1b69e1aae65463eab224013b506481d8459)
2013-01-08Always set Fix_Prev_Mb_skipped in AVC_BSD_OBJECT commandXiang, Haihao1-0/+1
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57720 Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2012-12-28h264: fix first macroblock bit offset calculation (ILK, SNB, IVB).Gwenole Beauchesne1-30/+7
Fix and simplify the scan for emulation_prevention_bytes, thus avoiding a read beyond the end of the slice data buffer. Besides, if slice_header() bytes are needed, use dri_bo_get_subdata() instead. HW specific changes: - SNB: make the HW skip the emulation prevention bytes itself. - IVB: fix MFD_AVC_BSD_OBJECT to report the actual slice data buffer size. Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com> (cherry picked from commit 9b7863bf49dcf8bf1de9b45ce4e986dfd1cca418)
2012-12-17workaround to set VC1 overlap filter flagLi, Xiaowei A1-3/+20
Signed-off-by: Li,Xiaowei <xiaowei.a.li@intel.com>
2012-12-17Fill the bitplane for VC1 skip picture decodingLi, Xiaowei A1-2/+8
This is a workaround for VC1 skip picture, the corresponding bit value in bitplane should be 1 for skip picture, but sometimes application pass down wrong value. Signed-off-by: Li,Xiaowei <xiaowei.a.li@intel.com>
2012-12-14vc1: fix bitplane buffer size (SNB, IVB).Gwenole Beauchesne1-1/+1
This fixes buffer overflow in the newly allocated Gen buffer that holds VC-1 bitplanes. Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
2012-11-01Warning fixesXiang, Haihao1-20/+0
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2012-11-01Allow to create batchbuffer based on the expected buffer sizeZhao Yakui1-1/+1
This is to support the 4Kx4K encoding on Haswell. Otherwise the default batch buffer size can't hold the encoding command for 4Kx4K encoding. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
2012-10-31Avoid the dup of gen_free_avc_surface during compileZhao Yakui1-4/+0
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
2012-10-31Allow to create batchbuffer based on the expected buffer sizeZhao Yakui1-1/+1
This is to support the 4Kx4K encoding on Haswell. Otherwise the default batch buffer size can't hold the encoding command for 4Kx4K encoding. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
2012-10-31Unify the XXX_free_avc_surface for media encoding/decodingZhao Yakui1-0/+1
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
2012-10-31Unify the code for xxx_free_avc_surfaceXiang, Haihao1-21/+8
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2012-10-24Unify the code for xxx_free_avc_surfaceXiang, Haihao1-21/+8
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2012-10-23haswell: fix MPEG-2 decoding.Gwenole Beauchesne1-1/+11
Fix MPEG-2 decoding, though disable error concealment logic for now. Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
2012-10-08Fix build with VA-API 0.32.0.Gwenole Beauchesne1-0/+4
Really fix build back to VA-API 0.32.0, and not only VA-API 0.32.1, thus checking for VA/JPEG decode API. VA-API 0.32.0 was provided by libva 1.0.15 and earlier version, which is still available in Ubuntu 12.04-LTS. Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
2012-10-08Add sysdeps.h for system-dependent definitions.Gwenole Beauchesne1-7/+1
Add new "sysdeps.h" file for system-dependent definitions and common include files. This will be helpful for Android support so that to stack every definition useful to Android that could not be auto-generated since configure script is not built there. Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
2012-09-27fix ttmbf/ttfrm when vstransform is 0Zhao Halley1-1/+12
(cherry picked from commit c7d23b1e9376808dfa88192ee66a1af5acdf3b16)
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