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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Most OSVs adopted XXX-intel-driver as their shipping packages for the
Intel VA driver, with XXX = { vaapi, libva }. Adopt libva-intel-driver
from now on for upstream packages too.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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Sync changes from 1.0.x series.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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Correctly emit slice_vertical_position, as per the definition from
the bitstream, to the HW decoder (MFD_MPEG2_BSD_OBJECT).
Add workaround for players that have not fixed their usage of
slice_vertical_position. That field shall represent the slice vertical
position as it comes from the bitstream.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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Handle bob-deinterlacing flags passed to vaPutSurface().
i.e. VA_TOP_FIELD|VA_BOTTOM_FIELD.
Avoid advanced deinterlacing kernels as they allocate extra temporary
surfaces, which are useless for such simple tasks. i.e. display either
field of an interlaced surface.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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Implicit weight tables derivation (weighted_bipred_idc == 2) could
not be set. Only default weight tables were possible instead of
explicit weight tables provided by the codec layer.
https://bugs.freedesktop.org/show_bug.cgi?id=40820
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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Fix and simplify the scan for emulation_prevention_bytes, thus avoiding
a read beyond the end of the slice data buffer. Besides, if slice_header()
bytes are needed, use dri_bo_get_subdata() instead.
HW specific changes:
- SNB: make the HW skip the emulation prevention bytes itself.
- IVB: fix MFD_AVC_BSD_OBJECT to report the actual slice data buffer size.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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This fixes buffer overflow in the newly allocated Gen buffer that holds
VC-1 bitplanes.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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If codec layer does not provide a VAIQMatrixBufferH264, this means
flat scaling lists shall be used. The MFX_QM_STATE command still has
to be submitted since IVB+ does not have a means to use HW generated
scaling lists.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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Original code was parsing RefPicList0/1 over what is actually available
and filled in, i.e. wrt. num_ref_idx_l0/1_minus1 + 1. Besides, bit 5 of
Reference List Entry set to 1 means a frame, not a field.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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