diff options
| -rw-r--r-- | src/i965_defines.h | 3 | ||||
| -rw-r--r-- | src/i965_render.c | 7 |
2 files changed, 8 insertions, 2 deletions
diff --git a/src/i965_defines.h b/src/i965_defines.h index 66e8e89..e5aa247 100644 --- a/src/i965_defines.h +++ b/src/i965_defines.h @@ -234,7 +234,8 @@ # define GEN7_PS_FLOATING_POINT_MODE_ALT (1 << 16) /* DW3: scratch space */ /* DW4 */ -# define GEN7_PS_MAX_THREADS_SHIFT 24 +# define GEN7_PS_MAX_THREADS_SHIFT_IVB 24 +# define GEN7_PS_MAX_THREADS_SHIFT_HSW 23 # define GEN7_PS_PUSH_CONSTANT_ENABLE (1 << 11) # define GEN7_PS_ATTRIBUTE_ENABLE (1 << 10) # define GEN7_PS_OMASK_TO_RENDER_TARGET (1 << 9) diff --git a/src/i965_render.c b/src/i965_render.c index 727b96e..b7267c8 100644 --- a/src/i965_render.c +++ b/src/i965_render.c @@ -2733,6 +2733,11 @@ gen7_emit_wm_state(VADriverContextP ctx, int kernel) struct i965_driver_data *i965 = i965_driver_data(ctx); struct intel_batchbuffer *batch = i965->batch; struct i965_render_state *render_state = &i965->render_state; + unsigned int max_threads_shift = GEN7_PS_MAX_THREADS_SHIFT_IVB; + + if (IS_HASWELL(i965->intel.device_id)) { + max_threads_shift = GEN7_PS_MAX_THREADS_SHIFT_HSW; + } BEGIN_BATCH(batch, 3); OUT_BATCH(batch, GEN6_3DSTATE_WM | (3 - 2)); @@ -2766,7 +2771,7 @@ gen7_emit_wm_state(VADriverContextP ctx, int kernel) (5 << GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT)); OUT_BATCH(batch, 0); /* scratch space base offset */ OUT_BATCH(batch, - ((86 - 1) << GEN7_PS_MAX_THREADS_SHIFT) | + ((86 - 1) << max_threads_shift) | GEN7_PS_PUSH_CONSTANT_ENABLE | GEN7_PS_ATTRIBUTE_ENABLE | GEN7_PS_16_DISPATCH_ENABLE); |