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-rw-r--r--src/i965_render.c16
-rw-r--r--src/shaders/render/exa_wm.g4i52
-rw-r--r--src/shaders/render/exa_wm_src_affine.g4b12
-rw-r--r--src/shaders/render/exa_wm_src_affine.g4b.gen512
-rw-r--r--src/shaders/render/exa_wm_src_affine.g6a3
-rw-r--r--src/shaders/render/exa_wm_src_affine.g6b8
-rw-r--r--src/shaders/render/exa_wm_src_affine.g7a2
-rw-r--r--src/shaders/render/exa_wm_src_affine.g7b8
-rw-r--r--src/shaders/render/exa_wm_xy.g4b4
-rw-r--r--src/shaders/render/exa_wm_xy.g4b.gen54
10 files changed, 60 insertions, 61 deletions
diff --git a/src/i965_render.c b/src/i965_render.c
index b4fd29b..0777ce0 100644
--- a/src/i965_render.c
+++ b/src/i965_render.c
@@ -55,7 +55,7 @@ static const uint32_t sf_kernel_static[][4] =
#include "shaders/render/exa_sf.g4b"
};
-#define PS_KERNEL_NUM_GRF 32
+#define PS_KERNEL_NUM_GRF 48
#define PS_MAX_THREADS 32
#define I965_GRF_BLOCKS(nreg) ((nreg + 15) / 16 - 1)
@@ -308,8 +308,8 @@ static struct i965_kernel render_kernels_gen7_haswell[] = {
#define URB_SF_ENTRIES 1
#define URB_SF_ENTRY_SIZE 2
-#define URB_CS_ENTRIES 1
-#define URB_CS_ENTRY_SIZE 1
+#define URB_CS_ENTRIES 4
+#define URB_CS_ENTRY_SIZE 4
static void
i965_render_vs_unit(VADriverContextP ctx)
@@ -445,8 +445,8 @@ i965_subpic_render_wm_unit(VADriverContextP ctx)
wm_state->thread2.scratch_space_base_pointer = 0;
wm_state->thread2.per_thread_scratch_space = 0; /* 1024 bytes */
- wm_state->thread3.dispatch_grf_start_reg = 3; /* XXX */
- wm_state->thread3.const_urb_entry_read_length = 0;
+ wm_state->thread3.dispatch_grf_start_reg = 2; /* XXX */
+ wm_state->thread3.const_urb_entry_read_length = 4;
wm_state->thread3.const_urb_entry_read_offset = 0;
wm_state->thread3.urb_entry_read_length = 1; /* XXX */
wm_state->thread3.urb_entry_read_offset = 0; /* XXX */
@@ -510,7 +510,7 @@ i965_render_wm_unit(VADriverContextP ctx)
wm_state->thread2.per_thread_scratch_space = 0; /* 1024 bytes */
wm_state->thread3.dispatch_grf_start_reg = 2; /* XXX */
- wm_state->thread3.const_urb_entry_read_length = 1;
+ wm_state->thread3.const_urb_entry_read_length = 4;
wm_state->thread3.const_urb_entry_read_offset = 0;
wm_state->thread3.urb_entry_read_length = 1; /* XXX */
wm_state->thread3.urb_entry_read_offset = 0; /* XXX */
@@ -2071,7 +2071,7 @@ gen6_emit_wm_state(VADriverContextP ctx, int kernel)
OUT_RELOC(batch,
render_state->curbe.bo,
I915_GEM_DOMAIN_INSTRUCTION, 0,
- 0);
+ (URB_CS_ENTRY_SIZE-1));
OUT_BATCH(batch, 0);
OUT_BATCH(batch, 0);
OUT_BATCH(batch, 0);
@@ -2837,7 +2837,7 @@ gen7_emit_wm_state(VADriverContextP ctx, int kernel)
BEGIN_BATCH(batch, 7);
OUT_BATCH(batch, GEN6_3DSTATE_CONSTANT_PS | (7 - 2));
- OUT_BATCH(batch, 1);
+ OUT_BATCH(batch, URB_CS_ENTRY_SIZE);
OUT_BATCH(batch, 0);
OUT_RELOC(batch,
render_state->curbe.bo,
diff --git a/src/shaders/render/exa_wm.g4i b/src/shaders/render/exa_wm.g4i
index dd47d51..e186d3a 100644
--- a/src/shaders/render/exa_wm.g4i
+++ b/src/shaders/render/exa_wm.g4i
@@ -1,5 +1,5 @@
/*
- * Copyright © 2006 Intel Corporation
+ * Copyright © 2006-2013 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -39,39 +39,43 @@ define(`screen_y0', `g1.4<0,1,0>F')
define(`interleaved_uv', `g2.0<0,1,0>UW')
/* Source transformation parameters */
-define(`src_du_dx', `g3.0<0,1,0>F')
-define(`src_du_dy', `g3.4<0,1,0>F')
-define(`src_uo', `g3.12<0,1,0>F')
-define(`src_dv_dx', `g3.16<0,1,0>F')
-define(`src_dv_dy', `g3.20<0,1,0>F')
-define(`src_vo', `g3.28<0,1,0>F')
-define(`src_dw_dx', `g4.0<0,1,0>F')
-define(`src_dw_dy', `g4.4<0,1,0>F')
-define(`src_wo', `g4.12<0,1,0>F')
-
-define(`mask_du_dx', `g5.0<0,1,0>F')
-define(`mask_du_dy', `g5.4<0,1,0>F')
-define(`mask_uo', `g5.12<0,1,0>F')
-define(`mask_dv_dx', `g5.16<0,1,0>F')
-define(`mask_dv_dy', `g5.20<0,1,0>F')
-define(`mask_vo', `g5.28<0,1,0>F')
-define(`mask_dw_dx', `g6.0<0,1,0>F')
-define(`mask_dw_dy', `g6.4<0,1,0>F')
-define(`mask_wo', `g6.12<0,1,0>F')
+define(`src_du_dx', `g6.0<0,1,0>F')
+define(`src_du_dy', `g6.4<0,1,0>F')
+define(`src_uo', `g6.12<0,1,0>F')
+define(`src_dv_dx', `g6.16<0,1,0>F')
+define(`src_dv_dy', `g6.20<0,1,0>F')
+define(`src_vo', `g6.28<0,1,0>F')
+define(`src_dw_dx', `g7.0<0,1,0>F')
+define(`src_dw_dy', `g7.4<0,1,0>F')
+define(`src_wo', `g7.12<0,1,0>F')
+
+define(`mask_du_dx', `g8.0<0,1,0>F')
+define(`mask_du_dy', `g8.4<0,1,0>F')
+define(`mask_uo', `g8.12<0,1,0>F')
+define(`mask_dv_dx', `g8.16<0,1,0>F')
+define(`mask_dv_dy', `g8.20<0,1,0>F')
+define(`mask_vo', `g8.28<0,1,0>F')
+define(`mask_dw_dx', `g9.0<0,1,0>F')
+define(`mask_dw_dy', `g9.4<0,1,0>F')
+define(`mask_wo', `g9.12<0,1,0>F')
+
+/* Attribute for snb+ */
+define(`a0_a_x',`g10.0<0,1,0>F')
+define(`a0_a_y',`g10.16<0,1,0>F')
/*
* Local variables. Pairs must be aligned on even reg boundry
*/
/* this holds the X dest coordinates */
-define(`dst_x', `g8')
+define(`dst_x', `g42')
define(`dst_x_0', `dst_x')
-define(`dst_x_1', `g9')
+define(`dst_x_1', `g43')
/* this holds the Y dest coordinates */
-define(`dst_y', `g10')
+define(`dst_y', `g44')
define(`dst_y_0', `dst_y')
-define(`dst_y_1', `g11')
+define(`dst_y_1', `g45')
/* When computing x * dn/dx, use this */
define(`temp_x', `g30')
diff --git a/src/shaders/render/exa_wm_src_affine.g4b b/src/shaders/render/exa_wm_src_affine.g4b
index d30da87..7507b72 100644
--- a/src/shaders/render/exa_wm_src_affine.g4b
+++ b/src/shaders/render/exa_wm_src_affine.g4b
@@ -1,8 +1,8 @@
- { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000060 },
- { 0x00802041, 0x238077bd, 0x008d0140, 0x00000064 },
+ { 0x00802041, 0x23c077bd, 0x008d0540, 0x000000c0 },
+ { 0x00802041, 0x238077bd, 0x008d0580, 0x000000c4 },
{ 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 },
- { 0x00802040, 0x204077be, 0x008d03c0, 0x0000006c },
- { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000070 },
- { 0x00802041, 0x238077bd, 0x008d0140, 0x00000074 },
+ { 0x00802040, 0x204077be, 0x008d03c0, 0x000000cc },
+ { 0x00802041, 0x23c077bd, 0x008d0540, 0x000000d0 },
+ { 0x00802041, 0x238077bd, 0x008d0580, 0x000000d4 },
{ 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 },
- { 0x00802040, 0x208077be, 0x008d03c0, 0x0000007c },
+ { 0x00802040, 0x208077be, 0x008d03c0, 0x000000dc },
diff --git a/src/shaders/render/exa_wm_src_affine.g4b.gen5 b/src/shaders/render/exa_wm_src_affine.g4b.gen5
index d30da87..7507b72 100644
--- a/src/shaders/render/exa_wm_src_affine.g4b.gen5
+++ b/src/shaders/render/exa_wm_src_affine.g4b.gen5
@@ -1,8 +1,8 @@
- { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000060 },
- { 0x00802041, 0x238077bd, 0x008d0140, 0x00000064 },
+ { 0x00802041, 0x23c077bd, 0x008d0540, 0x000000c0 },
+ { 0x00802041, 0x238077bd, 0x008d0580, 0x000000c4 },
{ 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 },
- { 0x00802040, 0x204077be, 0x008d03c0, 0x0000006c },
- { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000070 },
- { 0x00802041, 0x238077bd, 0x008d0140, 0x00000074 },
+ { 0x00802040, 0x204077be, 0x008d03c0, 0x000000cc },
+ { 0x00802041, 0x23c077bd, 0x008d0540, 0x000000d0 },
+ { 0x00802041, 0x238077bd, 0x008d0580, 0x000000d4 },
{ 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 },
- { 0x00802040, 0x208077be, 0x008d03c0, 0x0000007c },
+ { 0x00802040, 0x208077be, 0x008d03c0, 0x000000dc },
diff --git a/src/shaders/render/exa_wm_src_affine.g6a b/src/shaders/render/exa_wm_src_affine.g6a
index 568aef3..04358cb 100644
--- a/src/shaders/render/exa_wm_src_affine.g6a
+++ b/src/shaders/render/exa_wm_src_affine.g6a
@@ -35,9 +35,6 @@ define(`vh', `m5')
define(`bl', `g2.0<8,8,1>F')
define(`bh', `g4.0<8,8,1>F')
-define(`a0_a_x',`g7.0<0,1,0>F')
-define(`a0_a_y',`g7.16<0,1,0>F')
-
/* U */
pln (8) ul<1>F a0_a_x bl { align1 }; /* pixel 0-7 */
pln (8) uh<1>F a0_a_x bh { align1 }; /* pixel 8-15 */
diff --git a/src/shaders/render/exa_wm_src_affine.g6b b/src/shaders/render/exa_wm_src_affine.g6b
index 5d0ffcc..22c1d22 100644
--- a/src/shaders/render/exa_wm_src_affine.g6b
+++ b/src/shaders/render/exa_wm_src_affine.g6b
@@ -1,4 +1,4 @@
- { 0x0060005a, 0x204077be, 0x000000e0, 0x008d0040 },
- { 0x0060005a, 0x206077be, 0x000000e0, 0x008d0080 },
- { 0x0060005a, 0x208077be, 0x000000f0, 0x008d0040 },
- { 0x0060005a, 0x20a077be, 0x000000f0, 0x008d0080 },
+ { 0x0060005a, 0x204077be, 0x00000140, 0x008d0040 },
+ { 0x0060005a, 0x206077be, 0x00000140, 0x008d0080 },
+ { 0x0060005a, 0x208077be, 0x00000150, 0x008d0040 },
+ { 0x0060005a, 0x20a077be, 0x00000150, 0x008d0080 },
diff --git a/src/shaders/render/exa_wm_src_affine.g7a b/src/shaders/render/exa_wm_src_affine.g7a
index a786bc0..88e5ed5 100644
--- a/src/shaders/render/exa_wm_src_affine.g7a
+++ b/src/shaders/render/exa_wm_src_affine.g7a
@@ -35,8 +35,6 @@ define(`vh', `g69')
define(`bl', `g2.0<8,8,1>F')
define(`bh', `g4.0<8,8,1>F')
-define(`a0_a_x',`g7.0<0,1,0>F')
-define(`a0_a_y',`g7.16<0,1,0>F')
/* U */
pln (8) ul<1>F a0_a_x bl { align1 }; /* pixel 0-7 */
diff --git a/src/shaders/render/exa_wm_src_affine.g7b b/src/shaders/render/exa_wm_src_affine.g7b
index 5dbbf1b..a15b7b6 100644
--- a/src/shaders/render/exa_wm_src_affine.g7b
+++ b/src/shaders/render/exa_wm_src_affine.g7b
@@ -1,4 +1,4 @@
- { 0x0060005a, 0x284077bd, 0x000000e0, 0x008d0040 },
- { 0x0060005a, 0x286077bd, 0x000000e0, 0x008d0080 },
- { 0x0060005a, 0x288077bd, 0x000000f0, 0x008d0040 },
- { 0x0060005a, 0x28a077bd, 0x000000f0, 0x008d0080 },
+ { 0x0060005a, 0x284077bd, 0x00000140, 0x008d0040 },
+ { 0x0060005a, 0x286077bd, 0x00000140, 0x008d0080 },
+ { 0x0060005a, 0x288077bd, 0x00000150, 0x008d0040 },
+ { 0x0060005a, 0x28a077bd, 0x00000150, 0x008d0080 },
diff --git a/src/shaders/render/exa_wm_xy.g4b b/src/shaders/render/exa_wm_xy.g4b
index 327fc29..2b3b235 100644
--- a/src/shaders/render/exa_wm_xy.g4b
+++ b/src/shaders/render/exa_wm_xy.g4b
@@ -1,4 +1,4 @@
{ 0x00800040, 0x23c06d29, 0x00480028, 0x10101010 },
{ 0x00800040, 0x23806d29, 0x0048002a, 0x11001100 },
- { 0x00802040, 0x2100753d, 0x008d03c0, 0x00004020 },
- { 0x00802040, 0x2140753d, 0x008d0380, 0x00004024 },
+ { 0x00802040, 0x2540753d, 0x008d03c0, 0x00004020 },
+ { 0x00802040, 0x2580753d, 0x008d0380, 0x00004024 },
diff --git a/src/shaders/render/exa_wm_xy.g4b.gen5 b/src/shaders/render/exa_wm_xy.g4b.gen5
index 327fc29..2b3b235 100644
--- a/src/shaders/render/exa_wm_xy.g4b.gen5
+++ b/src/shaders/render/exa_wm_xy.g4b.gen5
@@ -1,4 +1,4 @@
{ 0x00800040, 0x23c06d29, 0x00480028, 0x10101010 },
{ 0x00800040, 0x23806d29, 0x0048002a, 0x11001100 },
- { 0x00802040, 0x2100753d, 0x008d03c0, 0x00004020 },
- { 0x00802040, 0x2140753d, 0x008d0380, 0x00004024 },
+ { 0x00802040, 0x2540753d, 0x008d03c0, 0x00004020 },
+ { 0x00802040, 0x2580753d, 0x008d0380, 0x00004024 },