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| author | Gwenole Beauchesne <gwenole.beauchesne@intel.com> | 2012-09-18 09:40:02 -0400 |
|---|---|---|
| committer | Xiang, Haihao <haihao.xiang@intel.com> | 2012-10-23 13:56:02 +0800 |
| commit | dcceb2101606e9299669ac45bfcf93e2fd826824 (patch) | |
| tree | b3b4d51403f2455d18efb649dfb07b436dfc6bc7 /src/i965_defines.h | |
| parent | ffe25a063e23222cd72fbe4ae3eb0409618c77dd (diff) | |
| download | libva-intel-driver-dcceb2101606e9299669ac45bfcf93e2fd826824.tar.gz libva-intel-driver-dcceb2101606e9299669ac45bfcf93e2fd826824.tar.bz2 libva-intel-driver-dcceb2101606e9299669ac45bfcf93e2fd826824.zip | |
haswell: fix max PS threads shift value.
The maximum number of threads is now a 9-bit value. Thus, one more bit
towards LSB was re-used. i.e. bit position is now 23 instead of 24 on
Ivy Bridge.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Diffstat (limited to 'src/i965_defines.h')
| -rw-r--r-- | src/i965_defines.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/i965_defines.h b/src/i965_defines.h index 66e8e89..e5aa247 100644 --- a/src/i965_defines.h +++ b/src/i965_defines.h @@ -234,7 +234,8 @@ # define GEN7_PS_FLOATING_POINT_MODE_ALT (1 << 16) /* DW3: scratch space */ /* DW4 */ -# define GEN7_PS_MAX_THREADS_SHIFT 24 +# define GEN7_PS_MAX_THREADS_SHIFT_IVB 24 +# define GEN7_PS_MAX_THREADS_SHIFT_HSW 23 # define GEN7_PS_PUSH_CONSTANT_ENABLE (1 << 11) # define GEN7_PS_ATTRIBUTE_ENABLE (1 << 10) # define GEN7_PS_OMASK_TO_RENDER_TARGET (1 << 9) |