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authorXiang, Haihao <haihao.xiang@intel.com>2012-03-27 14:48:36 +0800
committerXiang, Haihao <haihao.xiang@intel.com>2012-03-27 14:48:36 +0800
commita97985da277cd48302cfcb0374604874fc77ef7d (patch)
tree15a6b453d45b4d7dfa0c4f54ccc36b5324f6f470 /src/gen6_mfd.c
parentef5efefaec8b3a4eafde2347b98a973f73745421 (diff)
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Allocate internal buffers with right size for SNB & IVB
The size is scalable with frame width or height Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Diffstat (limited to 'src/gen6_mfd.c')
-rw-r--r--src/gen6_mfd.c33
1 files changed, 20 insertions, 13 deletions
diff --git a/src/gen6_mfd.c b/src/gen6_mfd.c
index 51426ba..c4bec7b 100644
--- a/src/gen6_mfd.c
+++ b/src/gen6_mfd.c
@@ -40,8 +40,6 @@
#include "gen6_mfd.h"
-#define DMV_SIZE 0x88000 /* 557056 bytes for a frame */
-
static const uint32_t zigzag_direct[64] = {
0, 1, 8, 16, 9, 2, 3, 10,
17, 24, 32, 25, 18, 11, 4, 5,
@@ -193,8 +191,10 @@ gen6_mfd_init_avc_surface(VADriverContextP ctx,
{
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct gen6_avc_surface *gen6_avc_surface = obj_surface->private_data;
+ int height_in_mbs;
obj_surface->free_private_data = gen6_mfd_free_avc_surface;
+ height_in_mbs = ((pic_param->picture_height_in_mbs_minus1 + 1) & 0xff); /* frame height */
if (!gen6_avc_surface) {
gen6_avc_surface = calloc(sizeof(struct gen6_avc_surface), 1);
@@ -208,7 +208,7 @@ gen6_mfd_init_avc_surface(VADriverContextP ctx,
if (gen6_avc_surface->dmv_top == NULL) {
gen6_avc_surface->dmv_top = dri_bo_alloc(i965->intel.bufmgr,
"direct mv w/r buffer",
- DMV_SIZE,
+ 128 * height_in_mbs * 64, /* scalable with frame height */
0x1000);
}
@@ -216,7 +216,7 @@ gen6_mfd_init_avc_surface(VADriverContextP ctx,
gen6_avc_surface->dmv_bottom == NULL) {
gen6_avc_surface->dmv_bottom = dri_bo_alloc(i965->intel.bufmgr,
"direct mv w/r buffer",
- DMV_SIZE,
+ 128 * height_in_mbs * 64, /* scalable with frame height */
0x1000);
}
}
@@ -929,6 +929,7 @@ gen6_mfd_avc_decode_init(VADriverContextP ctx,
struct object_surface *obj_surface;
dri_bo *bo;
int i, j, enable_avc_ildb = 0;
+ int width_in_mbs;
for (j = 0; j < decode_state->num_slice_params && enable_avc_ildb == 0; j++) {
assert(decode_state->slice_params && decode_state->slice_params[j]->buffer);
@@ -954,6 +955,7 @@ gen6_mfd_avc_decode_init(VADriverContextP ctx,
assert(decode_state->pic_param && decode_state->pic_param->buffer);
pic_param = (VAPictureParameterBufferH264 *)decode_state->pic_param->buffer;
gen6_mfd_avc_frame_store_index(ctx, pic_param, gen6_mfd_context);
+ width_in_mbs = ((pic_param->picture_width_in_mbs_minus1 + 1) & 0xff);
/* Current decoded picture */
va_pic = &pic_param->CurrPic;
@@ -978,7 +980,7 @@ gen6_mfd_avc_decode_init(VADriverContextP ctx,
dri_bo_unreference(gen6_mfd_context->intra_row_store_scratch_buffer.bo);
bo = dri_bo_alloc(i965->intel.bufmgr,
"intra row store",
- 128 * 64,
+ width_in_mbs * 64,
0x1000);
assert(bo);
gen6_mfd_context->intra_row_store_scratch_buffer.bo = bo;
@@ -987,7 +989,7 @@ gen6_mfd_avc_decode_init(VADriverContextP ctx,
dri_bo_unreference(gen6_mfd_context->deblocking_filter_row_store_scratch_buffer.bo);
bo = dri_bo_alloc(i965->intel.bufmgr,
"deblocking filter row store",
- 30720, /* 4 * 120 * 64 */
+ width_in_mbs * 64 * 4,
0x1000);
assert(bo);
gen6_mfd_context->deblocking_filter_row_store_scratch_buffer.bo = bo;
@@ -996,7 +998,7 @@ gen6_mfd_avc_decode_init(VADriverContextP ctx,
dri_bo_unreference(gen6_mfd_context->bsd_mpc_row_store_scratch_buffer.bo);
bo = dri_bo_alloc(i965->intel.bufmgr,
"bsd mpc row store",
- 11520, /* 1.5 * 120 * 64 */
+ width_in_mbs * 96,
0x1000);
assert(bo);
gen6_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = bo;
@@ -1005,7 +1007,7 @@ gen6_mfd_avc_decode_init(VADriverContextP ctx,
dri_bo_unreference(gen6_mfd_context->mpr_row_store_scratch_buffer.bo);
bo = dri_bo_alloc(i965->intel.bufmgr,
"mpr row store",
- 7680, /* 1. 0 * 120 * 64 */
+ width_in_mbs * 64,
0x1000);
assert(bo);
gen6_mfd_context->mpr_row_store_scratch_buffer.bo = bo;
@@ -1085,9 +1087,11 @@ gen6_mfd_mpeg2_decode_init(VADriverContextP ctx,
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct object_surface *obj_surface;
dri_bo *bo;
+ unsigned int width_in_mbs;
assert(decode_state->pic_param && decode_state->pic_param->buffer);
pic_param = (VAPictureParameterBufferMPEG2 *)decode_state->pic_param->buffer;
+ width_in_mbs = ALIGN(pic_param->horizontal_size, 16) / 16;
mpeg2_set_reference_surfaces(
ctx,
@@ -1109,7 +1113,7 @@ gen6_mfd_mpeg2_decode_init(VADriverContextP ctx,
dri_bo_unreference(gen6_mfd_context->bsd_mpc_row_store_scratch_buffer.bo);
bo = dri_bo_alloc(i965->intel.bufmgr,
"bsd mpc row store",
- 11520, /* 1.5 * 120 * 64 */
+ width_in_mbs * 96,
0x1000);
assert(bo);
gen6_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = bo;
@@ -1378,6 +1382,7 @@ gen6_mfd_init_vc1_surface(VADriverContextP ctx,
{
struct i965_driver_data *i965 = i965_driver_data(ctx);
struct gen6_vc1_surface *gen6_vc1_surface = obj_surface->private_data;
+ int height_in_mbs = ALIGN(pic_param->coded_height, 16) / 16;
obj_surface->free_private_data = gen6_mfd_free_vc1_surface;
@@ -1392,7 +1397,7 @@ gen6_mfd_init_vc1_surface(VADriverContextP ctx,
if (gen6_vc1_surface->dmv == NULL) {
gen6_vc1_surface->dmv = dri_bo_alloc(i965->intel.bufmgr,
"direct mv w/r buffer",
- 557056, /* 64 * 128 * 64 */
+ 128 * height_in_mbs * 64, /* scalable with frame height */
0x1000);
}
}
@@ -1407,9 +1412,11 @@ gen6_mfd_vc1_decode_init(VADriverContextP ctx,
struct object_surface *obj_surface;
int i;
dri_bo *bo;
+ int width_in_mbs;
assert(decode_state->pic_param && decode_state->pic_param->buffer);
pic_param = (VAPictureParameterBufferVC1 *)decode_state->pic_param->buffer;
+ width_in_mbs = ALIGN(pic_param->coded_width, 16) / 16;
/* reference picture */
obj_surface = SURFACE(pic_param->forward_reference_picture);
@@ -1449,7 +1456,7 @@ gen6_mfd_vc1_decode_init(VADriverContextP ctx,
dri_bo_unreference(gen6_mfd_context->intra_row_store_scratch_buffer.bo);
bo = dri_bo_alloc(i965->intel.bufmgr,
"intra row store",
- 128 * 64,
+ width_in_mbs * 64,
0x1000);
assert(bo);
gen6_mfd_context->intra_row_store_scratch_buffer.bo = bo;
@@ -1458,7 +1465,7 @@ gen6_mfd_vc1_decode_init(VADriverContextP ctx,
dri_bo_unreference(gen6_mfd_context->deblocking_filter_row_store_scratch_buffer.bo);
bo = dri_bo_alloc(i965->intel.bufmgr,
"deblocking filter row store",
- 46080, /* 6 * 120 * 64 */
+ width_in_mbs * 6 * 64,
0x1000);
assert(bo);
gen6_mfd_context->deblocking_filter_row_store_scratch_buffer.bo = bo;
@@ -1467,7 +1474,7 @@ gen6_mfd_vc1_decode_init(VADriverContextP ctx,
dri_bo_unreference(gen6_mfd_context->bsd_mpc_row_store_scratch_buffer.bo);
bo = dri_bo_alloc(i965->intel.bufmgr,
"bsd mpc row store",
- 11520, /* 1.5 * 120 * 64 */
+ width_in_mbs * 96,
0x1000);
assert(bo);
gen6_mfd_context->bsd_mpc_row_store_scratch_buffer.bo = bo;