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authorXiang, Haihao <haihao.xiang@intel.com>2013-04-03 08:58:13 +0800
committerXiang, Haihao <haihao.xiang@intel.com>2013-04-03 09:15:56 +0800
commit40d6c94a0c02d794bcba6d14e83926a536da22bd (patch)
tree36e171b13f555feb30c8be306a67e8551f7c88ca /src/gen6_mfd.c
parent4f33851e66844d955bcc383581bf758f6eef50d9 (diff)
parent31caada2967b94705d78ab7f6d07965ad7f13d42 (diff)
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Merge branch 'master' into staging
Conflicts: NEWS configure.ac src/Makefile.am src/gen6_mfc.c src/gen6_mfd.c src/gen6_vme.c src/gen6_vme.h src/gen75_mfc.c src/gen75_mfd.c src/gen75_vme.c src/gen75_vpp_vebox.c src/gen75_vpp_vebox.h src/gen7_mfd.c src/i965_avc_bsd.c src/i965_decoder.h src/i965_decoder_utils.c src/i965_defines.h src/i965_drv_video.c src/i965_drv_video.h src/i965_encoder.c src/i965_encoder.h src/i965_output_dri.c src/i965_post_processing.c src/i965_post_processing.h src/i965_render.c src/i965_structs.h src/intel_driver.c src/object_heap.c src/shaders/post_processing/Common/AYUV_Load_16x8.asm src/shaders/post_processing/Common/AYUV_Load_16x8.inc src/shaders/post_processing/Common/Init_All_Regs.asm src/shaders/post_processing/Makefile.am src/shaders/post_processing/gen5_6/Common/AYUV_Load_16x8.asm src/shaders/post_processing/gen5_6/Common/AYUV_Load_16x8.inc src/shaders/post_processing/gen5_6/Common/Init_All_Regs.asm src/shaders/post_processing/gen5_6/Common/NV12_Load_8x4.asm src/shaders/post_processing/gen5_6/Common/RGBX_Load_16x8.asm src/shaders/post_processing/gen5_6/Common/RGBX_Load_16x8.inc src/shaders/post_processing/gen5_6/Makefile.am src/shaders/post_processing/gen5_6/nv12_avs_nv12.g4b.gen5 src/shaders/post_processing/gen5_6/nv12_avs_nv12.g6b src/shaders/post_processing/gen5_6/nv12_dn_nv12.g4b.gen5 src/shaders/post_processing/gen5_6/nv12_dn_nv12.g6b src/shaders/post_processing/gen5_6/nv12_dndi_nv12.g4b.gen5 src/shaders/post_processing/gen5_6/nv12_dndi_nv12.g6b src/shaders/post_processing/gen5_6/nv12_load_save_nv12.g4b.gen5 src/shaders/post_processing/gen5_6/nv12_load_save_nv12.g6b src/shaders/post_processing/gen5_6/nv12_load_save_pa.g4b.gen5 src/shaders/post_processing/gen5_6/nv12_load_save_pa.g6b src/shaders/post_processing/gen5_6/nv12_load_save_pl3.g4b.gen5 src/shaders/post_processing/gen5_6/nv12_load_save_pl3.g6b src/shaders/post_processing/gen5_6/pa_load_save_nv12.g4b.gen5 src/shaders/post_processing/gen5_6/pa_load_save_nv12.g6b src/shaders/post_processing/gen5_6/pa_load_save_pl3.g4b.gen5 src/shaders/post_processing/gen5_6/pa_load_save_pl3.g6b src/shaders/post_processing/gen5_6/pl3_load_save_nv12.g4b.gen5 src/shaders/post_processing/gen5_6/pl3_load_save_nv12.g6b src/shaders/post_processing/gen5_6/pl3_load_save_pa.g4b.gen5 src/shaders/post_processing/gen5_6/pl3_load_save_pa.g6b src/shaders/post_processing/gen5_6/pl3_load_save_pl3.g4b.gen5 src/shaders/post_processing/gen5_6/pl3_load_save_pl3.g6b src/shaders/post_processing/gen7/EOT.g4a src/shaders/post_processing/gen7/Makefile.am src/shaders/post_processing/gen7/PA_AVS_Buf_0.g4a src/shaders/post_processing/gen7/PA_AVS_Buf_1.g4a src/shaders/post_processing/gen7/PA_AVS_Buf_2.g4a src/shaders/post_processing/gen7/PA_AVS_Buf_3.g4a src/shaders/post_processing/gen7/PL2_AVS_Buf_0.g4a src/shaders/post_processing/gen7/PL2_AVS_Buf_1.g4a src/shaders/post_processing/gen7/PL2_AVS_Buf_2.g4a src/shaders/post_processing/gen7/PL2_AVS_Buf_3.g4a src/shaders/post_processing/gen7/PL3_AVS_Buf_0.g4a src/shaders/post_processing/gen7/PL3_AVS_Buf_1.g4a src/shaders/post_processing/gen7/PL3_AVS_Buf_2.g4a src/shaders/post_processing/gen7/PL3_AVS_Buf_3.g4a src/shaders/post_processing/gen7/Save_AVS_NV12.g4a src/shaders/post_processing/gen7/Save_AVS_PA.g4a src/shaders/post_processing/gen7/Save_AVS_PL3.g4a src/shaders/post_processing/gen7/Save_AVS_RGB.g4a src/shaders/post_processing/gen7/Set_AVS_Buf_0123_BGRA.g4a src/shaders/post_processing/gen7/Set_AVS_Buf_0123_PL2.g4a src/shaders/post_processing/gen7/Set_AVS_Buf_0123_PL3.g4a src/shaders/post_processing/gen7/Set_AVS_Buf_0123_VUYA.g4a src/shaders/post_processing/gen7/Set_AVS_Buf_0123_VYUA.g4a src/shaders/post_processing/gen7/Set_Layer_0.g4a src/shaders/post_processing/gen7/VP_Setup.g4a src/shaders/vme/Makefile.am src/shaders/vme/inter_frame_haswell.asm src/shaders/vme/inter_frame_haswell.g75b src/shaders/vme/intra_frame_haswell.asm src/shaders/vme/intra_frame_haswell.g75b src/shaders/vme/vme75.inc src/shaders/vme/vme7_mpeg2.inc
Diffstat (limited to 'src/gen6_mfd.c')
-rwxr-xr-xsrc/gen6_mfd.c46
1 files changed, 14 insertions, 32 deletions
diff --git a/src/gen6_mfd.c b/src/gen6_mfd.c
index 4246709..3f696dd 100755
--- a/src/gen6_mfd.c
+++ b/src/gen6_mfd.c
@@ -26,14 +26,9 @@
*
*/
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <assert.h>
-
+#include "sysdeps.h"
#include "intel_batchbuffer.h"
#include "intel_driver.h"
-
#include "i965_defines.h"
#include "i965_drv_video.h"
#include "i965_decoder_utils.h"
@@ -278,29 +273,6 @@ gen6_mfd_bsp_buf_base_addr_state(VADriverContextP ctx,
ADVANCE_BCS_BATCH(batch);
}
-#if 0
-static void
-gen6_mfd_aes_state(VADriverContextP ctx,
- struct decode_state *decode_state,
- int standard_select)
-{
- /* FIXME */
-}
-
-static void
-gen6_mfd_wait(VADriverContextP ctx,
- struct decode_state *decode_state,
- int standard_select,
- struct gen6_mfd_context *gen6_mfd_context)
-{
- struct intel_batchbuffer *batch = gen6_mfd_context->base.batch;
-
- BEGIN_BCS_BATCH(batch, 1);
- OUT_BCS_BATCH(batch, MFX_WAIT | (1 << 8));
- ADVANCE_BCS_BATCH(batch);
-}
-#endif
-
static void
gen6_mfd_avc_img_state(VADriverContextP ctx,
struct decode_state *decode_state,
@@ -547,6 +519,7 @@ gen6_mfd_avc_slice_state(VADriverContextP ctx,
pic_param->seq_fields.bits.mb_adaptive_frame_field_flag);
int weighted_pred_idc = 0;
int first_mb_in_slice = 0, first_mb_in_next_slice = 0;
+ unsigned int chroma_log2_weight_denom, luma_log2_weight_denom;
int slice_type;
if (slice_param->slice_type == SLICE_TYPE_I ||
@@ -560,6 +533,9 @@ gen6_mfd_avc_slice_state(VADriverContextP ctx,
slice_type = SLICE_TYPE_B;
}
+ luma_log2_weight_denom = slice_param->luma_log2_weight_denom;
+ chroma_log2_weight_denom = slice_param->chroma_log2_weight_denom;
+
if (slice_type == SLICE_TYPE_I) {
assert(slice_param->num_ref_idx_l0_active_minus1 == 0);
assert(slice_param->num_ref_idx_l1_active_minus1 == 0);
@@ -573,7 +549,13 @@ gen6_mfd_avc_slice_state(VADriverContextP ctx,
} else {
num_ref_idx_l0 = slice_param->num_ref_idx_l0_active_minus1 + 1;
num_ref_idx_l1 = slice_param->num_ref_idx_l1_active_minus1 + 1;
- weighted_pred_idc = (pic_param->pic_fields.bits.weighted_bipred_idc == 1);
+ weighted_pred_idc = pic_param->pic_fields.bits.weighted_bipred_idc;
+
+ if (weighted_pred_idc == 2) {
+ /* 8.4.3 - Derivation process for prediction weights (8-279) */
+ luma_log2_weight_denom = 5;
+ chroma_log2_weight_denom = 5;
+ }
}
first_mb_in_slice = slice_param->first_mb_in_slice << mbaff_picture;
@@ -595,8 +577,8 @@ gen6_mfd_avc_slice_state(VADriverContextP ctx,
OUT_BCS_BATCH(batch,
(num_ref_idx_l1 << 24) |
(num_ref_idx_l0 << 16) |
- (slice_param->chroma_log2_weight_denom << 8) |
- (slice_param->luma_log2_weight_denom << 0));
+ (chroma_log2_weight_denom << 8) |
+ (luma_log2_weight_denom << 0));
OUT_BCS_BATCH(batch,
(weighted_pred_idc << 30) |
(slice_param->direct_spatial_mv_pred_flag << 29) |