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| author | Zhao Yakui <yakui.zhao@intel.com> | 2013-12-19 17:03:31 +0800 |
|---|---|---|
| committer | Xiang, Haihao <haihao.xiang@intel.com> | 2014-02-27 10:26:24 +0800 |
| commit | 8a6c4bc274b234ba3ce21c2be0b46f186e22a171 (patch) | |
| tree | 5d62c3900cc8538c44a6b9af1741e193cc026e5b | |
| parent | 662243418cb7199e41b3dffc6bd8d962146b1dab (diff) | |
| download | libva-intel-driver-8a6c4bc274b234ba3ce21c2be0b46f186e22a171.tar.gz libva-intel-driver-8a6c4bc274b234ba3ce21c2be0b46f186e22a171.tar.bz2 libva-intel-driver-8a6c4bc274b234ba3ce21c2be0b46f186e22a171.zip | |
Fix the error in render shader for BDW
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
| -rw-r--r-- | src/shaders/render/exa_wm_write.g8a | 16 | ||||
| -rw-r--r-- | src/shaders/render/exa_wm_write.g8b | 16 |
2 files changed, 16 insertions, 16 deletions
diff --git a/src/shaders/render/exa_wm_write.g8a b/src/shaders/render/exa_wm_write.g8a index 58347b3..e6da9b6 100644 --- a/src/shaders/render/exa_wm_write.g8a +++ b/src/shaders/render/exa_wm_write.g8a @@ -45,17 +45,17 @@ define(`slot_b_01', `g71') define(`slot_a_00', `g72') define(`slot_a_01', `g73') -mov (8) slot_r_00<1>F src_sample_r_01<1>F { align1 mask_disable }; -mov (8) slot_r_01<1>F src_sample_r_23<1>F { align1 mask_disable }; +mov (8) slot_r_00<1>F src_sample_r_01<8,8,1>F { align1 mask_disable }; +mov (8) slot_r_01<1>F src_sample_r_23<8,8,1>F { align1 mask_disable }; -mov (8) slot_g_00<1>F src_sample_g_01<1>F { align1 mask_disable }; -mov (8) slot_g_01<1>F src_sample_g_23<1>F { align1 mask_disable }; +mov (8) slot_g_00<1>F src_sample_g_01<8,8,1>F { align1 mask_disable }; +mov (8) slot_g_01<1>F src_sample_g_23<8,8,1>F { align1 mask_disable }; -mov (8) slot_b_00<1>F src_sample_b_01<1>F { align1 mask_disable }; -mov (8) slot_b_01<1>F src_sample_b_23<1>F { align1 mask_disable }; +mov (8) slot_b_00<1>F src_sample_b_01<8,8,1>F { align1 mask_disable }; +mov (8) slot_b_01<1>F src_sample_b_23<8,8,1>F { align1 mask_disable }; -mov (8) slot_a_00<1>F src_sample_a_01<1>F { align1 mask_disable }; -mov (8) slot_a_01<1>F src_sample_a_23<1>F { align1 mask_disable }; +mov (8) slot_a_00<1>F src_sample_a_01<8,8,1>F { align1 mask_disable }; +mov (8) slot_a_01<1>F src_sample_a_23<8,8,1>F { align1 mask_disable }; send (16) data_port_msg_2_ind diff --git a/src/shaders/render/exa_wm_write.g8b b/src/shaders/render/exa_wm_write.g8b index 2f237de..822578d 100644 --- a/src/shaders/render/exa_wm_write.g8b +++ b/src/shaders/render/exa_wm_write.g8b @@ -1,13 +1,13 @@ { 0x00600001, 0x2800020c, 0x008d0000, 0x00000000 }, { 0x00600001, 0x2820020c, 0x008d0020, 0x00000000 }, - { 0x00600001, 0x28403aec, 0x002001c0, 0x00000000 }, - { 0x00600001, 0x28603aec, 0x002001e0, 0x00000000 }, - { 0x00600001, 0x28803aec, 0x00200200, 0x00000000 }, - { 0x00600001, 0x28a03aec, 0x00200220, 0x00000000 }, - { 0x00600001, 0x28c03aec, 0x00200240, 0x00000000 }, - { 0x00600001, 0x28e03aec, 0x00200260, 0x00000000 }, - { 0x00600001, 0x29003aec, 0x00200280, 0x00000000 }, - { 0x00600001, 0x29203aec, 0x002002a0, 0x00000000 }, + { 0x00600001, 0x28403aec, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x28603aec, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x28803aec, 0x008d0200, 0x00000000 }, + { 0x00600001, 0x28a03aec, 0x008d0220, 0x00000000 }, + { 0x00600001, 0x28c03aec, 0x008d0240, 0x00000000 }, + { 0x00600001, 0x28e03aec, 0x008d0260, 0x00000000 }, + { 0x00600001, 0x29003aec, 0x008d0280, 0x00000000 }, + { 0x00600001, 0x29203aec, 0x008d02a0, 0x00000000 }, { 0x05800031, 0x20000a40, 0x0e000800, 0x940b1000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, |