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author | Zhao Yakui <yakui.zhao@intel.com> | 2014-03-04 09:08:38 +0800 |
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committer | Xiang, Haihao <haihao.xiang@intel.com> | 2014-04-23 13:25:10 +0800 |
commit | cdd6f6e9b6f1c6cb129781dec7d15283eabd8d3c (patch) | |
tree | 06b0155e23533488c339ec992162ec32981bf73e | |
parent | 276bc5319a8f1b7c0143bc68ba62ffdfe0aa02cd (diff) | |
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bdw: Follow the spec to update the PIPE_CONTROL command
This is the hardware requirement.
Signed-off-by: Zhao Yakui <Yakui.zhao@intel.com>
(cherry picked from commit fc4d39f3b849366ed04223620fa371d76cf813b0)
-rw-r--r-- | src/intel_batchbuffer.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/intel_batchbuffer.c b/src/intel_batchbuffer.c index 52bf443..9dc496d 100644 --- a/src/intel_batchbuffer.c +++ b/src/intel_batchbuffer.c @@ -192,6 +192,7 @@ intel_batchbuffer_emit_mi_flush(struct intel_batchbuffer *batch) OUT_BATCH(batch, CMD_PIPE_CONTROL | (6 - 2)); OUT_BATCH(batch, + CMD_PIPE_CONTROL_CS_STALL | CMD_PIPE_CONTROL_WC_FLUSH | CMD_PIPE_CONTROL_TC_FLUSH | CMD_PIPE_CONTROL_DC_FLUSH | |