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authorZhao Yakui <yakui.zhao@intel.com>2014-03-04 16:23:08 +0800
committerXiang, Haihao <haihao.xiang@intel.com>2014-04-23 13:47:24 +0800
commit8e665f172f23acd3a73c387ab10a0eec35655209 (patch)
tree105b748fdca23cd20324e73fc79cb71da60aa712
parent8eb9d710330410867831c32db0fd0257b81d8f9f (diff)
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Use the XXX_post_processing as callback function for post-processing
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> (cherry picked from commit b7da102c3d237ac5553f8c8ada1bb155e5b8ea75)
-rwxr-xr-xsrc/i965_post_processing.c21
-rwxr-xr-xsrc/i965_post_processing.h9
2 files changed, 22 insertions, 8 deletions
diff --git a/src/i965_post_processing.c b/src/i965_post_processing.c
index bbcba20..5935a9a 100755
--- a/src/i965_post_processing.c
+++ b/src/i965_post_processing.c
@@ -5640,14 +5640,15 @@ i965_post_processing_internal(
VAStatus va_status;
struct i965_driver_data *i965 = i965_driver_data(ctx);
- if (IS_GEN8(i965->intel.device_id))
- va_status = gen8_post_processing(ctx, pp_context, src_surface, src_rect, dst_surface, dst_rect, pp_index, filter_param);
- else if (IS_GEN6(i965->intel.device_id) ||
- IS_GEN7(i965->intel.device_id))
- va_status = gen6_post_processing(ctx, pp_context, src_surface, src_rect, dst_surface, dst_rect, pp_index, filter_param);
- else
- va_status = ironlake_post_processing(ctx, pp_context, src_surface, src_rect, dst_surface, dst_rect, pp_index, filter_param);
-
+ if (pp_context && pp_context->intel_post_processing) {
+ va_status = (pp_context->intel_post_processing)(ctx, pp_context,
+ src_surface, src_rect,
+ dst_surface, dst_rect,
+ pp_index, filter_param);
+ } else {
+ va_status = VA_STATUS_ERROR_UNIMPLEMENTED;
+ }
+
return va_status;
}
@@ -6385,6 +6386,8 @@ gen8_post_processing_context_init(VADriverContextP ctx,
pp_context->vfe_gpu_state.curbe_allocation_size = VPP_CURBE_ALLOCATION_SIZE;
}
+ pp_context->intel_post_processing = gen8_post_processing;
+
assert(NUM_PP_MODULES == ARRAY_ELEMS(pp_modules_gen8));
if (IS_GEN8(i965->intel.device_id))
@@ -6479,12 +6482,14 @@ i965_post_processing_context_init(VADriverContextP ctx,
pp_context->urb.num_vfe_entries * pp_context->urb.size_vfe_entry;
assert(pp_context->urb.cs_start +
pp_context->urb.num_cs_entries * pp_context->urb.size_cs_entry <= URB_SIZE((&i965->intel)));
+ pp_context->intel_post_processing = ironlake_post_processing;
} else {
pp_context->vfe_gpu_state.max_num_threads = 60;
pp_context->vfe_gpu_state.num_urb_entries = 59;
pp_context->vfe_gpu_state.gpgpu_mode = 0;
pp_context->vfe_gpu_state.urb_entry_size = 16 - 1;
pp_context->vfe_gpu_state.curbe_allocation_size = VPP_CURBE_ALLOCATION_SIZE;
+ pp_context->intel_post_processing = gen6_post_processing;
}
diff --git a/src/i965_post_processing.h b/src/i965_post_processing.h
index e525a1a..e76e9c5 100755
--- a/src/i965_post_processing.h
+++ b/src/i965_post_processing.h
@@ -526,6 +526,15 @@ struct i965_post_processing_context
int idrt_size;
unsigned int curbe_offset;
int curbe_size;
+
+ VAStatus (*intel_post_processing)(VADriverContextP ctx,
+ struct i965_post_processing_context *pp_context,
+ const struct i965_surface *src_surface,
+ const VARectangle *src_rect,
+ struct i965_surface *dst_surface,
+ const VARectangle *dst_rect,
+ int pp_index,
+ void * filter_param);
};
struct i965_proc_context