summaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2014-02-14Update to 2.4.45Wang Quanxian1-1/+1
2014-02-14resetting manifest requested domain to floorAlexandru Cornea1-4/+4
2014-02-14Fixed groups, dependencies and rpmlint warningsAnas Nashif2-16/+21
2014-02-14Do not build slp moduleAnas Nashif1-0/+3
2014-02-14slp support moved to libtbmAnas Nashif1-26/+0
2014-02-14Fixed package groupsAnas Nashif2-3/+6
2014-02-14readd baselibs.confAnas Nashif1-0/+3
2014-02-14added baselibs for multi lib support( deleted by mistake)Anas Nashif1-0/+2
2014-02-14Update to 2.4.42Anas Nashif2-5/+12
2014-02-14do not install libdrm_intel on ARMAnas Nashif1-0/+2
2014-02-14do not install libdrm_intel on ARMAnas Nashif1-1/+3
2014-02-14do not install libdrm_intel on ARMAnas Nashif1-0/+2
2014-02-14add packagingAnas Nashif2-0/+127
2014-01-20Bump the version to 2.4.52libdrm-2.4.52Kenneth Graunke1-1/+1
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
2014-01-20intel: Create a new drm_intel_bo offset64 field.Kenneth Graunke2-9/+19
The existing 'offset' field is unfortunately typed as 'unsigned long', which is unfortunately only 4 bytes with a 32-bit userspace. Traditionally, the hardware has only supported 32-bit virtual addresses, so even though the kernel uses a __u64, the value would always fit. However, Broadwell supports 48-bit addressing. So with a 64-bit kernel, the card virtual address may be too large to fit in the 'offset' field. Ideally, we would change the type of 'offset' to be a uint64_t---but this would break the libdrm ABI. Instead, we create a new 'offset64' field to hold the full 64-bit value from the kernel, and store the 32-bit truncation in the existing 'offset' field, for compatibility. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Eric Anholt <eric@anholt.net> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-01-20intel: Track whether a buffer is idle to avoid trips to the kernel.Eric Anholt1-1/+22
I've seen a number of apps spending unreasonable amounts of time in drm_intel_bo_busy during the buffer mapping process. We can't track idleness in general, in the case of buffers shared across processes. But this should significantly reduce our overhead for checking for busy on things like VBOs. Improves (unoptimized) glamor x11perf -f8text by 0.243334% +/- 0.161498% (n=1549), which has formerly been spending about .5% of its time hitting the kernel for drm_intel_gem_bo_busy(). Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-01-20drm: Initialize or valgrind-clear modesetting ioctl arguments.Eric Anholt2-0/+21
Fixes valgrind complaints in the modesetting driver. I tried to follow each ioctl's pattern for whether it was initializing just the in values, or both in and out values. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-01-13Mark debug_print with __attribute__ ((format(__printf__, 1, 0)))Keith Packard1-1/+7
the drmServerInfo member, debug_print, takes a printf format string and varargs list. Tell the compiler about it. Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-01-12freedreno: add fd_device_new_dup()Rob Clark3-0/+15
There seem to be some cases (I've noticed this switching resolution in some games, for example) where the fd can get closed() before the device and all it's bo's are destroyed. Which, if the drm device is opened again and bo's are allocated with the same handles, results that when the first pipe_screen/pipe_context is destroyed causes the first dev to close handles for bo's allocated by the second device. The easy solution to that is to add a mode where the fd_device creates it's own private fd (a dup()). Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-01-12modetest: add the possibility to select the refresh frequency for a modeVincent ABRIOU1-8/+27
When mode is selected we only give the name of the mode as parameter. But sometime, two different modes have the same name but not the same vrefresh frequency. This patch give the possibility to select a mode by its name and optionally by its refresh frequency. Signed-off-by: Vincent Abriou <vincent.abriou@st.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-01-12tests/kmstest: support exynosHyungwon Hwang5-0/+219
In this patch, to support exynos for KMS, Exynos KMS driver is newly added. Also, Exynos is added to the list of kmstest supported modules. Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com> Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-01-10intel: Merge latest i915_drm.hBen Widawsky1-13/+100
This was not done as a straight copy because reset_stats IOCTL landed in libdrm before upstream kernel. Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2014-01-10intel: Handle malloc fails in context createBen Widawsky1-1/+5
The previous code would just use the potentially unallocated variable, which is probably okay most of the time, but not very nice to the user of the library. Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2014-01-10intel: squash unused variable 'bo_gem'Ben Widawsky1-0/+2
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2014-01-08Bump the version to 2.4.51libdrm-2.4.512.4.51Rob Clark1-1/+1
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-01-07freedreno: allow IB to different ringbufferRob Clark3-14/+45
Allow IB to different ringbuffer in addition to just different part of same ringbuffer. In particular, we need to add bo's to the parent (ie. one passed to flush) bo table, since the bo table applies to all the cmd buffers in submit ioctl. Signed-off-by: Rob Clark <robclark@freedesktop.org>
2014-01-07freedreno/kgsl: fix crash introduced w/ bo-cacheRob Clark1-0/+7
Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-12-24radeon: fix sumo2 pci idAlex Deucher1-1/+1
0x9649 is sumo2, not sumo. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-12-24radeon: avoid possible divide by 0 in surface managerAlex Deucher1-3/+3
Some users report hitting a divide by 0 with the tile split in certain apps. Tile_split shouldn't ever be 0 unless the surface structure was not properly initialized. I think there may be some cases where mesa uses an improperly initialized surface struct, but I haven't had time to track it down. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=72425 Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2013-12-13freedreno: add bo cacheRob Clark4-13/+235
Workloads which create many transient buffers cause significant CPU overhead in buffer allocation, zeroing, cache maint, and mmap setup. By caching and re-using existing buffers, the CPU overhead drops significantly. See: http://bloggingthemonkey.blogspot.com/2013/09/freedreno-update-moar-fps.html A simple time based policy is used for purging the cache. Once the kernel supports it, we could use madvise style API to handle memory pressure scenarios a bit better. Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-12-13intel/test_decode: Allow gen8 to be infered from the batch filenamesDamien Lespiau1-0/+1
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-12-13gitignore: Ignore various generated filesDamien Lespiau1-0/+7
- *.log/*.trs are generated by make check - TAGS are generated by make tags - build-aux, config.h.in~ by autoconf - *.sw? are temporary files create by vim - name_from_fd wasn't ignored yet for some reason v2: Ignore *~ as well (Daniel Vetter) Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
2013-12-03Bump the version to 2.4.50libdrm-2.4.502.4.50Marek Olšák2-1/+2
2013-11-26 intel: Track known prime buffers for re-useKeith Packard1-7/+43
If the application sends us a file descriptor pointing at a prime buffer that we've already got, we have to re-use the same bo_gem structure or chaos will result. Track the set of all known prime objects and look to see if the kernel has returned one of those for a new file descriptor. Also checks for prime buffers in the flink case. Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-11-26radeon: Update unaligned offset for 2D->1D tiling transition on SIMichel Dänzer1-1/+1
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71983 Tested-by: Arek Ruśniak <arek.rusi@gmail.com>
2013-11-23Bump the version for releaselibdrm-2.4.492.4.49Marek Olšák1-1/+1
2013-11-23radeon: handle P16 pipe configs for HawaiiMarek Olšák1-0/+6
2013-11-23radeon: don't overallocate stencil by 4 on SI and CIKMichel Dänzer1-2/+3
Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
2013-11-23radeon: implement 2D tiling for CIKMarek Olšák3-13/+624
Bug fixes and simplification by Marek. We have to use the tile index of 0 for non-MSAA depth-stencil after all. Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-23radeon: fix mipmap level 0 and 1 alignment for SI and CIKMichel Dänzer1-10/+12
Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-20intel: Use memset instead of VG_CLEARIan Romanick1-1/+1
The ioctl expects that certain fields will be zeroed, so we should allow the helper function to actually work in non-Valgrind builds. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reported-by: Zhenyu Wang <zhenyuw@linux.intel.com> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-11-19libdrm/mode: Update the encoder and connector definesThomas Hellstrom1-0/+5
Update the defines to match the kernel drm_mode.h Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-15libdrm: bump to 2.4.48libdrm-2.4.482.4.48Ian Romanick1-1/+1
2013-11-15intel: Add support for GPU reset status query ioctlIan Romanick3-0/+58
I would have just used the drmIoctl interface directly in Mesa, but the ioctl needs some data from the drm_intel_context that is not exposed outside libdrm. This ioctl is in the drm-intel-next tree as b635991. v2: Update based on Mika's kernel work. v3: Fix compile failures from last-minute typos. Sigh. v4: Import the actual changes from the kernel i915_drm.h. Only comments on some fields of drm_i915_reset_stats differed. There are still some deltas between the kernel i915_drm.h and the one in libdrm, but those can be resolved in other patches. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> [v3] Reviewed-by: Damien Lespiau <damien.lespiau@intel.com> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-11-13radeon: add hawaii pci idsAlex Deucher1-0/+13
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-13radeon: add hawaii chip familyAlex Deucher1-0/+1
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-08Revert "intel: Add support for GPU reset status query ioctl"Dave Airlie3-56/+0
This reverts commit 6335e1d28c422050024bcf4100c4fb3a5bac2afb. No taxation without representation, in other words no userspace without kernel stuff being in a stable location, either drm-next but I'll accept drm-intel-next for intel specific stuff.
2013-11-07intel: Add support for GPU reset status query ioctlIan Romanick3-0/+56
I would have just used the drmIoctl interface directly in Mesa, but the ioctl needs some data from the drm_intel_context that is not exposed outside libdrm. v2: Update based on Mika's kernel work. v3: Fix compile failures from last-minute typos. Sigh. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-11-07intel/bdw: Update MI_BATCH_BUFFER_START for aub dumpsDamien Lespiau1-2/+8
The command now takes a 48bits address and is thus 1 dword longer. v2 (Ben): commit message: s/byte/dword (Eric) Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2013-11-07intel/bdw/aub: Update AUB trace block writes for 48-bit addressing.Kenneth Graunke1-3/+9
Since our aub file dumping's GTT handling is totally fake, we always put everything in the low 4GB anyway and shouldn't ever need to set AddressHigh to anything other than 0. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> [ben: slight commit message change] Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-30 04:06:08 +0000