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author | Andrey Grodzovsky <andrey.grodzovsky@amd.com> | 2017-11-24 15:50:51 -0500 |
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committer | Andrey Grodzovsky <andrey.grodzovsky@amd.com> | 2017-11-29 10:31:00 -0500 |
commit | 1a129004a82d557695fad1a7b9c37fe18b00c79f (patch) | |
tree | bf11a8230dd6c3add3dbdea7a9ba92e67e3ffd22 /tests/amdgpu | |
parent | 0ab36dafaf818c35a258dac0c75b779ab2ae792b (diff) | |
download | libdrm-1a129004a82d557695fad1a7b9c37fe18b00c79f.tar.gz libdrm-1a129004a82d557695fad1a7b9c37fe18b00c79f.tar.bz2 libdrm-1a129004a82d557695fad1a7b9c37fe18b00c79f.zip |
amdgpu: Switch amdgpu CS tests enabling to the new way.
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Diffstat (limited to 'tests/amdgpu')
-rw-r--r-- | tests/amdgpu/amdgpu_test.c | 2 | ||||
-rw-r--r-- | tests/amdgpu/amdgpu_test.h | 5 | ||||
-rw-r--r-- | tests/amdgpu/cs_tests.c | 64 |
3 files changed, 38 insertions, 33 deletions
diff --git a/tests/amdgpu/amdgpu_test.c b/tests/amdgpu/amdgpu_test.c index ee64152e..e611276d 100644 --- a/tests/amdgpu/amdgpu_test.c +++ b/tests/amdgpu/amdgpu_test.c @@ -146,7 +146,7 @@ static Suites_Active_Status suites_active_stat[] = { }, { .pName = CS_TESTS_STR, - .pActive = always_active, + .pActive = suite_cs_tests_enable, }, { .pName = VCE_TESTS_STR, diff --git a/tests/amdgpu/amdgpu_test.h b/tests/amdgpu/amdgpu_test.h index 414fcb81..3238e05f 100644 --- a/tests/amdgpu/amdgpu_test.h +++ b/tests/amdgpu/amdgpu_test.h @@ -85,6 +85,11 @@ int suite_cs_tests_init(); int suite_cs_tests_clean(); /** + * Decide if the suite is enabled by default or not. + */ +CU_BOOL suite_cs_tests_enable(void); + +/** * Tests in cs test suite */ extern CU_TestInfo cs_tests[]; diff --git a/tests/amdgpu/cs_tests.c b/tests/amdgpu/cs_tests.c index 3b2f17db..4880b74f 100644 --- a/tests/amdgpu/cs_tests.c +++ b/tests/amdgpu/cs_tests.c @@ -66,6 +66,26 @@ CU_TestInfo cs_tests[] = { CU_TEST_INFO_NULL, }; +CU_BOOL suite_cs_tests_enable(void) +{ + if (amdgpu_device_initialize(drm_amdgpu[0], &major_version, + &minor_version, &device_handle)) + return CU_FALSE; + + family_id = device_handle->info.family_id; + + if (amdgpu_device_deinitialize(device_handle)) + return CU_FALSE; + + + if (family_id >= AMDGPU_FAMILY_RV || family_id == AMDGPU_FAMILY_SI) { + printf("\n\nThe ASIC NOT support UVD, suite disabled\n"); + return CU_FALSE; + } + + return CU_TRUE; +} + int suite_cs_tests_init(void) { amdgpu_bo_handle ib_result_handle; @@ -90,11 +110,6 @@ int suite_cs_tests_init(void) chip_rev = device_handle->info.chip_rev; chip_id = device_handle->info.chip_external_rev; - if (family_id >= AMDGPU_FAMILY_RV || family_id == AMDGPU_FAMILY_SI) { - printf("\n\nThe ASIC NOT support UVD, all sub-tests will pass\n"); - return CUE_SUCCESS; - } - r = amdgpu_cs_ctx_create(device_handle, &context_handle); if (r) return CUE_SINIT_FAILED; @@ -119,24 +134,18 @@ int suite_cs_tests_clean(void) { int r; - if (family_id >= AMDGPU_FAMILY_RV || family_id == AMDGPU_FAMILY_SI) { - r = amdgpu_device_deinitialize(device_handle); - if (r) - return CUE_SCLEAN_FAILED; - } else { - r = amdgpu_bo_unmap_and_free(ib_handle, ib_va_handle, - ib_mc_address, IB_SIZE); - if (r) - return CUE_SCLEAN_FAILED; - - r = amdgpu_cs_ctx_free(context_handle); - if (r) - return CUE_SCLEAN_FAILED; - - r = amdgpu_device_deinitialize(device_handle); - if (r) - return CUE_SCLEAN_FAILED; - } + r = amdgpu_bo_unmap_and_free(ib_handle, ib_va_handle, + ib_mc_address, IB_SIZE); + if (r) + return CUE_SCLEAN_FAILED; + + r = amdgpu_cs_ctx_free(context_handle); + if (r) + return CUE_SCLEAN_FAILED; + + r = amdgpu_device_deinitialize(device_handle); + if (r) + return CUE_SCLEAN_FAILED; return CUE_SUCCESS; } @@ -203,9 +212,6 @@ static void amdgpu_cs_uvd_create(void) void *msg; int i, r; - if (family_id >= AMDGPU_FAMILY_RV || family_id == AMDGPU_FAMILY_SI) - return; - req.alloc_size = 4*1024; req.preferred_heap = AMDGPU_GEM_DOMAIN_GTT; @@ -277,9 +283,6 @@ static void amdgpu_cs_uvd_decode(void) uint8_t *ptr; int i, r; - if (family_id >= AMDGPU_FAMILY_RV || family_id == AMDGPU_FAMILY_SI) - return; - req.alloc_size = 4*1024; /* msg */ req.alloc_size += 4*1024; /* fb */ if (family_id >= AMDGPU_FAMILY_VI) @@ -419,9 +422,6 @@ static void amdgpu_cs_uvd_destroy(void) void *msg; int i, r; - if (family_id >= AMDGPU_FAMILY_RV || family_id == AMDGPU_FAMILY_SI) - return; - req.alloc_size = 4*1024; req.preferred_heap = AMDGPU_GEM_DOMAIN_GTT; |