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author | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2016-12-12 16:06:02 -0800 |
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committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2017-06-30 08:30:08 -0700 |
commit | 6b624bf3c394e1883314925c65c7ed1e98f3639f (patch) | |
tree | 6d7941e7a8cf3fec7345c5fb34822284b688afcc /intel | |
parent | 4c98652cb5cd3b0ef3681b1a7b2892c14b7f5c34 (diff) | |
download | libdrm-6b624bf3c394e1883314925c65c7ed1e98f3639f.tar.gz libdrm-6b624bf3c394e1883314925c65c7ed1e98f3639f.tar.bz2 libdrm-6b624bf3c394e1883314925c65c7ed1e98f3639f.zip |
intel: Add Cannonlake PCI IDs for U-skus.
Platform enabling and its power-on are organized in different
skus (U x Y x S x H, etc). So instead of organizing it in
GT1 x GT2 x GT3 let's also use the platform sku.
This is a copy of merged i915's
commit e918d79a5d0a ("drm/i915/cnl: Add Cannonlake PCI IDs for U-skus.")
v2: Remove PCI IDs for SKU not mentioned in spec.
v3: Add kernel commit id for reference.
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Clinton Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
Diffstat (limited to 'intel')
-rw-r--r-- | intel/intel_chipset.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h index 891b50fc..e6b49d73 100644 --- a/intel/intel_chipset.h +++ b/intel/intel_chipset.h @@ -233,6 +233,11 @@ #define PCI_CHIP_COFFEELAKE_U_GT3_3 0x3EA7 #define PCI_CHIP_COFFEELAKE_U_GT3_4 0x3EA8 +#define PCI_CHIP_CANNONLAKE_U_GT2_0 0x5A52 +#define PCI_CHIP_CANNONLAKE_U_GT2_1 0x5A5A +#define PCI_CHIP_CANNONLAKE_U_GT2_2 0x5A42 +#define PCI_CHIP_CANNONLAKE_U_GT2_3 0x5A4A + #define IS_MOBILE(devid) ((devid) == PCI_CHIP_I855_GM || \ (devid) == PCI_CHIP_I915_GM || \ (devid) == PCI_CHIP_I945_GM || \ @@ -496,5 +501,13 @@ IS_GEN8(dev) || \ IS_GEN9(dev)) +#define IS_CNL_U(devid) ((devid) == PCI_CHIP_CANNONLAKE_U_GT2_0 || \ + (devid) == PCI_CHIP_CANNONLAKE_U_GT2_1 || \ + (devid) == PCI_CHIP_CANNONLAKE_U_GT2_2 || \ + (devid) == PCI_CHIP_CANNONLAKE_U_GT2_3) + +#define IS_CANNONLAKE(devid) (IS_CNL_U(devid)) + +#define IS_GEN10(devid) (IS_CANNONLAKE(devid)) #endif /* _INTEL_CHIPSET_H */ |